CS-383 Test 2 Study Guide Little Man Computer: Components: - In/out baskets - Calculator - Mailboxes (contain operation as 1st

digit, data/address of data as last 2 digits) - Instruction location counter - Reset button - Little Man Instructions: - ADD/SUB (read mailbox + perform operation in the calculator) - 2nd +/- 1st num stored in 2nd - STO/LDA (move data between mailbox and calculator) - IN/OUT (move data between calculator and in/out baskets) - COB (stop) - Branching: BR, BRZ (branch on 0), BRP (branch on positive) - EXT (extend sign bit) The CPU and Memory: Major Components: - ALU (arithmetic logic unit/calculator): performs calculations and comparisons - CU (control unit/little man): performs fetch/execute cycle - Memory management unit - I/O interface - Registers: small permanent storage locations within the CPU ! - Can hold data, an address, or an instruction - Special Purpose Registers: - Program Count Register (PC) - Instruction Register (IR) - Stores instructions fetched from memory - Memory Address Register (MAR) - Memory Data Register (MDR) - Status Registers - Flags: overow, zero, carry, negative, parity (odd/even) RAM: - DRAM (Dynamic RAM) - Common, cheap, volatile (must be refreshed 1000s of times each second) - SRAM (Static RAM) - Faster, more expensive, often used for caches, volatile ROM: - ROM (Read-only memory) - Holds software that is not expected to change

- EEPROM (Electrically Erasable Programmable ROM) - Flash Memory - Faster but more expensive - Slow rewrite time - Useful for nonvolatile portable computer storage LMC Fetch/execute: STORE pc->mar mdr->ir ir[@]->mar a->mdr pc+1->pc ADD pc->mar mdr->ir ir[@]->mad a+mdr->A pc+1->pc Buses: - Parallel - All bits transmitted at the same time - Short distances - Serial - 1 bit transmitted at a time - Direction of transmission: - Simplex - unidirectional - Half duplex - bidirectional, one direction at a time - Full duplex - bidirectional simultaneously CPU Architectures: - VLIW (very long instruction word) - Four 32-bit atoms - EPIC (explicitly parallel instruction computer) - Three 41-bit instructions - 5 bits to identify type of instructions in bundle - Pipelining (scalar) - Assembly line technique to allow overlapping between fetch-execute cycles - Super Scalar - Process more than one instruction per clock cycle - Parallel execution units

Caches: - Blocks: 8 or 16 bytes - Hit ratio: ratio hits out of total requests - Hit ratio of 90% common, 50% improved execution speed - Locality of reference is why caching works Multiprocessing: - Increase the processing power of a system - Parallel processing Multiprocessor system: - Tightly coupled - Multicore processors - when CPUs are on a single integrated circuit - Identical access, easy multitasking - Two ways to congure - Master-slave multiprocessing - Advantages: simplicity, protection of system and data - Disadvantages: master CPU becomes a bottleneck, reliability issues - Symmetrical multiprocessing - Advantages: reliability, balanced workload - Disadvantages: resources conicts, complex implemntation Kinds of Processors: - CISC (Complex Instruction Set Computers) - RISC (Reduced Instruction Set Computers) - Hybrid - Special Purpose Assembly: - Binary: % - Hexadecimal: $ - ALU - Registers: - 16 data/address registers: - 8 data registers (D0..D7) - 8 address registers (A0..A7) - Stack register: A7 - Status register - Bits 15-8 are a systembyte - Trace bit - Supervisor bit - Interrupt mask - Bits 7-0 are a userbyte - Carry ag - Overow ag

- Zero ag - Negative ag - Extended ag - Program counter - PC (program counter) - SR (status register) Addressing: Immediate Addressing with Data Registers: Syntax: Dn Move only specied digits Immediate Addressing with Address Registers: Syntax: An Move digits, change sign when putting into an A Indirect Addressing with Address Registers: Syntax: (An) Find digits at address An, move digits (Address must be an even number) Indirect Addressing with Address Registers with Post Increment: Syntax: (An)+ Move digits and add 4 to address register Indirect Addressing with Address Registers with Pre-Decrement: Syntax: -(An) Subtract 4 from address register, move digits Indirect Addressing with Address Registers with Shifting: Syntax: x(An) Add x to address register, move digits Indirect Addressing with Address Registers with Shifting (2): Syntax: x(An, Dn.X) or x(An, An.X) where X is L or W Add address registers, add 4, move digits Absolute Addressing (near): Syntax: x (x is 16 bit constant) Move whats in register Absolute Addressing (far): Syntax: x (x is 32 bit constant) Move whats in register Program counter with shifting:

Syntax: x(PC) Add x and 2 then get address from memory Program counter with index: Syntax: x(PC, Dn.X) or x(PC, An.X) (X is W or L) Add x, PC, An/Dn then move digits Immediate Addressing: Syntax: #x Move exact digits Addressing with Status Register: Syntax: SR, CCR Only works with ANDI, EORI, and ORI