Operation

ADC ADD ADD ADD ADD ADD ADD ADD ADD ADD AND CALL CALL CLD CMPSB CMPW DEC DEC DEC DIV DIV HLT IDIV IDIV IMUL IMUL IN IN IN IN INC INC INC IRET JMP JMP JZ JNE JB JNB JS JNS JO JNO JPE JPO JL

Operands
see ADD r/m8, reg8 r/m16, reg16 reg8, r/m8 reg16, r/m16 AL, imm8 AX, imm16 r/m8, imm8 r/m16, imm16 r/m16, imm8 see ADD 32-bit displacement 16-bit displacement

Opcode

ADD opcode + $10 $00 $01 $02 $03 $04 $05 $80 $81 $83 ADD opcode + $20 $9A $E8 $FC ES:[DI]==DS:[SI] $A6 ES:[DI]==DS:[SI] $A7 r/m8 $FE, xx001xxx (ModR/M byte) r/m16 $FF, xx001xxx (ModR/M byte) reg16 $48 + reg16 code r/m8 $F6, xx110xxx (ModR/M byte) r/m16 $F7, xx110xxx (ModR/M byte) $F4 r/m8 $F6, xx111xxx (ModR/M byte) r/m16 $F7, xx111xxx (ModR/M byte) r/m8 $F6, xx101xxx (ModR/M byte) r/m16 $F7, xx101xxx (ModR/M byte) AL, addr8 $E4 AX, addr8 $E5 AL, port[DX] $EC AX, port[DX] $ED r/m8 $FE, xx000xxx (ModR/M byte) r/m16 $FF, xx000xxx (ModR/M byte) reg16 $40 + reg16 code 48-bit POP $CF 32-bit displacement $EA 16-bit displacement $EB 8-bit relative $74 8-bit relative $75 8-bit relative $72 8-bit relative $73 8-bit relative $78 8-bit relative $79 8-bit relative $70 8-bit relative $71 8-bit relative $7A 8-bit relative $7B 8-bit relative $7C
ENGR. KRISTINE P. ORTEGA

Operation
JNL JLE JNLE JBE JNBE JCXZ LDS LES LODSB LODSW LOOP LOOPE LOOPNE LOOPNZ LOOPZ MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOVSB MUL MUL NEG NEG NOT NOT OR OUT OUT OUT OUT POP POP POP PUSH PUSH PUSH REP REPNE RET RET RET SBB SCASB

Operands
8-bit relative 8-bit relative 8-bit relative 8-bit relative 8-bit relative 8-bit relative reg16, mem32 reg16, mem32 AL = DS:[SI] AX = DS:[SI] 8-bit relative 8-bit relative 8-bit relative 8-bit relative 8-bit relative r/m8, reg8 r/m16, reg16 sreg, r/m16 r/m16, sreg AL, mem8 AX, mem16 mem8, AL mem16, AX reg8, imm8 reg16,imm16 r/m8, imm8 r/m16, imm16 r/m16,sreg sreg, r/m16 ES:[DI] = DS:[SI] r/m8 r/m16 r/m8 r/m16 r/m8 r/m16 see ADD addr8, AL addr8, AX port[DX], AL port[DX], AX r/m16 reg16 sreg r/m16 reg16 sreg

Opcode
$7D $7E $7F $76 $77 $E3 $C4 $C5 $AC $AD $E2 $E1 $E0 $E0 $E1 $88 $89 $8E $8C $A0 $A1 $A2 $A3 $B0 + reg8 code $B8 + reg16 code $C6, xx000xxx(ModR/M byte) $C7, xx000xxx(ModR/M byte) $8C, xx0 sreg xxx(ModR/M byte) $8C, xx0 sreg xxx(ModR/M byte) $A4 $F6, xx100xxx (ModR/M byte) $F7, xx100xxx (ModR/M byte) $F6, xx011xxx (ModR/M byte) $F7, xx011xxx (ModR/M byte) $F6, xx010xxx (ModR/M byte) $F7, xx010xxx (ModR/M byte) ADD opcode + $08 $E6 $E7 $EE $EF $8F $58 + reg16 code $07 + ES = 0, CS = 8, SS = $10, DS = $18 $FF, xx110xxx (ModR/M byte) $50 + reg16 code $06 + ES = 0, CS = 8, SS = $10, DS = $18 $F3 $F2 $CA $C2 $C3 ADD opcode + $18 $AE

32-bit POP 16-bit POP see ADD ES:[DI] == AL

ENGR. KRISTINE P. ORTEGA

SCASW STD STOSB STOSW SUB XOR

ES:[DI] == AX ES:[DI] = AL ES:[DI] = AX see ADD see ADD

$AF $FD $AA $AB ADD opcode + $28 ADD opcode + $30

addr8 = 8-bit address of I/O port reg8 = AL = 0, CL = 1, DL = 2, BL = 3, AH =4, CH = 5, DH = 6, BH = 7 reg16 = AX = 0, CX =1, DX =2, BX =3, SP = 4, BP = 5, SI = 6, DI = 7 sreg = ES = 0, CS = 1, SS = 2, DS = 3

ENGR. KRISTINE P. ORTEGA

REGISTERS
AL CL DL BL AH CH DH BH

AL, REG
C0 C1 C2 C3 C4 C5 C6 C7

CL, REG
C8 C9 CA CB CC CD CE CF

DL, REG
D0 D1 D2 D3 D4 D5 D6 D7

BL, REG
D8 D9 DA DB DC DD DE DF

REGISTERS
AL CL DL BL AH CH DH BH

AH, REG
E0 E1 E2 E3 E4 E5 E6 E7

CH, REG
E8 E9 EA EB EC ED EE EF

DH, REG
F0 F1 F2 F3 F4 F5 F6 F7

BH, REG
F8 F9 FA FB FC FD FE FF

REGISTERS
AX CX DX BX SP BP SI DI

AX, REG
C0 C1 C2 C3 C4 C5 C6 C7

CX, REG
C8 C9 CA CB CC CD CE CF

DX, REG
D0 D1 D2 D3 D4 D5 D6 D7

BX, REG
D8 D9 DA DB DC DD DE DF

REGISTERS
AX CX DX BX SP BP SI DI

SP, REG
E0 E1 E2 E3 E4 E5 E6 E7

BP, REG
E8 E9 EA EB EC ED EE EF

SI, REG
F0 F1 F2 F3 F4 F5 F6 F7

DI, REG
F8 F9 FA FB FC FD FE FF

ENGR. KRISTINE P. ORTEGA