A Random Number Generator For Rfid Tags

International Journal of of Electronics and Communication International JournalElectronics and Communication Engineering & Technology (IJECET), ISSN 0976
Engineering 6464(Print), ISSN 0976 6472(Online) Volume 1, Number 1, Sep - Oct (2010), IAEME & Technology (IJECET) ISSN 0976 6464(Print), ISSN 0976 6472(Online) Volume 1, Number 1, Sep - Oct (2010), pp. 71-87 IAEME IAEME, http://www.iaeme.com/ijecet.html
IJECET
A RANDOM NUMBER GENERATOR FOR RFID TAGS

Mala Mitra Department of Electronics and Communication Engineering PES School of Engineering, Hosur Road, Electronic City Bangalore, Email: mala_2001_in@yahoo.com
ABSTRACT
In this paper, a true random number generator based on a simple circuit is proposed. The circuit consists of an operational amplifier with a positive feedback. It is a Schmitt trigger circuit without any applied input signal. A Schmitt trigger circuit gives a positive saturated output voltage +Vsat or negative saturated output voltage -Vsat depending on the differential input is negative or positive at the instant of power supply switch on. In the presence of any input signal the output state changes at the crossing of either the upper trigger point or the lower trigger point. In absence of any input signal the input shall be governed by resultant thermal noise voltage of the resistors present at the input. It shall be set at one level either +Vsat /bit 1 or -Vsat /bit 0 depending on the polarity of the differential input thermal noise. Instead of constant supply voltages to bias the operational amplifier clock pair may be used. The polarity of the thermal noise voltage of the resistors present at the input at the instant of rising/falling edge of the clock pair decides the polarity of the output pulses. Since polarity of thermal noise voltage is random the output bit-pattern of 1 and 0 is also random. The output bits are in polar RZ format with no dc component. Results show that, the output passes the NIST test directly. No further randomization of the output bits or input voltage control is required. The proposed random number generator is suitable for RFID tag security and privacy algorithms as the random number generator is very robust to noise, thermal and power attacks prevalent in RFID systems. The simple circuit proposed here can be implemented in existing popular embedded systems for RFID tags e.g. MSP430 microcontroller or WISP.
71
International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 6464(Print), ISSN 0976 6472(Online) Volume 1, Number 1, Sep - Oct (2010), IAEME
Keywords: Johnson noise, NIST test, Operational amplifier, Schmitt trigger, Security
and privacy of RFID systems.
INTRODUCTION
RFID is a low-cost solution for object identification. Some of the typical applications are supply chain management, access control, library management, smart appliances etc. [1, 2]. As technology advances, RFID is penetrating more and more in our everyday life. For more widespread applications and to make these systems more popular the security and privacy of the system must be enhanced [3, 4]. An RFID tag sends an Electronic Product Code or EPC for the object to which it is tagged. It gives information about the object class and a unique identification number to any interrogator. This may create a privacy problem. For instance, an RFID tag can be impregnated on little Alice. While Alice plays alone in her wonderland her parents can keep track of her using a RFID detector. Even if Alice hides behind a bush the EPC code from the tag can be read by the detector as RFID system does not need any Line of Sight (LOS) operation. But the problem is, the tag on Alice responds to any detector that conforms to the standard. An adversary can use her detector and by reading the object class can find out all the kids with RFID tags in the vicinity. A kidnapper may track little Alice with the identity number available in the EPC code. This may help to concoct a kidnap plan. Further after knowing the EPC code a tag can be cloned with the same code. The cloned tag can be used for misguiding the parents after a kidnap. The transmission from the original impregnated tag on Alice can be prevented by a metal shield. Standard encryption algorithms e.g. RSA, ECC [5, 6] cannot protect against tracking and cloning. After standard encryption a tag shall send the same encrypted EPC for any interrogation by any detector. An adversary can track an object or a person by the encrypted EPC. No knowledge of the secret key is needed. With the encrypted EPC, tags may be cloned. In case of RFID tag, the encryption algorithm should give different cipher-text or encrypted EPC for each enquiry. However, the authentic interrogator should have some secret information or a key to decrypt and get the unique EPC in every interrogation. Without this secret key the adversary shall not be able to track the tag as
72
each time her detector receives an apparently random number. Many algorithms have been proposed in recent days to prevent tracking and cloning. Most of the advanced algorithms use random numbers to randomize the cipher-text [7, 8]. Many random number generators (RNGs) have been proposed in the past and in recent times [9 - 28]. Some of them are quite fit to serve a specific application e.g. genetic algorithm [21], cryptography [10], random frequency hopping in a spread spectrum communication system [22]. These technologies cannot be directly implemented for RFID tags as RNG of an RFID tag must have some special features. Some of the special requirements of the RNG for an RFID tag are listed below. I. Robust to Thermal Attacks: RFID tags and so the RNG must work for a varying working environment. Thermal attack where an adversary deliberately changes the tag temperature to get predictable data is quite possible. However, any RNG may fail beyond a certain range of temperature. It is to be noted that attack usually takes place when a human carries the tag. A human being feels uncomfortable when the temperature deviates abruptly by 15 0C from the normal. In such situation the tag can be made inoperable with a metal film cover. Within the comfortable temperature range the RNG should deliver unpredictable data. Tokunaga et al. and Bellido et al [11, 23] utilized thermal noise voltage as input to a meta-stable system. It was shown that at meta-stable point deterministic noise is less when the resolution time of the output bit is high and the output bits from the system can be considered as random. This meta-stable point is very sensitive to input bias, which in its turn changes with ambient temperature. A control system brings the system back to a meta-stable point if resolution time is below threshold. With a thermal attack before the control system works initial bits may get predictable. As a measure, bits are dropped when resolution time is low. But measured resolution time is an average for 128 bits. The attack may happen for less number of bits maintaining the average resolution time at a satisfactory level. II. Robust to Power Attacks: The random number generator should be robust against power attacks. Most of the RFID tags are passive or battery-less. Those utilize the detector power. An adversary
73
may deliberately transmit less power from the detector. The tag RNG may generate same bit 0 or predictable bits when it is power hungry or supply voltage or current to the circuit is low. This attack has been demonstrated for Philips Mifare tags [29]. In many of the RNGs randomness is decided by the clock jitter or time difference between a clock pair. In a passive RFID tag instead of generation of clock pair the transmitted pulse train from the detector can be utilized. In that case, the time difference or clock jitter information is also available in the detector and the random number produced is known to adversary [15]. III.Lightweight: RNG and the RFID tag containing it must be lightweight. In most of the cases the strategies used for RNGs give pseudo-random numbers. Additional circuits are used to further randomize it. This takes additional chip area and the RNG no longer remains lightweight. One of the strategies for RNG is to utilize thermal noise voltage as it is known as one of the best sources of random noise. Since amplitude of noise voltage is very low efforts were made to amplify it [20, 24]. In the process of amplification, the voltage gets corrupted by deterministic noise generated in the amplifier. Also the finite bandwidth of the amplifier makes the output colored though there is random or white noise at the input. Further randomization is done with additional hardware. This consumes additional Si area. For superconductive RNG in SFQ circuits [10] the circuit is very sensitive to low thermal noise voltage and further magnification is not required. However, maintenance of superconductive temperature is beyond the scope of a portable lightweight device e.g. RFID. IV.No Seed Value: RNGs that require seed values [15, 28, 30] are not suitable for RFIDs. In this automated system manual entry of seed value is not possible. If known parameters e.g. date or time is used to provide the seed value the unpredictability of the output pattern is lost. Most of the recent hardware RNGs do not need any seed value. V.Intermittent Operation: In some RNGs e.g. continuous chaotic oscillator [9, 25], meta-stable system [11] initial few bits depend on the initial condition and are predictable. It quickly transforms
74
to a state where generated data is unpredictable. For a continuously functioning generator the first few predictable bits can be discarded. A passive RFID tag goes for a deep sleep in absence of a detector and the available power. Generator should work satisfactorily as soon as it wakes up. VI.Qualify NIST Test Suite: The output should not follow any definite pattern. The adversary should not be able to predict the output by applying her knowledge. NIST test [31] has been accepted as the standard for unpredictability. The output should pass the NIST test. Apart from these essential features there are some desired features for RFID tags. These are listed below: VII.Part of an Embedded System: There is an urgent need of secured RFID system. It is desirable that the RNG can be implemented on an embedded system that is already in use for tags e.g. MSP430 / WISP [32]. In that case, no extra component is needed for the development of tags to provide security or privacy.
Si Chip Implementation: If embedded implementation is not feasible a fully tested

light-weight IC that can be readily incorporated in the system is desirable. VIII.Pulsating Voltage: It is desirable that the system consumes low power. As mentioned earlier, a passive tag utilizes detector power. Detector transmits power in the form of a pulse train. Rectifier and regulator circuits are required to convert this pulsating voltage to a stable dc supply. A part of this power is consumed in these circuits. It is desirable that an RNG can function with the pulsating voltage instead of stable dc supplies to minimize wastage of power. Table I and II show the suitability of recently proposed RNGs for RFID tags.
75
Table 1 suitability of proposed random number generators for rfid tags

Refere nce Basic Principle Any particular drawback Robust to Thermal (T), and Power (P) Attacks Lightweight Intermitt ent Operatio n NIST Test Results
[9]
Chaotic oscillator, time difference between clock pairs and further randomization
[10]
[11] [12] [13]
Thermal noise detection in Superconductive Single Flux Quantum Circuit Meta-stability based quality control Chaos based generator Meta-stability based output control
Implementation of off-chip oscillator inductance alongwith tag antenna inductance without mutual coupling Maintenance of superconductive temperature 4.2 K --Too many reference voltages to be converted from pulsating voltage in a passive RFID tag -(i) Generation of a pair of independent clocks in a passive RFID tag. (ii) Further processing is affected by clock period variation. A time attack is possible. Difficult to implement on Si due to process variation Nearby ring
No (T) Not known (P) No
No
17 out of 17
No
No
Not known
1 out of 17
No Yes No
No No No
No No No
7 out of 17* No result 15 out of 17
[14] [15]
Clock jitter and further chaos Rising edge time difference between two independent clocks
Not known No
Yes Yes
Yes Yes
13 out of 17 Not done
[16]
Chaos due to Bernoulli shift and further randomization Random jitter in a
(T) Yes (P) No
Yes
Yes
9 out of 17
[17]
Not
No
Yes
Not shown
76
number of ring oscillators and further randomization
[19]
Random fluctuation of current in a MOS capacitor after soft breakdown and further randomization
[20]
Amplification of thermal noise voltage of a resistor and further randomization
oscillators get phase locked and randomness is less than expected Soft breakdown voltage is extremely sensitive to fabrication process and operating temperature. Any fluctuation in the operating point may lead to no breakdown or hard breakdown. Amplifier degrades the randomness of the thermal noise voltage
known
No
Yes
No
Not shown
(T) Not known (P) No
No
Yes
Not done
This work
Saturation of thermal noise voltage
Yes
Yes
Yes
11 out of 17
Table 2 suitability of proposed random number generators for rfid tags (continued)
Reference [9] [10] [11] [12] [13] [14] [15] [16] [17] Implemental in embedded processors Not fully No No Yes, PSOC No Yes, Xilinx Vertex II Yes, MSP430 No Yes, any FPGA. But consumes huge amount of hardware No No Yes, MSP430, PSOC Implemented on Si No Partly Partly No need Partly No need No need No No Pulsating Power No No No Partly No Yes No No No No No Yes
[19] No [20] Partly This No need work In the next section the proposed circuit of this paper is discussed.
77
PROPOSED CIRCUIT
The proposed circuit configuration is based on a Schmitt Trigger circuit [33] as shown in Fig. 1. Schmitt trigger is a special configuration of operational amplifier where positive feedback is used. When the input signal applied at negative input exceeds any of the voltage limits namely upper trigger point or the lower trigger point, the output gets saturated to negative or the positive saturation voltage respectively.
Question that remains is: what will be the state of the output in absence of input signal i.e. when the input voltage does not exceed any of the trigger points? Suppose the supply voltage of the operational amplifier is switched on. The output will saturate to either the positive or the negative value depending on the polarity of the difference voltage at the inputs at the time of supply switch on. It will remain to this saturated value as the input voltage does not exceed the trigger point. Instead of constant supply we can apply clock and inverted clock at the positive and negative supply terminals of the operational amplifier respectively as shown in Figure 1. The polarity of the output will be decided by the polarity of the differential input voltage at the beginning of each pulse pair. This input voltage can be given as:
Vin = Vtp Vtn
(1)
Where, Vtp and Vtn are the random thermal noise voltage of the resistor or Johnson noise at the non-inverting (marked as + in Figure 1) and inverting node (marked as in
78
Figure 1) respectively. Since the polarity of the output is dependent only on the difference of two thermal noise voltages or Johnson noise voltages it is truly random. To satisfy this condition the output voltage Vout should become zero at the end of the offstate of the clock cycle. In the beginning of the on-state of the clock cycle there should not be any residual voltage Vor from the previous on-state of the clock cycle. If there is any Vor then its polarity will decide the polarity of Vin as well as Vout. In this case, the output will be of same signal level a string of all 1s or all 0s. For a fast clock there will be Vor. For a fast decay of the output at the off-state of the clock many circuit enhancement has been thought of. One of them is connection of an nmos / nFET with slightly negative threshold voltage e.g. -0.1 volt in between output and ground. The gate of the nFET should be connected to clk . In the off-state of the clock, gate voltage is 0 and the nFET should conduct. In the on-state, the gate voltage is negative and below threshold of the nFET so the nFET remains off. The simple circuit proposed here fulfils the requirement of an RNG for an RFID tag. These requirements are listed in Table I and discussed in Introduction section. The following gives the properties of the Proposed Circuit (PC) those make it suitable for an RFID tag.
I. Robust to Thermal Attacks:

Output bit in the PC depends upon the polarity of the input thermal voltage. Since variation in temperature does not change the polarity of the input the RNG is robust to thermal attacks. PC uses only an op-amp and resistors. These components work for a wide temperature range. For example, LM741, the op-amp used here, has an operating temperature range of -55 0C to 125 0C. If implemented on MSP430 microcontroller, during thermal attacks if the temperature goes beyond this range the in-built temperature sensor can be used to switch it off.
II. Robust to Power Attacks:

PC uses a clock pair instead of constant supplies. If the clock pair amplitude is reduced the circuit will still remain functional.
III. Lightweight:
PC output gives random bits that pass the NIST test. No further randomization is
79
necessary. The simple circuit is very lightweight consisting of only one operational amplifier.
IV. No Seed Value:

PC is a true random number generator and does not need any seed value.
V. Intermittent Operation:
PC does not need any resolution time to get unpredictable data. Whenever clock pair is applied at the supply terminals of the operational amplifier random bits are produced.
VI. Qualify NIST Test Suite:

The tests suitable for small volume of data are done. All the tests are passed. From NIST test qualification point of view it can be said that, the RNG is unpredictable for this small volume of data.
VII. Part of an Embedded System:

Since PC consists of only one operational amplifier it can be implemented easily in MSP430 from Texas Instruments or PSOC from Cypress Semiconductors.
VIII. Pulsating Voltage:

PC does not need any constant power supply instead it functions with a clock pair as shown in Figure 1.
RESULTS
To study the behavior of the operational amplifier IC741 with a clock pair applied at the supply terminals simulation is done. The output voltage as given in Fig. 2 is simulated in TINA TI, a tool developed and supported by Texas Instruments. The clocks given as clk and clk are applied at negative and positive supply terminal of the operational amplifier respectively. In this simulator thermal noise voltage could not be applied at input. Instead a faster clock is applied at the inverting node marked as - in Fig. 1. It can be observed that, the output voltage assumes -3 volts (or +3 volts) if input clock is +200 mV (or -200 mV) at the beginning of the on-state of the clocks. The output bitstream is in polar RZ format with the advantage of no dc component [34].
80
The circuit given in Figure 1 has been implemented on a bread-board. 289 bits have been collected. Some of the tests in NIST require 106 bits. Automatic data acquisition set-up is not ready at this moment. So such an amount of data could not be produced. Only those tests with recommended data size less than 289 are carried out. Lempel Ziv test has not been done as it was deleted from the test suite in the latest version 800-22b. The programs necessary for all the tests were written in MATLAB. The programs were tested with standard data that give predictable p-values. The results for the standard data are listed in Table IV. Table III shows the results for measured data. The pvalues show that all the tests were passed. So the proposed RNG is definitely unpredictable for 289 data. For higher volume of data it is quite likely that it shall remain unpredictable.
81
Test
Table 3 NIST 800-22b test results for measured data Input size Recommended p value* Input Size Frequency Sample size, n=289 n>=100 0.3776 (Monobit) Test Sample size n=122 1.0000 Frequency within a The length of each M>20, M>0.01n, block block, M=96 . N<100, n100 0.4821 The no. of blocks, N =3. Total sample size, n= MN= 288. Run Sample size, n=289 n100 0.401573 Longest Run Sample size, n=128. n M Set I 0.6889 Block length, M=8 Set II 128 8 0.9732 6272 128 750000 100000 Binary Matrix Rank No. of rows in each 0.162297 matrix, M=2 N>= 38 No. of columns in each matrix, Q=2 No. of matrices, N=n/{MQ}=72 Total sample size, n= 288 Non-Overlapping No. of blocks, N=2, N100 All p_values Template Matching No. of data in each 0.148207 block, M=144, Template length, m=6 Serial (m=2) Sample size, n=289 m<log2n - 2 p value 1 = 0.888179, Template size, m=2 p value 2 =0.842701. Serial (m=3) Approximate Entropy Cusum forward Cusum reverse Sample size, n=289 Template size, m=3 Sample size, n=289 Template size, m=3 Sample size, n=289 Sample size, n=289 m<log2n - 2 m<log2n - 2 n100 n100 p value 1 = 0.162805, p value 2 = 0.084058. p value= 0.453542 p value=1.000 p value=1.000
82
Test Frequency Monobit Frequency within a block Run
Table 4 NIST 800-22b test results for standard data p value for data pattern All 0 All 1 8.2120e-65 8.2120e-65 0.0000 No need of run test as monobit freq test fails |pai-0.5|=0.500000 >= tau=0.117647 Set I: 1.5129X10-32 Set II: 1.5129X10-32 0.0000 No need of run test as monobit freq test fails |pai-0.5|=0.500000 >= tau=0.117647 Set I: 4.85445X10-41 Set II: 4.85445X10-41 3.2371X10-28 p value = 0.000 for template 111111111 p value = 0.145254 fot other templates
1010-0.9531 1.0000 8.15516e-65
Longest Run
Set I: 1.5129X10-32 Set II: 1.5129X10-32 3.2371X10-28 p value = 0.000 for templates: 010101010 101010101 p value = 0.145254 for other templates p value 1 = 0.000, p value 2 = 0.000 p value 1 = 0,000, p value 2 = 0.000 0.000 1.000 1.000
Binary Matrix Rank NonOverlapping Template Matching
0.0000 p value=0.000 for template 000000000 p value = 0.145254 for other templates
Serial (m=2)
p value 1 = 0,000, p value 2 = 0.000 p value 1 = 0,000, p value 2 = 0.000 0.000 -1.000 -1.000
p value 1 = 0.000, p value 2 = 0.000 p value 1 = 0,000, p value 2 = 0.000 0.000 -1.000 -1.000
Serial (m =3)
Approximate Entropy Cusum forward Cusum reverse
CONCLUSION
A random number generator suitable for RFID tags is proposed. The simple circuit consists of an op-amp in the Schmitt trigger configuration. In-place of stable power supplies to the op-amp terminals, clk and clk are applied. No signal is applied at
83
the input instead the thermal noise voltage of the resistors at the input is allowed to saturate and give the output as positive or negative saturation voltage. The circuit output is simulated with the help of TINA TI. The circuit with a 741 op-amp is developed on a bread-board. Measured output passes the NIST test. The simple circuit can be implemented on popular embedded processors for RFID tags e.g. MSP430 or WISP. Design effort can be made to achieve a low power high speed op-amp suitable for this purpose.
REFERENCES
1. A. Agarwal and M. Mitra (2006), RFID: Promises and Problems, Techonline. Available: http://www.techonline.com, Accessed on 12th Nov., 2009. 2. R. Das (2007), RFID Forecasts, Players & Opportunities 2007-2017, ED Online and IDTechEx.Available http://www.elecdesign.com/Articles/Index.cfm?ArticleID=14840&pg=3 2007_2017_00000521.asp, Accessed on 12th Nov., 2009. 3. A. Juels (2006), RFID Security and Privacy: A Research Survey, An invited paper, IEEE Journal on Selected Areas in Communications, vol. 24 no. 2, pp. 381-394. 4. S. Garfinkel, A. Juels, and R. Pappu (2005), RFID Privacy: An Overview of Problems and Proposed solutions, IEEE Security and Privacy, vol. 3 no. 3, pp. 34-43. 5. W. Stallings (2003), Cryptography and Network Security: Principles and Practices, Pearson Education, India. 6. D. R. Stinson (2002), Cryptography Theory and Practice, K. H. Rosen, Ed. CRC, New York,. 7. S. Yeo and J. Kwak (2007), Privacy Enhanced Authentication Protocol for RFID Tag System Security, IJCSNS, International Journal of Computer Science and Network Security, vol. 7 no. 9, pp. 1-6. 8. M. Mitra (2008), Privacy for RFID Systems to Prevent Tracking and Cloning, IJCSNS, International Journal of Computer Science and Network Security, IJCSNS, vol. 8 no.1, pp. 1 5. Digital Object Identifier 10.1109/MPOT.2007.913680. and
http://www.idtechex.com/research/articles/rfid_forecasts_players_and_opportunities_
84
S. Ergun, and S. Ozoguz (2010), Truly Random Number Generators Based on Nonautonomous Continuous-time Chaos, International Journal of Circuit Theory and Applications, vol. 38, pp. 1-24, Wiley InterScience. 10. Y. Yamanashi, N. Yoshikawa (2009), Superconductive Random Number Generator Using Thermal Noises in SFQ Circuits, IEEE Trans. Applied Superconductivity, vol. 19, no. 3, part 1, pp. 630 633, Digital Object Identifier
10.1109/TASC.2009.2019294 11. C. Tokunaga, D. Blaauw, and T. Mudge (2008), True Random Number Generator with a Metastability-Based Quality Control, IEEE Journal of Solid-State Circuits, vol. 43, no. 1, pp. 78 85. 12. M. Drutarovsky, and P. Galajda (2007), A Robust Chaos-Based True Random Number Generator Embedded in Reconfigurable Switched-Capacitor Hardware, Radioengineering Journal, vol. 16, no. 3, pp. 120 127. 13. J. Holleman, B. Otis, S. Bridges, A. Mitros (2007), C. Diorio; Proc. 32nd European Solid-State Circuits Conference, 2006. ESSCIRC 2006, pp. 134 137, Digital Object Identifier 10.1109/ESSCIR.2006.307549. 14. S. H. M. Kwok, and E. Y. Lam (2006), FPGA-based High-speed True Random Number Generator for Cryptographic Applications, in Proc. 2006 IEEE Region 10
Conference, TENCON 2006, 2006, pp. 1 4, Digital Object Identifier
10.1109/TENCON.2006.344013. 15. L. Westlund (2006), Random Number Generation using the MSP430, Application Report, Texas Instruments. Available: http://focus.ti.com/lit/an/slaa338/slaa338.pdf Accessed on 1st July 2010 16. T. Zhou, Z. Zhou, M. Yu, and Y. Ye (2006), Design of a Low Power High Entropy Chaos-Based Truly Random Number Generator, IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2006, pp.1955 1958. 17. D. Schellekens, B. Preneel, and I. Verbauwhede (2006), FPGA Vendor Agnostic True Random Number Generator, IEEE International Conference on Field Programmable Logic and Applications, pp.1 6, Digital Object Identifier 10.1109/FPL.2006.311206.
85
18.
C. Liu and J. McNeill (2004), A Digital-PLL-Based True Random Number Generator, IEEE International Symposium on Circuits and Systems 2004, ISCAS (1), pp. 773 - 776, Vancouver, BC, Canada - Volume 1.
19.
S. Yasuda, H. Satake, T. Tanamoto, R. Ohba, K. Uchida, and S. Fujita (2004), Physical Random Number Generator based on MOS Structure after Soft Breakdown, IEEE Journal of Solid-State Circuits, vol. 39 no. 8, pp. 1375 1377. Digital Object Identifier 10.1109/JSSC.2004.831480
20.
M. Bucci, L. Germani, R. Luzzi, P. Tommasino, A. Trifiletti, and M. Varanonuovo (2003), A High-Speed IC Random-Number Source for SmartCard Microcontrollers, IEEE Transactions on Circuits and Systems-I: Fundamental Theory and Applications, vol. 50 no. 11, pp. 1373-1380.
21.
I. M. Bland, G. M. Megson (1996), Systolic Random Number Generation for Genetic Algorithms, Electronics Letters, vol. 32 no. 12, pp. 1069 1070.
22.
P. J. Pacini, and B. Kosko (1995), Adaptive Fuzzy Frequency Hopper, IEEE Transactions on Communications, vol. 43 no. 6, pp. 2111 2117.
23.
M. J. Bellido, A. J. Acosta, M. Valencia, A. Barriga; J. L. Huertas (1992), Simple Binary Random Number Generator, Electronics Letters, vol. 28 no. 7, pp. 617 618.
24. B. Jun and P. Kocher (1999), A white paper on The INTEL Random Number Generator. Available http://www.cryptography.com/public/pdf/IntelRNG.pdf
Accessed on 19th July 2010. 25. G. M. Bernstein, and M. A. Lieberman (1990), Secure Random Number Generation using Chaotic Circuits, IEEE Transactions on Circuits and Systems, vol. 37 no. 9, pp. 1157 1164. 26. A. J.-Khalili, and D. M. Al-Khalili (1990), A Controlled Probability Random Pulse Generator Suitable for VLSI Implementation, IEEE Transactions on Instrumentation and Measurement, vol. 39 no. 1, pp. 168 174. 27. J. L. Perry, R. W. Schafer, and L. R. Rabiner (1972), A Digital Hardware Realization of a Random Number Generator, IEEE Transactions on Audio and Electroacoustics, vol. AU-20 no. 4. 28. Z. Gutterman, B. Pinkas, and T. Reinman (2006), Analysis of the Linux Random Number Generator, Proc. 2006 IEEE Symposium on Security and Privacy (S&P06). 86
29.
K. Nohl and H. Plotz (2008), 24C3 Mifare crypto1 RFID Completely Broken, Posted by E. Phillips, Wireless hacks. Available
http://www.hackaday.com/2008/01/01/24c3-mifarecrypto1-rfid-completely-broken/ 30. D. E. Knuth (1981), The Art of Computer Programming, vol. 2, Semi numerical Algorithms. Addison-Wesley, Reading, MA. 31. A. Rukhin, J Soto, J Nechvatal, M Smid, Elaine Barker, Stefan Leigh, M Levenson, M Vangel, D Banks, A Heckert, J Dray, and S Vo (2001), A statistical test suite for random and pseudorandom number generators for cryptographic applications, NIST Special Publication 800-22. Available csrc.nist.gov/RNG/SP80022b.pdf. http://csrc.nist.gov/publications/nistpubs/800-22-rev1/SP800-22rev1.pdf.
Accessed on 12th Nov. 2009. 32. H. Chae, D. J. Yeager, J. R. Smith, and K. Fu (2007), Maximalist Cryptography and Computation on the WISP UHF RFID Tag,. Conference on RFID Security. 33. D. A. Bell (2007), IC Operational Amplifiers and Basic Op-Amp Circuits, in Electronic Devices and Circuits, pp. 493 497, Prentice Hall, India,. 34. S. Haykin (1988), Digital Communications, pp. 234 242, Wiley India, New Delhi.
87

A Random Number Generator For Rfid Tags

Caricato da

Informazioni sul documento

Descrizione originale:

Titolo originale

Copyright

Formati disponibili

Condividi questo documento

Condividi o incorpora il documento

Opzioni di condivisione

Hai trovato utile questo documento?

Questo contenuto è inappropriato?

Copyright:

Formati disponibili

A Random Number Generator For Rfid Tags

Caricato da

Copyright:

Formati disponibili

International Journal of of Electronics and Communication International JournalElectronics and Communication Engineering & Technology (IJECET), ISSN 0976

A RANDOM NUMBER GENERATOR FOR RFID TAGS

Si Chip Implementation: If embedded implementation is not feasible a fully tested

Table 1 suitability of proposed random number generators for rfid tags

[11] [12] [13]

No (T) Not known (P) No

7 out of 17* No result 15 out of 17

13 out of 17 Not done

Chaos due to Bernoulli shift and further randomization Random jitter in a

(T) Yes (P) No

number of ring oscillators and further randomization

Amplification of thermal noise voltage of a resistor and further randomization

(T) Not known (P) No

Saturation of thermal noise voltage

I. Robust to Thermal Attacks:

II. Robust to Power Attacks:

IV. No Seed Value:

VI. Qualify NIST Test Suite:

VII. Part of an Embedded System:

VIII. Pulsating Voltage:

Test Frequency Monobit Frequency within a block Run

1010-0.9531 1.0000 8.15516e-65

Binary Matrix Rank NonOverlapping Template Matching

Approximate Entropy Cusum forward Cusum reverse

Potrebbero piacerti anche