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LIST OF EXPERIMENT

1. 2. 3. 4. 5. 6. 7. 8.

To study Half-wave and Full- wave Rectifier. To study power supply filters To study diode as a Clipper and Clamper To study Zener Diode as a Voltage Regulator. To study CE amplifier for voltage gain To study of CC configuration as a buffer. To study of 3_terminal IC Regulator. To study of drain characteristics of FET in common sources configuration. To study of Half wave Doubler

9.

10. To study Full wave Voltage Doubler

EXPERIMENT NO 1(a)
AIM
To construct a half wave rectifier and verify the ripple factor

REQUIREMENT
Diode IN4007 (1 no), transformer, CRO, Multimeter

THEORY
A diode is a unidirectional conducting device. It conducts only when its anode is at a higher voltage with respect to its cathode. In a half wave rectifier circuit, during positive half cycle of the input, the diode gets forward biased and it conducts. Current flows through the load resistor R. and the voltage is developed across it. During the negative half cycle of the input, the diode gets reverse biased. Now no current (except the leakage current which is small) flows. The voltage across the load resistance during this period of input cycle is zero. Thus a pure signal is converted into a unidirectional signal. it can be shown that Vdc=Vm/ Where Vdc is the output dc voltage and Vm is the peck ac voltage at the input of the rectifier circuit, also we can show that the RF=AC voltage at the output /DC voltage at the output

CIRCUIT DIAGRAM
D1
1 2

TX1

220 Vac

I1 1k

R1

HALF - WAVE RECTIFIER

PROCEDURE
1. Connect the circuit as shown in figure. 2. Energize the rectifier with the AC main. 3. Connect the output of the rectifier to the CRO and observe the voltage wave shape at the input & output of the rectifier to the CRO. Compare the two wave shapes. 4. Using Multimeter measure the ac voltage at the secondary of the transformer. Also measure ac and dc voltage at the output points. 5 Using these values, calculate the ripple factor.
Title <Title> Size A Date: Document Number <Doc> Saturday , February 18, 2006 Sheet 1 of 1 Rev <Rev Code>

OBSERVATION TABLE
QUANTITY THEORETICAL VALE PRACTICAL VALUE

RESULT
1. The wave shape at the input and output are observed on CRO and are plotted. 2. Ripple factor is calculated.

EXPERIMENT NO 1(b)
AIM
To construct a bridge rectifier and verify the ripple factor

REQUIREMENT
Diode (4 no) IN4007, Transformer, CRO, and Multimeter

THEORY
In a bridge rectifier, when the input voltage is positive at point a (as shown in fig) Diodes D1 and D3 conduct .The current passes through the load resistor R. During the other half of the input signal, the point is a negative with respect to the point B .the Diode D2 and D4 conducts. The current passes through the load resistor in the same direction as during the positive half cycle. Dc voltage is developed across the load .it can be proved that the output DC voltage is given by Vdc=2 Vm / Where Vm is the peak ac voltage at the input of the rectifier. Also we can show that the R F =0.482

CIRCUIT DIAGRAM

IAMPL = 220V
I1

TX1

D4
-

~ +

D1

R1 1k

FULL WAVE BRIDGE RECTIFIER CIRCUIT

PROCEDURE
1. Connect the circuit as shown in figure. 2. Energize the rectifier with the AC main. 3. Connect the output of the rectifier to the CRO and observe the voltage wave shape at the input & output of the rectifier to the CRO. Compare the two wave shapes. 4. Using Multimeter measure the ac voltage at the secondary of the transformer. Also measure ac and dc voltage at the output points, Title <Title> 5. Using these values, calculate the ripple factor Size Document Number
A Date: <Doc> Saturday , February 18, 2006

OUTPUT

D3

D2

Sheet

OBSERVATION TABLE
QUANTITY 1.Output DC voltage 2. Ripple factor THEORETICAL VALUE 2Vm/ 0.482 PRACTICAL VALUE

Vac/Vdc =

RESULT
1. The wave shape at the input and output are observed on CRO and are plotted 2. Ripple factor is calculated.

QUESTIONS
1. For a half wave rectifier if Vi=5 sin wt is applied. Find out a) RMS voltage and current. b) Avg voltage and current. c) Ripple factor and form factor.?

2. Explain the use or necessary of the ripple and form factor on electronic ckt.?

3. Sketch and explain the switching characteristics of diode if i/p signal Vi = V, 0<t <t 1 -V, t>t1 ?

4. If Vi = Vm sint. Draw the waveform of i/p voltage and the circuit current.?

5 Draw the circuit diagram of full wave rectifier using bridge rectifier circuit and
using center top transformer and find out. a) RMS voltage and current. b) Avg, voltage and current c) Form factor and ripple factor. d) Compare the ripple frequency of the above ckts.?

EXPERIMENT NO. 2
AIM
Different filter circuits

REQUIREMENT
Rectifier circuit with different filters, a CRO, and electronic multimeter

THEORY
The output of a half-wave or full-wave rectifier contains an appreciable amount of ac voltage in addition to dc voltage. But, what we desire is pure dc without any ac voltage in it. The ac variations can be filtered out or smoothed out from the rectified voltage. This is done by filter circuits. In a shut capacitor filter, we put a high-value capacitor in shut with the load. The capacitor offers a low impedance path to the ac components of current. Most of the ac current passed through the shunt capacitor. All the dc current passes though the load resistor. The capacitor tries to maintain the output voltage constant at V m. This is shown in Fig. .. for half-wave rectifier. In a series inductor filter, an inductor is used in series with the load. The inductor offers high impedance to ac variations of current and low impedance to dc. As a result, the output across the load has very low ac content. The output becomes a much better dc. A filter utilizes the filtering properties of both the inductor and capacitor. It is uses two capacitors (in shunt) and one inductor (in series). With this type of filter, the rectified output becomes almost free from ac.

CIRCUIT DIAGRAM
D1 L1 DIODE 220 V ac
0Vdc TX1 V1 1 10uH 2

C1 1n

C2 1n

1k

R1

D2

RECTIFIER CIRCUIT

PROCEDURE
1. Trace the given rectifier circuit with different filter components. Identify every component in the circuit. Note down their values. Identify the switches S 1, S2, S3 and S4. 2. With switch S1 on, diode D2 is in the circuit. It behaves as a full-wave rectifier. When switch S1 is open, it becomes a half-wave rectifier. By closing switches S3 and S4, the capacitors C1 and C2 respectively can be brought into the circuit. If the switch S2 is closed, the inductor L becomes out of circuit (the whole of the current passes through the closed switch S2). When S2 is open, the inductor comes in series with the load resistor RL. 3. Keep switch S1 open. The Circuit becomes a half-wave rectifier. Open the switches S3 and S4, and close the switch S2. Observe output voltage waveshape on CRO and plot it. Measure the output voltages (ac as well as dc). To obtain a shunt capacitor filter, switch on S3. Observe and plot output-voltage waveshape. Again measure output ac and dc voltages. To have large values of shunt capacitor, switch on S4 also, (capacitors C1 and C2 are in parallel). Again observe the output-voltage waveshape. Measure ac and dc voltages. 4. Switch on S1 (to make it full-wave rectifier) and repeat the above. 5. Switch off S1. Also switch off S2, S3 and S4. It becomes a half-wave rectifier with series inductor filter. Observe and plot the output-voltage waveshape. Measure output dc and ac voltages. 6. Switch on S1 and repeat the above. 7. Switch off S1 and switch on S3 and S4 (switch S2 is in off position). It becomes a half-wave rectifier with filter. Observe and plot the output-voltage waveshape. Measure output voltage (ac as sell as dc). 8. Switch on S1 and repeat the above. 9. Measure the ac voltage between the center-tap and one of the end-terminals of the secondary of the transformer. From this, calculate the peak value V m of the input voltage. Now, keeping the switch S1 open, make a shunt capacitor filter by switching on S3. (Switch S4 is open and switch S2 is closed.) Measure the output dc voltage. Compare it with V m. Now switch on S4. Again measure the output dc voltage. It becomes nearer to Vm. 10. Switch on S1 and repeat the above.

OBSERVATIONS
1. Filters Rectifier Half-wave Filter Type Vac (volts) 1. No filter 2. Shunt capacitor filter 3. series inductor filter 4. filter 1. 2. 3. 4. No filter Shunt capacitor filter series inductor filter filter Vdc (volts)

Full-wave

2. Input ac voltage, Vm = ___________V(rms) Peak value, Vm = _________x 2 = ___________V Output dc voltage when shunt capacitor filter is used in half-wave rectifier circuit = ___________V Output dc voltage when shunt capacitor filter is used in full wave rectifier circuit = ___________V

RESULTS
1. 2. 3. 4. With the use of shunt filter in half-wave and full-wave rectifier circuits, ripple voltage are very much reduced. When a filter is used, output of half-wave and full-wave rectifier is almost a pure dc. The wave shakes observed on the CRO are plotted. Connect the ckt. Diagram as shown in figure (HWR) & (FWR).

QUESTIONS
1 Why voltage regulation of -filter is inferior to that of LC filter?

What is the primary functon of filter?

What happen if value of capacitance is increased in the filter ?

Which filter circuit commonly used.?

10

EXPERIMENT NO 3(a)
AIM
To construct & observe a clipping circuit using Diode.

REQUIREMENT
Diode (1 no) resistor, power supply, function generator, CRO

THEORY
The diode network has the ability to clip of the input signal without distorting the remaining part of the alternating waveform. There are two general categories series and parallel. The direction of the diode suggests that the signal V must be positive to turn it on .the dc supply.

CIRCUIT DIAGRAM
R1
2
1k

D1
1
V1 1Vac 0Vdc 0Vdc 1k

R3

NEGATIVE CLIPPER

R2
1k

D2
V4 1Vac 0Vdc 0Vdc

1
V2

1k

R4

POSITIVE CLIPPER

11

PROCEDURE
1. Connect the circuit as shown in figure. 2 Give sine wave input signal using function generator at the input terminal 2. Set dc biasing voltage at some reference voltage. 3. Connect CRO at the output terminals.

RESULT
Using the biased clipping circuit for the given i/p sine wave, we get the desired o/p waveform.

12

EXPERIMENT NO 3(b) AIM


To construct a clamping circuit of a sine wave using diode

REQUIREMENT
Diode (1 no), resistor, Power supply, Function generator, CRO

THEORY
The diode network has the ability to clamp of the input signal without distorting the remaining part of the alternating waveform. There are two general categories series and parallel. The direction for the diode suggests that the signal V 1 must be positive to turn it on. The dc supply further require that the voltage V 1 be greater than V volt to turn the diode on, The ve region of the input signal is pressuring the diode into the off state.

CIRCUIT DIAGRAM
C1
1n V1

220V ac

D2

POSITIVE CLAMPING

C2 1n

1k

R1

V2

220 Vac

NEGATIVE CLAMPING
Title <Title> Size A Date: Document Number <Doc> Saturday , February 18, 2006 Sheet 1

D1

1k

R2

13

PROCEDURE
1. 2. 3. 4. Connect the circuit as shown in figure. Give sine wave input signal using function generator or at the input terminal Set dc biasing voltage at some reference voltage. Connect CRO at the output terminal.

RESULT
Using the biased clamping circuit for the give i/p sine wave we see the desired clamped o/p waveform.

QUESTIONS
1 What are type of clippers ?

What is the difference between Series and Parallel clipper ?

What is the difference Between biased and unbiased clipper .?

What are the basic component of a Clamper circuit ?

What are the type of the Clampers ?

14

EXPERIMENT NO. 4
AIM
To study Zener diode as a voltage regulator

REQUIREMENT
Breadboard, Zener diode, Resistor (1 k), Regulated power supply

THEORY
A zener diode is p-n junction diode specially made to work in the breakdown region; it is used in voltage regulation.A p-n junction diode does not conduct when reverse biased. But if the reverse bias is increased at a particular voltage it starts conducting heavily. This voltage is called breakdown voltage. This current through the diode can be permanently damage it. To avoid high current, we connect a resistor in series with it. Once the diode starts conducting .it maintain almost constant voltage across its terminal whatever may be the current through it. i e. it has very low dynamic resistance.

CIRCUIT DIAGRAM
R1
VOLTAGE SOURCE
1k

D1 0Vdc

DIODE ZENER13

1Vac 0Vdc

V1

ZENER DIODE as VOLTAGE REGULATOR

PROCEDURE
1. 2. 3. 4. Note the zener voltage of the zener diode. Make connection as shown in figure. Change input voltage in small steps with the help of power supply. Note corresponding voltage with the help of Multimeter.

Title <Title> Size Document Number

15

OBSERVATION TABLE
S.No Vi (volts) Vo (volts)

RESULT:
Observed that output voltage is approximately equal to zener diode voltage whatever may be the input voltage applied.

QUESTIONS
1. What is the zener diode & how does it regulate the voltage?

2. Why current limiting resistance necessary for a zener diode?

3. What is zener breakdown?

4. How does the Zener diode protect the meter?

5. What is zener current?

16

EXPERIMENT. 5
AIM
Transistor characteristics in common-emitter configuration

REQUIREMENT
Experimental board, transistor (or IC) power supply, one milliammeter, (0-50 mA), one microammeter (0-50 A), two electronic multimeters

THEORY
In CE configuration, we make the emitter terminal common to the input and output. Whether the transistor is connected CB or CE, the E-B junction is forward biased and the C-B junction is reverse biased. For CE configuration, we defined the important parameters as follows: u EB Input dynamic resistance, ri V const. iB CE vCE Output ac resistance, ro I const. iC B IC DC current gain, dc IB iC AC current gain, V const. iB CE

1. 2. 3. 4.

CIRCUIT DIAGRAM
mA (0- 50 mA) R3 VBB 2V
1k 1k TRANSISTOR

1k

R1

VCC 10 V

R2

(0 -10V)

(0 -10V)

Common - Emitter CHARACTERISTICS

17

PROCEDURE
1. Note down the type number of the transistor used in the experimental board. Find the important specifications of the transistor from the data book. Identify the terminals of the transistor and trace the circuit. Make the circuit connections as shown in Fig. Use meters with proper range. For input characteristic, first fix the voltage VCE, say at 9 V. Vary the voltage vBE slowly, in steps. Note the value of current is at each step. For output characteristics, first open the input circuit. Very the collector voltage vCE in steps and note the collector current. This current is the reverse saturation current ICEO, and magnitude will be small. Now close the input circuit and fix the base current I B at, say 10 A. For this you can use the potentiometer R1. Vary the voltage vCE with the help of potentiometer R2 in steps. Note current ic for each step. Repeat the process for other values of IB (say, 20 A, 30 A, 40 A, etc.). Be careful not to go beyond the maximum ratings of the transistor. Plot the input and output characteristics by using the readings taken above. Select a suitable operating point in the linear portion of the characteristics. Determine the slope of the input characteristic curve at this operating point. This gives the input dynamic resistance. Similarly, using the definition given above (in brief theory), calculate the output ac resistance ro, dc and ac beta.

2. 3. 4.

5. 6.

OBSERVATIONS
1. 2. Type number of the transistor =_____________ information form the data book : (a) Maximum collector current rating =_______________mA (b) Maximum collector voltage rating =_______________V (c) Maximum collector dissipation power rating =_______________W

3.

Input characteristics: VCB = ______V S.No. vBE (in V) iB (in A) 1.

VCB = _______V vBE (in V) iB (in A)

2.

3.

18 4. Output characteristics: S.No. IB=0 IB=10 A vCE vCE vCE vCE (V) (mA) (V) (mA) 1.

IB=20 A vCE vCE (V) (mA)

IB=30 A vCE vCE (V) (mA)

2.

3.

CALCULATIONS
1. Input dynamic resistance, v ri BE VCE ___________ V ______ _______ k iB 2. Output ac resistance, vCE ro _______ ________ k I __________ mA IC B 3. DC current gain, IC dc IB

VCE

_________ V

______

_______

4. AC current gain, iC V iB CE

__________V

_______

________

RESULTS
1. 2. Input and output characteristics are plotted on the graph. The parameters of the transistor in CE mode are given below: Parameter 1. 2. 3. 4. ri ro
dc

Value determined _________ _________k _________ _________

19

QUESTIONS
1. Why is CE configuration most suited for an Amplifier?

2.

Which configuration is used for the application of Buffer?

3.

Which configuration is having highest voltage gain?

4.

Name some application of common Emitter Configuration.

5.

Out of NPN & PNP which is the most suited transistor configuration.

20

EXPERIMENT NO. 6
AIM
To study of CC as a buffer

REQUIREMENT
Resistances (3), Power supply, Transistor (1)

THEORY
In this circuit the emitter resistance is removed (or bypassed with a capacitor for a.c. signal), so that the collector is at signal ground. The output signal is tapped from the emitter of transistor. As we know that the base emitter voltage of a transistor remains roughly constant at around 0.6V. we dont except the emitter signal to exceed that at base and consequently this amplifier will not provide voltage gain. Because of its high input impedance and low output impedance properties, an emitter follower is capable of giving power to a connected to its output requiring much power at the input. It thus works as a buffer. The input signal is coupled to the base, and the output signal is taken from the emitter. This ckt. Is called an emitter follower because the output follows the input signal.

CIRCUIT DIAGRAM

R1 Q1
1k 0Vdc

V2

1k

R2

0Vdc

V1

CC

AMPLIFIER as BUFFER

Title <Title> Size A Document Number <Doc>

21

PROCEDURE
1. 2. 3. 4. Make the connections as shown in the ckt. Diagram. Apply the a.c. signal on the input terminal, by a function generator. Connect the CRO at the output. Compare the input signal with the output signal.

CONCLUSION
The input signal is same as the output signal.

QUESTIONS
Draw the small signal model for CC amplifier and derive the expression for 1. Voltage gain Av

2.

Current gain AI

3.

I/P Resistance Ri

4.

o/p Resistance Ro

5.

Give some application of CC configuration

22

EXPERIMENT NO. 7
AIM
Study of 3 terminal regulators

REQUIREMENT
One IC (7800), 2 capacitors, power supply, connecting wires

THEORY
It is three terminal positive, fixed voltage regulators. Input capacitor Ci is required to cancel inductive effect associated with long power distribution leads. Output capacitor improves the transient response. These devices require no adjustment have an output preset by the Manufacture to the industry standard voltage of 5v, 6v, 8v, 12v, 15v or 24v. There must be minimum of 2V between input and output. Such regulator are capable of output current in excess of 1.0 A. they have internal shortcircuit protection that limits the maximum current the circuit will pass, thermal shutdown and output transistor safe operating area protection.

CIRCUIT DIAGRAM
U1 1 VIN VOUT 2

L7809/TO3

INPUT

C1 1n

C2 1n

3- TERMINAL IC REGULATOR

Title <Title> Size A Date: Document Number <Doc> Saturday , February 18, 2006 Sheet 1

OUTPUT

23

PROCEDURE
1. Make the connection as shown in the circuit diagram. 2. Supply the input voltage Vi=2V. 3. See the output voltage Vo.

CONCLUSION
Regulated Voltage is obtained at the output.

QUESTIONS
1. What are the type of three terminal IC regulator .?

2.

What are 78XX series regulator?

3.

What are 79XX series regulator?

4.

What are the applications of 3 terminal IC regulator. ?

5.

Why is capacitor used at the input of 3 terminal IC regulator?

24

EXPERIMENT NO. 8
AIM
To study the characteristics of FET in commonsource configuration.

REQUIREMENT
Breadboard, transistor (BFW10), 0-20VDC Regulated power supply, millimeter (0-25ma), Multimeters.

CIRCUIT DIAGRAM
mA (0- 25 mA)

FET 10 V
V1 1k 1k

R1

VDD 10 V

R2

(0 -10V)

(0 -10V)

FET CHARACTERISTICS

PROCEDURE
1. Note the type number of FET given. See the specifications Identify its terminals. 2. Make the Circuit connection as shown in the Circuit Diagram. Use the Millimeter and electronics Voltmeter in suitable range. 3. First fix Vgs = 0V. Increase the drain voltage Vds in slow steps. Note the drain Current ID for each step. Change Vgs = -1V and repeat the above procedure. Thus take ready for 3 to 4 gate-voltage values.
Title Size A <Title> Document Number <Doc> Date: Saturday , February 18, 2006 Sheet

Rev <Rev Code> 1 of 1

Plot the drain characteristics (very graph between Id and Vds. DRAIN CURRENT ID (mA) S. No. VDS (Verbs) Voc = 0v Voc = 1v Voc = 2v Voc = 3v Voc = 4v

25

CALCULATIONS
A suitable operating point is selected say VDS = 8V, VGS : -3V. At this operating point parameters are calculated as below. 1. Drain dynamic resistance, rd 2. Mutual conductance, gm 3. Amplification factor,
ID VGS

V DS ID
V DS

VGS

3v

Cons tan t ms

V DS VGS

ID

mA

RESULT
1. The drain characteristics of the FET are plotted on the graph. 2. The parameters of FET determines from the drain characteristics are given below.

Parameter

Value determined

1. 2. 3.

Rd gm

QUESTIONS
1. How does a FET differ from a BJT.?

2. How does a p channel JFET differ from N channel JFET ?.

26 3. Why FET has a better thermal ability.?

4. Why field effect transistor are called unipolar transistor?.

5. Why the channel JFET is never completely closed at drain end.?

27

EXPERIMENT NO. 9
AIM
Study of Voltage Doublers

REQUIREMENT
(1) Connecting wires, capacitor (2), Diode (2), Power supply

THEORY
Voltage multiplier circuits are employed to obtain a relatively high peak voltage from a lower transformer or main peak voltage. A diode voltage doublers consists of two-peak rectifier and capacitor combination that produces a.d.c. voltage, which is double of the peak input voltage. The capacitor C1 gets charged to voltage Vp (neglecting the diode drops) with the polarity as shown, at the peak of the ve half cycle through the forward biased diode D1. During the +ve half cycle, diode D1 is reverse-biased and D2 is forward biased. The capacitor C2 sees the source and the capacitor C1 in series and tries to charge to a voltage 2Vp. The capacitor C2 discharges through the load resistor. If R1 is large enough the output voltage ideally equals 2Vp. As the output capacitor C2 is charged only once during each cycle, the ckt. Is called a half-wave double and the ripple frequency is 50Hz.

CIRCUIT DIAGRAM
C1
1n

D1 DIODE D2 C2
1n

D C
PROCEDURE

VOLTAGE DOUBLER

1. Make the connection as shown in the ckt. Diagram. 2. Supply the input voltage. 3. Measure the output voltage at the output terminal.

28

CONCLUSION
The output voltage is double the input voltage.

QUESTIONS
1 What are the application of the Multi vibrator circuit .?

What are disadvantage of Half wave Doubler.?

What is the PIV across each diode?

Why half wave doubler has poor regulation.?

What is the ripple frequency in Half Wave Doubler.?

29

EXPERIMENT NO. 10
AIM
To study full wave Doublers

REQUIREMENT
Diode (2), Capacitor (2), Power supply, Resistor (1).

THEORY
During the +ve half cycle, diode D1 is forward-biased and this capacitor C1 charges to the peak voltage with the polarity as shown and during +ve half cycle, diode D2 is forward-biased and the capacitor C2 changes to the peak voltage with the polarity as shown. The load resistance sees the capacitor C1 and C2 in series i.e. the voltage across the load resistance is 2Vp provides the load resistance is high. As one of the output capacitors is being changed during each half cycle, resulting in a ripple frequency of 100Hz, the ckt. Is called a full wave voltage doublers. The higher ripple frequency is advantageous as it is easier to filter. Moreover, the PIV rating of the diodes needs to be greater than Vp. The disadvantage of a full wave doubler is the lack of a common ground between input & output.

CIRCUIT DIAGRAM

D1
1 2

TX1 V1 220V 0Vdc

C1
1k

R1

C2
2 1

D2

VOLTAGE DOUBLER
PROCEDURE
1. Make the connections as shown in the ckt. Diagram. 2. Supply the input voltage at the input terminals. 3. Measure the output voltage at the output terminal.

30

CONCLUSION
The output voltage is doubled the input voltage.

QUESTIONS
1. What is the difference between full wave & half wave doubler?

2. What do you mean by full wave doubler?

3. What is the voltage drop across diode D1 & D2?

4. Specify the rating of the transformer used.

5. Sketch the waveform across the load of the circuit.

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