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Published in IET Power Electronics Received on 19th June 2009 Revised on 8th February 2010 doi: 10.1049/iet-pel.2009.0176

ISSN 1755-4535

Understanding the operation of a Z-source inverter for photovoltaic application with a design example
M. Hanif M. Basu K. Gaughan
School of Electrical Engineering Systems, Dublin Institute of Technology, Kevin Street, Dublin 8, Ireland E-mail: mbasu@dit.ie

Abstract: Traditional voltage source inverter (VSI) and current source inverter (CSI) technology has advanced to the new Z-source inverter (ZSI) with a built-in impedance network, with modication to the traditional pulse width modulated (PWM) signal. Modied PWM signal accommodates the shoot-through (ST) signal (which would destroy the traditional inverters) in order to buck or boost the DC input voltage from a value between zero and innity. The unique impedance network of passive elements, which gives a single-stage conversion, needs to be understood in detail in order to design a ZSI. The study compares traditional inverters against the ZSI and discusses the detailed operation modes involved. Circuit calculations, selfboost phenomenon, ST, inductor and capacitor design calculations, boost control methods and device selection procedures are discussed. Photovoltaic source (PV) being one of the most promising DC sources of the future, a design example involving PV and all the circuit calculations along with matching simulation results, are provided in this study.

Introduction

Photovoltaic technology currently being the most popular solar power technology gives rise to a reliable DC power generation source. Photovoltaic source (PV) cells that are usually made of semiconductor material have a non-linear I V characteristic and P V characteristic as shown in Fig. 1. These cells are connected in series and parallel to form a module, and several of these modules are combined to form a panel which nally forms an array of panels [1]. PV with this special characteristic behaves almost like a current source at the left side of the maximum power point (MPP) and the voltage oscillations on the left of MPP inuence the power. PV behaves as a voltage source towards the right side of the MPP and the current oscillations inuence the power as shown in Fig. 1 [2]. An inverter system is then necessary to feed this DC power into a grid or to an AC load. The inverter system can comprise of a DC AC converter, boosting circuit, maximum power point tracker (MPPT) circuit and ltering circuit linking the DC source to the load/grid. Different techniques and control methods use the maximum power of the PV panel at all times by utilising the MPPT which uses the maximum power transfer theory by keeping the impedance of both the inverter bridge and the load, very close to the internal resistance of the PV panel. The design and control of inverters also play a crucial part in maximising the power transfer and increasing the operating efciency and reliability of the total power conversion system. This paper comprehensively looks at the boosting and DC AC conversion section of the inverter system using the
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latest Z-source inverter (ZSI) bridge technology, as ZSI offers a simplied single-stage power conversion topology and an extra advantage because the shoot-through (ST) can no longer destroy the inverter. It eliminates most of the problems faced by the traditional voltage and current source inverters (VSI and CSI), and the exclusive impedance network makes it work in both buck and boost mode [2 8].

2 Inverter comparison (VSI/CSI and ZSI) by structure or topology

Traditional technology of pulse width modulated (PWM) VSI or CSI (Fig. 2) for PV power conversion from DC AC has advanced with the invention of ZSI. The ZSI uses a unique impedance circuit to couple the DC power source to the inverter bridge, thus overcoming the problems faced by traditional inverters. ZSI can be used to synthesise waveforms with voltages above as well as below the source voltage. Traditional VSI and CSI exhibit problems as follows: They operate in either boost mode (CSI) or buck mode (VSI), not in buck boost mode. Gate driver needs to be carefully designed so that electromagnetic interference induced misgating can be avoided, else may cause ST in a VSI or may cause an open inductor circuit in CSI, which can destroy the switches because of high current or voltage stresses. Dead time for VSI and overlap time for CSI can cause waveform distortion. The power circuit topology of VSI and CSI are not interchanged, that is VSI main circuit cannot be used for CSI or vice versa [3].
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The conventional inverter is always operating at a modulation index of 1 (Fig. 3a). The DC/DC boost plus PWM inverter boosts the DC voltage to 420 V (Fig. 3b). The ZSI (Fig. 3c) outputs the maximum obtainable voltage while keeping the switch voltage under 420 V [6, 7]. A three-phase motor is used as a model for the load and the same motor model is used to calculate the motor loss. Switching devices are selected for each inverter topology to calculate their losses [6, 7]. The required passive components are listed in Table 1. The components required in Table 1 are for a 50 kW inverter with input voltage ranging from 250 to 420 V DC source [6, 7]. Table 1 shows that smaller inductance and capacitance is necessary by the ZSI compared to DC/DC boosted PWM inverter, whereas the current rating for inductors and voltage rating for capacitors in both the inverters is the same. The efciency comparison for the three types of inverters is summarised in Table 2 [6] next, for a range of power ratings from 10 to 50 kW. Table 2 shows superior efciencies for ZSI over the range but efciencies deteriorate as the rating increases. Since the survey is about inverter conguration using a DC source (PV) which can also include fuel cell, and provide power at a similar rate at a particular operating point, the above comparisons can be taken into account for PV applications/DC AC inversions. In another study [8], with smaller rating (1750 W), the efciency comparison shows that ZSI is slightly less efcient because of its requirement of more storage elements even though it has one less switch. Tables 3 and 4 show their comparison. It is also noted that the efciency of ZSI drops with low loads and is much the same at higher loads in [8]. According to Table 2, the efciency of ZSI is the highest, with higher power rating; this could be an important factor for choosing the type of inverter for different systems in terms of power level. In an overall sense the ZSI can boost the input voltage by a practical factor 1.5 2, not sacricing the efciency, reducing cost and minimised component count [9]. This amount of boosting factor is good enough for grid connected PV inverter or to be utilised by standard grid connected AC loads (running at nominal utility voltage and frequency) and may not be very useful for other applications that require a higher voltage specially. A critical survey on ZSI performance in comparison to other standard inverter congurations used in PV applications (specially stand alone or utility integrated system) has been given and the following section will explain the details of the ZSI in terms of circuit

Fig. 1 Typical I V and P V characteristics with typical values for an array [2]

Some of the drawback and limitations can be eliminated by adding a DC/DC boost between the source and inverter bridge, but this reduces the power conversion efciency as it is a two-stage conguration (DC DC boost and DC AC). It has an additional switch that raises the system cost/ weight and size, also dead time is necessary which creates distortion in the output waveform [3, 4]. Performance analysis of a ZSI is the main aim of this survey paper. The Z-network of two small inductors and two small capacitors eliminates all the above-mentioned problems and it requires no extra switch. The network acts as a second-order lter to suppress voltage ripples more effectively than capacitor used in traditional PWM inverter [5], and the inrush current and harmonics in the current can be reduced via the inductor [5]. Moreover, the traditional PWM switching control can be used by adding the ST periods during zero states (for boosting the input voltage).

Efciency comparison

Efciency is one of the most important properties that are compared for any converter used for power conversion. The power electronic switches, passive components and techniques of PWM contribute to the overall efciency in a general power conditioning circuit. An efciency comparison is conducted by the Oak Ridge National Laboratory in [6] for the inverter congurations shown in Fig. 3, based on the following conditions for fuel cell input source:

Fig. 2 Inverter topology

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Table 2
Inverters 10 20 Showing comparisons of efciency [6] Power (kW) 30 40 50

conventional PWM inverter 0.968 0.968 0.968 0.966 0.964 DC/DC boost + PWM inverter 0.964 0.966 0.966 0.965 0.964 ZSI 0.973 0.973 0.973 0.971 0.969 Design parameters for buckboost + VSI and ZSI [8] 3.8 2 mH 2.62 A 3.9 mH 330 mF

Table 3

Design parameters of the boostbuck converter Dboost 0.453 Lac ma 0.591 DILB(max) fs 15 kHz LB a THD 4% Cd ILac 0.3 A Design parameters of the Z-source converter Dboost 0.227 Lac ma 0.591 DIL1(max) fs 15 KHz L1 b THD 4% C1 I Lac 0.3 A

3.8 2 mH 2.4 A 2.7 mH 340 mF

For operating point of VPV 300 V, VAC 230 V, PAC 1750 W. Four 330 mF/400 V, two in series, two in parallel. b Two 680 mF/350 V, in series.
a

Fig. 3 Three inverter system congurations for comparison [6, 7]

a System conguration using conventional PWM inverter b System conguration using DC/DC boost + PWM inverter c System conguration using the Z source inverter

Table 4

Inverter efciency comparison [8] BoostBuck Z-source

calculations, self-boost phenomenon, ST, L and & C design calculations, boost control methods and device selection.

Z source inverter

Comparison of converters 2 0.5LboostI a, J 2b 0.5CdcV , J Efciency

a

0.3046 56.99 94.32%

0.2864 70.57 93.26%

The ZSI has a unique impedance network with two split inductors and two capacitors in X-shape, as shown in Fig. 4a. The three-phase ZSI bridge has nine permissible switching states unlike the traditional VSI that has eight switching states. The ZSI has six active states when the DC voltage is impressed across the three-phase load, and two zero states when the load terminals are shorted through either the lower or upper three switching devices, respectively. The ninth state, the ST state occurs when the load terminals are shorted by both the upper and lower switching devices of any phase leg (this state is forbidden in the traditional inverters to avoid ST fault). This ST state sometimes also called the third zero state can be achieved by seven different ways: ST via any phase, combinations of any two-phase legs and all three-phase legs [3, 5].
Table 1
Required passive components [6, 7] Number of inductors Inductance, mH Average inductor current, A N/A 200 200

LB in boostbuck and 2L1 in Z-source converter Cd in boostbuck and 2C1 in Z-source converter I and V are maximum values from the low-frequency ripple

Since the ZSI uses the traditional eight states as in traditional inverters with an extra state, the traditional PWM (sine PWM and space vector PWM) techniques can be used with slight modication to the zero states. The ST states are inserted only into the zero states whereas the active states remain unchanged and hence the AC output voltage of the inverter remains similar to a traditional inverter. The ST states are limited by the zero states and may replace some or all of it depending on the modulation index, M. This ST zero state gives a unique buck boost feature to the inverter, which makes it distinct from a traditional VSI or CSI [5 21].

Inverter systems

Number of capacitors

Capacitance of the capacitors, mF

Capacitor rms Capacitor voltage ripple current, A rating, V

conventional PWM inverter DC/DC boosted PWM ZSI

0 1 2(1)

N/A 510 339

1 1 2

667 556 405

106 124 111

420 420 420

Note: Number of inductors needed is for the basic circuits in Fig. 3; extra inductors may be required in practical implementation for any of these inverters to reduce ripple and electromagnetic interference. 280 IET Power Electron., 2011, Vol. 4, Iss. 3, pp. 278 287 doi: 10.1049/iet-pel.2009.0176

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Fig. 4 Z-source inverter

a General conguration of a ZSI [5] b Equivalent circuits of ZSI (i) Non-ST mode (ii) ST mode [10]

The Z-network is responsible for boosting and also tracking the MPP. The ST duty cycle T0/T [10] can be increased or decreased depending on the change in power absorbed by the inverter from the DC source (P&O method). This process is identical to MPP tracking in the traditional VSI + boost topology. The duty cycle at MPP absorbs all the power from the PV panel hence matching the PV panel with the ZSI.

Although in this mode the DC source (PV) is separated from the inverter bridge by the diode (Vd . VPV, Vd 2VC) and voltage across the capacitors appears across inductors as shown in Fig. 5, hence charges the inductor. It is noted that the diode conducts in both modes 1 and 2 [non-shoot-through (non-ST)] whereas it is reversed biased during mode 3 (ST).

ZSI operation

ZSI circuit equations

Depending on the switching states of the inverter bridge, the ZSI can be classied into three operation modes as given below: Mode 1: Inverter bridge is operating in one of the six active states and the bridge can be seen as an equivalent current source as shown in Fig. 4b(i). During this mode the DC source voltage appears across the inductor and the capacitor. Capacitor is charged (stays charged at steady state) and energy ows to the load via the inductor. The inductor discharges in this mode. Mode 2: Inverter bridge is operating in one of the two zero states as the bridge short circuits the load through either the upper or lower three switching devices. During this mode the bridge can be viewed as an open-circuit (current source with zero current owing, shown in Fig. 4b(i)). Voltage of the DC source appears across the inductor and the capacitor, except that no current ows to the load, from the DC source. Mode 3: Inverter bridge is operating in one of the seven different ways of ST. The bridge is viewed as a short circuit from the DC link of the inverter as shown in Fig. 4b(ii). During this mode, no voltage appears across the load like in the zero state operation, the DC voltage of the capacitor is boosted to the required value according to the ST duty ratio. This ST interval (T0) is inserted into the zero states to boost the voltage whenever the PV panel is unable to provide the required voltage or during any voltage dips because of the changing insolation (irradiance) and temperature.
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Assuming inductors L1 and L2 and capacitors C1 and C2 have the same value (L1 L2 L and C1 C2 C ), respectively. We can write the voltage equations of ZSI as VL1 = VL2 = VL VC1 = VC2 = VC (1)

Fig. 5 Simulation plot of VL1 and VC1 against time

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During mode 3 (ST, T0 time interval) VL = VC Vd = 2VC VPN = 0 (ST) From (4) we have VC = T1 T T 1 (T0 /T) V VPV = 1 VPV = T1 T0 T T1 T0 1 (2T0 /T ) PV (10) 6.1 Alternate equations for ZSI

(2)

VPV is PV output voltage or input to the ZSI and VPN is the inverter bridge DC-link voltage (as shown in Fig. 4b). During modes 1 and 2 (non-ST, T1 time interval) VL = VC , Vd = VPV = VL + VC VL = VPV VC = VC VPN VPN = VC VL = 2VC VPV

From (8) we can derive T0 B 1 = T 2B therefore 1 T0 B + 1 = T 2B (11b) (11a)

(3)

During steady state, average voltage across VL1 0 over a switching period T VL = VC T0 + (VPV VC ) T1 = 0 VC T1 = VPV T1 T0 where T1 is the non-ST period and T0 is the ST period. Average DC-link voltage of the inverter bridge VPN =
T0 0 + T1 (2VC VPV ) T1 (2VC VPV ) T1 = = V T1 T0 PV T T

Substituting (8) and (11b) into (10) we can have capacitor voltage as (4) VC = 1 (T0 /T) B+1 V = B VPV 1 (2T0 /T ) PV 2B B+1 VPV = 2

(12)

Substituting (12) into (7) we can also have peak DC link at the inverter bridge during non-ST as 2VC 2B = V VPN = BVPV = B B+1 B+1 C (13)

From (4) VPN = T1 V = VC T1 T0 PV (5)

7
7.1

Z-network component design

Inductor design

Peak DC-link voltage during non-ST VPN = VC VL = 2VC VPV Substituting VC from (4) into (6) gives VPN = T V = BVPV T1 T0 PV (7) (6)

where B is the boosting factor B= T 1 1 = T1 T0 1 (2T0 /T ) (8)

During traditional operation mode (when no boost is involved) the input voltage appears across the capacitor and no voltage appears across the inductor (only a pure DC current ows through the inductors). During Z-source mode (boost is involved) the job of the inductor is to limit the current ripple during this boost mode. During ST, the inductor current increases linearly and the voltage across the inductor is same as voltage across the capacitor. During non-ST mode (traditional eight states) the inductor current decreases linearly and the voltage across the inductor is the difference between the PV input voltage and the capacitor voltage [11 20, 22, 23]. The average current through the inductor is IL = P VPV (14)

(T0 + T1 T ). The output peak phase voltage from the inverter can be expressed as M VPN MBVPV = VAC = 2 2 (9)

where M is the modulation index (M 1). By choosing the appropriate buck boost factor BB MB (0 to innity) the output voltage can be stepped up or down. Capacitor Voltage can be expressed as follows.
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where P is the total power. Maximum current ripple through the inductors is when maximum ST happens. Therefore the peak-to-peak current ripple of the inductors needs to be decided. Referring to few applications in different papers, it has been found as a general rule for most cases involving ZSI, about 30% (60% peak to peak) current ripple is chosen for design. Inductor Max current, IL = IL + 30% L = IL 30% Inductor Min current, I
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During ST, VL VC V V = Unboosted V + Boosted V 2

ST control

or V can be calculated using (12). Inductor value can be calculated using L= V T0 DI (15)

There are a few control methods that have been proposed: simple, maximum boost and maximum constant boost control [14]. Unlike the traditional inverters, the ZSIs have an extra ST state during which the output voltage to the load terminal is zero. In order to maintain the sinusoidal output, the active state duty ratio remains unchanged and all or some of the zero states are turned into ST states. 8.1 Simple control

where DI = IL I L . T0 is the ST period per switching cycle and can be calculated using B= T= 7.2 T 1 = T1 T0 1 (2T0 /T ) 1 switching frequency, F and

In this simple control, two straight lines are used as upper and lower ST reference lines Vp and Vn , respectively, as shown in Fig. 6. Whenever the triangular waveform is greater than Vp all the upper switching devices of the inverter are switched On whereas the lower devices are already On causing ST. Similarly ST occurs by turning the lower switches On whenever the line Vn is greater than the triangular waveform. In this control method the ST duty ratio decreases with increase in M (modulation index) and since all the zero states are not fully utilised, voltage stress on the device is relatively high as mentioned in [3, 7, 14]. 8.2 Maximum boost control

Capacitor design

The capacitor absorbs the current ripple and achieves quite a stable voltage that gives a sinusoidal voltage at output [11 13]. The inductor is charged by the capacitor during ST as explained in mode 3 (see Fig. 5) of Z-source operation and IL IC . Limiting the capacitor voltage ripple (DVC) to about 3% at peak power (generally used in most applications in different papers for ZSI), the capacitor value can be roughly calculated using C= IL T 0 DVC

(16)

where T0 is the ST period per switching cycle, IL is the average current through the inductor calculated using (14), and DVC V 3%. Figure 5 shows the voltage waveforms, capacitor charges and discharges during non-ST and ST states, respectively. Capacitor voltage is same as the inductor voltage during ST.

Maximum boost control method is used to obtain the maximum voltage boost. This control shoots through the entire zero state in a switching cycle, as a result reduces the voltage stress on the devices. The top contour of all three sinusoids together and bottom three contours of all three sinusoids together act as the upper and lower ST references, respectively. These references are compared with the triangular waveform to perform the ST; a control map is shown in Fig. 7a. Fig. 7b shows control with third harmonic injection which gives the advantage of extending the modulation index range. This method experiences varying ST duty ratio in a line cycle which causes higher inductor ripple hence requiring high inductance for lowfrequency or variable-frequency applications according to [14, 15]. 8.3 Maximum constant boost control

This control method achieves maximum boost while maintaining a constant ST duty ratio through out; thus, it

Fig. 6 Sketch map of simple control [14]

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Fig. 7 Sketch map of maximum boost control [14, 15]

a Maximum boost control b Maximum boost control with third harmonic injection

results in no line frequency current ripple through the inductors. The PWM control map of maximum constant boost control is shown in Fig. 8a and map of maximum constant boost control with third harmonic injection is shown in Fig. 8b. Using this method the inverter can buck and boost the voltage from zero to any desired value smoothly within the limit of the device voltage [14]. For both Figs. 8a and b

ZSI self-boost phenomenon

T0 =1 T according to [14]. Boost factor and voltage gain

3M 2

(17)

According to [6], simulations reveal that, without the insertion of ST, the ZSI has a voltage boost when operated at low modulation index and low load power factor. This could cause a problem in certain applications and also could favour some applications. This self-boost can be controlled using a battery in replacement of the second capacitor in the Z network, C2 [6]. While the Z-source operates in normal mode (non-ST), inductor is assumed to have a pure DC current owing through it and the output voltage can be calculated for the p p system shown in Fig. 4a, VLL 3VDCM/2 2 where VLL is the rms line-to-line voltage and VDC VPV PV input voltage. The total power of the three-phase system is p P 3VLLILL cos f. In order to calculate inductor current IL , (14) can be used IL = IL1 = IL2 = P VPV

B=

1 1 = 1 (2T0 /T ) 3M 1

and

M VPN = MB = VPV /2 3M 1

(18)

3 3VPV M /2 2 ILOAD cos f = VPV = 3M ILOAD cos f 2 2 (19)

p Range of M for Fig. 8a is (1/ 3) to 1. Range of M for Fig. 8b p p is (1/ 3) (2/ 3) (increased modulation range).

Fig. 8 Sketch map of maximum constant boost control [14]

a Maximum constant boost b Maximum constant boost with third harmonic injection 284 & The Institution of Engineering and Technology 2011 IET Power Electron., 2011, Vol. 4, Iss. 3, pp. 278 287 doi: 10.1049/iet-pel.2009.0176

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where ILOAD ILL (line-to-line current) and cos f is the load power factor. Maximum value of Ii in Fig. 9 is equal to the maximum load current Max(Ii ) = 2ILOAD (20) this unwanted ST (self-boost) [6]. This self-boost can be controlled using a battery; details can be looked in [6].

10

Design example of a ZSI

Ii can also be expressed in terms of Id and IL from Fig. 9 Ii = IL1 IC1 = IL1 IC2 = IL1 (Id IL1 ) = 2IL Id (21)

To complete the understanding of ZSI operation, a design example has been provided. ZSI conguration has been used in Fig. 4a for the design example. If PV array characteristic in Fig. 1 is used, maximum output power would be 1680 W at MPP: voltage at MPP: 471 V current at MPP: 3.56 A Assuming the MPPT works and the panel operates at MPP. Maximum average current input (IL ) is 3.56 A. If 30% ripple (60% peak to peak) is allowed for inductor current as explained earlier IL = 3.56 + 30% = 4.628 A DI = 2.136 A Maximum B required: If required VAC = 325 V, for 230 Vrms AC output, where M is chosen to be 0.7, VPV 471 V. Using (9) B= 325 2 = 1.97 0.7 471

where IC1 IC2 and IL1 IL1 IL . Since the current through the diode cannot be negative (lower than 0), the maximum Ii = 2IL Max(Ii ) = = 2ILOAD 3M ILOAD cos f = 2IL = 2 2 2 (22)

3M ILOAD cos f 2

However maximum load current can be higher than 2IL when product of modulation index and the load power factor are lower than 2/3 as shown below 2ILOAD . 3M ILOAD cos f 2 2 3

(23)

M cos f ,

During this condition the inverter has new operating modes as shown below in Fig. 9. The load current Ii is zero during zero states, while during an active state when the condition in (23) is met, the load current Ii is larger than what is available (2IL). The freewheeling diodes Df1 and Df2 are turned on to provide the load with required current, which in turn puts the inverter into an ST mode as shown in Fig. 9a (IL increases linearly at ST until 2IL required Ii , i.e. 2IL is larger). Then the inverter goes into active state, where input end diode is still open circuit (reversed biased) as shown in Fig. 9b), load current is provided by the capacitor until next switching action (zero or active state).Voltage is boosted by

It is to be noted that if the panel is operating under different conditions (insolation and temperature), then the MPP operating V and I would be different and the boost factor is appropriately changed. If the available power is much lower, M can be adjusted to transfer power as higher boost may yield to distorted output voltage. For a switching frequency of 10 kHz, using (11a) T0 B 1 = = 0.246 T 2B ST time per cycle T0 24.6 ms. It is noted that while having the above modulation index, this ST of T0 24.6 ms could be inserted without a problem. Value of L: During ST using (12) VL = VC = V = 1.97 + 1 471 = 699 V 2

Fig. 9 New operation modes during self-boost [6]

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Fig. 10 Simulation result of ZSI design example

a b c d Capacitor voltage Inductor current Load voltage Load current

Using (15) and DI 2.136 A L= 699 24.6m = 8.0 mH 2.136

using (24) ILoad = Using (24) 1 2 Iswitch = 2.42 + 3.56 2 3 = maximum current through the switches = 3.58 A The average current through the front end diode the average current through the inductor 3.56 A. The peak front end diode current twice inductor current 7.12 A, that occurs during traditional zero states. 1680 = 2.42 A 3 1 400

Value of C: During ST IL IC and using (16) with a ripple of 3% as mentioned in the earlier section C= 3.56 24.6m = 4.18 mF 699 3%

The various output voltages and currents of the ZSI are shown in Fig. 10. Figs. 10a and b show the Z-impedance capacitor voltage and Z-impedance inductor current, respectively. The average values are 699 V and 3.56 A, respectively, as calculated. Figs. 10c and d show output voltage and current. The RMS values are 230 V and 2.43 A exactly as calculated in theory.

12

Conclusion

11

Device selection

The maximum voltage across switches and the diode peak inverter DC-link voltage VPN = 1.97 471 = 928 V. Peak current through the switches occurs at the peak power; hence maximum current through the switches can be calculated using 1 2 Iswitch = ILoad + IL 2 3 from [6, 7, 11] ILoad = P 3 cos f VLL (25) (24)

This paper has provided comparison of traditional inverters against the new Z-source technology in terms of topology, performance advantages and limitations. The ZSI operation, circuit equations, inductor and capacitor design are clearly explained. Three main ST control methods are described briey and comparatively evaluated. The self-boost phenomenon is also explained, proving the condition that causes it. A detailed design example is carried out using all the equations and calculations, for the three-phase PV ZSI. Simulation results using Simulink are shown to match the theoretical results. All results are very close to the calculated results proving proper analysis of a ZSI has been carried out. Finally, some calculations are shown which would help in choosing devices and components that make up the rest of the inverter. The ZSI with its unique impedance network and features makes it well suited in order to be used for PV applications. This paper has provided a comprehensive tutorial on the ZSI performance, different control schemes and design guide lines.

where cos f is the load power factor and VLL 3 = VAC 2

13

References

VLoad = 230 V rms Resistive load and unity power factor at maximum power and
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