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In the late 70s as the era of LSI and VLSI began, NMOS became the fabrication technology choice. Later the design flexibility and other advantages of the CMOS were realized, CMOS technology then replaced NMOS at all level of integration. The small transistor size and low power dissipation of CMOS circuits, demonstration principal advantages of CMOS over NMOS circuits.
NMOS Inverter
For any IC technology used in digital circuit design, the basic circuit element is the logic inverter. Once the operation and characterization of the inverter circuits are thoroughly understood, the results can be extended to the design of the logic gates and other more complex circuits.
NMOS Inverter
If VI <VNT, the transistor is in cutoff and iD =0, there is no voltage drop across RD, and the out put voltage is Vo=VDD=VDS If VI >VNT, the transistor is on and initially is biased in saturation region, since
+
RD =VDD=VDS
RD
VGS=V
+
VDS >VGS-VTN. As the input voltage increasesVGS=V (VGS) , the drain to source + voltage (VDS) decreases and the transistor inter into the non saturation region.
which relates the output and input voltages as long as the transistor is biased in the saturation region.
RD =VDD=VDS
VDSVGS-VTN.
the - p of the transistor moves up the Q oint load line. At the transition point, we have
VGS=V
+
16.9
where Vo, and VI, are the drain to s - - ource and gate to s - - ource voltages, respectively, at the transition point. By substituting Equation (16.9) into (16.8), the input voltage at the transition point can be determined as,
RD =VDD=VDS
VGS=V
+
RD =VDD=VDS
Transition region
Nonsaturation region
iD = Kn[2(vI - VTN)VO Vo2]
)2+
The iD versus vDS characteristics are shown in Figure 16.7(b), which indicates that this device acts as a nonlinear resistor.
NMOS Inverter with Enhancement Load/Saturated (driver at the non saturation region))
As the input voltage becomes greater than VIt the driver transistor Q- point continues to move up the load curve and the driver becomes biased in the nonsaturation region. Since the driver and load drain currents are still equal, or iDD = iDL, we now have KD[2(VGSD - VTND)VDSD - VDSD2] = KL(VDSL -VTNL)2 Substituting VGSD=VI and VDSD=VO and VDSL= VDD-VO we get KD[2(vl -VTND) Vo- VO2 ] = KL(VDD - VO - VTNL)2
The ratio KDIKL is the aspect ratio and is related to the width to- length parameters of the driver and load transistors.
The slope of the VTC curves in the saturation region is known as inverter gain and is given by dVo/dVI= - KD/KL If the inverter gain is greater then unity, the inverter logic gate is belonged to restoring logic family.