Atmel Atmega8

I/O

/* ---------------------------------------------------------------------* Title: Led counting reaction on pressed switch (I/O) * Hardware: ATmega8 * Software: WinAVR 20060421 ----------------------------------------------------------------------*/ #define F_CPU 16000000UL // Define software reference clock for delay duration // Must be write before call delay.h #include <avr/io.h> #include <util/delay.h> #define SWT PB4 on PB4 #define LED PORTD bits PORTD int main(void) { int x = 0 ; DDRB &= ~(1<<SWT); on SWT (PB2) *1 // Set input direction // Define switch pin // Define LED on 8

DDRD = 0xFF; direction on PORTB

// Set output

for (;;) // { if (bit_is_clear(PINB, SWT)) // SWT pressed, do the loop one time) { LED = x; // x++; // if ( x > 255 ) x = 0 ; // 0 _delay_ms (500); // } } return 0; }

Endless loop Read SWT pin (if show 8 leds x value x + 1 when 256 return to blinking delay

SPI
Control Register SPCR

Bit 7 SPIE: SPI Interrupt Enable This bit causes the SPI interrupt to be executed if SPIF bit in the SPSR Register is set and the if the global interrupt enable bit in SREG is set. Bit 6 SPE: SPI Enable When the SPE bit is written to one, the SPI is enabled. This bit must be set to enable any SPI operations. Bit 5 DORD: Data Order When the DORD bit is written to one, the LSB of the data word is transmitted first. When the DORD bit is written to zero, the MSB of the data word is transmitted first. Bit 4 MSTR: Master/Slave Select This bit selects Master SPI mode when written to one, and Slave SPI mode when written logic zero. Bit 3 CPOL: Clock Polarity:When this bit is written to one, SCK is high when idle. When CPOL is written to zero, SCK is low when idle. Bit 2 CPHA: Clock Phase: The settings of the clock phase bit (CPHA) determine if data is sampled on the leading (first) or trailing (last) edge of SCK. Bits 1, 0 SPR1, SPR0: SPI Clock Rate Select 1 and 0. These two bits control the SCK rate of the device configured as a Master.

SPI Status Register SPSR

SPI Data Register - SPDR

/* ---------------------------------------------------------------------* Title: Simple Serial communication input (led blinking indication) * Hardware: ATmega8 * Software: WinAVR 20060421 ----------------------------------------------------------------------*/ #define F_CPU 16000000UL // Define software reference clock for delay duration #include <avr/io.h> #include <util/delay.h> #include <avr/interrupt.h> #define DD_MOSI #define DD_MISO #define DD_SCK #define DDR_SPI PINB3 PINB4 PINB5 PORTB

void SPI_SlaveInit(void) { DDR_SPI = (1<<DD_MISO); SPCR = (1<<SPE)|(1<<CPOL)|(1<<SPIE); // SPI enable / Clock polarity 1 / SPI interrupts enable } int main(void) { SPI_SlaveInit(); DDRD = 0xFF; sei(); for (;;) {

_delay_ms(10); } return 0; } ISR (SPI_STC_vect) on Int0 vector { PORTD = ~(SPDR); } // Interrupt

/* ---------------------------------------------------------------------* Title: 10byte SPI communication (input and with no protection) * Hardware: ATmega8 * Software: WinAVR 20060421 ----------------------------------------------------------------------*/ #define F_CPU 16000000UL // Define software reference clock for delay duration #include <avr/io.h> #include <util/delay.h> #include <avr/interrupt.h> #define DD_MOSI in pin #define DD_MISO out pin #define DD_SCK #define DDR_SPI PINB3 PINB4 PINB5 PORTB // Master out - Slave // Master in - Slave // Clock from master // DDR_SPI

volatile int Data[8]; int x; void SPI_SlaveInit(void) {

DDR_SPI = (1<<DD_MISO); // PORTB = 00001000 // should this not be MOSI? SPCR = (1<<SPE)|(1<<CPOL)|(1<<SPIE); // set SPI enable, spi clock polarity , spi interrupts enable } int main(void) { SPI_SlaveInit(); routine initilize sei(); interrupts for (;;) { } return 0; } ISR (SPI_STC_vect) { Data[x] = SPDR; byte // receive and store // SPI interrupts // jump to SPI // Enable all // Infinit loop whoa!

x++; // shift to next byte array (0 1 2 3 4 5 6 7 8 9 = 10 bytes) if (x == 10) x = 0; // When 10 = reset