DI-197 Design Idea TOPSwitch-HX

65 W Notebook Adapter

Application
Notebook Adapter

Device
TOP258EN

Power Output
65 W

Input Voltage
90 265 VAC

Output Voltage
19 V

Topology
Flyback

Design Highlights Very compact, low parts-count design Internal current limit reduction eliminates secondary-side current limit circuit Primary side overvoltage protection (OVP) eliminates second optocoupler 700 V MOSFET reduces solution cost Lower-cost (60 V, 20 A) Schottky output diode replaces 100 V, 40 A diode 132 kHz operation reduces transformer size Low MOSFET capacitance allows higher frequency operation without efciency penalty Highly energy efcient Very low no-load input power: <200 mW @ 265 VAC High full-load efciency: >87% High average efciency: >86% Excellent transient load response Hysteretic thermal overload protection Overload protection with automatic recovery Latching fault protection Operation The schematic in Figure 1 depicts a notebook adapter power supply employing the Power Integrations TOPSwitch-HX

TOP258EN off-line switcher in a yback conguration. This power supply operates from a universal input to provide a 19 V, 65 W output capable of operation in a sealed enclosure at an ambient temperature of up to 40 C. The TOP258EN (U1) has an integrated 700 V MOSFET and a multi-mode controller to regulate output by adjusting the MOSFET duty cycles, in response to current fed into the Control (C) pin. The EcoSmart function in U1 provides constant efciency over an entire load range. Using a proprietary multi-cycle-modulation (MCM) function eliminates the need for special operating modes triggered at specic loads and operating conditions, optimizing performance for existing and emerging energy-efciency regulations. Fuse F1 provides protection to the rest of the circuit from catastrophic failures. Common-mode inductors L3 and L4 provide line ltering. X-capacitor C1 provides differential ltering, and resistors R1 and R2 provide safety from shock upon AC removal. Bridge rectier D1 recties the AC input, and bulk capacitor C2 lters the DC. Y-capacitor C11, connected between the transformer (T1) primary and secondary side provides common-mode ltering.
C11 2.2 nF 250 VAC T1 1 EE28 FL1 C12 1 nF R15 100 V 33 C13 C14 470 F 470 F 25 V 25 V D5 MBR2060CT R10 C10 22 F 301 1% 50 V D4 RS1B R14 20 VR1 1N5248B 18 V C15 470 pF 50 V RTN

19 V, 3.42 A

D1 3KBP08M 800 V

C4 2.2 nF 1 kV R6 150 1/2 W R3 2.0 M R7 5.1 M

VR2 P6KE250A FL2 R5 100 3 D2 RS1K 4

L3 12 mH R4 2.0 M R1 2.2 M R2 2.2 M C2 120 F 400 V D3 BAV19WS TOPSwitch-HX U1

D V TOP258EN CONTROL C

R8 6.8 M

R11 C8 2 k 100 nF 50 V

R16 1.0 k

C1 330 nF 275 VAC L4 200 H

R12 5.1 k C9 100 nF 25 V

U3B PC357C

U3A PC357C

F1 4A L E N 90 - 265 VAC R9 13 k 1%

R17 C16 68.1 k 100 nF R13 6.8 C7 47 F 16 V R19 1k U2 LM431 2%

C6 100 nF 50 V

R18 10 k 1%
PI-5192-071608

Figure 1.
www.powerint.com

65 W Notebook Adpater Schematic.

July 2008

Capacitor C7 charges at start up through the Drain (D) pin, initiating switching in U1. After start up the bias winding powers the controller. Resistor R13 provides compensation to the feedback loop. The clamp network formed by VR2, C4, R5, R6, and D2 limits the drain voltage (preventing spikes at MOSFET turn off) and dissipates transformer leakage inductance energy. Capacitor C4 does not discharge below the value of VR2 during low frequency operating modes for reduced consumption at light or no load conditions. Resistor R6 dampens high-frequency ringing. Resistors R7, R8, and R9 reduce the external current limit of U1 as the line voltage increases, keeping the output power to <100 VA at high line, and ensuring the rated output at low line, and a constant output power level with changing line voltages. Line-sensing resistors R3 and R4 (4 M) set the undervoltage and overvoltage thresholds, and maximum duty cycle at specic voltages. Open-loop faults cause VR1 to conduct, sending current into the V pin, and U1 into hysteretic overvoltage shutdown mode. Schottky diode D5 recties the output. A snubber network (C12, R15) dampens ringing across the diodes and reduces high frequency conducted and radiated noise. Capacitors C13 and C14 provide output ltering. Resistors R17 and R18 provide a voltage divider and x the output DC set point. Capacitor C16 and resistor R19 provide feedback control loop phase compensation. Resistor R16 sets the feedback system gain, ensuring stability over the entire operating range. Key Design Points The high-voltage (700 V) MOSFET in U1 enables using a higher transformer primary-to-secondary turns ratio and a 60 V, 20 A
PI-5193-071608

Schottky output diode (vs. a 100 V, 40 A diode) for increased efciency and lowered cost. Ensure bypass capacitor C6 is placed as physically close as possible to U1. To change the overvoltage shutdown to a latching shutdown, reduce R12 until >336 A ows into the V pin during open-loop conditions. IC U1 shuts down when the junction temperature reaches +142 C and automatically recovers when this temperature decreases by 75 C.
PI-5194-071608

80 70 60 50 40
QP AV

dB V

30 20 10 0 -10 -20 0.15 1.0 10.0 100.0

MHz
Figure 3. Conducted EMI Scan, EN55022 B Limits. Measurements Made at 230 VAC with Output RTN Grounded.

Transformer Parameters
Core Material Bobbin EE28 PC44 gapped to ALG of 478 nH/t EE28, 10 pin, Vertical Bias/Feedback: 2T 4, 32 AWG Primary 1st Half: 16T 2, 25 AWG Shield: 1T, Foil, 2 mils thick (reverse wound) Secondary: 3T 4, 24 TIW Shield: 1T, Foil, 2 mils thick Primary 2nd Half: 15T 2, 25 AWG Bias/Feedback (45), Primary 1st Half (32), Shield (NC1), Secondary (FL1FL2), Shield (NC10), Primary 2nd Half (21)

200

160

Winding Details

Input Power (mW)

120
Winding Order

80

Primary Inductance 452 H, 5%

40

Primary Resonant Frequency Leakage Inductance

1 MHz (minimum) 5 H (maximum)

90

125

160

195

230

265

Input Voltage (VAC)

Figure 2. No-load Input Power vs. Line Voltage.

Table 1. Transformer Parameters. (TIW = Triple Insulated Wire, AWG = American Wire Guage, NC = No Connection)

Power Integrations 5245 Hellyer Avenue San Jose, CA 95138, USA. Main: +1 408-414-9200 Customer Service Phone: +1-408-414-9665 Fax: +1-408-414-9765 Email: usasales@powerint.com On the Web www.powerint.com A 07/08

Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. The products and applications illustrated herein (transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations' patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield, Filterfuse, StackFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. 2008, Power Integrations, Inc.

DI-197