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Fig. 1
R R V 5 G V d G c G
D 4 . 7 k V D D
3 3 k
1 0
d c
Fig. 2
II. Biasing of JFET Self-bias circuit Experiment: 1. Connect the self bias circuit of Fig. 3. 2. Measure the values of VG, VD and VS (with respect to ground). Report: Calculate the values of VGS and ID. Obtain the analytical value of ID using VGS and the JFET parameters measured in Part I. Compare the two.
R
4 . 7 k
D V 1 0 V d c D D
G R s 0 . 6 8 k
3 3 0 k
Fig. 3
1 M
Voltage-divider bias circuit Experiment: 1. Connect the circuit of Fig. 4. 2. Measure the values of VG, VD, and VS. Report: Calculate the values of VGS and ID. Obtain the analytical value of ID using VGS and the JFET parameters measured in Part I. Compare the two. III JFET Amplifier Experiment: 1. Connect the Common Source amplifier as shown in Fig. 5. Use a signal generator for Vs, and an oscilloscope to monitor Vs and Vo. 2. Set the signal generator frequency to 2kHz and a level of 0.5V peak-to-peak. 3. Record the waveforms of Vs and Vo and the their V amplitudes. 4. Connect a 500k potentiometer between Vs and C1. Adjust its value so the output amplitude reduces to 50% of the value measured in 3. Record this as the input resistance of the amplifier. 5. Reconnect the circuit of Fig. 5 as a Source Follower. Repeat Steps 2 to 4.
. 0
. 7 kR
D V 1 0 V d c D D
R 3
2 3 0 k 4 . 7 kR s
Fig. 4
V R 1 R D 4 . 7 k
= 1 0 V
1 . 0 M C 1 F 2
C 0
2 . 1 u F R L k +
0 . 1 u s R 3 3
0 k 4 . 7 k
C 1
s 1 0 0 u F
Fig. 5
Report: 1. Calculate the voltage gains of the Common Source amplifier and the Source Follower. Compare them with the analytical values. Use the JFET parameters measured in Part. Computations: