PROBLEMS

467

15.2

A double-gate n-channel Si JFET hasNd = 5 x 1015 cm ", N. = 1019 cm", a = 1 J.Lm, L = 30 J.Lm, Z = 0.1 ern, and J.Ln = 1050 crrr' IV-sec. Determine (a) the pinch-off voltage, (b) the drain current for VD = Vp with the gate connected to the source, and (c) the drain current for VD = 0.5 V and VG = -1 V. Assume T = 300 K. Consider a Si double-gate n-channel JFET with the following parameters: N. = 3 X 1018 cm ", Nd = 1015 crn", a = 2 J.Lm, L = 20 J.Lm, and ZIL = 5. Assume J.Ln = 1000 cm2/V-sec and T = 3OOK. (a) Calculate the builtin voltage, the pinch-off voltage, and the value of the channel conductance with VG = O. (b) Calculate the drain conductance with VD = 0 and VD = 0.5 V for VG = -1 V. (c) Calculate the transconductance in the linear region with VG = -1 V and VD = 0.5 V. A uniformly doped single-gate p-channel Si JFET has the following parameters at 300K: N. = 6 X 1015 cm ", Nd = 4.5 X 1019 cm ", L = 4 J.Lm, Z = 50 J.Lm, and a = 1 J.Lm. The hole mobility in the channel is 350 crrr' I V-sec. For this transistor, calculate (a) the pinch-off voltage and (b) the gain bandwidth product in the saturation region with a gate reverse bias of 2 V. An n-channel JFET is being used as a controlled load by operating the transistor in saturation. The pinch-off voltage of the transistor is 3.5 V, and the built-in voltage of the gate-channel junction is 0.8 V. The gate is grounded. Assume Go = 1.44 X 10-2 A/V and determine (a) the drain voltage VDsa', (b) the value of the load resistor with VD = VDsa" and (c) the gm of the transistor in the saturation region. Compare the value of gm with that of a bipolar transistor with Ie = IDs.,. The avalanche breakdown voltage of the drain-substrate junction of an n-channel JFET is 30 V. Calculate the drain voltage that will produce avalanche breakdown when a reverse bias of 4 V is applied to the gate. The dopant concentration in the channel of a single-gate n-channel JFET varies as Nd(y) = Ky where K = 1019 cm ". Calculate the pinch-off voltage, the drain current, and the values of gD and gm with VG = - 2 V and VD = 0..5 V. Also calculate the value of gm in the saturation region with VG = - 2 V. Assume J.'i = 0.6 V in all your calculations and consider a single-gate device with the dimensions given in Prob. 15.3. Starting from Eq. (15.28) and following the procedure described in the text, derive Eq. (15.29). Consider an n-channel Si MESFET with a = 1 J.Lm, and values of Nd, J.Ln, Vp, and Z the same as in Prob. 15.3. Assume J.'i = 0.7 V and v, = 107 em sec ". Using field-dependent mobility approximation, calculate the drain current for J.LnVplv,L = 2 with VG = -1 V and Vv = 2 V. rent can be expressed as I
D

15.3

15.4

15.5

15.6

"

15.7

15.8 15.9

15.10 Show that for a normally off n-channel MESFET, the saturated drain cur-

= ZJ.Lne, (I/, _ V. )2 2aL G Ih

15.11 The current amplification factor J.L of a JFET is defined by J.L = aVD I aVGIID = constant- Show that J.L = gmgV -1. Consider two identical JFETs and

468

JUNCTION

AND METAL-SEMICONDUCTOR

FIELD-EFFECT

TRANSISTORS

determine the values of I.L and gm for the composite unit when the two devices are connected (a) in series and (b) in parallel. 15.12 An InP MESFET has N = 1017 cm'", L = 1.5 I.Lm, Lja = 5, and Z = 75 I.Lm. Assume Vs = 6 X 106 em sec " and JIi = 0.7 V. Using the saturated velocity model, calculate the values of ID and gm for VG = -1 V and VD = 0.2 V. Also estimate the electron transit time through the channel and the cutoff frequency /T. Assume E, = 12.4 Eo.

Unless stated atherwise, as~ume' = @OK in the following probkms. 2

.= 5 x surface

>,I

!!

.,'

.',,

,.,

.
J ,

1. - - 7 ,

102 ~ t h l l o l f i & h ~ o n t b c n u f ~ d a m ~ d $ ~ ~ s i ~ o n ~ k x of Q-un d y i t y . A M t i v e c m in i$e b * @ses the electron to 3 x lor5 m''. calc@te the magnitude umcentratb.at tty < f * . .+ and the sign o the . potential.

16.3 A 0.5-@ thiek oxide is lgroatmt on'a'rmifbhaly'dbpod n-silicon sample with Nd = 15 x 1 " a-. Assumim the oxide to be chaSgC free, calcu. 0 n' .A. , ' + : .. ta# the surface poteutial and the gate @age @ (a) maltiG thesurface I , . ,p 1 mttinsic and (6) : creatiag strong inbash at the surface. Also determine - .-, ' the maximum width W of the surface depletion region. ,
21

. -.

CosMfiM Eqs. fl6.23)and ( 6 2 )ead subaftuting for C, from E . 1.4 q ( 6 1 b obtain Eq. ( 6 2 ) 1.5) 1.5.

N4 = lP.cm-?The thickness d the gate a i d e i I ~ Aand the charge s , density at tht S i d W 2 ia&&ms 3. x 1 " e h q e s c-. Calculate (a) the i 0 m'
flat-band voltage, (b) the turn-on voltage, and (c) draw the energy band diagm$ af rZlt system Uder rhcmal equilibrium and at tyle onset of s t r a n g i m w s k ~ ~ nlfjtr;ml;, 'a;fill r. ni W I , 7 3 ;,
.
,fm,>*hC31

An Au gate M3S capacitoa ie fabricated on an n-silicon substrate with

.,'I1

Ir.

,XI

> ~ 7 a,:

Consider an n-&amd MOS capmitor made on pfilicon substrate with 0 ' and the oxide thickness and surface charge densities the N =1 . as, irt Rabi 163,Calculate VFB, and ampare these results with V * tllo@cQfPtob, 165,.
F'iw 168 sbowo the (C-V) plot o a M06 c a p i t a made on psilicon f with N = 55 x 10' a-, using A1 as gaue metal, Calculate the oxide . . n' thislaess and t b chaqe d e w y at the Si-!3& interface assuming there are w mobile charges in the oxide. r fiw
I :

#!=(

Consider a M06 capacitor of area 1 c d o n n-silicon with Nd = d 15 x 10' c " h d Al gate. The SiOl layer is 0 2 pm thick. The Si is . m 20 pm thick and i epitaxially grown on n+-silicon substrate having s N,+= 1 1 cm-? Neglectingany interface charge between d SO2,de09 q i termine the flat-band capacitance, the zero-biascapacitance, C,,, and C f a the structure, and sketch the C-V p h . Assume that thq oqridc, in Prob. 168 mtains 1 " mobik iazg. Determine 0 the flat-band and 'the threshold vdtagcs when (a) all the ions are uni-

in11

tt

all formly distributed in the oxide, (b) the ions are at the Si-Si02interface, and (c) aIl the ioaf are at the Al-SiQ2 interface
,

Id10 Substitutingfor Q.(x) from Eq.(16.38)into Eq:(16.39)and integrating the

d t i n g equation from x = 0 to x = L, derive Eq. ( 6 4 ) 1.0.

PROBlEMS

513

PROBLEMS
Unless stated otherwise, assume T 16.1
=

300 K in the following problems.

An n-type silicon sample has a uniform donor concentration.V, = 5 x 1015 cm ". Calculate the surface potential required (a) to make the surface intrinsic and (b) to bring strong inversion at the surface. A thin oxide is grown on the surface of a uniformly doped p-silicon sample of 10 n-cm resistivity. A positive charge in the oxide raises the electron concentration at the surface to 3 x 1015 cm ". Calculate the magnitude and the sign of the surface potential. A O.5-/-Lm thick oxide is grown on a uniformly doped n-silicon sample with Nd = 1.5 X 1015 cm", Assuming the oxide to be charge free, calculate the surface potential and the gate voltage for (a) making the surface intrinsic and (b) creating strong inversion at the surface. Also determine the maximum width Wm of the surface depletion region. Combining Eqs. (16.23) and (16.24) and substituting for Cox from Eq. (16.15b) obtain Eq. (16.25). An Au gate MOS capacitor is fabricated on an n-silicon substrate with N, = 1015 cm ". The thickness of the gate oxide is 1200 A, and the charge density at the Si-Si02 interface is 3 x lOll charges cm ", Calculate (a) the flat-band voltage, (b) the turn-on voltage, and (c) draw the energy band diagram of the system under thermal equilibrium and at the onset of strong inversion. Consider an n-channel MOS capacitor made on p-silicon substrate with N. = 1015 cm ", and the oxide thickness and surface charge densities the same as in Prob. 16.5. Calculate VFB, V,h and compare these results with those of Prob. 16.5. Figure 16.8 shows the (C-V) plot of a MOS capacitor made on p-silicon with N. = 5.5 X 1016 cm ", using Al as gate metal. Calculate the oxide thickness and the charge density at the Si-Si02 interface assuming there are no mobile charges in the oxide. Consider a MOS capacitor of area 1 ern? made on n-silicon with N, = 1.5 X 1014 ern'? and Al gate. The Si02 layer is 0.2 /-Lm thick. The Si is 20 /-Lm thick and is epitaxially grown on n + -silicon substrate having N, = 1019 cm ". Neglecting any interface charge between Si and SiOl, determine the flat-band capacitance, the zero-bias capacitance, C min and Cmu for the structure, and sketch the C-V plot. Assume that the oxide in Prob. 16.8 contains 1012 mobile ions, Determine the flat-band and the threshold voltages when (a) all the ions are uniformly distributed in the oxide, (b) all the ions are at the Si-Si02 interface, and (c) all the ions are at the AI-Si02 interface.

16.2

16.3

16.4 16.5

16.6

~
I

16.7

16.8

16.9

16.10 Substituting for Q.(x) from Eq. (16.38) into Eq. (16.39) and integrating the resulting equation from x = 0 to x = L, derive Eq. (16.40).

514 16.11 Writing the charge Qn(X)

MOS TRANSISTORS AND CHARGE-COUPLED DEVICES

= 0 in Eq. (16.38) show that the saturation drain voltage is given by Eq. (16.45).

16.12 (a) An Al gate enhancement-type n-channel Si MOSFET has a substrate concentration N; = 6 X 1015 cm ? and an oxide thickness of 0.1 J.Lm. The Si02 has 1010charges ern -2. Determine the threshold voltage of the transistor. When the transistor is operated in the linear region with VD = 0.5 V, L = 10 J.Lm,

calculate the gate voltage to obtain a drain current of 2 mA. Assume J.Ln = 500 cm2/V-sec, and Z = 100L. Calculate the gm of the device and the maximum frequency of operation [r- (b) What changes will occur in the characteristics of the MOSFET when the gate metal is replaced by p-polysilicon doped with N, > 1019 em -3 operated at the same current in the linear region with VD = 0.5 V?

16.13 An n-channel MOSFET with Z/L = 15, a Si02 thickness of 800 A, and J.LD = 600 cm2/V-sec is to be used as a controlled resistor. (a) What charge density is required for the device to present a de resistance of 3.5 KO be(VG -

tween the source and the drain in the saturation region? (b) What value of Jl;h) is required to obtain the desired resistance?

16.14 Calculate the drain current, gD, and gm of an n-channel MOSFET with Z/L = 10, Jl;h = 0.5 V, J.Ln = 500 cm2/V-sec, and oxide thickness of 0.12 J.Lm with (a) VD = 0.2 V, (b) VD = 2 V, and (c) in the saturation re-

gion. Assume VG = 4 V in all the calculations.

16.15 Consider the MOSFET of Prob. 16.14 and a bipolar transistor to be evalu-

ated for use in a linear amplifier with a quiescent current of 2 mA. Calculate the ratio of the transconductances of the two devices and answer which of the two will be more suitable for use in the amplifier.
16.16 A p-channel MOSFET has a O.l-J.Lm thick Si02 which contains 8 x 1010 positive charges cm ". The substrate is n-silicon with Nd = 1.5 X 1016 cm ", and the gate is heavily doped with boron. The source and sub-

strate are grounded. (a) Calculate the flat-band and the threshold voltages. (b) For Z = 2L, VG = -4 V, and VD = -0.4 V, the drain current ID = 20 J.LA. Calculate the value of Z required to obtain a drain current of 2.5 mA with VG = - 5 V and VD = -0.5 V. Assume the gate length to be 10 J.Lm and p + -source and drain electrodes extend 1.25 J.Lm sideways under the gate oxide. (c) Calculate the substrate bias that will be needed to shift the threshold voltage of the above device to -2.7 V.
16.17 Consider an n-channel MOSFET operating in the saturation region. Show

that the electron transit time by Eq. (16.65).

7'/

through the channel can be approximated

16.18 Combining Eqs. (16.74) and (16.76) show that the surface potential given by Eq. (16.77).

cp, is

16.19 A CCD is fabricated on a p-silicon substrate withNa = 3 x 1014 cm " and Si02 thickness of 1500 A. The electrode area is 10 J.Lm x 20 J.Lm. (a) Cal-

culate the surface potential and the depletion region width for two electrodes biased at 10 V and 20 V, respectively. Assume VFB = 0 and Q'ig = O.

PROBLEMS

515

(b) Repeat (a) after 106 electrons are introduced into the cell. (c) Calculate the fringing field at the electrode boundary in (a) if the interelectrode spacing is 3 p,m. 16.20 A 1200 A thick oxide layer is grown on a 5 D.-cm resistivity p-silicon. If a gate voltage of 10 V is applied and a signal charge of 1.6 x 10-8 C cm ? exists in the well, determine (a) the surface potential and (b) the electric field at the Si-Si02 interface.

:)
I

"

lS

PROBLEMS

409 3. J. M. EARLY, "Effects of space-charge Proc. IRE 40, 1401 (1952). New York, 1965, pp. 108-109. layer widening in junction transistors,"

b)

4. R. M. WARNER and J. N. FORDEMWALT,Integrated Circuits, McGraw-Hill,

s.

F. HEBERT and D. J. ROULSTON, "Base resistance of bipolar transistors from layout details including two dimensional effects at low currents and low frequencies," Solid-State Electron. 31,283 (1988).

6. J. TE WINKEL, "Past and present of the charge-control concept in the characterization of the bipolar transistor," in Advances in Electronics and Electron Physics, L. Marton (ed.), Academic Press, New York, Vol. 39, 253 (1975).

ADDITIONAL READING LIST

1. J. L. MOLL, Physics of Semiconductors, McGraw-Hill, ter 8. New York, 1964, Chap-

2. P. E. GRAY and C. L. SEARLE, Electronic Principles: Physics, Models, and Circuits, John Wiley, New York, 1969, Chapters 7 and 8.

3. R. L. PRITCHARD, Electrical Characteristics of Transistors, McGraw-Hill,

York,1967.

New

4. R. S. MULLER and T. I. KAMINS, Device Electronics for Integrated Circuits,

2d ed., John Wiley, New York, 1986, Chapters 6 and 7.

S. W. SHOCKLEY,"The path to the conception Trans. Electron Devices ED-31, Centennial

of the junction transistor," IEEE special issue, 1523-1546 (1984).

PROBLEMS
13.1 Draw the energy band diagrams for an n-p-n transistor when it is biased in (a) the saturation region and (b) the cutoff region. In both cases draw the majority and the minority carrier distributions in the emitter, base, and collector regions. Consider a p-n-p transistor biased in the normal active region of operation at room temperature. In this situation, both IB and Ie are negative. Now if Ie is held constant and the temperature is raised gradually, IB will decrease and ultimately become positive. Explain this behavior in terms of physical phenomena that occur in the device. A symmetrical Ge p-n-p transistor with emitter-base and collector-base junctions, each 1 mm in diameter, has an impurity concentration of 5 x 1015 ern"? in the base and 1018 cm ? in the emitter and the collector. The base-width is 10 14m, 'TB = 4 X 10-6 see, 'TE = 10-8 see, and the emitter region is much longer than the diffusion length LE Calculate the current gains a and hFE of the transistor. Take DB = 47 em' sec" and DE = 52 em' sec ", Consider a p-n-p transistor with uniformly doped emitter, base, and collector regions. If hFE(-y) denotes the common emitter current gain when aT is unity, and hFdaT) denotes the same when 'Y is unity, show that when

13.2

13.3

13.4

410

BIPOLAR JUNCTION TRANSISTORS I:

FUNDAMENTALS

both aT and yare nonunity, the current gain hFE is given by (hFErl
[hFE(aTWI

[hFE(yWI

13.5

A Si n-p-n transistor has the following parameters at 300K: N. = 5 X 1016 cm", Nd(E) = 1 x 1018 cm ", Ws = 2 J-Lm, WE = 0.2 J-Lm, J-LB = 1000 cnr' V-I sec ", J-Lp(E) = 150 em! V-I sec ", TS = 10-6 see, and TE = 10-8 sec. The emitter-base junction area is 0.01 em", Ie = 1 mA, and the collector-base junction is reverse biased by 2 V. Neglect carrier generation and recombination in the two junction depletion regions. (a) Calculate the emitter-base junction voltage and the excess electron concentration in the base at the edge of the emitter-base junction depletion region. (b) Calculate y, aT, and hFE for the transistor. A p-n-p transistor with uniformly doped base, emitter, and collector regions has le = 1.2 mA. Sketch the minority carrier distribution in the base when (a) the collector is shorted to the base, (b) the collector is shorted to the emitter, and (c) the collector terminal is kept open. Differentiating Eq. (13.37) with respect to VES, obtain Eq. (13.38). A Si n + -p-n + power transistor has a base-width of 150 J-Lm and a base doping of 1014 cm ". A reverse bias of 500 V is applied to the collector-base junction. Calculate the minority carrier lifetime in the base region that will give a common emitter current gain of 40. The punch-through voltage of a Ge alloyed p-n-p transistor is 25 V, the base doping is 1015 cm ", and the emitter and the collector dopant concentrations are 1019 cm ? each. Calculate the zero-bias base width and a of the transistor at a 10 V reverse bias across the collector-base junction. Assume t = 10-6 see and T = 300 K.

13.6

13.7 13.8

13.9

13.10 The emitter and collector regions of a Si alloyed p-n-p transistor are heavily doped, and the impurity concentration in the base is 1015 em:". Calculate the base-width that will make the avalanche breakdown voltage equal to the punch-through voltage. Assume that avalanche breakdown occurs when the maximum field strength in the depletion region becomes 5 x lOS V/cm. What minority carrier diffusion length and lifetime in the base are required to obtain a value of a = 0.95? Assume y = 0.99 and a reverse bias of 15 V at the collector-base junction. 13.11 An n-p-n transistor with uniformly doped emitter, base, and collector regions has a collector-base junction punch-through voltage of 60 V, and hFE = 40 at a reverse bias of 5 V. Determine the reverse-bias voltage at which hFE becomes BO. 13.12 Using Eq. (13.56) and making appropriate approximations, show that for a transistor operating in the saturation region, VCE is given by Eq. (13.57). Calculate the value of VCE for aN = 0.985, a, = 0.72, and Ie/Is = 10. Assume T = 300 K. 13.13 The emitter current of a p-n-p transistor with a = a, is 0.5 mA when the emitter-base junction is forward biased and the collector is left open. When the collector is shorted to the base, the current rises to 25 mA. Calculate hFE and the base-width of the transistor assuming a minority carrier diffusion length of 20 J-Lm in the base and the emitter efficiency to be unity.

PROBLEMS

411 13.14 A Ge alloyed p-n-p transistor has lss = -2 /-LA, Ies = -3 /-LA, and a =

0.95. The transistor is connected to a 5 V battery in series with a 1 K!1 resistor such that the positive of the battery is connected to the emitter, the negative to the collector, and the base is open-circuited. Calculate the current through the circuit and the voltage drops across each of the two junctions.
13.15 Show that the conductance gee = alc/aVc in the normal active region is hre times larger than the conductance gcb given by Eq. (13.50b). 13.16 The reverse breakdown voltage VCBO of a p-n-p transistor is 70 V and hF =

50. The transistor is operated in the common base configuration with an emitter current of 1 mA. Taking m = 4, calculate the collector-base junction reverse voltage at which the collector current becomes - 5 mA.
13.17 Consider the transistor in Prob. 13.16 to be operated in a common emitter

configuration with Ie the voltage VCEO

801B Calculate the value of VC. Also determine

13.18 A p-n-p transistor has the following parameters: TN = 1.2 X 10-8 see, T/ = 3.6 X 10-8 see, f3N = 100, and f3/ = 10. Evaluate the steady-state base

charge components QN and Q/ if IB mine the signs of the bias voltages

=
VCB

-0.5 mA and Ie and VB.

-2 mA. Deter-

PROBLEMS

441

ADDITIONAL READING LIST

1. R. S. MULLERand T. 1. KAMINS, evice Electronics for Integrated Circuits, D 2d ed., John Wiley, New York, 1986. 2. T. S. Moss and C. HILSUM(eds.), Handbook on Semiconductors, Vol. 4, North-Holland, Amsterdam, 1981, Chapters 2 and 7A.

PROBLEMS 14.1 An n-p-n transistor has a base-width of 3 }.Lm and DB = 10 ern" sec " at 300 K. The minority carrier lifetime in the base is 0.1 usee, and 'Y is nearly unity. Determine fa and the magnitude and phase of a at a frequency of 15 MHz. The donor concentration in the base region of a Si p-n-p transistor can be approximated by Nd(x) = 2 x 1018 exp( - x/A) where A = 1.2 }.Lm. The transistor has WB = 4.5 }.Lm, WE = 2.5 }.Lm, and a uniform doping concentration of NQ = 5 X 1019 cm ? in the emitter. Assume DB = 8 em? see:", 7 'TB = 2 X 10- see, DE = 2.5 ern" sec ", 'TE = 1.5 X 10-8 see, and T = 300K. Calculate the base and the emitter Gummel numbers and hFE Take the band gap narrowing in the emitter into account. For a graded-base transistor with a constant electric field in the base, show that 'TN is given by Eq. (14.26). In a p-n-p transistor with a constant built-in field in the base, show that the stored charge Qs of excess holes in the base, in the normal active mode of operation, can be expressed as Qs = I,W~/TJDp. The common emitter current gain of a transistor with constant doping in the base is given by Eq. (14.28). Expanding this relation and assuming 'Y = 1, obtain Eq. (14.6). A drift transistor with a constant field in the base has WB = 1.5 }.Lm, DB = 7 cnr' sec ", and fa = 450 MHz. Calculate the excess phase factor and the magnitude and the phase of the common base current gain Iiat 300 MHz. An epitaxial planar n-p-n transistor with a constant field in the base has WB = 1 }.Lm. The grading in the base decreases the base transit time 'TN by a factor of 4 from its value in the situation where the base is homogeneously doped. If NQ(O) = 1019 cm ", calculate the value of NQ(WB). Explain how 'TN will be affected at high collector currents. An n-p-n transistor at Ie = 5 mA and T = 300K has f30 = 100 and 1f31 = 10 at 10 MHz. Assuming that 'Y is unity and Eq. (14.6) is valid, calculate fenffl,fT, and the base width of the transistor. Assume the base to be homogeneously doped and DB = 12 crrr' sec " Consider that the collector-base junction of a p-n-p transistor is sufficiently reverse biased so that the holes move through the junction depletion region of width (Xc - WB) with saturation velocity v.. Show that

14.2

14.3 14.4

14.5

14.6

14.7

14.8

14.9

\
\

442

BIPOLAR JUNCTION TRANSISTORS I~ DEVICES

when an ac signal is superimposed on the de bias the associated time constant is given by Eq. (14.39). 14.10 An n + -p-n + power transistor has a base width of 125 p.m and a base dopant concentration of 1.3 x 1014 cm ", The transistor has a current gain hFE = 50 at a collector reverse bias of 750 V at low currents. Calculate the current gain for current densities of 50 A cm ? and 150 A cm". 14.11 Consider a p-n-p transistor with Ws = 2 p.m, hFE = 40, and the impurity profile in the base given in Prob. 14.2. The transistor has a single stripe emitter geometry shown in Fig. 14.5. With S. = 2 p.m and I = 50 p.mestimate the collector current at the onset of edge crowding. Assume an average electron mobility of 250 em' IV see in the base. 14.12 An n-p-n transistor having a = 0.98, lea = 0.2 p.A, and Leo = 0.16JLA is used in the common emitter configuration with a collector series resistance of 4 K nand Vcc = 12 V. Determine the minimum base current for the transistor to enter the saturation region. 14.13 In the circuit of Fig. 14.13a assume that RL = O. The base current is abruptly raised to -0.5 mA at t = O. The steady-state collector current is -10 rnA, and the initial slope of the collector current is - 25 mAIJLsec. Determine the values of TN and TSN. Use the charge control equations and neglect the charges associated with the junction depletion regions. 14.14 An n-p-n power transistor is operated with VCE = 100 V and Ie = 0.5 A at 300 K. The maximum allowable junction temperature is 175C. Calculate the thermal resistance. 14.15 A p-n-p transistor has TN = 1.2 X 10-8 see, T/ = 3.6 X 10-8 see, aN = 0.99, and a/ = 0.9. The transistor is connected in the circuit of Fig. 14.13a. The base current is varied from ISI = -0.5 mA to IB2 = 0.2 mA and RI = 10 K n. The load resistance is 2 K nand Vee = -12 V. Assume Cit = 4 pF, Cc = 2 pF, and T = 300K. Calculate (a) the on resistance of the transistor and (b) the time constants Td and Ts.

LEMS

ANSWERS TO SELECTED PROBLEMS

653

11.9 (a) LA

8.43

10-11 H, CA

18.25 pF, (b) 4.058 GHz.

11.10 11.33 watt. 11.11 N = 2.31 X 1015cm", VFB = 85.98 V. 1 11.12 f = 10.7 GHz, G = -0.0060- . 11.13 W = 9.6 X 10-4 cm, Pde = 0.215 Watt, VI = 13.64 V. 11.15 Transit time mode at 6 GHz and LSA mode at 12 GHz. 11.16 2.415 psec.

CHAPTER 12 12.3 Va< = 0.654 V, 6.Eg = 24 meV. 12.4 P; = 17.14 X 10-3 watt, Ropt = 13.840, FF 12.5 (a) 1.1 V and 0.8 A, (b) 0.514 V, 1.8 A. 12.6 12.7 12.9 12.10 12.12 12.13 12.14 12.16 656 mY.

0.767,1]

15.3 percent.

t; = 61.3 mA,

Va = 325 mY, 8.08 percent. 0.435 mA. 47.46 mA. 1], = 39.8 percent, 1], = 82.7 percent. 0.61 percent, 1.09 x 104 cm ". The GaP diode will appear brighter. 4 S = 1.5 X 104 ern sec ", 6.a/a = 7.5 x 10-

12.17 4.93 O.

CHAPTER

13 13.3 a = 0.989, hFE = 89.9. 13.5 (a) 536 mY, 4.5 x 1012crn", (b) y 13.8 27.17 usee, 13.9 6.17 J.Lm, a = 0.999. 13.10 32.91 J.Lm, LB = 98.6 13.11 13.12 13.13 13.14 13.16 13.17 13.18

0.93,

aT =

0.999,

hFE =

13.1.

J.Lm, TB =

8.35

10-6 sec.

14.82 V. -47.3 mV. hFE = 98, WB = 2.857 J.Lm. I = 23.92 J.LA, VEB = 64.38 mY, "Bc = 4.91 V. 66.28 V. 20.5 Y, VCEO = 26.19 V. QN = 8.1 X 10-11 C, QI = 1.557 X 10-10 C; both junction voltages are positive.

CHAPTER

14 14.1 36.96 MHz, 0.927 / - 26.35. 14.2 GB = 2.93 X 1013cm " sec, GE 14.6 m
=

4.5

1013cm" see,

hFE

1.54.

0.646,

a/ao

0.832 / - 56.99.

654 14.7

ANSWERS

TO SELECTED PROBLEMS

14.8
14.10 14.11 14.12 14.13 14.14 14.15

1.08 x 1016cm ". fa = 101.5 MHz, ffJ = 1 MHz, [t = 100.5 MHz, Ws 32.77 and 20.88. 3.02 A. 60.12 J.LA. 2 x 10-8 see and 4 x 10-7 sec. 2.96C;watt. (a) 4.41 fl, (b) Td = 24 psec, T, = 445.5 nsec.

= 1.94 J.Lm.

CHAPTER 15
15.2 15.3

(a) 3.8 V, (b) 3.82 mA, (c) 0.717 mA. (a) 0.781 V, 3.04 V, 1.58 x 10-4 A/V, (b) 7.51 x 10-5 A/V and 4.28 x 10-5 A/V, (c) 3.23 x 10-5 A/V. 15.4 (a) 4.56 V, (b) 321.5 MHz. 15.5 (a) 2.7 V, (b) 301.6 n, (c) 7.515 mA/V. 15.6 26 V. 15.7 Vp = 4.05 V, 10 = 16.57 J.LA, go = 2.61 x 10-5 A/V, gm = 1.48 x 10-5 A/V and gm(sat) = 4.09 x 10-5 A/V. 15.9 57.4 J.LA. 15.11 (a) J.Ll + J.L2, (b) gm = gml + gm2. 15.12 10 = 10.61 mA, gm = 3.23 mA/V, [r = 6.25 GHz.

CHAPTER 16
16.1 16.2 16.3 16.5 16.6 16.7 16.8 16.9 16.12 16.13 16.14 16.15 16.16 16.19 16.20

(a) -0.329 V, (b) -0.658 V. 0.612 V. (a) -2.076 V, (b) -3.11 V, Wm = 7.23 x 10-5 ern. (a) -1.089 V, (b) -2.147 V. -1.67 V and -0.611 V. 1096 A, 7.07 x 1011 .charges cm", 11.12 nF, 17.04 nF, 3.97 nF and 17.26 nF. (a) - 5.01 V, -- 5.77 V, (b) -9.645 V, -10.4 V, (c) -0.375 V, -1.135 V. (a) V,h = 0.76 V, VG = 3.074 V, gm = 8.63 X 10-4 A/V,fT = 184.4 MHz, (b) V,h = 2.01 V. (a) -3.17 x 1O-8C cm", (b) 1.47 V. (a) 100.7 J.LA, 5.03 x 10-4 A/V, 2.88 x 10-5 A/V, (b) 0.719 mA, 2.157 x 10-4 A/V, 2.876 X 10-4 A/V, (c) 5.03 x 10-4 A/V. 7.58 x 10-4 A/V for MOSFET, 7.73 x 10-2 A/V for BJT. (a) 0.68 V and -1.775 V, (b) 0.104 em, (c) 0.96 V. (a) 8.71 V,8.92 x 10-4 em, (b) 5.5 V,4.86 x 10-4 em, (c) 3.33 x 104 V/cm. (a) 6.93 V, 8.4 x 104 V/cm.

c..v CHARACTERISTICS

OF THE MOS CAPACITOR

481

1.0
---P":-Poly

-- -----(n-Si)

0.8

0.6

------

---------p+-Poly (p-Si)

----

~
-e-

i1

--

_----;+-Poly

----------(n-Si) n+-Poly(p-Sil

~
1014 1016 NB (cm-3) FIGURE 16_7 The metal-semiconductor work function difference ,p"" plotted as a function of dopant concentration in silicon for AI, Au, and polysilicon gates. (From S. M. Sze, reference 2, p. 397. Copyright e 1981. Reprinted by permission of John Wiley & Sons, Inc., New York.) 1017 1018
/

where Qa.r denotes the total charge. From the plot of Fig. 16.8, we obtain VFB = -4.5 V. Figure 16.7 shows that for the Al-gate on p-silicon 4>,., is negative and its magnitude is less than 1 V. Consequently, the total oxide charge Qa.r must be positive because a negative value of VFl/ requires Qox to be positive. The flat-band voltage causes a change in the threshold voltage. The new threshold voltage is the algebraic sum of VFB and the voltage given by Eq. (16.26). Thus V,h = VFB QBO -c + 24>F
ox

(16.30)

In the above discussion a p-type semiconductor has been assumed, but a similar analysis can be made for an n-type semiconductor. However, note that for the Si-Si02 system VFB is negative in the case of p-silicon, but the remaining two terms in Eq. (16.30) are positive, whereas for n-silicon all the three terms are negative. Consequently, the magnitude of the threshold voltage of MOS transistors made on n-silicon is larger than that for transistors made on p-silicon. As an