VLSI List of Seminars 1.To study different types of Photolithography. 2.To study about PLD devices. 3.

To study FSM and different groups of state machines 4.To study different packaging styles . 5.To study CMOS Inverter: Static and Dynamic Behavior, Power, Energy and Energy Delay, Technology scaling and its impact. 6.To study CMOS device and its limitation. 7.To study about FINFET Technology. 8.To study about carbon nanotube(CNT),characteristics and application of it. 9.To study about different types of etching. 10.To study BiCMOS technology. 11.To study diffusion and Ion implementation. 12. To study Full custom,standard cell,gate array,FPGA,Sea of Gates design style in detail. 13.To study Floor planning . 14.To study architecture of FPGA in detail. 15.To study Maze routing algorithm. 16.To study different types of Soft Processor. 17.To study Microwave components. 18. To study the basic concept of Modeling of MOS transistor using SPICE ( Level 1,2 and Level 3 SPICE MODEL). 19.To study fabrication of CMOS transistor. 20.To study about Hetro junction BJT and FET. 21.To study silicon device fabrication process.

22. To study MAXTRAM model, HICUM models of BJT. 23.To study the recent developments in micro devices and some examples of it. 24. To study the effect of small dimensions- DIBL, charge sharing, channel length modulation, hot carrier effects in MOSFET. 25.To study Low power SOI CMOS. 26.To study about MOSFET scaling and small geometry effects. 27. To study about Low power microprocessor Design. 28.To study Design of CMOS Sequential Logic Circuits. 29.To study Design of CMOS Combinational Logic Gates.

VLSI List of Minor Projects 1. Design a Traffic light controller, using Mealy model of controlling. 2. Design a Vending machine, using Moore model of controlling. 3. Implementation of a Multi-channel UART Controller Based on FIFO Technique and FPGA. 4. A Low-Power Multiplier With the Spurious Power Suppression Technique. 5. FPGA-Based Face Detection System Using Haar Classifiers 6. Design and Implementation of Low Power Digital FIR Filter based on low power multipliers and adders on xilinx FPGA 7. Design of elevator controller using verilog. 8. Design and VLSI implementation of high-performance face-detection engine for mobile applications 9. Design and simulation of 8-bit SISO and SIPO type registers modeled in VHDL and VERILOG, and synthesis on FPGA. 10.Circuit simulation of CMOS Inverter - study of static and dynamic behavior. 11.Design and simulation of 8-bit PISO and PIPO type registers modeled in VHDL and VERILOG, and synthesis on FPGA. 12.Study of the effect of variation in VDD and Temperature on static and dynamic behavior of CMOS Inverter. 13.Design and simulation of 8:1 MUX modeled in VHDL and VERILOG, and synthesis on FPGA.

14.Design and simulation of 8-bit synchronous counter with LOAD, RESET, and up/down controls, modeled in VHDL and VERILOG, and synthesis on FPGA. 15.Design and simulation of 8-bit parity checker/generator modeled in VHDL and VERILOG, and synthesis on FPGA. 16.Design and simulation of 8:3 priority encoder, modeled in VHDL and VERILOG, and synthesis on FPGA. 17.Layout design and characterization of Transmission gate 18.Design and simulation of 4-digit decade counter, modeled in VHDL and VERILOG, and synthesis on FPGA. 19.Design and simulation of 4-bit combinational multiplier, modeled in VHDL and VERILOG, and synthesis on FPGA. 20.Design and simulation of 4-bit sequential multiplier, modeled in VHDL and VERILOG, and synthesis on FPGA. 21.CAN-I2C Interface Design using VHDL,FPGA synthesis, FPGA Board. 22.FPGA Board Design For Altera FPGA's and implementation of A VLSI project on the Kit 23.A Low Power Low Area Multiplier Based on Shift and Add Architecture 24.VLSI Design of Diminished One Modulo 2n + 1 Adder Using Circular Carry Selection 25.A VLSI Architecture for Visible Watermarking in a Secure Still Digital Camera (S2DC) Design 26.An FPGA-based Architecture for Real Time Image Feature Extraction. 27.Shift Invert Coding (SINV) for Low Power VLSI 28.Fuzzy based PID Controller using VHDL for Transportation Application Research on Fast Super-resolution Image Reconstruction Base on Image Sequence 29.Design of Low-Cost High-performance Floating-point Fused Multiply-Add with Reduced Power 30. An Implementation of a 2D FIR Filter Using the Signed-Digit Number System 31.Design of Low Power And High Speed Configurable Booth Multiplier 32.To study combining pipelining and parallel processing for low power?