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FEATURES 2,048 8 bit organization Access time: 100 ns (MAX.) Power consumption: Operating: 220 mW (MAX.) Standby: 5.5 W (MAX.) Single +5 V power supply Fully-static operation TTL compatible I/O Three-state outputs Wide temperature range available LH5116H: -40 to +85C Packages: 24-pin, 600-mil DIP 24-pin, 300-mil SK-DIP 24-pin, 450-mil SOP
PIN CONNECTIONS
24-PIN DIP 24-PIN SK-DIP 24-PIN SOP A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 GND TOP VIEW 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 Vcc A8 A9 WE OE A10 CE I/O8 I/O7 I/O6 I/O5 I/O4
5116-1
LH5116/H
ROW DECODERS
24 VCC 12 GND
CE
DATA CONTROL
COLUMN DECODERS
CE 18 WE 21 OE 20 4 A4 5 A3 6 A2 7 A1
5116-2
PIN DESCRIPTION
SIGNAL PIN NAME SIGNAL PIN NAME
A0 - A10 CE OE WE
Address input Chip Enable input Output Enable input Write Enable input
TRUTH TABLE
CE OE WE MODE I/O1 - I/O8 SUPPLY CURRENT NOTE
L L H L
NOTE: 1. X = H or L
X L X H
L H X X
1 1 1
LH5116/H
-0.3 to +7.0 -0.3 to VCC + 0.3 0 to +70 -40 to +85 -55 to +150
V V C C
1 1 2 3
NOTES: 1. The maximum applicable voltage on any pin with respect to GND. 2. Applied to the LH5116/D/NA 3. Applied to the LH5116H/HD/HN
5.0
V V V
Output LOW voltage Output HIGH voltage Input leakage current Output leakage current Operating current Standby current
IOL = 2.1 mA IOH = -1.0 mA VIN = 0 V to VCC CE = VIH, VI/O = 0 V to VCC Outputs open (OE = VCC) Outputs open (OE = VIH) CE VCC - 0.2 V All other input pins = 0 V to VCC
V V A A mA mA A 2 3 4
NOTES: 1. TA = 0 to 70C (LH5116/D/NA), TA = -40 to +85C (LH5116H/HD/HN) 2. CE = 0 V; all other input pins = 0 V to VCC 3. CE = VIL; all other input pins = VIL to VIH 4. TA = 25C
Read cycle time Address access time Chip enable access time Chip enable Low to output in Low-Z Output enable access time Output enable Low to output in Low-Z Chip disable to output in High-Z Output disable to output in High-Z Output hold time
ns ns ns ns ns ns ns ns ns
2 2 2 2
NOTES: 1. TA = 0 to 70C (LH5116/NA/D). TA = -40 to 85C (LH5116H/HD/HN). 2. Active output to high-impedance and high-impedance to output active tests specified for a 200 mV transition from steady state levels into the test load.
LH5116/H
Write cycle time Chip enable to end of write Address valid time Address setup time Write pulse width Write recovery time Output active from end of write WE Low to output in High-Z Data valid to end of write Data hold time Output enable to output in High-Z Output active from end of write
tWC tCW tAW tAS tWP tWR tOW tWHZ tDW tDH tOHZ tOW
100 80 80 0 60 10 10 0 30 10 0 10 40 30
ns ns ns ns ns ns ns ns ns ns ns ns 2 2 2 2
NOTES: 1. TA = 0 to +70C (LH5116/D/NA), TA = -40 to +85C (LH5116H/HD/HN) 2. Active output to high-impedance and high-impedance to output active tests specified for a 200 mV transition from steady state levels into the test load.
AC TEST CONDITIONS
PARAMETER MODE NOTE
Input voltage amplitude Input rise/fall time Timing reference level Output load condition
NOTE: 1. Includes scope and jig capacitance.
Data retention voltage Data retention current Chip disable to data retention Recovery time
2.0
V A ns ns 3 2
0 tRC
NOTES: 1. TA = 0 to +70C (LH5116/D/NA), TA = -40 to +85C (LH5116H/HD/HN) 2. TA = 25C 3. t RC = Read cycle time
CIN CI/O
VIN = 0 V VI/O = 0 V
7 10
pF pF
LH5116/H
tR
CE VCCDR -0.2 V
5116-6
tRC
tOH
tCHZ
tOHZ
5116-3
LH5116/H
tCW
CE tAS tWP (NOTE 2) WE tWHZ (NOTE 4) DOUT tDW tDH (NOTE 6) tOW (NOTE 5)
1. WE must be HIGH when there is a change in A0 - A10. 2. When CE and WE are both LOW at the same time, write occurs during the period tWP. 3. tWR is the time from the rise of CE or WE, whichever is first, to the end of the write cycle. 4. If CE LOW transition occurs at the same time or after WE LOW transition, the outputs will remain high-impedance. 5. DOUT outputs data with the same logic level as the input data of this write cycle. 6. If CE is LOW during this period, the input/output pin is in the output state. During this state, input signals of opposite logic level must not be applied.
5116-4
OE tCW CE tAS tWP (NOTE 2) WE tOHZ tOW (NOTE 5) DOUT (NOTE 4) tDW tDH (NOTE 6) DIN NOTES: 1. WE must be HIGH when there is a change in A0 - A10. 2. When CE and WE are both LOW at the same time, write occurs during the period tWP. 3. tWR is the time from the rise of CE or WE, whichever is first, to the end of the write cycle. 4. If CE LOW transition occurs at the same time or after WE LOW transition, the outputs will remain high-impedance. 5. DOUT outputs data with the same logic level as the input data of this write cycle. 6. If CE is LOW during this period, the input/output pins are in the output state. During this state, input signals of opposite logic level must not be applied. tOLZ
5116-5
LH5116/H
1.2
1.1
1.1
1.0
1.0
0.9
0.9
0.8 4.0
4.5
5.0
5.5
6.0
20
20
15
15
10
10
5 4.0
5 4.5 5.0 5.5 6.0 0 25 50 75 100 SUPPLY VOLTAGE VCC (V) AMBIENT TEMPERATURE TA (C) INPUT VOLTAGE VS. AMBIENT TEMPERATURE
2.5
2.5
2.0
2.0
0.5 4.0
0.5 4.5 5.0 5.5 6.0 0 25 50 75 100 SUPPLY VOLTAGE VCC (V) AMBIENT TEMPERATURE TA (C)
5116-7
LH5116/H
PACKAGE DIAGRAMS
24DIP (DIP024-P-0600)
24 13
DETAIL
13.45 [0.530] 12.95 [0.510] 0 TO 15 0.30 [0.012] 0.20 [0.008] 1 31.30 [1.232] 30.70 [1.209] 4.45 [0.175] 4.05 [0.159] 5.30 [0.209] 4.90 [0.193] 3.45 [0.136] 3.05 [0.120] 0.51 [0.020] MIN 2.54 [0.100] TYP. 0.60 [0.024] 0.40 [0.016] MAXIMUM LIMIT MINIMUM LIMIT 15.24 [0.600] TYP. 12
DIMENSIONS IN MM [INCHES]
24DIP-2
24SDIP (SDIP024-P-0300)
24 13 6.55 [0.258] 6.15 [0.242] 1 22.25 [0.876] 21.75 [0.856] 3.65 [0.144] 3.25 [0.128] 4.40 [0.173] 4.00 [0.157] 3.45 [0.136] 3.05 [0.120] 1.778 [0.070] TYP. 0.51 [0.020] MIN 0.56 [0.022] 0.36 [0.014] 12 0.30 [0.012] 0.20 [0.008]
DETAIL
0 TO 15
DIMENSIONS IN MM [INCHES]
24SDIP
LH5116/H
24SOP (SOP024-P-0450B)
1.27 [0.050] TYP. 1.70 [0.067] 13 8.80 [0.346] 12.40 [0.488] 8.40 [0.331] 11.60 [0.457]
24
10.60 [0.417]
12 1.70 [0.067] 0.20 [0.008] 0.10 [0.004] 0.15 [0.006] 1.025 [0.040] 2.40 [0.094] 2.00 [0.079] 0.20 [0.008] 0.00 [0.000] 1.025 [0.040] MAXIMUM LIMIT MINIMUM LIMIT
DIMENSIONS IN MM [INCHES]
24SOP
LH5116/H
Blank 24-pin, 600-mil DIP (DIP024-P-0600) D 24-pin, 300-mil SK-DIP (DIP024-P-0300) N 24-pin, 450-mil SOP (SOP024-P-0450B) CMOS 16K (2K x 8) Static RAM
Example: LH5116N-10 (CMOS 16K (2K x 8) Static RAM, 100 ns, 24-pin, 450-mil SOP)
5116-8
10