ULTRA LOW VOLTAGE CURRENT MIRROR OP AMP AND ITS APPLICATIONS $8, Rajput! and S. .Jamuar** "Thin Film Technology Group, National Physical Laboratory, New Delhi-110012 India, indian Insitute of Technology Delhi, Hauz Khas New Delhi-110016 India Email: ssraipnt@esnpLren icin , ssiamuar@eng.upm.edumy ABSTRACT. ‘This paper discusses the design of low vokage cuent nittor op amps and thir application. The proposed op {mp structure canbe used with 20 supply voltage and has open loop open loop gain of 752 dB Its applications in the dssgn of low volge buffer and subsequent in design of CCI have been examined. The voliage bur hae aoe i-to-i input nd output vollage swings and | bandwidth of S30MHz. The proposed CCls have lst ribo omen tssfer wit bandwith of 690ME2 |LINTRODUCTION Porabily of electronic systems has generated the need for having low voltage, low power systems. The design of Inegrated eres (ICs) capable of working with solar cols oflen many possibilities in porable analog signal Drocesing applications, But the voltage generated by the Sar celle quite smal almost egal O.SV. So, here i {eed to investigate into new citut, which can be ‘operated ith low woiage (LV). In his paper, we have presented the design of a cueat miror operational "plier (op amg), which can be operated wth soar el "A LV euentmiror (CM) bas Been wsed as 2 basi ssalog cellt inthe design. All analog cites have Baca cnsruted ar combination of several LV analog cal. Now itis possible to operate the resultant cies wi ow supply vollages. This s the design techniqe that is being txplred in this paper forthe design of LV eae ror ‘op amps (LYCMOA). The LVCMOAS have been wed in ‘he design of LV voltage buffers (LVVBS) and LV cure conveyor II (CCI). hss been shown trough P-pce Smltons that the reat retires are igh performing and moduli atte 2.LV CURRENT MIRROR [As the vie sizs ae shrinking the ouput impedance of the MOSFET js also reducing du to the chanel length ‘modulation. For having high guts we need high ouput Impedance of the devices and short chanac] MOSFETs ‘not provide igh ein sactures for whch ascoding of [MOSFET isthe obvious echigue. Cascodes MOSFETs ‘crease the gins but it dacreass the ouput igal swing 0-7803-7690-002/817 00 62002 IEEE 145 aswell. AS Vrs ofthe order of 0.75V, cascode strctres ‘eonat be used i LY systems (1-2) Sclfcascode MOSFETs If the eieit weed is modified im euch a vay that the basing of the wanssior M2 does ot fet the output voltage ring the ouput impedanes of the siacre ean ‘be inresed fo hve high gain sutures a LV level. One ofthe techies isto use the sl cascode stucare which oes not require high compliance voltages at ouput nodes land provides high oupur impedance to give high ouput ‘sins. This approach has potential eppictions in low vollge design ‘A selfcascode is w 2éransistor stuctre (Fig. (0) which can eal be trestd as sngle composite transistor Gig. 1). The composte sructwe has much larger effective chanel length and the effective output onductnce is much low. The lower tansitor MI is quivalent to resistor, where vale i lapat dependant, For optinal operation, the WL rato of M2 is kept larger than tat of MI, ie, m1. For the composite transiser, the effective tans conductance (Saute) Wil be given as Bs oy Fig 1 SelPexscode MOSFET ‘The dain crvent (Ip) trough Mand M2 wil be givens 5]Pasay, 5} ® haere etaoe a © AiPy(Bi+B) which can be Tiron rp The ge Seen te and din of i sal and there ino appreciable diference between the Vsurof composite and simple transistor and a se-cascodecan be ‘ed in low vollage operation. For a selcascndesrctre Voser= Vash} Vouk) i) ‘The operating voluge of regular cascode is much higher tan that of seeascode, The advantage fred by selfeascode structure is that it offs high output impedance similar to 2 eascode structure wile minim utp voluge requirements are similar ott of «single transistor, A CM bas on cel-cascode MOSTETs [5] is sown in Fig 2. The ouput compliance voltage is gg 88) = Waals) + Val 80) @ wher all symbols have doit uns! moasings This votage {double ofthe compisnce voltage (Fag) that a simple CCM offers. Bu the ouput inpedance is equivalent 19 3 cascode CM. the input compliance voltage wil bee set, fone Vp This voltage is equal to simple or regulated fascode srcture and definitely less thn a cascode CM find is unaccepable in several applications where we ‘operete the eruit at low voltages and require high input signal sing as well @ Fig.2 Low voligecuent mirror S:LV CURRENT MIRROR OF AMP ‘The modified CMOA is shown in Fi. 3 (6s working is simular to any commonly used CMOA except that i uses LEVCMe. The ouput eurent is gven Tog = Mbp ~Fo0) o where Jy and Tena the drain curents of MI and M2 respectively and Fi the current grin fom the input ‘easisiors tothe ouput sie of the CM, ‘The transfer fection of CMOA closely approximates 2 ‘single pole operation andthe voltage gin sven by: ay alta, " iC, ‘where gq and G; are the trans-conductance and Toad ‘apeciance, o ig, LV curent mirror op amp For P-Spce simulations, IL ratios of 1Oum0.254m Inve ben ake fr MI and M2. fa as been assed 9 SuA and his taken as unity The structre consumes O2mW power with Re aod Rqs ae 10" 2 and 15.90, The circuit has a voltage gain of $750, The ouput port caracterte is shown in Fig 4. The fequency response isshown in Fig 5 BS ga dar Bos a age i Fig. 4 Output characteristics 4. APPLICATIONS 4. LY voltage batter Ina iferentia pair (6 loads at the dns of transistors sre aot equal. The lod for the dain of one transite low (gms wile the load resistance atthe dun of the other transistor is too high (IMO). The high load resistance with tay capacitance gives large ime constant resulting in lower bandit forthe VB 146“, = Head Ve. Bot ia 6 SS ee ae. 0) wo 4 4 _ > Bad i mei ad eM ne Ane aes ‘gnin reduces to equation (9), which shows that it has : Sart es ‘Te circuit shown in Fig. 6 can eliminate the Nigh impedance node Ta dis creat, he loads connected to MI and. M2 are low and idenical and we expect higher ‘bandwidth for this crcuit Because the tne const rch smaller, A volage feedback mechanism mains the cuon though MI and M2 eq, thereby fring the ‘exact voltage tansfr ade output por X. Fig. 6 Proposed CMOA based volagebufer tons is applied at gate of MI, the opr volage i alae atthe gate of M2. The curren dough te rain {FMI (Up) ad dai of MD (J) are givens Boa, ray! toy By Yn o Poy py toy Ey Py © Vir and fyi imply FeV [AD thy Toads athe drains of MI and M2 ae low, the rain voltages of MI and M2 ean easly approseh Von. “This can give aca raiMo-rall input and ouput voltage sing capability otis ce. At Tow fequecy, voltage transfer (VT) fetion sven as: Ya. ow a and voltage gains wi ita“ Bu “Athgh frequency, VT sven as o 147 parameters ad presence of stay capacitances woud rel Sn it bandwith ‘The effet of mismatch in the dvice parameters is evaluated by asaming, got Sorta a8 = BSE l= FrAland am AL 9 Be, Vi gp 2A 28 ay 1 Tae For P-Spee simulation WIL ratios hasbeen assumed ‘hun. 254m for NMOS and 30jm0.25}m for PMOS. ‘az Bas boon assumed as 250 4A. The simulated output impedance i 10°02. The voltage tansfe is alos rio rl (Fig 7) The bandwith ofthe ici is S40 MERz as town in Fig Fed = pt AS 43 eA tageitole 8% OF pe nanipecirs a: i K Fig 8 Frequency esposeofvltage bute 42. LV Glas A current conveyor IL ‘CMOA ta been converted into class A CCI (Fig. 9) (6) ‘The cict analysis at low fequncies reas in Vs fot Bat Fy bas Bt 0)