Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
Biasing Circuits
VBB
RC
RB
• Therefore,
VCE = VCC – ICRC
• Applying KVL,
• βDC varies from device to device
VCC = IBRB + VBE resulting in the variation of IC.
• A good biasing circuit is to
• Therefore, maintain a constant IC while βDC
VCC -VBE varies.
IB =
RB
LE210 Lecture Notes 2002 Edition: 3
BJT Biasing Circuits
DC Load Line
IC
• The dc load line is a graph that
represents all the possible IC(sat)
combinations of IC and VCE for a
given BJT circuit.
VCC
IC VCE(off) VCE
RC
RB IB
A generic dc load line
C
B VCE • Ideally,
IC
2 kΩ
RB 6 mA
12 V VCE
VCC 12
IC(sat) = = = 6 mA
R C 2k The dc load line
VCE(off) = VCC = 12 V
β DC (VCC -VBE )
• When a BJT does not have an ac IC =
input, it will have specific dc RB
values of IC and VCE. (100)(8-0.7)
= =2.028 mA
• These values will correspond to a 360k
specific point on the dc load line.
• This point is called the Q-point. VCE = VCC - IC R C
The letter Q comes from the word = 8 - (2.028mA)(2k) = 3.94 V
quiescent, meaning at rest.
2 kΩ
360 kΩ 4 mA
βDC = 100
2.028 mA Q
3.94 V 8V VCE
V 8
IC(sat) = CC = = 4 mA
R C 2k The dc load line
• Applying KVL,
RB
IC
RC
IC IB
RC
R1 I1
RBB
C
VBB
IB
B VCE RE IE
I2 VBE E
R2
IE
• Replace circuit A with the
RE
thevenin equivalent circuit.
• Find VBB and RBB.
Circuit A
VCC
IC
RC
R1 I1
IB
R1
VBB = VCC RBB
R1 +R 2 VBB
+
RE IE
I2
R2 VBB=VOC
• Applying KVL,
VBB = I B R BB + VBE + I E R E
R1
= I B R BB + VBE + (β DC + 1)I B R E
R BB = R1 // R 2
VBB - VBE
IB =
R BB +(β DC + 1)R E
RBB
R2
β DC (VBB - VBE )
ICQ =
R BB +(β DC +1)R E
VCEQ = VCC - (R C + R E )ICQ ; β DC >> 1