Prime University

Department of Electrical and Electronic Engineering Course Conducted by: Shuvodip Das Digital Electronics Semester Final Examination Syllabus 1. Defination of Combinational logic Circuit (CLC) and Sequential logic circuit (SLC). Difference between CLC and SLC. 2. Applications of CLC. 3. Analysis, design and optimization of CLC problem 01 -04. 4. N-bit carry ripple adder equations. 5. Block diagram of 4-bit and 16-bit carry ripple adder. 6. Advantages of carry look ahead adder over carry ripple adder. 7. Carry look ahead adder- block diagram, equations. 8. 4-bit Borrow ripple subtractor- block diagram. 9. Constructing Subtractor circuit using adder circuit. 10.4 4 array multiplier logic circuit. 11.Defination- parity bit, even, odd parity. Advantages and disadvantages of parity bit. 12.Construction of 3-bit even/odd parity generator and detector circuit. truth table, boolean expression, logic circuit. 13.IC pin configuration 74280, 7448, 74382. 14.Common anode/cathode internal wiring of 7-segment display. 15.Ciruit diagram of BCD to 7-segment dispaly decoder and truth table. (Lab) 16.Defination and applications of MUX, DEMUX. 17.2:1, 4:1, 8:1 MUX & 1:2, 1:4, 1:8 DEMUX logic circuit and truth table. 18.Defination of BI/BL, LT, LE of 7-segment display. 19.Defination and application of ALU. 20.Funtional block diagram of ALU.

21.Operations of ALU (Clear, preset, Addition, subtraction). 22. Defination of Synchronous, asynchronous SLC, Flip-Flop. 23. Logic circuit, truth table, symbol of S-R NOR, NAND latch, Level triggered SR flip-flop, J-K flip-flop, Master-Slave Flip-Flop.