Electronics Lab Manual

Volume 1

K. A. Navas, M Tech
Asst.Professor, ECE Dept. College of Engineering Trivandrum Thiruvananthapuram-695016 kanavas@redimail.com

Rajath Publishers, Kochi 682020

Electronics Lab Manual Volume 1

Fourth edition

Copyright c 2008 Rajath publishers and the author jointly

This book is sold subjected to the condition that it shall not, by way of trade or otherwise, be lent, resold, hired out, or otherwise circulated without publishers prior written consent in any form of binding or cover other than that in which it is published and without a similar condition including this condition being imposed on the subsequent purchaser and without limiting the rights under copyright reserved above, no part of this publication may be reproduced, stored in or introduced into a retrieval system, or transmitted in any form or by any means(electronic, mechanical, photocopying, recording or otherwise), without prior permission of the copyright owner.

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Contents
1 ELECTRONICS WORKSHOP 1.1 Passive electronic components . . . . 1.2 Active electronic components . . . . 1.3 Colour code for resistors . . . . . . . 1.4 Coding for capacitors . . . . . . . . . 1.5 Numbering of semiconductor devices 1.6 Cathode ray oscilloscope . . . . . . . 1.7 Familiarisation of multimeters . . . . 1.8 DC source and signal generator . . . 1.9 Testing of electronic components . . 1.10 PCB fabrication . . . . . . . . . . . 1.11 Soldering practice . . . . . . . . . . . 1.12 Transformer winding practice . . . . 9 9 21 26 28 30 31 36 40 41 44 46 49

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2 BASIC ELECTRONICS LAB (SOLID 2.1 Characteristics of PN junction diode . 2.2 Characteristics of zener diode . . . . . 2.3 Characteristics of LED . . . . . . . . . 2.4 Rectier circuits . . . . . . . . . . . . 2.5 Study of lter circuits . . . . . . . . . 2.6 Clipping circuits (Shunt clippers) . . . 2.7 Clipping circuits (Series clippers) . . . 2.8 Clipping circuits using zener diodes . . 2.9 Clamping circuits . . . . . . . . . . . . 2.10 Clamping circuits using zener diodes . 2.11 CE Characteristics of transistor . . . . 2.12 CB Characteristics of transistor . . . . 2.13 Characteristics of JFET . . . . . . . . 5

STATE DEVICES LAB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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52 . 52 . 58 . 60 . 63 . 69 . 74 . 82 . 84 . 87 . 92 . 93 . 100 . 104

6 2.14 2.15 2.16 2.17 2.18 2.19 2.20 2.21 2.22 2.23 2.24 2.25 2.26 Characteristics of MOSFET . Characteristics of UJT . . . . Zener diode regulator . . . . RC integrator . . . . . . . . . RC dierentiator . . . . . . . RC low pass lter . . . . . . . RC high pass lter . . . . . . Series resonant circuit . . . . Parallel resonant circuit . . . Characteristics of SCR . . . . Characteristics of TRIAC . . Characteristics of DIAC . . . Solved examination questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Electronics Lab Manual Volume 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 111 114 116 119 121 123 125 127 129 132 133 135 152 152 156 164 167 170 173 177 179 184 187 189 192 196 197 200 202 207 211 216 218 221 227 232

3 ELECTRONIC CIRCUITS LAB 3.1 Transistor biasing circuits . . . . . . . . . . . . . . 3.2 RC-coupled amplier . . . . . . . . . . . . . . . . . 3.3 Two stage RC-coupled amplier . . . . . . . . . . . 3.4 Emitter follower . . . . . . . . . . . . . . . . . . . 3.5 Tuned amplier . . . . . . . . . . . . . . . . . . . . 3.6 Common source JFET amplier . . . . . . . . . . . 3.7 Source follower . . . . . . . . . . . . . . . . . . . . 3.8 Power amplier . . . . . . . . . . . . . . . . . . . . 3.9 Dierential amplier . . . . . . . . . . . . . . . . . 3.10 Dierential amplier with constant current source 3.11 Cascode amplier . . . . . . . . . . . . . . . . . . . 3.12 RC phase shift oscillator . . . . . . . . . . . . . . . 3.13 RC phase shift oscillator using JFET . . . . . . . . 3.14 Wien bridge oscillator . . . . . . . . . . . . . . . . 3.15 Wien bridge oscillator using JFET . . . . . . . . . 3.16 Hartley and Colpitts oscillators . . . . . . . . . . . 3.17 Series voltage regulator without feedback . . . . . 3.18 Series voltage regulator with feedback . . . . . . . 3.19 Crystal oscillator . . . . . . . . . . . . . . . . . . . 3.20 Transistor as a switch . . . . . . . . . . . . . . . . 3.21 Bistable multivibrator . . . . . . . . . . . . . . . . 3.22 Monostable multivibrator . . . . . . . . . . . . . . 3.23 Astable multivibrator . . . . . . . . . . . . . . . .

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Electronics Lab Manual Volume 1 3.24 3.25 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 3.34 3.35 3.36 3.37 3.38 3.39 3.40 Gated astable multivibrator . . . . . . Schmitt trigger . . . . . . . . . . . . . Sweep wave generator . . . . . . . . . Linear sweep wave generator . . . . . Miller sweep circuit . . . . . . . . . . . Bootstrap sweep circuit . . . . . . . . Current time base generator . . . . . . UJT relaxation oscillator . . . . . . . . Feedback ampliers . . . . . . . . . . . UJT control of SCR . . . . . . . . . . TRIAC controlled with DIAC . . . . . Controlled full wave rectier . . . . . . Controlled bridge rectier . . . . . . . Light activated relay . . . . . . . . . . LVDT . . . . . . . . . . . . . . . . . . CA3028 cascode/dierential amplier Voltage controlled oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7 237 239 243 246 247 249 253 255 258 263 264 265 265 266 267 268 271 274 274 278 282 285 288 292 296 299 303 307 310 314 316 318 323 333 338 340 341

4 Digital Electronics Lab 4.1 Study of digital ICs and IC trainer kit . . . . . 4.2 TTL characteristics . . . . . . . . . . . . . . . . 4.3 Study of combinational circuits . . . . . . . . . 4.4 Half adder and full adder . . . . . . . . . . . . 4.5 Adder and subtractor circuits using 7483 . . . . 4.6 Code converters . . . . . . . . . . . . . . . . . . 4.7 Timing circuits using gates . . . . . . . . . . . 4.8 Timing circuits using 74121 and 74123 . . . . . 4.9 Flip ops using gates . . . . . . . . . . . . . . . 4.10 Shift registers . . . . . . . . . . . . . . . . . . . 4.11 Ring counter and Johnson counter . . . . . . . 4.12 Ring counter and Johnson counter using 7495 . 4.13 Ring counter and Johnson counter using 74194 4.14 Asynchronous counters . . . . . . . . . . . . . . 4.15 Synchronous counters . . . . . . . . . . . . . . 4.16 Counter ICs . . . . . . . . . . . . . . . . . . . . 4.17 Magnitude comparator . . . . . . . . . . . . . . 4.18 Multiplexers using gates . . . . . . . . . . . . . 4.19 Demultiplexers using gates . . . . . . . . . . . .

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8 4.20 4.21 4.22 4.23 4.24 4.25 4.26 4.27 4.28 4.29 4.30 4.31 4.32 4.33 4.34 4.35 4.36 4.37 Study of multiplexer ICs . . . . . . . . Logic design using multiplexer ICs . . Study of demultiplexer ICs . . . . . . Logic design using demux/decoder ICs Binary sequence generator . . . . . . . Sequence detector . . . . . . . . . . . . CMOS characteristics . . . . . . . . . TTL-CMOS interconnections . . . . . Static display . . . . . . . . . . . . . . Analog to digital converter . . . . . . Digital to analog converter . . . . . . . Astable multivibrator using 555 . . . . Monostable multivibrator using 555 . Parity generator and checker . . . . . Schmitt trigger using 7414 . . . . . . . Study of semiconductor memories . . . Solved examination questions . . . . . Unsolved examination questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Electronics Lab Manual Volume 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 342 348 351 355 357 358 362 363 365 367 370 373 377 379 381 382 384 390

Chapter 1

ELECTRONIC CIRCUITS LAB

1.1 TRANSISTOR BIASING CIRCUITS

Aim To bias a given BJT to work in a desired Quiescent operating point by employing dierent biasing techniques. Components and equipments required board, ammeter and voltmeter. Transistor, dc source, resistors, bread

Theory A BJT must be biased in active operating region to function as an amplier. In order to bias a BJT in active operating region, base-emitter junction must be forward biased and base-collector junction must be reverse biased. Biasing can be done with the help of a DC source and a few resistors. Dierent methods are used to bias the BJT. The objective of this experiment is to study the eect of the variation of the parameters on the operating point. Fixed bias circuit A resistor is used to tie the base of the transistor to VCC for the xed bias set up. Saturation conditions are avoided in this bias set up because the base-collector junction is no longer reverse biased. Therefore the signal output will not be distorted. However the stability of the circuit is poor against the parameter variations. Emitter-stabilized bias circuit The stability of the xed bias circuit can be improved signicantly by introducing a resistor RE in the emitter terminal. Collector feedback bias circuit Stability can be improved by introducing a feedback path from collector to base through a resistor. Though Q-point is not completely independent of (hF E ), current gain of the transistor, sensitivity to changes in or temperature variations are less than that for xed bias and emitter-bias congurations. Voltage divider bias circuit A potential divider resistor network R1 R2 provides 9

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Electronics Lab Manual Volume 1

the sucient voltages across the transistor junctions. This amplier set up is almost independent of . R1 and R2 are designed such that a stable voltage drop exists across them even when the base current varies. For this, current through R1 and R2 is assumed to be the same and it is much higher than the base current. Therefore R2 is made much greater than the resistance across base and emitter which is (1 + )RE . RE includes internal emitter resistance re also. Procedure 1. Set up the xed bias circuit after testing the components. Vary only one of the parameters VCC , RC , RB and and enter the updated values in the table. To change , use transistor BC177 whose is 75. 2. Repeat the experiments by changing other parameters. Draw the load line on a graph with VCE along x-axis and IC along y-axis. 3. Set up other bias circuits one by one. Repeat the experiments by changing one parameter at a time. Fixed bias circuit
VCC 12 V

RB 560 k

RC 3.3 k

VCC
A

RC

RB

VCE

IC

+ -

0-10 mA +
V
-

0-10 V

BC107

Design Select transistor BC107 since its ranges from 100 to 500 at IC = 2 mA, as per data sheet. Let the Q-point be VCE = 6 V, and IC = 2 mA at VCC = 12 V. Then VRC = IC RC = 6 V. From this, RC = 3 k. Use 3.3 k std.

12 Design

Electronics Lab Manual Volume 1

Let the Q-point be VCE = 6 V, and IC = 2 mA at VCC = 12 V. Voltage across RC = 6 V. From this, RC = 3 k. Use 3.3 k. VRB = VCE VBE = 6 V - 0.7 V = 5.3 V. Also, VRB = IB RB = 5.3 V. From this, RB = 265 k. Use 220 k. Voltage divider bias
V CC 12 V

R1 47 k

RC 2.2 k + A 0-10 mA BC107 + V 0-10 V RE 1k

VCC

RC

VCE

IC

R2 15 k

Design Let the Q-point be VCE = 6 V, and IC = 2 mA at VCC = 12 V. Assume voltage across RC = 4 V and that across RE = 2 V. VRC = IC RC = 4 V. From this, we get RC = 2 k. Use 2.2 k std. = 2 V. Because, IE IC . From this, we get RE = 1 k. Design of voltage divider R1 and R2 Assume the current through R1 = 10IB and that through R2 = 9IB to avoid loading of the potential divider network R1 and R2 by the base current. (In other words to keep the bias voltages across R1 and R2 stable against the base current variations). i.e., VR2 = VBE + VRE = 0.6 V + 2 V = 2.6 V. Also, VR2 = 9IB R2 = 2.6 V But IB = IC / = 2 mA/100 = 20 A. Then R2 =
2.6 920106

VRE = IE RE

= 14 k. Use 15 k.

VR1 = Voltage across R1 = VCC VR2 = 12 V - 2.6 V = 9.4 V Also, VR1 = 10IB R1 = 9.4 V. Then R1 =
9.4 = 1020106

47 k.

Electronics Lab Manual Volume 1

13

1.2

RC-COUPLED AMPLIFIER

Aim To design and set up an RC-coupled CE amplier using bipolar junction transistor and to plot its frequency response. Components and equipments required Transistor, dc source, capacitors, resistors, bread board, signal generator, multimeter and CRO. Theory RC-coupled CE amplier is widely used in audio frequency applications in radio and TV receivers. It provides current, voltage and power gains. Base current controls the collector current of a common emitter amplier. A small increase in base current results in a relatively large increase in collector current. Similarly, a small decrease in base current causes large decrease in collector current. The emitter-base junction must be forward biased and the collector base junction must be reverse biased for the proper functioning of an amplier. In the circuit diagram, an NPN transistor is connected as a common emitter ac amplier. R1 and R2 are employed for the voltage divider bias of the transistor. Voltage divider bias provides good stabilisation independent of the variations of . The input signal Vin is coupled through CC1 to the base and output voltage is coupled from collector through the capacitor CC2 . The input impedance of the amplier is expressed as Zin = R1 ||R2 ||(1 + hF E re ) and output impedance as Zout = RC ||RL where re is the internal emitter resistance of the transistor given by the expression = 25 mV/IE , where 25 mV is temperature equivalent voltage at room temperature. Selection of transistor Transistor is selected according to the frequency of operation, and power requirements. The hF E of the transistor is another aspect we should be careful about. Low frequency gain of a BJT amplier is given by the expression. Voltage gain Av = hF E RL . In the worst case with RL = Ri , AV = hF E . Ri hF E of any transistor will vary in large ranges. For example, the hF E of SL100 (a general purpose transistor) varies from 40 to 300. hF E of BC107 (an AF driver) varies from 100 to 500. Therefore a transistor must be selected such that its minimum guaranteed hF E is greater than or equal to AV required. Selection of supply voltage VCC For a distortionless output from an audio amplier, the operating point must be kept at the middle of the load line selecting VCEQ = 50% VCC (= 0.5VCC ). This means that the output voltage swing in either positive or negative direction is half of VCC . However, VCC is selected 20% more than the required voltage swing. For example, if the required output swing is 10 V, VCC is selected 12 V. Selection of collector current IC The nominal value of IC can be selected from

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Electronics Lab Manual Volume 1

the data sheet. Usually it will be given corresponding to hF E bias. It is the bias current at which hF E is measured. For BC107 it is 2 mA, for SL100 it is 150 mA, and for power transistor 2N3055 it is 4 A. Design of emitter resistor RE Current series feedback is used in this circuit using RE . It stabilizes the operating point against temperature variation. Voltage across RE must be as high as possible. But, higher drop across RE will reduce the output voltage swing. So, as a rule of thumb, 10% of VCC is xed across RE . CC RE = VIRE = VIRE since IE IC , RE = 0.1 VIC E C Design of RC Value of RC can be obtained from the relation RC = 0.4VCC /IC since remaining 40% of VCC is dropped across RC . Design of potential divider R1 and R2 Value of IB is obtained by using the expression IB = IC /hF E min. At least 10IB should be allowed to ow through R1 and R2 for the better stability of bias voltages. If the current through R1 and R2 is near to IB , slight variation in IB will aect the voltage across R1 and R2 . In other words, the base current will load the voltage divider. When IB gets branched into the base of transistor, 9IB ows through R2 . Values of R1 and R2 can be calculated from the dc potentials created by the respective currents. Design of bypass capacitor CE The purpose of the bypass capacitor is to bypass signal current to ground. To bypass the frequency of interest, reactance of the capacitor XCE computed at that frequency should be much less than the emitter resistance. As a rule of thumb, it is taken XCE RE /10. Design of coupling capacitor CC The purpose of the coupling capacitor is to couple the ac signal to the input of the amplier and block dc. It also determines the lowest frequency that to be amplied. Value of the coupling capacitor CC is obtained such that its reactance XC at the lowest frequency (say 100 Hz or so for an audio amplier), should be less than the input impedance of the amplier. That means XC must be Rin /10. Here Rin = R1 ||R2 ||(1 + hF E re ) where re is the internal emitter resistance of the transistor given by the expression = 25 mV/IE at room temperature. Procedure 1. Test all the components using a multimeter. Set up the circuit and verify dc bias conditions. To check dc bias conditions, remove input signal and capacitors in the circuit. 2. Connect the capacitors in the circuit. Apply a 100 mV peak to peak sinusoidal signal from the function generator to the circuit input. Observe the input and output waveforms on the CRO screen simultaneously.

Electronics Lab Manual Volume 1

15

3. Keep the input voltage constant at 100 mV, vary the frequency of the input signal from 0 to 1 MHz or highest frequency available in the generator. Measure the output amplitude corresponding to dierent frequencies and enter it in tabular column. 4. Plot the frequency response characteristics on a graph sheet with gain in dB on y-axis and logf on x-axis. Mark log fL and log fH corresponding to 3 dB points. (If a semi-log graph sheet is used instead of ordinary graph sheet, mark f along x-axis instead of logf ). 5. Calculate the bandwidth of the amplier using the expression BW= fH fL . 6. Remove the emitter bypass capacitor CE from the circuit and repeat the steps 3 to 5 and observe that the bandwidth increases and gain decreases in the absence of CE . Circuit diagram
VCC +12 V

CC1 10 F

R1 47 k

RC 2.2 k

CC2 10 F + -

Vo
RL 820

BC107
R2 10 k
RE 680

B E

Vin 100 mV

+C E - 22 F

BC107

Design Output requirements: Mid-band voltage gain of the amplier = 50 and required output voltage swing = 10 V. Selection of transistor Select transistor BC107 since its minimum guaranteed

hF E (= 100) is more than the required gain (=50) of the amplier. Quick Reference data of BC107 Type: NPN-Silicon, Application: In audio frequency

16 Maximum rating: Nominal rating:

Electronics Lab Manual Volume 1 VCB = 50 V, VCE = 45 V, VEB = 6 V, IC = 100 mA. VCE = 5 V, IC = 2 mA, hF E = 100 to 500. VCC is taken as 20% more than required ouput swing.

DC biasing conditions Hence VCC = 12 V.

IC = 2 mA, because hF E is guaranteed 100 at that current as per data sheet. In order to make the operating point at the middle of the load line, assume the dc conditions VRC = 40% of VCC = 4.8 V, VRE = 10% of VCC = 1.2 V and VCE = 50% of VCC = 6 V . Design of RC Design of RE VRC = IC RC = 4.8 V. From this, we get RC = 2.4 k. Use 2.2 k. VRE = IE RE = 1.2 V. From this, we get RE = 600 because

IE IC . Use 680 std. Design of voltage divider R1 and R2 Assume the current through R1 = 10IB and that through R2 = 9IB for a stable voltage across R1 and R2 independent of the variations of the base current. VR2 = Voltage drop across R2 = VBE + VRE . i.e., VR2 = VBE + VRE = 0.6 + 1.2 = 1.8 V. Also, VR2 = 9IB R2 = 1.8 V But IB = IC /hF E = 2 mA/100 = 20 A. Then R2 =
1.8 920106

= 10.6 k. Use 10 k.

VR1 = voltage across R1 = VCC VR2 = 12 V 1.8 V = 10.2 V Also, VR1 = 10IB R1 = 10.1 V. Then R1 = Design of RL :
10.2 1020106

= 50 k. Select 47 k std.

Gain of the common emitter amplier is given by the expression

AV = (rc /re ). Where rc = RC ||RL and re = 25 mV /IE = 25 mV /2 mA = 12.5 . Since the required gain = 50, substituting it in the expression we get, RL = 845 . Use 820 std. Design of coupling capacitors CC1 and CC2 XC1 should be less than the input impedance of the transistor. Here, Rin is the series impedance. Then XC1 = Rin /10. Here Rin = R1 ||R2 ||(1 + hF E re ) because is RE bypassed. We get Rin = 1.1 k. Then XC1 110 . So, CC1 1/2fL 110 = 14 F . Use 15 F std.

Electronics Lab Manual Volume 1 Similarly, XC2 Rout /10, where Rout = RC . Then XCE 240 . So, CC2 1/2 240 = 6.6 F. Use 10 F std. Design of bypass capacitors CE

17

To bypass the lowest frequency (say 100Hz), XCE should be less than or equal to the resistance RE . i.e., XCE RE /10 Then, CE 1/(2 100 68) = 23 F. Use 22 F. Graph
Gain in dB
M dB M-3 dB

Gain in dB
M dB M-3 dB

log fL
With CE

log f H

log f

log fL

log f H
Without CE

log f

Result With CE : Mid-band gain of the amplier =. . . . . . Bandwidth of the amplier =. . . . . . Hz Without CE : Mid-band gain of the amplier = . . . . . . Bandwidth of the amplier = . . . . . .Hz Troubleshooting
1. Before the ac signal is applied, check dc conditions of the amplier. Ensure that the transistor is in active region by verifying that the E-B junction is forward biased and C-B junction is reverse biased. 2. Replace RE by a pot and connect the bypass capacitor at the variable terminal of the pot. Verify whether VBE = 0.6 V. This is very important. 3. If the output waveform gets clipped, reduce the amplitude of the input signal, vary RC or adjust VCC slightly. 4. If the voltage at the collector VC = 12 V, collector circuit is not drawing current. Transistor is in cut o state. Base-emitter junction may not be forward biased. 5. If VC = 0, possible trouble is open collector circuit or collector shorted to earth. If VE = 0, emitter is drawing current.

18 Answered examination questions

Electronics Lab Manual Volume 1

1. Design and set up an amplier for the specications: gain = -50, output voltage = 10 VP P , fL = 50 Hz and calculate Zi . Negative sign of the gain indicates that the output of an RC coupled amplier is the amplied and inverted version of the input. fL should be considered while designing the coupling capacitor. Set up an RC coupled amplier for a gain of 50. To obtain an output voltage of 10 V peak to peak, take VCC 20% more than the required voltage swing. i.e., 12 V. To measure the input impedance, connect a 10 k resistor in series with the function generator and note down the potential dierence across the resistor. Then calculate the current through the resistor. The input impedance is equal to the ratio of the voltage at the right side of the 10 k resistor with respect to the current through it. 2. Set up an RC coupled amplier and measure its input and output impedances. Measurement of input resistance Method 1: Connect a known resistor (say 1 k) in series between the signal generator and the input of the circuit. Calculate the current though the resistor from the potential dierence across it. Since this current also ows into the circuit, input resistance can be measured taking the ratio of the voltage at the right side of the resistor to the current. Method 2: Connect a pot in series between the signal source and the input of the circuit. Adjust the pot until the input voltage to the circuit is 50% of the signal generator voltage. Remove the pot from the circuit and measure its resistance using a multimeter. Measurement of output resistance Method 1: Measure the open circuit output voltage. This is the Thevenin voltage. Output resistance of the circuit is actually the Thevenin resistance in series with the Thevenin voltage. Connect a known value resistor, say 1 k and measure the voltage across it. A reduction in the output voltage can be observed. Calculate the current through the resistor. Since this current also ows trough the Thevenin resistance, output resistance is the ratio of the dierence in the output voltage to the current. Method 2: Connect a pot at the output of the circuit. Adjust the pot until the voltage across it is 50% of the open circuit voltage. Remove the pot from the circuit and measure its resistance using a multimeter. 3. Set up an RC coupled amplier using a PNP transistor for a gain = 20 dB and stability factor = 5. When a PNP transistor is used, polarity of supply voltage VCC must be reversed. Convert dB to linear scale. Take stability factor 5 = 1 + RB /RE , where RB = R1 parallel with R2 . 4. Design and set up an RC coupled amplier for a stability factor of 5 and fH = 30 kHz. Design the amplier as described in the previous question. Use a capacitor in parallel to the output to function as a low pass ler for a cut o frequency fH = 1/2RC C.

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11. How is the input of the RC coupled amplier phase shifted by 180 at the output? The collector voltage is given by the expression VC = VCC IC RC . The increase in the input voltage causes an increase in the collector current. Increase in the collector current reduces the collector voltage. Inverse is also true. Thus the amplier provides the phase inversion.

Exercise
1. Dierentiate between ac and dc load lines? Explain their importance in amplier analysis. 2. Why is the center point of the active region chosen for dc biasing? 3. What happens if extreme portions of the active region are chosen for dc biasing? 4. Draw the output characteristics of the amplier and mark the load-line on it. Also mark the three regions of operation on the output characteristics. 5. Which are the dierent forms of coupling used in multi-stage ampliers? 6. Draw hybrid and hybrid- equivalent models of a transistor in the CE conguration. 7. Draw the Ebers-Moll model of a BJT. 8. What are self bias and xed bias? 9. Give a few applications of RC-coupled amplier.

Table 1.1: Maximum ratings of commonly used transistors Number BC107 2N2222 SL100 SK100 BC147 BC177 BF194 BF195 2N3055 Type Si, Si, Si, Si, Si, Si, Si, Si, Si, NPN NPN NPN PNP NPN PNP NPN NPN NPN Application Audio, low power Switching General purpose General purpose Driver Driver AM radio AM radio High power IC 100 mA 800 mA 1 A 1 A 200 mA 200 mA 30 mA 30 mA 15 A = hF E 100-500 100-300 40-300 40-300 125-500 75-260 67-220 36-125 20-70 Package TO TO TO TO MM TO TO MM TO 18 18 5 5 10 18 92 10 3

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1.3
Aim

TWO STAGE RC-COUPLED AMPLIFIER

To design, set up and study a two stage RC coupled CE amplier using BJT.

Components and equipments required Transistor, dc source, capacitors, resistors, bread board, signal generator, multimeter and CRO. Theory Multistage ampliers are used in cascade to improve parameters such as voltage gain, current gain, input impedance and output impedance etc. Common emitter stages are cascaded to increase the voltage gain. A two stage amplier provides an overall voltage gain of A1 A2 , where A1 and A2 are the gains of rst and second stages respectively. Since each stage provides a phase inversion, the nal output signal is in phase with the input signal. The input impedance of the second stage is in parallel with RC1 of the rst stage. The ac voltage gain of the rst stage is A1 = RC1 ||Rin2 /(re + Re ) where Rin2 is the input resistance of the second stage. Rin2 = R12 ||R22 ||(1 + hF E re ) The ac voltage gain of the second stage is A2 = (RC2 ||RL )/re Care must be taken while selecting A1 and A2 . If A1 is large, the input to the second stage will become too high. This may pull out the transistor of the second stage from active region. For example, if we need an overall voltage gain of 100, select A1 = 4 and A2 = 25. Gain of the rst stage can be controlled by a negative feed back in series with the emitter. This is achieved by the unbypassed resistor Re . Circuit diagram
VCC +12 V

CC1 22 F

R11 47 k

RC1 2.2 k

CC2 22 F

+
BC107

R12 47 k

RC2 2.2 k

CC2 22 F

Vin 100 mV

BC107

R21 10 k

Re 180 Re 470

R22 10 k
+ CE - 33 F

RE 680

+ C E - 33 F

RL 470

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Electronics Lab Manual Volume 1 RL CC >> TS where TS is the lowest signal frequency (20 Hz). CC = 1/(220RL ) = 360 F . Use 470 F std.

Class-AB power amplier

+V CC +6 V

R 1k

C C 470 F

- +

1N4001

RB 1k

T2 SL100 CC 470 F

+ -

VO

Vin 2 VPP 20 Hz

- +
C C 470 F
1k

1N4001

T1 SK100

RL 22

Design Design of class-AB power Design of RL and CC is same as that of class-B amplier. Design of R and RB The bias current through the compensating diodes ID is

same as the ICQ in order to match the diode curves and VBE curves of the transistor. ICQ should be 1 to 5 percent of collector saturation current ICsat . Average current ICsat = VCEQ /RL = 3/RL = 43 mA ICQ = ID = ICsat 5% = 2.15 mA Applying KVL in the diode bias network, 6 V = ID 2R + 1.2 V + ID RB ID RB should be about 2 V to drive into class-AB. ID RB = 2 V . From this RB = 930 . Use 1 k. Waveforms

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5. Calculate the bandwidth of the amplier using the expression BW = fH fL . Observation and graph
Vin =100mV f in Hz
V in Volts o

Gain (dB)

Gain in dB -3 dB

log fL

log f H

log f

Result Bandwidth = Hz. Answered viva-voce questions

1. Why is a cascode amplier called as wide band amplier? The miller capacitance present in ordinary CE amplier limits the high frequency operation. But in cascode amplier miller capacitance is absent and hence bandwidth is widened. 2. What are the characteristics of a cascode amplier? AV = Same that of CE stage, Zi = Same as that of CE stage Aj = Approximately equal to that of CE stage, Z0 = Very high like CB stage.

1.12

RC PHASE SHIFT OSCILLATOR

Aim To design and set up an RC phase shift oscillator using BJT and to observe the sinusoidal output waveform. Components and equipments required tors, potentiometer, breadboard and CRO. Transistor, dc source, capacitors, resis-

Theory An oscillator is an electronic circuit for generating an ac signal voltage with a dc supply as the only input requirement. The frequency of the generated signal is decided by the circuit elements. An oscillator requires an amplier, a frequency selective network, and a positive feedback from the output to the input. The Barkhausen criterion for sustained oscillation is A = 1 where A is the gain of the amplier and is the feedback factor. The unity gain means signal is in phase. (If the signal is 180 out of phase, gain will be 1.)

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If a common emitter amplier is used, with a resistive collector load, there is a phase shift between the voltages at the base and the collector. Feedback network between the collector and the base must introduce an additional 180 phase shift at a particular frequency. In the gure shown, three sections of phase shift networks are used so that each section introduces approximately 60 phase shift at resonant frequency. By analysis, resonant frequency f can be expressed by the equation, 180 f= 1 2RC 6 + 4Rc /R

The three section RC network oers a of 1/29. Hence the gain of the amplier should be 29. For this, the requirement on the hF E of the transistor is found to be hF E 23 + 29(R/RC ) + 4(RC /R). The phase shift oscillator is particularly useful in the audio frequency range. Circuit diagram
V +12 V CC

R1 47 k

RC 2.2 k

CC 1F

+ -

C 0.01F

Vo

C 0.01F C 0.01F

BC107
RE 680

R2 10 k

F - C 22

R 4.7 k

R 4.7 k

R 4.7 k

Design Output requirements Design of the amplier Sine wave with amplitude 10 VP P and frequency 1 kHz. Select transistor BC107. It can provide a gain more

than 29 because its minimum hF E is 100. DC biasing conditions VCC = 12 V, IC = 2 mA,VRC = 40% of VCC = 4.8 V, VRE = 10% of VCC = 1.2 V and VCE = 50% of VCC = 6 V.

52 Waveform
Vo

Electronics Lab Manual Volume 1

t T

Result Amplitude and frequency of sine wave = V, Hz respectively. Troubleshooting Ensure that the amplier provides sucient gain. For this, disconnect
the feedback, feed an input sine wave to the amplier and observe the output. Gain should be more than 33.

Answered examination questions

1. Obtain two sinusoidal signals which are 180 out of phase with each other. This can be obtained from an RC phase shift oscillator. Two 180 out of phase signals can be obtained from the base and collector terminals of the transistor. But the amplitude of the signal at base will be small and distorted.

Answered viva-voce questions

1. Classify the sinusoidal oscillators. Sinusoidal oscillators can be classied as RC and LC oscillators. LC oscillators are used for high frequency generation while RC oscillators for audio frequency generation. 2. Explain Barkhausen criteria for sustained oscillation. a) Total loop gain (A) of the circuit must be exactly unity, where A is the gain of the amplier and is the feedback factor. b) Total phase shift around the loop must be 360 . 3. What are the practical applications of a phase shift oscillator? RC-phase shift oscillator is widely used as audio frequency oscillator. 4. What happens when CE is removed? Why? When CE is removed, gain of the amplier decreases and oscillation gets damped. 5. Why is a minimum hF E value required for the circuit to function as an oscillator? A minimum hF E is required to obtain sucient gain for the amplier part to satisfy the Barkhausen criteria for oscillation. 6. How does one RC section generate a phase dierence of 60 ? Phase shift introduced by one RC network is tan1 (RC). Suitable values of R and C will provide 60 phase shift between input and output of one RC network at a particular frequency.

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1.17

SERIES VOLTAGE REGULATOR WITHOUT FEEDBACK

Aim To study the performance of zener diode regulator with emitter follower output and to plot line regulation and load regulation characteristics. Components and equipments required Transistor, zener diode, resistor, rheostat, dc source, voltmeter, ammeter and bread board. Theory The limitations of an ordinary zener diode regulator are, the changes in current owing through the zener diode cause changes in output voltage, the maximum load current that can be supplied is limited and large amount of power is wasted in zener diode and series resistance. These defects are rectied in a zener regulator with emitter follower output. It is a circuit that combines a zener regulator and an emitter follower. The dc output voltage of the emitter follower is V = VZ VBE . When input voltage changes, zener voltage remains the same and so does the output voltage. In an ordinary zener regulator, if the load current IL required is in the order of amperes, zener diode should also have the same current handling capacity. But in zener regulator with emitter follower output, current owing through the zener is IL /. Another advantage of this circuit is low output impedance. The expression for the output voltage can also be expressed as V = Vi VCE . This means that when the input voltage increases, output remains constant by dropping excess voltage across the transistor. The limitation of this circuit is that the output voltage directly depends on the zener voltage. This is rectied in the series voltage regulator with feedback using error amplier. Procedure 1. Set up the circuit on the bread board after identifying the component leads. Verify the circuit using a multimeter. 2. Note down output voltage by varying the input voltage from 0 V to 30 V in steps of 1 V. Plot line regulation characteristics with Vi along x-axis and V along y-axis. Calculate percentage line regulation using the expression V /Vi . 3. Keep the input voltage at 15 V and note down output voltage by varying load current from 0 to 500 mA in equal steps using a rheostat. Plot load regulation characteristics with IL along x-axis and V along y-axis.

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4. Measure the full load voltage VF L by adjusting the rheostat until ammeter reads 500 mA. 5. Remove the rheostat and measure the output voltage to get no-load voltage VN L . 6. Mark VN L and VF L on the load regulation characteristics and calculate load regulation as per the equation, VR = Circuit diagram VN L VF L 100% VN L

2N3055
1/2 W
+

100

RB
SZ9.1
+

0-1A 800 1A

0 - 30 V

V 0 - 30 V
_

0 - 30 V

Design Output requirements V = 8.5 V, IL = 500 mA when input is in the range 15 5 V. Selection of transistor Select the power transistor 2N3055 Details of 2N3055: type : Si-NPN. Application: AF Power, Maximum ratings: VCB = 100 V, VCE = 60 V, VEB = 7 V, IC max = 15 A, P = 115 W, Nominal ratings: VCE = 4 V, IC = 4 A, hF E = 20 to 70.
C is the case itself

2N3055
Top view

Pins are pointing towards viewer

Selection of zener diode We know that, VZ = V + VBE . Since the required output voltage V = 8.5 V,

VZ = V + 0.6 V = 9.1 V . Select SZ9.1 zener diode.

128 Result Mid-band gain of IF amplier = Centre frequency = Hz

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1.40

VOLTAGE CONTROLLED OSCILLATOR

Aim To design and set up a voltage controlled oscillator using astable multivibrator for a centre frequency of 1 kHz. Equipments and components required generator, bread board and dc supply. Transistors, resistors, capacitors, signal

Theory VCO is an oscillator whose frequency can be varied in accordance with an input voltage. It is possible to convert an astable multivibrator into a VCO by connecting an additional voltage source VBB to R1 and R2 . The collector supply remains VCC . If VBB is varied, the time period of output T changes in accordance with the equation T = 2RCln(1 + VCC /VBB ). With a xed value of VCC , it can be seen from the equation that the output frequency of the circuit is nonlinear function of VBB . However, this relation can be linearized by employing a constant current source for linear charging of the capacitor. This circuit is used as an FM generator because frequency of a signal is varied according to the amplitude of another signal.

Circuit diagram
V CC +10 V

Vin
RC 2.7 k

RE 22 k

RE 22 k

RC 2.7 k

R1 220 k

C E

Q3

2N869

C 0.1 F
Q 1 BC107

Q4

2N869

C 0.1 F
VB1
V B2

VC2
Q 2 BC107

R2 270 k

C B E Pinout of 2N869

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129

Choose transistor BC107 as Q1 and Q2 . For the design of astable part, refer astable multivibrator experiment. DC conditions Design of RE VCC = 10 V and IC = 2 mA. Let Vin be 2 V. Voltage across RE = Vin 2VBE = 2 V-1.2 V = 0.8 V.

Base current through Q1 or Q2 is IB = IC /hF E = 2 mA/100 = 20 A To ensure saturation, take base current = 2IB . 0.8 V /40 A = 20 k. Use 22 k std. Use 2N869 or equivalent as Q3 and Q4 Data of 2N869: Maximum ratings: VCB = 25 V, VCE = 18 V, VEB = 5 V, IC = 100 mA Nominal ratings: VCE = 5 V, IC = 10 mA, hF E = 20 (min) Design of R1 and R2 40A/20 = 2 A Assume base current IB of Q3 and Q4 = IC /hF E = Then RE < VRE /IB =

Let 10IB ows through R1 and 9IB through R2 A +5 V at the base of Q3 and Q4 will ensure that their collector base junctions get reverse biased to function as a CB amplier. Then R1 = 5V /10IB = 250 k. Use 220 k std. R2 = 5V /9IB = 278 k. Use 270 k. Graph
f Hz

Vin Volts

f in Hz

VinVolts

Procedure 1. Set up a conventional astable multivibrator using base resistors 82 k. Observe the collector and base waveforms of both transistors.

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2. If the astable multivibrator is found to be working properly, connect the remaining components. 3. Feed a 5 V, 10 Hz sine wave as the input Vin . Observe the input and output waveforms on CRO. 4. Replace the sine wave by a 5 V dc. Vary the dc voltage and note down the corresponding frequency. Enter it in tabular column and draw the graph with dc voltage along x-axis and frequency along y-axis. Waveforms

Vin

t VB1

VC1

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