A

Compal Confidential

HCW51 Schematics Document

AMD/Sempron/ATI RS485MC/SB460
2006 / 04 / 27

Rev:1.0

FOR MP

Compal Secret Data

Security Classification
2005/05/09

Issued Date

Deciphered Date

2006/03/08

Compal Electronics, inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Size Document Number

Custom 401411
Date:

, 08, 2006

Rev
D
Sheet
E

of

51

Compal confidential
Project Code: HCW51
File Name : LA-3121P

Thermal Sensor
ADM1032ARM
page 8

AMD Turion/Sempron CPU

Socket S1 638P

Clock Generator
ICS951462

533/667

DDRII

DDRII-SO-DIMM X2
page 10,11

page 6,7,8,9

Dual Channel

page 17

H_A#(3..31)

H_D#(0..63)
HT 16x16 800MHZ

CRT & TV-OUT

ATI-RS485MC

page 24

465 BGA

LCD CONN

page 12,13,14,15,16

page 25

A-Link Express
2 x PCIE

USB conn x 2 / New card

USB 2.0

page 34

ATI-SB460

BT Conn

USB 2.0

page 38

549 BGA

PCI BUS

Audio CKT
ALC883

AC-LINK

Mini PCI Socket

Mini card
page 31

page 18,19,20,21,22

Realtek
RTL8100CL
RTL8110SCL

ENE Controller
CB714

page 26

1394 Controller
VT6311S

page 27

6in1 CardReader
Slot
page 33

page 33

page 40

MDC Conn.
page 41

page 35

page 32

Slot 0

AMP & Audio Jack

page 39

SATA HDD Conn.

SATA

RJ45 CONN

page 23

LPC BUS

1394
Conn.

page 35

PATA One Channel HDD Conn.

CDROM Conn.
page 23

Power On/Off CKT / LID switch / Power OK CKT

page 37

DC/DC Interface CKT.

page 41

CIR/LED

SMsC LPC47N207

RTC CKT.

page 38

ENE KB910

page 36

page 28

page 18

Power Circuit DC/DC

Int. KBD

FIR module

page 42~48

page 29

Touch Pad
CONN. page

page 36

29

BIOS

page 30

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/03/08

Deciphered Date

Title

Compal Electronics, inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size Document Number

Custom 401411
Date:

R ev
D

, 08, 2006

Sheet
1

of

51

SIGNAL

STATE

Voltage Rails

Full ON

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

+VALW

+V

+VS

Clock

HIGH

HIGH

HIGH

HIGH

ON

ON

ON

ON

Power Plane

Description

S1

S3

S5

S1(Power On Suspend)

LOW

HIGH

HIGH

HIGH

ON

ON

ON

LOW

VIN

Adapter power supply (19V)

N/A

N/A

N/A

S3 (Suspend to RAM)

LOW

LOW

HIGH

HIGH

ON

ON

OFF

OFF

B+

AC or battery power rail for power circuit.

N/A

N/A

N/A

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

S4 (Suspend to Disk)

LOW

LOW

LOW

HIGH

ON

OFF

OFF

OFF

S5 (Soft OFF)

LOW

LOW

LOW

LOW

ON

OFF

OFF

OFF

+0.9V

0.9V switched power rail for DDR terminator

ON

ON

OFF

+1.2VS

1.05V switched power rail

ON

OFF

OFF

+1.5VS

1.5V switched power rail

ON

OFF

OFF

+1.8VALW

1.8V always on power rail

ON

ON

ON*

+1.8V

1.8V power rail for DDR

ON

ON

OFF

+1.8VS

1.8V switched power rail

ON

OFF

OFF

Vcc
Ra/Rc/Re

+2.5VS

2.5V switched power rail

ON

OFF

OFF

Board ID

+3VALW

3.3V always on power rail

ON

ON

ON*

+3VS

3.3V switched power rail

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON*

+5VS

5V switched power rail

ON

OFF

OFF

+VSB

VSB always on power rail

ON

ON

ON*

+RTCVCC

RTC power

ON

ON

ON

0
1
2
3
4
5
6
7

Board ID / SKU ID Table for AD channel

Board ID
0
1
2
3
4
5
6
7

External PCI Devices

IDSEL#

Ca rdBus(SD)

AD20

REQ#/GNT#
2

PIRQE/PIRQH

1 394

AD16

PIRQE

LAN(10/100)

AD17

PIRQF

Mini-PCI(WLAN/TV-Tuner) AD18

PIRQG/PORQH

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

Device

Address

Smart Battery

0001 011X b

Interrupts

EEPROM(24C16/02)

1010 000X b

(24C04)

EC SM Bus2 address
Device
ADM1032

BTO Item
WITH TV-OUT
WITH FIR
WITH CARD READER
WITH 1394
WITH EXPRESS CARD
WITH CIR
WITH LAN(10/100)
WITH LAN(10/100/1000)
WITH GIGA LAN(8110SBL)
WITH GIGA LAN(8110SCL)
WITH PATA HDD
WITH SATA HDD
WITH BLUETOOTH
WITH USBx2
WITH LPC47N207
WITH SIO1036
WITH SIO BOTH
WITH SSC
W/O SSC
DIP CAP

SKU ID Table

Address

SKU ID
0
1
2
3
4
5
6
7

1001 100X b

1011 000X b

SB460 SM Bus address

Device

Address

Clock Generator
(ICS951462)

1101 001Xb

DDR DIMM0

1001 000Xb

DDR DIMM2

1001 001Xb

SKU
W / O SATA
WITH SATA

BOM Structure
TV@
FIR@
61@
1394@
EXPRESS@
CIR@
100@
GIGA@
8110SB@
8110SC@
PATA@
SATA@
BT@
USB2@
SIO1@
SIO2@
SIOALL@
SPREAD@
NOSPREAD@
45@

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/03/08

Deciphered Date

Title

Compal Electronics inc

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

BTO Option Table

PCB Revision
UMA
DISCRETE

EC SM Bus1 address

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

BOARD ID Table

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Device

3.3V +/- 5%
100K +/- 5%
Rb / Rd / Rf
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

Size Document Number

Custom 401411
Date:

R ev
D

, 08, 2006

Sheet
1

of

51

HTREFCLK
66MHZ
NB-OSC
14.318MHZ

SB460
SB-OSCIN
14.318MHZ

2 PAIR MEM CLK

REV SO-DIMM

2 PAIR MEM CLK

NB PCIE CLK
100MHZ
SB PCIE CLK
100MHZ
SB-OSCIN
14.318MHZ

EXTERNAL

PCIE CLK
100MHZ

1 PAIR CPU CLK

200MHZ

PCI CLK1
33MHZ

EC-CB714

PCI CLK2
33MHZ

MINI PCI SLOT

PCI CLK3
33MHZ
SD CLK
48MHZ

Cardbus
CB714

PCI CLK4
33MHZ
SB-OSCIN
14.318MHZ

TP_CLK

TOUCH PAD

1394
VT6311S

PCI CLK5
33MHZ

CLK GEN.
ATHLON64 S1 CPU

LAN RTL8100CL

ATI SB

ATI NB - RS485MC
NEAR SO-DIMM

PCI CLK0
33MHZ

SIO CLK
14.318MHZ

SUPER IO

PCI EXPRESS CARD - 1 LANE

LGA638 PACKAGE
PCIE CLK
100MHZ

MINI CARD - 1 LANE

AZALIA_BITCLK
PCIE CLK
100MHZ
USB CLK
48MHZ

25M Hz

AZALIA CODEC

SD CLK
48MHZ

32.768K Hz

SIO CLK
14.318MHZ

14.31818MHz

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/10/10

Deciphered Date

Compal Electronics inc

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 08, 2006

Sheet
1

of

51

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/10/10

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics inc

SCHEMATIC, M/B LA-3121P

Size Document Number

Custom 401411
Date:

R ev
D

, 08, 2006

Sheet
1

of

51

PROCESSOR HYPERTRANSPORT INTERFACE

D

VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER

SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

+1.2V_HT
JP23A

+1.2V_HT
R38 1
R37 1

(12)
(12)
(12)
(12)

H_CLKIP1
H_CLKIN1
H_CLKIP0
H_CLKIN0
2 51_0402_1%
2 51_0402_1%

(12) H_CTLIP0
(12) H_CTLIN0

L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0

T4
T3
V5
U5
V4
V3
Y5
W5
AB5
AA5
AB4
AB3
AD5
AC5
AD4
AD3
T1
R1
U2
U3
V1
U1
W2
W3
AA2
AA3
AB1
AA1
AC2
AC3
AD1
AC1

H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8
H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0

L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0

Y4
Y3
Y1
W1

H_CLKOP1
H_CLKON1
H_CLKOP0
H_CLKON0

L0_CTLOUT_H1
L0_CTLOUT_L1

T5
R5

L0_CTLIN_H0
L0_CTLOUT_H0
L0_CTLIN_L0
L0_CTLOUT_L0
FOX_PZ63823-284S-41F

R2
R3

J5
K5
J3
J2

L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0

H_CTLIP1
H_CTLIN1

P3
P4

L0_CTLIN_H1
L0_CTLIN_L1

H_CTLIP0
H_CTLIN0

N1
P1

H_CTLOP0
H_CTLON0

H_CLKOP1
H_CLKON1
H_CLKOP0
H_CLKON0

+5VS
1

H_CLKIP1
H_CLKIN1
H_CLKIP0
H_CLKIN0

H_CADOP15 (12)
H_CADON15 (12)
H_CADOP14 (12)
H_CADON14 (12)
H_CADOP13 (12)
H_CADON13 (12)
H_CADOP12 (12)
H_CADON12 (12)
H_CADOP11 (12)
H_CADON11 (12)
H_CADOP10 (12)
H_CADON10 (12)
H_CADOP9 (12)
H_CADON9 (12)
H_CADOP8 (12)
H_CADON8 (12)
H_CADOP7 (12)
H_CADON7 (12)
H_CADOP6 (12)
H_CADON6 (12)
H_CADOP5 (12)
H_CADON5 (12)
H_CADOP4 (12)
H_CADON4 (12)
H_CADOP3 (12)
H_CADON3 (12)
H_CADOP2 (12)
H_CADON2 (12)
H_CADOP1 (12)
H_CADON1 (12)
H_CADOP0 (12)
H_CADON0 (12)

U1
+5VS
+VCC_FAN1
(28) EN_DFAN1

1
2
3
4

EN_DFAN1
1

VEN
VIN
VO
VSET

GND
GND
GND
GND

D3
CH355PT_SOD323
W=40mils

8
7
6
5

+VCC_FAN1

L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0

FAN Conn

FAN1

G993P1U_SOP8L

C83

N5
P5
M3
M4
L5
M5
K3
K4
H3
H4
G5
H5
F3
F4
E5
F5
N3
N2
L1
M1
L3
L2
J1
K1
G1
H1
G3
G2
E1
F1
E3
E2

C47
10U_0805_10V4Z

2
10U_0805_10V4Z

2
1000P_0402_50V7K

D4
1N4148_SOT23

C90

H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

JP20

+3VS

1
2
3

1
2
3

4
5

GND
GND

H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

AE5
AE4
AE3
AE2

HTT Interface

(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)
(12)

2 C455
4.7U_0805_10V4Z

VLDT_B3
VLDT_B2
VLDT_B1
VLDT_B0

VLDT_A3
VLDT_A2
VLDT_A1
VLDT_A0

R34
10K_0402_5%
2

D4
D3
D2
D1

C92
1000P_0402_50V7K

ACES_85205-03001

(28) FAN_SPEED1

(12)
(12)
(12)
(12)

H_CTLOP0 (12)
H_CTLON0 (12)
B

Athlon 64 S1
Processor Socket

+1.2V_HT

1
C164

1
C156

1
C158

1
C163

2
2
2
2
4.7U_0805_10V4Z
0.22U_0402_10V4Z
4.7U_0805_10V4Z
0.22U_0402_10V4Z

C145
180P_0402_50V8J
1

C152
180P_0402_50V8J

LAYOUT: Place bypass cap on topside of board

NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
TO OTHER HT POWER PINS
PLACE CLOSE TO VLDT0 POWER PINS

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/10/11

Deciphered Date

Compal Electronics inc

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 08, 2006

Sheet
1

of

51

Processor DDR2 Memory Interface

JP23C

+1.8V
+0.9VREF_CPU
4

+0.9V

JP23B

10:8:10:8:10

R22
39.2_0402_1%~D

PLACE THEM CLOSE TO

CPU WITHIN 1"

Y10
AE10
AF10

(10)
(10)
(10)
(10)

DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#

(11)
(11)
(11)
(11)

DDR_CS3_DIMMB#
DDR_CS2_DIMMB#
DDR_CS1_DIMMB#
DDR_CS0_DIMMB#

(11) DDR_CKE1_DIMMB
(11) DDR_CKE0_DIMMB
(10) DDR_CKE1_DIMMA
(10) DDR_CKE0_DIMMA
(10) DDR_A_MA[15..0]

DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#

VTT_SENSE
M_ZN
M_ZP

V19
J22
V22
T19

MA0_CS_L3
MA0_CS_L2
MA0_CS_L1
MA0_CS_L0

DDR_CS3_DIMMB# Y26
DDR_CS2_DIMMB# J24
DDR_CS1_DIMMB# W24
DDR_CS0_DIMMB# U23

MB0_CS_L3
MB0_CS_L2
MB0_CS_L1
MB0_CS_L0

DDR_CKE1_DIMMB
DDR_CKE0_DIMMB
DDR_CKE1_DIMMA
DDR_CKE0_DIMMA

H26
J23
J20
J21

MB_CKE1
MB_CKE0
MA_CKE1
MA_CKE0

DDR_A_MA15
DDR_A_MA14
DDR_A_MA13
DDR_A_MA12
DDR_A_MA11
DDR_A_MA10
DDR_A_MA9
DDR_A_MA8
DDR_A_MA7
DDR_A_MA6
DDR_A_MA5
DDR_A_MA4
DDR_A_MA3
DDR_A_MA2
DDR_A_MA1
DDR_A_MA0

K19
K20
V24
K24
L20
R19
L19
L22
L21
M19
M20
M24
M22
N22
N21
R21

MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0

DDR_A_BS#2
DDR_A_BS#1
DDR_A_BS#0

K22
R20
T22

MA_BANK2
MA_BANK1
MA_BANK0

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

T20
U20
U21

(10) DDR_A_BS#2
(10) DDR_A_BS#1
(10) DDR_A_BS#0
(10) DDR_A_RAS#
(10) DDR_A_CAS#
(10) DDR_A_WE#

MA_RAS_L
MA_CAS_L
MA_WE_L
FOX_PZ63823-284S-41F
Athlon 64 S1
Processor
Socket

DDR_A_CLK2

VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9

D10
C10
B10
AD10
W10
AC10
AB10
AA10
A10

MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1

Y16
AA16
E16
F16

MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1

AF18 DDR_B_CLK2
AF17 DDR_B_CLK#2
A17 DDR_B_CLK1
A18 DDR_B_CLK#1

DDR_A_CLK2
DDR_A_CLK#2
DDR_A_CLK1
DDR_A_CLK#1

DDR_B_CLK2 (11)
DDR_B_CLK#2 (11)
DDR_B_CLK1 (11)
DDR_B_CLK#1 (11)

MB0_ODT1
MB0_ODT0
MA0_ODT1
MA0_ODT0

W23
W26
V20
U19

DDR_B_ODT1
DDR_B_ODT0
DDR_A_ODT1
DDR_A_ODT0

MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0

J25
J26
W25
L23
L25
U25
L24
M26
L26
N23
N24
N25
N26
P24
P26
T24

DDR_B_MA15
DDR_B_MA14
DDR_B_MA13
DDR_B_MA12
DDR_B_MA11
DDR_B_MA10
DDR_B_MA9
DDR_B_MA8
DDR_B_MA7
DDR_B_MA6
DDR_B_MA5
DDR_B_MA4
DDR_B_MA3
DDR_B_MA2
DDR_B_MA1
DDR_B_MA0

MB_BANK2
MB_BANK1
MB_BANK0

K26 DDR_B_BS#2
T26 DDR_B_BS#1
U26 DDR_B_BS#0

DDR_B_BS#2 (11)
DDR_B_BS#1 (11)
DDR_B_BS#0 (11)

MB_RAS_L
MB_CAS_L
MB_WE_L

U24 DDR_B_RAS#
V26 DDR_B_CAS#
U22 DDR_B_WE#

DDR_B_RAS# (11)
DDR_B_CAS# (11)
DDR_B_WE# (11)

DDR_B_ODT1 (11)
DDR_B_ODT0 (11)
DDR_A_ODT1 (10)
DDR_A_ODT0 (10)
DDR_B_MA[15..0] (11)

(11) DDR_B_DM[7..0]

DDR_B_CLK2
1

DDR_A_CLK#2

1
C66
1.5P_0402_50V8C
DDR_B_CLK#2

DDR_A_CLK1

C35
1.5P_0402_50V8C

DDR_B_CLK1
1

DDR_A_CLK#1

1
C132
1.5P_0402_50V8C
DDR_B_CLK#1

PLACE CLOSE TO PROCESSOR

WITHIN 1.2 INCH

DDR_A_CLK2 (10)
DDR_A_CLK#2 (10)
DDR_A_CLK1 (10)
DDR_A_CLK#1 (10)

To reverse SODIMM socket

VTT_SENSE

TP3
M_ZN
M_ZP

PAD

M_VREF

DDRII Cmd/Ctrl//Clk

W17
R13
39.2_0402_1%~D

C173
1.5P_0402_50V8C

PLACE CLOSE TO PROCESSOR

WITHIN 1.2 INCH

(11)
(11)
(11)
(11)
(11)
(11)
(11)
(11)
(11)
(11)
(11)
(11)
(11)
(11)
(11)
(11)

DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DQS#0

DDR_B_D63
DDR_B_D62
DDR_B_D61
DDR_B_D60
DDR_B_D59
DDR_B_D58
DDR_B_D57
DDR_B_D56
DDR_B_D55
DDR_B_D54
DDR_B_D53
DDR_B_D52
DDR_B_D51
DDR_B_D50
DDR_B_D49
DDR_B_D48
DDR_B_D47
DDR_B_D46
DDR_B_D45
DDR_B_D44
DDR_B_D43
DDR_B_D42
DDR_B_D41
DDR_B_D40
DDR_B_D39
DDR_B_D38
DDR_B_D37
DDR_B_D36
DDR_B_D35
DDR_B_D34
DDR_B_D33
DDR_B_D32
DDR_B_D31
DDR_B_D30
DDR_B_D29
DDR_B_D28
DDR_B_D27
DDR_B_D26
DDR_B_D25
DDR_B_D24
DDR_B_D23
DDR_B_D22
DDR_B_D21
DDR_B_D20
DDR_B_D19
DDR_B_D18
DDR_B_D17
DDR_B_D16
DDR_B_D15
DDR_B_D14
DDR_B_D13
DDR_B_D12
DDR_B_D11
DDR_B_D10
DDR_B_D9
DDR_B_D8
DDR_B_D7
DDR_B_D6
DDR_B_D5
DDR_B_D4
DDR_B_D3
DDR_B_D2
DDR_B_D1
DDR_B_D0

AD11
AF11
AF14
AE14
Y11
AB11
AC12
AF13
AF15
AF16
AC18
AF19
AD14
AC14
AE18
AD18
AD20
AC20
AF23
AF24
AF20
AE20
AD22
AC22
AE25
AD26
AA25
AA26
AE24
AD24
AA23
AA24
G24
G23
D26
C26
G26
G25
E24
E23
C24
B24
C20
B20
C25
D24
A21
D20
D18
C18
D14
C14
A20
A19
A16
A15
A13
D12
E11
G11
B14
A14
A11
C11

MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0

DDR_B_DM7
DDR_B_DM6
DDR_B_DM5
DDR_B_DM4
DDR_B_DM3
DDR_B_DM2
DDR_B_DM1
DDR_B_DM0

AD12
AC16
AE22
AB26
E25
A22
B16
A12

MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0

DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DQS#0

AF12
AE12
AE16
AD16
AF21
AF22
AC25
AC26
F26
E26
A24
A23
D16
C16
C12
B12

MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0

MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0

AA12
AB12
AA14
AB14
W11
Y12
AD13
AB13
AD15
AB15
AB17
Y17
Y14
W14
W16
AD17
Y18
AD19
AD21
AB21
AB18
AA18
AA20
Y20
AA22
Y22
W21
W22
AA21
AB22
AB24
Y24
H22
H20
E22
E21
J19
H24
F22
F20
C23
B22
F18
E18
E20
D22
C19
G18
G17
C17
F14
E14
H17
E17
E15
H15
E13
C13
H12
H11
G14
H14
F12
G12

DDR_A_D63
DDR_A_D62
DDR_A_D61
DDR_A_D60
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56
DDR_A_D55
DDR_A_D54
DDR_A_D53
DDR_A_D52
DDR_A_D51
DDR_A_D50
DDR_A_D49
DDR_A_D48
DDR_A_D47
DDR_A_D46
DDR_A_D45
DDR_A_D44
DDR_A_D43
DDR_A_D42
DDR_A_D41
DDR_A_D40
DDR_A_D39
DDR_A_D38
DDR_A_D37
DDR_A_D36
DDR_A_D35
DDR_A_D34
DDR_A_D33
DDR_A_D32
DDR_A_D31
DDR_A_D30
DDR_A_D29
DDR_A_D28
DDR_A_D27
DDR_A_D26
DDR_A_D25
DDR_A_D24
DDR_A_D23
DDR_A_D22
DDR_A_D21
DDR_A_D20
DDR_A_D19
DDR_A_D18
DDR_A_D17
DDR_A_D16
DDR_A_D15
DDR_A_D14
DDR_A_D13
DDR_A_D12
DDR_A_D11
DDR_A_D10
DDR_A_D9
DDR_A_D8
DDR_A_D7
DDR_A_D6
DDR_A_D5
DDR_A_D4
DDR_A_D3
DDR_A_D2
DDR_A_D1
DDR_A_D0

MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0

Y13
AB16
Y19
AC24
F24
E19
C15
E12

DDR_A_DM7
DDR_A_DM6
DDR_A_DM5
DDR_A_DM4
DDR_A_DM3
DDR_A_DM2
DDR_A_DM1
DDR_A_DM0

MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0

W12
W13
Y15
W15
AB19
AB20
AD23
AC23
G22
G21
C22
C21
G16
G15
G13
H13

DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS0
DDR_A_DQS#0

DDR_A_D[63..0] (10)

To normal SODIMM socket

(11) DDR_B_D[63..0]

DD RII Data

VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER

SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

DDR_A_DM[7..0] (10)

DDR_A_DQS7 (10)
DDR_A_DQS#7 (10)
DDR_A_DQS6 (10)
DDR_A_DQS#6 (10)
DDR_A_DQS5 (10)
DDR_A_DQS#5 (10)
DDR_A_DQS4 (10)
DDR_A_DQS#4 (10)
DDR_A_DQS3 (10)
DDR_A_DQS#3 (10)
DDR_A_DQS2 (10)
DDR_A_DQS#2 (10)
DDR_A_DQS1 (10)
DDR_A_DQS#1 (10)
DDR_A_DQS0 (10)
DDR_A_DQS#0 (10)

FOX_PZ63823-284S-41F
Athlon 64 S1
Processor Socket

A1

A26

+1.8V

Athlon 64 S1g1

R33
1K_0402_1%

uPGA638

+0.9VREF_CPU
2

Top View

CPU_VREF_REF
C32

C33

C34

C29

C28

AF1

R23
2

1K_0402_1%

1000P_0402_50V7K

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1000P_0402_50V7K

1000P_0402_50V7K

VDD_VREF_SUS_CPU

Compal Secret Data

Security Classification

LAYOUT:PLACE CLOSE TO CPU

Issued Date

2005/05/09

Deciphered Date

2006/10/11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Compal Electronics inc

SCHEMATIC, M/B LA-3121P

Size Document Number

Custom 401411
Date:

Rev
D

, 08, 2006

Sheet
E

of

51

ATHLON Control and Debug

+1.8V

LAYOUT: ROUTE VDDA TRACE APPROX.

50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.

R7
300_0402_5%

+2.5VS
C506

+
2

FCM2012C-800_0805
150U_D2_6.3VM

C189

2
4.7U_0805_10V4Z

F8
F9

C187

2
0.22U_0603_16V7K

R372 1
C136
3300P_0402_50V7K

2 300_0402_5%
R582
R583

+1.8VS

R584 1
R585 1

(18) CPU_SIC
(18) CPU_SID

CPU_HT_RESET#
CPU_ALL_PWROK
CPU_LDTSTOP#

CPU_SIC_R
CPU_SID_R

2 @ 0_0402_5%
2 @ 0_0402_5%
R36
R35

+1.2V_HT

12/22 Modify

2 @ 300_0402_5%
2 @ 300_0402_5%

1
1

1
1

2 44.2_0603_1%
2 44.2_0603_1%

CPU_HTREF1
CPU_HTREF0

B7
A7
F10

RESET_L
PWROK
LDTSTOP_L

AF4
AF5

SIC
SID

P6
R6

HTREF1
HTREF0

F6
E6

VDD_FB_H
VDD_FB_L

5:10
+3VS

+1.8V

R64
4.7K_0402_5%

R63
300_0402_5%

CPU_ALL_PWROK

2
0_0402_5%

(17) CPUCLK#
R543 1

2 0_0402_5%

C5021

TP2
TP1

W9
Y9

CPU_CLKIN_SC_P
CPU_CLKIN_SC_N

NC7SZ08P5X_NL_SC70-5

R70 1

(18,19) CPU_PWRGD

C5011

3900P_0402_50V7K
R389
169_0402_1%

(17) CPUCLK

U5

2
2

PAD
PAD

C147 0.1U_0402_16V4Z
1
2

place them to CPU within 1"

@

CPU_VCC_SENSE
CPU_VSS_SENSE

(48) CPU_VCC_SENSE
(48) CPU_VSS_SENSE

+1.8VS

A9
A8

+1.8V
1

R88
300_0402_5%

DBRDY

AA9
AC9
AD9
AF9

TMS
TCK
TRST_L
TDI

E9
E8
G9
H10
AA7
C2
D7
E7
F7
C7
AC8

TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12

C3
AA6
W7
W8
Y6
AB6

TEST7
TEST6
THERMDC
THERMDA
TEST3
TEST2

P20
P19
N20
N19

RSVD0
RSVD1
RSVD2
RSVD3

U8

CPU_LDTSTOP#

2
0_0402_5%

NC7SZ08P5X_NL_SC70-5

R79 1

(14,19) LDT_STOP#

R544 1

2 0_0402_5%

CPU_THERMDC
CPU_THERMDA

10:10

+1.8VS

R71
300_0402_5%

+1.8V

R82

(18) LDT_RST#

SB_PWROK_R
0_0402_5%
LDT_RST#

R65 1

R26
R25
P22
R22

3
R545 1

2 0_0402_5%

AC6

CPU_PRESENT#

A3

PSI#

(48)
(48)
(48)
(48)
(48)
(48)

PSI# (48)

E10

CPU_DBREQ#

AE9

CPU_TDO

TEST29_H
TEST29_L

C9
C8

AE7
AD7
AE8
AB8
AF7

TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8

J7
H8
AF8
AE6
K8
C4

RSVD4
RSVD5
RSVD6
RSVD7

R68
1
2
80.6_0402_1%

CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N

ROUTE AS 80 Ohm DIFFERENTIAL PAIR

PLACE IT CLOSE TO CPU WITHIN 1"

5:5:5

TEST24
TEST23
TEST22
TEST21
TEST20

CPU_HT_RESET#

2
0_0402_5%

VID5
VID4
VID3
VID2
VID1
VID0

TDO

C282 0.1U_0402_16V4Z
2

NC7SZ08P5X_NL_SC70-5

VID5
VID4
VID3
VID2
VID1
VID0

DBREQ_L

U6

(19,37) SB_PWROK

PSI_L

A5
C6
A6
A4
C5
B5

R78
300_0402_5%

CLKIN_H
CLKIN_L

CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI

C155 0.1U_0402_16V4Z
1
2

VID5
VID4
VID3
VID2
VID1
VID0

AF6 H_THERMTRIP_S#
AC7 CPU_PROCHOT#_1.8

VDDIO_FB_H
VDDIO_FB_L

G10

CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1

THERMTRIP_L
PROCHOT_L

CPU_PRESENT_L

C PU_DBRDY

3900P_0402_50V7K

+1.8VS

VDDA2
VDDA1

JP23D

W=50mils

2 L4

MISC

RSVD8
RSVD9

H16
B18

RSVD10
RSVD11

B3
C1

RSVD12
RSVD13
RSVD14

H6
G6
D5

RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20

R24
W18
R23
AA8
H18
H19

CPU_TEST21_SCANEN

CPU_TEST26_BURNIN#

@
FOX_PZ63823-284S-41F
AMD NPT S1 SOCKET
Processor Socket

2 2

R3
10K_0402_5%
2

2
H_THERMTRIP_S#

2
G
3V_LDT_RST#

1K_0402_5%

R5
300_0402_5%

R572
220_0402_5%

R2
@ 1K_0402_5%

+3VALW

+3VS

+3VALW
R4

Q3
3
1H_THERMTRIP#
MMBT3904_SOT23

Q2
@ MMBT3904_SOT23
1
MAINPWON (42,43,45)

H_THERMTRIP# (19)

CPU_HT_RESET#

Q33

SAMTEC_ASP-68200-07
@

2N7002_SOT23

+1.8V

CPU_TEST26_BURNIN#
R366 1
CPU_PRESENT#
R369 1
CPU_TEST25_H_BYPASSCLK_H R47 1

2 300_0402_5%
2 1K_0402_5%
2 510_0402_5%

+1.8V
1

NOTE: HDT TERMINATION IS REQUIRED

FOR REV. Ax SILICON ONLY.

2
4
6
8
10
12
14
16
18
20
22
24
26

R365 1@ 220_0402_5%
2

1
3
5
7
9
11
13
15
17
19
21
23

R364 1@ 220_0402_5%
2

+3VALW
+1.8V

JP4

R363 1@ 220_0402_5%

+1.8V
+1.8V

R362 1@ 220_0402_5%

HDT Connector

R361 1@ 220_0402_5%
CPU_DBREQ#
C PU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO

+1.8V

+3VS
R8

+3VS

D+

VDD1

CPU_THERMDC

D-

ALERT#

THERM#

GND

EC_SMB_CK2

SCLK

EC_SMB_DA2

SDATA

300_0402_5%
510_0402_5%
300_0402_5%
300_0402_5%
Q4

1
R6
4.7K_0402_5%
@
A

CPU_PROCHOT#_1.8

3
1
MMBT3904_SOT23
C

(28) EC_SMB_DA2

CPU_THERMDA

2
2
2
2

(28) EC_SMB_CK2

R368 1
R54 1
R92 1
R91 1

2200P_0402_50V7K

CPU_TEST21_SCANEN
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1

U38
A

R374
@ 10K_0402_5%

0.1U_0402_16V4Z

C454

C451

CPU_PH_G 2

10K_0402_5%

EC_THERM# (19,28)

ADM1032ARM_RM8

Compal Secret Data

Security Classification

U4524 CLOSE CPU,

CPU_THERMDA&CPU_THERMDC PLACE
CLOSE TO PROCESSOR WITHIN 1" INCH

Issued Date

2005/05/09

Deciphered Date

2006/03/08

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

Size
C
Date:

Document Number

Rev
D

401411
, 10, 2006

Sheet
1

of

51

+CPU_CORE

+ C505
+ C504
+ C453
+ C452
@
@
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
330U_D2E_2.5VM_R9
2
2
2
2

+CPU_CORE

+CPU_CORE

10U_0805_10V6M
10U_0805_10V6M
10U_0805_10V6M
1
1
1
1
1
1
C17
C194
C193
C192
C97
C16

C195

+
2
10U_0805_10V6M

2
2
10U_0805_10V6M

VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54

V12
V14
W4
Y2
J15
K16
L15
M16
P16
T16
U15
V16

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27

H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25

+1.8V

FOX_PZ63823-284S-41F
Athlon 64 S1
Processor Socket

VSS1
VSS66
VSS2
VSS67
VSS3
VSS68
VSS4
VSS69
VSS5
VSS70
VSS6
VSS71
VSS7
VSS72
VSS8
VSS73
VSS9
VSS74
VSS10
VSS75
VSS11
VSS76
VSS12
VSS77
VSS13
VSS78
VSS14
VSS79
VSS15
VSS80
VSS16
VSS81
VSS17
VSS82
VSS18
VSS83
VSS19
VSS84
VSS20
VSS85
VSS21
VSS86
VSS22
VSS87
VSS23
VSS88
VSS24
VSS89
VSS25
VSS90
VSS26
VSS91
VSS27
VSS92
VSS28
VSS93
VSS29
VSS94
VSS30
VSS95
VSS31
VSS96
VSS32
VSS97
VSS33
VSS98
VSS34
VSS99
VSS35
VSS100
VSS36
VSS101
VSS37
VSS102
VSS38
VSS103
VSS39
VSS104
VSS40
VSS105
VSS41
VSS106
VSS42
VSS107
VSS43
VSS108
VSS44
VSS109
VSS45
VSS110
VSS46
VSS111
VSS47
VSS112
VSS48
VSS113
VSS49
VSS114
VSS50
VSS115
VSS51
VSS116
VSS52
VSS117
VSS53
VSS118
VSS54
VSS119
VSS55
VSS120
VSS56
VSS121
VSS57
VSS122
VSS58
VSS123
VSS59
VSS124
VSS60
VSS125
VSS61
VSS126
VSS62
VSS127
VSS63
VSS128
VSS64
VSS129
VSS65
FOX_PZ63823-284S-41F

Ground

Power

AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4

+CPU_CORE

1
+
C450
820U_E9_2.5V_M_R7
45@
2

C449
820U_E9_2.5V_M_R7
45@

CPU SOCKET S1 DECOUPLING

JP23F
+CPU_CORE
JP23E
AC4 VDD1
AD2 VDD2
G4 VDD3
H2 VDD4
J9 VDD5
J11 VDD6
J13 VDD7
K6 VDD8
K10 VDD9
K12 VDD10
K14 VDD11
L4 VDD12
L7 VDD13
L9 VDD14
L11 VDD15
L13 VDD16
M2 VDD17
M6 VDD18
M8 VDD19
M10 VDD20
N7 VDD21
N9 VDD22
N11 VDD23
P8 VDD24
P10 VDD25
R4 VDD26
R7 VDD27
R9 VDD28
R11 VDD29
T2 VDD30
T6 VDD31
T8 VDD32
T10 VDD33
T12 VDD34
T14 VDD35
U7 VDD36
U9 VDD37
U11 VDD38
U13 VDD39
V6 VDD40
V8 VDD41
V10 VDD42

2
2
10U_0805_10V6M

10U_0805_10V6M

J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
M11
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6

+CPU_CORE

C73
22U_0805_6.3V6M

C76
22U_0805_6.3V6M

C86
10U_0805_10V6M

C118
22U_0805_6.3V6M

C109
10U_0805_10V6M

+CPU_CORE

C96
10U_0805_10V6M

C89
10U_0805_10V6M

C113
10U_0805_10V6M

C124
22U_0805_6.3V6M

+1.8V

C70
0.22U_0402_10V4Z

C120
0.22U_0402_10V4Z

1
C100
180P_0402_50V8J

1
C91
0.01U_0402_16V7K

C82
10U_0805_10V6M

C102
10U_0805_10V6M

C72
0.22U_0402_10V4Z

C116
0.22U_0402_10V4Z

DECOUPLING BETWEEN PROCESSOR AND DIMMs

PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.8V

C472
4.7U_0805_10V4Z

C471
4.7U_0805_10V4Z

C127
0.22U_0402_10V4Z

C479
4.7U_0805_10V4Z

C128
0.01U_0402_16V7K

C480
4.7U_0805_10V4Z

C85
0.01U_0402_16V7K

C104
0.22U_0402_10V4Z

C68
180P_0402_50V8J
2

C84
0.22U_0402_10V4Z

C129
0.22U_0402_10V4Z

C105
180P_0402_50V8J

+0.9V
Athlon 64 S1
Processor Socket

A1

C188
4.7U_0805_10V4Z

C30
4.7U_0805_10V4Z

C39
1000P_0402_50V7K

C36
4.7U_0805_10V4Z

C41
1000P_0402_50V7K

C181
4.7U_0805_10V4Z

C178
1000P_0402_50V7K

C184
0.22U_0402_10V4Z

C22
1000P_0402_50V7K

C185
0.22U_0402_10V4Z

C27
0.22U_0402_10V4Z

C23
0.22U_0402_10V4Z

C179
180P_0402_50V8J
2

C26
180P_0402_50V8J
2

C175
180P_0402_50V8J
2

C182
180P_0402_50V8J

A26

Athlon 64 S1g1
uPGA638
Top View

PROCESSOR POWER AND GROUND

AF1

Compal Secret Data

Security Classification
Issued Date

2005/05/09

Deciphered Date

2006/03/08

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

Size
C
Date:

Document Number

Rev
D

401411
, 10, 2006

Sheet
1

of

51

+DIMM_VREF

DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1

4.7U_0805_10V4Z

+ C477
220U_D2_4VM_R15
C58

C463

4.7U_0805_10V4Z

C57

C473

1
1

C636

150U_D2_6.3VM

C51

C101

C65

C45

C88

C74

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_A_BS#0
DDR_A_WE#

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_CAS#
DDR_CS1_DIMMA#

DDR_A_D46
DDR_A_D47

DDR_A_ODT1
R32
DDR_CS3_DIMMA# R28

DDR_A_D52
DDR_A_D53

DDR_A_MA15
4
DDR_CKE1_DIMMA
3
47_0404_4P2R_5%
DDR_A_MA7
4
DDR_A_MA14
3
47_0404_4P2R_5%
DDR_A_MA6
4
DDR_A_MA11
3
47_0404_4P2R_5%
DDR_A_MA2
4
DDR_A_MA4
3
47_0404_4P2R_5%
DDR_A_BS#1
4
DDR_A_MA0
3
47_0404_4P2R_5%
DDR_CS0_DIMMA#
4
DDR_A_RAS#
3
47_0404_4P2R_5%
DDR_A_MA13
4
DDR_A_ODT0
3
47_0404_4P2R_5%

1
2
RP22
1
2
RP17
1
2
RP14
1
2
RP10
1
2
RP6
1
2
RP2
1
2
RP1

+0.9V

2
C623

C622

C621

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_A_DQS#7
DDR_A_DQS7

C620

DDR_A_D60
DDR_A_D61

0.1U_0402_16V4Z

DDR_A_D54
DDR_A_D55

+1.8V
0.1U_0402_16V4Z

DDR_A_CLK2 (7)
DDR_A_CLK#2 (7)

DDR_A_DM6

Layout Note:
Place one 0.1uF cap close to every 2 pullup
resistors terminated to +0.9V

DDR_A_D62
DDR_A_D63

Compal Secret Data

Security Classification
2005/05/09

2006/10/11

Deciphered Date

Title

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

4.7U_0805_10V4Z

DDR_A_MA1
DDR_A_MA10

DDR_A_D44
DDR_A_D45

4
3
47_0404_4P2R_5%
4
3
47_0404_4P2R_5%
4
3
47_0404_4P2R_5%
4
3
47_0404_4P2R_5%
4
3
47_0404_4P2R_5%
4
3
47_0404_4P2R_5%
4
3
47_0404_4P2R_5%
2 47_0402_1%
2 47_0402_1%

C56

0.1U_0402_16V4Z

4.7U_0805_10V4Z

DDR_A_MA5
DDR_A_MA3

2 10K_0402_5%
2 10K_0402_5%

0.1U_0402_16V4Z

DDR_A_DM4

1
1

C69

DDR_A_MA9
DDR_A_MA8

Issued Date

P-TWO_A5692C-A0G16

C55

C448

DDR_CS3_DIMMA# (7)

DDR_A_D38
DDR_A_D39

R12
R10

0.1U_0402_16V4Z

1
2
RP28
1
2
RP25
1
2
RP21
1
2
RP18
1
2
RP13
1
2
RP9
1
2
RP5
1
1

DDR_A_BS#2
DDR_A_MA12

DDR_A_D36
DDR_A_D37

DDR_A_CLK2
DDR_A_CLK#2

C619

SB_CK_SDAT
SB_CK_SCLK
+3VS

DDR_CS3_DIMMA#

DDR_CKE0_DIMMA
DDR_CS2_DIMMA#

DDR_A_ODT0 (7)

C618

(11,17,19,31,34) SB_CK_SDAT
(11,17,19,31,34) SB_CK_SCLK

DDR_A_ODT0
DDR_A_MA13

0.1U_0402_16V4Z

DDR_A_D58
DDR_A_D59

1
1

+0.9V

DDR_A_BS#1 (7)
DDR_A_RAS# (7)
DDR_CS0_DIMMA# (7)

C617

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V

DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#

0.1U_0402_16V4Z

DDR_A_DM7

DDR_A_MA11
DDR_A_MA7
DDR_A_MA6

C616

DDR_A_D56
DDR_A_D57

0.1U_0402_16V4Z

DDR_A_D50
DDR_A_D51

0.1U_0402_16V4Z

DDR_A_DQS#6
DDR_A_DQS6

C475

DDR_A_D48
DDR_A_D49

4.7U_0805_10V4Z

DDR_A_D42
DDR_A_D43

C95

DDR_A_DM5

0.1U_0402_16V4Z

DDR_A_D40
DDR_A_D41

4.7U_0805_10V4Z

DDR_A_D34
DDR_A_D35

DDR_A_MA15
DDR_A_MA14

C107

DDR_A_DQS#4
DDR_A_DQS4

DDR_CKE1_DIMMA (7)

0.1U_0402_16V4Z

C98

DDR_A_D32
DDR_A_D33

DDR_CKE1_DIMMA

C114

DDR_A_ODT1

(7) DDR_A_ODT1

DDR_A_D30
DDR_A_D31

0.1U_0402_16V4Z

DDR_A_CAS#
DDR_CS1_DIMMA#

C80

(7) DDR_A_CAS#
(7) DDR_CS1_DIMMA#

+0.9V

C71

DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#

(7) DDR_A_BS#0
(7) DDR_A_WE#

DDR_A_DQS#3
DDR_A_DQS3
0.1U_0402_16V4Z

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_DQS#[0..7]

C67

DDR_A_MA12
DDR_A_MA9
DDR_A_MA8

DDR_A_MA[0..15]

0.1U_0402_16V4Z

DDR_CS2_DIMMA#
DDR_A_BS#2

(7) DDR_A_DQS#[0..7]

C63

(7) DDR_CS2_DIMMA#
(7) DDR_A_BS#2

DDR_A_D28
DDR_A_D29

DDR_A_DQS[0..7]

(7) DDR_A_DQS[0..7]
(7) DDR_A_MA[0..15]

0.1U_0402_16V4Z

(7) DDR_CKE0_DIMMA

DDR_CKE0_DIMMA

(7) DDR_A_DM[0..7]

DDR_A_D22
DDR_A_D23

DDR_A_DM[0..7]

0.1U_0402_16V4Z

DDR_A_D26
DDR_A_D27

DDR_A_DM2

DDR_A_D[0..63]

(7) DDR_A_D[0..63]

4.7U_0805_10V4Z

DDR_A_DM3

+1.8V

DDR_A_CLK1 (7)
DDR_A_CLK#1 (7)

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

R397

C77

C652
0.22U_0603_16V7K
2
2
2
2
2
2
2
2
2
2
2
2
2
2
C639
C641
C643
C645
C647
C649
C651
4.7U_0805_6.3V6K4.7U_0805_6.3V6K0.01U_0402_16V7K10P_0402_25V8K 0.22U_0603_16V7K0.22U_0603_16V7K0.22U_0603_16V7K

1K_0402_1%

DDR_A_DM1
DDR_A_CLK1
DDR_A_CLK#1

1K_0402_1%

4.7U_0805_10V4Z

DDR_A_D24
DDR_A_D25

VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1

DDR_A_D12
DDR_A_D13

C62

DDR_A_D18
DDR_A_D19

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD

DDR_A_D6
DDR_A_D7

C470

DDR_A_DQS#2
DDR_A_DQS2

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_A_DM0

4.7U_0805_10V4Z

DDR_A_D16
DDR_A_D17

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

DDR_A_D4
DDR_A_D5

4.7U_0805_10V4Z

DDR_A_D10
DDR_A_D11

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS

C640
C642
C644
C646
C648
C650
4.7U_0805_6.3V6K4.7U_0805_6.3V6K0.01U_0402_16V7K10P_0402_25V8K 0.22U_0603_16V7K0.22U_0603_16V7K
1
1
1
1
1
1
1
1
1
1
1
1
1

R398

DDR_A_DQS#0
DDR_A_DQS0

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

4.7U_0805_10V4Z

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

+1.8V

1
C503

DDR_A_D0
DDR_A_D1

C507

0.1U_0402_16V4Z

JP19

+1.8V

+1.8V

+1.8V

Size Document Number

Custom 401411
Date:

Rev
D

, 10, 2006

Sheet
1

10

of

51

+1.8V

+1.8V

DDR_B_D[0..63]

(7) DDR_B_D[0..63]

+DIMM_VREF

DDR_B_DM[0..7]

(7) DDR_B_DM[0..7]

DDR_B_D8
DDR_B_D9

1
1

+ C633
220U_D2_4VM_R15

C125

4.7U_0805_10V4Z

C61

C78

C81

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2
C20

C15

C9

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C19

DDR_CS3_DIMMB#

2
C14

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_ODT0
DDR_B_MA13

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6

DDR_B_BS#1
DDR_B_RAS#
DDR_CS0_DIMMB#

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+0.9V
DDR_CS2_DIMMB#
DDR_CKE0_DIMMB

DDR_B_BS#1 (7)
DDR_B_RAS# (7)
DDR_CS0_DIMMB# (7)

1
2
RP27
1
2
RP24
1
2
RP19
1
2
RP15
1
2
RP11
1
2
RP8
1
2
RP7
R29
1
R30
1

DDR_B_MA12
DDR_B_BS#2

DDR_B_ODT0 (7)

DDR_B_MA8
DDR_B_MA9

DDR_CS3_DIMMB# (7)

DDR_B_MA3
DDR_B_MA5

DDR_B_D36
DDR_B_D37
DDR_B_DM4

DDR_B_MA10
DDR_B_MA1

DDR_B_D38
DDR_B_D39

DDR_B_WE#
DDR_B_BS#0

DDR_B_D44
DDR_B_D45

DDR_CS0_DIMMB#
DDR_B_RAS#

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_ODT1
DDR_CS3_DIMMB#

4
3
47_0404_4P2R_5%
4
3
47_0404_4P2R_5%
4
3
47_0404_4P2R_5%
4
3
47_0404_4P2R_5%
4
3
47_0404_4P2R_5%
4
3
47_0404_4P2R_5%
4
3
47_0404_4P2R_5%
2 47_0402_1%
2 47_0402_1%

DDR_CKE1_DIMMB
4
DDR_B_MA15
3
47_0404_4P2R_5%
DDR_B_MA14
4
DDR_B_MA11
3
47_0404_4P2R_5%
DDR_B_MA7
4
DDR_B_MA6
3
47_0404_4P2R_5%
DDR_B_MA4
4
DDR_B_MA2
3
47_0404_4P2R_5%
DDR_B_MA0
4
DDR_B_BS#1
3
47_0404_4P2R_5%
DDR_B_CAS#
4
DDR_CS1_DIMMB#
3
47_0404_4P2R_5%
DDR_B_ODT0
4
DDR_B_MA13
3
47_0404_4P2R_5%

1
2
RP26
1
2
RP23
1
2
RP20
1
2
RP16
1
2
RP12
1
2
RP3
1
2
RP4

DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
+0.9V

2
C631

C630

C629

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2 10K_0402_5%
2 10K_0402_5%

Layout Note:
Place one 0.1uF cap close to every 2 pullup
resistors terminated to +0.9V

DDR_B_D62
DDR_B_D63
1
1

C628

DDR_B_DQS#7
DDR_B_DQS7

C6

DDR_B_D60
DDR_B_D61

0.1U_0402_16V4Z

DDR_B_D54
DDR_B_D55

0.1U_0402_16V4Z

DDR_B_DM6

R11
R9

+1.8V
0.1U_0402_16V4Z
C5

DDR_B_CLK2 (7)
DDR_B_CLK#2 (7)

0.1U_0402_16V4Z
C12

DDR_B_CLK2
DDR_B_CLK#2

+3VS

Compal Secret Data

Security Classification
2005/05/09

2006/10/11

Deciphered Date

Title

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

4.7U_0805_10V4Z

0.1U_0402_16V4Z

C11

0.1U_0402_16V4Z

DDR_CKE1_DIMMB (7)

DDR_B_MA15
DDR_B_MA14

Issued Date

P-TWO_A5652C-A0G16

0.1U_0402_16V4Z

C21

C627

C626

SB_CK_SDAT
SB_CK_SCLK
+3VS

0.1U_0402_16V4Z

(10,17,19,31,34) SB_CK_SDAT
(10,17,19,31,34) SB_CK_SCLK

DDR_CKE1_DIMMB

C625

DDR_B_D58
DDR_B_D59

DDR_B_D30
DDR_B_D31

0.1U_0402_16V4Z

DDR_B_DM7
A

DDR_B_DQS#3
DDR_B_DQS3

C624

DDR_B_D56
DDR_B_D57

DDR_B_D28
DDR_B_D29

0.1U_0402_16V4Z

DDR_B_D50
DDR_B_D51

+0.9V

0.1U_0402_16V4Z

DDR_B_DQS#6
DDR_B_DQS6

C53

DDR_B_D48
DDR_B_D49

4.7U_0805_10V4Z

DDR_B_D42
DDR_B_D43

DDR_B_D22
DDR_B_D23

C8

DDR_B_DM5

DDR_B_DM2

0.1U_0402_16V4Z

DDR_B_D40
DDR_B_D41

C64

DDR_B_D34
DDR_B_D35

C59

DDR_B_DQS#4
DDR_B_DQS4

4.7U_0805_10V4Z

DDR_B_D32
DDR_B_D33
B

C18

DDR_B_ODT1

(7) DDR_B_ODT1

DDR_B_D20
DDR_B_D21

C13

DDR_B_CAS#
DDR_CS1_DIMMB#

0.1U_0402_16V4Z

(7) DDR_B_CAS#
(7) DDR_CS1_DIMMB#

1
C103

DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#

(7) DDR_B_BS#0
(7) DDR_B_WE#

4.7U_0805_10V4Z

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_D14
DDR_B_D15

0.1U_0402_16V4Z

DDR_B_MA12
DDR_B_MA9
DDR_B_MA8

DDR_B_CLK1 (7)
DDR_B_CLK#1 (7)

C10

DDR_CS2_DIMMB#
DDR_B_BS#2

DDR_B_CLK1
DDR_B_CLK#1

C7

(7) DDR_CS2_DIMMB#
(7) DDR_B_BS#2

DDR_B_DM1

0.1U_0402_16V4Z

(7) DDR_CKE0_DIMMB

DDR_CKE0_DIMMB

DDR_B_D12
DDR_B_D13

C4

DDR_B_D26
DDR_B_D27

+1.8V

0.1U_0402_16V4Z

DDR_B_DM3

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

0.1U_0402_16V4Z

DDR_B_D24
DDR_B_D25
C

VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1

DDR_B_DQS#[0..7]

(7) DDR_B_DQS#[0..7]

4.7U_0805_10V4Z

DDR_B_D18
DDR_B_D19

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD

DDR_B_MA[0..15]

(7) DDR_B_MA[0..15]

C99

DDR_B_DQS#2
DDR_B_DQS2

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

DDR_B_D6
DDR_B_D7

C52

DDR_B_D16
DDR_B_D17

DDR_B_DM0

4.7U_0805_10V4Z

DDR_B_D10
DDR_B_D11

DDR_B_D4
DDR_B_D5

4.7U_0805_10V4Z

DDR_B_DQS#1
DDR_B_DQS1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

C198

DDR_B_D2
DDR_B_D3

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS

C202

DDR_B_DQS#0
DDR_B_DQS0

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

0.1U_0402_16V4Z

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

4.7U_0805_10V4Z

JP18
DDR_B_D0
DDR_B_D1

DDR_B_DQS[0..7]

(7) DDR_B_DQS[0..7]

Size Document Number

Custom 401411
Date:

Rev
D

, 10, 2006

Sheet
1

11

of

51

U39A

(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)

H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8

(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)

H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0

(6) H_CLKOP1
(6) H_CLKON1
(6) H_CLKOP0
(6) H_CLKON0
(6) H_CTLOP0
(6) H_CTLON0
R382 1
R380 1

+1.2V_HT

H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8

R19
R18
R21
R22
U22
U21
U18
U19
W19
W20
AC21
AB22
AB20
AA20
AA19
Y19

HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N

H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0

T24
R25
U25
U24
V23
U23
V24
V25
AA25
AA24
AB23
AA23
AB24
AB25
AC24
AC25

HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N

H_CLKOP1
H_CLKON1

W21
W22

HT_RXCLK1P
HT_RXCLK1N

PART 1 OF 5

HYPER TRANSPORT CPU

I/F

HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N

P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22

H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8

HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N

N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25

H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

HT_TXCLK1P
HT_TXCLK1N

L21
L22

H_CLKIP1
H_CLKIN1

HT_TXCLK0P
HT_TXCLK0N

J24
J25

H_CLKIP0
H_CLKIN0
H_CTLIP0
H_CTLIN0

H_CLKOP0
H_CLKON0

Y24
W25

H_CTLOP0
H_CTLON0

P24
P25

HT_RXCTLP
HT_RXCTLN

HT_TXCTLP
HT_TXCTLN

N23
P23

A24
C24

HT_RXCALP
HT_RXCALN

HT_TXCALP
HT_TXCALN

C25
D24

2 49.9_0402_1%
2 49.9_0402_1%

HT_RXCALP
HT_RXCALN

HT_RXCLK0P
HT_RXCLK0N

HT_TXCALP
HT_TXCALN

H_CADIP15 (6)
H_CADIN15 (6)
H_CADIP14 (6)
H_CADIN14 (6)
H_CADIP13 (6)
H_CADIN13 (6)
H_CADIP12 (6)
H_CADIN12 (6)
H_CADIP11 (6)
H_CADIN11 (6)
H_CADIP10 (6)
H_CADIN10 (6)
H_CADIP9 (6)
H_CADIN9 (6)
H_CADIP8 (6)
H_CADIN8 (6)
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)

H_CLKIP1 (6)
H_CLKIN1 (6)
H_CLKIP0 (6)
H_CLKIN0 (6)
H_CTLIP0 (6)
H_CTLIN0 (6)
1 R379
2
100_0402_1%

216MSA4ALA11FG RS485MC_BGA465

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/03/08

Deciphered Date

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 10, 2006

Sheet
1

12

of

51

U39B

(31) PCIE_MRX_PTX_P0
(31) PCIE_MRX_PTX_N0
C

(34) PCIE_MRX_PTX_P1
(34) PCIE_MRX_PTX_N1

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N

R18
R19

1
1

2 0_0402_5%
2 0_0402_5%

PCIE_MRX_PTX_P0_R
PCIE_MRX_PTX_N0_R

W11
W12

R16
R17

1
1

2 0_0402_5%
2 0_0402_5%

PCIE_MRX_PTX_P1_R
PCIE_MRX_PTX_N1_R

AA11
AB11

A_MRX_STX_P0
A_MRX_STX_N0

(18) A_MRX_STX_P0
(18) A_MRX_STX_N0

A_MRX_STX_P1
A_MRX_STX_N1

(18) A_MRX_STX_P1
(18) A_MRX_STX_N1

R14:

10KOhm FOR RS485

1.47KOhm FOR RS690

R15:

8.25KOhm FOR RS485

DNI FOR RS690

R14
R15

1
1

2 10K_0402_1%
2 8.25K_0402_1%

GPP_RX1P
GPP_RX1N

PART 2 OF 5

PCIE I/F GFX

G5
G4
J8
J7
J4
J5
L8
L7
L4
L5
M8
M7
M4
M5
P8
P7
P4
P5
R4
R5
R7
R8
U4
U5
W4
W5
Y4
Y5
V9
W9
AB7
AB6

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4

GPP_TX0P
GPP_TX0N

AD8
AE8

PCIE_MTX_PRX_P0
PCIE_MTX_PRX_N0

C457 1
C458 1

2 0.1U_0402_10V6K
2 0.1U_0402_10V6K

PCIE_MTX_C_PRX_P0
PCIE_MTX_C_PRX_N0

GPP_TX1P
GPP_TX1N

AD7
AE7

PCIE_MTX_PRX_P1
PCIE_MTX_PRX_N1

C466 1
C467 1

2 0.1U_0402_10V6K
2 0.1U_0402_10V6K

PCIE_MTX_C_PRX_P1
PCIE_MTX_C_PRX_N1

AE9
AD10

A_MTX_SRX_P0
A_MTX_SRX_N0

C465 1
C464 1

2 0.1U_0402_10V6K
2 0.1U_0402_10V6K

A_MTX_C_SRX_P0
A_MTX_C_SRX_N0

AC8
AD9

A_MTX_SRX_P1
A_MTX_SRX_N1

C468 1
C469 1

2 0.1U_0402_10V6K
2 0.1U_0402_10V6K

A_MTX_C_SRX_P1
A_MTX_C_SRX_N1

AD11
AE11

R375 1
R376 1

PCIE I/F GPP

Y7
AA7

GPP_RX2P
GPP_RX2N

GPP_TX2P
GPP_TX2N

AD4
AE5

AB9
AA9

GPP_RX3P
GPP_RX3N

GPP_TX3P
GPP_TX3N

AD5
AD6

W14
W15

SB_RX0P
SB_RX0N

AB12
AA12
AA14
AB14

SB_TX0P
SB_TX0N

PCIE I/F SB

SB_RX1P
SB_RX1N
PCEH_ISET
PCEH_TXISET

SB_TX1P
SB_TX1N
PCEH_PCAL
PCEH_NCAL

216MSA4ALA11FG RS485MC_BGA465

2
2

150_0402_1%
100_0402_1%

R375:

150 Ohm FOR RS485

562 Ohm FOR RS690

R215:

82.5 Ohm FOR RS485

2KOhm FOR RS690

PCIE_MTX_C_PRX_P0 (31)
PCIE_MTX_C_PRX_N0 (31)
C

PCIE_MTX_C_PRX_P1 (34)
PCIE_MTX_C_PRX_N1 (34)

A_MTX_C_SRX_P0 (18)
A_MTX_C_SRX_N0 (18)
A_MTX_C_SRX_P1 (18)
A_MTX_C_SRX_N1 (18)

+1.2V_HT

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/03/08

Deciphered Date

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 10, 2006

Sheet
1

13

of

51

AVDDQ
L52
2.2U_0805_10V6K
1
2
CHB2012U121_0805
1
1
C495 C489
@

2.2U_0805_10V6K

R76

150_0402_1%

HTPVDD

150_0402_1%

150_0402_1%

+1.8VS

R75

8mils TRACE

R74

1 10K_0402_5%

RSET

715_0402_1%
2 0_0402_5%
2 0_0402_5%

HTPVDD

R46
1K_0402_5%

(18) ALLOW_LDTSTOP

MMBT3904_SOT23

R383 2

1 10K_0402_5%

(17) NB_OSC
(17,19) SB_OSCIN

+3VS

DFT_GPIO0
DFT_GPIO1
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5

D27

R60
R57
R58
R59

2 @ 2.7K_0402_5%

DFT_GPIO0

1
1
1
1

@ 2.7K_0402_5%
@ 2.7K_0402_5%
@ 2.7K_0402_5%
@ 2.7K_0402_5%

DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5

2
2
2
2

EDID_LCD_CLK
EDID_LCD_DAT

(25) EDID_LCD_CLK
(25) EDID_LCD_DAT

C635
18P_0402_50V8J

B2
A2
B4
AA15
AB15

PAD TP5
DDC_DATA
1

STRP_DATA

C14
B3
C3
A3

1
2

LVDS_TXLCKP
LVDS_TXLCKN
LVDS_TXUCKP
LVDS_TXUCKN

LPVDD
LPVSS

D14
E14

LVDDR18D_1
LVDDR18D_2
LVDDR18A_1
LVDDR18A_2

A12
B12
C12
C13

LVSSR1
LVSSR3
LVSSR5
LVSSR6
LVSSR7
LVSSR8

A16
A14
D12
C19
C15
C16

LVSSR12
LVSSR13

F14
F15

LVDS_DIGON
LVDS_BLON
LVDS_BLEN

E12
G12
F12

DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8
DVO_D9
DVO_D10
DVO_D11

AD14
AD15
AE15
AD16
AE16
AC17
AD18
AE19
AD19
AE20
AD20
AE21

DVO_VSYNC
DVO_DE
DVO_HSYNC
DVO_IDCKP
DVO_IDCKN

AD13
AC13
AE13
AE17
AD17

BMREQb
I2C_CLK
I2C_DATA
THERMALDIODE_P
THERMALDIODE_N
TMDS_HPD
DDC_DATA
TESTMODE
STRP_DATA

LVDS_TXLCKP (25)
RS485: LVDDR18A=1.8V
LVDS_TXLCKN (25)
+1.8VS
LVDS_TXUCKP (25)
L54
LVDS_TXUCKN (25)
2
1
1
1 1
CHB2012U121_0805
C154
C172
C177
0.1U_0402_16V4Z
4.7U_0805_10V4Z
2
2
2
+1.8VS
LPVSS_GND
L57
1U_0603_10V4Z
1
2
CHB2012U121_0805
L55
C491
CHB2012U121_0805
C171 1
1
1
1
1
1
C176
C481
C131
C497

EN VDD
ENBKL
TP4 PAD

LVSSR_GND

ENVDD (25)
ENBKL (28)

R541 1

2 0_0805_5%

LPVSS_GND
R542 1

2 0_0805_5%

216MSA4ALA11FG RS485MC_BGA465

+3VS

OSCIN
OSCOUT

D6
D7
C8
C7
B8
A8

R73

R377
4.7K_0402_5%

LVSSR_GND

R40
10K_0402_5%
U2

R41
2K_0402_5%
@

8
7
6
5

EDID_LCD_CLK

VCC
WP
SCL
SDA

A0
A1
A2
VSS

STRP_DATA
A

AT24C04N-10SI-2.7_SO8
@
1

R39
2K_0402_5%
@

C117
0.1U_0402_16V4Z
@

2005/05/09

Issued Date
NOTE: ACCESS TO STRAP_DATA and I2C_CLK PINS
IS MANDATORY.
5

Compal Secret Data

Security Classification

1
2
3
4

+3VS

TVCLKIN

SB_CLKP
SB_CLKN

2
2

C2
B11
A11

GFX_CLKP
GFX_CLKN

DDC_DATA

HTTSTCLK
HTREFCLK

G1
G2

1N4148_SOT23

EDID_LCD_DAT

C23
B23

(17) SBLINK_CLKP
(17) SBLINK_CLKN

(18) BMREQ#
EDID_LCD_CLK

SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP

F2
E1

(16) LOAD_ROM#
R569
10K_0402_5%
R49

2
1

2
1

R51

4.7K_0402_5%

4.7K_0402_5%

4.7K_0402_5%

R50

SB_OSC_INT_R

@ 22_0402_5%

HTPVDD
HTPVSS

C10
C11
C5
B5

(17) NBSRC_CLKP
(17) NBSRC_CLKN

+3VS

R388 1

B24
B25

E15
D15
H15
G15

(25)
(25)
(25)
(25)
(25)
(25)

1U_0603_10V4Z

0_0402_5%
2
LDT_STOP#_NB

PLLVDD
PLLVSS

TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN

LVDS_TXUP0
LVDS_TXUN0
LVDS_TXUP1
LVDS_TXUN1
LVDS_TXUP2
LVDS_TXUN2

4.7U_0805_10V4Z

R62

DACSCL
DACSDA

LVDS_TXUP0
LVDS_TXUN0
LVDS_TXUP1
LVDS_TXUN1
LVDS_TXUP2
LVDS_TXUN2

1U_0603_10V4Z

Q27
1

B6
A6
A10
B10

A15
B16
C17
C18
B17
A17
A18
B18

(25)
(25)
(25)
(25)
(25)
(25)

0.1U_0402_16V4Z

(8,19) LDT_STOP#

(18,23,28,31,36) NB_RST#
(37) NB_PWROK

(17) HTREFCLK

B21

PLLVDD

4.7U_0805_10V4Z

1U_0603_10V4Z

1
1

TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N

LVDS_TXLP0
LVDS_TXLN0
LVDS_TXLP1
LVDS_TXLN1
LVDS_TXLP2
LVDS_TXLN2

0.1U_0402_16V4Z

R568

RED
GREEN
BLUE
DACVSYNC
DACHSYNC

LVDS_TXLP0
LVDS_TXLN0
LVDS_TXLP1
LVDS_TXLN1
LVDS_TXLP2
LVDS_TXLN2

4.7U_0805_10V4Z

C488

R55
R56

(24) VGA_DDC_CLK
(24) VGA_DDC_DATA

+3VS

VGA_CRT_VSYNC
VGA_CRT_HSYNC

E19
F19
G19
C6
A5

10U_0805_10V4Z

+1.8VS

(24) VGA_CRT_VSYNC
(24) VGA_CRT_HSYNC
R386

L56
1
2
CHB2012U121_0805
1
1
@
C493
C498

C_R
Y_G
COMP_B

AVSSQ_GND

1U_0603_10V4Z

CRT_R
CRT_G
CRT_B

(24) CRT_R
(24) CRT_G
(24) CRT_B

AVDDQ
AVSSQ

C21
C20
D19

(24) VGA_TV_CRMA
(24) VGA_TV_LUMA
(24) VGA_TV_COMPS

4.7U_0805_10V4Z

A21
A22
VGA_TV_CRMA
VGA_TV_LUMA
VGA_TV_COMPS

B14
B15
B13
A13
H14
G14
D17
E17

TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N

AVDDQ

PART 3 OF 5

CRT/TVOUT

1U_0603_10V4Z

C492

150U_D2_6.3VM

1
C496

C186
150U_D2_6.3VM

AVDD1
AVDD2
AVSSN1
AVSSN2
AVDDDI
AVSSDI

PM PLL PWR

10U_0805_10V4Z

L44
1
2
CHB2012U121_0805 1
C490

B22
C22
G17
H17
A20
B20

CLOCKs

+1.8VS

R230-R232 CLOSE TO NB
C485

C484

R591
150_0402_1% TV@

1U_0603_10V4Z

C487

TV@

4.7U_0805_10V4Z

MIS.

AVSSQ_GND

L53
1
2
CHB2012U121_0805
1
1
C499
+
@

C483

R592
150_0402_1%

U39C

PLLVDD

C183

1U_0603_10V4Z

10U_0805_10V4Z

AVSSQ_GND

R576
4.7K_0402_5%

+1.8VS
D

R590
150_0402_1%
TV@

L43
1
2
CHB2012U121_0805

AVDD

+3VS

R575
4.7K_0402_5%
2 0_0805_5%

2005/12/30 Added

VGA_TV_CRMA
VGA_TV_LUMA
VGA_TV_COMPS

+3VS

R540 1

2006/03/08

Deciphered Date

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 10, 2006

Sheet
1

14

of

51

NB RS485 POWER STATES

S0

S1

S3

ON

ON

OFF OFF

S4/S5

G3
OFF

VDDR

ON

ON

OFF OFF

OFF

VDD18

ON

ON

OFF OFF

OFF

VDDC

ON

ON

OFF OFF

OFF

VDDA18

ON

ON

OFF OFF

OFF

VDDA12

ON

ON

OFF OFF

OFF

AVDD

ON

ON

OFF OFF

OFF

AVDDDI

ON

ON

OFF OFF

OFF

PLLVDD

ON

ON

OFF OFF

OFF

HTPVDD

ON

ON

OFF OFF

OFF

VDDR3

ON

ON

OFF OFF

OFF

LPVDD

ON

ON

OFF OFF

OFF

LVDDR18D

ON

ON

OFF OFF

OFF

LVDDR18A

ON

ON

OFF OFF

OFF

+1.2V_HT

+1.2V_HT
L59

L64
CHB2012U121_0805
2
1

L60

2
CHB2012U121_0805

2
CHB2012U121_0805

CURRENT MEASUREMENT
VDDA12

C37

2006/4/14

C46

C54

C50

C49

1U_0402_6.3V4Z
1
C48

2
2
2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
FOR EMI 1U_0402_6.3V4Z

+1.8VS
L2
1
2
CHB2012U121_0805

VDD18
1

C330

C141

820P_0603_50V7K

2
2
2.2U_0805_10V6K

+1.8VS

C142

1
2
CHB2012U121_0805
+ C25

C123

2.2U_0805_10V6K

2
1U_0402_6.3V4Z
VDDA18

L58

J14
J15

150U_D2_6.3VM

+3VS

L3

10U_0805_10V4Z

1
2
CHB2012U121_0805
B

C40

C459

C460

C462

C456

C461

2
2
2
2
2
2
10U_0805_10V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VDDR3
1

1U_0402_6.3V4Z

C44

C161

1U_0402_6.3V4Z

VDDA12

L1
1
2
CHB2012U121_0805

C38

C42

VDDPLL

VDDA12/VDDPLL_1
VDDA12/VDDPLL_2
VSSA12/VSSPLL_1
VSSA12/VSSPLL_2

D22
M1
AC11

+1.2V_HT
VDDA12_PKG1
+1.2V_HT

VDDA12_PKG1

VDDA_12_2
VDDA_12_3
VDDA_12_4
VDDA_12_5
VDDA_12_6
VDDA_12_7
VDDA_12_8
VDDA_12_9
VDDA_12_10
VDDA_12_11
VDDA_12_12

VDDR_1
VDDR_2
VDDR_3

E7
F7
F9
G9

1
C43

2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z

VDDR3_2
VDDR3_1

AC12
AD12
AE12

4.7U_0805_10V4Z
VDDR

+1.8VS

VDDA18_1
VDDA18_2
VDDA18_3
VDDA18_4
VDDA18_5
VDDA18_6
VDDA18_7
VDDA18_8

E11
D11

C160

4 OF 5 VDDA_12_1

VDD18_1
VDD18_2

AE2
AB3
U7
W7
AB4
AC3
AD2
AE1

VDD_HT1 PART
VDD_HT2
VDD_HT5
VDD_HT6
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15
VDD_HT16
VDD_HT17
VDD_HT18
VDD_HT19

VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32

D1
G7
E2
C1
E3
D2
M9
F4
B1
D3
L9
E6
L11
L13
L15
M12
R15
M14
N11
N13
N15
J11
H11
P12
P14
R11
R13
A19
B19
U11
U14
P17
L17
J19
D20
G20
A9
B9
C9
D9
A7
A4
U12
U15

1U_0402_6.3V4Z

10U_0805_10V4Z

U39D
AE24
AD24
AD22
AB17
AE23
Y17
W17
AC18
AD21
AC19
AC20
AB19
AD23
AA17
AE25

POWER

VDD_HT

CURRENT MEASUREMENT

C110

C130

C112

C93

C106

C75

+
2

10U_0805_10V4Z

10U_0805_10V4Z
2

150U_D2_6.3VM

1U_0402_6.3V4Z
1U_0402_6.3V4Z

+1.2V_HT
1

C115

C126

C87

C94

C60

2
2
2
2
2
2
10U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0805_10V4Z
1U_0402_6.3V4Z
1
1
1
C108
C138
C135

1
+
2

C24

C79
1U_0402_6.3V4Z

2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

C31
10U_0805_10V4Z
150U_D2_6.3VM
2

216MSA4ALA11FG RS485MC_BGA465

1
4.7U_0805_10V4Z

C140

C168
1U_0402_6.3V4Z

C134
10U_0805_10V4Z

U39E
A25
F11
D23
E9
G11
Y23
P11
R24
AE18
M15
J22
G23
J12
L12
L14
L20
L23
M11
M20
M23
M25
N12
N14
B7
L24
P13
P20
P15
R12
R14
R20
W23
Y25
AD25
U20
H25
W24
Y22
AC23
D25
G24
AC14
H12
AC22
R23
C4
AE22
T23
T25
AE14
R17
H23
M17
A23
AC15
F17
D4
AC16
M13

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59

PAR 5 OF 5

GROUND

L63
CHB2012U121_0805

Power Signal
VDDHT

VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
VSSA14
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
VSSA23
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA93
VSSA94
VSSA95
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45

M3
V12
V11
V14
F3
V15
A1
H1
G3
J2
H3
AE10
J6
AE6
F1
L6
M2
M6
J3
P6
T1
N3
P9
R6
U2
T3
U3
U6
AC4
Y1
Y15
W6
AC2
Y3
Y9
Y11
Y12
Y14
AA3
R9
AD1
AC5
AC6
AC7
AD3
AC9
AC10
G6

216MSA4ALA11FG RS485MC_BGA465

RS485: 0 Ohm RESISTOR

RS690: 220 Ohm 500mA FERRITE BEAD
A

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/10/10

Deciphered Date

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 10, 2006

Sheet
1

15

of

51

R67
1

(14) LOAD_ROM#

H1
H_S394D138

H2
H_S394D138

H4
H_S394D138

H21
H_S394D138

H22
H_S394D138

@ 3K_0402_5%
D

LOAD_ROM#: LOAD ROM STRAP ENABLE

H23
H_S394D138

High, LOAD ROM STRAP DISABLE

H14
H_S394D138

H15
H_S394D138

H28
H_S394D138

H7
H_C236D165

2
0.1U_0402_16V4Z

C655
@

2
0.1U_0402_16V4Z

C656

@
2
0.1U_0402_16V4Z

H18
H_O134X118D55X39
@

H25
H_S354D138
@

1
1

H13
H_S354D138

H33
H_C315D236

1
1

H19
H_C276D118

H32
H_S315D138

H16
H_C276D118

@
C

H24
H_S354D138

H35
H_C163D163N

H17
H_O134X118D55X39

H34
H_O217X157D217X157N

C654

H6
H_C236D161

H12
H_O134X118D55X39

2
0.1U_0402_16V4Z

+1.8VALW +3VS

+1.8VS +3VS

C653

+3VALW

H3
H_C236D161

H11
H_O134X118D55X39

+5VS

+1.8VALW

H31
H_S315D118

+5VS

H29
H_C236D161

H10
H_C236D165

H9
H_C236D165

H8
H_C236D165

Low, LOAD ROM STRAP ENABLE

CF3
@

CF12
@

CF4

CF6
@

CF10
@

CF5
@

CF7

1
CF2

FD6

CF11
@

CF21
@

CF8

CF1
@

FD4

CF9

FD5

FD3

CF20

FD1

FD2

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/03/08

Deciphered Date

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 10, 2006

Sheet
1

16

of

51

+3VS
CLK_VDD
L8
1

+3VS

2
10U_0805_10V4Z

CHB2012U121_0805

C277

C272

C263

C276

C268

C259

C254

C248

L10
CLK_VDDA

C279

1
2

2
1

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

C261
0.1U_0402_16V4Z

2
CHB2012U121_0805

C260
10U_0805_10V4Z
D

+3VS
CLK_VDD

L9
1
2
CHB2012U121_0805

U40

2.2U_0805_10V6K

Parallel Resonance Crystal

2

22P_0402_50V8J

R412
@

CLK_X1

Y5

22P_0402_50V8J
1M_0402_5%
1
2
2
C510
14.31818MHz_20P_1BX14318BE1A
R417
1

R415
10K_0402_5%

C511 1

+3VS

SB_CK_SCLK
SB_CK_SDAT

(10,11,19,31,34) SB_CK_SCLK
(10,11,19,31,34) SB_CK_SDAT

R425 1
R431 1

CLK_X2

53
15
22
29
45
8
38
1
58

GNDCPU
GNDSRC
GNDSRC
GNDSRC
GNDSRC
GND48
GNDATIG
GNDREF
GNDHTT

X1

X2

0_0402_5%

2 0_0402_5%
2 0_0402_5%

11
61

RESET_IN#
NC

9
10

SMBCLK
SMBDAT

Ioh = 5 * Iref
(2.32mA)

48
R433
475_0402_1%
1

Voh = 0.71V @ 60 ohm

IREF

CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1

56
55
52
51

SRCCLKT6
SRCCLKC6
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
ATIGCLKT2
ATIGCLKC2
ATIGCLKT3
ATIGCLKC3
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT3
SRCCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT0
SRCCLKC0
SRCCLKT1
SRCCLKC1
SRCCLKT7
SRCCLKC7

16
17
41
40
37
36
35
34
30
31
18
19
20
21
24
25
26
27
47
46
43
42
12
13

CLKREQA#
CLKREQB#
CLKREQC#

57
32
33

R426 1
R460 1
R461 1

48MHz_1
48MHz_0

7
6

CLK_SD_48M_R
CLK_48M_USB_R

FS1/REF1
FS0/REF0
FS2/REF2
HTTCLK0

63
64
62
59

SBLINK_CLKP_R
SBLINK_CLKN_R
NBSRC_CLKP_R
NBSRC_CLKN_R

SBSRC_CLKP_R
SBSRC_CLKN_R
CLK_PCIE_CARD_R
CLK_PCIE_CARD#_R

CLK_PCIE_MINI_R
CLK_PCIE_MINI#_R

R435
R437
R450
R456

R443
R449
R454
R459

1
1
1
1

1
1
1
1

2
2
2
2

R438 1
R444 1

2 0_0402_5% @
2 0_0402_5%
2 0_0402_5%

2
2
2
2

CPUCLK (8)
CPUCLK# (8)

33_0402_1%
33_0402_1%
33_0402_1%
33_0402_1%

SBLINK_CLKP
SBLINK_CLKN
NBSRC_CLKP
NBSRC_CLKN

33_0402_1%
33_0402_1%
33_0402_1%
33_0402_1%

SBSRC_CLKP (18)
SBSRC_CLKN (18)
CLK_PCIE_CARD (34)
CLK_PCIE_CARD# (34)

2 33_0402_1%
2 33_0402_1%

EXP_CLKREQ# (34)
MINI_CLKREQ# (31)

2 33_0402_1%
2 33_0402_1%

CLK_VDD
CLK_SD_48M (32)
CLK_USB_48M (19)
R402

2.2K_0402_5%
R401

R409

2.2K_0402_5%
R404 1
R403 1
R413 1

ICS951462AGLFT_TSSOP64

2 8.2K_0402_5%
2 8.2K_0402_5%
2 8.2K_0402_5%

2.2K_0402_5%
R400 2
R399 2
R410 2

SB_OSCIN_R
LPC_OSCIN_R
NB_OSCIN_R

R407 1
R406 1
R418 1

2 33_0402_1%
2 33_0402_1%
2 33_0402_1%

SB_OSCIN (14,19)
CLK_14M_SIO (36)
NB_OSC (14)

HTREFCLK_R

R419 1

2 33_0402_1%

HTREFCLK (14)

1 @ 0_0402_5%
1 @ 0_0402_5%
1 @ 0_0402_5%

CLK_PCIE_MINI (31)
CLK_PCIE_MINI# (31)

+3VS

R421 1
R416 1

(14)
(14)
(14)
(14)

1 R457
2
49.9_0402_1%
1 R451
2
49.9_0402_1%
1 R436
2
49.9_0402_1%
1 R434
2
49.9_0402_1%

CLK_VDDREF

C246

50
49

CLK_VDD48

R427
261_0402_1%
1
2
47_0402_1%
CPUCLK_EXT_R R423 1
2
CPUCLK#_EXT_R R429 1
2 47_0402_1%

VDDA
GNDA

L6
1
2
CHB2012U121_0805

VDDCPU
VDDSRC
VDDSRC
VDDSRC
VDDSRC
VDD48
VDDATIG
VDDREF
VDDHTT

2.2U_0805_10V6K

+3VS

54
14
23
28
44
5
39
2
60

C252

2- PUT DECOUPLING CAPS CLOSE TO U800

POWER PIN

1 R445
2
49.9_0402_1%
1 R439
2
49.9_0402_1%
1 R458
2
49.9_0402_1%
1 R453
2
49.9_0402_1%
1 R448
2
49.9_0402_1%
1 R442
2
49.9_0402_1%

1- PLACE ALL SERIAL TERMINATION

RESISTORS CLOSE TO U800

R420
51.1_0402_1%
2

EXT CLK FREQUENCY SELECT TABLE(MHZ)

FS2 FS1 FS0

CPU

SRCCLK
[2:1]

Hi-Z

100.00

100.00

180.00

100.00

220.00

COMMENT

PCI

USB

Hi-Z

Hi-Z

48.00

Reserved

X/3

X/6

48.00

Reserved

60.00

30.00

48.00

Reserved

100.00

36.56

73.12

48.00

Reserved

100.00

100.00

66.66

33.33

48.00

Reserved

133.33

100.00

66.66

33.33

48.00

Reserved

200.00

100.00

66.66

33.33

48.00

Normal ATHLON64 operation

HTT

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/03/08

Deciphered Date

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 10, 2006

Sheet
1

17

of

51

2 4.12K_0402_1%

E27

PCIE_CALI

U29

PCIE_PVDD

U28

PCIE_PVSS

F27
F28
F29
G26
G27
G28
G29
J27
J29
L25
L26
L29
N29

PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8
PCIE_VDDR_9
PCIE_VDDR_10
PCIE_VDDR_11
PCIE_VDDR_12
PCIE_VDDR_13

2
C244

KC FBM-L11-201209-221LMAT_0805

10U_0805_10V4Z

FOR SB600 VCC_SB= 1.2V

FOR SB460 VCC_SB= 1.8V

C249
1U_0603_10V6K

PCIE_VDDR

C608 AND C609 CLOSE

TO U600.U29

R601 CALRP: SB600=562R 1%, SB460=150R 1%

R603 CALRN: SB600=2.05K 1%, SB460=150R 1%
R603 CALRN: SB600=0R 1%, SB460=4.12K 1%
+1.8VS

PCIE_VDDR
L7

KC FBM-L11-201209-221LMAT_0805

C515

C516

C512

C247

C250

22U_0805_6.3V6M
2
2
2
2
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K

20M_0603_5% 2

C514
1U_0603_10V6K

1 R244

18P_0402_50V8J

C314

32K_X1

2
2

Y3

NC

OUT

NC

IN

R218
10M_0402_5%

32.768KHZ_12.5P_1TJS125DJ2A073
1
2
18P_0402_50V8J

32K_X2

C307

INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36

2 @ 0_0402_5%

(8) CPU_SIC
(8) CPU_SID
(14) ALLOW_LDTSTOP
R446 1

(19) AZ_DOCK_EN#
+3VS

R447 1

2 0_0402_5%

(8) LDT_RST#

2 10K_0402_5%

FOR SB460, THIS BALL

IS LDT_RST# ONLY

X2

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

CPU_PG
INTR/LINT0
NMI/LINT1
INIT#
SMI#
NC
IGNNE#
A20M#
FERR#
STPCLK#/ALLOW_LDTSTP
CPU_STP#/DPSLP_3V#
NC
DPRSLPVR
LDT_RST#

LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#
BMREQ#
SERIRQ

RTCCLK
RTC_IRQ#/ACPWR_STRAP
VBAT
RTC_GND

AG24
AG25
AH24
AH25
AF24
AJ24
AH26
W22
AF23

C299
2 0.1U_0402_16V4Z

PCI_CBE#[3..0]

PCIRST#

PCI_CBE#[3..0] (26,31,32,35)

PCI_FRAME# (26,31,32,35)
PCI_DEVSEL# (26,31,32,35)
PCI_IRDY# (26,31,32,35)
PCI_TRDY# (26,31,32,35)
PCI_PAR (26,31,32,35)
PCI_STOP# (26,31,32,35)
PCI_PERR# (26,31,32,35)
PCI_SERR# (26,31,32)
PCI_REQ#0 (35)
PCI_REQ#1 (31)
PCI_REQ#2 (32)
PCI_REQ#3 (26)
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LPC_DRQ#0
LPC_DRQ#1

IN1

IN2

PCI_RST#

PCI_RST# (26,31,32,34,35)

R190
47K_0402_5%

R193
10K_0402_5%

U16
SN74AHC1G08DCKR_SC70

SB460 ONLY

(35)
(31)
(32)
(26)

LPC_DRQ#0
LPC_DRQ#1
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
PM_CLKRUN#
SERIRQ

(32,35)
(26)
(31)
(26,31,32)

LPC_AD0 (28,36)
LPC_AD1 (28,36)
LPC_AD2 (28,36)
LPC_AD3 (28,36)
LPC_FRAME# (22,28,36)
LPC_DRQ#0 (36)

R124
R122
R128
R127
R126
R121
R120
R123

1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

+3VS

10K_0402_5%
10K_0402_5%
100K_0402_5%
100K_0402_5%
100K_0402_5%
100K_0402_5%
10K_0402_5%
10K_0402_5%

RP33

1
2
3
4

+3VS

E1
D1

VBAT_IN

C322

PCI_SERR#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#

RP31

1
2
3
4

+3VS

8
7
6
5

PCI_PLOCK#
PCI_I RDY#
PCI_PERR#
PCI_DEVSEL#

+RTCBATT
RP32

1
2
3
4

+3VS

+RTCBATT

+RTCVCC

RP34

1
2
3
4

+3VS

+CHGRTC

1
JOPEN

C327
0.1U_0402_16V4Z

Compal Secret Data

2005/05/09

Deciphered Date

2006/03/08

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3

RP30

1
2
3
4

+3VS

RTC Battery

8
7
6
5

8.2K_1206_8P4R_5%

4.7U_0805_10V4Z

Please Closed RAM

Door

Issued Date

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

8.2K_1206_8P4R_5%
BAS40-04_SOT23

C317
@

8
7
6
5

D7

RTCBATT

R250
0_0402_5%

2
2
1U_0402_6.3V4Z

BATT1

R240 2
1K_0402_5%
C315
0.1U_0402_16V4Z

218S4RBSA11G SB460_BGA549

RTC_CLK (22)
RTC_IRQ# (22)

J2

8
7
6
5

8.2K_1206_8P4R_5%

LPC PULL UPS

BMREQ# (14)
SERIRQ (28,32,36)

Security Classification

CLK_PCI_LAN (26)
CLK_PCI_LPC (28)
CLK_PCI_MINI (31)
CLK_PCI_PCM (32)
CLK_PCI_1394 (35)
CLK_PCI_SIO (36)

2005/12/30 Change net to +3VALW

+3VALW

D3
F5

R452
10K_0402_5%
@

22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%

C1
AC26
W26
W24
W25
AA24
AA23
AA22
AA26
Y27
AA25
AH9
B24
W23
AC25

L PC

R440 1

AD3
AF1
AF4
AF3

1SPREAD@2
1SPREAD@2
1SPREAD@2
1SPREAD@2
1SPREAD@2
1
2
SPREAD@

8.2K_1206_8P4R_5%

RTC

32K_X2

(8,19) CPU_PWRGD

X1

C PU

FOR SB600, CONNECT TO CPU_PG/LDT_PG

FOR SB460, CONNECT TO SSMUXSEL/GPIO0

D2

PM_CLKRUN# (26,31,36)

XTAL

32K_X1

PLACE THESE COMPONENTS CLOSE TO U600, AND

USE GROUND GUARD FOR 32K_X1 AND 32K_X2

PM_CLKRUN#
PCI_PLOCK#

R231
R229
R230
R232
R238
R487

U42
CLKOUT1
8 DLY CNTRL CLKOUT1 2
CLK_PCI_LAN_R
CLKOUT2
1 CLKIN
CLKOUT2 6
CLKOUT3
3 VDD
CLKOUT3 7
CLKOUT4
13 VDD
10
CLKOUT4
R2141
CLKOUT5
2 10K_0402_5% 9 SSON
11
CLKOUT5
CLKOUT6
4 SS%
CLKOUT6 14
5 GND
CLKOUT7 15
12 GND
16
CLKOUT8
1 C326
ASM3P623S00EF-16-TR_TSSOP16
1U_0402_6.3V4Z
R253
SPREAD@
10K_0402_5%
2

R136

R256
10K_0402_5%
L49
FBM-L11-160808-800LMT_0603

PCIE_CALRP
PCIE_CALRN

+3VS

E29
E28

NOSPREAD@
CLK_PCI_LAN (26)
NOSPREAD@
CLK_PCI_LPC (28)
NOSPREAD@
CLK_PCI_MINI (31)
NOSPREAD@
CLK_PCI_PCM (32)
NOSPREAD@
CLK_PCI_1394 (35)
NOSPREAD@
CLK_PCI_SIO (36)

2 150_0402_1%
2 150_0402_1%

+3VS

1
1

L5

R137
R138

22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%
22_0402_5%

+1.8VS

2
2
2
2

PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N

W7
Y1
W8
W5
AA5
Y3
AA6
AC5
AA7
AC3
AC7
AJ7
AD4
AB11
AE6
AC9
AA3
AJ4
AB1
AH4
AB2
AJ3
AB3
AH3
AC1
AH2
AC2
AH1
AD2
AG2
AD1
AG1
AB9
AF9
AJ5
AG3
AA2
AH6
AG5
AA1
AF7
Y2
AG8
AC11
AJ8
AE2
AG9
AH8
AH5
AD11
AF2
AH7
AB12
AG4
AG7
AF6

PCIE_VDDR

1
1
1
1

T25
T26
T22
T23
M25
M26
M22
M23

2
2
2
2
2
2

PCI_AD[31..0] (22,26,31,32,35)

@ R408
@ R405
@ R414
@ R411

A_MTX_C_SRX_P0
A_MTX_C_SRX_N0
A_MTX_C_SRX_P1
A_MTX_C_SRX_N1
49.9_0402_1% A_MTX_C_SRX_P2
49.9_0402_1% A_MTX_C_SRX_N2
49.9_0402_1% A_MTX_C_SRX_P3
49.9_0402_1% A_MTX_C_SRX_N3

AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/PDMA_REQ0#
REQ4#/PLL_BP33/PDMA_REQ1#
GNT0#
GNT1#
GNT2#
GNT3#/PLL_BP66/PDMA_GNT0#
GNT4#/PLL_BP50/PDMA_GNT1#
CLKRUN#
LOCK#

1
1
1
1
1
1

A_MTX_C_SRX_P0
A_MTX_C_SRX_N0
A_MTX_C_SRX_P1
A_MTX_C_SRX_N1

PCIRST#

PCI_AD[31..0]
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
PCI_FRAME#
PCI_DEVSEL#
PCI_I RDY#
PCI_TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3

(13)
(13)
(13)
(13)

U15
SN74AHCT1G125GW_SOT353-5
R570
R177
10K_0402_5%
47K_0402_5%

2 33_0402_5%

R252
R255
R247
R226
R223
R217

NB_RST# (14,23,28,31,36)

R183 1

CLK_PCI_LAN_R
CLK_PCI_LPC_R
CLK_PCI_MINI_R
CLK_PCI_PCM_R
CLK_PCI_1394_R
CLK_PCI_SIO_R

AJ9

2005/10/27 Added, Near U4520, Need equal length

CLK_PCI_LAN_R (22)
CLK_PCI_LPC_R (22)
CLK_PCI_MINI_R (22)
CLK_PCI_PCM_R (22)
CLK_PCI_1394_R (22)
CLK_PCI_SIO_R (22)
2 22_0402_5%
PCI_CLK6 (22)
2 0_0402_5%
SB_SPDIF (22)

PCIRST#

CLK_PCI_LAN_R
CLK_PCI_LPC_R
CLK_PCI_MINI_R
CLK_PCI_PCM_R
CLK_PCI_1394_R
CLK_PCI_SIO_R
R237 1
R228 1

U2
T2
U1
V2
W3
U3
V1
T1

NB_RST#

A_RST#

P
OE#

PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
SPDIF_OUT/GPIO41

2 0.01U_0402_16V7K A_MRX_C_STX_P0 P29

2 0.01U_0402_16V7KA_MRX_C_STX_N0 P28
2 0.01U_0402_16V7K A_MRX_C_STX_P1 M29
2 0.01U_0402_16V7KA_MRX_C_STX_N1 M28
K29
K28
PLACE THESE PCIE AC COUPLING
H29
H28
CAPS CLOSE TO U600

Part 1 of 4

PCIE_RCLKP
PCIE_RCLKN

A_MRX_STX_P0 C509 1
A_MRX_STX_N0C508
1
A_MRX_STX_P1 C216 1
A_MRX_STX_N1C217
1

A_MRX_STX_P0
A_MRX_STX_N0
A_MRX_STX_P1
A_MRX_STX_N1

SB460
A_RST#

PCI CLKS

(13)
(13)
(13)
(13)

5
1

J24
J25

(17) SBSRC_CLKP
(17) SBSRC_CLKN

C296
2 0.1U_0402_16V4Z

AG10

PCI INTERFACE

10K_0402_5%
2

2 33_0402_5%

PCI EXPRESS INTERFACE

A_RST# R178 1

+3VALW

U18A

2005/12/30 Change net to +3VALW

R174
1

Title

8
7
6
5

PCI_REQ#4
PCI_PAR

8.2K_1206_8P4R_5%

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

Size Document Number

Custom 401411
Date:

Re v
D

P, 11, 2006

Sheet
1

18

of

51

GPIO5
LPC_SMI#
GPIO4
SB460_GPIO31

R179 2
R484 2

SB_CK_SCLK
SB_CK_SDAT
REQ5#

(28) S3_STATE

+3VALW
10K_0402_5% SYS_RESET#
10K_0402_5% LPC_PME#
10K_0402_5% PWRBTN_OUT#
10K_0402_5% EC_SMI#
10K_0402_5% SB_PCIE_WAKE#
4.7K_0402_5%PM_SLP_S3#
4.7K_0402_5%PM_SLP_S5#
4.7K_0402_5%S3_STATE_R
4.7K_0402_5%CP_PE#
10K_0402_5% SUS_STAT#
10K_0402_5% BLINK/GPM6#
10K_0402_5% EC_SWI#
10K_0402_5% USB_OC#0
10K_0402_5% USB_OC#1
10K_0402_5% USB_OC#2
10K_0402_5% USB_OC#3

R475
R468
R479
R464
R466
R470
R184
R465
R463
R192
R197
R267
R44
R172
R507
R134

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

R571
R574

2
2

1 10K_0402_5% EC_SCI#
1 10K_0402_5% USB_OC#6

R203

1 10K_0402_5%

GPIO3

R474
R358
R485
R334

2
2
2
2

10K_0402_5%
1
10K_0402_5%
1
1 @ 10K_0402_5%
10K_0402_5%
1

ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
SB_AC_BITCLK

R298
R296
R294
R333
R489

2
2
2
2
2

1
1
1
1
1

10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%

EC_RSMRST#

(28) EC_RSMRST#

SB_OSC_INT

(14,17) SB_OSCIN

R578 2
R141 2
R579 2
(30) EC_FLASH#
R428 2
(28,30) SB_INT_FLASH_SEL#
(39) SB_SPKR
(10,11,17,31,34) SB_CK_SCLK
(10,11,17,31,34) SB_CK_SDAT

1
1

1 10K_0402_5%
1 10K_0402_5%
GPIO7
GPIO4
0_0402_5%
0_0402_5% @ GPIO5

SB_CK_SCLK
SB_CK_SDAT
R441 2
R145 2
R142 1

(8,18) CPU_PWRGD

1 10K_0402_5%
1 10K_0402_5%
0_0402_5%
2

E2

RSMRST#

B23

14M_OSC

C28
A26
B29
A23
B27
D23
B26
C27
B28
C3
F3
D26
C26
A27
A4

USBCLK

OSC / RST

NC
ROM_CS#/GPIO1
GHI#/GPIO6
VGATE/GPIO7
GPIO4
GPIO5
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
NC
NC
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
LDT_PG/SSMUXSEL/GPIO0
NC

BALLS(C6 AND C5) ARE FOR SB600 ONLY (NC FOR SB460)
(28) EC_SMI#

(34) CP_PE#
(30) EC_FLASH#
SB_AZ_RST#
(28) EC_LID_OUT#
SB_AZ_SYNC
(28,30) SB_INT_FLASH_SEL#
SB_AZ_SDOUT
(34) USB_OC#0
SB_AZ_BITCLK

R171
R139
EC_LID_OUT# R506
R580

2
2
2
2

EC_SMI#
USB_OC#6
SB_AZ_RST#
1 0_0402_5%
1 0_0402_5% @ USB_OC#3
USB_OC#2
1 0_0402_5%
1 0_0402_5% @ USB_OC#1
USB_OC#0

C6
C5
C4
B4
B6
A6
C8
C7
B8
A8

NC
NC
USB_OC7#/GEVENT7#
USB_OC6#/GEVENT6#
USB_OC5#/AZ_RST#/GPM5#
USB_OC4#/GPM4#
USB_OC3#/GPM3#
USB_OC2#/FANOUT1/LLB#/GPM2#
USB_OC1#/GPM1#
USB_OC0#/GPM0#

SB_AC_RST#
SB_AZ_BITCLK
SB_AZ_SDOUT
SB_AZ_SYNC

(39) AZ_BITCLK

R482 2

1 33_0402_5%

(38) AC_BITCLK

R234 2

1 33_0402_5%

(39) AZ_SYNC

R505 2

1 33_0402_5%

(38) AC_SYNC

R236 2

1 33_0402_5%

(39) AZ_RST#

R175 2

1 33_0402_5%

(38) AC_RST#

R483 2

1 33_0402_5%

(39) AZ_SDOUT

R235 2

1 33_0402_5%

(38) AC_SDOUT

R233 2

1 33_0402_5%

SB_AZ_BITCLK
(28,45) ACIN

(22) SB_AC_SDOUT
(39) ACZ_SDIN0
(38) ACZ_SDIN1
2
R581

SB_AZ_SYNC

SB_AZ_RST#

SB_AZ_SDOUT

(23) IDE_HRESET#
(22) SB460_GPIO13
(18) AZ_DOCK_EN#
(22) SB460_GPIO14
(8,28) EC_THERM#
(8,14) LDT_STOP#

SB_AC_BITCLK
SB_AC_SDOUT
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
1
0_0402_5% @
SB_AC_RST#

GPIO3
SB460_GPIO31
REQ5#
R187 2
R185 2
R477 2

N2
M2
K2
L3
K3

AZ_BITCLK
AZ_SDOUT
NC
AZ_SYNC
NC

L1
L2
L4
J2
J4
M3
L5

AC_BITCLK/GPIO38
AC_SDOUT/GPIO39
ACZ_SDIN0/GPIO42
ACZ_SDIN1/GPIO43
ACZ_SDIN2/GPIO44
AC_SYNC/GPIO40
AC_RST#/GPIO45

E23
AC21
AD7
1 0_0402_5% @ AE7
AA4
T4
1 0_0402_5%
D4
1 0_0402_5%
AB19

A17

CLK_USB_48M

CLK_USB_48M (17)

USB_RCOMP

A14 R164 2

1 11.3K_0402_1%

USB_ATEST1
USB_ATEST0

A11
A10

NC
NC

H12
G12

NC
NC

E12
D12

USB_HSDP7+
USB_HSDM7-

E14
D14

USB_HSDP6+
USB_HSDM6-

G14
H14

USB20_P6
USB20_N6

USB20_P6 (38)
USB20_N6 (38)

USB_HSDP5+
USB_HSDM5-

D16
E16

USB20_P5
USB20_N5

USB20_P5 (38)
USB20_N5 (38)

USB_HSDP4+
USB_HSDM4-

D18
E18

USB20_P4
USB20_N4

USB20_P4 (38)
USB20_N4 (38)

USB_HSDP3+
USB_HSDM3-

G16
H16

USB20_P3
USB20_N3

USB20_P3 (31)
USB20_N3 (31)

USB_HSDP2+
USB_HSDM2-

G18
H18

USB20_P2
USB20_N2

USB20_P2 (34)
USB20_N2 (34)

USB_HSDP1+
USB_HSDM1-

D19
E19

USB20_P1
USB20_N1

USB20_P1 (34)
USB20_N1 (34)

USB_HSDP0+
USB_HSDM0-

G19
H19

USB20_P0
USB20_N0

USB20_P0 (34)
USB20_N0 (34)

AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4

B9
B11
B13
B16
B18
A9
B10
B12
B14
B17

AVDDC

A12

AVSSC

A13

AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
AVSS_USB_25
AVSS_USB_26
AVSS_USB_27
AVSS_USB_28
AVSS_USB_29
AVSS_USB_30
AVSS_USB_31
AVSS_USB_32
AVSS_USB_33

A16
C9
C10
C11
C12
C13
C14
C16
C17
C18
C19
C20
D11
D21
E11
E21
F11
F12
F14
F16
F18
F19
F21
G11
G21
H11
H21
J11
J12
J14
J16
J18
J19

0103 Change to 11.3K

+3VALW

AVDD_USB

L46

USB PWR

1 2.2K_0402_5%
1 2.2K_0402_5%
1 10K_0402_5%

1 10K_0402_5%
1 10K_0402_5%
EC_GA20
(28) EC_GA20
EC_KBRST#
(28) EC_KBRST#
LPC_PME#
LPC_SMI#
@ R577 2
1 0_0402_5% S3_STATE_R
SYS_RESET#
SB_PCIE_WAKE#
(31,34) SB_PCIE_WAKE#
BLINK/GPM6#
H_THERMTRIP#
(8) H_THERMTRIP#

PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
NC
TEST1
TEST0
GA20IN
KBRST#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#

USB INTERFACE

+3VS

A3
B2
F7
A5
E3
B5
B3
F9
E9
G9
AF26
AG26
D7
C25
D9
F4
E7
C2
G7

ACPI / WAKE UP EVENTS

R424 2
R430 2
R567
2

Part 4 of 4

SB460
EC_SWI#
EC_SCI#
PM_SLP_S3#
PM_SLP_S5#
PWRBTN_OUT#
SYS_PWROK
SUS_STAT#

(28) EC_SWI#
(28) EC_SCI#
(28) PM_SLP_S3#
(28) PM_SLP_S5#
(28) PWRBTN_OUT#
(8,37) SB_PWROK
(30) SUS_STAT#

GPIO7
EC_THERM#

1 10K_0402_5%
1 10K_0402_5%

2
2

U18D

GPIO

10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%

USB OC

1
1
1
1

AZALIA

R152
R180

2
2
2
2

AC97

R144
R432
R140
R125

SB460 ONLY

+3VS

FANOUT0/GPIO3
GPIO31
GPIO13
DPSLP_OD#/GPIO37
GPIO14
TALERT#/GPIO10
SLP#/LDT_STP#
NC

SB460 ONLY

1
1

C533

C535

C542

C537

C546

C284

C525

C545 KC FBM-L11-201209-221LMAT_0805

0.1U_0402_16V4Z
2
2
2
2
2
2
2
2
10U_0805_10V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
10U_0805_10V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z
+3VALW

+3.3V_AVDDC
L12
1
1

C286

C292

KC FBM-L11-201209-221LMAT_0805

C294
2
0.1U_0402_16V4Z

1U_0402_6.3V4Z

2.2U_0603_6.3V6K

PLACE C286 AND

C294 CLOSE TO
U18

218S4RBSA11G SB460_BGA549

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/03/08

Deciphered Date

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 11, 2006

Sheet
1

19

of

51

PLACE SATA AC COUPLING

CAPS CLOSE TO SB460
U18B
SATA_TX0+
SATA_TX0-

2 C564
C565
2
SATA@
SATA@
2 0_0402_5% PATA@

SATA_DTX_SRX_N0
SATA_DTX_SRX_P0

AH20
AJ20

SATA_RX0SATA_RX0+

AH18
AJ18

SATA_TX1+
SATA_TX1-

AH17
AJ17

SATA_RX1SATA_RX1+

AH13
AH14

SATA_TX2+
SATA_TX2-

AH16
AJ16

SATA_RX2SATA_RX2+

AJ11
AH11

SATA_TX3+
SATA_TX3-

AH12
AJ13

SATA_RX3SATA_RX3+

SATA_CAL

AF12

SATA_CAL

SATA_X1

AD16

SATA_X1

SATA_X2

AD18

SATA_X2

R176

C297 1

SATA@
Y2
25MHZ_20P
SATA@

SATA@

10M_0402_5%
SATA_X2

2 27P_0402_50V8J

C295 1

27P_0402_50V8J
SATA@

+3VS

R462 2

R146
4.7K_0402_5%

2
(28) SATA_LED#

SATA_LED#

SATA@
1 1K_0402_1%

2
R143

2 C544
2.2U_0603_6.3V6K
@

SATA_ACT#
AC12
SATA ACTIVITY LED
AD14
PLLVDD_ATA
AJ10

0_0402_5%

SATA@

PLACE SATA_CAL
RES & CAP VERY
CLOSE TO BALL
OF U18

VCC_SB=1.2V WHEN SB600

VCC_SB 1.8V WHEN SB460

XTLVDD_SATA

AVDD_SATA

AE14
AE16
AE18
AE19
AF19
AF21
AG22
AG23
AH22
AH23
AJ12
AJ14
AJ19
AJ22
AJ23

AVDD_SATA_1
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_4
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
AVDD_SATA_8
AVDD_SATA_9
AVDD_SATA_10
AVDD_SATA_11
AVDD_SATA_12
AVDD_SATA_13
AVDD_SATA_14
AVDD_SATA_15

AB14
AB16
AB18
AC14
AC18
AC19
AD12
AD19
AD21
AE12
AE21
AF11
AF14
AF16
AF18
AG11
AG12
AG13
AG14
AG16
AG17
AG18
AG19
AG20
AG21
AH10
AH19

AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
AVSS_SATA_21
AVSS_SATA_22
AVSS_SATA_23
AVSS_SATA_24
AVSS_SATA_25
AVSS_SATA_26
AVSS_SATA_27

+1.8VS
PLLVDD_ATA

1U_0402_6.3V4Z

SATA@

1U_0402_6.3V4Z

C650 CLOSE TO THE

BALL OF U600

L13
1
2
CHB2012U121_0805

C293

SATA@
2

C291

R547
0_0402_5%
PATA@

SATA@
2

+1.8VS

XTLVDD_ATA

1
2
CHB2012U121_0805
SATA@

L47

C534 CLOSE TO THE

BALL OF U18

C534
1U_0402_6.3V4Z
SATA@

R548
0_0402_5%
PATA@

+1.8VS

1
2
CHB2012U121_0805

IDE_IOR DY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DREQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#

PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15

AD28
AD26
AE29
AF27
AG29
AH28
AJ28
AJ27
AH27
AG27
AG28
AF28
AF29
AE28
AD25
AD29

IDE_D0
IDE_D1
IDE_D2
IDE_D3
IDE_D4
IDE_D5
IDE_D6
IDE_D7
IDE_D8
IDE_D9
IDE_D10
IDE_D11
IDE_D12
IDE_D13
IDE_D14
IDE_D15

IDE_IORDY (23)
IDE_IRQ (23)
IDE_A0 (23)
IDE_A1 (23)
IDE_A2 (23)
IDE_DACK# (22,23)
IDE_DREQ (23)
IDE_IOR# (23)
IDE_IOW# (23)
IDE_CS1# (23)
IDE_CS3# (23)

NOTE:
C

IF THERE IS NO IDE, TEST

POINTS FOR DEBUG BUS
IS MANDATORY
IDE_D[15..0]

IDE_D[15..0] (23)

NC
NC
NC
NC
NC

J3
J6
G3
G2
G6

NC
NC

C23
G5

NC
NC
NC

M4
T3
V4

NC
NC
NC

N3
P2
W4

NC
NC
NC
NC
NC

P5
P7
P8
T8
T7

NC
NC
NC
NC
NC
NC
NC
NC

V5
L7
M8
V6
M6
P4
M7
V7

NC

N1

NC

M1

L45

AB29
AA28
AA29
AB27
Y28
AB28
AC27
AC29
AC28
W28
W27

218S4RBSA11G SB460_BGA549

AVDD_SATA

SATA@

C539

C529

C522

C543

C524

22U_0805_6.3V6M
SATA@
SATA@ 1U_0402_6.3V4Z
2
2
2
2
SATA@2
SATA@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SATA@ 0.1U_0402_16V4Z

R549
0_0402_5%
PATA@

Compal Secret Data

Security Classification
2005/05/09

Issued Date

PIDE_IORDY
PIDE_IRQ
PIDE_A0
PIDE_A1
PIDE_A2
PIDE_DACK#
PIDE_DRQ
PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#

PLLVDD_SATA_1
PLLVDD_SATA_2

AC16

R462 IS 1K 1% FOR 25MHz

XTAL, 4.99K 1% FOR 100MHz
INTERNAL CLOCK

Part 2 of 4

SATA_ACT#

XTLVDD_ATA

NOTE:

SB460

ATA 66/100

AH21
AJ21

SPI ROM

R5461
SATA_X1

SATA_STX_DRX_P0
SATA_STX_DRX_N0

HW MONITOR

(23) SATA_DTX_C_SRX_N0
(23) SATA_DTX_C_SRX_P0

2 C554
C556
2

SERIAL ATA

SATA_DTX_C_SRX_N0
SATA_DTX_C_SRX_P0

SATA@
0.01U_0402_16V7K 1
0.01U_0402_16V7K 1
SATA@
0.01U_0402_16V7K 1
0.01U_0402_16V7K 1

SERIAL ATA POWER

SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0

(23) SATA_STX_C_DRX_P0
(23) SATA_STX_C_DRX_N0

2006/03/08

Deciphered Date

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 11, 2006

Sheet
1

20

of

51

+3VS

U18C
A25
A28
C29
D24
L9
L21
M5
P3
P9
T5
V9
W2
W6
W21
W29
AA12
AA16
AA19
AC4
AC23
AD27
AE1
AE9
AE23
AH29
AJ2
AJ6
AJ26

PLACE ALL THE DECOUPLING CAPS ON

THIS SHEET CLOSE TO SB AS POSSIBLE.

+3VS
C513
220U_D2_4VM_R15
1
1

+
2

C521

C526

C523

C518

C519

C517

2
2
2
2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

+1.8VALW

VCC_SB=1.8V WHEN SB460

C532
0.1U_0402_16V4Z

C541

C536

2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z

+1.8VS

C553

+3VALW

+1.8VALW

A2
A7
F1
J5
J7
K1

S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6

+1.8VALW

G4
H1
H2
H3

S5_1.8V_1
S5_1.8V_2
S5_1.8V_3
S5_1.8V_4

+1.8VS

C527

C528

C531

C540

C538
2 22U_0805_6.3V6M
2
2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z 1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.8VS

AVDDCK_1.8V

VCC_SB=1.8V WHEN SB460

L11
1

2
1

CHB2012U121_0805

C262
2.2U_0805_10V6K

CPU_PWR=1.2V WHEN SB460

+5VS

R173 2

1
1K_0402_5%

A18
A19
B19
B20
B21

+1.2V_HT

V5_VREF

+3VS

AVDDCK_1.8V
D6

C520
0.1U_0402_16V4Z

CH751H-40PT _SOD323

+1.8VALW

C530

C551

C552

C550

C298

1U_0402_6.3V4Z

2006/4/13 modify
1

C548
2 22U_0805_6.3V6M
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

+3VALW

C555

C558

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28

M13
M17
N12
N15
N18
R13
R17
U12
U15
U18
V13
V17

0.1U_0402_16V4Z

SB460

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57

Part 3 of 4

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12

POWER

USB_PHY_1.8V_1
USB_PHY_1.8V_2
USB_PHY_1.8V_3
USB_PHY_1.8V_4
USB_PHY_1.8V_5

AA27

CPU_PWR

AE11

V5_VREF

A24

AVDDCK

A22

NC

B22

AVSSCK

V29
V28
V27
V26
V25
V24
V23
V22
U27
T29
T28
T27
T24
T21
P27

PCIE_VSS_42
PCIE_VSS_41
PCIE_VSS_40
PCIE_VSS_39
PCIE_VSS_38
PCIE_VSS_37
PCIE_VSS_36
PCIE_VSS_35
PCIE_VSS_34
PCIE_VSS_33
PCIE_VSS_32
PCIE_VSS_31
PCIE_VSS_30
PCIE_VSS_29
PCIE_VSS_28

PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27

A1
A20
A21
A29
B1
B7
B25
C21
C22
C24
D6
E24
F2
F23
G1
J1
J8
L6
L8
M9
M12
M15
M18
N13
N17
P1
P6
P21
R12
R15
R18
T6
T9
U13
U17
V3
V8
V12
V15
V18
V21
W1
W9
Y29
AA11
AA14
AA18
AC6
AC24
AD9
AD23
AE3
AE27
AG6
AJ1
AJ25
AJ29

D27
D28
D29
F26
G23
G24
G25
H27
J23
J26
J28
K27
L22
L23
L24
L27
L28
M21
M24
M27
N27
N28
P22
P23
P24
P25
P26

218S4RBSA11G SB460_BGA549

C563
2 22U_0805_6.3V6M
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/03/08

Deciphered Date

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 11, 2006

Sheet
1

21

of

51

NOTE: R751 PU RESISTOR FOR

RTC_IRQ# IS REQUIRED FOR SB600
TO KEEP THE INPUT FROM FLOATING.

1
R488
10K_0402_5%

R257
10K_0402_5%
2

2
1

(18) RTC_CLK
(18) CLK_PCI_1394_R
(18) PCI_CLK6
(18) CLK_PCI_LAN_R

R493
10K_0402_5%
2

R469
10K_0402_5%
@

R491
10K_0402_5%

R503
10K_0402_5%
@

(18) RTC_IRQ#
(18) SB_SPDIF
(18) CLK_PCI_MINI_R
(18) CLK_PCI_PCM_R
(18) CLK_PCI_SIO_R
(18,28,36) LPC_FRAME#

R497
10K_0402_5%
@

R496
10K_0402_5%
2

R248
10K_0402_5%
2

(19) SB_AC_SDOUT

R249
10K_0402_5%
@
2

1
R202
10K_0402_5%

R499
2.2K_0402_5%
@

R495
10K_0402_5%

R481
10K_0402_5%
@

R262
10K_0402_5%
@
2

R498
10K_0402_5%
@

R473
10K_0402_5%

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VALW

+3VS

+3VALW

SB460 ONLY

SB600 HAS 15K INTERNAL PD FOR AC_SDATA_OUT,

15K PU FOR RTC_CLK, EXTERNAL PU/PD IS
NOT REQUIRED; FOR SB460, EXTERNAL PU/PD ARE
REQUIRED

REQUIRED STRAPS

1
R492
10K_0402_5%
2

R504
10K_0402_5%
@

R245
10K_0402_5%

R494
10K_0402_5%

(18) CLK_PCI_LPC_R

SB600

PULL
HIGH

SB460

ACPWRON

SPDIF_OUT

PCI_MINI_R

PCI_PCM_R

MANUAL
PWR ON

SIO 24MHz

XTAL MODE

USB PHY
POWERDOWN
DISABLE

N OT
SUPPORTED

PULL
HIGH

AC_SDOUT

RTC_CLK

PCI_1394_R PCI_CLK6

PCI_LAN_R

USE
DEBUG
STRAPS

INTERNAL
RTC

USE INT.
PLL48

ROM TYPE:

ROM TYPE:

H, H = PCI ROM

H, H = PCI ROM

CPU IF=K8
DEFA ULT

DEFA ULT

IGNORE
DEBUG
STRAPS

PULL
LOW

PCI_LPC_R

H, L = SPI ROM

EXTERNAL
RTC

DEFA ULT

CPU IF=P4

USE EXT.
48MHZ

PCI_LAN_R

H, L = LPC I ROM
DEFA ULT

L, H = LPC ROM
L, L = FWH ROM

DEFA ULT

PCI_LPC_R
PULL
LOW

AUTO
PWR
ON

DEFA ULT

DEFA ULT

SIO 48MHz

48MHZ OSC
MODE

DEFA ULT

DEFA ULT

USB PHY
POWERDOWN
ENABLE

PCI_SIO_R

LFRAME#

PCIE_CM_SET
LOW

ENABLE
THERMTRIP#

DEFA ULT

DEFA ULT

PCIE_CM_SET
HIGH

DISABLE
THERMTRIP#

L, H = LPC II ROM
L, L = FWH ROM
NOTE: FOR SB460, PCICLK[8:7] ARE
CONNECTED TO SUBSTRATE
BALLS PCICLK[1:0]

DEFA ULT

OVERLAP COMMON PADS WHERE

POSSIBLE FOR DUAL-OP RESISTORS.

DEBUG STRAPS
+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

SB600 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

+3VS

R239
10K_0402_5%

R196
10K_0402_5%
@

+3VS

R188
10K_0402_5%
2

R220
10K_0402_5%
2

R211
10K_0402_5%
2

R215
10K_0402_5%
@
2

R118
10K_0402_5%
B

(20,23) IDE_DACK#
(18,26,31,32,35) PCI_AD28
(18,26,31,32,35) PCI_AD27
(18,26,31,32,35) PCI_AD26
(18,26,31,32,35) PCI_AD25
(18,26,31,32,35) PCI_AD24
(18,26,31,32,35) PCI_AD23

PCI_AD28

PCI_AD27

PCI_AD26

PCI_AD25

PCI_AD24

PCI_AD23

USE
LONG
RESET

USE
LONG
RESET

USE PCI
PLL

USE ACPI
BCLK

USE IDE
PLL

USE DEFAULT
PCIE STRAPS

BOOTFAILTIMER
DISABLED

DEFA ULT

DEFA ULT

DEFA ULT

DEFA ULT

DEFA ULT

DEFA ULT

DEFA ULT

USE
SHORT
RESET

USE
SHORT
RESET

BYPASS
PCI PLL

BYPASS
ACPI
BCLK

BYPASS IDE
PLL

USE EEPROM
PCIE STRAPS

BOOTFAILTIMER
ENABLED

IDE_DACK#

2.2K IF USED FOR SB600.

R199 1
R200 1

(19) SB460_GPIO14
(19) SB460_GPIO13

10K IF USED FOR SB460.

2 0_0402_5%
2 0_0402_5%

R198
1K_0402_5%
@

U20
8
7
6
5

2
@
@

VCC
WP
SCL
SDA

A0
A1
A2
VSS

1
2
3
4

AT24C04N-10SI-2.7_SO8
@

SB600 = PCI REQ4#/GNT4#

SB460 = GPIO13 (NC3), GPIO14 (NC5)

R195
10K_0402_5%
@

R241
10K_0402_5%
@

R189
10K_0402_5%
@

1
R221
10K_0402_5%
@
2

R212
10K_0402_5%
@
2

R216
10K_0402_5%
@
2

R119
10K_0402_5%
@

C302
0.1U_0402_16V4Z
@

SB PCIE EEPROM STRAPS

PULL
HIGH

PULL
LOW

SB460 ONLY

SB600 ONLY

SB600 ONLY

NOTE: FOR
SB460,
PCI_AD23 IS
RESERVED

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/03/08

Deciphered Date

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 11, 2006

Sheet
1

22

of

51

HDD CONN
IDE_D[0..15]

(20) IDE_D[0..15]

IDE_A[0..2]

(20) IDE_A[0..2]

+3VS
JP27

+5VS

(20)
(20)
(20)
(20)
(20,22)
(20)

R293
100K_0402_5%

PATA@

(20) IDE_CS1#

IDE_LED#

(28) IDE_LED#

IDE_DREQ
IDE_IOW#
IDE_IOR#
ID E_IORDY
IDE_DACK#
IDE_IRQ
IDE_A1
IDE_A0
IDE_CS1#
IDE_LED#

IDE_DREQ
IDE_IOW#
IDE_IOR#
IDE_IORDY
IDE_DACK#
IDE_IRQ

+5VS

80mils

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

(19) IDE_HRESET#
(14,18,28,31,36) NB_RST#

IDE_HRESET#

IN1

NB_RST#

IN2

IDE_CSEL R282 1
IDE_PDIAG#
IDE_A2
IDE_CS3#

U23
IDE_RESET#

SN74AHC1G08DCKR_SC70

2 475_0402_1%
PATA@
R259

33_0402_5%

IDE_CS3# (20)
@

+5VS

80mils

OCTEK_HDD-22SG1G_NR

C371 +
150U_D2_6.3VM

C324
2 0.1U_0402_16V4Z

IDE_D8
IDE_D9
IDE_D10
IDE_D11
IDE_D12
IDE_D13
IDE_D14
IDE_D15

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43

IDE_RESET#
IDE_D7
IDE_D6
IDE_D5
IDE_D4
IDE_D3
IDE_D2
IDE_D1
IDE_D0

2006/05/03 modify

PATA@

2
+5VS

PATA@
0.1U_0402_16V4Z

C150

+5VS

1
C148

C153
10U_0805_10V4Z

2
2
1U_0402_6.3V4Z

+3VS

C149

2
1000P_0402_50V7K

0.1U_0402_16V4Z

C360
10U_0805_10V4Z

C363

0.1U_0402_16V4Z

C366

C351

C349

C347

C346

C368

0.1U_0402_16V4Z

10U_0805_10V4Z

0.1U_0402_16V4Z

1000P_0402_50V7K

2
1000P_0402_50V7K

CDROM CONN
JP24
CDROM_L
CD_AGND
IDE_RESET#
IDE_D7
IDE_D6
IDE_D5
IDE_D4
IDE_D3
IDE_D2
IDE_D1
IDE_D0

(39) INT_CD_L
(39) CD_AGND
B

SATA HDD CONN

JP29
SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0

(20) SATA_STX_C_DRX_P0
(20) SATA_STX_C_DRX_N0

SATA_DTX_C_SRX_N0
SATA_DTX_C_SRX_P0

(20) SATA_DTX_C_SRX_N0
(20) SATA_DTX_C_SRX_P0

1
2
3
4
5
6
7

GND
HTX+
HTXGND
HRXHRX+
GND

IDE_IOW#
ID E_IORDY
IDE_IRQ
IDE_A1
IDE_A0
IDE_CS1#
IDE_LED#

+5VS
1

C370
+

L16
1

+3VS

FBM-L11-201209-121LMT_0805
L17
1

+5VS

SATA@
2

FBM-L11-201209-121LMT_0805
SATA@
A

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
VCC12
VCC12

@ 150U_D2_6.3VM

+5VS

2
2
R48

SD_CSEL
1
470_0402_5%
SATA@

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

CDROM_R

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

IDE_DACK#
IDE_PDIAG#
IDE_A2
IDE_CS3#

80mils

OCTEK_CDR-50JL1G

Close to SATA HDD

INT_CD_R (39)

IDE_D8
IDE_D9
IDE_D10
IDE_D11
IDE_D12
IDE_D13
IDE_D14
IDE_D15
IDE_DREQ
IDE_IOR#

1
2
R45
100K_0402_5%

+5VS

+5VS

If CDROM is Slave
then SD_CSEL= Floating
A

else SD_CSEL= Low

OCTEK_SAT-22SG1G_NR
SATA@

Compal Electronics, Inc.

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC, M/B LA-3121P

Size

Document Number

Rev
D

401411
Date:

, 11, 2006

Sheet
1

23

of

51

CRT Connector

D19
DAN217_SC59

+R_CRT_VCC

CH411DPT_SOT23

+CRT_VCC

W=40mils
F1

D17

D18
D20
@ DAN217_SC59 @ DAN217_SC59

+5VS

2
1.1A_6VDC_FUSE
1

C407
0.1U_0402_16V4Z

W=40mils

+3VS

JP15
1

R340

150_0402_1%

150_0402_1%

R338

R339

C408

C412

C414
C413
6P_0402_50V8C

150_0402_1% 2 8P_0402_50V8K 2 8P_0402_50V8K 2

0_0402_5%

CRT_HSYNC 2

P
OE#

1
R354

VGA_CRT_HSYNC

(14) VGA_CRT_HSYNC

1
L38

2
FCM1608C-121T_0603

HSYNC_L

1
L37

2
FCM1608C-121T_0603

VSYNC_L

D_CRT_HSYNC

C406
100P_0402_50V8J

(CL55)
D_DDC_DATA

1
10K_0402_5%

5
1

2
R360

C409
6P_0402_50V8C

SUYIN_070549FR015S208CR

+CRT_VCC
2
0.1U_0402_16V4Z

DDC_MD2

2
C410
6P_0402_50V8C

8P_0402_50V8K

10P for GMCH

1
C434

C424
10P_0402_25V8K

U36
SN74AHCT1G125GW_SOT353-5

C423
10P_0402_25V8K C411 2
68P_0402_50V8K

C422
68P_0402_50V8K

5
1

CRT_VSYNC 2

0_0402_5%

1
R356

VGA_CRT_VSYNC

2
0.1U_0402_16V4Z

P
OE#

1
C433

D_DDC_CLK
1

+CRT_VCC

(14) VGA_CRT_VSYNC

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
16

CRT_B

(14) CRT_B

CRT_R_L

L32
FCM2012C-800_0805
1
2 CRT_G_L
L34
FCM2012C-800_0805
1
2 CRT_B_L
L33
FCM2012C-800_0805

CRT_G

(14) CRT_G

17

CRT_R

(14) CRT_R

D_CRT_VSYNC

U35
SN74AHCT1G125GW_SOT353-5

+CRT_VCC
R359 1

R355
4.7K_0402_5%

VGA_DDC_DATA

Q24
3 BSS138_SOT23

VGA_DDC_CLK

VGA_DDC_CLK (14)

Place closed to chipset

VGA_DDC_DATA (14)

2
G

Q26
BSS138_SOT23
1

D_DDC_CLK

D24
@
DAN217_SC59

D22
@
DAN217_SC59

2
G

D_DDC_DATA
D23
@
DAN217_SC59

+3VS

R344
2

TV-OUT Conn.

0_0402_5%

4.7K_0402_5%

+3VS

VGA_TV_LUMA_R

1
2
R351
0_0402_5% TV@
1
2
R350
0_0402_5% TV@
1
2
R349
0_0402_5% TV@

VGA_TV_COMPS_R

(14) VGA_TV_COMPS

VGA_TV_CRMA_R

R348

R346

(14) VGA_TV_CRMA

(14) VGA_TV_LUMA

R352

150_0402_1% TV@
2

150_0402_1% TV@

C427
1
L41
C421
1
L39
C429
1
L40

22P_0402_50V8J TV@
2
2
FCM1608C-121T_0603 TV@
22P_0402_50V8J TV@
1
2
2
FCM1608C-121T_0603 TV@
22P_0402_50V8J TV@
1
2
2
FCM1608C-121T_0603 TV@

JP16

C425
220P_0402_50V7K
1
1 TV@
1
C428
220P_0402_50V7K
C430
TV@
2 220P_0402_50V7K
2
2
TV@

C419
220P_0402_50V7K
TV@

TV_CRMA_L
TV_COMPS_L
TV_LUMA_L

C418
220P_0402_50V7K
TV@

C417
220P_0402_50V7K
TV@

3
6
7
5
2
4
1
8
9
SUYIN_030107FR007SX08FU
TV@

(ECQ60)

150_0402_1% TV@

2005/12/30 Change to 220P

4

Compal Secret Data

Security Classification
2005/05/09

Issued Date

Deciphered Date

2006/03/08

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 11, 2006

Sheet
E

24

of

51

LCD POWER CIRCUIT

+LCDVDD

+3VALW

R343
R341
300_0603_1%

+3VS

W=60mils

ENVDD

C431
2 0.047U_0402_16V7K

100K_0402_5%

2
G
3

(14) ENVDD

R347

Q23
SI2301BDS_SOT23

2
1

100K_0402_5%

R345
10K_0402_5%

Q25

W=60mils

2
G
S

R342

D
Q22
2N7002_SOT23

1 2

1K_0402_5%

+LCDVDD

+LCDVDD

LCD/PANEL CONN.
1

C415
4.7U_0805_10V4Z

C420

04/17 modify

0.1U_0402_16V4Z
B+

BSS138_SOT23

+3VS
(14) EDID_LCD_CLK
(14) EDID_LCD_DAT
(14) LVDS_TXUN0
(14) LVDS_TXUP0
+3VS

(14) LVDS_TXUP1
(14) LVDS_TXUN1

+3VS

R1
C426
@ 0.1U_0402_16V4Z

4.7K_0402_5%
(28) BKOFF#

BKOFF#

D2
2 CH751H-40PT _SOD323

(14) LVDS_TXUP2
(14) LVDS_TXUN2
(14) LVDS_TXUCKN
(14) LVDS_TXUCKP

DISPOFF#

L36
FBMA-L11-201209-121LMA40T _0805
1
2
FBMA-L11-201209-121LMA40T _0805
L42
1
2
EDID_LCD_CLK
EDID_LCD_DAT
LVDS_TXUN0
LVDS_TXUP0
LVDS_TXUP1
LVDS_TXUN1
LVDS_TXUP2
LVDS_TXUN2
LVDS_TXUCKN
LVDS_TXUCKP

JP1

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

DAC_BRIG
INVT_PWM
DISPOFF#

DAC_BRIG (28)
INVT_PWM (28)

L35 1
2
+LCDVDD
FBMA-L11-201209-121LMA40T _0805
LVDS_TXLN0
LVDS_TXLP0

LVDS_TXLN0 (14)
LVDS_TXLP0 (14)

LVDS_TXLN1
LVDS_TXLP1

LVDS_TXLN1 (14)
LVDS_TXLP1 (14)

LVDS_TXLP2
LVDS_TXLN2

LVDS_TXLP2 (14)
LVDS_TXLN2 (14)

LVDS_TXLCKN
LVDS_TXLCKP

LVDS_TXLCKN (14)
LVDS_TXLCKP (14)

ACES_88107-4000G

INVT_PWM

1
D21
@ 1N4148_SOT23

(SAME AS ACES_87216-4016)

C416
1U_0402_6.3V4Z @

Compal Secret Data

Security Classification
2005/05/09

Issued Date

Deciphered Date

2006/03/08

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom 401411
Date:

, 11, 2006

Rev
D
Sheet
1

25

of

51

INTA#

31

PME#

(18,31,32,34,35) PCI_RST#
CLK_PCI_LAN
PM_CLKRUN#

(18) CLK_PCI_LAN
(18,31,36) PM_CLKRUN#

CLK_PCI_LAN

R155
@ 10_0402_5%

27

RST#

28
65

CLK
CLKRUN#

4
17
128

GND/VSS
GND/VSS
GND/VSS

21
38
51
66
81
91
101
119

GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST

NC/HSDAC+
NC/HG
NC/LG2

11
123
124

R154
R153

35
52
80
100

GND
GND
GND
GND

100@

No_Stuff

8110SB@

No_Stuff

Stuff

No_Stuff

8110SC@

No_Stuff

No_Stuff

Stuff

No_Stuff

No_Stuff

No_Stuff

2 1K_0402_5%
+3VS
2 15K_0402_5%
5.6K_0603_1%
2 100@
R149
2 GIGA@ 2.49K_0603_1%
R150

1
1
1
1

+LAN_AVDDH

RSET 5.6K for 8100CL

2.49K for 8110S(B/C)

20mils

1 R133
2
GIGA@ 0_0805_5%

1
2
R151

GIGA@
0_0402_5%
1

+2.5V_LAN

+3VALW

+1.2V_LAN

C270

C273
2

R166
0_0805_5%
100@

1U_0402_6.3V4Z

NC/VSS
NC/VSS

9
13

NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND

22
48
62
73
112
118

+1.8V_LAN

CTRL25

R165
0_0805_5%
8110SC@

LAN_X1 1

CTRL12

40mils

CTRL25

CTRL25

CTRL12

125

CTRL12

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

26
41
56
71
84
94
107

LAN_X2

25MHZ_20P
C255
27P_0402_50V8J

3
7
20
16

VDD12
VDD12
VDD12
VDD12
VDD12

126
32
54
78
99

NC/VDD12
NC/VDD12
NC/VDD12
NC/VDD12
NC/VDD12

24
45
64
110
116

1
1
2

C258
27P_0402_50V8J
2

R148
0_0805_5%
8110SB@
Q8

2
B

R163
0_0805_5%
8110SC@

40mils

C281
10U_0805_10V6M

C271
C275
GIGA@ 4.7U_0805_10V4Z
2
2
GIGA@ 0.1U_0402_16V4Z

2006/02/20 Change to 10uF

+3VALW

1
C213
0.1U_0402_16V4Z

1
C215
0.1U_0402_16V4Z

1
C209
0.1U_0402_16V4Z

1
C207
0.1U_0402_16V4Z

C206
0.1U_0402_16V4Z

R158 1

+LAN_AVDDL R157 1

1
AVDDL
AVDDL
AVDDL
AVDDL

+3VALW

GIGA@
2SB1197K_SOT23

Q9
2SB1197K_SOT23

2
B

Y1

+1.5V_LAN

+3VALW

C251
GIGA@ 0.1U_0402_16V4Z
2
GIGA@ 0.1U_0402_16V4Z
2

1
2
+1.8V_LAN C269
0.1U_0402_16V4Z
R162
2
2
8110SC@ 0_0402_5%
+LAN_AVDDL25
1
2
+2.5V_LAN
R161
20mils
8110SB@ 0_0402_5%

C266
0.1U_0402_16V4Z

R115 1

C257
0.1U_0402_16V4Z

1
C205
0.1U_0402_16V4Z

C256

C219

C208
0.1U_0402_16V4Z

C267

R110 1

40mils

C218
0.1U_0402_16V4Z

C214

GIGA@ 0.1U_0402_16V4Z
1
1
1
1
GIGA@ 0.1U_0402_16V4Z
GIGA@ 0.1U_0402_16V4Z
V_12P
R160 1
GIGA@
0.1U_0402_16V4Z
2
12
+2.5V_LAN
NC
20mils1 C278 R156 100@ 0_0402_5%
+LAN_AVDDH
RTL8110SBL_LQFP128
1
2
GIGA@ 0_0402_5%
0.1U_0402_16V4Z
2

40mils

1
C264
0.1U_0402_16V4Z

+LAN_DVDD

2
C274
@ 18P_0402_50V8J

No_Stuff

25

(28) LAN_PME#

10
120

8110SB/CL(10/100/1000 LAN)

Stuff

LAN_X1
LAN_X2

Power

(18) PCI_PIRQF#
(18,31,32) PCI_PIRQH#

88

(27)
(27)
(27)
(27)

8100CL(10/100 LAN)

100@

REQ#
GNT#

NC/M66EN
NC/AVDDH
AVDDH

LAN_MIDI2+
LAN_MIDI2LAN_MIDI3+
LAN_MIDI3-

BOM structure

30
29

(18) PCI_REQ#3
(18) PCI_GNT#3
2
0_0402_5%
2
0_0402_5%

105
23
127
72
74

(27)
(27)
(27)
(27)

+3VALW

LAN_ACTIVITY# (27)
LAN_LINK# (27)

PERR#
SERR#

LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA

LAN_MIDI0+
LAN_MIDI0LAN_MIDI1+
LAN_MIDI1-

8110SB/CL(10/100/1000 LAN)
2.49K

0.1U_0402_16V4Z

AT93C46-10SI-2.7_SO8
2
0_0402_5%
1
@ 0_0402_5%

1
R131
2
R129

8100CL(10/100 LAN)
5.6K

70
75

121
122

C211

PIN
RSET

(18,31,32,35) PCI_PERR#
(18,31,32) PCI_SERR#

LAN_MIDI2+
LAN_MIDI2LAN_MIDI3+
LAN_MIDI3-

PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

14
15
18
19

5
6
7
8

GND
NC
NC
VCC

76
61
63
67
68
69

LINK_1000#
LAN_MIDI0+
LAN_MIDI0LAN_MIDI1+
LAN_MIDI1-

DO
DI
SK
CS

(18,31,32,35) PCI_PAR
(18,31,32,35) PCI_FRAME#
(18,31,32,35) PCI_IRDY#
(18,31,32,35) PCI_TRDY#
(18,31,32,35) PCI_DEVSEL#
(18,31,32,35) PCI_STOP#

ACTIVITY#
LINK_100#

1
2
5
6

X1
X2

4
3
2
1

IDSEL

1
R5021
R501

117
115
114
113

LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS

46

2 LAN_IDSEL
100_0402_5%

1
R135

LED0
LED1
LED2
NC/LED3

NC/MDI2+
NC/MDI2NC/MDI3+
NC/MDI3-

C/BE#0
C/BE#1
C/BE#2
C/BE#3

PCI_AD17

108
109
111
106

TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-

92
77
60
44

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

EEDO
AUX/EEDI
EESK
EECS

+3VALW

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

LAN I/F

104
103
102
98
97
96
95
93
90
89
87
86
85
83
82
79
59
58
57
55
53
50
49
47
43
42
40
39
37
36
34
33

PCI I/F

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

2 3.6K_0402_5%
U11

R132 1

U12

(18,31,32,35)
(18,31,32,35)
(18,31,32,35)
(18,31,32,35)

R24
0_0402_5%
@

PCI_AD[0..31]

(18,22,31,32,35) PCI_AD[0..31]

C265
0.1U_0402_16V4Z

2
8110SC@ 0_0805_5%
2
8110SB@ 0_0805_5%

100@
R107 1

0_0805_5%
2

8110SC@ 0_0805_5%
2

100@

2
0_0805_5%

8110SB@ 0_0805_5%
R159 1
2

+1.8V_LAN

+3VALW

+2.5V_LAN

+1.5V_LAN
+1.2V_LAN

+2.5V_LAN

R130 1

2
8110SB@ 0_0805_5%

+1.2V_LAN

R117 1

2
8110SC@ 0_0805_5%

+1.5V_LAN

C212

GIGA@
1
0.1U_0402_16V4Z

RTL8110SBL change to Ver.D

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/05/09

Issued Date

Deciphered Date

2006/07/29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 08, 2006

Sheet
1

26

of

51

T1
LAN_MIDI1LAN_MIDI1+

LAN RTL8110SB/C & RTL8100CL

LAN_MIDI0LAN_MIDI0+

C321
0.1U_0402_16V4Z
1

unpop when use RTL8100CL(10/100)

C486

100@

+2.5V_LAN

MCT4
RJ45_MDI0RJ45_MDI0+

LF-H80P_16P
100@

LAN_ACTIVITY#

(26) LAN_ACTIVITY#

R52

+3VALW

(26) LAN_MIDI3(26) LAN_MIDI3+

LAN_MIDI3LAN_MIDI3+

RJ45_MDI3RJ45_MDI3+

(26) LAN_MIDI2(26) LAN_MIDI2+

LAN_MIDI2LAN_MIDI2+

RJ45_MDI2RJ45_MDI2+

(26) LAN_MIDI1(26) LAN_MIDI1+

LAN_MIDI1LAN_MIDI1+

(26) LAN_MIDI0(26) LAN_MIDI0+

LAN_MIDI0LAN_MIDI0+

C494
0.01U_0402_16V7K

+3VALW

RJ45_MDI0RJ45_MDI0+

R101

PR4+

RJ45_MDI1-

PR2-

RJ45_MDI2-

PR3-

RJ45_MDI2+

PR3+

RJ45_MDI1+

PR2+

RJ45_MDI0-

PR1-

RJ45_MDI0+

PR1+

10
1 300_0603_5%

SHLD4

16

SHLD3

15

PR4-

SHLD2

14

SHLD1

13

Green LED-

Green LED+
SUYIN_100073FR012S100ZL

HBL-50

R87
75_0402_1%
C180

RJ45_GND

GIGA@ 0.01U_0402_16V7K

1
1
1
C170 C159 C146

Amber LED+

RJ45_MDI3+

1
R395
49.9_0402_1%

Amber LED-

11
8

LAN_LINK#

(26) LAN_LINK#

MCT4

2
GIGA@ 0_0402_5%

RJ45_MDI1RJ45_MDI1+

R390
R391
49.9_0402_1%
49.9_0402_1%

49.9_0402_1%

R387

MCT3

12

RJ45_MDI3-

R95
GIGA@ 0_0603_5%

R90

1 300_0603_5%

R384
GIGA@ 49.9_0402_1%
R378
GIGA@ 49.9_0402_1%
R385
R381
GIGA@ 49.9_0402_1%
GIGA@ 49.9_0402_1%

JP22

24HST1041A-3(SP050002110) for RTL8110SB/CL(GbE)

TST1284-LF (SP050001X10) for RTL8100CL(10/100)
24ST0023-3: Half port(TD[3:4], MX[3:4])

GIGA@ 0.1U_0402_16V4Z
2

RJ45_MDI1RJ45_MDI1+
MCT3

16
15
14
13
12
11
10
9

RX+
RXCT
NC
NC
CT
TX+
TX-

1
C482

GIGA@ 0.1U_0402_16V4Z
2

RD+
RDCT
NC
NC
CT
TD+
TD-

C316
2 0.1U_0402_16V4Z

1
2
3
4
5
6
7
8

R86
75_0402_1%

0.01U_0402_16V7K
2 GIGA@

C500

2
2
2
0.01U_0402_16V7K
0.01U_0402_16V7K
2
0.01U_0402_16V7K
GIGA@

LANGND
1

C190
1000P_1206_2KV7K

1
C199

C200
4.7U_0805_10V4Z

0.1U_0402_16V4Z

R69
R66

1
1

2 100@
2 100@

0_0402_5%
0_0402_5%

RJ45_MDI2+
RJ45_MDI2-

R83
R77

1
1

2 100@
2 100@

0_0402_5%
0_0402_5%

RJ45_MDI3+
RJ45_MDI3-

GIGA@

reseved for RTL8100CL(10/100)

2

R61
75_0402_1%

R72
75_0402_1%

RJ45_GND

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/05/09

Issued Date

Deciphered Date

2006/07/29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 08, 2006

Sheet
1

27

of

51

+3VALW

+5VS
RP29
1
2
3
4

8
7
6
5

+3VALW

KB_CLK
KB_DATA
PS_CLK
PS_DATA

4.7K_1206_8P4R_5%
+3VALW
RP35
1
2
3
4

8
7
6
5

RP37
8
7
6
5

IE_BTN#
EMPWR_BTN#
E-MAIL_BTN#
USER_BTN#

100K_1206_8P4R_5%
+3VS
1
R510

2 5IN1_LED#
10K_0402_5%

+5VALW
RP36
1
2
3
4

8
7
6
5

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

C589
2

4.7K_1206_8P4R_5%
+5VS

+3VALW

0.1U_0402_16V4Z
1

2
R517

1
47K_0402_5%

(38) CAPS_LED#
(38) NUM_LED#
(20) SATA_LED#

(19) EC_GA20
(19) EC_KBRST#

TP_CLK

1
R208
1 TP_DATA
R207

+3VALW
A

1K_0402_5%
1K_0402_5%
1K_0402_5%

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
EMPWR_BTN#
EC_SCI#
E-MAIL_BTN#
IE_BTN#
ENBKL
BKOFF#
FSTCHG
EC_SMI#
IDE_LED#
USER_BTN#

8
20
21
22
27
28
48
62
63
69
70
VGATE
75
@
0_0402_5%
109
1
LID_SW#
118
BT_ON#
119
SYSON
148
SUSP#
149
VR_ON
155
156
BTSW_EN#
162
PBTN_OUT# 168
CAPS_LED#
NUM_LED#
SATA_LED#

55
54
23
41
19
5
6
31

GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D

159

INVT_PWM
BEEP#

2
26
29
30
44
76
172
176

ON/OFF

GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7

81
82
83
84
87
88
89
90

BATT_TEMP
SKU_ID
BATT_OVP

GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7

99
100
101
102
1
42
47
174

DAC_BRIG

Wake Up

GPWU0
GPWU1
GPWU2
GPWU3
Pin
GPWU4
GPWU5
TIN1/GPWU6
TIN2/FANFB2/GPWU7

Analog To Digital

SMBus

Digital To Analog

EC_ON
EC_LID_OUT#
EC_MUTE

PM_SLP_S3#
PM_SLP_S5#
EC_RCIRRX
EC_PME#
S3_STATE

TV_THERM#
AD_BID0

Rb

C304

INVT_PWM (25)
BEEP# (39)

2
2

1
R206
1
R205
1
R204

KBA1
KBA4
KBA5

1
R519
1
R520
1
R521

2
2
2

IR EF
EN_DFAN1

TOUT2/GPIO2F

175

EC_THERM#

E51IT0/GPIO00
E51IT1/GPIO01
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT

3
4
106
107

WLSW_EN#
E51_RXD
1
E51_TXD
R191

XCLKI
XCLKO

158
160

0_0402_5%

C320
0.1U_0402_16V4Z

VLDT_EN_P (47)
C

VLDT_EN

2
1
0_0402_5%

ACOFF (42,44)
USB_EN# (34,38)
EC_ON (37)
EC_LID_OUT# (19)
EC_MUTE (40)

0
1
2
3

ON/OFF (37)
ACIN (19,45)
PM_SLP_S3# (19)
PM_SLP_S5# (19)

S3_STATE (19)

VLDT_EN_P

VLDT_EN (37)

Board ID
UMA
DISCRETE

ECAGND
2
1
C328 0.01U_0402_16V7K

SKU ID
W / O SATA
WITH SATA

BATT_TEMP (45)

BATT_OVP (44)

DAC_BRIG (25)
IREF (44)
EN_DFAN1 (6)
WL_OFF# (31)
MINI1_OFF# (31)

+3VS

R222
100K_0402_5%
2
1

TV_THERM# (31)
TV_THERM#
R612
2

@ 0_0402_5%

PWR_LED (38)
PWR_SUSP_LED# (38)
BATT_FULL_LED# (38)
BATT_CHGI_LED# (38)
WL_ON_LED# (38)
BT_ON_LED# (38)
E-MAIL_LED# (38)
MEDIA_LED# (38)

VLDT_EN_P

VLDT_EN_P (47)

2006/04/26 modify, for reserve

B

C RY1
C344

C RY2

10P_0402_25V8K
2

FAN_SPEED1 (6)

C343

10P_0402_25V8K
2

X1
EC_THERM# (8,19)
EC_RSMRST# (19)
WLSW_EN# (38)
EAPD
2
0_0402_5%

EAPD (39)

32.768KHZ_12.5P_1TJS125DJ2A073

C RY2
C RY1

KB910Q B4_LQFP176
EAPD

R213
100K_0402_5%
2
1

+3VS

@
A

ENBKL
100K_0402_5%
DPLL_TP
1K_0402_5%
TEST_TP
1K_0402_5%

2005/05/09

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Rd

R573

KB910 C1 VERSION
2

SKU_ID
R227

0_0402_5%
2
0.1U_0402_16V4Z

POUT (48)

FAN_SPEED1
DPLL_TP
TEST_TP

Timer Pin

FnLock#/GPIO12 *
CapLock#/GPIO011 *
NumLock#/GPIO0A *
ScrollLock#/GPIO0F *
MISC
ECRST#
GA20/GPIO02
KBRST#/GPIO03
ECSCI#

ACOFF

171
12
11

GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3

AD_BID0
R201

2006/04/26 modify, for reserve

PWR_LED#
PWR_SUSP_LED#
BATT_FULL_LED#
BATT_CHGI_LED#
WL_ON_LED#
BT_ON_LED#
E-MAIL_LED#
MEDIA_LED#

FANTEST_TP/GPIO05/FAN3PWM

KSO16 (29)
KSO17 (29)

R246
100K_0402_5%

Rc

R611
2
1
0_0402_5%

85
86
91
92
93
94
97
98

* GPIO18/XIO8CS#
* GPIO19/XIO9CS#
*GPIO1A/XIOACS#
* GPIO1B/XIOBCS#
Expanded I/O * GPIO1C/XIOCCS#
* GPIO1D/XIODCS#
* GPIO1E/XIOECS#
* GPIO1F/XIOFCS#

GPIO

32
33
36
37
38
39
40
43

R210
@ 100K_0402_5%

Ra

GPOW0/PWM0
GPOW1/PWM1
FAN2PWM/GPOW2/PWM2
GPOW3/PWM3
Width GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6
FAN1PWM/GPOW7/PWM7

+3VALW

SCL1
SDA1
SCL2
SDA2

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

+3VALW

163
164
169
170

Interface

71
72
73
74
77
78
79
80

SKU ID definition,
Please see page 3.

PSCLK1
PSDAT1
PSCLK2
PSDAT2PS2
PSCLK3
PSDAT3

161

ECAGND

110
111
114
115
116
117

Pulse

17
35
46
122
137
167

2
4.7K_0402_5%
2
4.7K_0402_5%

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

(38) EMPWR_BTN#
(19) EC_SCI#
(38) E-MAIL_BTN#
(38) IE_BTN#
(14) ENBKL
(25) BKOFF#
(44) FSTCHG
(19) EC_SMI#
(23) IDE_LED#
(38) USER_BTN#
(19) EC_SWI#
(48) VGATE
R594 2
(19,30) SB_INT_FLASH_SEL#
(29) LID_SW#
(38) BT_ON#
(34,41) SYSON
(30,34,41) SUSP#
(48) VR_ON
(32) 5IN1_LED#
(38) BTSW_EN#
(19) PWRBTN_OUT#

+3VALW
1
2
3
4

1
100K_0402_5%
KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
(29) TP_CLK
TP_DATA
(29) TP_DATA

(30,45)
(30,45)
(8)
(8)

FR D#
SELIO#
FSEL#

10K_1206_8P4R_5%

2
R209

GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7

Analog Board ID definition,

Please see page 3.

CH751H-40PT _SOD323

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

(38) RCIRRX

EC_RCIRRX

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154

GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8
GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17

IN

D9

@ ACES_85205-0400

OUT

2
R258
10K_0402_5%
C

2 BTSW_EN#
100K_0402_5%
2 WLSW_EN#
100K_0402_5%

1
R511
1
R522

E51_RXD
E51_TXD

NC

+3VALW

RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN

KSO[0..15] (29)

1U_0603_10V4Z

NC

+3VALW

EC_PME#

150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105

X-BUS Interface

(26) LAN_PME#

FR D#
FWR#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

1
2
3
4

1
2
3
4

(31) MINI_PME#

0_0402_5%
1
0_0402_5%
1

R514
10K_0402_5%
R516
2
R515
2

FRD#
FWR#
FSEL#

KSO[0..15]

C337

(30)
(30)
(30)

KSI[0..7] (29)

(18,32,36) SERIRQ
+3VALW

+3VALW
JP8
KSI[0..7]

(18) CLK_PCI_LPC

LAD0
LAD1
LAD2
LAD3
LFRAME# LPC Interface
LRST#/GPIO2C
LCLK
SERIRQ
CLKRUN#/GPIO0C *
LPCPD#/GPIO0B *

BATGND

1 @ 33_0402_5%

For EC Tools

+3VALW

Internal Keyboard

(18,36) LPC_AD0
(18,36) LPC_AD1
(18,36) LPC_AD2
(18,36) LPC_AD3
(18,22,36) LPC_FRAME#
(14,18,23,31,36) NB_RST#

R518 2

VCC
VCC
VCC
VCC
VCC
VCC
VCC

C591
@ 22P_0402_50V8J
2
1

15
14
13
10
9
165
18
7
25
24

VCCBAT

U27
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

95

20mil

96

2
2
0.1U_0402_16V4Z

VCCA

2
2
0.1U_0402_16V4Z

C586

AGND

C310
L15
ECAGND
1
2
FBM-L11-160808-800LMT_0603

L14
1
2+EC_VCCA
2 FBM-L11-160808-800LMT_0603
20mil
1
C584
C590
20mil
1000P_0402_50V7K 1000P_0402_50V7K
C305
1
1
1
C341
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2

ENE-KB910-B4

ADB[0..7] (30)

0.1U_0402_16V4Z
1
2

GND
GND
GND
GND
GND
GND

0.1U_0402_16V4Z
1
1 C585
1
C323

KBA[0..19] (30)

ADB[0..7]

16
34
45
123
136
157
166

KBA[0..19]

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 08, 2006

Sheet
1

28

of

51

Scroll Up
+3VALW

Lid Switch

SCRL_U

SW2
EVQPLHA15_4P
1
SCRL_R

(28)

KSO16

D14
@
PSOT24C_SOT23

2
5
6

SCRL_L

Scroll Down

SCRL_U
SW7
EVQPLHA15_4P
3
1

SCRL_D

ACES_85201-10051
MEDIA@

D13
@
PSOT24C_SOT23

2
5
6

Left

Right

SW3
EVQPLHA15_4P
3
1

BTN_R

SW4
EVQPLHA15_4P
1

SCRL_D
BTN_L

BTN_L

KSO17

MPU-101-81_4P

(28)

SW6
EVQPLHA15_4P
1

D16
@
PSOT24C_SOT23

1
2
3
4
5
6
7
8
9
10

KSO17
KSI2
KSI5
KSO16
KSI3
KSI4

SCRL_R

KSO17

D15
@
PSOT24C_SOT23

5
6

5
6

KSO16

LID_SW# (28)

SCRL_L

5
6

JP5

Scroll Right

SW5
EVQPLHA15_4P
3
1

Scroll Left

5
6

R337
100K_0402_5%

SW1

BTN_R

KSI2

PLAY

KSI3

STOP

VOL_UP

KSI4

NEXT

VOL_DOWN

KSI5

REV

ARCADE_TV

To TP/B Conn.
JP6
+5VS
+5VS

1
2
3
4
5
6
7
8
9
10
11
12

TP_DATA
TP_CLK

(28) TP_DATA
(28) TP_CLK

C137

BTN_R
SCRL_R
SCRL_U
SCRL_L
SCRL_D
BTN_L

0.1U_0402_16V4Z

ACES_87151-1207

INT_KBD Conn.
100P_0402_50V8J

KSO7

C231 1

100P_0402_50V8J

KSO14

C242 1

100P_0402_50V8J

KSO6

C230 1

100P_0402_50V8J

KSO13

C241 1

100P_0402_50V8J

KSO5

C229 1

100P_0402_50V8J

KSO12

C240 1

100P_0402_50V8J

KSO4

C228 1

100P_0402_50V8J

KSI0

C239 1

KSO11

C238 1

100P_0402_50V8J

KSO3

C227 1

100P_0402_50V8J

100P_0402_50V8J

KSI4

C226 1

KSO10

100P_0402_50V8J

C237 1

100P_0402_50V8J

KSO2

C225 1

100P_0402_50V8J

KSI1

C236 1

100P_0402_50V8J

KSO1

C224 1

100P_0402_50V8J

KSI2

C235 1

100P_0402_50V8J

KSO0

C223 1

100P_0402_50V8J

KSO9

C234 1

100P_0402_50V8J

KSI5

C222 1

100P_0402_50V8J

KSI3

C233 1

100P_0402_50V8J

KSI6

C221 1

100P_0402_50V8J

KSO8

C232 1

100P_0402_50V8J

KSI7

C220 1

100P_0402_50V8J

KSI[0..7]
KSO[0..15]

100P_0402_50V8J

C157 1

100P_0402_50V8J

SCRL_U

C162 1

100P_0402_50V8J

SCRL_L

C151 1

100P_0402_50V8J

SCRL_D

C167 1

100P_0402_50V8J

BTN_L

C144 1

100P_0402_50V8J

TP_DATA

C169 1

100P_0402_50V8J

TP_CLK

C174 1

100P_0402_50V8J

JP7
KSO15
KSO14
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI2
KSO9
KSI3
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
KSO0
KSI5
KSI6
KSI7

(Left)

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

TP_DATA
TP_CLK

C243 1

C139 1

SCRL_R

D26
@
PSOT24C_SOT23

(Right)
KSO15

BTN_R

ACES_85201-24051

KSI[0..7] (28)
KSO[0..15] (28)

Compal Secret Data

Security Classification
Issued Date

2005/05/09

Deciphered Date

2006/03/08

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

Size Document Number

Custom 401411
Date:

, 11, 2006

Rev
D
Sheet

29

of

51

+3VALW

SUS_STAT# (19)

INT_FLASH_SEL

OE#

U24A

ADB[0..7]

KBA[0..19]

(28) KBA[0..19]
(28) ADB[0..7]

14

SB_INT_FLASH_SEL# (19,28)

74LVC125APW_TSSOP14
+3VALW
@

2
+3VALW

+3VALW

R219
100K_0402_5%

R264
10K_0402_5%

SUSP# (28,34,41)

FSEL# (28)

U24B

EC_FLASH# (19)
INT_FSEL#

Q13
2N7002_SOT23

TC7SH32FU_SSOP5

1
2

I1

I0

U19

FWE#

FRD# (28)

INT_FLASH_EN#

2
G

0.1U_0402_16V4Z

1
R265

@
2
6
22_0402_5%

1
@
R266
100K_0402_5%

OE#

0.1U_0402_16V4Z
C333
1
2

+3VALW

C313

FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
FR D#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

C301
0.1U_0402_16V4Z

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

VDD
WE#
A17
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3

A18
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

U21
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

FSEL#

@
74LVC125APW_TSSOP14

FWR# (28)

@
R593 1

SST39VF040-70-4C-NH_PLCC32
@

2 0_0402_5%

(CL55)

1MB Flash ROM

1MB ROM Socket

+3VALW
U17

INT_FSEL#
FR D#
FWE#

22
24
9

CE#
OE#
WE#

VCC0
VCC1

+5VALW

+5VALW

C318
JP10

D0
D1
D2
D3
D4
D5
D6
D7

25
26
27
28
32
33
34
35

RP#
NC
READY/BUSY#
NC0
NC1

10
11
12
29
38

GND0
GND1

23
39

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
RESET#

1
2
R225
100K_0402_5%

0.1U_0402_16V4Z

+3VALW

KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

31
30

KBA17
C348 1
KBA19
KBA10
ADB7
ADB6
ADB5
ADB4

2 0.1U_0402_16V4Z

R284
100K_0402_5%

21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37

U31

+3VALW

8
7
6
5

(28,45) EC_SMB_CK1
(28,45) EC_SMB_DA1

VCC
WP
SCL
SDA

A0
A1
A2
GND

1
2
3
4

AT24C16AN-10SI-2.7_SO8
ADB3
ADB2
ADB1
ADB0
FR D#

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

FSEL#
KBA0

R277
100K_0402_5%

@ SUYIN_80065AR-040G2T
SST39VF080-70_TSOP40

SST part : SA390800000

MXIC part : SA290080120

Compal Secret Data

Security Classification
Issued Date

2005/05/09

Deciphered Date

2006/03/08

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

Size Document Number

Custom 401411
Date:

, 11, 2006

Rev
D
Sheet

30

of

51

+3VALW
+3VS

+5VS
0.1U_0402_16V4Z
1
C572

1
C578

2
1

1000P_0402_50V7K

C569
10U_0805_10V4Z
2

1
C580

1
C575

1000P_0402_50V7K

1000P_0402_50V7K

0.1U_0402_16V4Z

C579

W=40mils
1

C573

C577
0.1U_0402_16V4Z
1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

PCI_AD[0..31]

C576
C581
1000P_0402_50V7K
2
2

C574
4.7U_0805_10V4Z
2

PCI_AD[0..31] (18,22,26,32,35)

JP28

D8
(28) WL_OFF#
(18,26,32) PCI_PIRQH#
+3VS
(38) S_YIN

WL_OFF# 1
2
CH751H-40PT _SOD323

W=40mils
S_YIN
CLK_PCI_MINI

(18) CLK_PCI_MINI
(18) PCI_REQ#1
2

PCI_REQ#1
PCI_AD31
PCI_AD29
PCI_AD27
PCI_AD25
WLAN_BT_DATA

(38) WLAN_BT_DATA
(18,26,32,35) PCI_CBE#3

PCI_AD23
PCI_AD21
PCI_AD19

(18,26,32,35) PCI_CBE#2
(18,26,32,35) PCI_IRDY#

PCI_AD17
PCI_CBE#2
PCI _IRDY#

(18,26,36) PM_CLKRUN#
(18,26,32) PCI_SERR#

PCI_SERR#

(18,26,32,35) PCI_PERR#
(18,26,32,35) PCI_CBE#1

PCI_PERR#
PCI_CBE#1
PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
PCI_AD5
CVBS_IN
PCI_AD3

(38) CVBS_IN
3

+5VS

(38) AUDIO_INL
+5VS

W=40mils
PCI_AD1

AUDIO_INL

W=30mils

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

+3VS

RING

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

W=40mils

C442
4.7U_0805_10V4Z

C441
0.1U_0402_16V4Z

+3VALW

C439
4.7U_0805_10V4Z

PCI_PIRQG# (18)
S_CIN (38)
+3VALW
PCI_RST# (18,26,32,34,35)
+3VS
PCI_GNT#1 (18)

W=40mils
W=40mils
PCI_GNT#1

SB_PCIE_WAKE#
WLAN_BT_DATA
WLAN_BT_CLK

(19,34) SB_PCIE_WAKE#
(17) MINI_CLKREQ#
(17) CLK_PCIE_MINI#
(17) CLK_PCIE_MINI

2 R509 PCI_AD18
100_0402_5%

PCI_AD22
PCI_AD20
PCI_AD18
PCI_AD16
PCI_FRAME#
PCI_TRDY#
PCI_STOP#
PCI_DEVSEL#

PCI_PAR (18,26,32,35)
(13) PCIE_MRX_PTX_N0
(13) PCIE_MRX_PTX_P0
PCI_FRAME# (18,26,32,35)
PCI_TRDY# (18,26,32,35)
PCI_STOP# (18,26,32,35)

PCIE_MRX_PTX_N0
PCIE_MRX_PTX_P0

(13) PCIE_MTX_C_PRX_N0
(13) PCIE_MTX_C_PRX_P0

PCI_DEVSEL# (18,26,32,35)

PCI_AD15
PCI_AD13
PCI_AD11
PCI_AD9
PCI_CBE#0

0.1U_0402_16V4Z

C440
0.1U_0402_16V4Z

C437
0.1U_0402_16V4Z

JP17

MINI_PME# (28)
WLAN_BT_CLK (38)

WLAN_BT_CLK
PCI_AD30

C438

+5VS

S_CIN

PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL1

+1.5VS

PCI_CBE#0 (18,26,32,35)

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

1
3
5
7
9
11
13
15

1
3
5
7
9
11
13
15

2
4
6
8
10
12
14
16

2
4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

+3VS
+1.5VS

MINI1_OFF#
NB_RST#

MINI1_OFF# (28)
NB_RST# (14,18,23,28,36)
+3VALW

ICH_SMBCLK
ICH_SMBDATA

SB_CK_SCLK (10,11,17,19,34)
SB_CK_SDAT (10,11,17,19,34)

(MINI1_LED#)

G1
G2
G3
G3

53
54
55
56

TIP

FOX_AS0B226-S99N-7F
3

TV_THERM# (28)
MINI@

AUDIO_INR

AUDIO_INR (38)

W=30mils
+3VS

W=20mils

P-TWO_A53921-A0G16-P

R605
1

+3VALW

0_0805_5%

+CAM_VDD
1

JP35
1
2
3
4
5
GND1
GND2

(Change to SP070003200)

CLK_PCI_MINI

1
2
3
4
5
6
7

C657
0.1U_0402_16V4Z

USB20_N3 (19)
USB20_P3 (19)

ACES_88266-05001
1

Mini Card Power Rating

R254

Power

@ 10_0402_5%

Primary Power (mA)

Auxiliary Power (mA)

2006/02/20 Added

Normal

Peak

Normal

+3VS

1000

750

+3VALW

330

250

250 (wake enable)

+1.5VS

500

375

5 (Not wake enable)

C329

@ 10P_0402_25V8K
2

2005/05/09

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 08, 2006

Sheet
E

31

of

51

+S1_VCC

0.1U_0402_16V4Z

1
C593
2
0.1U_0402_16V4Z

PCI_AD[0..31]

(18,22,26,31,35) PCI_AD[0..31]

PCI_CBE#[0..3]

(18,26,31,35) PCI_CBE#[0..3]

CLK_SD_48M

CLK_PCI_PCM

1
R523

2
61@

+3VS

R525
@ 10_0402_5%

SM_CD#
43K_0402_5%

R283
@ 10_0402_5%

C352
@ 15P_0402_50V8J

C596
@ 15P_0402_50V8J

(18,26,31,34,35) PCI_RST#
(18,26,31,35) PCI_FRAME#
(18,26,31,35) PCI_IRDY#
(18,26,31,35) PCI_TRDY#
(18,26,31,35) PCI_DEVSEL#
(18,26,31,35) PCI_STOP#
(18,26,31,35) PCI_PERR#
(18,26,31) PCI_SERR#
(18,26,31,35) PCI_PAR
(18) PCI_REQ#2
(18) PCI_GNT#2
(18) CLK_PCI_PCM
+3VS

1
R524

5IN1_LED#

R595 1

C2
C1
D4
D2
D1
E4
E3
E2
F2
F1
G2
G3
H3
H4
J1
J2
N2
M3
N3
K4
M4
K5
L5
M5
K6
M6
N6
M7
N7
L7
K7
N8

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0

E1
J3
N1
N5

CBE3#
CBE2#
CBE1#
CBE0#

PCI_RST#

G4
J4
K1
K3
L1
L2
L3
M1
M2
PCI_REQ#2
A1
B1
CLK_PCI_PCM H1
L8
L11

10K_0402_5%
PCI_AD20

1
R527

(18,35) PCI_PIRQE#
R272 1
2
0_0402_5%
(18,26,31) PCI_PIRQH#
@
(18,28,36) SERIRQ

(33) MS_PWREN#

(28) 5IN1_LED#

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

2 0_0402_5%
(33) SDOC#

F4
2
100_0402_5%
K8
SD_PULLHIGH N9
K9
N10
SM_CD#
L10
N11
M11
SDOC#
J9

2 61@ 33_0402_5%
SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4

M12
N12

B4
C8
D12
H11
L9
L6
N4
K2
G1
F3

B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12

SDCD#
SDWP/SMWPD#
SDPWREN33#

CLK_SD_48M

H5

SDCLKI

4.7U_0805_10V4Z

C602
0.1U_0402_16V4Z

+S1_VCC

S1_IORD# (33)
S1_OE# (33)
S1_CE2# (33)

C598
0.1U_0402_16V4Z

C605
0.1U_0402_16V4Z

S1_REG# (33)
S1_CE1# (33)

D6

S1_RDY#

SPKROUT
CAUDIO/BVD2_SPKR#

M9
B5

PCM_SPK#
S1_BVD2

A4
L12
D9
C6
A2
E10
J13

S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14

MSINS#
MSPWREN#/SMPWREN#
MSBS/SMDATA1
MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3

H7
J8
H8
E9
G9
H9
G8
F9

XD_PWREN#
MSBS_XDD1
MS_CLK
R529 1
MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3

SMBSY#
SMCD#
SMWP#
SMCE#

H6
J7
J6
J5

XD_CD#
XD_WP#

D3
H2
L4
M8
K11
F12
C10
B6

C362

S1_IOWR# (33)

CINT#/READY_IREQ#

SDCLK/SMWE#
SDCMD/SMALE
SDDAT0/SMDATA7
SDDAT1/SMDATA0
SDDAT2/SMCLE
SDDAT3/SMDATA4
GND_SD

S1_A19

SD/MMC/MS/SM
VCC_SD

C5
D5

GRST#

E8
F8
G7

G5

CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCLK/A16

CCD2#/CD2#
CCD1#/CD1#
CVS2/VS2#
CVS1/VS1
CRSV3/D2
CRSV2/A18
CRSV1/D14

E7

SD_CLK
F6
SDCM_XDALE E5
SDDA0_XDD7 E6
SDDA1_XDD0 F7
SDDA2_XDCL F5
SDDA3_XDD4 G6

S1_REG#
S1_A12
S1_A8
S1_CE1#

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

(17) CLK_SD_48M
R528 1
(33)
(33)
(33)
(33)
(33)

(33) SDCK_XDWE#

B7
A11
E11
H13

+3VS

D11

MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
MFUNC7

SD_CD#
SD_WP#
SD_PWREN#

+VCC_SD
(33) SD_CD#
(33) SD_WP#
(33) SD_PWREN#

CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#

S1_RST (33)

S1_WAIT# (33)

S1_INPACK# (33)
S1_WE# (33)
S1_A16
33_0402_5%
S1_BVD1 (33)
S1_WP (33)

S1_CD2#

S1_RDY# (33)

C361

PCM_SPK# (39)
S1_BVD2 (33)

S1_CD1#
2

S1_CD2# (33)
S1_CD1# (33)
S1_VS2 (33)
S1_VS1 (33)

C595

10P_0402_25V8K
1

10P_0402_25V8K
1

MS_INS# (33)
XD_PWREN# (33)
MSBS_XDD1 (33)
2 33_0402_5%
MSCLK_XDRE# (33)
61@
MSD0_XDD2 (33)
MSD1_XDD6 (33)
MSD2_XDD5 (33)
MSD3_XDD3 (33)
XD_BSY# (33)
XD_CD# (33)
XD_WP# (33)
XD_CE# (33)

M10

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

S1_D[0..15] (33)

R526
2.2K_0402_5%
61@

CB714_LFBGA169
1

PCI_RST#

B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13

CBLOCK#/A19

MFUNC5[3:0] = (0 1 0 1)
MFUNC5[4] = 1

CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3

CSTSCHG/BVD1_STSCHG#
CCLKRUN#/WP_IOIS16#

IDSEL

S1_A[0..25] (33)

S1_D[0..15]

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
1
R286
S1_BVD1
S1_WP

PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK
RIOUT#_PME#
SUSPEND#

S1_A[0..25]

VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1

2
0.1U_0402_16V4Z

1
C592

A7
G13

0.1U_0402_16V4Z
1
C594

CARDBUS

1
C603

VCCD1#
VCCD0#

0.1U_0402_16V4Z
2

1
C599

VPPD1
VPPD0

0.1U_0402_16V4Z

U30
1
C597

PCI Interface

0.1U_0402_16V4Z
1
C604

+3VS

VPPD0
VPPD1
VCCD0#
VCCD1#

VCCA2
VCCA1

40mil

VPPD0
VPPD1
VCCD0#
VCCD1#

M13
N13

+3VS

(33)
(33)
(33)
(33)

**CB714 use B0 version

2005/05/09

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 08, 2006

Sheet
E

32

of

51

PCMCIA Socket
(32) S1_CD1#
+S1_VCC

PCMCIA Power Control

+S1_VCC

40mil

U26

C332

12V

W=40mil
C339

5
6

5V
5V

R263
10K_0402_5%

VCCD0#
VCCD1#
VPPD0
VPPD1

C601

(32) S1_IORD#

C600

2
10U_0805_10V4Z

(32)
(32)
(32)
(32)

(32) S1_IOWR#

0.1U_0402_16V4Z

S1_A[0..25]

(32) S1_A[0..25]

S1_D[0..15]

(32) S1_D[0..15]

(32) S1_WE#

OC

SHDN
16

10U_0805_10V4Z
2
2
0.1U_0402_16V4Z

3.3V
3.3V

C340
0.1U_0402_16V4Z

(32) S1_RDY#
GND

3
4

VCCD0#
VCCD1#
VPPD0
VPPD1

1
2
15
14

VCCD0
VCCD1
VPPD0
VPPD1

W=40mil
C335

(32) S1_CE2#
(32) S1_OE#
(32) S1_VS1

+3VS

0.1U_0402_16V4Z

+S1_VPP

10

VPP

C338
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z

C334

+S1_VPP

40mil

+5VS

1
C336

(32) S1_CE1#

13
12
11

VCC
VCC
VCC

10U_0805_10V4Z
2

CP2211FD3_SSOP16

S1_OE#
S1_WP

S1_RST
S1_CE1#
S1_CE2#

VCCD0#

1
R260
VCCD1#
1
R261

1
R276
2
R305
1
R292
1
R271
1
R274

2
1
2
2
2

+S1_VCC
+S1_VCC
+S1_VPP
+S1_VPP
43K_0402_5%
43K_0402_5%
43K_0402_5%
43K_0402_5%
43K_0402_5%

+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC
+S1_VCC
(32)

2
10K_0402_5%
2
10K_0402_5%

S1_VS2

(32) S1_RST
(32) S1_WAIT#
(32) S1_INPACK#
+VCC_SD

SD/MS Power Control

XD Power Control

C280

(32) S1_REG#
1
C283

10U_0805_10V4Z 0.1U_0402_16V4Z
2
2
61@
61@ 2

(32) S1_BVD2
C285
0.1U_0402_16V4Z
61@

(32) S1_BVD1

+3VS
+3VS

40mil

xD PU and PD. Close to Socket

+VCC_XD

+3VS

61@

(32) SD_PWREN#

SD_PWREN#

SDOC#

SDOC# (32)

2
R99

XD_CD#
1
@ 43K_0402_5%
C201

+VCC_XD

G528_SO8
61@

XD_PWREN#

10K_0402_5%

8
7
6
5

R80
300_0402_5%

OUT
OUT
OUT
FLG

1 2

R84
0_0402_5%
61@

GND
IN
IN
EN#

1
2
3
4

(32) XD_PWREN#

XD_PWREN#

(32) S1_WP
(32) S1_CD2#

+VCC_XD

S1_A16
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24
S1_A7
S1_A25
S1_A6
S1_VS2
S1_A5
S1_RST
S1_A4
S1_WAIT#
S1_A3
S1_INPACK#
S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0
S1_BVD1
S1_D0
S1_D8
S1_D1
S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2#

U9

61@

+3VS

R85

R81
10K_0402_5%

S1_D3
S1_CD1#
S1_D4
S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21

2
G

(32) MS_PWREN#

Q7
2N7002_SOT23
61@

1
R102
1
R103
1
R97
1
R98

2
61@
2
61@
2
61@
2
61@

MSCLK_XDRE#
2.2K_0402_5%
SDCK_XDWE#
2.2K_0402_5%
XD_CE#
2.2K_0402_5%
XD_BSY#
2.2K_0402_5%

1
R96

2
0_0603_5%

+VCC_SD

61@

SDCK_XDWE# 1
C196

2
10P_0402_25V8K 61@

MSCLK_XDRE#1
C197

2
10P_0402_25V8K @

2
10U_0805_10V4Z
61@

GND
GND
DATA3
CD1#
DATA4
DATA11
DATA5
DATA12
DATA6
DATA13
DATA7
DATA14
CE1#
DATA15
ADD10
CE2#
OE#
VS1#
ADD11
IORD#
ADD9
IOWR#
ADD8
ADD17
ADD13
ADD18
ADD14
ADD19
WE#
ADD20
READY
ADD21
VCC
VCC
VPP
VPP
ADD16
ADD22
ADD15
ADD23
ADD12
ADD24
ADD7
ADD25
ADD6
VS2#
ADD5
RESET
ADD4
WAIT#
ADD3
INPACK#
ADD2
REG#
ADD1
BVD2
ADD0
BVD1
DATA0
DATA8
DATA1
DATA9 GND
DATA2 GND
DATA10
WP
CD2#
GND
GND

(NEW)
69
70

SANTA_130601-7_LT
C191
0.1U_0402_16V4Z
61@

6 IN 1 Socket
(HDQ70)

JP25
41

XD-VCC

SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7

33
34
35
36
37
38
39
40

XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

SDCK_XDWE#
XD_WP#
SDCM_XDALE
XD_CD#
XD_BSY#
MSCLK_XDRE#
XD_CE#
SDDA2_XDCL

30
31
29
23
25
26
27
28

XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE

32
24

XD-GND
XD-GND

+VCC_XD
(32) SDDA1_XDD0
(32) MSBS_XDD1
(32) MSD0_XDD2
(32) MSD3_XDD3
(32) SDDA3_XDD4
(32) MSD2_XDD5
(32) MSD1_XDD6
(32) SDDA0_XDD7
(32) SDCK_XDWE#
(32) XD_WP#
(32) SDCM_XDALE
(32) XD_CD#
(32) XD_BSY#
(32) MSCLK_XDRE#
(32) XD_CE#
(32) SDDA2_XDCL

Reserve for SD,MS CLK.

Close to Socket
+VCC_XD

JP9
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68

2006/4/27 Modify to @

R610
1

42
18

0_0402_5%
61@

SD-VCC
MS-VCC

4 IN 1 CONN

N.C.
N.C.

15
9

+VCC_SD
3

SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CMD
SD-CD-SW
SD-CD-COM
SD-WP-SW
SD-WP-COM

16
19
20
11
12
13
21
22
43
44

SDCK_XDWE#
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4
SDCM_XDALE
SD_CD#

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
SD-GND
SD-GND
MS-GND
MS-GND

8
4
3
5
7
6
2
14
17
1
10

MSCLK_XDRE#
MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MS_INS#
MSBS_XDD1

SD_CD# (32)

SD_WP#

SD_WP# (32)

MS_INS# (32)

TAITW_R007-530-L3
61@

2006/4/13 modify
4

2005/05/09

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 08, 2006

Sheet
E

33

of

51

New Card Power Switch

New Card Socket (Left)

U32

1.5Vin1
1.5Vin2

14
15
4
3
2

CPUSB#
CPPE#
STBY#
SHDN#
SYSRST#

1.5Vout1
1.5Vout2

20
16
17

OC#

23

RCLKEN
PERST#

22
9

C357

40mil
+3VALW_CARD1

1
10
12
13
24

11

10U_0805_10V4Z
2
EXPRESS@

40mil
+1.5VS_CARD1

Imax = 1.35A

C350

C365

0.1U_0402_16V4Z
2 EXPRESS@ 10U_0805_10V4Z
2
EXPRESS@

+3VS
+3VS

TPS2231PWPR_PWP24
EXPRESS@

C356

I0

I1

C353

(19) USB20_N1
(19) USB20_P1

C355
0.1U_0402_16V4Z
EXPRESS@

2 0_0402_5%
2 0_0402_5%

TC7SH32FU_SSOP5
Q16
2N7002_SOT23
EXPRESS@

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

USB20_N1_R
USB20_P1_R
CP_USB#

2005/12/30 Modify
(10,11,17,19,31) SB_CK_SCLK
(10,11,17,19,31) SB_CK_SDAT
+1.5VS_CARD1

PERST1#
CLKREQ1#
CP_PE#

(19) CP_PE#
(17) CLK_PCIE_CARD#
(17) CLK_PCIE_CARD

C345
0.1U_0402_16V4Z
EXPRESS@

PCIE_MRX_PTX_N1
PCIE_MRX_PTX_P1

(13) PCIE_MRX_PTX_N1
(13) PCIE_MRX_PTX_P1
EXP_CLKREQ# (17)

(13) PCIE_MTX_C_PRX_N1
(13) PCIE_MTX_C_PRX_P1

O
3

+1.5VS

10U_0805_10V4Z
2

U29

2
C364

R596 1
R597 1

+3VS_CARD1

EXPRESS@

27
28

GND-1
USB_DUSB_D+
CPUSB#
RSV-5
RSV-6
SMB_CLK
SMB_DATA
+1.5V-9
+1.5V-10
WAKE#
+3.3VAUX
PERST#
+3.3V-14
+3.3V-15
CLKREQ#
CPPE#
REFCLKREFCLK+
GND-20
PERn0
PERp0
GND-23
PETn0
PETp0
GND-26

GND-27
GND-28
SANTA_130832-1_LB
EXPRESS@

(NEW)

10U_0805_10V4Z
2

C354

0.1U_0402_16V4Z
2 EXPRESS@
2
10U_0805_10V4Z
EXPRESS@

CLKREQ1#

RCLKEN1 2
G
+3VALW

C367

USB20_N1
USB20_P1

+3VS

R273
10K_0402_5%
EXPRESS@

R275
10K_0402_5%
EXPRESS@

+3VS

JP30

Imax = 0.75A

(19,31) SB_PCIE_WAKE#
+3VALW_CARD1
RCLKEN1
PERST1#

NC1
NC2
NC3
NC4
NC5

GND

EXPRESS@
R285EXPRESS@
1
2 100K_0402_5% CP_USB#
+3VALW
R287 1
2 100K_0402_5% CP_PE#
SUSP#
(28,30,41) SUSP#
SYSON
(28,41) SYSON
PCI_RST#
(18,26,31,32,35) PCI_RST#

18
19

Aux_out

Imax = 0.275A

+3VS_CARD1

+1.5VS

3.3Vaux_in

7
8

+1.5VS_CARD1

21

+3VALW

3.3Vout1
3.3Vout2

+3VS_CARD1

3.3Vin1
3.3Vin2

5
6

+3VS

+3VALW_CARD1

60mils

12/22 Modify U29 Package

10U_0805_10V4Z
2

+USB_VCCA

+3VALW
+5VALW
U4

C111

GND
IN
IN
EN#
G528_SO8

4.7U_0805_10V4Z

OUT
OUT
OUT
FLG

8
7
6
5

R42
100K_0402_5%
2

1
2
3
4

R43
1K_0402_5%
2
1

2
USB_EN#

(28,38) USB_EN#

USB CONN. 1 & 2

USB_OC#0 (19)
C133
+USB_VCCA

0.1U_0402_16V4Z

+USB_VCCA

W=80mils

+USB_AS
+
2

2005/12/30 Modify
(19) USB20_N0
(19) USB20_P0

1
1

C478

150U_D_6.3VM

C474
470P_0402_50V7K

R598 1
R600 1

2 0_0402_5%
2 0_0402_5%

USB20_N0_R
USB20_P0_R

1
2
3
4
5
6

VCC
D- 8
D+ 7
GND

2005/12/30 Modify

JP21

USB20_N0
USB20_P0

W=80mils

+USB_BS

8
7

C1
USB2@
150U_D_6.3VM

C2
USB2@
470P_0402_50V7K

JP14

USB20_N2
USB20_P2

(19) USB20_N2
(19) USB20_P2

USB2@
2 0_0402_5%
2 0_0402_5%
USB2@

R599 1
R601 1

USB20_N2_R
USB20_P2_R

1
2
3
4
5
6

GND1
GND2
SUYIN_020173MR004S512ZL

GND

VCC

I/O

I/O

USB20_N0

GND1
GND2

D1
1

GND

I/O

+USB_VCCA
USB20_P2

USB20_P0

8
7

SUYIN_020173MR004S512ZL
USB2@

2005/12/30 Modify

D25
1

VCC
D- 8
D+ 7
GND

VCC

I/O

+USB_VCCA
USB20_N2

@ PRTR5V0U2X_SOT143

@ PRTR5V0U2X_SOT143
4

2005/05/09

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 08, 2006

Sheet
E

34

of

51

+2.5VS_1394

+3VS

+3VS

C319

C300

C290

C311

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

2
2
2
1394@
1394@
1394@
1394@

C549

C289

C308

U13
C288

1
2
3
4

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

2
2
2
1394@
1394@
1394@
1394@

A0
A1
A2
GND

8
7
6
5

VCC
WP
SCL
SDA

EECK
EEDI

R170
510_0402_5%
@

EECK and EEDI is pull high internal

External pull high circuit is unnecessary

+3VS

20mils

PCI_STOP#
PCI_PERR#
PCI_PAR
PCI_PIRQE#
CLK_PCI_1394
PCI_GNT#0
PCI_REQ#0
1394_IDSEL
PCI _IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_FRAME#

(18,26,31,32) PCI_IRDY#
(18,26,31,32) PCI_TRDY#
(18,26,31,32) PCI_DEVSEL#
(18,26,31,32) PCI_FRAME#

87
86
73
72
62
59
REG_FB

84

REG_FB

REG_OUT

85

REG_OUT

XCPS
XREXT

60
63

XI

57

1394_XI

OSCILLATOR

CLK_PCI_1394

+3VS
@
1394@
1394@

+3VS

2 1U_0402_6.3V4Z 1394@
2 @ 4.7K_0402_5%
4.7K_0402_5%
2
4.7K_0402_5%
2
0.1U_0402_16V4Z
2

58
67
68
69
70
71

TPB0TPB0+
TPA0TPA0+
TPBIAS0

XTPB1M
XTPB1P

XTPBIAS1

74
75
76
77
78

NC17
NC16
NC15
NC14
NC13
NC12
NC11
NC10
NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1
NC0

83
82
64
54
53
52
51
50
49
48
45
44
42
41
40
39
37
35

REG_OUT
R480 1
R486 1
C568 1

2 1K_0402_5%
6.19K_0603_1%
2
47P_0402_50V8J
2
1394@

1394@
1394@

REG_FB

When use external BJT

Populate Q28, R490

15mils

R478
54.9_0402_1%
1394@

VT6311S_LQFP128
1394@
TPBIAS0
TPA0+
TPA0TPB0+
TPB0-

1
R476
54.9_0402_1%
1394@

C561
0.33U_0603_10V7K
1394@
JP26
4
3
2
1

R251
@ 10_0402_5%

R472
54.9_0402_1%
1394@

C325

4
3
2
1

6
5

6
5

FOX_UV31413-4R1-TR
1394@

R467
54.9_0402_1%
1394@

@ 10P_0402_25V8K

(ECQ60)

+2.5VS_1394

C309
10P_0402_25V8K
1394@

VIA 1394 with Sn-Bi part : SA00000P510

Q28
2SB1197K_SOT23
@
2

Y4
24.576MHZ_16P_X8A024576FG1H
1394@
1

2
B

C303
10P_0402_25V8K
2 1394@

XREXT

10mils

XO

PHY PORT1XTPA1M
XTPA1P

C557 1
R490 1
R186 1
R168 1
C287 1

XTPB0M
XTPB0P
XTPA0M
XTPA0P
XTPBIAS0

PHY PORT0

PCI I/F

EEDI
EECK

1394_XO

66
65
80
79
118
112
108
100
91
61
56
47
38
33
31
23
22
6
13
126

I2CEEN

4.7K_0402_5% 1394@

(18,26,31,32) PCI_CBE#3
(18,26,31,32) PCI_CBE#2
(18,26,31,32) PCI_CBE#1
(18,26,31,32) PCI_CBE#0
(18,26,31,32) PCI_STOP#
(18,26,31,32) PCI_PERR#
(18,26,31,32) PCI_PAR
(18,32) PCI_PIRQE#
(18,26,31,32,34) PCI_RST#
(18) CLK_PCI_1394
(18) PCI_GNT#0
(18) PCI_REQ#0

55
81
43
32

2 1394_IDSEL
1394@ 100_0402_5%

PHYRST#
BJT_CTL
I2CEN
PWRDET

R169 1

1
R194

others

26
27
28
29

PCI_AD16

EEPROM

+3VS
EECS

EECS
EEDO
SDA/EEDI
SCL/EECK

IDSEL:PCI_AD16

When use external EEPROM

Populate U13, R170, R186
Un-populate R169

4.7U_0805_10V4Z
2 1394@

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CBE3#
CBE2#
CBE1#
CBE0#
STOP#
PERR#
PAR
INTA#
PCIRST#
PCICLK
GNT#
REQ#
IDSEL
PME#
IRDY#
TRDY#
DEVSEL#
FRAME#

2
2
1394@
1394@
1394@
0.1U_0402_16V4Z

+3VS

PCI_AD[0..31]

(18,22,26,31,32) PCI_AD[0..31]

VT6311S
94
95
96
97
98
101
102
103
106
107
109
113
114
115
116
117
2
3
4
7
8
9
10
11
14
15
16
18
19
20
24
25
104
119
1
12
125
127
128
88
89
90
92
93
105
34
121
123
124
120

GNDATX1
GNDARX1
GNDATX2
GNDARX2
GND19
GND18
GND17
GND16
GND15
GND10
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
GND0

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
C312
C567
C566
C571

PVA5
PVA4
PVA3
PVA2
PVA1
PVA0

VDD4
VDD3
VDD2
VDD1
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1

U14

46
30
21
111
99
36
17
5
122
110

+1394_PLLVDD

L48
MBK1608301YZF_0603
1
2
1394@

+2.5VS_1394

AT24C02N-10SU-2.7_SO8
@

C547
270P_0402_50V7K
1394@

R471
4.99K_0402_1%
1394@

2005/05/09

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 08, 2006

Sheet
E

35

of

51

SUPER I/O SMsC LPC47N207

+3VS
0.1U_0402_16V4Z
1

C587
SIOALL@

C588
SIOALL@

C582
SIOALL@
0.1U_0402_16V4Z

0.1U_0402_16V4Z

DLAD0
DLAD1
DLAD2
DLAD3

9
11
13
15
18
26

DLPC_CLK_33
DLDRQ1#
DLFRAME#
DCLKRUN#
DSER_IRQ
DSIO_14M

VTR
RXD1
TXD1
DRSR1#
RTS1#/SYSOPT0
CTS1#
DTR1#/SYSOPT1
RI1#
DCD1#

52
53
54
55
56
57
58
59

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

IRTX2
IRRX2
IRMODE/IRRX3

49
50
51

IRTXOUT
IRRX
IRMODE

1
2
R279 SIO1@10K_0402_5%
1
2
R280 SIO1@10K_0402_5%

1
R242
1
R243

+3VS

7
8
2
4
5
6

LFRAME#
LDRQ#
LAD0
LAD1
LAD2
LAD3

NB_RST#

PCI_RESET#

SIO_PD#

10

LPCPD#

PM_CLKRUN#

11

CLKRUN#

SERIRQ

13

SER_IRQ

CLK_PCI_SIO

12

PCI_CLK

CLK_14M_SIO

CLOCKI

BASE_ADDRESS
18 GPIO/SYSOPT1
2
@ 10K_0402_5%
2
10K_0402_5%
SIO2@
Base I/O Address

15
16
17

INIT#
SLCTIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
ERROR#
ALF#
STROBE#

19
20
21
23
24
25
26
27
28
29
30
31
32
33
34
35
36

VSS

37

GROUND PAD

IRRX
IRTXOUT
IRMODE

SIO1036-AEZG_QFN36
SIO2@

* 0 = 004Eh

1
2
R278 FIR@
10K_0402_5%

IRRX
IRTX
IRMODE/ALT_IRRX

FIR

PARALLEL I/F

LPC_FRAME#
LPC_DRQ#0
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

VCC
VCC
VCC

LPC I/F

GPIO

U25
3
14
22

1
2
R269 SIO1@10K_0402_5%
1
2
R513 SIO1@10K_0402_5%

LPC47N207-JN_STQFP64
SIO1@

RTS#1
Base I/O Address
* 0 = 02Eh
1 = 04Eh

CLK_PCI_SIO
2

CLK_14M_SIO

R268
@ 33_0402_5%
1

R512
@ 10_0402_5%

8
20
29
37
45
62

GND0
GND1
GND2
GND3
GND4
GND5

63
1
3
6

+3VS

27
28
30
32
33
34
35
36
38
39
40
41
43
44
46
61

SERIAL I/F

LPC_CLK_33
LDRQ1#
LDRQ0#
LFRAME#
CLKRUN#
SERIRQ
PCI_CLK
PCIRST#
SIO_14M
LPCPD#
IO_PME#

+3VS

GPIO10
GPIO11
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO15
GPIO16
GPIO17
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37

IR

10
12
24
14
16
19
21
22
23
25
47

LAD0
LAD1
LAD2
LAD3

LPC I/F

64
2
4
7

LPC_DRQ#0
LPC_FRAME#
PM_CLKRUN#
SERIRQ
CLK_PCI_SIO
NB_RST#
CLK_14M_SIO
SIO_PD#
SIO_PME#

(18) LPC_DRQ#0
(18,22,28) LPC_FRAME#
(18,26,31) PM_CLKRUN#
(18,28,32) SERIRQ
(18) CLK_PCI_SIO
(14,18,23,28,31) NB_RST#
(17) CLK_14M_SIO
1
2
R336 1 SIOALL@210K_0402_5%
R335
SIO1@ 10K_0402_5%

+3VS
+3VS

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

DLPC I/F

(18,28)
(18,28)
(18,28)
(18,28)

3.3V
3.3V
3.3V
3.3V
3.3V

U28

48

5
17
31
42
60

+3VS

2
C583
@ 15P_0402_50V8J

+IR_ANODE

C342
@ 22P_0402_50V8J
+3VS
1
C210
FIR@
4.7U_0805_10V4Z
2

FIR Module

1 FIR@ 2
R114
0_1206_5%
1 FIR@ 2
R116
0_1206_5%

W=60mil

Place on the BOT side(near MINIPCI conn.)

IR1
+5VS

+3VS

JP11
RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

1
2
3
4
5
6
7
8
9
10

+IR_3VS
IRRX
+IR_3VS

RP38
DCD#1
RI#1
CTS#1
DSR#1

1
2
3
4

8
7
6
5

+3VS

1 FIR@ 2
R147
47_1206_5%

4.7K_1206_8P4R_5%
SIO1@

W=40mil

1
C253
C245
FIR@
FIR@
10U_0805_10V4Z
0.1U_0402_16V4Z
2
2

2
4
6
8

IRED_C
RXD
VCC
GND

IRED_A
TXD
SD/MODE
MODE

1
3
5
7

T = 12mil
T = 12mil

IRTXOUT
IRMODE

TFDU6102-TR3_8P
FIR@

ACES_85201-10051
@

For SW debug use when no seial port

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/05/09

Deciphered Date

2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 08, 2006

Sheet

36

of

51

+3VS

+3VALW

+3VALW

U10B
SN74LVC14APWR_TSSOP14

2
C203
1U_0603_10V4Z

C204
1U_0805_25V4Z

14
I

SB_PWROK (8,19)

+3V POWER
R105
100K_0402_5% @

R108
10_0402_5%
1
2

NB_PWROK (14)

U10D
SN74LVC14APWR_TSSOP14

R109
10_0402_5%

13

14

2006/02/22 Change R100 to 47K

O 10
+3V POWER

+3VALW

14

+3VALW

14
11

O 4
+3V POWER

U10F
SN74LVC14APWR_TSSOP14
R104
10_0402_5%
1
2
O 12

P
O 2
+3V POWER

U10E
SN74LVC14APWR_TSSOP14

R112
100K_0402_1%

I
G

1
R106
10K_0402_5%

+3VALW

14

14

U10A
SN74LVC14APWR_TSSOP14

VLDT_EN

(28) VLDT_EN

D5
1N4148_SOT23
R100
47K_0402_1%
1
2

R111
10K_0402_5%
@

+3VALW

+3VALW

Power ON Circuit

R113
180K_0402_5%

U10C
SN74LVC14APWR_TSSOP14

note:T1 minimum 15ms,T2 minimum 33ms/maximum 500ms,

SUSP# goes to low after SB_PWRGD goes to low for power
down.
T1

VLDT_EN
NB_PWRGD
SB_PWRGD
T2

SUSP#
+1.8VS
TOP Side
2

1
JOPEN

1
JOPEN

+3VALW

Power Button
2

J3

J4

R281

Bottom Side
1

100K_0402_5%
D10

ON/OFFBTN#

(38) ON/OFFBTN#

ON/OFF (28)

51ON#

51ON# (42)

CHN202UPT_SC70

RD 11/2 Modify

EC_ON

2
G
R290
10K_0402_5%

C358
1000P_0402_50V7K

D11
RLZ20A_LL34

1
(28) EC_ON

1
D
2N7002_SOT23
Q17

Compal Secret Data

Security Classification
2005/05/09

Issued Date

Deciphered Date

2006/03/08

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Size
B
Date:

Document Number

Rev
D

401411
, 11, 2006

Sheet
E

37

of

51

MDC Conn.
JP3

+5VS

R538
300_0402_5%
1
2

(19) AC_SYNC
(19) ACZ_SDIN1
(19) AC_RST#

LED5
2
3

AC _SYNC
2 33_0402_5%

R357 1
AC_RST#

C3

+3VALW
AC_BITCLK
1
C432
2

Connector for MDC Rev1.5

R331
300_0402_5%
1
2

LED4
2
3

PWR_SUSP_LED#

+5VALW

PWR_SUSP_LED# (28)

HT-110UD_1204

C435
+

R332
300_0402_5%
1
2

BATT_FULL_LED#

+5VS

BATT_FULL_LED# (28)

JP2

1
2

R537
300_0402_5%
1
2

(28) MEDIA_LED#
(28) CAPS_LED#
(28) NUM_LED#
(28) E-MAIL_LED#
(37) ON/OFFBTN#
(28) E-MAIL_BTN#
(28) IE_BTN#
(28) USER_BTN#
(28) EMPWR_BTN#

BATT_CHGI_LED#

BATT_CHGI_LED# (28)

OUT
GND

RCIRRX

4
2

(31) CVBS_IN
(31)
S_YIN
(31) S_CIN

TSOP36236TR_4P
CIR@

2
2

+5VS

RCIRRX (28)

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

31
32
33
34
35
36

Vs
GND

LED6
2
3

HT-110UD_1204

IR2

C614
CIR@
4.7U_0805_10V4Z

+5VALW

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

PWR_LED#

+3VALW

CIR

150U_D2_6.3VM

LED2
2
3

HT-110UYG_1204

Update Part Number to SCR36236000

GND
GND
GND
GND
GND
GND

+5VALW

C436

0.1U_0402_16V4Z

To LED/B Conn.

3
1

22P_0402_50V8J

+5VALW

R539
100_0805_5%
CIR@

AC_BITCLK (19)

ACES_88018-124G

13
14
15
16
17
18

1U_0603_10V4Z

2N7002_SOT23
Q1

2
G

20mil

+3VALW
PWR_LED#

1
HT-110UYG_1204

(28) PWR_LED

2
4
6
8
10
12

GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
GND
GND
GND
GND
GND
GND

PWR_LED#

1
3
5
7
9
11

AC_SDOUT

(19) AC_SDOUT

C615
CIR@
1000P_0402_50V7K

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

+5VALW

USB20_N4
USB20_P4
USB20_N6
USB20_P6

USB20_N4 (19)
USB20_P4 (19)
USB20_N6 (19)
USB20_P6 (19)
USB_EN# (28,34)
AUDIO_INL (31)
AUDIO_INR (31)

ACES_88018-304G

Bluetooth Conn.

+5VS

LED3
HT-110UD_1204

WL_ON_LED#

Q21
BT@
SI2301BDS_SOT23

WL_ON_LED# (28)
1

BT_ON_LED# (28)

+BT_VCC
L65
USB20_P5

(19) USB20_N5

USB20_N5

BT@
WCM2012F2S-900T04_0805
2 2

JP31
USB20_P5_R
USB20_N5_R

(31) WLAN_BT_DATA
(31) WLAN_BT_CLK

BT_ON_LED#

C395
BT@
1U_0603_10V4Z
(19) USB20_P5

(28) BT_ON#
1

R564
100K_0402_5%
BT@
2

LED1
HT-110NBQA_BULE_1204

2
3

C634
0.1U_0402_16V4Z
@

2
3
2

300_0402_5%

R329

300_0402_5%

3
2

R330

+3VALW

W=40mils

ACES_87212-0800
BT@

+BT_VCC
1

2005/09/12
1

SW8
HSS110_4P

BTSW_EN# (28)

BTSW_EN#

2006/02/27 Added

C398
BT@
0.1U_0402_16V4Z

WL_SW

BT_SW

C399
BT@
4.7U_0805_10V4Z

1
2
3
4
5
6
7
8

WLSW_EN#

WLSW_EN# (28)

SW9
HSS110_4P

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/05/09

Deciphered Date

2006/06/20

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 08, 2006

Sheet

38

of

51

+VDDA
1

28.7K for Module Design (VDDA = 4.702)

+5VAMP

R309
10K_0402_5%

C372 1
1U_0603_10V4Z

C
2

2
B
E

560_0402_5%

ERROR

SD

CNOISE

GND

30K_0402_1%

+VDDA

2
7

SENSE or ADJ

40mil

C397

10U_0805_10V4Z

R313

4.85V

C388
10U_0805_10V4Z
1

0.1U_0402_16V4Z

C396

MONO_IN

R312
10K_0402_1%

0.1U_0402_16V4Z

1U_0603_10V4Z
1
2
Q20
R308
2SC2411K_SC59 2.4K_0402_5%

2
C376 1
1U_0603_10V4Z

(19) SB_SPKR

R302

560_0402_5%
2

47K_0402_5%
R300
1

R299

C390

C380
1
2

560_0402_5%

(32) PCM_SPK#

DELAY

SI9182DH-AD_MSOP8
2

47K_0402_5%
R295
1

R304

VOUT

VIN

D12
CH751H-40PT _SOD323

R301
10K_0402_5%
2

47K_0402_5%

R303
1

C378 1
1U_0603_10V4Z

BEEP#

(28)

L21 1
2
KC FBM-L11-201209-221LMAT_0805

R307
10K_0402_5%
1

U34
4

2
1

1U_0603_10V4Z
2

1
C387

(output = 250 mA)

60mil

L19 1
2
KC FBM-L11-201209-221LMAT_0805

+5VS

HD Audio Codec
+AVDD_AC97

1
1
1
1

1 20K_0402_5%

R316
@
0_0402_5%

R317

6.8K_0402_5%

C394
C377

(40) MIC1_L
(40) MIC1_R

CD_AGND_R
C379
MIC1_L
C386
MIC1_R
C392

1
R328

2
0_0603_5%

35

R606 1

2 0_0402_5%

AMP_LEFT

FRONT_OUT_R

36

R607 1

2 0_0402_5%

AMP_RIGHT

16

MIC2_L

SURR_OUT_L

39

17

MIC2_R

SURR_OUT_R

41

LINE1_L

SIDESURR_OUT_L

45

LINE1_R

10

SIDESURR_OUT_R

46

CD_L

CEN_OUT

43

CD_R

LFE_OUT

44

BIT_CLK

R608
47K_0402_5%
@

SDATA_IN

MIC1_R

1
R566

2
0_0603_5%

GND

2 22P_0402_50V8J
AZ_BITCLK (19)

PCBEEP

PIN37_VREFO

37

LINE1_VREFO

29

LINE2_VREFO

31

RESET#
SYNC

(40) NBA_PLUG

GPIO0
GPIO1
SENSE A
SENSE B

EAPD

47

SPDIFI/EAPD

SPDIF

48

MIC1_VREFO_L

28

MIC1_VREFO_R

32

MIC2_VREFO

30

SDATA_OUT

VREF

27

JDREF

40

VAUX

33

AVSS1
AVSS2

26
42

R297 1

2 33_0402_5%

SPDIFO
DVSS1
DVSS2

DGND

ACZ_SDIN0 (19)

10mil
MIC1_VREFO_L
MIC1_VREFO_R

AC97_VREF

10mil
1

R306
20K_0402_1%
@

ALC883-LF_LQFP48
2
0_0603_5%

R609
47K_0402_5%
@

MIC1_L

2
3
13
34

4
7

AMP_RIGHT (40)

2006/02/27 Added
C374 1

CD_GND

AMP_LEFT (40)

FRONT_OUT_L

LINE2_R

LINE2_L

(40)

10U_0805_10V4Z

15

11

2
0_0603_5%

1
R565

9
DVDD2

DVDD1

2
0.1U_0402_16V4Z

1
R324

(19) AZ_SDOUT

(28)

+3VS

C369

14

2005/09/12

(19) AZ_SYNC

2
0_0603_5%

U33

LINE_C_L
23
1U_0603_10V4Z
LINE_C_R
24
1U_0603_10V4Z
CD_L_RC
18
1U_0603_10V4Z
C D_R_RC
20
1U_0603_10V4Z
CD_AGND_RC19
1U_0603_10V4Z
MIC1_C_L
21
1U_0603_10V4Z
MIC1_C_R
22
1U_0603_10V4Z
MONO_IN
12

(19) AZ_RST#

1
R319

C373

LINE_R

C385

R314 2

(23) CD_AGND

(40) LINE_R
20K_0402_5%
6.8K_0402_5%
CD_L_R
6.8K_0402_5%
20K_0402_5%
CD_R_R

(23) INT_CD_R

2
2
2
2

C375

C384

2
0.1U_0402_16V4Z

C391
10U_0805_10V4Z

R310
R311
R320
R318

C393

L50 1
2
FBM-L11-160808-800LMT_0603

0.1U_0402_16V4Z

LINE_L

(40) LINE_L
(23) INT_CD_L

38

C381
10U_0805_10V4Z

20mil

25

0.1U_0402_16V4Z
1
1
C389

AVDD2

L18 1
2
FBM-L11-160808-800LMT_0603

AVDD1

+VDDA

40mil

AGND

GNDA

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/05/09

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

SCHEMATIC, M/B LA-3121P

Size
B

Document Number

Rev
D

401411
, 08, 2006

Date:
G

Sheet

39
H

of

51

JP12
SPKL+
SPKLSPKR+
SPKR-

+5VAMP

L20
L22
L29
L30

1
1
1
1

2
2
2
2

20mil

R531

FBM-11-160808-700T_0603
FBM-11-160808-700T_0603
FBM-11-160808-700T_0603
FBM-11-160808-700T_0603

SPK_L+
SPK_LSPK_R+
SPK_R-

1
2
3
4
ACES_85204-0400

Speaker Conn.

10K_0402_5%

+5VAMP
R535
100K_0402_5%

(39) AMP_LEFT
(39) AMP_RIGHT

1
C610
1
C612

VOLMAX
1
0_0402_5%
NBA_PLUG

2
1U_0603_10V4Z
2
1U_0603_10V4Z

VOLMAX

13

SE/BTL#

6
3

BYPASS

20mil

NBA_PLUG

(39) NBA_PLUG

EC_MUTE (28)

2 SPDIF_PLUG#

Q31
SI2301BDS_SOT23

LOUT-

SPKL-

16

SPKR-

LOUT+

11

SPKL+

ROUT+

14

SPKR+

GND
GND

5
12

LINRINBYPASS

EC_MUTE

1
2

ROUT-

VOLUME

AMP_LEFT_C
AMP_RIGHT_C

2 SPDIF_PLUG#
G Q32
2N7002_SOT23

+5VSPDIF

20mil

APA2068KAI-TRL_SOP16

MUTE
SHUTDOWN#

VOL_AMP
2
R530

VDD
VDD

R533
100K_0402_5%

1 0.1U_0402_16V4Z

10
15

+5VAMP

R536
100K_0402_5%
1
2

U43
C608 2

C613
4.7U_0805_10V4Z

2
S

C609
0.1U_0402_16V4Z

1
1 2
3

SPDIF_PLUG# 2
Q30 G
2N7002_SOT23 @

R532
1.5K_0402_1%

+5VAMP

W=40mil

R534
@
5.1K_0402_1%

+5VAMP

VOL_AMP

(0.65V -> 10dB )

C611
4.7U_0805_10V4Z
C400
330P_0402_50V7K

C401

S/PDIF Out JACK

330P_0402_50V7K

1
C383
SPKR+
1
C382

JP32
SPKL+

2 HPOUT_L_1
150U_D_6.3VM
2 HPOUT_R_1
150U_D_6.3VM

1
R321
1
R322

HPOUT_L_2
2
47_0603_5%
HPOUT_R_2
2
47_0603_5%

HPOUT_L_3
2
FBM-11-160808-700T_0603
HPOUT_R_3
2
FBM-11-160808-700T_0603
SPDIF_PLUG#
2
1
+5VAMP
R323
100K_0402_5%
L51
FBM-L11-160808-800LMT_0603
SPDIF1
2
(39) SPDIF
+5VSPDIF
1

1
2
6
3

1
L27
1
L28

C306
220P_0402_50V7K

5
4
7
8
10
9

01/03 Added

ACES_20234-0101

LINE-IN JACK
JP33
5

(39) LINE_R
(39) LINE_L

LINE_R
LINE_L

L26
1

FBM-11-160808-700T_0603
2

1
L25

2
FBM-11-160808-700T_0603
1
C402
220P_0402_50V7K

LINE_R_R
LINE_L_R

R326
2.2K_0402_5%

2005/09/06

15mil

1
R325
0_0402_5%

1
2

INT_MIC_L

(39) MIC1_R
(39) MIC1_L

ACES_85204-0200

1
C404
220P_0402_50V7K

3
6
2
1

1
C405
220P_0402_50V7K

SUYIN_010164FR006G118ZL

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/05/09

Issued Date

MIC1_R_1
MIC1_L_1

2 FBM-11-160808-700T_0603

JP34
5

R327
2.2K_0402_5%

2 FBM-11-160808-700T_0603

1
L24
1
L23

MIC JACK

MIC1_VREFO_R

JP13

SUYIN_010164FR006G118ZL

C403
220P_0402_50V7K
2

MIC1_VREFO_L

Int MIC Conn.

3
6
2
1

2006/06/20

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 08, 2006

Sheet
E

40

of

51

+1.8VALW TO +1.8V

+3VALW TO +3VS

+1.8V
+3VS

R508
100K_0402_5%
1
2

5VS_GATE
20K_0402_5%

8
7
6
5

+VSB

D
D
D
D

S
S
S
G

SUSP
2
G
Q29
2N7002_SOT23

1
2
3
4

R289
100K_0402_5%
1
2

SYSON_ALW

SI4856ADY-T1-E3_SO8

10U_0805_10V4Z

C119
10U_0805_10V4Z

+VSB

C359
0.1U_0603_25V7K

R288
@ 1M_0402_1%

2 SYSON#
G
Q18
2N7002_SOT23

C570
0.1U_0603_25V7K

10U_0805_10V4Z

R500
@ 1M_0402_1%

C560

SI4800BDY_SO8

U3

+1.8VS

+3VS

12/30 Change U3 to SI4856ADY

+5VS

2
R562

C122

2 SUSP
G
Q15
2N7002_SOT23

+5VALW

2 SUSP
G
Q14
2N7002_SOT23

+1.8VALW

+5VALW TO +5VS
+1.8VALW TO +1.8VS

R181
470_0402_5%

R270
470_0402_5%

R224
470_0402_5%

2 SUSP
G
Q10
2N7002_SOT23

1
2
3
4

1U_0805_25V4Z

S
S
S
G

+1.8VALW

D
D
D
D

1U_0805_25V4Z

C121

8
7
6
5

10U_0805_10V4Z

C562

U41

C559

+3VALW

+5VS
U7

C446

SI4800BDY_SO8

4.7U_0805_10V4Z

1U_0805_25V4Z

SI4800BDY_SO8

C166
4.7U_0805_10V4Z

C165

+5VALW

1U_0805_25V4Z

C143
4.7U_0805_10V4Z

+1.8V

5VS_GATE
5VS_GATE

12/30 Change R563 to 60.4K

R26
470_0402_5%
C658
0.1U_0603_25V7K

(46)

SUSP

SUSP

C632
0.1U_0603_25V7K

2
G
Q12

(28,30,34) SUSP#

2 R563
60.4K_0402_1%

R167
10K_0402_5%

2
C443
4.7U_0805_10V4Z

1
2
3
4

C447

S
S
S
G

D
D
D
D

2 SYSON#
G
Q6
2N7002_SOT23

2N7002_SOT23

2006/2/22 Add C658 0.1uF

R586
100K_0402_5%

8
7
6
5

+1.8VS

1
2
3
4

S
S
S
G

D
D
D
D

U37

8
7
6
5

2006/4/13 modify package for lead-free part

3

12/22 Added

+5VALW

2
SYSON

(28,34) SYSON

1
S

2 SUSP
G
Q35
2N7002_SOT23

R589
100K_0402_5%

2N7002_SOT23

2 SUSP
G
Q34
2N7002_SOT23

2 SYSON#
G
Q36
2N7002_SOT23 @

2
G
Q5

SYSON#

(46) SYSON#

R588
470_0402_5%

R587
470_0402_5%

R604
470_0402_5% @

R31
10K_0402_5%

+1.5VS

+2.5VS

+0.9V

Near PU12

Near PU8

12/22 Change Q5,Q12 to 2N7002

Compal Secret Data

Security Classification
2005/05/09

Issued Date

Deciphered Date

2006/03/08

Compal Electronics. inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

Size
B
Date:

Document Number

Rev
D

401411
, 11, 2006

Sheet
E

41

of

51

PL1

VIN

PR1
10_1206_5%
PR2
1K_1206_5%
1
2

1 2
PD1
RLZ24B_LL34

PR7
1K_1206_5%
1
2

B+

PR4
1K_1206_5%
1
2

1
RLS4148_LLDS2

100K_0402_5%

PQ1
TP0610K_SOT23

PR3
1K_1206_5%
1
2

PD2

VIN

PR6

560P_0402_50V7K

PC4
2
1

12P_0402_50V8J

PC3
2
1

12P_0402_50V8J

PC2
2
1

PC1
1

560P_0402_50V7K

G
G

FBMA-L18-453215-900LMA90T_1812
1
2

PR5
1

ADPIN

100K_0402_5%

PJP1
SINGA_2DC-G756-I06

VIN

PD3

PR8
100K_0402_5%

(28,44) ACOFF

PR9
33_1206_5%
PQ4
TP0610K_SOT23

VS

PQ3
DTC115EUA_SC70

PQ2
DTC115EUA_SC70

RLS4148_LLDS2

1 2

BATT+

1 1

PD4
RB751V-40TE17_SOD323-2
2
1

51ON#

PC6
0.1U_0603_25V7K

B+

PR12
2.2M_0402_5%
1

VL
2

(37)

PR11
22K_0402_5%
1
2

PR10
100K_0402_5%

0.22U_1206_25V7K

PC5
2
1

CHGRTCP

PR13
499K_0402_1%

ACIN
RTCVREF

2005/05/09

PC9
0.01U_0402_25V7K

2
G

PR21
47K_0402_5%
1

PACIN (44,45)

PQ6
DTC115EUA_SC70

@ PR22
66.5K_0402_1%

+5VALW

Deciphered Date

Compal Electronics, Inc.

2006/0926

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

1
D

Compal Secret Data

Security Classification
Issued Date

PQ5
2N7002W T/R7 1N SOT-323

PR20
34K_0402_1%
2
1

BATT ONLY
Precharge detector
Min.
typ.
Max.
H-->L 6.138V 6.214V 6.359V
L-->H 7.196V 7.349V 7.505V

PR19
499K_0402_1%

Precharge detector
Min.
typ.
Max.
H-->L 14.589V 14.84V 15.243V
L-->H 15.562V 15.97V 16.388V

PR18
191K_0402_1%

PC10
0.1U_0603_25V7K

PRG++ 2

2
32.3

RB715F_SOT323

PC7
1U_0805_25V4Z

8
1

PC11
1000P_0402_50V7K

(44) ACON

P
1

GND
1

PU2A
LM393DR_SO8

IN

OUT

560_0603_5% 560_0603_5%

PD5

(8,43,45) MAINPWON

PR17

2 1

PC8
1

+CHGRTC

4.7U_0805_6.3V6K

PR16

PR14
100K_0402_1%

PR15
200_0805_5%

PU1
G920AT24U_SOT89

RTCVREF

3.3V

VS

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 11, 2006

Sheet
D

42

of

51

BST5B

PD6
CHP202UPT_SOT323-3
PC12
0.1U_0603_25V7K
1
2

PC13
0.1U_0603_25V7K
1
2

BST3B

B+++

30.6

1
2
3
4

PC18
4.7U_1206_25V6K

1
2
2

D2
G2
D2
D1/S2/K
G1
D1/S2/K
S1/A D1/S2/K

8
7
6
5

AO4916_SO8

3HG

LX3

28
26
24
27
22

PL4
10UH_SIL104R-100PF_4.4A_30%
1
2

PR31
0_0603_5%
PR33
499K_0402_1%

PR30
100K_0402_1%
2 1
2

1
2
3
4

BST3A

DL3

DH3

7
2

PC25
150U_D_6.3VM

@ PR39
3.57K_0402_1%

1
PR42
0_0402_5%
1
2

(45)
PR41
0_0402_5%

+3VALWP

PRO#

GND

LDO3

4.7U_0805_10V4Z
10
1
2

1
PR43

25

0_0402_5%

1
2

PC24
0.047U_0603_16V7K

REF

PC27
1

PR38

12

2VREF_19998

PZD1
PR37
RLZ5.1B_LL34
47K_0402_5%
1
2 1
2

23

2
PR35
0_0402_5%

11

PR29
100K_0402_1%
2 1
2

PC20
1U_0805_16V7K

1
2
17

LX5
DL5
ILIM5
OUT5
PU3
FB5
BST3
N.C.MAX8734AEEI+_QSOP28 DH3
DL3
SHDN#
LX3
ON5
OUT3
ON3
FB3
SKIP#
PGOOD

6
4
3

PR28
0_0603_5%

PQ8
PC17
2200P_0402_50V7K

PR24
47_0402_5%

15
19
21
9
1

ILIM3

PR40
100K_0402_5%
1
2

PR26

DH5

VS

PR36
0_0402_5%
1
2

PC23
150U_D_6.3VM

BST5

16

PC26
0.22U_0603_16V7K

PR34
10.2K_0402_1%
1
2

+5VALWP

1 PC22
0.1U_0603_25V7K

14

1
PR32
499K_0402_1%

BST5A

VCC

PL3
10UH_SIL104R-100PF_4.4A_30%
2

B+++
PC16
0.1U_0603_25V7K

2VREF_1999

TON

PC21
4.7U_0805_10V4Z
2
1

VL

LX5

13

DH5

V+

5HG

PR27
0_0603_5%
1
2

4.7_1206_5%
1
2

B+++

20

PR23
0_0603_5%

AO4916_SO8

18

DL5

LD05

G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A

PC19
PR25
1U_1206_25V7K
4.7_1206_5%
2
1 2
1

8
7
6
5

VL
2

4.7U_1206_25V6K

PC15
1

PQ7

PC14
2200P_0402_50V7K
2
1

PL2
FBMA-L11-322513-151LMA50T_1210
1
2

B+

SPOK

1
+

47K_0402_5%

PC28
0.047U_0603_16V7K

+3.3V Iocp = 5.36A ~ 9.03A

Ipeak=4.5A

+5V Iocp = 5.35A ~ 8.65A

Ipeak=4.5A
Imax=3.5A

Imax=3.5A

MAINPWON (8,42,45)

PC29
1U_0603_16V6K

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/05/09

Deciphered Date

2006/09/26

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

SCHEMATIC, M/B LA-3121P

Size Document Number
Custom
Date:

Rev
D

401411

, 11, 2006

Sheet
D

43

of

51

Charger
Iadp=0~3.25A(65W)
P2

23

charger_LX

VCTL
ICTL

11
8
10
9

ACOK#
SHDN#
ACIN
ICHG

28
7

IINP
CCV

21

charger_DLO

BST

24

charger_BST

DLOV

22

charger_DLOV

DLO

4
PR48
10K_0402_1%
1
2
2

PR56
0_0402_5%
1
2

PC41
0.1U_0603_25V7K

PL6

15
13

19
18
16

1
2

CSIP
CSIN
BATT

PD10
1SS355_SOD323

PR57
2

33_1206_5%

20

14

BATT+
2

PC46
1U_0603_10V6K

PGND

GND

CCS

CCI

PC47
1U_0805_25V4Z

MAX1908-CCS

2
1

PC49
0.01U_0402_25V7K

ACON

2
1908LDO

2
PC50
0.1U_0402_16V7K
2
1
1

PR61
22K_0402_5%
1
2

LDO

PC44
4.7U_1206_25V6K
2
1

LX
PU4
MAX1908ETI+T_QFN28

REFIN

PR52
0.015_2512_1%

PC43
4.7U_1206_25V6K
2
1

charger_DHI

PC42
4.7U_1206_25V6K
2
1

25

@ PC39
1000P_0402_50V7K

10U_LF919AS-100M-P3_4.5A_20%

DHI

ACOFF (28,42)

26

ACOFF

5
6
7
8
CSSN

PQ17
SI4810BDY-T1-E3_SO8

CLS

PR60
10K_0402_1%

PR59
100K_0402_1%
2

(42)

REF

PR54
15K_0402_1%

PR58
24.9K_0402_1%
2
1

PQ19
2N7002W T/R7 1N SOT-323
(28)
IREF

PD11
RLS4148_LLDS2
ACOFF# 1
2

(42,45) PACIN

29

PR53
9.31K_0402_1%

TP
CELLS

3
12

27

CSSP

D
D
D
D

2
PR55
64.9K_0402_0.1%
2
1
S

DCIN

1908LDO

2
G

17

PC45
0.01U_0402_25V7K
2
1

PC40
0.1U_0402_16V7K
2
1

PR50
10K_0402_0.1%
2
1

PR51
150K_0402_5%
2
1

3
1

PQ18
2N7002W T/R7 1N SOT-323

2
G
3

CSIP

CSIN

BATT+

1
1
-

2
1

LM358ADR_SO8

PR69
200K_0402_1%

PC53
0.01U_0402_25V7K

PQ20
2N7002W T/R7 1N SOT-323
2
G

PR67
10K_0402_5%

8
P

PQ21
2N7002W T/R7 1N SOT-323
2
6C/8C# (45)
G

PR68
511K_0402_1%
1
2

(28) BATT_OVP
PU5B
LM358ADR_SO8

PU5A
3

VS

IREF=0.73~3.3V

+3VALW
PR66
300K_0603_0.1%
2

IREF=0.832*Icharge

PR65
845K_0603_1%

BATT-OVP=0.111*BATT+

2P4S:4800mAH/cell
0.8C=3.84A

4S CC-CV MODE : 16.8V

PC51
0.1U_0402_16V7K
1

PR63
100K_0402_5%

LI-4S:17.8V---BATT-OVP=1.9785

BATT+

VS

(28) FSTCHG

Charge voltage

Iinput=(64.9K/74.9K)*(75/20)=3.249A

PR62
0_0402_5%
1
2

PR64
10K_0402_5%
1
2

CP Point:

PC52
0.01U_0402_25V7K

PQ16
DTC115EUA_SC70

0_0402_5%
@ PR49
2
1

G
S
S
S

PC38
1U_0603_10V6K

ACOFF#

PQ14
DTC115EUA_SC70
1

PQ15
SI2301BDS_SOT23
3

VIN

5
6
7
8
D
D
D
D
G
S
S
S
4
3
2
1

(45) 6C/8C#

PR45
47K_0402_1%
1
2

4
3
2
1

VIN 2

8
7
6
5

PQ12
SI4810BDY-T1-E3_SO8

1
2

CSSN
CSSP

PD9

PC48
0.01U_0402_25V7K
2
1

PC35
0.1U_0603_25V7K

PC33
2200P_0402_50V7K
2
1

1SS355_SOD323

PC37
0.1U_0603_25V7K
1

PQ11
AO4407_SO8
1
2
3

1
3

PQ13
47K
DTA144EUA_SC70
2
47K

PC34
0.1U_0603_25V7K
PR46
200K_0402_1%

PC36
0.1U_0603_25V7K
2

1
PR47
47K_0402_5%

PC32
0.1U_0603_25V7K
2
1

8
7
6
5

PC31
4.7U_1206_25V6K
2
1

1
2
3

1
2
3

CHG_B+

PL5
FBMA-L18-453215-900LMA90T_1812
1
2

8
7
6
5

B+

PR44
0.02_2512_1%

P3

VIN

PQ10
AO4407_SO8

PC30
4.7U_1206_25V6K
2
1

PQ9
AO4407_SO8

OVP voltage :
LI-3S :17.8V----BATT-OVP=1.9758V
BATT-OVP=0.111*BATT+

2005/05/09

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2006/09/26

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 11, 2006

Sheet
E

44

of

51

BATT+

BATT++

PR70
100K_0402_5%
1
2

BATT+

PL7

FBMA-L18-453215-900LMA90T_1812
1
2

PH1 under CPU botten side :

CPU thermal protection at 90 degree C
Recovery at 70 degree C

+3VALWP

PR71
1K_0402_5%
1

6C/8C# (44)

BATT++

VL

2
PC57
1000P_0402_50V7K

PR81
100_0402_5%
1
2

PR73
150K_0402_1%

8
+

O
G

TM_REF1

MAINPWON (8,42,43)

PU2B
LM393DR_SO8

PR80
150K_0402_1%
2
1
VL

EC_SMB_DA1 (28,30)

PR77
82.5K_0603_1%
1
2

PH1
100K_0603_1%_TH11-4H104FT
2
1

+3VALWP
1

SUYIN_200275MR007G161ZL
PJP2

PR76
442K_0603_1%
2

PR83
100_0402_5%
1
2

PR82
150K_0402_1%

EC_SMB_CK1 (28,30)
2

PR79
6.49K_0402_1%
1
2

PC56
0.1U_0603_25V7K

BATT_TEMP (28)

SM ART
Batter y:
1 .GND
2. SMC
3.SMD
4.TS
5 . B/I
6. ID
7 .BA TT+

1
PR74
9.76K_0402_1%

PC58
1U_0805_16V7K
2
1

PR75
1K_0402_5%
1
2 BATT_TEMP

PR78
1K_0402_5%
2
1

7
6
5
4
3
2
1

PJP2 battery connector

VL

VS
@PR72
1K_0402_5%

PC54
0.01U_0402_25V7K
PC55
1000P_0402_50V7K

Vin Detector
Min.
typ.
Max.
H-->L 16.976V 17.257V 17.728V
L-->H 17.430V 17.901V 18.384V
+VSBP

PR84
1M_0402_1%
1
2

PU6A

ACIN (19,28)

O
4

PC62
0.1U_0603_25V7K

AC IN

PACIN

PACIN (42,44)

LM393DR_SO8

PR89
10K_0402_5%
1
2

2
1
2

PR87
10K_0402_5%

PZD2
RLZ4.3B_LL34

PR94
10K_0402_5%

PR92
20K_0402_1%
2
1

PC61
1000P_0402_50V7K

PQ23
2N7002W T/R7 1N SOT-323

PR91
22K_0402_5%
1
2

PR95
10K_0402_5%
2
1

RTCVREF

@ PC63
0.1U_0402_16V7K

2
G

PR93
0_0402_5%
1
2

SPOK

2
1
(43)

VS

PR86
84.5K_0402_1%

PR90
100K_0402_5%

VIN

VIN
PC60
0.1U_0603_25V7K

PC59
0.22U_1206_25V7K

VL

PR88
22K_0402_5%
1
2

PR85
100K_0402_5%

B+

PQ22
TP0610K_SOT23

PU6B

LM393DR_SO8

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/05/09

Deciphered Date

2006/09/26

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Title

SCHEMATIC, M/B LA-3121P

Size
B
Date:

Document Number

Rev
D

401411
, 11, 2006

Sheet
D

45

of

51

+3VALW

PJP3
JUMP_43X79

PJP4
JUMP_43X79

NC

TP

+2.5VSP

PGND

VFB

AGND

VTT

VCCA

VTT

REFEN

PC72
0.1U_0603_25V7K

PJP5
2

PJP6
1

+3VALW

+1.8VALWP

PQ25
2N7002W T/R7 1N SOT-323
2
1
2
G
PR163
0_0402_5%

SUSP (41)

+1.8VALW
1

+1.8VALW

JUMP_43X113

JUMP_43X113

PJP7

PJP8
1

+5VALW

+2.5VSP

PJP10

PJP11
1

+1.2V_HT

+1.5VSP

JUMP_43X113

RTCVREF

VIN

PGND

VFB

AGND

VTT

VCCA

VTT

REFEN

PJP14

+0.9V

+VSBP

+VSB

+1.5VSP

JUMP_43X113

2
2

PR165
60.4K_0402_1%

PC125
22U_1206_10V6M

JUMP_43X113

PC124
1U_0603_16V6K
1
2

PC126
0.047U_0402_16V7K

+5VALW
PU12

CM8562IS_PSOP8

PR166
51K_0402_1%

+0.9VP

+1.5VS

PJP12

JUMP_43X113

AGND

+2.5VS

PR164
10_0603_1%

+1.2VP_HT

JUMP_43X113

PC123
4.7U_1206_25V6K
1
2

PC127
0.1U_0603_25V7K

JUMP_43X113

+5VALWP

PJP13
JUMP_43X79

+3VALWP

PR98
60.4K_0402_1%

1
PC70
22U_1206_10V6M

PC68
22U_1206_10V6M

APL5331KAC-TRL_SO8

+0.9VP
2

PC69
0.1U_0402_16V7K
2
1

2
G

PQ24
2N7002W T/R7 1N SOT-323
PR99
1K_0402_1%
2
1

(41) SYSON#

@ PR162
0_0402_5%
1
2

VIN

PC67
1U_0603_16V6K
1
2

VOUT

PR96
1K_0402_1%

PC71
0.047U_0402_16V7K

NC

PC66
1U_0603_6.3V6M

VREF

PU8

CM8562IS_PSOP8

PR100
200K_0402_1%

NC

+3VALW

PR97
10_0603_1%

GND

RTCVREF

VCNTL

PC65
10U_1206_25VAK

VIN

PU7
1

AGND

+1.8V

+5VALW

PC64
4.7U_1206_25V6K
1
2

+1.8VALW

PQ40
2N7002W T/R7 1N SOT-323
2
1
2
G
PR167
0_0402_5%

SUSP (41)

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/05/09

2006/09/26

Deciphered Date

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom
Date:

Rev
D

401411

|, 11, 2006

Sheet
1

46

of

51

PL8
FBMA-L11-322513-151LMA50T_1210
1
2
PC83
2200P_0402_25V7K
2
1

PC82
10U_1206_25VAK
2
1

2
1

2
1

BOOT2

23

UGATE1

UGATE2

24

DH_1.8VP

PHASE1

PHASE2

25

LX_1.8VP

8
7
6
5
D
D
D
D

PR107
0_0603_5%
BST_1.8VP-1
1
2

PC90
0.1U_0402_16V7K
2
1

1
2
3
4
PU10
ISL6227CAZ-T_SSOP28

ISEN2

22

LGATE1

LGATE2

27

PGND1

PGND2

26

9
10
8
15

VOUT1
VSEN1
EN1
PG1

VOUT2
VSEN2
EN2
PG2/REF

20
19
21
16

OCSET2

18

DL_1.2VSP 2

ISEN1

PR111
1.5K_0402_1%
ISE_1.8VP 1
2

PQ30
SI4810BDY-T1-E3_SO8

DL_1.8V

G
S
S
S

PC94
0.01U_0402_25V7K

PR113
10.2K_0402_1%

+3VALW

1
@ PR118
0_0402_5%

+5VALW

PR117
10K_0402_1%

PR168
10K_0402_5%

PR121
56.2K_0402_1%

@ 10K_0402_1%

1
2

13

PR120
56.2K_0402_1%

PC95
0.1U_0402_16V7K

1 PR115

OCSET1

DDR

11

VSE_1.8VP

PC96
0.1U_0402_16V7K
2
1

1
2

@ PR119
0_0402_5%

PR116
10K_0402_1%
2
1

VSE_1.2VSP

1
2
PR114 10K_0402_1%

(28) VLDT_EN_P

GND

4
3
2
1

PC92
220U_D2_4VM_R15

PR110
1.27K_0402_1%
1
2 ISE_1.2VSP 7

+1.8VALWP

PL10
1.8UH_SIL104R-1R8PF_9.5A_30%
1
2

LX_1.2VSP

PR112
0_0402_5%
1

1
2
3
4

S
S
S
G

DH_1.2VSP 5

PR109
0_0402_5%

PQ28
SI4800BDY-T1-E3_SO8

S
S
S
G

28
VCC

14
VIN

BST_1.2VSP

SOFT2

PC93
1

0.01U_0402_25V7K

PR108
3.48K_0402_1%
2
1

SOFT1

PR106
0_0603_5%
1
2BST_1.2VSP-1
6 BOOT1

PC88
0.01U_0402_25V7K
1
17 2

5
6
7
8

PQ29
SI4810BDY-T1-E3_SO8

PC89
0.1U_0402_16V7K
2
1

PC87
0.01U_0402_25V7K
2
1
12

D
D
D
D

PC86
2.2U_0805_10V6K

8
7
6
5
D
D
D
D
S
S
S
G
8
7
6
5

1
PC91
220U_D2_4VM_R15

PR105
2.2_0603_5%

D
D
D
D

PL9
1.8UH_SIL104R-1R8PF_9.5A_30%
1
2

+5VALW

BST_1.8VP

1
2
3
4

+1.2VP_HT

PC81
2200P_0402_25V7K
2
1

PC80
10U_1206_25VAK
2
1

PC85
0.1U_0603_25V7K

PD12
DAP202U_SOT323
PQ27
SI4800BDY-T1-E3_SO8

PR104
51_1206_5%

B+

1
2

PC84
4.7U_0805_6.3V6K

PC79
2
1

PC78
10U_1206_25VAK
2
1

10U_1206_25VAK

ISL6227B+

Ipeak=8.5A, Imax=6A
Iocpmin=8.76A
Iocpmax=13.46A

Ipeak=6.47A, Imax=6.47*0.7=4.53A
Iocpmin=7.79A
Iocpmax=11.83A

Compal Secret Data

Security Classification
2005/05/09

Issued Date

Deciphered Date

2006/09/26

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

Size Document Number

Custom

Rev
D

401411

Date:

, 11, 2006

Sheet
1

47

of

51

B+
CPU_B+

+5VS

DH2

21

TON

LX2

22

LX2

OFS

DL2

24

DL2

PGND2

23

CSP2

13

CSN2

14

VRHOT#

+3VS

PR152
200K_0402_1%

PC118
4700P_0603_50V7K

PR153
100_0402_1%

PR154
200K_0402_1%

PQ35
SI7840DP-T1-E3_SO8

PR155
0_0603_5%
2

PR158
10_0402_5%

(8) PSI#

@ PC121
4700P_0402_25V7K

PQ37
FDV301N_NL 1N SOT23-3

(8)

PC101
100U_25V_M

PC100
2200P_0402_50V7K

PC99
0.01U_0402_25V7K
2
1

PD13
SKS30-04AT_TSMA
1
PR134
4.22K_0402_1%

CPU_B+

PQ38
FDS6676AS_SO8
G
D 5
S
D 6
S
D 7
S
D 8

PQ36
2N7002W T/R7 1N SOT-323

2
G

CSP2

SKIP#

PR146
0_0402_5%
1
2

CPU_VSS_SENSE

(8) CPU_VCC_SENSE

PL13
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2
SKS30-04AT_TSMA
1
2

PR137
10_0402_5%

PC109
0.22U_0603_16V7K

PC117
0.01U_0402_25V7K

0_0402_5%
2

REF

39

20
DH2

10

BST2

PR144

PD14

POUT

1
PC111

PR136
PH2
2.1K_0402_1%
10KB_0603_5%_ERTJ1VR103J
1
2
1
2

2200P_0402_50V7K
2
1
PC115
4.7U_1206_25V6K
2
1
PC116
4.7U_1206_25V6K
2
1

PC114
2
1

11

CCI

PR156
3.3_1206_5%
2

FB

CCV

PC120
1000P_0603_50V7K
2
1

TIME

PC108
4700P_0402_25V7K
1
PR143 20K_0402_1%
2
1
2
470P_0402_50V8J

4
3
2
1

PR150
0_0402_5%
2
1

PR141
2K_0603_1%
FB 1
2

4
3
2
1

40

PQ39
FDS6676AS_SO8
G
D 5
S
D 6
S
D 7
S
D 8

MAX8774_REF
2
0.1U_0603_16V7K

1
2
200K_0402_1%

IC

2
G

SHDN#

1
1 2

PR149
169K_0603_1%

38

@
AGND

3
2
1

1
PC113

18

CPU_B+

MAX8774_REF
1
2
PR148
31.6K_0402_1%

71.5K_0402_1%
1
PC110
2
1
150P_0402_50V8J

PR147

GND

EP

1
2
PC112
0.1U_0402_16V7K

TWO-PH

41

(28) POUT

15

37

4
3
2
1

100K_0402_5%
PR145 10K_0402_1%
1
2

CSN1

PR142
100_0402_1%

PR140
2

CSP1

PHASEGD

0_0603_5%

@ PR139
1

2
1
PC97
4.7U_1206_25V6K
2
1
PC98
4.7U_1206_25V6K
2
1

16

PWRGD

17

For EC ATE

27

PGND1

FDS6676AS_SO8

D5

PC107
PR131
1000P_0603_50V7K 3.3_1206_5%
2
1 1
2

DL1

36
SHORT PADS
2
1

FDS6676AS_SO8
PQ33
4 G
D 5
3 S
D 6
2 S
D 7
1 S
D 8

26

PL12
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2

3
2
1

LX1

DL1

5
6
7
8

28

D4

D
D
D
D

D3 MAX8774GTL+_TQFN40
LX1

35

PQ32

34

+CPU_CORE

G
S
S
S

DH1

4
PR128
0_0603_5%
1
2

PC106
4700P_0402_25V7K
2
1

29

PC105
0.22U_0603_16V7K
2
1

DH1

PU11

28) VR_ON

D2

MAX8774_VCC

PQ34
2N7002W T/R7 1N SOT-323

33

PQ31
SI7840DP-T1-E3_SO8

0.22U_0603_16V7K

PR138
0_0402_5%
1
2

30

PR151

+3VS

BST1

(28) VGATE

J1
1

D1

PC119
2
1

(8) VID5

32

(8) VID4

THRM

GNDS

(8) VID3

PR126
0_0603_5%
1

D0

12

(8) VID2

VDD

31

(8) VID1

VCC

PC104
0.01U_0402_25V7K
2
1

2
1
PR124 0_0402_5%
2
1
PR125 0_0402_5%
2
1
PR127 0_0402_5%
2
1
PR129 0_0402_5%
2
1
PR130 0_0402_5%
2
1
PR132
0_0402_5%
1
2
PR133
0_0402_5%
1
2
PR135 100K_0402_1%

(8) VID0

25

MAX8774_VCC
19

PC103
2.2U_0603_10V6K

@ PR123
10K_0402_5%
2
1

PC102
2.2U_0603_6.3V6K
1
2

PR122 10_0402_5%
2
1

+3VS

PL11
FBMA-L18-453215-900LMA90T_1812
1
2

PR157
4.22K_0402_1%

PH3
PR159
10KB_0603_5%_ERTJ1VR103J
2.1K_0402_1%
1
2
1
2
PC122
0.22U_0603_16V7K
1
2
CSP2

PR160

0_0402_5%

Compal Secret Data

Security Classification
2005/05/09

Issued Date

Deciphered Date

2006/09/26

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom
Date:

, 11, 2006

Rev
D

401411
Sheet
1

48

of

51

Version change list (P.I.R. List)

Item
D

Fixed Issue

Reason for change

Rev.

Schematic update.

Because schematic update, we don't need this two parts.

Schematic update.

Because schematic update, we don't need this two parts.

3
4
5

0.1

BOM error
BOM error

PG#

Page 1 of 1
for PWR

VER

Phase

Delete PQ24 SB000005M10.

46

Delete PR162 SD028000080.

0.1

EVT

0.1

EVT

0.1

46

BOM error

0.1

44

Change PQ15 from SB923010010 to SB923010020.

0.1

EVT

BOM error

0.1

48

Change PQ37 from SB503010004 to SB503010010

0.1

EVT

0.1

48

0.1

EVT

Because we need to reduce MOSFET teperature of

MOSFET thermal issue

Modify List

high side mos.

Change PQ31 and PQ35 from SB562940000 to SB578400080.

Change PL1,PL5,PL7 and PL11 form SM010018210 to

BOM error

BOM error

BOM error

0.1

47

BOM error

BOM error

0.1

48

BOM error

0.1

44

10

BOM error

11

BOM error

BOM error

42

0.1

EVT

SM010020720.

0.1

Change PR121 from SD000001500 to SD000001580.

0.1

EVT

0.1

EVT

0.1

EVT

Change PR50 from SD034576280 to SD034140280.

0.1

EVT

Change PR148 from SD034316200 to SD034316280.

0.1

EVT

0.1

EVT

0.1

EVT

BOM error

BOM error

0.1

44

Change PR149 from SD014169300 to SD014169380.

Change PR55 from SD034100380 to SD034100280.

BOM error

0.1

48

BOM error

0.1

44

BOM error

0.1

46

0.1

48

Change PC101 from SF22004M210 to SF10004M080.

0.1

EVT

0.1

48

Add PR137 and PR158 SD028100A80.

0.1

EVT

Add PR168 SD034100280.

0.1

EVT

Change PC52,PC53,PC54,PC87,PC88,PC93 and PC94 from

B

12

BOM error

13

BOM error

14

High limit issue.

15

BOM error

16

Power sequence adjust.

Power sequence adjust.

0.1

47

17

Power sequence adjust.

Power sequence adjust.

0.1

47

0.1

42

18

Because the high is limited, we need to reduce space.

BOM error

BOM cost issue.

SE075103Z00 to SE075103K80.

Change PC70 from SE153106K80 to SE116226M80.

Delete PR115 SD034100280.

0.1

EVT

0.1

EVT

Change PQ5,PQ18,PQ19,PQ20,PQ21,PQ23,PQ25,PQ34,PQ36,PQ40

BOM cost issue.

from SB000005M10 to SB000006800.

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-3121P

Size

Document Number

Date:

|, 11, 2006

Rev
D

401411
Sheet
1

49

of

51

Version change list (P.I.R. List)

Item
D

Rev.

PG#

Charger accuracy issue.

Charger accuracy issue.

Increase changer accuracy to meet customer request.

0.2

44

Charger accuracy issue.

Increase changer accuracy to meet customer request.

0.2

44

Increase changer accuracy to meet customer request. 0.2

Improve IC risk.

44

Improve IC risk.

0.2

44

Modify List

Page 2 of 2
for PWR

EVT

Change PR50 form SD034140280 to SD000008B00.

0.1

EVT

Change PR55 from SD034100280 to SD00000CL80.

0.1

EVT

Change PR60 from SD034100180 to SD034100280.

0.1

EVT

0.1

EVT

Improve OCP point.

0.3

43

Change PR29 and PR30 from SD034200380 to SD034100380

Improve OCP point.

Improve OCP point.

0.3

47

Change PR120 from SD034499280 to SD000001580.

Improve ripple voltage.

Incresr +1.2VP_HT voltage.

Incresr +1.8VALWP voltage.

12
13
14

Phase

0.1

Improve OCP point.

11

VER

Change PR44 from SE000001E00 to SE000001F00.

10

Reason for change

Fixed Issue

EVT

0.1

Improve ripple voltage.

0.4

46

Incresr +1.2VP_HT voltage.

0.4

47

0.4

47

0.4

48

Incresr +1.8VALWP voltage.

Improve thermal issue.

Improve thermal issue.

Change PC68 and PC125 from SE142475K80 to SE116226M80.

0.2

DVT

Change PR108 from SD034340180 to SH034348180.

0.2

DVT

Change PR113 from SD034100280 to SD028102280.

0.2

DVT

0.2

DVT

0.2

DVT

0.2

DVT

0.2

DVT

Change PQ32, PQ33, 38, PQ39 from SB000003W00 to

SB578320010

Improve thermal issue.

Improve +CPU_CORE OCP point.

Improve +CPU_CORE OCP point.

Improve +CPU_CORE OCP point.

Improve thermal issue.

Improve +CPU_CORE OCP point.

Improve +CPU_CORE OCP point.

0.4

48

Change PL12, PL13 from SH12056BM00 to SH000005680.

0.4

48

Change PR134, PR157 from SD034150280 to SD034422180

0.4

Improve +CPU_CORE OCP point.

48

Change PR136 and PR159 from SD034150280 to SH034210180.

0.4

48

Change PC109 and PC122 from SE042333K80 to SE026224K80

0.2

DVT

15

Improve CPU load line

Improve CPU load line

0.4

48

Change PR141 from SD014255180 to SD014200180

0.2

DVT

16

Improve CPU load line

Improve CPU load line

0.4

48

Change PR142 and PR153 from SD034100A80 to SD034100080.

0.2

DVT

17
18
A

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-3121P

Size

Document Number

Date:

|, 11, 2006

Rev
D

401411
Sheet
1

50

of

51

Page 1 of 2 for RD Modify

Item
D

Fixed Issue

PG#

Modify List

VER

Phase

ATI Recommand.

13

Change R376 82.5 ohm to 100 ohm.

0.2

DVT

TV-OUT .

14

Increase R590,R591,R592 150 ohm pull down resister.

0.2

DVT

PCI_R ST# .

18

Change U15,U16 voltage source +3VS to +3VALW.

0.2

DVT

Fixed USB2.0 EYE Diagram .

19

Change R164 11.8K ohm to 11.3K ohm.

0.2

DVT

IMPROVE TV-OUT SIGNAL QUALITY.

24

Change C417,C418,C419,C425,C428,C430 to 220P.

0.2

DVT

SB_INT_FLASH_SEL# E C .

28

Add R594.

0.2

DVT

M AC , LED .

41

Add R586,R589,Q5,Q12 change to 2N7002.

0.2

DVT

+1.5VS, +2.5VS, +0 .9V .

41

Add R587,Q34(+2.5VS),R588,Q35(+1.5VS),R604,Q36(+0.9V).

0.2

DVT

w .

41

Add C658 0.1uF

0.3

PVT

10

Sometimes run S3 test program will interrupt .

37

Change R100 to 47K(Ori : 100K)

0.3

PVT

11

?+2.5V_LAN Power.

26

C281 change to 10uF

0.3

PVT

12

LAN ?

27

Change R387,R390,R391,R395,C494,C500 placement to near

Transformer.

0.3

13

Speaker ( ).

39

Add R606(0 ohm),R607(0 ohm),R608(47K),R609(47K)

0.3

PVT

14

Add Camera Connect.

31

Add R605,C657,JP35

0.3

PVT

15

Bluetooth chock.

38

Add L65

0.3

PVT

16

For EMI request

15

Add C330

0.4

PVT2

17

JP25 5-in-1 connector Spec update (Pin18 from NC to SD-GND)

33

Add R610

0.4

PVT2

18

Modify Package for Lead-free part

41

Modify C658 package from 0402 to 0603

0.4

PVT2

19

Reserve

28

Add R611, R612, EC_Pin-100

1.0

MP

20

for solve MS detect issue

33

Remove C197

1.0

MP

PVT

Compal Secret Data

Security Classification
2005/05/09

Issued Date

2006/10/10

Deciphered Date

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3121P

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Title

Size Document Number

Custom 401411
Date:

R ev
D

, 11, 2006

Sheet
1

51

of

51