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A B C D E

1 1

Compal Confidential
2 2

HCL51 Schematics Document


Intel Yonah Processor with ATIRC410MD/E + DDRII + SB460M

3
2006-04-05 3

REV: 1.0

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 1 of 43
A B C D E
A B C D E

Compal Confidential
Thermal Sensor Clock Generator
Model Name : HCL51 Fan Control
page 35
Yonah
F75383M ICS951413
page 4 page 12
File Name : LA-3211P uPGA-478 Package
page 4,5
1 1
PSB
H_A#(3..31) 533/667MHz H_D#(0..63)
LCD Conn. CRT & TV-out
page 18 page 19

LVDS Memory BUS(DDRII) 200pin DDRII-SO-DIMM X2


ATI RC410MB/D/E Single Channel BANK 0, 1, 2, 3 page 10,11

1.8V DDRII 400/533/667


uFCBGA-1466
Mini card PCI-Express page 7,8,9

page 25
Alink USB conn x4 Bluetooth
page 26 Conn page 31

USB port 0, 2 on M/B USB port1


USB port 4, 6 on PWRBTN/B
2
3.3V 33 MHz PCI BUS ATI SB460M 3.3V 48MHz 2

IDSEL:AD18 IDSEL:AD22 IDSEL:AD20 3.3V 24.576MHz/48Mhz HD Audio


(PIRQF/H#, (PIRQG#, (PIRQE#/B#,
GNT#3, GNT#1, GNT#2, 3.3V ATA-100
REQ#3) REQ#1) REQ#2)
IDE
S-ATA
page 13~~17
Mini PCI LAN (100/1000) CardBus PIDE-HDD SIDE-ODD
socket RTL8100/8110 ENE CB714 Conn. MDC 1.5 HDA Codec
(WLAN) page 23 page 21 Conn ALC883
page 20 page 20 page 31 page 33
(TV-Tuner)
page 25
6 in 1 S-ATA HDD
RJ45 Slot 0 socket Conn.
page 24 page 15
page 22 page 22
Audio AMP
LPC BUS page 34
3 3

RTC CKT. Super I/O Phone Jack x3


page 13
ENE KB910Q page 34
SMsC LPC47N207
page 29 page 28

Power On/Off CKT. Switch/B Conn.


USB port4, 6
page 32
page 31
Touch Pad Int.KBD
page 32 page 30 FIR
TFDU6102-TR3
page 28
DC/DC Interface CKT. CD-PLAY/B Conn. EC I/O Buffer BIOS
page 31
page 36 page 30 page 30

Power Circuit DC/DC MEDIA/B Conn.


page 31
page 37~~43
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 2 of 43
A B C D E
A B C D E

SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON

Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW

VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. N/A N/A N/A
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS 1.05V switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF Board ID / SKU ID Table for AD channel
+1.8VS 1.8V switched power rail ON OFF OFF Vcc 3.3V +/- 5%
+2.5VS 2.5V switched power rail ON OFF OFF Ra/Rc/Re 100K +/- 5%
+3VALW 3.3V always on power rail ON ON ON* Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3VS 3.3V switched power rail ON OFF OFF 0 0 0 V 0 V 0 V
+5VALW 5V always on power rail ON ON ON* 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+5VS 5V switched power rail ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+VSB VSB always on power rail ON ON ON* 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+RTCVCC RTC power ON ON ON 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V
2 2

BOARD ID Table BTO Option Table


Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BTO Item BOM Structure
External PCI Devices Board ID PCB Revision
LAN(10/100) 8100C@
Device IDSEL# REQ#/GNT# Interrupts
0
LAN(GIGA) 8110S@
CardBus(SD) AD20 2 PIRQE/PIRQH
1 0.2
FIR FIR@
1394 AD16 0 PIRQA
2 0.2
MINI CARD1 MINI1@
LAN(10/100) AD22 1 PIRQG
3
SATA HDD SATA@
Mini-PCI(WLAN/TV-Tuner) AD18 3 PIRQF/PORQH
4
CardReader 4IN1@
5
6
7

EC SM Bus1 address EC SM Bus2 address SKU ID Table


3
Device Address Device Address
SKU ID SKU 3

Smart Battery 0001 011X b Fintek F75383M 1001 100X b


0
EEPROM(24C16/02) 1010 000X b
1
GMT G781-1 1001 101X b
2
3
4
5
6
SB460M SM Bus address 7
Device Address

Clock Generator 1101 001Xb


(ICS951413)
DDR DIMM0 1001 000Xb
DDR DIMM2 1001 010Xb

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 3 of 43
A B C D E
5 4 3 2 1

+3VS
(7) H_A#[3..31] H_D#[0..63] (7)
JCPU1A C1
0.1U_0402_16V4Z
H_A#3 J4 E22 H_D#0 1 2
H_A#4
H_A#5
L4
A3#
A4#
YONAH D0#
D1# F24 H_D#1
H_D#2
M3 A5# D2# E26
H_A#6 K5 H22 H_D#3 1 U1
H_A#7 A6# D3# H_D#4 C2
M1 A7# D4# F23 1 VDD SCLK 8 EC_SMB_CK2 (28)
H_A#8 N2 G25 H_D#5
H_A#9 A8# D5# H_D#6 2200P_0402_50V7K THERMDA
D J1 A9# D6# E25 2 D+ SDATA 7 EC_SMB_DA2 (28) D
H_A#10 H_D#7 2
N3 A10# D7# E23
H_A#11 P5 K24 H_D#8 THERMDC 3 6
H_A#12 A11# D8# H_D#9 D- ALERT#
P2 A12# D9# G24
H_A#13 L1 J24 H_D#10 4 5
H_A#14 A13# D10# H_D#11 +1.05VS +CPU_CORE THERM# GND
P4 A14# D11# J23
H_A#15 P1 H26 H_D#12
H_A#16 A15# D12# H_D#13 ADM1032ARMZ-2REEL_MSOP8
R1 A16# D13# F26

1
H_A#17 Y2 K22 H_D#14 R1
H_A#18 A17# D14# H_D#15 R2 F75383M_MSOP8
U5 A18# D15# H25
H_A#19 R3 N22 H_D#16 @ 47K_0402_5% 47K_0402_5%
H_A#20 A19# D16# H_D#17
W6 A20# D17# K25
H_A#21 U4 P26 H_D#18
A21# D18# MAINPWON (14,36,37,39)
H_A#22 H_D#19

2
Y5 A22# D19# R23

1
H_A#23 U2 L25 H_D#20 C3 C
H_A#24 A23# D20# H_D#21 Q1
R4 A24# D21# L22 1 2 2
H_A#25 T5 ADDR GROUP DATA GROUP L23 H_D#22 B
H_A#26 A25# D22# H_D#23 @ 0.1U_0603_25V7K E 2SC2411K_SC59
T3 A26# D23# M23
H_A#27 H_D#24

3
W3 A27# D24# P25
H_A#28 W5 P22 H_D#25
H_A#29 A28# D25# H_D#26 56_0402_5%
Y4 A29# D26# P23
H_A#30 W2 T24 H_D#27 +1.05VS 1 2
H_A#31 A30# D27# H_D#28 R4
(7) H_REQ#[0..4] Y1 A31# D28# R24
L26 H_D#29
H_REQ#0 D29# H_D#30 H_THERMTRIP#
K3 REQ0# D30# T25
H_REQ#1 H2 N24 H_D#31
H_REQ#2
H_REQ#3
H_REQ#4
K2
J3
REQ1#
REQ2#
REQ3#
D31#
D32#
D33#
AA23
AB24
H_D#32
H_D#33
H_D#34
A +1.05VS
+3VALW

L5 REQ4# D34# V24

1
V26 H_D#35 +1.05VS
H_ADSTB#0 D35# H_D#36
(7) H_ADSTB#0 L2 ADSTB0# D36# W25 1K_0402_5%
H_ADSTB#1 V4 U23 H_D#37
(7) H_ADSTB#1 ADSTB1# D37#

2
C
U25 H_D#38 R5 C
D38#

1
U22 H_D#39 R6
D39# H_D#40 R7 R8

2
D40# AB25 470_0402_5%
W22 H_D#41 56_0402_5%
D41# R9 0_0402_5% H_PROCHOT# (14,42)
Y23 H_D#42 75_0402_1%
CLK_CPU_BCLK D42# H_D#43 H_DPRSTP# 2

1
(12) CLK_CPU_BCLK A22 BCLK0 D43# AA26 1

1
CLK_CPU_BCLK# HOST CLK H_D#44 C

2
A21 Y26
(12) CLK_CPU_BCLK# BCLK1 D44#
B

1
Y22 H_D#45 C R10 470_0402_5% 2 Q2
D45# H_D#46 B PMBT3904_SOT23
D46# AC26 2 1 2 DPRSLPVR (13,42)
AA24 H_D#47 B E
H_ADS# D47# H_D#48 E 2SC2411K_SC59

3
(7) H_ADS# H1 ADS# D48# AC22
H_BNR# H_D#49 PROCHOT#

3
(7) H_BNR# E2 BNR# D49# AC23 Q3
H_BPRI# G5 AB22 H_D#50
(7)
(7)
(7)
H_BPRI#
H_BR0#
H_DEFER#
H_BR0#
H_DEFER#
H_DRDY#
F1
H5
BPRI#
BR0#
DEFER#
D50#
D51#
D52#
AA21
AB21
H_D#51
H_D#52
H_D#53
C
(7) H_DRDY# F21 DRDY# D53# AC25
H_HIT# G6 AD20 H_D#54
(7) H_HIT# HIT# D54#
H_HITM# E4 CONTROL AE22 H_D#55
(7) H_HITM# HITM# D55#
H_IERR# D20 AF23 H_D#56
H_LOCK# IERR# D56# H_D#57 +1.05VS
(7) H_LOCK# H4 LOCK# D57# AD24
H_RESET# B1 AE21 H_D#58
(7,13) H_RESET# RESET# D58# H_D#59
D59# AD21
AE25 H_D#60
(7) H_RS#[0..2] D60#
H_RS#0 F3 AF25 H_D#61
H_RS#1 RS0# D61# H_D#62
F4 RS1# D62# AF22
H_RS#2 G3 AF26 H_D#63
H_TRDY# RS2# D63# H_DPRSTP# @ 2 R11 56_0402_5%
(7) H_TRDY# G2 TRDY# 1

J26 H_RESET# R12 2 1 @ 54.9_0402_1%


DINV0# H_DINV#0 (7)
DINV1# M26 H_DINV#1 (7)
AD4 V23 ITP_TMS R13 2 1 40.2_0402_1%
BPM0# DINV2# H_DINV#2 (7)
B AD3 AC20 B
BPM1# DINV3# H_DINV#3 (7)
AD1 ITP_TDI 2 1
BPM2# R14 150_0402_5%
AC4 BPM3# H_DSTBN#[0..3] (7)
H23 H_DSTBN#0 ITP_TDO R15 2 1 @ 54.9_0402_1%
ITP_DBRESET# DSTBN0# H_DSTBN#1
C20 DBR# DSTBN1# M24
H_DBSY# E1 W24 H_DSTBN#2
(7) H_DBSY# DBSY# DSTBN2#
H_DPSLP# B5 AD23 H_DSTBN#3 H_BR0# R16 1 2 200_0402_5%
(13,14) H_DPSLP# DPSLP# DSTBN3# H_DSTBP#[0..3] (7)
H_DPRSTP# E5 G22 H_DSTBP#0
(42) H_DPRSTP# DPRSTP# DSTBP0#
H_DPWR# D24 N25 H_DSTBP#1 H_IERR# R17 2 1 56_0402_5%
B (7) H_DPWR#
T2
T3
PAD
PAD
AC2
AC1
DPWR#
PRDY# MISC DSTBP1#
DSTBP2# Y25
AE24
H_DSTBP#2
H_DSTBP#3
C PROCHOT#

H_PWRGOOD
D21
PREQ#
PROCHOT#
DSTBP3#

Place Caps Close to CPU Socket


+1.05VS
(13) H_PWRGOOD D6 PWRGOOD
H_CPUSLP# D7
(14) H_CPUSLP# SLP# +3VALW
ITP_TCK AC5 C4 1 2 180P_0402_50V8J H_INIT# R18 1 2 @ 390_0402_5%
ITP_TDI TCK H_A20M#
AA6 TDI A20M# A6 H_A20M# (13)
@ R20 1K_0402_5% ITP_TDO AB3 A5 H_FERR# C5 1 2 180P_0402_50V8J H_A20M# R19 1 2 @ 390_0402_5%
TDO FERR# H_FERR# (13)
2 1 TEST1 C26 C4 H_IGNNE# ITP_DBRESET# 2 1
TEST1 IGNNE# H_IGNNE# (13)
2 1 R22 TEST2 D25 TEST2 INIT# B3 H_INIT#
H_INIT# (13)
C6 1 2 180P_0402_50V8J H_CPUSLP# R23 1 2 200_0402_5% R21 150_0402_5%
51_0402_1% ITP_TMS AB5 C6 H_INTR
TMS LINT0 H_INTR (13)
ITP_TRST# AB6 B4 0_0402_5% C7 1 2 180P_0402_50V8J H_INTR R24 1 2 @ 390_0402_5%
TRST# LINT1
LEGACY CPU 2 1 H_NMI H_NMI (13)
THERMAL R25 C8 1 2 180P_0402_50V8J H_NMI R26 1 2 @ 390_0402_5% ITP_TRST# R27 2 1 680_0402_5%
H_THERMDA, H_THERMDC routing together. THERMDA A24 D5 H_STPCLK#
THERMDC A25
THERMDA DIODE STPCLK#
A3 H_SMI#
H_STPCLK# (13)
C9 1 2 180P_0402_50V8J H_SMI# R28 1 2 @ 390_0402_5% ITP_TCK R29 2 1 27.4_0402_1%
Trace width / Spacing = 10 / 10 mil C7
THERMDC SMI# H_SMI# (13)
THERMTRIP# C10 1 2 180P_0402_50V8J H_STPCLK# R30 1 2 @ 390_0402_5%
A H_THERMTRIP#
FOX_PZ47903-2741-42_YONAH C11 1 2 180P_0402_50V8J H_IGNNE# R31 1 2 @ 390_0402_5%

A C12 1 2 180P_0402_50V8J H_PWRGOOD R32 2 1 332_0402_1% A

C13 1 2 180P_0402_50V8J H_FERR# R33 2 1 56_0402_5%


For B-0 stepping engineering samples (ES) of Celeron M H_DPSLP# R34 1 2 200_0402_5%
processor need to pop this 51 ohm resistor.
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Yonah(1/2)-GTLITP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 4 of 43
5 4 3 2 1
5 4 3 2 1

Length match within 25 mils


Layout close CPU
(42) VCCSENSE VCCSENSE +CPU_CORE JCPU1C
+CPU_CORE (42) VSSENSE VSSENSE JCPU1B
AE18 VCC VSS K1
R35 1 2 100_0402_1% AF7 AB26 AE17 J2
R36 1 VCCSENSE VSS VCC VSS
2 100_0402_1% AE7 VSSSENSE VSS AA25 AB15 VCC VSS M2
VSS AD25 AA15 VCC VSS N1
20mils VSS AE26 AD15 VCC VSS T1
+1.5VS B26 VCCA VSS AB23 AC15 VCC VSS R2
VSS AC24 AF15 VCC VSS V2
D +1.05VS K6 VCCP VSS AF24 AE15 VCC VSS W1 D
J6 VCCP VSS AE23 AB14 VCC VSS A26
M6 VCCP VSS AA22 AA13 VCC VSS D26
N6 AD22 AD14 C25
+1.05VS C14
1 1
C15
T6
VCCP
VCCP
YONAH VSS
VSS AC21 AC13
VCC
VCC
VSS
VSS F25
R6 VCCP VSS AF21 AF14 VCC VSS B24
R_A 10U_0805_10V4Z 0.01U_0402_16V7K K21 AB19 AE13 A23
VCCP VSS VCC VSS

1
2 2
J21 VCCP VSS AA19 AB12 VCC VSS D23
M21 AD19 AA12 E24
+GTL_REF0
R37
1K_0402_1%
N21
VCCP
VCCP
VSS
VSS AC19 AD12
VCC
VCC
YONAH VSS
VSS B21
T21 VCCP VSS AF19 AC12 VCC VSS C22
R21 VCCP VSS AE19 AF12 VCC VSS F22

2
V21 VCCP VSS AB16 AE12 VCC VSS E21

POWER, GROUNG, RESERVED SIGNALS AND NC


W21 VCCP VSS AA16 AB10 VCC VSS B19
R_B V6 VCCP VSS AD16 AB9 VCC VSS A19

1
G21 VCCP VSS AC16 AA10 VCC VSS D19
2K_0402_1% VSS AF16 AA9 VCC VSS C19
VSS AE16 AD10 VCC VSS F19
R38 H_PSI# AE6 AB13 AD9 E19
(42) H_PSI# PSI# VSS VCC VSS
VSS AA14 AC10 VCC VSS B16
CPU_VID0
2
(42) CPU_VID0 AD6 VID0 VSS AD13 AC9 VCC VSS A16
(42) CPU_VID1 CPU_VID1 AF5 AC14 AF10 D16
CPU_VID2 VID1 VSS VCC VSS
(42) CPU_VID2 AE5 VID2 VSS AF13 AF9 VCC VSS C16
CPU_VID3 POWER, GROUND
Layout close CPU PIN AD26 (42)
(42)
CPU_VID3
CPU_VID4 CPU_VID4
AF4
AE3
VID3 VSS AE14
AB11
AE10
AE9
VCC VSS F16
E16
CPU_VID5 VID4 VSS VCC VSS
0.5 inch (max) (42)
(42)
CPU_VID5
CPU_VID6 CPU_VID6
AF2
AE2
VID5 VSS AA11
AD11
AB7
AA7
VCC VSS B13
A14
VID6 VSS VCC VSS
VSS AC11 AD7 VCC VSS D13
VSS AF11 AC7 VCC VSS C14
+GTL_REF0 AD26 GTLREF VSS AE11 B20 VCC VSS F13
VSS AB8 A20 VCC VSS E14
CPU_BSEL0 B22 AA8 F20 B11
C (12) CPU_BSEL0 CPU_BSEL1 BSEL0 VSS VCC VSS C
(8,12) CPU_BSEL1 B23 BSEL1 VSS AD8 E20 VCC VSS A11
CPU_BSEL2 C21 AC8 B18 D11
(12) CPU_BSEL2 BSEL2 VSS VCC VSS
VSS AF8 B17 VCC VSS C11
R39 1 2 27.4_0402_1% COMP0 R26 AE8 A18 F11
R40 54.9_0402_1% COMP1 COMP0 VSS VCC VSS
1 2 U26 COMP1 VSS AA5 A17 VCC VSS E11
R41 1 2 27.4_0402_1% COMP2 U1 AD5 D18 B8
R42 54.9_0402_1% COMP3 COMP2 VSS VCC VSS
1 2 V1 COMP3 VSS AC6 D17 VCC VSS A8
CPU_BSEL CPU_BSEL0 CPU_BSEL1 CPU_BSEL2 VSS AF6 C18 VCC VSS D8
VSS AB4 C17 VCC VSS C8
+CPU_CORE E7 VCC VSS AC3 F18 VCC VSS F8
TRACE CLOSELY CPU < 0.5' AB20 VCC VSS AF3 F17 VCC VSS E8
133 0 0 1 AA20 VCC VSS AE4 E18 VCC VSS G26
COMP0, COMP2 layout : Width 18mils and Space 25mils AF20 VCC VSS AB1 E17 VCC VSS K26
AE20 AA2 B15 J25
COMP1, COMP3 layout : Space 25mils AB18
VCC VSS
AD2 A15
VCC VSS
M25
VCC VSS VCC VSS
166 0 1 1 AB17 VCC VSS AE1 D15 VCC VSS N26
AA18 VCC VSS B6 C15 VCC VSS T26
AA17 VCC VSS C5 F15 VCC VSS R25
AD18 VCC VSS F5 E15 VCC VSS V25
AD17 VCC VSS E6 B14 VCC VSS W26
AC18 VCC VSS H6 A13 VCC VSS H24
AC17 VCC VSS J5 D14 VCC VSS G23
AF18 VCC VSS M5 C13 VCC VSS K23
AF17 VCC VSS L6 F14 VCC VSS L24
VSS P6 E13 VCC VSS P24
VSS R5 B12 VCC VSS N23
D2 RSVD VSS V5 A12 VCC VSS T23
F6 RSVD VSS U6 D12 VCC VSS U24
D3 RSVD VSS Y6 C12 VCC VSS Y24
C1 RSVD VSS A4 F12 VCC VSS W23
AF1 RSVD VSS D4 E12 VCC VSS H21
B D22 E3 B10 J22 B
RSVD VSS VCC VSS
C23 RSVD VSS H3 B9 VCC VSS M22
C24 RSVD VSS G4 A10 VCC VSS L21
AA1 RSVD VSS K4 A9 VCC VSS P21
AA4 RSVD VSS L3 D10 VCC VSS R22
AB2 RSVD VSS P3 D9 VCC VSS V22
AA3 RSVD VSS N4 C10 VCC VSS U21
M4 RSVD VSS T4 C9 VCC VSS Y21
N5 RSVD VSS U3 F10 VCC
T2 RSVD VSS Y3 F9 VCC
V3 RSVD VSS W4 E10 VCC
B2 RSVD VSS D1 E9 VCC
C3 RSVD VSS C2 B7 VCC
T22 RSVD VSS F2 A7 VCC
B25 RSVD VSS G1 F7 VCC

FOX_PZ47903-2741-42_YONAH
FOX_PZ47903-2741-42_YONAH

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Yonah(2/2)-PWR/GND
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 5 of 43
5 4 3 2 1
5 4 3 2 1

Place these inside


socket cavity on L6
(North side
+CPU_CORE Secondary)

1 1 1 1 1 1 1 1 1 1
C16 C17 C18 C19 C20 C21 C22 C23 C24 C25
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
D 2 2 2 2 2 2 2 2 2 2 D

+CPU_CORE

1 1 1 1 1 1 1 1 1 1
C26 C27 C28 C29 C30 C31 C32 C33 C34 C35
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2 2 2 2 2 2 2

+CPU_CORE

1 1 1 1 1 1
C36 C37 C38 C39 C40 C41
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2 2 2

+CPU_CORE

1 1 1 1 1 1 22uF 0805 X5R -> 85 degree C


C C42 C43 C44 C45 C46 C47 C
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2 2 2

High Frequence Decoupling

Near VCORE regulator.

+CPU_CORE

2006/02/13
330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9
South Side Secondary 1 1 1 1 1 1
+ C48 + C49 + C50 + C51
@
+ C52
@
+ C53 North Side Secondary ESR <= 1.5m ohm
B 2 2 2 2 2 2
Capacitor > 1980uF B

9mOhm H=1.9mm H=1.9mm


7343
PS CAP

+1.05VS
330U_D2E_2.5VM_R9

1
1 1 1 1 1 1 Place these inside
+
C54

C55 C56 C57 C58 C59 C60


socket cavity on L8
(North side
2 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z Secondary)
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Yonah Bypass
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 6 of 43
5 4 3 2 1
A B C D E

(4) H_A#[3..31] H_D#[0..63] (4)


(4) H_REQ#[0..4] H_DINV#[0..3] (4)
(4) H_RS#[0..2] H_DSTBN#[0..3] (4)
H_DSTBP#[0..3] (4)
U2A U2C
H_A#3 G28 E28 H_D#0
H_A#4 CPU_A3# CPU_D0# H_D#1
H26 CPU_A4# CPU_D1# D28 J4 GFX_RX0N GFX_TX0N N2
H_A#5 G27 D29 H_D#2 J5 N1
H_A#6 CPU_A5# CPU_D2# H_D#3 GFX_RX0P GFX_TX0P
G30 CPU_A6# CPU_D3# C29
H_A#7 G29 D30 H_D#4 L4 R2
CPU_A7# CPU_D4# GFX_RX1N GFX_TX1N

PART 3 OF
H_A#8 H_D#5

PART 1 OF
G26 CPU_A8# CPU_D5# C30 K4 GFX_RX1P GFX_TX1P P2
H_A#9 H_D#6

DATA GROUP
H28 CPU_A9# CPU_D6# B29
H_A#10 J28 C28 H_D#7 L5 T1

GROUP 0
1 CPU_A10# CPU_D7# GFX_RX2N GFX_TX2N 1
H_A#11 H25 C26 H_D#8 L6 R1
H_A#12 CPU_A11# CPU_D8# H_D#9 GFX_RX2P GFX_TX2P

ADDR.
K28 CPU_A12# CPU_D9# B25
H_A#13 H29 B27 H_D#10 M4 U2
H_A#14 CPU_A13# CPU_D10# H_D#11 GFX_RX3N GFX_TX3N
J29 C25 M5 T2

6
6
H_A#15 CPU_A14# CPU_D11# H_D#12 GFX_RX3P GFX_TX3P
K24 CPU_A15# CPU_D12# A27
H_A#16 K25 C24 H_D#13 P4 V1
H_REQ#0 CPU_A16# CPU_D13# H_D#14 GFX_RX4N GFX_TX4N
F29 A24 N4 V2

0
H_REQ#1 CPU_REQ0# CPU_D14# H_D#15 GFX_RX4P GFX_TX4P
G25 CPU_REQ1# CPU_D15# B26
H_REQ#2 F26 C27 H_DINV#0 P5 W2
H_REQ#3 CPU_REQ2# CPU_DBI0# H_DSTBN#0 GFX_RX5N GFX_TX5N
F28 CPU_REQ3# CPU_DSTBN0# A28 P6 GFX_RX5P GFX_TX5P W1
H_REQ#4 H_DSTBP#0

RC410MD PCI EXPRESS I/F


E29 CPU_REQ4# CPU_DSTBP0# B28
(4) H_ADSTB#0 H27 CPU_ADSTB0# R4 GFX_RX6N GFX_TX6N AA2
R5 GFX_RX6P GFX_TX6P Y2

PCI EXPRESS
C19 H_D#16 T3 AB1
CPU_D16# H_D#17 GFX_RX7N GFX_TX7N
CPU_D17# C23 T4 GFX_RX7P GFX_TX7P AA1
H_A#17 M28 C20 H_D#18
H_A#18 CPU_A17# CPU_D18# H_D#19
K29 CPU_A18# CPU_D19# C22 U5 GFX_RX8N GFX_TX8N AC2
H_A#19 K30 B22 H_D#20 U6 AB2
H_A#20 CPU_A19# CPU_D20# H_D#21 GFX_RX8P GFX_TX8P

DATA GROUP
J26 CPU_A20# CPU_D21# B23
H_A#21 H_D#22

I/F
L28 C21 V4 AD1

GROUP 1
H_A#22 CPU_A21# CPU_D22# H_D#23 GFX_RX9N GFX_TX9N
L29 CPU_A22# CPU_D23# B24 V5 GFX_RX9P GFX_TX9P AD2
H_A#23 H_D#24
ADDR.
M30 CPU_A23# CPU_D24# E21
H_A#24 K27 B21 H_D#25 W3 AE2
H_A#25 CPU_A24# CPU_D25# H_D#26 GFX_RX10N GFX_TX10N
M29 CPU_A25# CPU_D26# B20 W4 GFX_RX10P GFX_TX10P AE1
H_A#26 K26 G19 H_D#27
H_A#27 CPU_A26# CPU_D27# H_D#28
N28 CPU_A27# CPU_D28# F21 Y5 GFX_RX11N GFX_TX11N AG2
H_A#28 L26 B19 H_D#29 Y6 AF2

1
H_A#29 CPU_A28# CPU_D29# H_D#30 GFX_RX11P GFX_TX11P
N25 CPU_A29# CPU_D30# E20
H_A#30
RC410MD CPU I/F H_D#31
L25 CPU_A30# CPU_D31# D21 AA4 GFX_RX12N GFX_TX12N AH1
H_A#31 N24 A21 H_DINV#1 AA5 AG1
2 CPU_A31# CPU_DBI1# H_DSTBN#1 GFX_RX12P GFX_TX12P 2
(4) H_ADSTB#1 L27 CPU_ADSTB1# CPU_DSTBN1# D22
E22 H_DSTBP#1 AB3 AJ2
CPU_DSTBP1# GFX_RX13N GFX_TX13N
AB4 GFX_RX13P GFX_TX13P AH2

AC5 GFX_RX14N GFX_TX14N AJ4


(4) H_ADS# F25 C18 H_D#32 AC6 AJ3
CPU_ADS# CPU_D32# H_D#33 GFX_RX14P GFX_TX14P
(4) H_BNR# F24 CPU_BNR# CPU_D33# F19
H_D#34
ATI recommendation R33, R34
(4) H_BPRI# E23 CPU_BPRI# CPU_D34# E19 AD4 GFX_RX15N GFX_TX15N AJ5
(4) H_DEFER# E25 A18 H_D#35 AD5 AK4
CPU_DEFER# CPU_D35# H_D#36 GFX_RX15P GFX_TX15P
G24 D19 Place R
CONTROL

(4) H_DRDY# CPU_DRDY# CPU_D36#


F23 B18 H_D#37 M1
(4) H_DBSY# CPU_DBSY# CPU_D37# H_D#38
Close to Ball GFX_CLKN
CPU_D38# C17 GFX_CLKP M2
(4) H_LOCK# E27 B17 H_D#39 10K_0402_1% 2 1 R43 PCE_RXISET 10 mils AJ12
DATA GROUP

CPU_LOCK# CPU_D39# PCE_ISET


CPU_D40# E17 H_D#40 8.25K_0402_1%2 1 R44 PCE_TXISET 10 mils AK13 PCE_TXISET
(4,13) H_RESET# C11 CPU_CPURSET# CPU_D41# B16 H_D#41 +1.2VS 82.5_0402_1% 2 1 R45 PCE_NCAL 10 mils AG12 PCE_NCAL
H_RS#2 D23 C15 H_D#42 150_0402_1% 2 1 R46 PCE_PCAL 10 mils AH12 AJ9 NB_A_TXN2 0.1U_0402_16V7K 2 1 C61 SB_A_RXN2
H_RS#1 CPU_RS2# CPU_D42# H_D#43 PCE_PCAL GPP_TX0N/SB_TX2N NB_A_TXP2 0.1U_0402_16V7K C62 SB_A_RXP2
G23 A15 AJ8 2 1

A-LINK EXPRESS
H_RS#0 CPU_RS1# CPU_D43# H_D#44 GPP_TX0P/SB_TX2P NB_A_TXN3 0.1U_0402_16V7K C63 SB_A_RXN3
E26 CPU_RS0# CPU_D44# B15 GPP_TX1N/SB_TX3N AF6 2 1
F16 H_D#45 SB_A_RXN0 C64 1 2 0.1U_0402_16V7K NB_A_TXN0 AJ11 AE6 NB_A_TXP3 0.1U_0402_16V7K 2 1 C65 SB_A_RXP3
CPU_D45# H_D#46 SB_A_RXP0 C66 0.1U_0402_16V7K NB_A_TXP0 SB_TX0N GPP_TX1P/SB_TX3P PCIE_WLAN_TX_N1
(4) H_TRDY# F22 CPU_TRDY# CPU_D46# G18 1 2 AJ10 SB_TX0P GPP_TX2N AK6
D26 F18 H_D#47 SB_A_RXN1 C67 1 2 0.1U_0402_16V7K NB_A_TXN1 AK10 AJ6 PCIE_WLAN_TX_P1
(4) H_HIT# CPU_HIT# CPU_D47# SB_TX1N GPP_TX2P
2

E24 C16 H_DINV#2 SB_A_RXP1 C68 1 2 0.1U_0402_16V7K NB_A_TXP1 AK9 AF4


(4) H_HITM# CPU_HITM# CPU_DBI2# H_DSTBN#2 SB_TX1P GPP_TX3N
CPU_DSTBN2# D18 GPP_TX3P AE4
E18 H_DSTBP#2 NB_A_RXN0 AG10 AG8 NB_A_RXN2
CPU_DSTBP2# NB_A_RXP0 SB_RX0N GPP_RX0N/SB_RX2N NB_A_RXP2
AG9 SB_RX0P GPP_RX0P/SB_RX2P AF8
NB_A_RXN1 AF10 AG7 NB_A_RXN3
+1.05VS NB_A_RXP1 SB_RX1N GPP_RX1N/SB_RX3N NB_A_RXP3

I/F
AE9 SB_RX1P GPP_RX1P/SB_RX3P AG6
E16 H_D#48 AJ7 PCIE_WLAN_C_RX_N1
CPU_D48# GPP_RX2N PCIE_WLAN_C_RX_N1 (25)
D16 H_D#49 AK7 PCIE_WLAN_C_RX_P1
CPU_D49# GPP_RX2P PCIE_WLAN_C_RX_P1 (25)
2 1 R47 HSCOMP D11 CPU_COMP_N CPU_D50# C14 H_D#50 (12) CLK_NB_ALINK# L2 SB_CLKN GPP_RX3N AH4
24.9_0402_1% B14 H_D#51 (12) CLK_NB_ALINK K2 AG4
CPU_D51# SB_CLKP GPP_RX3P
3 2 1 R48 HRCOMP B11 CPU_COMP_P CPU_D52# E15 H_D#52 3
D15 H_D#53
CPU_D53# H_D#54
49.9_0402_1% CPU_D54# C13
E14 H_D#55
CPU_D55# H_D#56 216CPP4AKA21HK_BGA707
CPU_D56# F13
+CPU_VREF H_D#57
MISC.

H22 CPU_VREF CPU_D57# B13


1 A12 H_D#58
GROUP 3

CPU_D58# H_D#59
CPU_D59# C12
C69 E12 H_D#60
CPU_D60#
DATA

220P_0402_50V7K D25 D13 H_D#61


2 RESERVED0 CPU_D61# H_D#62 SB_A_RXN[0..3]
E11 RESERVED1 CPU_D62# D12 SB_A_RXN[0..3] (13)
G22 B12 H_D#63 SB_A_RXP[0..3] PCIE_WLAN_TX_N1 C70 1 2 0.1U_0402_16V7K PCIE_WLAN_C_TX_N1
CPU_DPWR# CPU_D63# SB_A_RXP[0..3] (13) PCIE_WLAN_C_TX_N1 (25)
Place C close E13 H_DINV#3
CPU_DBI3# H_DSTBN#3 NB_A_RXN[0..3] PCIE_WLAN_TX_P1 C71
F15 NB_A_RXN[0..3] (13) 1 2 0.1U_0402_16V7K PCIE_WLAN_C_TX_P1
PCIE_WLAN_C_TX_P1 (25)
to Ball H22 CPU_DSTBN3#
G15 H_DSTBP#3 NB_A_RXP[0..3]
CPU_DSTBP3# NB_A_RXP[0..3] (13)

216CPP4AKA21HK_BGA707
+1.05VS To SB A-PCIE Link
(4) H_BR0#
1

CPU_VREF
R49
(4) H_DPWR# Trace=12Mil 49.9_0402_1%
Space=15Mil
+CPU_VREF
2
1
1U_0402_6.3V4Z

1
C72 R50
4 100_0402_1% 4

2
2

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RC410MD-FSB, PCIE,A-PCIE
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 7 of 43
A B C D E
A B C D E

U2B
DDR_DQ[0..63]
DDR_DQ[0..63] (10,11) DDR_SMA0 AK27 MEM_A0
DDR_DQS[0..7] DDR_SMA1 AJ27 U2D
DDR_DQS[0..7] (10,11) DDR_SMA2 MEM_A1
AH26 MEM_A2
DDR_DQS#[0..7] DDR_SMA3 AJ26 AJ16 DDR_DQ0 1 2 F9 B4 EMC_NB_TZOUT0-
DDR_DQS#[0..7] (10,11) MEM_A3 MEM_DQ0 Y TXOUT_U0N EMC_NB_TZOUT0- (18)
DDR_SMA4 AH25 AH16 DDR_DQ1 R262 75_0402_1% A4 EMC_NB_TZOUT0+
MEM_A4 MEM_DQ1 TXOUT_U0P EMC_NB_TZOUT0+ (18)
DDR_DM[0..7] DDR_SMA5 AJ25 AJ19 DDR_DQ2 1 2 D9 B5 EMC_NB_TZOUT1-
DDR_DM[0..7] (10,11) MEM_A5 MEM_DQ2 C TXOUT_U1N EMC_NB_TZOUT1- (18)
DDR_SMA6 AH24 AH19 DDR_DQ3 R263 75_0402_1% C6 EMC_NB_TZOUT1+

PART 2
MEM_A6 MEM_DQ3 TXOUT_U1P EMC_NB_TZOUT1+ (18)
DDR_SMA[0..17] DDR_SMA7 DDR_DQ4 EMC_NB_TZOUT2-

PART 4 OF
DDR_SMA[0..17] (10,11) AH23 MEM_A7 MEM_DQ4 AH15 1 2 E9 COMP TXOUT_U2N B6 EMC_NB_TZOUT2- (18)
DDR_SMA8 AJ24 AK16 DDR_DQ5 R264 75_0402_1% A6 EMC_NB_TZOUT2+

OF 6
MEM_A8 MEM_DQ5 TXOUT_U2P EMC_NB_TZOUT2+ (18)
DDR_SMA9 AJ23 AH18 DDR_DQ6 B7
DDR_SMA10 MEM_A9 MEM_DQ6 DDR_DQ7 TXOUT_U3N
AH27 MEM_A10 MEM_DQ7 AK19 (19) EMC_NB_CRT_R F10 RED TXOUT_U3P A7

ADDRESS
DDR_SMA11 AH22 AF13 DDR_DQ8 F7 EMC_NB_TZCLK-
MEM_A11 MEM_DQ8 TXCLK_UN EMC_NB_TZCLK- (18)
DDR_SMA12 AJ22 AF14 DDR_DQ9 E10 F8 EMC_NB_TZCLK+
1 MEM_A12 MEM_DQ9 (19) EMC_NB_CRT_G GREEN TXCLK_UP EMC_NB_TZCLK+ (18) 1

CRT &
DDR_SMA13 AF28 AE19 DDR_DQ10

6
TV I/F
DDR_SMA14 MEM_A13 MEM_DQ10 DDR_DQ11
AJ21 MEM_A14 MEM_DQ11 AF19 (19) EMC_NB_CRT_B D10 BLUE
DDR_SMA15 AG27 AE13 DDR_DQ12
DDR_SMA16 MEM_A15 MEM_DQ12 DDR_DQ13 EMC_NB_TXOUT0-
AJ28 MEM_A16 MEM_DQ13 AG13 TXOUT_L0N E5 EMC_NB_TXOUT0- (18)
DDR_SMA17 AH21 AF18 DDR_DQ14 C3 F5 EMC_NB_TXOUT0+

LVDS
MEM_A17 MEM_DQ14 (19) EMC_NB_CRT_HSYNC DACHSYNC TXOUT_L0P EMC_NB_TXOUT0+ (18)
AE17 DDR_DQ15 B3 D5 EMC_NB_TXOUT1-
MEM_DQ15 (19) EMC_NB_CRT_VSYNC DACVSYNC TXOUT_L1N EMC_NB_TXOUT1- (18)

RC410MD
AJ29 AF20 DDR_DQ16 C5 EMC_NB_TXOUT1+
(10,11) DDR_SRAS# MEM_RAS# MEM_DQ16 TXOUT_L1P EMC_NB_TXOUT1+ (18)
AG28 AF21 DDR_DQ17 E6 EMC_NB_TXOUT2-
(10,11) DDR_SCAS# MEM_CAS# MEM_DQ17 TXOUT_L2N EMC_NB_TXOUT2- (18)
AH30 AG23 DDR_DQ18 1 R51 2 RSET B10 D6 EMC_NB_TXOUT2+
(10,11) DDR_SWE# MEM_WE# MEM_DQ18 RSET TXOUT_L2P EMC_NB_TXOUT2+ (18)
AF24 DDR_DQ19 715_0402_1% 15mil E7
MEM_DQ19 DDR_DQ20 NB_DDC_CLK TXOUT_L3N
MEM_DQ20 AG19 (19) NB_DDC_CLK B2 DACSCL TXOUT_L3P E8
DDR_DQ21 NB_DDC_DATA EMC_NB_TXCLK-

RC410MD MEMORY I/F


MEM_DQ21 AG20 (19) NB_DDC_DATA C2 DACSDA TXCLK_LN G6 EMC_NB_TXCLK- (18)
+1.8V AC26 AG22 DDR_DQ22 F6 EMC_NB_TXCLK+
(10) EMC_DDR_CLK0# MEM_CK0N MEM_DQ22 TXCLK_LP EMC_NB_TXCLK+ (18)
AC25 AF23 DDR_DQ23 1C73
2
(10) EMC_DDR_CLK0 MEM_CK0P MEM_DQ23
AD25 DDR_DQ24 @ 15P_0402_50V8D
MEM_DQ24 DDR_DQ25 R52 2
(10) EMC_DDR_CLK1# AF16 MEM_CK1N MEM_DQ25 AG25 (12) EMC_CLK_NB_14M 1NB_14M G1 OSCIN LVDS_BLON G3 LVDS_ENBKL 1 R53 2 @ 4.7K_0402_5%
0.1U_0402_10V6K

AE16 AE27 DDR_DQ26 10_0402_5% E2 LVDS_ENVDD 1 2 @ 4.7K_0402_5%


(10) EMC_DDR_CLK1 MEM_CK1P MEM_DQ26 LVDS_DIGON
1K_0402_1%

AD27 DDR_DQ27 F2 R54


MEM_DQ27 LVDS_BLEN
1

1 V29 AE23 DDR_DQ28


R55 MEM_CK2N MEM_DQ28 DDR_DQ29
V30 MEM_CK2P MEM_DQ29 AD24 F1 OSCOUT
AE26 DDR_DQ30

GEN.
MEM_DQ30

CLK.
C74 AC24 AD26 DDR_DQ31 1 2 G2
(11) EMC_DDR_CLK3# MEM_CK3N MEM_DQ31 10K_0402_5% TVCLKIN

CLK
2 DDR_DQ32 R56 NB_RST#
(11) EMC_DDR_CLK3 AC23 MEM_CK3P MEM_DQ32 AA25 SYSRESET# A3 NB_RST# (13)
+DDR_VREF DDR_DQ33 SUS_STAT#
2

MEM_DQ33 Y26 (12) EMC_CLK_NB_BCLK J1 CPU_CLKP SUS_STAT# AH14


AG17 W24 DDR_DQ34 K1 CPU_CLKN E3 NB_PWRGD
(11) EMC_DDR_CLK4# MEM_CK4N MEM_DQ34 (12) EMC_CLK_NB_BCLK# POWERGOOD NB_PWRGD (15)
1

0.1U_0402_10V6K

1 AF17 U25 DDR_DQ35


(11) EMC_DDR_CLK4 MEM_CK4P MEM_DQ35
1K_0402_1%

R57 AA26 DDR_DQ36


MEM_DQ36 DDR_DQ37 NB_EDID_CLK BM_REQ#
W29 MEM_CK5N MEM_DQ37 Y25 (18) NB_EDID_CLK D2 I2C_CLK BMREQ# H2 BM_REQ# (13)
C75 W28 V26 DDR_DQ38 NB_EDID_DATA C1
2 MEM_CK5P MEM_DQ38 (18) NB_EDID_DATA I2C_DATA
AH20 W25 DDR_DQ39 NB_DVI_DDCDATA H3
(10) DDR_SCKE0 MEM_CKE0 MEM_DQ39 DDC_DATA
DDR_DQ40 STRP_DATA
2

DATA
(10) DDR_SCKE1 AJ20 MEM_CKE1 MEM_DQ40 AC28 D1 STRP_DATA
2 DDR_DQ41 TESTMODE 2
(10,11) DDR_SCKE2 AE24 MEM_CKE2 MEM_DQ41 AC29 C4 TESTMODE TMDS_HPD J2
AE21 AA29 DDR_DQ42 AH13
(10,11) DDR_SCKE3 MEM_CKE3 MEM_DQ42 THERMALDIODE_P

1.8K_0402_5%
Y29 DDR_DQ43 AJ13
MEM_DQ43 THERMALDIODE_N

1
DDR_SCS#0 AH29 AD30 DDR_DQ44 R58
DDR_SCS#0 (10) MEM_CS#0 MEM_DQ44
DDR_SCS#1 AG29 AD29 DDR_DQ45 R59
DDR_SCS#1 (10) MEM_CS#1 MEM_DQ45
DDR_SCS#2 AH28 AA30 DDR_DQ46 216CPP4AKA21HK_BGA707
DDR_SCS#2 (10,11) MEM_CS#2 MEM_DQ46
DDR_SCS#3 AF29 Y28 DDR_DQ47 10K_0402_5%
DDR_SCS#3 (10,11) MEM_CS#3 MEM_DQ47
DDR_ODT0 DDR_DQ48

1
DDR_ODT0 (10) AG30 MEM_ODT0 MEM_DQ48 U27
DDR_ODT1 DDR_DQ49

2
DDR_ODT1 (10,11) AE28 MEM_ODT1 MISC MEM_DQ49 T27
DDR_ODT2 AC30 N26 DDR_DQ50
DDR_ODT2 (10) MEM_ODT2/RSV2 MEM_DQ50
DDR_ODT3 Y30 M27 DDR_DQ51
DDR_ODT3 (10,11) MEM_ODT3/RSV3 MEM_DQ51 +1.8V
+1.8V R60 1 2 1K_0402_5% AD28 U26 DDR_DQ52 Low: Normal Mode(Fixed)
MEM_VMODE MEM_DQ52
MEM_CAP1 10mil AJ14 T26 DDR_DQ53
MEM_VMODE: 1.8V: DDR2 MEM_CAP2 10mil N30
MEM_CAP1
MEM_CAP2
MEM_DQ53
MEM_DQ54 P27 DDR_DQ54 High: Test Mode 2006/03/31

2
MEM_COMPP 10mil AJ15 MEM_COMPP MEM_DQ55 P26 DDR_DQ55
MEM_COMPN 10mil AE29 MEM_COMPN MEM_DQ56 U29 DDR_DQ56 R61
+DDR_VREF 20mil AB27 MEM_VREF MEM_DQ57 T29 DDR_DQ57 220K_0402_1%
P29 DDR_DQ58
+1.8V MEM_DQ58 D1
DDR_DQS#0 AH17 N29 DDR_DQ59
DDR_DQS0 MEM_DQS0N MEM_DQ59 DDR_DQ60 SUS_STAT#

1
AJ18 MEM_DQS0P MEM_DQ60 U28 2 1 NB_SUS_STAT# (14,29)
61.9_0603_1%

R62 T28 DDR_DQ61


MEM_DQ61
1

DDR_DQS#1 AF15 P28 DDR_DQ62


DDR_DQS1 MEM_DQS1N MEM_DQ62 DDR_DQ63 4.7K_0402_5% CH751H-40_SC76
AE14 MEM_DQS1P MEM_DQ63 N27 D2
1 R63 2 NB_EDID_CLK
DDR_DQS#2 AE22 2 1 NB_RST#
DDR_DQS2 MEM_DQS2N 4.7K_0402_5%
AF22 MEM_DQS2P
MEM_COMPN 1 R64 NB_EDID_DATA
2

+3VS 2 CH751H-40_SC76
MEM_COMPP DDR_DQS#3 AF26
MEM_CAP1 DDR_DQS3 MEM_DQS3N 4.7K_0402_5%
DATA

AE25 MEM_DQS3P
0.47U_0603_16V4Z

MEM_CAP2 AJ17 DDR_DM0 1 R65 2 NB_DVI_DDCDATA 1 R66 2


MEM_DM0
0.47U_0603_16V4Z
61.9_0603_1%

R67 DDR_DQS#4 W26 AG15 DDR_DM1 4.7K_0402_5%


MEM_DQS4N MEM_DM1
1

3 1 1 DDR_DQS4 W27 AE20 DDR_DM2 3


MEM_DQS4P MEM_DM2 DDR_DM3 @
MEM_DM3 AF25
2005/12/21
C76

C77

DDR_DQS#5 AB30 Y27 DDR_DM4


DDR_DQS5 MEM_DQS5N MEM_DM4 DDR_DM5
AB29 MEM_DQS5P MEM_DM5 AB28
@ 2 @ 2 DDR_DM6
MEM_DM6 R26
DDR_DQS#6 DDR_DM7
2

R25 MEM_DQS6N MEM_DM7 R28


DDR_DQS6 P25 MEM_DQS6P +3VALW
DDR_DQS#7 R30
DDR_DQS7 MEM_DQS7N
Place these R and C R29 MEM_DQS7P

14
close to relative Ball. U3A
216CPP4AKA21HK_BGA707 LVDS_ENBKL 1

P
A
O 3 ENBKL (28)
2
NB STRAPING PINS B

G
SN74LVC08APW_TSSOP14
FSB SPEED BM_REQ# EMC_NB_CRT_HSYNC EMC_NB_CRT_VSYNC 4.7K_0402_5%

7
STRP_DATA R68 1 2 +3VS STRP_DATA: DEBUG STRAP
166MHZ 4.7K_0402_5%
0 1 1 R69 1 2
DEFAULT: 1
133MHZ 0: MEMORY CHANNEL STRAPING NB_PWRGD
0 0 1 @ 1: EEPROM STRAPING
@ +3VALW
R70 1 2 4.7K_0402_5% +3VS
2005/12/21

14
BM_REQ# R71 1 2 4.7K_0402_5% NB_DDC_CLK NB_DDC_CLK: CPU VCC SEL U3B
4

P
DEFAULT: 1 1: DESKTOP CPU 0: MOBILE CPU A
1

C 6
+3VS +1.05VS O NB_ENVDD (18)
Q4 2 1 2 LVDS_ENVDD 5
SB_PWRGD# (15) B

G
4 B R72 4
EMC_NB_CRT_VSYNC R73 1 2 4.7K_0402_5% 2SC2411K_SC59 E 2K_0402_1% SN74LVC08APW_TSSOP14
1

7
4.7K_0402_5%
1

R74
EMC_NB_CRT_HSYNC R76 1 4.7K_0402_5%
2
21

4.7K_0402_5% C R75
Q5
Security Classification Compal Secret Data Compal Electronics, Inc.
2 2 1 R77 +1.05VS
B 4.7K_0402_5% 2005/11/01 2006/11/30 Title
2

Issued Date Deciphered Date


RC410MD-DDR/DISP/MISC
2SC2411K_SC59 E
3

CPU_BSEL1 (5,12) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 8 of 43
A B C D E
A B C D E

+1.2VS
1 2 1 2 10U_0805_10V4Z +1.8V
C78 10U_0805_10V4Z C133 1 2 10U_0805_10V4Z
1 2 C135 1 2 1U_0402_6.3V4Z 1 2 1 2
C79 10U_0805_10V4Z C137 1 2 1U_0402_6.3V4Z C80 0.1U_0402_16V4Z C81 10U_0805_10V4Z U2F
1 2 C155 1 2 1U_0402_6.3V4Z 1 2 1 2
C82 1U_0402_6.3V4Z C158 1 2 1U_0402_6.3V4Z C83 0.1U_0402_16V4Z C84 10U_0805_10V4Z R13
C159 VSS
1 2 1 2 1 2 A13 VSS VSS R15
C85 1U_0402_6.3V4Z C86 0.1U_0402_16V4Z C87 10U_0805_10V4Z

+
1 2 A16 R17

C88
1 2
1U_0402_6.3V4Z
C160 470U_D2_2.5VM 2006/01/23 +1.8V C89
1 2
10U_0805_10V4Z
A19
VSS
VSS
VSS
VSS R19
A2 VSS VSS R23
1 2 +1.2VS U2E 1 2 A22 R24
2A VSS VSS

PART 6 OF
C90 1U_0402_6.3V4Z AB23 C91 1U_0402_6.3V4Z A25 R27
5A VDDR_MEM VSS VSS
1 2 M13 VDD_CORE VDDR_MEM AB24 1 2 A29 VSS VSS T12
C92 1U_0402_6.3V4Z M15 AC13 C93 1U_0402_6.3V4Z A9 T14
1 VDD_CORE VDDR_MEM VSS VSS 1
1 2 M17 VDD_CORE VDDR_MEM AC16 1 2 AA23 VSS VSS T16
C94 1U_0402_6.3V4Z M19 AC19 C95 1U_0402_6.3V4Z AA24 T18
VDD_CORE VDDR_MEM VSS VSS
1 2 N12 VDD_CORE VDDR_MEM AC21 1 2 AA28 VSS VSS T30
C96 1U_0402_6.3V4Z N14 AC22 C97 1U_0402_6.3V4Z AC11 U13

6
VDD_CORE VDDR_MEM VSS VSS
1 2 N16 VDD_CORE VDDR_MEM AD13 1 2 AC12 VSS VSS U15
C98 1U_0402_6.3V4Z N18 AD16 C99 1U_0402_6.3V4Z AC14 U17
VDD_CORE VDDR_MEM VSS VSS

PART 5
1 2 P13 VDD_CORE VDDR_MEM AD19 1 2 AC15 VSS VSS U19

MEM I/F PWR


C100 1U_0402_6.3V4Z P15 AD21 C101 1U_0402_6.3V4Z AC17 U23
VDD_CORE VDDR_MEM VSS VSS

OF 6
1 2 P17 VDD_CORE VDDR_MEM AD22 1 2 AC18 VSS VSS U24
C102 1U_0402_6.3V4Z P19 AD23 C103 1U_0402_6.3V4Z AC20 V12
VDD_CORE VDDR_MEM VSS VSS

CORE
1 2 R12 AK21 1 2 AC27 V14

PWR
C104 1U_0402_6.3V4Z VDD_CORE VDDR_MEM C105 1U_0402_6.3V4Z VSS VSS
R14 VDD_CORE VDDR_MEM AK24 AD11 VSS VSS V16
1 2 R16 VDD_CORE VDDR_MEM AK28 1 2 AD12 VSS VSS V18
C106 1U_0402_6.3V4Z R18 T23 C107 1U_0402_6.3V4Z AD14 V27
VDD_CORE VDDR_MEM VSS VSS
1 2 T13 VDD_CORE VDDR_MEM T24 1 2 AD15 VSS VSS V28
C108 1U_0402_6.3V4Z T15 V23 C109 1U_0402_6.3V4Z AD17 W13
VDD_CORE VDDR_MEM VSS VSS
1 2 T17 VDD_CORE VDDR_MEM V24 1 2 AD18 VSS VSS W15
C110 1U_0402_6.3V4Z T19 Y23 C111 1U_0402_6.3V4Z AD20 W17
VDD_CORE VDDR_MEM VSS VSS
1 2 U12 VDD_CORE VDDR_MEM Y24 1 2 AE30 VSS VSS W19
C112 1U_0402_6.3V4Z U14 C113 1U_0402_6.3V4Z AF12 W23
VDD_CORE VSS VSS

RC410MD GOUND
U16 VDD_CORE 1 2 AF27 VSS VSS W30
U18 0.1A L1 C114 1U_0402_6.3V4Z AG14
VDD_CORE RC_VDD_18 VSS
V13 VDD_CORE VDD_18 AB22 1 2 +1.8VS 1 2 AG16 VSS
+1.05VS V15 AB9 CHB1608U301_0603 C115 1U_0402_6.3V4Z AG18 AA3
VDD_CORE VDD_18 VSS VSSA

RC410MD POWER
V17 VDD_CORE VDD_18 J22 1 2 1 2 AG21 VSS VSSA AA7
1 2 V19 J9 C116 1U_0402_6.3V4Z C117 1U_0402_6.3V4Z AG24 AA8
C118 10U_0805_10V4Z VDD_CORE VDD_18 VSS VSSA
W12 VDD_CORE 1 2 AG26 VSS VSSA AB5
1 2 W14 AB7 C119 1U_0402_6.3V4Z AH11 AB6
C120 10U_0805_10V4Z VDD_CORE VDDA_12 VSS VSSA
W16 VDD_CORE VDDA_12 AC7 1 2 AJ1 VSS VSSA AC3
1 2 W18 AC8 C121 1U_0402_6.3V4Z AJ30 AD3
C122 1U_0402_6.3V4Z VDD_CORE VDDA_12 VSS VSSA
VDDA_12 AD9 1 2 AK12 VSS VSSA AD7
2 C123 1U_0402_6.3V4Z 2
1 2 VDDA_12 H4 AK15 VSS VSSA AD8
C124 1U_0402_6.3V4Z +1.05VS H5 1 2 AK18 AE8
VDDA_12 C125 10U_0805_10V4Z VSS VSSA
1 2 5A VDDA_12 J6 AK2 VSS VSSA AF3
C127 1U_0402_6.3V4Z A10 K6 1 2 +1.2VS AK22 AF5
VDD_CPU VDDA_12 C128 10U_0805_10V4Z VSS VSSA
1 2 F11 VDD_CPU VDDA_12 L7 AK25 VSS VSSA AF7
C130 1U_0402_6.3V4Z F12 L8 2.25A AK29 AF9
VDD_CPU VDDA_12 RC_VDDA_12 VSS VSSA
1 2 F17 VDD_CPU VDDA_12 M7 1 2 B1 VSS VSSA AG5
C132 1U_0402_6.3V4Z G11 M8 L50 CHB2012U170_0805 B30 AH10
VDD_CPU VDDA_12 VSS VSSA
1 2 G12 VDD_CPU VDDA_12 P7 1 2 D14 VSS VSSA AH3
C134 1U_0402_6.3V4Z G13 P8 L51 CHB2012U170_0805 D17 AH5
VDD_CPU VDDA_12 L2 VSS VSSA
1 2 G14 VDD_CPU VDDA_12 T7 D20 VSS VSSA AH6
C136 1U_0402_6.3V4Z G16 T8 RC_VDDA_18 1 2 +1.8VS C126 1 2 10U_0805_10V4Z D24 AH7
VDD_CPU VDDA_12 CHB1608U301_0603 C129 10U_0805_10V4Z VSS VSSA
1 2 G17 VDD_CPU VDDA_12 W7 1 2 D27 VSS VSSA AH8
C138 1U_0402_6.3V4Z G20 W8 C131 1 2 10U_0805_10V4Z D3 AH9
VDD_CPU VDDA_12 VSS VSSA
CPU I/F

H11 1 2 C139 1 2 1U_0402_6.3V4Z D4 K5


VDD_CPU 0.75A C140 0.1U_0402_16V4Z C141 1U_0402_6.3V4Z VSS VSSA
H12 1 2 F27 L3
PWR

VDD_CPU C143 1U_0402_6.3V4Z VSS VSSA


H13 VDD_CPU VDDA_18 AB8 1 2 1 2 F3 VSS VSSA M3
H14 AC10 C142 1U_0402_6.3V4Z C146 1 2 1U_0402_6.3V4Z F30 N5
VDD_CPU VDDA_18 C149 1U_0402_6.3V4Z VSS VSSA
1 2 H16 VDD_CPU VDDA_18 AC9 1 2 1 2 F4 VSS VSSA N6
C144 1U_0402_6.3V4Z H17 AD10 C145 1U_0402_6.3V4Z C152 1 2 1U_0402_6.3V4Z G10 N7
VDD_CPU VDDA_18 VSS VSSA
1 2 H19 VDD_CPU VDDA_18 AE11 1 2 H15 VSS VSSA N8
C147 1U_0402_6.3V4Z H23 AF11 C148 1U_0402_6.3V4Z H18 P3
VDD_CPU VDDA_18 VSS VSSA

+
1 2 H24 VDD_CPU VDDA_18 AG11 1 2 1 2 J23 VSS VSSA R3
C150 1U_0402_6.3V4Z L23 U7 C151 1U_0402_6.3V4Z C161 470U_D2_2.5VM J24 R7
VDD_CPU VDDA_18 VSS VSSA
1 2 L24 VDD_CPU VDDA_18 U8 1 2 J27 VSS VSSA R8
C153 1U_0402_6.3V4Z N23 Y7 C154 1U_0402_6.3V4Z J3 T5
VDD_CPU VDDA_18 VSS VSSA
1 2 P23 VDD_CPU VDDA_18 Y8 1 2 J30 VSS VSSA T6
C156 1U_0402_6.3V4Z P24 C157 10U_0805_10V4Z K23 U3
VDD_CPU
G4
0.1A K8
VSS VSSA
V3
VDDR3 +VDDQ VSS VSSA
G5 20mils M12 V7
VDDR3 VSS VSSA
+AVDD C9 AVDD LPVDD J8 +LPVDD M14 VSS VSSA V8
3 C7 20mils M16 W5 3
+1.8VS +AVDDQ LVDDR18D ATI recommend separate pure power VSS VSSA
B8 AVDDQ LVDDR18A H7 M18 VSS VSSA W6
L3 D8 H8 M23 Y3
1 2
CHB1608U301_0603 1
+AVDDDI AVDDDI LVDDR18A
PLLVDD H10 +PLLVDD 20mils 2006/01/23 M24
VSS
VSS
VSSA
1 2 +CPVDD H21 CPVDD M26 VSS
C162 C163 C164+MPVDD AB26 N13 C10
MPVDD VSS AVSSN
1U_0402_6.3V4Z

N15 VSS AVSSQ B9


1U_0402_6.3V4Z
0.1U_0402_16V4Z

N17 VSS AVSSDI C8


2 2 1 216CPP4AKA21HK_BGA707 N19 VSS LPVSS J7
P12 VSS LVSSR G7
+VDDQ +3VS P14 G8
ATI recommend 2.2uF +AVDD +3VS 0.1U_0402_16V4Z L4 VSS LVSSR
P16 VSS LVSSR G9
L5 1 2 P18 H9
CHB2012U170_0805 VSS PLLVSS
1 1 2 1 1 1 CPVSS H20
+1.8VS +AVDDDI CHB2012U170_0805 C166 AA27
1 1 1 MPVSS
L6 + C165 C169 C171 C167 C168
1 2 C170 10U_0805_10V4Z 0.1U_0402_16V4Z 216CPP4AKA21HK_BGA707
CHB1608U301_0603 1 22U_1206_6.3V6M 0.1U_0402_16V4Z 1U_0402_6.3V4Z 2 2 2
1 2 2 2 2 2
C172 C173 C174 +1.8VS
Place L close to Ball AB26
1U_0402_6.3V4Z

1U_0402_6.3V4Z
0.1U_0402_16V4Z

220U_D2_4VM
2 2 1 Place C between Ball AB26,AA27
H=1.9mm +MPVDD +1.8VS
+PLLVDD
L7 L8
1 2 1 2
+CPVDD +1.8VS CHB1608U301_0603 CHB1608U301_0603 1
1 1 1 1 1 1
C175 C176 C178 C179 C180 C181
C177
10U_0805_10V4Z

L9
1U_0402_6.3V4Z

1 2 0.1U_0402_16V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 10U_0805_10V4Z 10U_0805_10V4Z


+LPVDD 2 2 2 2 2 2 2
1U_0402_6.3V4Z

1 1 1 CHB1608U301_0603 1
4 C186 C187 C188 L10 C183 C185 4
1 2 C184 10U_0805_10V4Z
+1.8VS +1.8VS
1 1 1 1 1 CHB2012U170_0805 0.1U_0402_16V4Z
C189 C190 2 2 2 2 1U_0402_6.3V4Z
1
10U_0805_10V4Z
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1U_0402_6.3V4Z C182
2 2 2 2 2 + C191
470U_D2_2.5VM
Security Classification Compal Secret Data Compal Electronics, Inc.
2 2005/11/01 2006/11/30 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RC410MB PWR/GND
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 9 of 43
A B C D E
A B C D E F G H

DDR_DQ[0..63]
DDR_DQ[0..63] (8,11)
+1.8V DDR_DQS[0..7]
+1.8V +DDR_VREF1 +1.8V DDR_DQS[0..7] (8,11)
Layout Note: DDR_DQS#[0..7]
DDR_DQS#[0..7] (8,11)
Place near JDIM1 Trace=20mil
DDR_DM[0..7]
JP1 DDR_DM[0..7] (8,11)

1
2 1 2 DDR_SMA[0..17]
R78 VREF VSS DDR_DQ15 DDR_SMA[0..17] (8,11)
3 VSS DQ4 4
1K_0402_1% C192 DDR_DQ8 5 6 DDR_DQ12
DDR_DQ10 DQ0 DQ5
0.1U_0402_16V4Z 7 DQ1 VSS 8
1 DDR_DM1
9 VSS DM0 10
+1.8V +DDR_VREF1 DDR_DQS#1

2
11 DQS0# VSS 12
DDR_DQS1 13 14 DDR_DQ9
1 DQS0 DQ6 1

C193
15 16 DDR_DQ13
VSS DQ7

1
1 DDR_DQ14 17 18
R79 DDR_DQ11 DQ2 VSS DDR_DQ1
19 DQ3 DQ12 20
1K_0402_1% 21 22 DDR_DQ4
VSS DQ13
C195

C196

C197

C198

C199

C200

C201

C202

C203

C204

C205

C206

0.1U_0402_16V4Z
1 DDR_DQ0 23 24
2 DDR_DQ5 DQ8 VSS DDR_DM0
1 1 1 1 1 1 1 1 1 1 1 1 25 DQ9 DM1 26
+

2
27 VSS VSS 28
C194 DDR_DQS#0 29 30 EMC_DDR_CLK1
DQS1# CK0 EMC_DDR_CLK1 (8)
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
470U_D2_2.5VM DDR_DQS0 31 32 EMC_DDR_CLK1#
2 2 2 2 2 2 2 2 2 2 2 2 2 DQS1 CK0# EMC_DDR_CLK1# (8)
33 VSS VSS 34
DDR_DQ7 35 36 DDR_DQ3
DDR_DQ2 DQ10 DQ14 DDR_DQ6
37 DQ11 DQ15 38
39 VSS VSS 40

41 VSS VSS 42
DDR_DQ16 43 44 DDR_DQ17
DDR_DQ20 DQ16 DQ20 DDR_DQ21
45 DQ17 DQ21 46
47 VSS VSS 48
DDR_DQS#2 49 50
DDR_DQS2 DQS2# NC DDR_DM2
Layout Note: 51 DQS2 DM2 52
53 VSS VSS 54
Place one cap close to every 2 pullup DDR_DQ23 55 56 DDR_DQ19
DDR_DQ22 DQ18 DQ22 DDR_DQ18
resistors terminated to V_DDR_MCH_REF 57 DQ19 DQ23 58
59 VSS VSS 60
DDR_DQ25 61 62 DDR_DQ29
DDR_DQ28 DQ24 DQ28 DDR_DQ24
63 DQ25 DQ29 64
65 VSS VSS 66
DDR_DM3 67 68 DDR_DQS#3
DM3 DQS3# DDR_DQS3
69 NC DQS3 70
71 VSS VSS 72
+0.9VS DDR_DQ31 73 74 DDR_DQ26
DDR_DQ30 DQ26 DQ30 DDR_DQ27
75 DQ27 DQ31 76
2 77 VSS VSS 78 2
DDR_SCKE0 79 80 DDR_SCKE1 DDR_SCKE1 (8)
(8) DDR_SCKE0 CKE0 NC/CKE1
81 VDD VDD 82
83 NC NC/A15 84
C207

C208

C209

C210

C211

C212

C213

C214

C215

C216

C217

C218

C219

C220

C221

C222

C223

C224
DDR_SMA17 85 86 DDR_SMA14
BA2 NC/A14
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 87 VDD VDD 88
DDR_SMA12 89 90 DDR_SMA11
DDR_SMA9 A12 A11 DDR_SMA7
91 A9 A7 92
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

22U_1206_6.3V6M

22U_1206_6.3V6M
DDR_SMA8 93 94 DDR_SMA6
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 A8 A6
95 VDD VDD 96
DDR_SMA5 97 98 DDR_SMA4
DDR_SMA3 A5 A4 DDR_SMA2
99 A3 A2 100
DDR_SMA1 101 102 DDR_SMA0
A1 A0
103 VDD VDD 104
DDR_SMA10 105 106 DDR_SMA16
DDR_SMA15 A10/AP BA1 DDR_SRAS#
107 BA0 RAS# 108 DDR_SRAS# (8,11)
DDR_SWE# 109 110 DDR_SCS#0 DDR_SCS#0 (8)
(8,11) DDR_SWE# WE# S0#
111 VDD VDD 112
(8,11) DDR_SCAS# DDR_SCAS# 113 114 DDR_ODT0 DDR_ODT0 (8)
DDR_SCS#1 CAS# ODT0 DDR_SMA13
115 116
Layout Note: 2006/01/23 (8) DDR_SCS#1
DDR_ODT2
117
NC/S1#
VDD
NC/A13
VDD 118
Every four parallel termination resistors with two caps, (8) DDR_ODT2 119 NC/ODT1 NC 120
121 VSS VSS 122
one is connected to ground, the other one is connected +0.9VS +1.8V DDR_DQ36 123 124 DDR_DQ37
DDR_DQ32 DQ32 DQ36 DDR_DQ33
between +1.8V and +0.9VS. Need to place each parallel 125 DQ33 DQ37 126
127 VSS VSS 128
resistor with one cap to GND and one cap between 1 2 DDR_DQS#4 129 130 DDR_DM4
DQS4# DM4
+1.8V and +0.9VS C225 @ 0.01U_0402_16V7K DDR_DQS4 131 DQS4 VSS 132
1 2 133 134 DDR_DQ35
C226 @ 0.01U_0402_16V7K DDR_DQ39 VSS DQ38 DDR_DQ38
135 DQ34 DQ39 136
DDR_DQ34 137 138
RP29 56_0404_4P2 R_5% 56_0402_5% DQ35 VSS DDR_DQ44
139 VSS DQ44 140
DDR_SMA14 1 4 1 R495 2 DDR_SCKE2 DDR_DQ41 141 142 DDR_DQ40
DDR_SCKE2 (8,11) DQ40 DQ45
DDR_SMA11 2 3 DDR_DQ45 143 144
56_0402_5% DQ41 VSS
3 1 4 DDR_SMA6 145 VSS DQS5# 146 DDR_DQS#5 3
DDR_SCKE3 1 R496 2 2 3 DDR_SMA7 DDR_DM5 147 148 DDR_DQS5
(8,11) DDR_SCKE3 DM5 DQS5
56_0404_4P2 R_5% 149 150
RP30 DDR_DQ42 VSS VSS DDR_DQ47
151 DQ42 DQ46 152
DDR_DQ46 153 154 DDR_DQ43
DQ43 DQ47
1 2 155 VSS VSS 156
C227 @ 0.01U_0402_16V7K DDR_DQ53 157 158 DDR_DQ49
DDR_DQ48 DQ48 DQ52 DDR_DQ52
1 2 159 DQ49 DQ53 160
C228 @ 0.01U_0402_16V7K 161 162
VSS VSS EMC_DDR_CLK0
163 NC,TEST CK1 164 EMC_DDR_CLK0 (8)
RP31 56_0404_4P2R _5% RP32 56_0404_4P2 R_5% 165 166 EMC_DDR_CLK0#
VSS CK1# EMC_DDR_CLK0# (8)
DDR_SMA5 1 4 1 4 DDR_SMA9 DDR_DQS#6 167 168
DDR_SMA2 DQS6# VSS
2 3 2 3 DDR_SMA8 DDR_DQS6 169 DQS6 DM6 170 DDR_DM6
171 VSS VSS 172
DDR_SMA12 1 4 4 DDR_SRAS# 1 DDR_DQ50 173 174 DDR_DQ54
DDR_SMA17 DQ50 DQ54
2 3 3 DDR_SMA4 2 DDR_DQ55 175 DQ51 DQ55 176 DDR_DQ51
56_0404_4P2 R_5% 56_0404_4P2 R_5% 177 178
RP33 RP34 DDR_DQ60 VSS VSS DDR_DQ56
1 2 179 DQ56 DQ60 180
C229 @ 0.01U_0402_16V7K DDR_DQ57 181 182 DDR_DQ61
DQ57 DQ61
1 2 183 VSS VSS 184
C230 @ 0.01U_0402_16V7K DDR_DM7 185 186 DDR_DQS#7
56_0404_4P2R _5% DM7 DQS7# DDR_DQS7
187 VSS DQS7 188
RP35 RP36 56_0404_4P2 R_5% DDR_DQ58 189 190
DDR_SWE# DQ58 VSS
1 4 1 4 DDR_SMA0 DDR_DQ62 191 DQ59 DQ62 192 DDR_DQ63
DDR_SMA3 2 3 2 3 DDR_SMA1 193 194 DDR_DQ59
VSS DQ63
(11,12,14,25) SB_SMDATA 195 SDA VSS 196
DDR_SMA10 1 4 1 4 DDR_SCS#2 (11,12,14,25) SB_SMCLK 197 198
DDR_SCS#2 (8,11) SCL SAO
DDR_SMA16 2 3 2 3 DDR_SMA15 +3VS 199 200 +3VS
RP37 56_0404_4P2 R_5% 56_0404_4P2 R_5% VDDSPD SA1
C233

10U_0805_10V6K

1 2 RP38
C231 @ 0.01U_0402_16V7K 1 1 P-TWO_A56 92B-A0G16-P
C234

1 2
C232 @ 0.01U_0402_16V7K
0.1U_0402_16V4Z

RP39
4
DDR_SCS#3 1
56_0404_4P2R _5%
4 1
RP40 56_0404_4P2R _5%
4 DDR_SCAS#
2 2 DIMMA 4

(8,11) DDR_SCS#3
DDR_SMA13 2 3 2 3 DDR_ODT2 Reverse H9.2
1 4 DDR_ODT3
DDR_ODT1
DDR_ODT3 (8,11) 2006/03/27
2 3 DDR_ODT1 (8,11)
56_0404_4P2 R_5%
RP41
2005/12/26 56_0402_5% 1 2 Security Classification Compal Secret Data
DDR_SCKE0 1 R491 2 C235 @ 0.01U_0402_16V7K
56_0402_5% Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title
DDR_SCKE1 1 R492 2
56_0402_5% THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRII-SODIMM2
DDR_SCS#0 1 R493 2 R80 Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
56_0402_5% 1 2 DDR_ODT0 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
DDR_SCS#1 1 R494 2 56_0402_5% MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 10 of 43
A B C D E F G H

Compal Electronics, Inc.


A B C D E

+1.8V +1.8V Layout Note:


+DDR_VREF2 Place near JDIM1
Trace=20mil
JP2
1 2 +1.8V
VREF VSS DDR_DQ15
3 VSS DQ4 4
DDR_DQ8 5 6 DDR_DQ12
DQ0 DQ5

C237

C238

C239

C240

C241

C242

C243

C244

C245

C246

C247

C248

C249
DDR_DQ[0..63] DDR_DQ10 7 8
(8,10) DDR_DQ[0..63] DQ1 VSS DDR_DM1
9 VSS DM0 10 1
DDR_DQS[0..7] DDR_DQS#1 11 12 1 1 1 1 1 1 1 1 1 1 1 1 1
(8,10) DDR_DQS[0..7] DDR_DQS1 DQS0# VSS DDR_DQ9 +
1 13 DQS0 DQ6 14 1
DDR_DQS#[0..7] 15 16 DDR_DQ13 C236
(8,10) DDR_DQS#[0..7] DDR_DQ14 VSS DQ7 470U_D2_2.5VM
17 DQ2 VSS 18
DDR_DM[0..7] DDR_DQ11 DDR_DQ1 2 2 2 2 2 2 2 2 2 2 2 2 2 2
(8,10) DDR_DM[0..7] 19 DQ3 DQ12 20

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
21 22 DDR_DQ4
DDR_SMA[0..17] DDR_DQ0 VSS DQ13
(8,10) DDR_SMA[0..17] 23 DQ8 VSS 24
DDR_DQ5 25 26 DDR_DM0
DQ9 DM1
27 VSS VSS 28
DDR_DQS#0 29 30 EMC_DDR_CLK4
DQS1# CK0 EMC_DDR_CLK4 (8)
DDR_DQS0 31 32 EMC_DDR_CLK4#
DQS1 CK0# EMC_DDR_CLK4# (8)
33 VSS VSS 34
DDR_DQ7 35 36 DDR_DQ3
DDR_DQ2 DQ10 DQ14 DDR_DQ6
37 DQ11 DQ15 38
39 VSS VSS 40

41 VSS VSS 42
DDR_DQ16 43 44 DDR_DQ17
DDR_DQ20 DQ16 DQ20 DDR_DQ21
45 DQ17 DQ21 46
47 VSS VSS 48
DDR_DQS#2 49 50
DDR_DQS2 DQS2# NC DDR_DM2
51 DQS2 DM2 52
53 54 +1.8V
DDR_DQ23 VSS VSS DDR_DQ19
55 DQ18 DQ22 56
DDR_DQ22 57 58 DDR_DQ18
DQ19 DQ23
59 VSS VSS 60
DDR_DQ25 61 62 DDR_DQ29
DDR_DQ28 DQ24 DQ28 DDR_DQ24
63 DQ25 DQ29 64

1
65 66 R81 1
DDR_DM3 VSS VSS DDR_DQS#3 1K_0402_1%
67 DM3 DQS3# 68
69 70 DDR_DQS3 C250
NC DQS3 +DDR_VREF2
71 VSS VSS 72 0.1U_0402_16V4Z
2 DDR_DQ31 DDR_DQ26 2 2
73 DQ26 DQ30 74
DDR_DQ30 DDR_DQ27

2
75 DQ27 DQ31 76
77 VSS VSS 78
DDR_SCKE2 79 80 DDR_SCKE3 DDR_SCKE3 (8,10)
(8,10) DDR_SCKE2 CKE0 NC/CKE1

1
81 VDD VDD 82 1
83 84 R82
DDR_SMA17 NC NC/A15 DDR_SMA14 1K_0402_1% C251
85 BA2 NC/A14 86
87 VDD VDD 88 0.1U_0402_16V4Z
DDR_SMA12 DDR_SMA11 2
89 A12 A11 90
DDR_SMA9 DDR_SMA7

2
91 A9 A7 92
DDR_SMA8 93 94 DDR_SMA6
A8 A6
95 VDD VDD 96
DDR_SMA5 97 98 DDR_SMA4
DDR_SMA3 A5 A4 DDR_SMA2
99 A3 A2 100
DDR_SMA1 101 102 DDR_SMA0
A1 A0
103 VDD VDD 104
DDR_SMA10 105 106 DDR_SMA16
DDR_SMA15 A10/AP BA1 DDR_SRAS#
107 BA0 RAS# 108 DDR_SRAS# (8,10)
DDR_SWE# 109 110 DDR_SCS#2 DDR_SCS#2 (8,10)
(8,10) DDR_SWE# WE# S0#
111 VDD VDD 112
(8,10) DDR_SCAS# DDR_SCAS# 113 114 DDR_ODT1 DDR_ODT1 (8,10)
DDR_SCS#3 CAS# ODT0 DDR_SMA13
(8,10) DDR_SCS#3 115 NC/S1# NC/A13 116
117 VDD VDD 118
DDR_ODT3 119 120
(8,10) DDR_ODT3 NC/ODT1 NC
121 VSS VSS 122
DDR_DQ36 123 124 DDR_DQ37
DDR_DQ32 DQ32 DQ36 DDR_DQ33
125 DQ33 DQ37 126
127 VSS VSS 128
DDR_DQS#4 129 130 DDR_DM4
DDR_DQS4 DQS4# DM4
131 DQS4 VSS 132
133 134 DDR_DQ35
3 DDR_DQ39 VSS DQ38 DDR_DQ38 3
135 DQ34 DQ39 136
DDR_DQ34 137 138
DQ35 VSS DDR_DQ44
139 VSS DQ44 140
DDR_DQ41 141 142 DDR_DQ40
DDR_DQ45 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDR_DQS#5
DDR_DM5 VSS DQS5# DDR_DQS5
147 DM5 DQS5 148
149 VSS VSS 150
DDR_DQ42 151 152 DDR_DQ47
DDR_DQ46 DQ42 DQ46 DDR_DQ43
153 DQ43 DQ47 154
155 VSS VSS 156
DDR_DQ53 157 158 DDR_DQ49
DDR_DQ48 DQ48 DQ52 DDR_DQ52
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 EMC_DDR_CLK3
NC,TEST CK1 EMC_DDR_CLK3 (8)
165 166 EMC_DDR_CLK3#
VSS CK1# EMC_DDR_CLK3# (8)
DDR_DQS#6 167 168
DDR_DQS6 DQS6# VSS DDR_DM6
169 DQS6 DM6 170
171 VSS VSS 172
DDR_DQ50 173 174 DDR_DQ54
DDR_DQ55 DQ50 DQ54 DDR_DQ51
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_DQ60 179 180 DDR_DQ56
DDR_DQ57 DQ56 DQ60 DDR_DQ61
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_DM7 185 186 DDR_DQS#7
DM7 DQS7# DDR_DQS7
187 VSS DQS7 188
DDR_DQ58 189 190
DDR_DQ62 DQ58 VSS DDR_DQ63
191 DQ59 DQ62 192
193 194 DDR_DQ59
VSS DQ63
(10,12,14,25) SB_SMDATA 195 SDA VSS 196
4 (10,12,14,25) SB_SMCLK 197 SCL SAO 198 +3VS 4
+3VS 199 VDDSPD SA1 200
0.1U_0402_16V4Z

10U_0805_10V6K

PTI_A5652D-A0G16-P
1 1
C252

C253

Security Classification Compal Secret Data Compal Electronics, Inc.


2 2
DIMMB 2005/11/01 2006/11/30 Title
Issued Date Deciphered Date
Reverse H5.6 DDR-II SODIMM1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
2006/03/27 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 11 of 43
A B C D E
A B C D E

1- PLACE ALL THE SERIES TERMINATION RESISTORS


AS CLOSE TO CLOCK GEN AS POSSIBLE
1 Clock Generator 2- ROUTE ALL CPUCLK/#, NBCLK/#, ITPCLK/# 1
AND SCR/# ,AS DIFFERENT PAIR RULE
3- PUT DECOUPLING CAPS CLOSE TO CLOCK GEN
POWER PIN

2
49.9_0402_1%

49.9_0402_1%

49.9_0402_1%
49.9_0402_1%
R83

R84

R85

R86
+CLK_VDD1 U4
L11

1
+3VS 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 45 47 CPUCLKT0 R87 1 2 33_0402_5% EMC_CLK_NB_BCLK (8)
KC FBM-L11-201209-221LMAT_0805 1 VDDCPU CPUCLKT0 CPUCLKC0 R88 33_0402_5%
1 1 1 1 1 51 VDDPCI CPUCLKC0 46 1 2 EMC_CLK_NB_BCLK# (8)
C254 C255 C256 C257 C258 32 43 CPUCLKT1 R89 1 2 33_0402_5% CLK_CPU_BCLK (4)
VDDATI CPUCLKT1 CPUCLKC1 R90 33_0402_5%
35 VDDSRC CPUCLKC1 42 1 2 CLK_CPU_BCLK# (4)
10U_0805_10V4Z C259 14 41
2 2 2 2 2 2 VDDSRC CPUCLKT2_ITP
21 VDDSRC CPUCLKC2_ITP 40
L12 0.1U_0402_16V4Z 0.1U_0402_16V4Z 3
0.1U_0402_16V4Z VDD48
+3VS 1 2 56 VDDREF
CHB1608U301_0603 1 1 1 +3VS 1 2 39
C260 C261 C262 L13 CHB1608U301_0603 VDDA SRCCLKT0 R91
SRCCLKT0 34 1 2 33_0402_5% CLK_SB_ALINK (13)
33 SRCCLKC0 R92 1 2 33_0402_5% CLK_SB_ALINK# (13)
10U_0805_10V4Z 0.1U_0402_16V4Z SRCCLKC0
ATIGCLKT0 30
2 2 2
44 GNDCPU ATIGCLKC0 29
L14 49 27
GNDPCI ATIGCLKT1

0.1U_0402_16V4Z
+3VS 1 2 0.1U_0402_16V4Z 31 28
GNDATI ATIGCLKC1

10U_0805_10V4Z
CHB1608U301_0603 1 1 36 24 SRCCLKT3 R93 1 2 33_0402_5% CLK_NB_ALINK (7)
C263 C264 GNDSRC SRCCLKT3 SRCCLKC3 R94
26 GNDSRC SRCCLKC3 25 1 2 33_0402_5% CLK_NB_ALINK# (7)
2 2 20 GNDSRC SRCCLKT4 22

49.9_0402_1%

49.9_0402_1%
4.7U_0805_10V4Z 15 23
2 2 GNDSRC SRCCLKC4

49.9_0402_1%

49.9_0402_1%
C265 C266 5 18 SRCCLKT5 R95 1 2 33_0402_5% CLK_PCIE_MINI1 (25)
GND SRCCLKT5

1
2 SRCCLKC5 R96 2
55 GND SRCCLKC5 19 1 2 33_0402_5% CLK_PCIE_MINI1# (25)

1
1 1
38 16

R98
GNDA SRCCLKT6

R100

R101

R97
17 R99 1 2 49.9_0402_1%
33P_0402_50V8J EMC_XTALIN_CLK SRCCLKC6 R102 1
1 2 1 XIN SRCCLKT7 12 2 49.9_0402_1%

1
C267 13
SRCCLKC7
R104 0_0402_5% 1 Y1 R103

2
@ 1

2
(42) CLK_EN# 2
1M_0402_5%
@ 10 2 R105 1 +CLK_VDD1
CLKREQA# 10K_0402_5% R106 2 10K_0402_5%
2 XOUT CLKREQB# 11 1 +CLK_VDD1
33P_0402_50V8J EMC_XTALOUT_CLK MINI_CLKREQ#
2

2
1 2 2 1 MINI1_CLKREQ# (25)
C268 14.31818MHZ_20P_6X1430004201 50 R108 1 2 4.7K_0402_5% R107 0_0402_5%
CK410#/PCICLK0
+CLK_VDD1 1 R109 2 6 VTT_PWRGD#/PD
R110 1 2 4.7K_0402_5% +CLK_VDD1
10K_0402_5% +CLK_VDD1 4.7K_0402_5% @ 2 1 R111 48 4 @
CPU_STOP# USB_48MHZ
1

D 48M_SB R112 1 2 33_0402_5% CLK_48M_SB (14)


2 Q6 2 1 R114 1 2 33_0402_5%
(14,15) CLK_OK (13) CPU_STP# FS_C @ R115 1 CLK_SD_48M (21)
G
FS_C 9 2 4.7K_0402_5% CPU_BSEL2 (5)
S R113 4.7K_0402_5% 7 53 FS_B/REF1 R116 1 2 33_0402_5% R117 1 2 4.7K_0402_5%
(10,11,14,25) SB_SMCLK SCLK FS_B/REF1 CPU_BSEL1 (5,8)
FS_A/REF0 R118 1 2 33_0402_5% R119 1 2 4.7K_0402_5%
3

(10,11,14,25) SB_SMDATA 8 SDATA FS_A/REF0 54 CPU_BSEL0 (5)


2N7002_SOT23 2 52 TEST_SEL/REF2 R120 1 2 33_0402_5%
TEST_SEL/REF2
C725 37 IREF
33P_0402_50V8J

1
1
2006/03/03 R122 ICS951413CGLFT_TSSOP56
475_0402_1%
ICS951413
EMC_CLK_SB_14M (14)
2

EMC_CLK_NB_14M (8)
CLK_14M_SIO (27)

3 3

FS_C FS_B FS_A CPU SRC PCI REF USB


1 0 1 100.00 100.00 33.33 14.318 48.000
0 0 1 133.33 100.00 33.33 14.318 48.000
0 1 1 166.66 100.00 33.33 14.318 48.000

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title
ClockGen ICS 951413
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 12 of 43
A B C D E
5 4 3 2 1

+3VS
R123
8.2K_0402_5%
1 2
U5A (17,21,23,25,31) PCI_AD[0..31] PCI_AD[0..31]

1219 DEL A_RST# AG10


SB460 U2 PCI_CLK0_R @ R124 1 2 22_0402_5% CLK_PCI_MINI
A_RST# PCICLK0 CLK_PCI_MINI (25)
Part 1 of 4 T2 PCI_CLK1_R @ R125 1 2 22_0402_5% CLK_PCI_CB PCI_CLK0_R
PCICLK1 CLK_PCI_CB (21) PCI_CLK0_R (17)
(12) CLK_SB_ALINK J24 U1 PCI_CLK2_R R127 1 2 22_0402_5% CLK_PCI_LAN PCI_CLK1_R

PCI CLKS
PCIE_RCLKP PCICLK2 CLK_PCI_LAN (23) PCI_CLK1_R (17)
(12) CLK_SB_ALINK# J25 V2 PCI_CLK3_R @ R128 1 2 22_0402_5% CLK_PCI3
PCIE_RCLKN PCICLK3 PCI_CLK4_R @ R130 22_0402_5% CLK_PCI_DB PCI_CLK2_R
PCICLK4 W3 1 2 CLK_PCI_DB (31) PCI_CLK2_R (17)
C269 1 2 0.01U_0402_16V7K SB_A_TXP0 P29 U3 PCI_CLK5_R @ R126 1 2 22_0402_5% CLK_PCI_LPC PCI_CLK3_R
8.2K_1206_8P4R_5% (7) NB_A_RXP0 PCIE_TX0P PCICLK5 CLK_PCI_LPC (28) PCI_CLK3_R (17)
C270 1 2 0.01U_0402_16V7K SB_A_TXN0 P28 V1 PCI_CLK6_R @ R129 1 2 22_0402_5% CLK_PCI_SIO PCI_CLK4_R
(7) NB_A_RXN0 PCIE_TX0N PCICLK6 CLK_PCI_SIO (27) PCI_CLK4_R (17)
5 4 PCI_PIRQE# C271 1 2 0.01U_0402_16V7K SB_A_TXP1 M29 T1 SPDIF_OUT PCI_CLK5_R
(7) NB_A_RXP1 PCIE_TX1P SPDIF_OUT/GPIO41 SPDIF_OUT (17) PCI_CLK5_R (17)
6 3 PCI_IRDY# C272 1 2 0.01U_0402_16V7K SB_A_TXN1 M28 PCI_CLK6_R
D (7) NB_A_RXN1 PCIE_TX1N PCI_CLK6_R (17) D
7 2 PCI_PIRQG# C273 1 2 0.01U_0402_16V7K SB_A_TXP2 K29 AJ9 PCI_PLTRST# R132 1 2
(7) NB_A_RXP2 PCIE_TX2P PCIRST#
8 1 PCI_SERR# C275 1 2 0.01U_0402_16V7K SB_A_TXN2 K28 8.2K_0402_5%
(7) NB_A_RXN2 PCIE_TX2N
C276 1 2 0.01U_0402_16V7K SB_A_TXP3 H29
RP10 (7) NB_A_RXP3 PCIE_TX3P
C277 1 2 0.01U_0402_16V7K SB_A_TXN3 H28 W7 PCI_AD0
(7) NB_A_RXN3 PCIE_TX3N AD0/ROMA18
Y1 PCI_AD1
SB_A_RXP0 AD1/ROMA17 PCI_AD2 +3VS +3VS
(7) SB_A_RXP0 T25 PCIE_RX0P AD2/ROMA16 W8

FBM-L11-160808-800LMT_0603
RP11 SB_A_RXN0 T26 W5 PCI_AD3
(7) SB_A_RXN0 PCIE_RX0N AD3/ROMA15
1 8 SB_A_RXP1 T22 AA5 PCI_AD4

PCI EXPRESS INTERFACE


(7) SB_A_RXP1 PCIE_RX1P AD4/ROMA14

1
7 LOCK# SB_A_RXN1 PCI_AD5
2 (7) SB_A_RXN1 T23 PCIE_RX1N AD5/ROMA13 Y3
EMI 11/15 Modify

1
3 6 PCI_PIRQH# SB_A_RXP2 M25 AA6 PCI_AD6 R133
(7) SB_A_RXP2 PCIE_RX2P AD6/ROMA12
4 5 PCI_DEVSEL# SB_A_RXN2 M26 AC5 PCI_AD7 10K_0402_5%

8.2K_1206_8P4R_5%
(7)
(7)
SB_A_RXN2
SB_A_RXP3
SB_A_RXP3
SB_A_RXN3
M22
PCIE_RX2N
PCIE_RX3P
AD7/ROMA11
AD8/ROMA9 AA7 PCI_AD8 L15 2006/03/09
M23 AC3 PCI_AD9 U6
(7) SB_A_RXN3 PCIE_RX3N AD9/ROMA8
150_0402_1% PCI_AD10 CKO1 R136 39_0402_5% CLK_PCI_MINI

2
AD10/ROMA7 AC7 8 DLY CNTRL CLKOUT1 2 1 2
R134 2 1 E29 AJ7 PCI_AD11 PCI_CLK3_R 1 6 CKO2 R138 1 2 39_0402_5% CLK_PCI_CB
8.2K_1206_8P4R_5% PCIE_CALRP AD11/ROMA6 CLKIN CLKOUT2
2 L16 R135 PCI_AD12 CKO3 R139 39_0402_5% CLK_PCI3

2
+1.8VS 1 +PCIE_VDDR 2 1 E28 PCIE_CALRN AD12/ROMA5 AD4 3 VDD CLKOUT3 7 1 2
5 4 PCI_REQ#1 150_0402_1%
AD13/ROMA4 AB11 PCI_AD13 SS_VDD 13 VDD CLKOUT4 10 CKO4 R140 1 @ 2 39_0402_5% CLK_PCI_LAN
6 3 PCI_PIRQF# CHB2012U170_0805 R137 1 2 E27 PCIE_CALI AD14/ROMA3 AE6 PCI_AD14 1 R141 2 9 SSON CLKOUT5 11 CKO5 R142 1 2 39_0402_5% CLK_PCI_LPC
7 2 PCI_GNT#1 4.12K_0402_1% AC9 PCI_AD15 10K_0402_5% 4 14 CKO6 R143 1 2 39_0402_5% CLK_PCI_DB
8 1 PCI_GNT#4 C278 1 2 80mA PCIE_PVDD U29
AD15/ROMA2
AA3 PCI_AD16 5
SS% CLKOUT6
15 CKO7 R144 1 2 39_0402_5% CLK_PCI_SIO
PCIE_PVDD AD16/ROMD0 (14) SS_DECT GND CLKOUT7

1
AJ4 PCI_AD17 12 16
RP12 1U_0402_6.3V4Z AD17/ROMD1 PCI_AD18 10K_0402_5% GND CLKOUT8
U28 NC AD18/ROMD2 AB1 1
AH4 PCI_AD19 C281 ASM3P623S00EF-16-TR_TSSOP16 +3VS
C279 1 AD19/ROMD3 PCI_AD20 R145
2 +PCIE_VDDR F27 PCIE_VDDR_1 AD20/ROMD4 AB2
RP13 F28 AJ3 PCI_AD21 1U_0402_6.3V4Z @
PCI_FRAME# 10U_0805_10V4Z PCIE_VDDR_2 AD21/ROMD5 PCI_AD22 2 0.1U_0402_16V4Z

2
1 8
PCI_STOP# C280 1
50mil trace width F29 PCIE_VDDR_3 AD22/ROMD6 AB3
PCI_AD23 C282
2 7 2 G26 PCIE_VDDR_4 AD23/ROMD7 AH3 1 2
3 6 PCI_GNT#3 G27 AC1 PCI_AD24
2006/03/03 PCIE_VDDR_5 AD24

5
4 5 PCI_TRDY# 0.1U_0402_10V6K G28 AH2 PCI_AD25 U7
PCIE_VDDR_6 AD25 PCI_AD26 PCI_PLTRST#
G29 AC2 1

P
8.2K_1206_8P4R_5% PCIE_VDDR_7 AD26 PCI_AD27 B
J27 PCIE_VDDR_8 AD27 AH1 Y 4 PCI_RST# (15,21,23,25,27,28,31)
C PCI_AD28 C
J29 PCIE_VDDR_9 AD28 AD2 2 A

G
L25 AG2 PCI_AD29
RP14 PCIE_VDDR_10 AD29 PCI_AD30 @ TC7SH08FU_SSOP5

PCI INTERFACE
L26 PCIE_VDDR_11 AD30 AD1
8 PCI_GNT#0 PCI_AD31

3
1 L29 PCIE_VDDR_12 AD31 AG1
2 7 PCI_REQ#2 N29 PCIE_VDDR_13 CBE0#/ROMA10 AB9 PCI_CBE#0 (21,23,25,31)
3 6 PCI_PERR# CBE1#/ROMA1 AF9 PCI_CBE#1 (21,23,25,31)
4 5 CBE2#/ROMWE# AJ5 PCI_CBE#2 (21,23,25,31) 2 1
AG3 PCI_CBE#3 (21,23,25,31) R146 0_0402_5%
R155 CBE3#
8.2K_1206_8P4R_5% AA2 PCI_FRAME# PCI_FRAME# (21,23,25,31)
FRAME# PCI_DEVSEL#
1 2 DEVSEL#/ROMA0 AH6 PCI_DEVSEL# (21,23,25)
AG5 PCI_IRDY# PCI_IRDY# (21,23,25)
RP15 20M_0603_5% IRDY# PCI_TRDY#
TRDY#/ROMOE# AA1 PCI_TRDY# (21,23,25,31)
8 1 PCI_REQ#3 AF7 PCI_PAR +3VS
PAR/ROMA19 PCI_PAR (21,23,25)
7 2 PCI_REQ#0 EMC_SB_32KH0 EMC_SB_32KHI Y2 PCI_STOP# PCI_STOP# (21,23,25)
PCI_GNT#2 STOP# PCI_PERR# R147
6 3 PERR# AG8 PCI_PERR# (21,23,25)
5 4 PCI_REQ#4 AC11 PCI_SERR# PCI_SERR# (21,23,25) 8.2K_0402_5%
SERR#
15P_0402_50V8K

AJ8 PCI_REQ#0 PCI_PAR 1 2


REQ0#
4

8.2K_1206_8P4R_5% AE2 PCI_REQ#1 PCI_REQ#1 (23)


REQ1#
20M_0603_5%

Y2 AG9 PCI_REQ#2
OUT

IN

REQ2# PCI_REQ#2 (21)


2

AH8 PCI_REQ#3 PCI_REQ#3 (25) LPC_DRQ0# 5 4


REQ3#/PDMA_REQ0# PCI_REQ#4
REQ4#/PLL_BP33/PDMA_REQ1# AH5 6 3
+1.8VS AD11 PCI_GNT#0 SERIRQ 7 2
1 1 GNT0#
R158

C283 470U_D2_2.5VM C297 PCI_GNT#1 LPC_DRQ1#


NC

NC

GNT1# AF2 PCI_GNT#1 (23) 8 1


2 1 AH7 PCI_GNT#2 PCI_GNT#2 (21)
15P_0402_50V8K C298 GNT2# PCI_GNT#3 10K_1206_8P4R_5% RP16
1
+

GNT3#/PLL_BP66/PDMA_GNT0# AB12 PCI_GNT#3 (25)


2

2 2 PCI_GNT#4
3

GNT4#/PLL_BP50/PDMA_GNT1# AG4
AG7 PM_CLKRUN# LPC_AD2 4 5
CLKRUN# PM_CLKRUN# (23,25,27)
L17 AF6 LOCK# LPC_AD0 3 6
CHB2012U170_0805 32.768KHZ_12.5P_1TJS125DJ2A073 LOCK# LPC_AD3 2 7
AD3 PCI_PIRQE# LPC_AD1 1 8
INTE#/GPIO33 PCI_PIRQF# PCI_PIRQE# 100K_1206_8P4R_5%
INTF#/GPIO34 AF1 (21) PCI_PIRQE#
+PCIE_VDDR PCI_PIRQG# PCI_PIRQF# RP17
1

B AF4 B
INTG#/GPIO35 (25) PCI_PIRQF#
EMC_SB_32KHI D2 AF3 PCI_PIRQH# (23) PCI_PIRQG# PCI_PIRQG# PM_CLKRUN# 1 2
C284 10U_0805_10V4Z X1 INTH#/GPIO36 PCI_PIRQH# R152 4.7K_0402_5%
1 2 (21,25) PCI_PIRQH#
C285 1 2 10U_0805_10V4Z
C286 1 2 0.1U_0402_16V4Z
C287 0.1U_0402_16V4Z EMC_SB_32KH0
1 2
Pull-high on CPU side C1 X2 RTC Battery
XTAL

C288 1 2 0.1U_0402_16V4Z AG24 LPC_AD0


C289
C290
1
1
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
(4) H_PWRGOOD
(4) H_INTR
H_PWRGD AC26
W26
CPU_PG
INTR/LINT0
LAD0
LAD1
LAD2
AG25
AH24
LPC_AD1
LPC_AD2
LPC_AD0 (27,28)
LPC_AD1 (27,28)
LPC_AD2 (27,28)
- BATT1 + +RTCBATT

C291 1 2 0.1U_0402_16V4Z W24 AH25 LPC_AD3 2 1+RTCBATT


(4) H_NMI NMI/LINT1 LAD3 LPC_AD3 (27,28)
C292 1 2 0.1U_0402_16V4Z W25 AF24 LPC_FRAME#
(4) H_INIT# INIT# LFRAME# LPC_FRAME# (17,27,28)
C293 0.1U_0402_16V4Z LPC_DRQ0#
LPC

1 2 (4) H_SMI# AA24 SMI# LDRQ0# AJ24 LPC_DRQ0# (27)


C294 1 2 0.1U_0402_16V4Z AA23 AH26 LPC_DRQ1# D3
NC LDRQ1# 45@ RTCBATT
(4) H_IGNNE# AA22 IGNNE# BMREQ# W22 BM_REQ# (8)

1
H_A20M# AA26 AF23 SERIRQ SERIRQ (21,27,28) BAS40-04_SOT23
(4) H_A20M# A20M# SERIRQ
CPU

(4) H_FERR# Y27


AA25
FERR#
D3 RTC_CLK Place JOPEN1 close +RTCVCC
(4) H_STPCLK# STPCLK#/ALLOW_LDTSTP RTCCLK RTC_CLK (17)
(12) CPU_STP#
CPU_STP# 1 2 AH9 CPU_STP#/DPSLP_3V# RTC_IRQ#/ACPWR_STRAP F5 AUTO_ON# (17)
+SB_VBAT to DDR-SODIMM
R148 0_0402_5% B24 NC 470_0603_5% 470_0603_5%
(4,42) DPRSLPVR W23 DPRSLPVR VBAT E1 +SB_VBAT
C295 1 R156 2 +VBAT_JOP 1 R157

2
(4,7) H_RESET# 1 2 AC25 LDT_RST#/DPRSTP#/PROCHOT# RTC_GND D1
Consider 2

1U_0402_6.3V4Z
R154 0_0402_5%
RTC

1
@ W=20mils
218S4RASA11GS SB460_BGA549 --connect Close to SB
1
JOPEN1
1
C296

1
+3VS +CHGRTC
@ JUMP_43X39 0.1U_0402_16V4Z
2006/03/03 RTC_CLK PIN A2
2
No short 2

2
+3VALW U37
TC7SH08FU_SSOP5
to EC

2
5

0.1U_0402_16V4Z
H_DPSLP# C726 1 2 1 A_RST# Layout Note:
P

(4,14) H_DPSLP# B
A (8) NB_RST# 4 Y
2
1. Under BATT1 battery Body, no Trace and Via A
U35F A
G

2. BATT1 + - PIN keep out 80mil from other


14

SN74LVC14APWLE_TSSOP14
component ,trace and via
1

D 215K_0603_1%
3
P

Q42 2 12 13 1 R503 2 CPU_STP#


G O I
G

D36
S 1 Security Classification Compal Secret Data Compal Electronics, Inc.
3

2 1
2N7002_SOT23 2005/11/01 2006/11/30 Title
7

Issued Date Deciphered Date


PCI_EXP/LPC/RTC
C274 330P_0402_50V7K
2 CH751H-40_SC76 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 13 of 43
5 4 3 2 1
5 4 3 2 1

+3VALW
RP18 2005/12/22
1 8 EC_PME# 1 2 CLK_48M_SB
EC_THERM# U5D R159 0_0402_5% CLK_48M_SB (12)
2 7
3 6 MASTER_RST# 1 2 EMC_OSCLIN +3VALW
PBTN_OUT# Part 4 of 4 R160 0_0402_5%
4 5 SB460 @
10K_1206_8P4R_5% EC_SWI# A3 A17

RP19
1 R161 2
10K_0402_5%
GPM6#
(28) EC_SWI#
EXTEVENT0#
PM_SLP_S3#
B2
PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
USBCLK R163 2006/03/27
(28) PM_SLP_S3# F7 SLP_S3# USB_RCOMP A14 USB_RCOMP 1 2 EC_SCI# R164 1 2 10K_0402_5%
1 8 PCIE_PME# (28) PM_SLP_S5# PM_SLP_S5# A5 EC_LID_OUT# R165 1 2 10K_0402_5%
SLP_S5#

ACPI / WAKE UP EVENTS


2 7 PM_SLP_S5# PBTN_OUT# E3 A11 10.7K_0402_1%
(28) PBTN_OUT# PWR_BTN# USB_ATEST1
3 6 EC_FLASH# B5 A10
(15) SB_PWRGD PWR_GOOD USB_ATEST0
4 5 EXTEVENT0# (8,29) NB_SUS_STAT# 1 2 B3
R166 0_0402_5% SUS_STAT# 10K_1206_8P4R_5%
F9 H12
D
4.7K_1206_8P4R_5% R167 1 2 10K_0402_5% E9
NC
TEST1
NC
NC G12 Only for HCL51 EC_SMI# 5 4
D

R168 1 2 10K_0402_5% G9 USB_OC6# 6 3


R169 1 2 4.7K_0402_5%EC_SWI# SB_GA20 AF26
TEST0
GA20IN NC E12 default value is 11.8K USB_OC2# 7 2
R170 1 2 10K_0402_5% PM_SLP_S3# SB_KBRST# AG26 D12 USB_OC4# 8 1
R171 1 KBRST# NC
2 4.7K_0402_5%MAINPWON_R EC_PME# D7 LPC_PME#/GEVENT3#
SIO_SMI# C25 E14 RP20
+3VS LPC_SMI#/EXTEVNT1# USB_HSDP7+
(4,42) H_PROCHOT# D9 S3_STATE/GEVENT5# USB_HSDM7- D14
MASTER_RST#

USB INTERFACE
F4 SYS_RESET#/GPM7#
R173 1 2 10K_0402_5% AGP_BUSY# 2 1 PCIE_PME# E7 G14 USBP6+ USBP6+ (30)
(25) MINI_WAKE# WAKE#/GEVENT8# USB_HSDP6+
R175 1 2 10K_0402_5% SIO_SMI# 0_0402_5% R172 GPM6# C2 H14 USBP6-
BLINK/GPM6# USB_HSDM6- USBP6- (30)
R176 1 2 10K_0402_5% SB_GA20 MAINPWON_R G7
R177 1 SMBALERT#/THRMTRIP#/GEVENT2#
2 10K_0402_5% SB_KBRST#
(28) EC_RSMRST#
EC_RSMRST#
USB_HSDP5+ D16 L18 FBM-10-201209-260-T_0805
R178 1 2 2.2K_0402_5% SB_SMCLK E16 1 2
R179 1 USB_HSDM5-
2 2.2K_0402_5% SB_SMDATA
(12) EMC_CLK_SB_14M 2 R174 1 1 SB_14M E2 RSMRST#
0_0402_5% OSC / RST D18 USBP4+ USBP4+ (30) +AVDDTX C300 1 2 10U_0805_10V4Z
+3VS C299 USB_HSDP4+ USBP4-
B23 14M_OSC USB_HSDM4- E18 USBP4- (30)
@ 15P_0402_50V8D C301 1 2 1U_0402_6.3V4Z
10K_1206_8P4R_5% 2
C28 NC USB_HSDP3+ G16
4 5 SB_FANOUT0 (29) SB_INT_FLASH_SEL
SB_INT_FLASH_SEL A26 ROM_CS#/GPIO1 USB_HSDM3- H16 C302 1 2 0.1U_0402_16V4Z
3 6 SB_GPIO31 (15) SIDERST# B29 GHI#/GPIO6
C303 1 2 0.1U_0402_16V4Z
2 7 SB_GPIO13 (12,15) CLK_OK A23 VGATE/GPIO7 USB_HSDP2+ G18 USBP2+
USBP2+ (25)
C304 1 2 0.1U_0402_16V4Z
1 8 SB_GPIO14 AGP_STP# B27 H18 USBP2-
RP28
2006/02/07 AGP_BUSY#
SPKR
D23
GPIO4
GPIO5
USB_HSDM2-
USBP1+
USBP2- (25)

(32) SB_SPKR B26 SPKR/GPIO2 USB_HSDP1+ D19 USBP1+ (30)


SB_SMCLK C27 E19 USBP1-
SS_DECT (13) (10,11,12,25) SB_SMCLK SCL0/GPOC0# USB_HSDM1- USBP1- (30)
SB_SMDATA B28 L19 FBM-10-201209-260-T_0805

GPIO
(10,11,12,25) SB_SMDATA SDA0/GPOC1#
RP21 C3 G19 USBP0+ 1 2 +3VALW
NC USB_HSDP0+ USBP0+ (26)
1 8 SBGPIO40 D35 F3 NC USB_HSDM0- H19 USBP0-
USBP0- (26)
2 7 AZ_BITCLK (28,36) ACIN
ACIN 1 2 SB_GPIO9 D26 DDC1_SCL/GPIO9
+AVDDRX C305 1 2 10U_0805_10V4Z
3 6 SBGPIO44 @ GPIO_M C26 DDC1_SDA/GPIO8
4 5 AZ_SDIN0_MDC CH751H-40_SC76
LDT_PG A27 LDT_PG/SSMUXSEL/GPIO0 AVDDTX_0 B9 +AVDDTX C306 1 2 1U_0402_6.3V4Z
C C
A4 NC AVDDTX_1 B11
10K_1206_8P4R_5% B13 C307 1 2 0.1U_0402_16V4Z
AVDDTX_2 C308 1
B16 2 0.1U_0402_16V4Z
10K_1206_8P4R_5% 2006/01/23 C6 NC
AVDDTX_3
AVDDTX_4 B18 C309 1 2 0.1U_0402_16V4Z
4 5 GPIO_M C5 NC AVDDRX_0 A9 +AVDDRX
3 6 LDT_PG (28) EC_SMI#
EC_SMI# C4 USB_OC7#/GEVENT7# AVDDRX_1 B10
2 7 AZ_RST USB_OC6# B4 B12

USB OC
USB_OC6#/GEVENT6# AVDDRX_2
1 8 AGP_STP# AZ_RST B6 USB_OC5#/AZ_RST#/GPM5# AVDDRX_3 B14
USB_OC4# A6 B17 L20 FBM-10-201209-260-T_0805
RP22 EC_LID_OUT# USB_OC4#/GPM4# AVDDRX_4 +AVDDC
(28) EC_LID_OUT# C8 USB_OC3#/GPM3# 1 2
USB_OC2# C7 A12 +AVDDC
(26) USB_OC2# USB_OC2#/FANOUT1/LLB#/GPM2# AVDDC
(32) AZ_BITCLK_HD R181 1 2 33_0402_5% EC_FLASH# B8 C310 1 2 10U_0805_10V4Z
(29) EC_FLASH# USB_OC1#/GPM1#
(32) AZ_SYNC_HD R183 1 2 33_0402_5% EC_SCI# A8 A13
(28) EC_SCI# USB_OC0#/GPM0# AVSSC
(32) AZ_SDOUT_HD R182 1 2 33_0402_5% C311 1 2 1U_0402_6.3V4Z
(32) AZ_RST_HD# R184 1 2 33_0402_5% A16
AZ_BITCLK AVSS_USB_1 C312 1
N2 AZ_BITCLK AVSS_USB_2 C9 2 0.1U_0402_16V4Z

AZALIA
AZ_SDOUT M2 C10
R185 33_0402_5% AZ_BITCLK AZ_SDOUT AVSS_USB_3
(30) AZ_BITCLK_MDC 1 2 K2 NC AVSS_USB_4 C11
(30) AZ_SYNC_MDC R187 1 2 33_0402_5% AZ_SYNC R488 10K_0402_5% AZ_SYNC L3 C12
R186 33_0402_5% AZ_SDOUT AZ_SYNC AVSS_USB_5
(30) AZ_SDOUT_MDC 1 2 1 2 K3 NC AVSS_USB_6 C13
(30) AZ_RST_MDC# R188 1 2 33_0402_5% AZ_RST C14
AVSS_USB_7
1 R486 2 AC_BITCLK L1 C16

USB PWR
AC_SDOUT 10K_0402_5% AC_BITCLK/GPIO38 AVSS_USB_8
(17) AC_SDOUT L2 AC_SDOUT/GPIO39 AVSS_USB_9 C17
AZ_SDIN3_HD L4 C18
(32) AZ_SDIN3_HD AZ_SDIN0_MDC ACZ_SDIN0/GPIO42 AVSS_USB_10
(30) AZ_SDIN0_MDC 1 2 J2 ACZ_SDIN1/GPIO43 AVSS_USB_11 C19
R189 0_0402_5% SBGPIO44

AC97
J4 ACZ_SDIN2/GPIO44 AVSS_USB_12 C20
SBGPIO40 M3 D11
AC_SYNC/GPIO40 AVSS_USB_13
1 2 AC_RST L5 AC_RST#/GPIO45 AVSS_USB_14 D21 (28) EC_RSMRST#
EC_RSMRST#
R487 10K_0402_5% E11
AVSS_USB_15
E21
AVSS_USB_16 Control by EC

1
AVSS_USB_17 F11
B +3VALW SB_FANOUT0 R193 B
2006/03/06 SB_GPIO31
E23
AC21
FANOUT0/GPIO3 AVSS_USB_18 F12
F14 Delay 50ms 47K_0402_5%
@ 0_0402_5% SB_GPIO13 GPIO31 AVSS_USB_19
AD7 F16
(4,13) H_DPSLP#
R149 1 2
SB_GPIO14
AE7
GPIO13
DPSLP_OD#/GPIO37
AVSS_USB_20
AVSS_USB_21 F18 after +3VALW

2
1 AA4 F19

C712
(28) EC_THERM# EC_THERM# T4
GPIO14
TALERT#/GPIO10
AVSS_USB_22
AVSS_USB_23 F21 ready
(4) H_CPUSLP# D4 SLP#/LDT_STP# AVSS_USB_24 G11
@ 0.1U_0402_10V6K AB19 G21
2 NC AVSS_USB_25
AVSS_USB_26 H11
AVSS_USB_27 H21
5

U32 J11
GPIO_M AVSS_USB_28
1 J12
P

B AVSS_USB_29
Y 4 AZ_RST_MDC# AVSS_USB_30 J14
AZ_RST 2 J16
A AVSS_USB_31
G

AVSS_USB_32 J18
+3VALW TC7SH08FU_SSOP5 J19
@ AVSS_USB_33
3

218S4RASA11GS SB460_BGA549
2

@ D4
R192 SB_GA20 2 @1CH751H-40_SC76 GATEA20 EC_GA20 (28)
0_0603_5% 10K_0402_5%

R191 X1 48MHZ_4P_FN4800002 1 2
EMC_OSCLIN R190 0_0402_5%
1

4 VDD OUT 3
1
@ 1 OE 2 SB_KBRST# 2 @1CH751H-40_SC76 EC_KBRST# EC_KBRST# (28)
@ C313 GND
0.1U_0402_10V6K D5
2
@
A 1 2 A
R194 0_0402_5%

CH751H-40_SC76
MAINPWON_R 2 1 MAINPWON (4,36,37,39)
D6
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SB450 USB/ACPI/AC97/GPIO
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 14 of 43
5 4 3 2 1
5 4 3 2 1

(20) PIDE_DA[0..2] PIDE_DA[0..2]

Place closely SATA CONN. JP3 (20) PIDE_DD[0..15] PIDE_DD[0..15]


U5B
+5VS 1 SATA@ C314 1 2 0.01U_0402_16V7K SATA_TX0+
GND SATA_TX0+_C
10U_0805_10V4Z 0.1U_0402_16V4Z HTX+ 2
3 SATA_TX0-_C SATA@ C315 1 2 0.01U_0402_16V7K SATA_TX0-
AH21
AJ21
SATA_TX0+ SB460 AB29
HTX- SATA_TX0- PIDE_IORDY PIDE_DIORDY (20)
GND 4 Part 2 of 4 PIDE_IRQ AA28 PIDE_INTRQ# (20)
1 1 1 1 5 SATA_RX0-_C SATA@ C316 1 2 0.01U_0402_16V7K SATA_RX0- AH20 AA29 PIDE_DA0
C317 C318 C319 C320 HRX- SATA_RX0+_C SATA_RX0- PIDE_A0 PIDE_DA1
HRX+ 6 AJ20 SATA_RX0+ PIDE_A1 AB27
7 SATA@ C321 1 2 0.01U_0402_16V7K SATA_RX0+ Y28 PIDE_DA2
GND PIDE_A2
AH18 SATA_TX1+ PIDE_DACK# AB28 PIDE_DMACK# (17,20)
2 2 2 2
AJ18 SATA_TX1- PIDE_DRQ AC27 PIDE_DREQ (20)
J1 AC29
PIDE_IOR# PIDE_DIOR# (20)
0.1U_0402_16V4Z 0.1U_0402_16V4Z 8 +3V_SATA 2 1 +3VS AH17 AC28
D VCC3.3 2 1 SATA_RX1- PIDE_IOW# PIDE_DIOW# (20) D
VCC3.3 9
10 JUMP_43X118 Place SATA CAP & RES very close to SB AJ17 SATA_RX1+ PIDE_CS1# W28
W27
PIDE_CS1# (20)
+3V_SATA VCC3.3 PIDE_CS3# PIDE_CS3# (20)
GND 11 AH13 SATA_TX2+
12 AH14 AD28 PIDE_DD0
@ 10U_0805_10V4Z @ 0.1U_0402_16V4Z GND SATA_TX2- PIDE_D0 PIDE_DD1
GND 13 PIDE_D1 AD26
14 AH16 AE29 PIDE_DD2
VCC5 SATA_RX2- PIDE_D2 PIDE_DD3

ATA 66/100
SERIAL ATA
15 AJ16 AF27
1 1 1 1 VCC5 100 mil SATA_RX2+ PIDE_D3

1
C322 C323 C324 C325 16 +5VS C326 1 AG29 PIDE_DD4
VCC5 R195 PIDE_D4 PIDE_DD5
GND 17 AJ11 SATA_TX3+ PIDE_D5 AH28
18 @ 1K_0402_1% AH11 AJ28 PIDE_DD6
2 2 2 2 RESERVED 0.01U_0402_16V7K SATA@ SATA_TX3- PIDE_D6 PIDE_DD7
GND 19 PIDE_D7 AJ27
2 PIDE_DD8
VCC12 20 AH12 SATA_RX3- PIDE_D8 AH27
@ 0.1U_0402_16V4Z @ 0.1U_0402_16V4Z PIDE_DD9

2
VCC12 21 AJ13 SATA_RX3+ PIDE_D9 AG27
22 AG28 PIDE_DD10
VCC12 PIDE_D10 PIDE_DD11
AF12 SATA_CAL PIDE_D11 AF28
AF29 PIDE_DD12
OCTEK_SAT-22SG1G_NR EMC_SATA_X1 PIDE_D12 PIDE_DD13
AD16 AE28
SATA HDD CONNECTOR SATA@ R196 SATA@10M_0402_5% SATA_X1 PIDE_D13
PIDE_D14 AD25 PIDE_DD14
2 1 EMC_SATA_X2 AD18 SATA_X2 PIDE_D15 AD29 PIDE_DD15
+1.8VS +PLLVDD_SATA +1.8VS +XTLVDD_SATA
Y3 SATA_LED# AC12
(28) SATA_LED# SATA_ACT#
L21 1U_0402_6.3V4Z L22 1U_0402_6.3V4Z 1 2
2 1 2 1 2 1 +PLLVDD_SATA AD14 PLLVDD_SATA_1
CHB1608U301_0603 CHB1608U301_0603 27P_0402_50V8J C328 AJ10 J3
1 1 1 1 1 1 PLLVDD_SATA_2 NC
C330 C331 C333 C334 SATA@ 25MHZ_20P 27P_0402_50V8J J6
C329 C332 C327 SATA@ NC
+XTLVDD_SATA AC16 XTLVDD_SATA NC G3
1 2

SPI ROM
0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z SATA@ G2
2 2 2 2 2 2 NC
AE14 AVDD_SATA_1 NC G6
AE16 AVDD_SATA_2
AE18 AVDD_SATA_3 NC C23
+1.8VS +1.8_SATA AE19 G5
C AVDD_SATA_4 NC C
AF19 AVDD_SATA_5
L23 0.1U_0402_16V4Z 1U_0402_6.3V4Z AF21 M4
AVDD_SATA_6 NC
2 1 AG22 AVDD_SATA_7 NC T3
CHB1608U301_0603 1 1 1 1 1 1 1 AG23 V4
C335 C336 C337 C338 C339 C340 AVDD_SATA_8 NC
AH22 AVDD_SATA_9
C341 AH23 N3
0.1U_0402_16V4Z AVDD_SATA_10 NC
AJ12 AVDD_SATA_11 NC P2
2 2 2 2 2 2
10U_0805_10V4Z 2
AJ14 AVDD_SATA_12 NC W4

SERIAL ATA POWER


AJ19 AVDD_SATA_13
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z AJ22 P5
AVDD_SATA_14 NC
AJ23 AVDD_SATA_15 NC P7
NC P8
AB14 AVSS_SATA_1 NC T8
AB16 AVSS_SATA_2 NC T7

HW MONITOR
AB18 AVSS_SATA_3
+3VS AC14 V5
+3VALW AVSS_SATA_4 NC
AC18 AVSS_SATA_5 NC L7
AC19 AVSS_SATA_6 NC M8
0.1U_0402_16V4Z AD12 V6
AVSS_SATA_7 NC

1
C342 1 2 AD19 M6
R197 AVSS_SATA_8 NC
AD21 AVSS_SATA_9 NC P4
5

U34 10K_0402_5% AE12 M7


AVSS_SATA_10 NC
1 AE21 V7
P

(13,21,23,25,27,28,31) PCI_RST# B AVSS_SATA_11 NC


Y 4 IDE_RESET# (20) AF11 AVSS_SATA_12
SATA_LED#

2
(14) SIDERST# 2 A AF14 AVSS_SATA_13
G

AF16 AVSS_SATA_14
TC7SH08FU_SSOP5 AF18 N1
AVSS_SATA_15 NC
3

AG11 AVSS_SATA_16
AG12 AVSS_SATA_17 NC M1
AG13 AVSS_SATA_18
AG14 AVSS_SATA_19
B AG16 B
AVSS_SATA_20
AG17 AVSS_SATA_21
AG18 AVSS_SATA_22
AG19
NB & SB POWER GOOD +3VALW
AG20
AVSS_SATA_23
AVSS_SATA_24
AG21 AVSS_SATA_25
AH10 AVSS_SATA_26
AH19 AVSS_SATA_27

14
U3D
12
P
A 218S4RASA11GS SB460_BGA549
O 11 NB_PWRGD (8)
+3VS CLK_OK 13
B
G

SN74LVC08APW_TSSOP14
+3VALW
7

2006/03/06
1

+3VALW +3VALW +3VALW


+3VALW
2006/01/23

2
+3VALW +3VALW C714 0.1U_0402_16V4Z
R474
10K_0402_5% SN74LVC14APWLE_TSSOP14
2006/03/27 R504
14

14

14

14

14
10K_0402_5%
R475 SN74LVC14APWLE_TSSOP14
2

14
332K_0402_1% R477 U3C
P

P R479 0_0402_5%

1
1 2 3 4 1 2 5 6 9 8 1 2 1 2 11 10 9

P
(42) VGATE I O I O I O I O I O A
332K_0402_5% 1 8 2 1
O SB_PWRGD (14)

1
G

U35A U35B U35C U35D R476 0_0402_5% U35E D CLK_OK


1 10 B
1

G
C716

C715 1 2 2
R478 Q43 SN74LVC08APW_TSSOP14 @ R480
7

G
0.1U_0402_10V6K 0.47U_0603_16V4Z 2 0_0402_5%

7
S 2 1 EC_PWROK (28)
1M_0402_5% 2 R505 2N7002_SOT23 0_0402_5%

3
SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14
2

A A
SB_PWRGD# (8)
CLK_OK
TO SB & CLK_GEN
CLK_OK (12,14)

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SB450 IDE/SATA
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 15 of 43
5 4 3 2 1
+3VS
U5C

C348 1U_0402_6.3V4Z
C349
1
1
2
2 1U_0402_6.3V4Z
A25
A28
VDDQ_1 SB460 VSS_1 A1
A20
C350 1U_0402_6.3V4Z VDDQ_2 VSS_2
1 2 C29 VDDQ_3 Part 3 of 4 VSS_3 A21
C351 1 2 1U_0402_6.3V4Z D24 A29
C352 0.1U_0402_16V4Z VDDQ_4 VSS_4
1 2 L9 VDDQ_5 VSS_5 B1
C353 1 2 0.1U_0402_16V4Z L21 B7
C354 0.1U_0402_16V4Z VDDQ_6 VSS_6
1 2 M5 VDDQ_7 VSS_7 B25
C355 1 2 0.1U_0402_16V4Z P3 C21
C356 0.1U_0402_16V4Z VDDQ_8 VSS_8
1 2 P9 VDDQ_9 VSS_9 C22
C357 1 2 0.1U_0402_16V4Z T5 C24
C358 0.1U_0402_16V4Z VDDQ_10 VSS_10
1 2 V9 VDDQ_11 VSS_11 D6
C359 1 2 0.1U_0402_16V4Z W2 E24
C360 0.1U_0402_16V4Z VDDQ_12 VSS_12
1 2 W6 VDDQ_13 VSS_13 F2
C361 1 2 0.1U_0402_16V4Z W21 F23
C362 0.1U_0402_16V4Z VDDQ_14 VSS_14
1 2 W29 VDDQ_15 VSS_15 G1
C363 1 2 0.1U_0402_16V4Z AA12 J1
C364 0.1U_0402_16V4Z VDDQ_16 VSS_16
1 2 AA16 VDDQ_17 VSS_17 J8
+3VS +1.8VS C365 1 2 0.1U_0402_16V4Z AA19 L6
C366 0.1U_0402_16V4Z VDDQ_18 VSS_18
1 2 AC4 VDDQ_19 VSS_19 L8
C367 1 2 0.1U_0402_16V4Z AC23 M9
C368 0.1U_0402_16V4Z VDDQ_20 VSS_20
1 2 AD27 VDDQ_21 VSS_21 M12
D32 D33 D34
AE1 VDDQ_22 VSS_22 M15
2 1 2 1 2 1 AE9 VDDQ_23 VSS_23 M18
AE23 VDDQ_24 VSS_24 N13
+1.8VS AH29 N17
1N4148_SOT23
1N4148_SOT23 1N4148_SOT23 VDDQ_25 VSS_25
AJ2 VDDQ_26 VSS_26 P1
AJ6 VDDQ_27 VSS_27 P6
C369 1 2 1U_0402_6.3V4Z AJ26 P21
C370 1U_0402_6.3V4Z VDDQ_28 VSS_28
1 2 VSS_29 R12
C371 1 2 1U_0402_6.3V4Z M13 R15
C372 1U_0402_6.3V4Z VDD_1 VSS_30
2005/12/21 C373
1
1
2
2 1U_0402_6.3V4Z
M17
N12
VDD_2 VSS_31 R18
T6
C374 1U_0402_6.3V4Z VDD_3 VSS_32
1 2 N15 VDD_4 VSS_33 T9
C375 1 2 1U_0402_6.3V4Z N18 U13
C376 1U_0402_6.3V4Z VDD_5 VSS_34
+3VS +1.8VALW
1 2 220mA R13 VDD_6 VSS_35 U17
C377 1 2 0.1U_0402_16V4Z R17 V3
C378 0.1U_0402_16V4Z VDD_7 VSS_36
1 2 U12 VDD_8 VSS_37 V8
1 1 C379 1 2 0.1U_0402_16V4Z U15 V12
C381 C382 C380 0.1U_0402_16V4Z VDD_9 VSS_38
1 2 U18 VDD_10 VSS_39 V15
C383 1 2 0.1U_0402_16V4Z V13 V18
22U_0805_6.3V6M C384 0.1U_0402_16V4Z VDD_11 VSS_40
1 2 V17 VDD_12 VSS_41 V21
2 2 22U_0805_6.3V6M C385 0.1U_0402_16V4Z
1 2 VSS_42 W1
C386 1 2 0.1U_0402_16V4Z A2 W9
C387 0.1U_0402_16V4Z S5_3.3V_1 VSS_43
1 2 A7 S5_3.3V_2 VSS_44 Y29
C388 0.1U_0402_16V4Z

POWER
1 2 F1 S5_3.3V_3 VSS_45 AA11
C389 1 2 0.1U_0402_16V4Z J5 AA14
C390 0.1U_0402_16V4Z S5_3.3V_4 VSS_46
1 2 J7 S5_3.3V_5 VSS_47 AA18
K1 S5_3.3V_6 VSS_48 AC6
+3VALW AC24
VSS_49
G4 S5_1.8V_1 VSS_50 AD9
C391 1 2 10U_0805_10V4Z H1 AD23
C392 10U_0805_10V4Z S5_1.8V_2 VSS_51
1 2 H2 S5_1.8V_3 VSS_52 AE3
C393 1 2 0.1U_0402_16V4Z H3 AE27
C394 0.1U_0402_16V4Z S5_1.8V_4 VSS_53
1 2 VSS_54 AG6
C395 1 2 0.1U_0402_16V4Z A18 AJ1
C396 0.1U_0402_16V4Z USB_PHY_1.8V_1 VSS_55
1 2 A19 USB_PHY_1.8V_2 VSS_56 AJ25
C397 1 2 0.1U_0402_16V4Z B19 AJ29
USB_PHY_1.8V_3 VSS_57
B20 USB_PHY_1.8V_4
+1.8VALW B21
C398 1U_0402_6.3V4Z USB_PHY_1.8V_5
1 2 PCIE_VSS_1 D27
C399 1 2 1U_0402_6.3V4Z D28
C400 0.1U_0402_16V4Z PCIE_VSS_2
1 2 AA27 CPU_PWR PCIE_VSS_3 D29
C401 1 2 0.1U_0402_16V4Z F26
C402 0.1U_0402_16V4Z PCIE_VSS_4
1 2 +1.05VS AE11 V5_VREF PCIE_VSS_5 G23
PCIE_VSS_6 G24
C403 1 2 0.1U_0402_16V4Z A24 G25
C404 0.1U_0402_16V4Z 0.1U_0402_16V4Z AVDDCK PCIE_VSS_7
1 2 PCIE_VSS_8 H27
C405 1 2 0.1U_0402_16V4Z C406 1 2 A22 J23
C407 0.1U_0402_16V4Z NC PCIE_VSS_9
1 2 PCIE_VSS_10 J26
B22 AVSSCK PCIE_VSS_11 J28
PCIE_VSS_12 K27
V29 PCIE_VSS_42 PCIE_VSS_13 L22
+1.8VS V28 L23
D7 CH751H-40_SC76 PCIE_VSS_41 PCIE_VSS_14
V27 PCIE_VSS_40 PCIE_VSS_15 L24
+3VS 2 1 +V5_VREF V26 L27
PCIE_VSS_39 PCIE_VSS_16
1

0_0805_5% V25 L28


PCIE_VSS_38 PCIE_VSS_17
V24 PCIE_VSS_37 PCIE_VSS_18 M21
+5VS 1 2 V23 PCIE_VSS_36 PCIE_VSS_19 M24
R204 1K_0402_5% R205 V22 M27
PCIE_VSS_35 PCIE_VSS_20
U27 PCIE_VSS_34 PCIE_VSS_21 N27
2

T29 PCIE_VSS_33 PCIE_VSS_22 N28


2 2 C410 1 2 10U_0805_10V4Z +AVDD_CK T28 P22
C408 C409 PCIE_VSS_32 PCIE_VSS_23
T27 PCIE_VSS_31 PCIE_VSS_24 P23
C411 1 2 1U_0402_6.3V4Z T24 P24
1U_0603_10V4Z PCIE_VSS_30 PCIE_VSS_25
T21 PCIE_VSS_29 PCIE_VSS_26 P25
1 1
0.1U_0402_16V4Z C412 1 2 0.1U_0402_16V4Z P27 PCIE_VSS_28 PCIE_VSS_27 P26

218S4RASA11GS SB460_BGA549

+V5_VREF (20mils)
+AVDD_CK(40mils)

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SB450/POWER/GND
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 16 of 43
5 4 3 2 1

+3VALW +3VS +3VALW +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS
+3VS

1
R206 @ @ @ @
10K_0402_5% @ R207 R208 R209 R210 R211 R212 R213 R214 R215 R216 @
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% R217

2
10K_0402_5%

2
(13) AUTO_ON#
(14) AC_SDOUT
(13) RTC_CLK
D (13) SPDIF_OUT D
(13) PCI_CLK3_R
(13) PCI_CLK4_R
(13) PCI_CLK5_R (13) PCI_CLK2_R
(13) PCI_CLK6_R
(13)
(13)
PCI_CLK0_R
PCI_CLK1_R
Selects type of 48MHz
(13,27,28) LPC_FRAME#
clock pad

1
@ @ @ @
R218 R219 R220 R221 R222 R223 R224 R225 R226
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% R227
10K_0402_5%

2
REQUIRED STRAPS
ACPWRON

AUTO_ON# AC97_SDOUT RTC_CLK SPDIF_OUT CLK_PCI3 CLK_PCI4 CLK_PCI5 PCI_CLK6 PCI_CLK0 PCI_CLK1 LFRAME# CLK_PCI2

PULL MANUAL USE INTERNAL PU for 48Mhz USB PHY PCIE AUTO ROM TYPE THERMTRIP# Crystal Pad
HIGH PWR ON DEBUG RTC XTAL mode PWRDOWN detect ENABLE
Internal PLL CPU I/F = K8 H,H = PCI ROM
C STRAPS DISABLE C

DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT


H,L = LPC ROM I DEFAULT
PULL AUTO IGNORE EXTERNAL 48M OSC USB PHY External Forcing PCIE CPU I/F = P4 THERMTRIP# Clock input
LOW PWR DEBUG RTC (NOT mode PWRDOWN Clock to 2 lanes L,H = LPC ROM II DISABLE buffer
ON STRAPS SUPPORTED ENABLE (debug only)
DEFAULT W/ IT8712 ) DEFAULT DEFAULT DEFAULT L,L = FWH ROM DEFAULT

+3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS +3VS
1

1
R228 @ R229 @ R230 @ R231 @ R232 @ R233 @ R234 @ R235 @ R236 @ R237
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
2

2
(15,20) PIDE_DMACK#
(13,21,23,25) PCI_AD31
(13,21,23,25) PCI_AD30
(13,21,23,25) PCI_AD29
(13,21,23,25) PCI_AD28
(13,21,23,25) PCI_AD27
B B
(13,21,23,25) PCI_AD26
(13,21,23,25) PCI_AD25
(13,21,23,25) PCI_AD24
(13,21,23,25) PCI_AD23
1

1
Pop R634 when debug . @ R238 @
10K_0402_5%
R239 @
10K_0402_5%
R240 @
10K_0402_5%
R241 @
10K_0402_5%
R242
10K_0402_5%
R243
10K_0402_5%
R244
10K_0402_5%
R245
10K_0402_5%
R246 @
10K_0402_5%
R247
10K_0402_5%
2

2
DEBUG STRAPS
PIDE_DMACK# PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM


HIGH LONG PCI PLL ACPI PLL PCIE STRAPS Reserved
Reserved Reserved Reserved Reserved
RESET BCLK
DEFAULT

PULL USE USE PCI USE USE IDE USE DEFAULT


A PLL PLL PCIE STRAPS A
LOW SHORT ACPI
RESET BCLK
DEFAULT DEFAULT DEFAULT DEFAULT

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HARDWARE TRAP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 17 of 43
5 4 3 2 1
5 4 3 2 1

LCD POWER CIRCUIT

+3VALW +3VS
+LCDVDD
W=60mils

1
1
R249 C413
R248 100K_0402_5%
D 300_0402_5% 4.7U_0805_10V4Z D
2

12

3
D S
G
Q7 2 2 1 2 Q8 AOS 3413
2N7002_SOT23 G R250 1K_0402_5%
S 1 SI2301BDS_SOT23
C414 +LCDVDD

3
D
W=60mils

1
D 0.047U_0402_16V7K

1
R251 1 2
(8) NB_ENVDD 2 0_0402_5% 2 Q9
G 2N7002_SOT23 1 1
S C415 C416

3
4.7U_0805_10V4Z 0.1U_0402_16V4Z
R252 2 2
10K_0402_5%
2

+3VS

1
R253

4.7K_0402_5%
D8
BKOFF# 2 RB751V_SOD323 DISPOFF#

2
(28) BKOFF# 1

C C
2005/11/18
DAC_BRIG 1 2
C417 220P_0402_50V7K
INVT_PWM 1 2
C418 220P_0402_50V7K
DISPOFF# 1 2
C419 220P_0402_50V7K
LCD/PANEL BD. Conn.
JP4
+INVPWR_B+ DAC_BRIG
40 20 DAC_BRIG (28)
INVT_PWM
39 19 INVT_PWM (28)
DISPOFF#
38 18
+3VS 37 17 +LCDVDD
NB_EDID_CLK (60 MIL)
(8) NB_EDID_CLK 36 16
NB_EDID_DATA
(8) NB_EDID_DATA 35 15
EMC_NB_TZOUT0- 34 14 EMC_NB_TXOUT0-
(8) EMC_NB_TZOUT0- 33 13 EMC_NB_TXOUT0- (8)
EMC_NB_TZOUT0+ EMC_NB_TXOUT0+
(8) EMC_NB_TZOUT0+ 32 12 EMC_NB_TXOUT0+ (8)
EMC_NB_TZOUT1+ 31 11 EMC_NB_TXOUT1-
(8) EMC_NB_TZOUT1+ 30 10 EMC_NB_TXOUT1- (8)
EMC_NB_TZOUT1- EMC_NB_TXOUT1+
(8) EMC_NB_TZOUT1- 29 9 EMC_NB_TXOUT1+ (8)
EMC_NB_TZOUT2+ 28 8 EMC_NB_TXOUT2+
(8) EMC_NB_TZOUT2+ 27 7 EMC_NB_TXOUT2+ (8)
EMC_NB_TZOUT2- EMC_NB_TXOUT2-
(8) EMC_NB_TZOUT2- 26 6 EMC_NB_TXOUT2- (8)
EMC_NB_TZCLK- 25 5 EMC_NB_TXCLK-
(8) EMC_NB_TZCLK- 24 4 EMC_NB_TXCLK- (8)
EMC_NB_TZCLK+ EMC_NB_TXCLK+
(8) EMC_NB_TZCLK+ 23 3 EMC_NB_TXCLK+ (8)
B 22 2 B
21 1
ACES_88107-4000G

(SAME AS ACES_87216-4016)

+LCDVDD
+INVPWR_B+ +3VS

L24 2 1 B+
KC FBM-L11-201209-221LMAT_0805 1 1 1
C420 C421 C422
L25 2 1
KC FBM-L11-201209-221LMAT_0805 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z
2 2 2
1 1
C423 C424

680P_0603_50V7K 68P_0402_50V8K
2 2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LCD Connector
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 18 of 43
5 4 3 2 1
A B C D E

CRT Connector D10


@
D11
@
D12
@ +5VS
W=40mils
+R_CRT_VCC +CRT_VCC
DAN217_SC59 DAN217_SC59 DAN217_SC59
D9 F1 W=40mils

1
2 1 1 2

RB411D_SOT23 1.1A_6VDC_FUSE
+3VS
1
C425
0.1U_0402_16V4Z

3
+CRT_PULLUP 2
1 1

JP5
EMC_NB_CRT_R 1 2 CRT_R_L 6
(8) EMC_NB_CRT_R
L26 11
FCM2012C-800_0805 1
EMC_NB_CRT_G 1 2 CRT_G_L 7
(8) EMC_NB_CRT_G
L27 12
FCM2012C-800_0805 2
EMC_NB_CRT_B 1 2 CRT_B_L 8
(8) EMC_NB_CRT_B
L28 13
FCM2012C-800_0805 3

1
1 1 1 1 1 1 DDC_MD2 9
R254 R255 R256 C426 C427 C428 C430 C431 14
C429 4
75_0402_1% 75_0402_1% 75_0402_1% 6P_0402_50V8K 6P_0402_50V8K 10
2 2
6P_0402_50V8K 2
6P_0402_50V8K 6P_0402_50V8K 2 2 2
15
6P_0402_50V8K

2
1 5
C432
SUYIN_070549FR015S208CR
+CRT_VCC CRT_HSYNC_L
1 2 2 1 CRT_DECT (28)
L29 FCM1608C-121T_0603 2 R501 0_0402_5%
1 2 2 1 100P_0402_50V8J DSUB_12
C433 0.1U_0402_16V4Z R257 10K_0402_5% 1 2 CRT_VSYNC_L
L30 FCM1608C-121T_0603 1

1
U11
1 1 2006/02/07

OE#
CRT_HSYNC 2 4 CRT_HSYNC_B C436
(8) EMC_NB_CRT_HSYNC A Y C435 C434 2

G
10P_0402_50V8K 10P_0402_50V8K 68P_0402_50V8K DSUB_15
2 SN74AHCT1G125DCKR_SC70-5 2 2 2

3
+CRT_VCC 1

Place closed to chipset C437


1 2 68P_0402_50V8K
C438 0.1U_0402_16V4Z 2

1
U12

OE#
CRT_VSYNC 2 4 CRT_VSYNC_B
(8) EMC_NB_CRT_VSYNC A Y

G
SN74AHCT1G125DCKR_SC70-5 +CRT_VCC

3
Place closed to chipset
+3VS +3VS
+3VS

1
R258
4.7K_0402_5% R259 R260 4.7K_0402_5%
4.7K_0402_5% R261

2
G
2

2
4.7K_0402_5%

2
DSUB_12 1 3
NB_DDC_DATA (8)

S
Q10

2
2N7002_SOT23

G
DSUB_15 1 3 NB_DDC_CLK (8)

S
Q11
3 2N7002_SOT23 3

2005/10/18

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT & TV-OUT Connector
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 19 of 43
A B C D E
A B C D E F G H

1 1

+3VS
Place closed to Connector
PIDE_DIORDY 1 2
R265 @ 4.7K_0402_5%

PIDE_DREQ 1 2
R266 @ 5.6K_0402_5%
PIDE_INTRQ 1 2
R267 @ 10K_0402_5%
PIDE_DD7 1 2
R268 @ 10K_0402_5%
+5VS Placea caps. near ODD CONN. PIDE_DA[0..2]
(15) PIDE_DA[0..2]
0.1U_0402_16V4Z 10U_0805_10V4Z (15) PIDE_DD[0..15] PIDE_DD[0..15]
+5VS
1 1 1 1 1
C449 C451
0.1U_0402_16V4Z 10U_0805_10V4Z
C448 C450 C452
2 2 2 2 2
1 1 1 1 1
C453 C454 C455 C456 C457
2 1000P_0402_50V7K 1U_0603_10V4Z 10U_0805_10V4Z 2

2 2 2 2 2

1000P_0402_50V7K 1U_0603_10V4Z 10U_0805_10V4Z

ODD Conn. PATA HDD Conn.


JP8
JP7 2005/10/20 IDE_RESET# 1 2
PIDE_DD7 1 2 PIDE_DD8
1 1 2 2 3 3 4 4
3 4 PIDE_DD6 5 6 PIDE_DD9
IDE_RESET# 3 4 PIDE_DD8 PIDE_DD5 5 6 PIDE_DD10
(15) IDE_RESET# 5 5 6 6 7 7 8 8
PIDE_DD7 7 8 PIDE_DD9 PIDE_DD4 9 10 PIDE_DD11
PIDE_DD6 7 8 PIDE_DD10 PIDE_DD3 9 10 PIDE_DD12
9 9 10 10 11 11 12 12
PIDE_DD5 11 12 PIDE_DD11 PIDE_DD2 13 14 PIDE_DD13
PIDE_DD4 11 12 PIDE_DD12 PIDE_DD1 13 14 PIDE_DD14
13 13 14 14 15 15 16 16
PIDE_DD3 15 16 PIDE_DD13 PIDE_DD0 17 18 PIDE_DD15
+5VS PIDE_DD2 15 16 PIDE_DD14 17 18
17 17 18 18 19 19 20 20
PIDE_DD1 19 20 PIDE_DD15 PIDE_DREQ 21 22
19 20 (15) PIDE_DREQ 21 22
PIDE_DD0 21 22 PIDE_DREQ PIDE_DIOW# 23 24
21 22 PIDE_DREQ (15) (15) PIDE_DIOW# 23 24
2

23 24 PIDE_DIOR# PIDE_DIOR# 25 26
23 24 PIDE_DIOR# (15) (15) PIDE_DIOR# 25 26
PIDE_DIOW# 25 26 PIDE_DIORDY 27 28 PCSEL 1 2
(15) PIDE_DIOW# 25 26 (15) PIDE_DIORDY 27 28
100K_0402_5% R272 PIDE_DIORDY 27 28 PIDE_DMACK# PIDE_DMACK# 29 30 R271 475_0402_1%
(15) PIDE_DIORDY 27 28 PIDE_DMACK# (15,17) (15,17) PIDE_DMACK# 29 30
PIDE_INTRQ# 29 30 PIDE_INTRQ 31 32
(15) PIDE_INTRQ# 29 30 (15) PIDE_INTRQ# 31 32
PIDE_DA1 31 32 PIDE_PDIAG# 1 2 R269 +5VS PIDE_DA1 33 34 PIDE_PDIAG#
PIDE_DA0 31 32 PIDE_DA2 @ 100K_0402_5% PIDE_DA0 33 34 PIDE_DA2
1

33 33 34 34 35 35 36 36
(15) PIDE_CS1# PIDE_CS1# 35 36 PIDE_CS3# PIDE_CS3# (15) PIDE_CS1# 37 38 PIDE_CS3#
35 36 (15) PIDE_CS1# 37 38 PIDE_CS3# (15)
IDE_LED# 37 38 IDE_LED# 39 40
(28) IDE_LED# 37 38 39 40
+5VS 39 39 40 40 +5VS +5VS 41 41 42 42 +5VS
41 41 42 42 43 43 44 44
3 43 44 3
43 44 OCTEK_HDD-22SG1G_NR
45 45 46 46
1 2 47 47 48 48
R270 475_0402_1% 49 49 50 50
(NEW)
@ OCTEK_CDR-50JL1G

(NEW)
PIDE_PDIAG# 1 2
R273 10K_0402_5%

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ODD & SATA HDD Connector
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 20 of 43
A B C D E F G H
A B C D E

+S1_VCC +3VS
IDSEL:AD20
VPPD0
(22) VPPD0 (PIRQE#/B#,
VPPD1
(22) VPPD1
VCCD0# GNT#2,
+3VS (22) VCCD0#
40mil VCCD1#
(22) VCCD1# REQ#2)

M13

M12

G13
N13

N12

D12
H11

G1
C8

N4
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z S1_A[0..25]

A7

B4

K2

F3
L9
L6
S1_A[0..25] (22)
U13
1 1 1 1 1 1 1 S1_D[0..15]

VCCD1#
VCCD0#

VPPD1
VPPD0

VCCA2
VCCA1

VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
S1_D[0..15] (22)
C458 C459 C460 C461 C462 C463 C464

0.1U_0402_16V4Z
2 2 2 2 2 2 2
PCI_AD31 C2 B2 S1_D10
1 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z PCI_AD30 AD31 CAD31/D10 S1_D9 1
C1 AD30 CAD30/D9 C3
PCI_AD29 D4 B3 S1_D1
PCI_AD28 AD29 CAD29/D1 S1_D8
D2 AD28 CAD28/D8 A3
PCI_AD27 D1 C4 S1_D0 +3VS
PCI_AD26 AD27 CAD27/D0 S1_A0
E4 AD26 CAD26/A0 A6
PCI_AD25 E3 D7 S1_A1
PCI_AD24 AD25 CAD25/A1 S1_A2
E2 AD24 CAD24/A2 C7 1 1
PCI_AD23 F2 A8 S1_A3 C465 C466
PCI_AD[0..31] PCI_AD22 AD23 CAD23/A3 S1_A4
(13,17,23,25,31) PCI_AD[0..31] F1 AD22 CAD22/A4 D8
PCI_AD21 G2 A9 S1_A5 4.7U_0805_10V4Z 0.1U_0402_16V4Z
PCI_CBE#[0..3] PCI_AD20 AD21 CAD21/A5 S1_A6 2 2
(13,23,25,31) PCI_CBE#[0..3] G3 AD20 CAD20/A6 C9
PCI_AD19 H3 A10 S1_A25
PCI_AD18 AD19 CAD19/A25 S1_A7
H4 AD18 CAD18/A7 B10
PCI_AD17 J1 D10 S1_A24
PCI_AD16 AD17 CAD17/A24 S1_A17
J2 AD16 CAD16/A17 E12
PCI_AD15 N2 F10 S1_IOWR#
AD15 CAD15/IOWR# S1_IOWR# (22)
CLK_PCI_CB CLK_SD_48M PCI_AD14 M3 E13 S1_A9
PCI_AD13 AD14 CAD14/A9 S1_IORD# +S1_VCC
N3 AD13 CAD13/IORD# F13 S1_IORD# (22)

1
PCI_AD12 K4 F11 S1_A11
R274 R275 PCI_AD11 AD12 CAD12/A11 S1_OE#
M4 AD11 CAD11/OE# G10 S1_OE# (22)
@ 10_0402_5% @ 10_0402_5% PCI_AD10 K5 G11 S1_CE2# 1 1
+3VS AD10 CAD10/CE2# S1_CE2# (22)
PCI_AD9 L5 G12 S1_A10 C467 C468
PCI_AD8 AD9 CAD9/A10 S1_D15
M5 AD8 CAD8/D15 H12
SM_CD# PCI_AD7 S1_D7 0.1U_0402_16V4Z 0.1U_0402_16V4Z

2
1 2 1 1 K6 AD7 CAD7/D7 H10
R276 43K_0402_5% C469 C470 PCI_AD6 S1_D13 2 2
M6 AD6 CAD6/D13 J11
PCI_AD5 N6 J12 S1_D6
@ 15P_0402_50V8J @ 15P_0402_50V8J PCI_AD4 AD5 CAD5/D6 S1_D12
M7 AD4 CAD4/D12 K13
2 2 PCI_AD3 S1_D5
N7 J10

PCI Interface
PCI_AD2 AD3 CAD3/D5 S1_D11
L7 AD2 CAD2/D11 K10
PCI_AD1 S1_D4

CARDBUS
K7 AD1 CAD1/D4 K12
PCI_AD0 N8 L13 S1_D3
AD0 CAD0/D3
2 PCI_CBE#3 S1_REG# 2
E1 CBE3# CCBE3#/REG# B7 S1_REG# (22)
PCI_CBE#2 J3 A11 S1_A12
PCI_CBE#1 CBE2# CCBE2#/A12 S1_A8
N1 CBE1# CCBE1#/A8 E11
PCI_CBE#0 N5 H13 S1_CE1#
CBE0# CCBE0#/CE1# S1_CE1# (22)
PCI_RST# G4 B9 S1_RST
(13,15,23,25,27,28,31) PCI_RST# PCIRST# CRST#/RESET S1_RST (22)
(13,23,25,31) PCI_FRAME# J4 B11 S1_A23
FRAME# CFRAME#/A23 S1_A15
(13,23,25) PCI_IRDY# K1 IRDY# CIRDY#/A15 A12
(13,23,25,31) PCI_TRDY# K3 A13 S1_A22
TRDY# CTRDY#/A22 S1_A21
(13,23,25) PCI_DEVSEL# L1 DEVSEL# CDEVSEL#/A21 B13
L2 C12 S1_A20
(13,23,25) PCI_STOP# STOP# CSTOP#/A20
L3 C13 S1_A14
(13,23,25) PCI_PERR# PERR# CPERR#/A14
M1 A5 S1_WAIT#
(13,23,25) PCI_SERR# SERR# CSERR#/WAIT# S1_WAIT# (22)
(13,23,25) PCI_PAR M2 D13 S1_A13
PCI_REQ#2 PAR CPAR/A13 S1_INPACK#
(13) PCI_REQ#2 A1 PCIREQ# CREQ#/INPACK# B8 S1_INPACK# (22)
B1 C11 S1_WE#
(13) PCI_GNT#2 PCIGNT# CGNT#/WE# S1_WE# (22)
CLK_PCI_CB H1 B12 1 2 S1_A16
(13) CLK_PCI_CB PCICLK CCLK/A16 R277 33_0402_5%
L8 C5 S1_BVD1
RIOUT#_PME# CSTSCHG/BVD1_STSCHG# S1_BVD1 (22)
+3VS 1 2 L11 D5 S1_WP
SUSPEND# CCLKRUN#/WP_IOIS16# S1_WP (22)
R278 10K_0402_5%
PCI_AD20 1 2 F4 D11 S1_A19
R279 100_0402_5% IDSEL CBLOCK#/A19
K8 D6 S1_RDY# S1_CD2# S1_CD1#
(13) PCI_PIRQE# MFUNC0 CINT#/READY_IREQ# S1_RDY# (22)
R280 1 2 SD_PULLHIGH N9 2 2
(22) MS_PWREN# MFUNC1
0_0402_5% K9 M9 PCM_SPK# C471 C472
(13,25) PCI_PIRQH# MFUNC2 SPKROUT PCM_SPK# (32)
@ N10 B5 S1_BVD2
(13,27,28) SERIRQ MFUNC3 CAUDIO/BVD2_SPKR# S1_BVD2 (22)
SM_CD# L10 10P_0402_50V8K 10P_0402_50V8K
5IN1_LED# MFUNC4 S1_CD2# 1 1
(28) 5IN1_LED# N11 MFUNC5 CCD2#/CD2# A4 S1_CD2# (22)
M11 L12 S1_CD1#
MFUNC6 CCD1#/CD1# S1_CD1# (22)
SDOC# J9 D9 S1_VS2
(22) SDOC# MFUNC7 CVS2/VS2# S1_VS2 (22)
C6 S1_VS1
3 CVS1/VS1 S1_VS1 (22) 3
A2 S1_D2
PCI_RST# CRSV3/D2 S1_A18
M10 GRST# CRSV2/A18 E10
MFUNC5[3:0] = (0 1 0 1) J13 S1_D14
CRSV1/D14
MFUNC5[4] = 1
+VCC_SD E7
SD/MMC/MS/SM H7
VCC_SD MSINS# MS_INS# (22)
J8 XD_PWREN#
MSPWREN#/SMPWREN# XD_PWREN# (22)
SD_CD# E8 H8 MSBS_XDD1
(22) SD_CD# SDCD# MSBS/SMDATA1 MSBS_XDD1 (22)
SD_WP# F8 E9 MS_CLK R281 1 4IN1@ 2 33_0402_5%
(22) SD_WP# SDWP/SMWPD# MSCLK/SMRE# MSCLK_XDRE# (22)
SD_PWREN# G7 G9 MSD0_XDD2
(22) SD_PWREN# SDPWREN33# MSDATA0/SMDATA2 MSD0_XDD2 (22)
H9 MSD1_XDD6
MSDATA1/SMDATA6 MSD1_XDD6 (22)
CLK_SD_48M H5 G8 MSD2_XDD5
(12) CLK_SD_48M SDCLKI MSDATA2/SMDATA5 MSD2_XDD5 (22)
F9 MSD3_XDD3
MSDATA3/SMDATA3 MSD3_XDD3 (22)
R282 1 4IN1@ 2 33_0402_5% SD_CLK F6
(22) SDCK_XDWE# SDCLK/SMWE#
SDCM_XDALE E5
(22) SDCM_XDALE SDCMD/SMALE
SDDA0_XDD7 E6 H6
(22) SDDA0_XDD7 SDDAT0/SMDATA7 SMBSY# XD_BSY# (22)
SDDA1_XDD0 F7 J7 XD_CD#
(22) SDDA1_XDD0 SDDAT1/SMDATA0 SMCD# XD_CD# (22)
SDDA2_XDCL F5 J6 XD_WP#
(22) SDDA2_XDCL SDDAT2/SMCLE SMWP# XD_WP# (22)
SDDA3_XDD4 G6 J5
(22) SDDA3_XDD4 SDDAT3/SMDATA4 SMCE# XD_CE# (22)

2
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
G5 GND_SD R283
2.2K_0402_5%
C10
K11

CB714_LFBGA169 4IN1@
F12
M8
D3
H2

B6
L4

1
**CB714 use B0 version

4 4

CB714 P/N: SA007140B50


CB1410 P/N: SA014100310

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cardbus Controller CB714
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 21 of 43
A B C D E
A B C D E

PCMCIA Socket 1
JP9
GND
35 GND
S1_D3 2
S1_CD1# DATA3
(21) S1_CD1# 36 CD1#
S1_D4 3
+S1_VCC S1_D11 DATA4
37
PCMCIA Power Control S1_D5
S1_D12
4
38
DATA11
DATA5
S1_D6 DATA12
1 1 5 DATA6
+S1_VCC C473 C474 S1_D13 39
S1_D7 DATA13
6 DATA7
10U_0805_10V4Z 0.1U_0402_16V4Z S1_D14 40
2 2 S1_CE1# DATA14
1 U14
40mil (21) S1_CE1# S1_D15
7 CE1# 1
41 DATA15
13 S1_A10 8
VCC S1_CE2# ADD10
VCC 12 (21) S1_CE2# 42 CE2#
9 11 S1_OE# 9
12V VCC +S1_VPP (21) S1_OE# S1_VS1 OE#
(21) S1_VS1 43 VS1#
40mil S1_A11 10
+5VS +S1_VPP S1_IORD# ADD11
(21) S1_IORD# 44 IORD#
W=40mil 1 S1_A9 11
S1_IOWR# ADD9
VPP 10 (21) S1_IOWR# 45 IOWR#
1 1 C475 1 1 S1_A8 12
C476 0.1U_0402_16V4Z C478 C479 S1_A17 ADD8
5 5V 46 ADD17
C477 2 S1_A13
6 5V 13 ADD13
10U_0805_10V4Z 0.1U_0402_16V4Z S1_A[0..25] S1_A18 47
2 2 2 2 (21) S1_A[0..25] ADD18
0.1U_0402_16V4Z 1 VCCD0# 10U_0805_10V4Z S1_A14 14
VCCD0 VCCD0# (21) ADD14
2 VCCD1# (21) S1_D[0..15] S1_D[0..15] S1_A19 48
+3VS VCCD1 VCCD1# (21) ADD19
15 VPPD0 S1_WE# 15
VPPD0 VPPD0 (21) (21) S1_WE# WE#
14 VPPD1 S1_A20 49
VPPD1 VPPD1 (21) ADD20
W=40mil S1_RDY# 16
(21) S1_RDY# S1_A21 READY
3 3.3V 50 ADD21
1 1 4 3.3V OC 8 +S1_VCC 17 VCC
SHDN
C480 C481 51
GND

+S1_VCC VCC
+S1_VPP 18 VPP
10U_0805_10V4Z +S1_VPP 52 VPP
1

2 2
0.1U_0402_16V4Z CP2211FD3_SSOP16 S1_OE# S1_A16
1 2 +S1_VCC 19
16

R285 R284 43K_0402_5% S1_A22 ADD16


7

53 ADD22
10K_0402_5% S1_WP 2 1 S1_A15 20
+S1_VCC ADD15
R286 43K_0402_5% S1_A23 54
S1_RST S1_A12 ADD23
1 2 +S1_VCC 21 ADD12
R287 43K_0402_5% S1_A24
2

55 ADD24
S1_CE1# 1 2 +S1_VCC S1_A7 22
R288 43K_0402_5% S1_A25 ADD7
56 ADD25
S1_CE2# 1 2 +S1_VCC S1_A6 23
2 R289 43K_0402_5% S1_VS2 ADD6 2
(21) S1_VS2 57 VS2#
VCCD0# 1 2 S1_A5 24
R290 10K_0402_5% S1_RST ADD5
(21) S1_RST 58 RESET
VCCD1# 1 2 S1_A4 25
R291 10K_0402_5% S1_WAIT# ADD4
(21) S1_WAIT# 59 WAIT#
S1_A3 26
S1_INPACK# ADD3
(21) S1_INPACK# 60 INPACK#
S1_A2 27
+VCC_SD S1_REG# ADD2
(21) S1_REG# 61 REG#
S1_A1 28
S1_BVD2 ADD1
(21) S1_BVD2 62 BVD2
1 1 1 S1_A0 29
SD/MS Power Control C482
4IN1@
C483
4IN1@
C484
4IN1@ (21) S1_BVD1
S1_BVD1
S1_D0
63
30
ADD0
BVD1 (NEW)
XD Power Control 10U_0805_10V4Z
2 2
0.1U_0402_16V4Z
2
S1_D8
S1_D1
64
31
DATA0
DATA8
0.1U_0402_16V4Z S1_D9 DATA1
65 DATA9 GND 69
+3VS S1_D2 32 70
+3VS S1_D10 DATA2 GND
40mil S1_WP
66 DATA10
xD PU and PD. Close to Socket (21) S1_WP 33 WP
2

+3VS +VCC_XD S1_CD2# 67


(21) S1_CD2# CD2#
2

R292 +3VS +VCC_XD 34


R293 U15 10K_0402_5% GND
68 GND
10K_0402_5% 1 8 4IN1@ 2 1 XD_CD#
4IN1@ GND OUT R294 4IN1@ 43K_0402_5% SANTA_130601-7_LT
2 IN OUT 7 1 1
C485 C486
1

3 IN OUT 6
XD_PWREN# SDOC# +VCC_XD 4IN1@
1

4 5
(21) XD_PWREN# EN# FLG SDOC# (21)
4IN1@ 0.1U_0402_16V4Z 4 IN 1 Socket
1

G528_SO8 2
10U_0805_10V4Z 2
(HDQ70)
1

4IN1@ R295 1 2 MSCLK_XDRE# JP10


R297 300_0402_5% R296 4IN1@ 2.2K_0402_5%
0_0402_5% 4IN1@ 1 2 SDCK_XDWE# +VCC_XD 34 14 +VCC_SD
3 R298 4IN1@ 2.2K_0402_5% XD-VCC SD-VCC 3
4IN1@ 4 IN 1 CONN MS-VCC 3
XD_CE#
12

D 1 2
R299 4IN1@ 2.2K_0402_5%
2

SD / MMC / MS(PRO) / XD
SD_PWREN# XD_PWREN# 2 Q12 1 2 XD_BSY# SDDA1_XDD0 26 15 SDCK_XDWE#
(21) SD_PWREN# (21) SDDA1_XDD0 XD-D0 SD-CLK
G 2N7002_SOT23 R300 4IN1@ 2.2K_0402_5% MSBS_XDD1 27 16 SDDA0_XDD7
(21) MSBS_XDD1 XD-D1 SD-DAT0
S 4IN1@ MSD0_XDD2 28 17 SDDA1_XDD0
(21) MS_PWREN# (21) MSD0_XDD2 XD-D2 SD-DAT1
MSD3_XDD3 SDDA2_XDCL
3

(21) MSD3_XDD3 29 XD-D3 SD-DAT2 11


SDDA3_XDD4 30 12 SDDA3_XDD4
(21) SDDA3_XDD4 XD-D4 SD-DAT3
MSD2_XDD5 31 13 SDCM_XDALE
(21) MSD2_XDD5 XD-D5 SD-CMD
MSD1_XDD6 32 2 SD_CD#
(21) MSD1_XDD6 XD-D6 SD-CD-SW SD_CD# (21)
SDDA0_XDD7 33 35 SD_WP#
(21) SDDA0_XDD7 XD-D7 SD-WP-SW SD_WP# (21)
Reserve for SD,MS CLK.
Close to Socket (21) SDCK_XDWE#
SDCK_XDWE# 24 4 MSCLK_XDRE#
XD_WP# XD-WE MS-SCLK MSD0_XDD2
+VCC_XD 1 2 +VCC_SD (21) XD_WP# 25 XD-WP MS-DATA0 8
R301 0_0603_5% SDCK_XDWE# 1 2 4IN1@ SDCM_XDALE 23 9 MSD1_XDD6
(21) SDCM_XDALE XD-ALE MS-DATA1
4IN1@ C487 10P_0402_50V8K XD_CD# 18 7 MSD2_XDD5
(21) XD_CD# XD-CD MS-DATA2
XD_BSY# 19 5 MSD3_XDD3
(21) XD_BSY# XD-R/B MS-DATA3
MSCLK_XDRE# 1 2 4IN1@ MSCLK_XDRE# 20 6 MS_INS#
(21) MSCLK_XDRE# XD-RE MS-INS MS_INS# (21)
C488 10P_0402_50V8K XD_CE# 21 10 MSBS_XDD1
(21) XD_CE# XD-CE MS-BS
SDDA2_XDCL 22
(21) SDDA2_XDCL XD-CLE
4IN1-GND 1
4IN1-GND 36

TAITW_R007-520-L3
4IN1@

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCMCIA Socket
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 22 of 43
A B C D E
5 4 3 2 1

PCI_AD[0..31]
(13,17,21,25,31) PCI_AD[0..31]
R302 1 2 3.6K_0402_5% +3VALW PIN 8100CL(10/100 LAN) 8110SBL(10/100/1000 LAN)
U16 U17
PCI_AD0 104 108 LAN_EEDO 4 5 1 RSET 5.6K 2.49K
PCI_AD1 AD0 EEDO LAN_EEDI DO GND
103 AD1 AUX/EEDI 109 3 DI NC 6
PCI_AD2 102 111 LAN_EECLK 2 7 C489 0.1U_0402_16V4Z
PCI_AD3 AD2 EESK LAN_EECS SK NC
D 98 AD3 EECS 106 1 CS VCC 8 +3VALW D
PCI_AD4 2
97 AD4 BOM structure 8100CL(10/100 LAN) 8110SBL(10/100/1000 LAN)
PCI_AD5 96 117 ACTIVITY# AT93C46-10SI-2.7_SO8
PCI_AD6 AD5 LED0 LINK_100# LAN_ACTIVITY# (24)
95 AD6 LED1 115 1 2 LAN_LINK# (24) 8100C@ Stuff No_Stuff
PCI_AD7 93 114 R303 0_0402_5%
PCI_AD8 AD7 LED2 LINK_1000#
90 AD8 NC/LED3 113 2 1 8110S@ No_Stuff Stuff
PCI_AD9 89 R304 @ 0_0402_5%
PCI_AD10 AD9 LAN_MDI0+
IDSEL:AD22 87 AD10 TXD+/MDI0+ 1 LAN_MIDI0+ (24) @ No_Stuff No_Stuff
PCI_AD11 86 2 LAN_MDI0-
(PIRQG#, AD11 TXD-/MDI0- LAN_MIDI0- (24)
PCI_AD12 85 5 LAN_MDI1+
AD12 RXIN+/MDI1+ LAN_MIDI1+ (24)
GNT#1, PCI_AD13 83 6 LAN_MDI1-
AD13 RXIN-/MDI1- LAN_MIDI1- (24)
PCI_AD14 82
REQ#1) PCI_AD15 79
AD14
14
PCI_AD16 AD15 NC/MDI2+
59 AD16 NC/MDI2- 15
PCI_AD17 58 18
PCI_AD18 AD17 NC/MDI3+
57 AD18 NC/MDI3- 19
PCI_AD19 55
PCI_AD20 AD19 LAN_X1
53 AD20 X1 121
PCI_AD21 50 122 LAN_X2
PCI_AD22 AD21 X2
49 AD22

PCI I/F
PCI_AD23 47 105 R305 1 2 1K_0402_5%
PCI_AD24 AD23 LWAKE R306 +3VS
43 AD24 ISOLATE# 23 1 2 15K_0402_5%
PCI_AD25 42 127 1 2 8100C@ 5.6K_0603_1% RSET 5.6K for 8100CL
PCI_AD26 AD25 RTSET R307
40 72
PCI_AD27 39
AD26 NC/SMBCLK
74 1 2 8110S@ 2.49K_0603_1% 2.49K for 8110S(B)
PCI_AD28 AD27 NC/SMBDATA R308
37 AD28
PCI_AD29 36 88
PCI_AD30 AD29 NC/M66EN R309 0_0805_5%
PCI_AD31
34 AD30 +LAN_AVDDH
20mils
33 AD31 NC/AVDDH 10 1 2 +3VALW
C 120 1 8110S@ C
AVDDH 8110S@
(13,21,25,31) PCI_CBE#0 92 C/BE#0 1
77 11 2 1 C491 C490 +3VALW +3VALW
(13,21,25,31) PCI_CBE#1 C/BE#1 NC/HSDAC+
60 123 R310 0_0402_5% 8110S@ 0.1U_0402_16V4Z C492
(13,21,25,31) PCI_CBE#2 C/BE#2 NC/HG 2
44 124 8110S@ 0.1U_0402_16V4Z 1U_0603_10V4Z
(13,21,25,31) PCI_CBE#3 C/BE#3 NC/LG2 2
2 1 8110S@
PCI_AD22 1 2 LAN_IDSEL 46 2SB1197K_SOT23
IDSEL

3
R311 100_0402_5% E

3
(13,21,25) PCI_PAR 76 PAR
LAN I/F E
+2.5V_LAN
CTRL12 2 Q13 +1.2V_LAN
61 9 CTRL25 2 Q14 B
(13,21,25,31) PCI_FRAME# FRAME# NC/VSS B C
63 13 2SB1197K_SOT23 40mils
(13,21,25) PCI_IRDY# IRDY# NC/VSS C

1
(13,21,25,31) PCI_TRDY# 67 TRDY#

1
(13,21,25) PCI_DEVSEL# 68 DEVSEL# Y4
40mils
(13,21,25) PCI_STOP# 69 STOP# NC/GND 22
48 LAN_X1 1 2 LAN_X2 1 1 1
NC/GND C494
(13,21,25) PCI_PERR# 70 PERR# NC/GND 62
75 73 1 25MHZ_20P 1 C493 8110S@ C495
(13,21,25) PCI_SERR# SERR# NC/GND
112 4.7U_0805_10V4Z 4.7U_0805_10V4Z
NC/GND C496 C497 2 2 0.1U_0402_16V4Z
2
(13) PCI_REQ#1 30 REQ# NC/GND 118
29 27P_0402_50V8J 27P_0402_50V8J 8110S@
(13) PCI_GNT#1 GNT# 2 2

(13) PCI_PIRQG# 25 INTA#


8 CTRL25
CTRL25
(25,28) LAN_PME# 31 PME#
125 CTRL12
CTRL12
(13,15,21,25,27,28,31) PCI_RST# 27 RST#
VDD33 26 +3VALW
CLK_PCI_LAN 28 41 1 1 1 1 1
(13) CLK_PCI_LAN CLK VDD33
PM_CLKRUN# 65 56
B (13,25,27) PM_CLKRUN# CLKRUN# VDD33 C498 C499 C500 C501 C502 B
VDD33 71
84 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VDD33 2 2 2 2 2
VDD33 94
R312 0_0805_5%
VDD33 107
4 +LAN_AVDDL 1 2 +3VALW
GND/VSS 8100C@
17 GND/VSS 1 1 1 1 40mils
128 GND/VSS C503 C504 C505 C506 R313 0_0805_5%
AVDDL 3
7 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2
AVDDL R314 0_0402_5% 2 2 2 2 +2.5V_LAN
21 20 8110S@
CLK_PCI_LAN GND/VSSPST AVDDL +LAN_AVDDL25
38 GND/VSSPST AVDDL 16 1 2 +2.5V_LAN
51 20mils 8110S@
GND/VSSPST
1

R316 0_0805_5%
66 GND/VSSPST VDD12 126
10_0402_5% 81 32 +LAN_DVDD 1 2
GND/VSSPST VDD12 +1.2V_LAN
@ 91 54 1 1 1 1 40mils 8110S@
R315 GND/VSSPST VDD12
101 GND/VSSPST VDD12 78
C507 C508 C509 C510 R317 0_0805_5%
119 GND/VSSPST VDD12 99
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2

1 1 2 +2.5V_LAN
2 2 2 2 8100C@
Power

C511 35 24 +1.2V_LAN
GND NC/VDD12
18P_0402_50V8J 52 GND NC/VDD12 45 2 2 2 2 2
2 C512 C513 C514 C515 C516
@ 80 GND NC/VDD12 64
100 GND NC/VDD12 110
116 8110S@ 8110S@ 0.1U_0402_16V4Z 8110S@ 8110S@ 0.1U_0402_16V4Z
NC/VDD12 1 1 1 1 1 8110S@
0.1U_0402_16V4Z R318 0.1U_0402_16V4Z
12 V_12P 1 2 +2.5V_LAN 0.1U_0402_16V4Z
NC 8100C@ 0_0402_5%
RTL8110SBL_LQFP128
20mils 1 C517 R319 1 +LAN_AVDDH
A 2 A
8100C@ 8110S@ 0_0402_5%
0.1U_0402_16V4Z
2
RTL8110SBL change to Ver.D

8100CL(10/100 LAN) P/N:SA081000310 ver.A.2 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/07/29 Deciphered Date 2006/07/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8110SBL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 23 of 43
5 4 3 2 1
5 4 3 2 1

LAN RTL8100CL
D D

1 2

C710
220P_0402_50V7K

JP11
LAN_ACTIVITY# 12
(23) LAN_ACTIVITY# Yellow LED-
T1 R320 2 1 300_0402_5% 11
+3VALW Yellow LED+
(23) LAN_MIDI1- LAN_MIDI1- 1 16 RJ45_MDI1- RJ45_MDI3- 8
LAN_MIDI1+ RD+ RX+ RJ45_MDI1+ PR4-
(23) LAN_MIDI1+ 2 RD- RX- 15
3 14 MCT3 RJ45_MDI3+ 7
C CT CT PR4+ C
4 NC NC 13
5 12 RJ45_MDI1- 6
NC NC MCT4 PR2-
6 CT CT 11
(23) LAN_MIDI0- LAN_MIDI0- 7 10 RJ45_MDI0- RJ45_MDI2- 5
TD+ TX+ PR3-
1

(23) LAN_MIDI0+ LAN_MIDI0+ 8 9 RJ45_MDI0+


R328 TD- TX- RJ45_MDI2+
49.9_0402_1% 4 PR3+
1

49.9_0402_1% C724
R329 49.9_0402_1% 49.9_0402_1%1 0.1U_0402_16V4Z LF-H80P_16P RJ45_MDI1+ 3
1 PR2+

1
R330 R331 R332 R333 RJ45_MDI0-
2

2 PR1-
C723 14
C5271 2 2 0.1U_0402_16V4Z 75_0402_1% 75_0402_1% RJ45_MDI0+ SHLD2
2

1 PR1+
SHLD1 13
C5281 LAN_LINK#

2
@ (23) LAN_LINK# 10 Green LED-
0.1U_0402_16V4Z
2 R327
+3VALW 2 1 300_0402_5% 9 Green LED+
0.1U_0402_16V4Z
2 SUYIN_100073FR012G101ZL
1 2
RJ45_MDI3+ R334 1 2 0_0402_5%
RJ45_MDI3- R335 1 2 0_0402_5% C711
220P_0402_50V7K
RJ45_MDI2+ R336 1 2 0_0402_5%
RJ45_MDI2- R337 1 2 0_0402_5% RJ45_GND 1 2 LANGND
1 1

1
C520 C526
reseved for RTL8100CL(10/100) R338 R339 1000P_1206_2KV7K C525
4.7U_0805_10V4Z
75_0402_1% 75_0402_1% 2 2
B B
RJ45_GND 2006/03/27 0.1U_0402_16V4Z

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/07/29 Deciphered Date 2006/07/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN Magnetic & RJ45/RJ11
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 24 of 43
5 4 3 2 1
A B C D E

+3VS +1.5VS +3VALW

+3VALW
+5VS +3VS
1 1 1 1 1 1
W=40mils C529 C530 C531 C532 C533 C534
0.1U_0402_16V4Z 1000P_0402_50V7K 0.1U_0402_16V4Z MINI1@ MINI1@ MINI1@ MINI1@ MINI1@ MINI1@
4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2
1 1 1 1 1 1 1 1 1 1 1
C538
C535 C536 C537 C539 C540 C541 C542 C543 C544 C545
10U_0805_10V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2 2 2 JP12
MINI_WAKE# 1 2 +3VS
1 1000P_0402_50V7K (14) MINI_WAKE# 1 2 1
1000P_0402_50V7K 1000P_0402_50V7K 0.1U_0402_16V4Z WLAN_BT_DATA 3 4
WLAN_BT_CLK 3 4
5 5 6 6 +1.5VS
(12) MINI1_CLKREQ# 7 7 8 8
9 9 10 10
(12) CLK_PCIE_MINI1# 11 11 12 12
(12) CLK_PCIE_MINI1 13 13 14 14
15 15 16 16

17 17 18 18
PCI_AD[0..31] 19 20 MINI1_OFF#
PCI_AD[0..31] (13,17,21,23,31) 19 20 MINI1_OFF# (28)
IDSEL:AD18 21 21 22 22 PCI_RST# (13,15,21,23,27,28,31)
(7) PCIE_WLAN_C_RX_N1 23 24 +3VALW
(PIRQF/H#, JP13 25
23 24
26
TIP RING (7) PCIE_WLAN_C_RX_P1 25 26
GNT#3, 1 1 2 2 27 27 28 28
29 30 SB_SMBCLK SB_SMCLK (10,11,12,14)
REQ#3) 3
KEY KEY
4 31
29 30
32 SB_SMBDATA
3 4 (7) PCIE_WLAN_C_TX_N1 31 32 SB_SMDATA (10,11,12,14)
5 5 6 6 (7) PCIE_WLAN_C_TX_P1 33 33 34 34
7 7 8 8 35 35 36 36
9 10 37 38
D16
11
9
11
10
12 12 39
37
39
38
40 40 2006/03/07
WL_OFF# 1 2 13 14 41 42
(28) WL_OFF# 13 14 41 42
RB751V_SOD323 15 16 43 44 (MINI1_LED#)
15 16 43 44
(13,21) PCI_PIRQH# 17 17 18 18 W=40mils +5VS 45 45 46 46
+3VS W=40mils 19 19 20 20 PCI_PIRQF# (13) 47 47 48 48
21 21 22 22 49 49 50 50
23 23 24 24 W=40mils +3VALW 51 51 52 52
CLK_PCI_MINI 25 26
(13) CLK_PCI_MINI 25 26 PCI_RST# (13,15,21,23,27,28,31)
W=40mils

G1
G2
G3
G3
27 27 28 28 +3VS
PCI_REQ#3 29 30 PCI_GNT#3
(13) PCI_REQ#3 29 30 PCI_GNT#3 (13)
31 32 FOX_AS0B226-S99N-7F

53
54
55
56
PCI_AD31 31 32 MINI1@
33 33 34 34 MINI_PME# (23,28)
2 PCI_AD29 WLAN_BT_CLK 2
35 35 36 36 WLAN_BT_CLK (30)
37 38 PCI_AD30
PCI_AD27 37 38
39 39 40 40
PCI_AD25 41 42 PCI_AD28
WLAN_BT_DATA 41 42 PCI_AD26
(30) WLAN_BT_DATA 43 43 44 44
45 46 PCI_AD24
(13,21,23,31) PCI_CBE#3 45 46
CLK_PCI_MINI PCI_AD23 47 48 MINI_IDSEL1 1 2 R340 PCI_AD18
47 48 100_0402_5%
49 49 50 50
PCI_AD21 51 52 PCI_AD22
51 52
1

PCI_AD19 53 54 PCI_AD20
R341
PCI_AD17
55
53
55
54
56 56
PCI_AD18
PCI_PAR (13,21,23) 2006/03/29 audy mirror L54
57 58
@ 10_0402_5%
(13,21,23,31) PCI_CBE#2
PCI_CBE#2
PCI_IRDY#
59
57
59
58
60 60 PCI_AD16
+3VS
R506/507 ADD @
(13,21,23) PCI_IRDY# 61 61 62 62
PCI_FRAME#
2

1 63 63 64 64 PCI_FRAME# (13,21,23,31)
C546 65 66 PCI_TRDY#
(13,23,27) PM_CLKRUN# 65 66 PCI_TRDY# (13,21,23,31)
PCI_SERR# 67 68 PCI_STOP#
@ 10P_0402_50V8K (13,21,23) PCI_SERR#
2
69
67
69
68
70 70
PCI_STOP# (13,21,23)
USB CAM 1 0.1U_0402_16V4Z @
PCI_PERR# 71 72 PCI_DEVSEL# R506 0_0402_5%
(13,21,23) PCI_PERR# 71 72 PCI_DEVSEL# (13,21,23)
PCI_CBE#1 73 74 C727 1 2
(13,21,23,31) PCI_CBE#1 PCI_AD14 73 74 PCI_AD15
75 75 76 76
PCI_AD13 JP37 2 L54
77 77 78 78
PCI_AD12 79 80 PCI_AD11 1 1 2 USBP2-
79 80 1 1 2 USBP2- (14)
PCI_AD10 81 82 2 USBP2-_L
81 82 PCI_AD9 2 USBP2+_L
83 83 84 84 3 3
PCI_AD8 85 86 PCI_CBE#0 4 4 3 USBP2+
85 86 PCI_CBE#0 (13,21,23,31) 4 4 3 USBP2+ (14)
PCI_AD7 87 88 5
87 88 PCI_AD6 5
89 89 90 90 GND1 6
PCI_AD5 91 92 PCI_AD4 7 WCM2012F2S-900T04_0805
91 92 PCI_AD2 GND2
93 93 94 94 1 2
PCI_AD3 95 96 PCI_AD0 ACES_88266-05001
95 96 R507 0_0402_5%
+5VS W=40mils 97 97 98 98
3 PCI_AD1 99 100 @ 3
99 100
101 101 102 102
103 103 104 104
105 105 106 106
107 107 108 108
109 109 110 110
111 111 112 112
113 113 114 114
115 115 116 116
117 117 118 118
119 119 120 120
121 121 122 122
+5VS 123 123 124 124 +3VALW
W=30mils P-TWO_A53921-A0G16-P
W=20mils

(Change to SP070003200)

4 4
Mini Card Power Rating
Power Primary Power (mA) Auxiliary Power (mA)
Peak Normal Normal
+3VS 1000 750
+3VALW
Security Classification Compal Secret Data Compal Electronics, Inc.
330 250 250 (wake enable) 2005/06/20 2006/06/20 Title
Issued Date Deciphered Date
+1.5VS 500 375 5 (Not wake enable)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MINI-PCI Slot (WLAN)
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 25 of 43
A B C D E
A B C D E

1 1

2 2

USB CONN. 1 & 2


+USB_VCCA

+USB_VCCA
W=80mils
1
1
+ C548 C550

150U_D_6.3VM 470P_0402_50V7K
2 2
2005/09/06
JP15
@
1
1 2 2
R489 0_0402_5%
3
L49 4
USB20_N0 2 1 SUYIN_020173MR004S312ZL
(14) USBP0- 2 1 USB20_N0_L
USB20_P0_L
USB20_P0 3 4 ECQ60
(14) USBP0+ 3 4
WCM2012F2S-900T04_0805

1 2
R490 0_0402_5%
3 3

+3VALW
@
1207 DEL
+5VALW
1

+USB_VCCA
U18
1 8 R342
GND OUT 100K_0402_5%
2 IN OUT 7
3 IN OUT 6
R343
2

1 4 EN# FLG 5
C552 10K_0402_5%
G528_SO8 1 2 USB_OC2# (14)
4.7U_0805_10V4Z 1
2 C553

USB_EN# 0.1U_0402_16V4Z
(28,30) USB_EN# 2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NEW CARD SOCKET
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B HCL51 LA-3211P 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 26 of 43
A B C D E
SUPER I/O SMsC LPC47N207
+3VS

0.1U_0402_16V4Z

1 1 1
C574 C575 C576
FIR@ FIR@ FIR@
0.1U_0402_16V4Z
2 2 2

0.1U_0402_16V4Z

+3VS

17
31
42
60

48
5
U21

3.3V
3.3V
3.3V
3.3V
3.3V

VTR
LPC_AD0 64
(13,28) LPC_AD0 LAD0 +3VS
LPC_AD1 2 27
(13,28)
(13,28)
(13,28)
LPC_AD1
LPC_AD2
LPC_AD3
LPC_AD2
LPC_AD3
4
7
LAD1
LAD2
LAD3
GPIO10
GPIO11
GPIO12/IO_SMI#
28
30 1 2
1207 DEL
32 R358 FIR@ 10K_0402_5%
GPIO13/IRQIN1
GPIO14/IRQIN2 33 1 2
10 34 R360 FIR@ 10K_0402_5%
LPC_CLK_33 GPIO15
12 LDRQ1# GPIO16 35
LPC_DRQ#0 24 36
(13) LPC_DRQ0# LPC_FRAME# LDRQ0# GPIO17

GPIO
(13,17,28) LPC_FRAME# 14 LFRAME# GPIO30 38
PM_CLKRUN#

LPC I/F
(13,23,25) PM_CLKRUN# 16 CLKRUN# GPIO31 39
SERIRQ 19 40
(13,21,28) SERIRQ CLK_PCI_SIO SERIRQ GPIO32
(13) CLK_PCI_SIO 21 PCI_CLK GPIO33 41
PCI_RST# 22 43
(13,15,21,23,25,28,31) PCI_RST# PCIRST# GPIO34
CLK_14M_SIO 23 44
(12) CLK_14M_SIO SIO_14M GPIO35
1 2 SIO_PD# 25 46
+3VS R361 1 FIR@ 210K_0402_5% SIO_PME# LPCPD# GPIO36
+3VS 47 IO_PME# GPIO37 61
R362 FIR@ 10K_0402_5%

63 52 RXD1
DLAD0 RXD1 TXD1
SERIAL I/F

1 DLAD1 TXD1 53
3 54 DSR#1
DLAD2 DRSR1# RTS#1
6 DLAD3 RTS1#/SYSOPT0 55 1 2
CTS#1 R364 FIR@ 10K_0402_5%
DLPC I/F

CTS1# 56
57 DTR#1 1 2
DTR1#/SYSOPT1 RI#1 R365 FIR@ 10K_0402_5%
9 DLPC_CLK_33 RI1# 58
11 59 DCD#1
DLDRQ1# DCD1#
13 DLFRAME#
15 49 IRTXOUT
DCLKRUN# IRTX2 IRRX
18 DSER_IRQ IRRX2 50 1 2
IRMODE R366 FIR@
IR

26 DSIO_14M IRMODE/IRRX3 51
10K_0402_5%
GND0
GND1
GND2
GND3
GND4
GND5

LPC47N207-JN_STQFP64
20
29
37
45
62

FIR@
8

RTS#1
Base I/O Address
CLK_14M_SIO CLK_PCI_SIO * 0 = 02Eh
1 = 04Eh
2

R367 R368
@ 10_0402_5% @ 33_0402_5%
1

2 2
C578 C579 +IR_ANODE
@ 15P_0402_50V8J @ 22P_0402_50V8J
1 1
+3VS 1 FIR@ 2
R369 0_1206_5%
1 1 FIR@ 2
C580 R370 0_1206_5%
FIR@

FIR Module 2
4.7U_0805_10V4Z
W=60mil
Place on the BOT side(near MINIPCI conn.)
IR1
+5VS 1
JP19 +IR_3VS IRED_A IRTXOUT
2 IRED_C TXD 3 T = 12mil
+3VS IRRX 4 5 T = 12mil IRMODE
1 RP23 RXD SD/MODE
2 +3VS 1 FIR@ 2 +IR_3VS 6 VCC MODE 7
RXD1 DSR#1 1 8 R371 W=40mil 8
TXD1 3 CTS#1 47_1206_5% GND
4 2 7 1 1
DSR#1 RI#1 3 6 C581 C582 TFDU6102-TR3_8P
RTS#1 5 DCD#1 FIR@ FIR@
6 4 5 FIR@
CTS#1 10U_0805_10V4Z 0.1U_0402_16V4Z
DTR#1 7 4.7K_1206_8P4R_5% 2 2
RI#1 8 FIR@
DCD#1 9
10
ACES_85201-10051
@

For SW debug use when no seial port

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SIO1036 & FIR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 27 of 43
5 4 3 2 1

+3VALW
KBA[0..19]
KBA[0..19] (29) L35 +3VALW For EC Tools
ADB[0..7] 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2+EC_VCCA
ADB[0..7] (29) +3VALW
1 1 C584 1 1 2 2 FBM-L11-160808-800LMT_0603 20mil
C583 1 JP20
C585 C586 C587 C588 20mil KSI[0..7] 1
KSI[0..7] (29,30) 1
1000P_0402_50V7K 1000P_0402_50V7K C589 1 1 2 E51_RXD
L36 2 2 2 2 1 1 C590 C591 KSO[0..15] 2 E51_TXD
KSO[0..15] (29) 3 3
2

ECAGND
1 2 ECAGND 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 4
FBM-L11-160808-800LMT_0603 0.1U_0402_16V4Z 1U_0603_10V4Z 4
20mil 2 2 @ ACES_85205-0400

123
136
157
166

161

159
D D

16
34
45

95

96
U22
LPC_AD0 15

VCCA
VCC
VCC
VCC
VCC
VCC
VCC
VCC

AGND

BATGND
VCCBAT
(13,27) LPC_AD0 LAD0
C592 LPC_AD1 14 49 KSO0
(13,27) LPC_AD1 LAD1 GPOK0/KSO0
@ 22P_0402_50V8J LPC_AD2 13 50 KSO1 Analog Board ID definition, SKU ID definition,
(13,27) LPC_AD2 LAD2 GPOK1/KSO1
2 1 R372 2 1 @ 33_0402_5% LPC_AD3 10 51 KSO2
(13,27) LPC_AD3 LAD3 GPOK2/KSO2 KSO3 Please see page 3. Please see page 3.
(13,17,27) LPC_FRAME# 9 LFRAME# LPC Interface GPOK3/KSO3 52
KSO4
(13,15,21,23,25,27,31) PCI_RST# 165 LRST#/GPIO2C GPOK4/KSO4 53

ENE-KB910-B4
18 56 KSO5
(13) CLK_PCI_LPC LCLK GPOK5/KSO5
7 57 KSO6 +3VALW +3VALW
(13,21,27) SERIRQ SERIRQ GPOK6/KSO6 KSO7
25 CLKRUN#/GPIO0C * GPOK7/KSO7 58
24 59 KSO8
(30) 3G_LED# LPCPD#/GPIO0B * GPOK8/KSO8

2
+3VALW 60 KSO9
FRD# GPOK9/KSO9 KSO10 R373 R374
(29) FRD# 150 RD# GPOK10/KSO10 61

Internal Keyboard
FWR# 151 64 KSO11 Ra 100K_0402_5% Rc 100K_0402_5%
(29) FWR# WR# GPOK11/KSO11
2

FSEL# 173 65 KSO12


(29) FSEL# MEMCS# GPOK12/KSO12
R375 SELIO# 152 66 KSO13
10K_0402_5% ADB0 IOCS# GPOK13/KSO13 KSO14 AD_BID0 SKU_ID

1
138 D0 GPOK14/KSO14 67
ADB1 139 68 KSO15
D1 GPOK15/KSO15

2
ADB2 140 153 KSO16 1 @ 1
D2 GPOK16/KSO16 KSO16 (30)
ADB3 KSO17 R376 C593 R377 C594
1

(23,25) MINI_PME# 141 D3 GPOK17/KSO17 154 KSO17 (30)


ADB4 144 Rb 33K_0402_1% Rd
EC_PME# +3VALW ADB5 D4 KSI0 0_0402_5% 0.1U_0402_16V4Z
(23,25) LAN_PME# 145 D5 GPIK0/KSI0 71
2 2

X-BUS Interface
ADB6 146 72 KSI1 0.1U_0402_16V4Z
D6 GPIK1/KSI1
2 3GSW_EN# ADB7 KSI2

1
(23,25) PCI_PME# 1 147 D7 GPIK2/KSI2 73
R378 100K_0402_5% KBA0 124 74 KSI3
A0 GPIK3/KSI3
1 2 BTSW_EN# KBA1 125 A1/XIOP_TP GPIK4/KSI4 77 KSI4
R379 100K_0402_5% KBA2 126 78 KSI5
A2 GPIK5/KSI5
1 2 WLSW_EN# KBA3 127 A3 GPIK6/KSI6 79 KSI6
R380 100K_0402_5% KBA4 128 80 KSI7
KBA5 A4/DMRP_TP GPIK7/KSI7
131 A5/EMWB_TP
KBA6 132 32 INVT_PWM
C A6 GPOW0/PWM0 INVT_PWM (18) C
KBA7 133 33 BEEP#
A7 GPOW1/PWM1 BEEP# (32)
1 2 MUSIC_BTN# KBA8 143 A8 FAN2PWM/GPOW2/PWM2 36
R381 100K_0402_5% KBA9 142 37 ACOFF
A9 GPOW3/PWM3 ACOFF (36,38)
1 2 MOVIE_BTN# KBA10 135 A10 Pulse Width GPOW4/PWM4 38 USB_EN# (26,30)
R383 100K_0402_5% KBA11 134 39 EC_ON
A11 GPOW5/PWM5 EC_ON (31)
KBA12 130 40 EC_LID_OUT#
A12 GPOW6/PWM6 EC_LID_OUT# (14)
KBA13 129 43 EC_MUTE
A13 FAN1PWM/GPOW7/PWM7 EC_MUTE (33)
KBA14 121
KBA15 A14 ON/OFF
120 A15 GPWU0 2 ON/OFF (31)
KBA16 113 26
KBA17 A16 GPWU1 5WAY_BTN ACIN (14,36)
112 A17 GPWU2 29 5WAY_BTN
KBA18 104 30 PM_SLP_S3#
A18 GPWU3 PM_SLP_S3# (14)
KBA19 103 Wake Up Pin 44 PM_SLP_S5#
A19 GPWU4 PM_SLP_S5# (14)
+5VS 108 76
RP24 A20/GPIO23 GPWU5 EC_PME#
+3VALW 2 1 105 E51CS#/GPIO20/ISPEN TIN1/GPWU6 172
1 8 KB_CLK R384 100K_0402_5% 176
KB_DATA KB_CLK TIN2/FANFB2/GPWU7 ECAGND
2 7 110 PSCLK1 2 1
3 6 PS_CLK KB_DATA 111 81 BATT_TEMP C595 0.01U_0402_16V7K
PSDAT1 GPIAD0/AD0 BATT_TEMP (37)
4 5 PS_DATA PS_CLK 114 82 SKU_ID
PS_DATA PSCLK2 GPIAD1/AD1 BATT_OVP
4.7K_1206_8P4R_5% TP_CLK
115 PSDAT2PS2 Interface GPIAD2/AD2 83
MOVIE_BTN#
BATT_OVP (38)
R385
(31) TP_CLK 116 PSCLK3 GPIAD3/AD3 84 MOVIE_BTN#
+3VALW TP_DATA 117 Analog To Digital 87 MUSIC_BTN# 100K_0402_5%
(31) TP_DATA PSDAT3 GPIAD4/AD4 MUSIC_BTN#
RP25 88 5WAY_BTN 2 1
ARCADE# EC_SMB_CK1 GPIAD5/AD5 AD_BID0
1 8 (29,37) EC_SMB_CK1 163 SCL1 GPIAD6/AD6 89
2 7 FRD# EC_SMB_DA1 164 90
(29,37) EC_SMB_DA1 SDA1 GPIAD7/AD7 POUT (42)
3 6 SELIO# EC_SMB_CK2 169 SMBus
(4) EC_SMB_CK2 SCL2
4 5 FSEL# EC_SMB_DA2 170 99 DAC_BRIG
(4) EC_SMB_DA2 SDA2 GPODA0/DA0 DAC_BRIG (18)
GPODA1/DA1 100
10K_1206_8P4R_5% EMPWR_BTN# 8 101 IREF
(30) EMPWR_BTN# GPIO04 GPODA2/DA2 IREF (38)
+3VALW EC_SCI# 20 102 EN_DFAN1 CRY1 CRY2
(14) EC_SCI# GPIO07 GPODA3/DA3 EN_DFAN1 (34)
RP26 E-MAIL_BTN# 21 Digital To Analog 1
(30) E-MAIL_BTN# GPIO08 GPODA4/DA4 WL_OFF# (25)
1 8 EMPWR_BTN# IE_BTN# 22 42 1 1
B (30) IE_BTN# GPIO09 GPODA5/DA5 MINI1_OFF# (25) B
2 7 E-MAIL_BTN# (8) ENBKL ENBKL 27 47 C596 C597
GPIO0D GPODA6/DA6

4
3 6 IE_BTN# BKOFF# 28 174 EC_PWROK
(18) BKOFF# GPIO0E GPODA7/DA7 EC_PWROK (15)
4 5 USER_BTN# FSTCHG 48 10P_0402_50V8K 10P_0402_50V8K

IN

OUT
(38) FSTCHG GPIO10 2 2
EC_SMI# 62 85 PWR_LED PWR_LED (30)
(14) EC_SMI# GPIO13 * GPIO18/XIO8CS#
100K_1206_8P4R_5% IDE_LED# 63 86 PWR_SUSP_LED# PWR_SUSP_LED# (30)
(20) IDE_LED# USER_BTN# GPIO14 * GPIO19/XIO9CS# BATT_GRN_LED# X2
(30) USER_BTN# 69 GPIO15 91 BATT_GRN_LED# (30)
+3VS *GPIO1A/XIOACS# BATT_AMB_LED#

NC

NC
(14) EC_SWI# 70 GPIO16 GPIO * GPIO1B/XIOBCS# 92 BATT_AMB_LED# (30)
75 Expanded I/O * GPIO1C/XIOCCS# 93 WL_LED# WL_LED# (30)
ARCADE# GPIO17
1 2 5IN1_LED# 3GSW_EN#
3GSW_EN# 109 GPIO24 94 BT_LED# BT_LED# (30)
R386 10K_0402_5% LID_SW# * GPIO1D/XIODCS# E-MAIL_LED#

3
(31) LID_SW# 118 GPIO25 97 E-MAIL_LED# (30)
BT_ON# 119 * GPIO1E/XIOECS# 98 MEDIA_LED# MEDIA_LED# (30)
(30) BT_ON# GPIO26 * GPIO1F/XIOFCS#
SYSON 148
(35) SYSON GPIO27
SUSP# 149 171 FAN_SPEED1 32.768KHZ_12.5P_1TJS125DJ2A073
+5VALW (29,35,40,41) SUSP# GPIO28 GPIO2E/TOUT1/FANFB1 FAN_SPEED1 (34)
VR_ON 155 12 DPLL_TP
(42) VR_ON GPIO29 DPLL_TP/GPIO06/FANFB3
RP27 156 FANTEST_TP/GPIO05/FAN3PWM 11 TEST_TP Change P/N SJ100001V00
(21) 5IN1_LED# GPIO2A
1 8 EC_SMB_CK1 BTSW_EN# 162
(30) BTSW_EN# GPIO2B
2 7 EC_SMB_DA1 PBTN_OUT# 168 175 EC_THERM#
(14) PBTN_OUT# GPIO2D
3 6 EC_SMB_CK2 Timer PinTOUT2/GPIO2F EC_THERM# (14)
4 5 EC_SMB_DA2 CRT_DECT 55 3
C598 0.1U_0402_16V4Z (19) CRT_DECT CAPS_LED# FnLock#/GPIO12 * E51IT0/GPIO00 WLSW_EN# EC_RSMRST# (14)
(30) CAPS_LED# 54 CapLock#/GPIO011 * E51IT1/GPIO01 4 WLSW_EN# (30)
4.7K_1206_8P4R_5% 2 1 NUM_LED# 23 106 E51_RXD 1 2 EAPD
(30) NUM_LED# NumLock#/GPIO0A * E51RXD/GPIO21/ISPCLK EAPD (32)
(15) SATA_LED# SATA_LED# 41 107 E51_TXD R387 0_0402_5%
+5VS ScrollLock#/GPIO0F * E51TXD/GPIO22/ISPDAT
+3VALW 2 1 19 ECRST# MISC 1 2 HD_EAPD# (32)
R388 47K_0402_5% 5 158 CRY2 R389 @ 0_0402_5%
(14) EC_GA20 GA20/GPIO02 XCLKI
2 1 TP_CLK (14) EC_KBRST# 6 KBRST#/GPIO03 XCLKO 160 CRY1
4.7K_0402_5% R390 31
GND
GND
GND
GND
GND
GND

ECSCI#
2 1 TP_DATA
4.7K_0402_5% R391
KB910Q B4_LQFP176
122
137
167
17
35
46

R392 +3VS
+3VALW 100K_0402_5%
KB910 C1 VERSION EAPD 2 1
A 2 1 KBA1 1 2 ENBKL A
1K_0402_5% R393 R394 100K_0402_5% @
2 1 KBA4 1 2 DPLL_TP
1K_0402_5% R395 R396 1K_0402_5%
2 1 KBA5 1 2 TEST_TP
1K_0402_5% R397 R398 1K_0402_5%
2 1 CRT_DECT
1K_0402_5% R502 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB910
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 28 of 43
5 4 3 2 1
+3VALW +3VALW
C599

1
1 2 R399
100K_0402_5%
SUSP# (28,35,40,41)
0.1U_0402_16V4Z

2
G
5
U23

2
2 1 3

G Vcc
B EC_FLASH# (14)
FWE# 4

S
Y
A 1
Q16
NC7SZ32P5X_NL_SC70-5 2N7002_SOT23

3
FWR# (28)

Check PCB Footprint


INT_KBD Conn.
KSI[0..7]
KSI[0..7] (28,30)
KSO[0..15]
KSO[0..15] (28)
+5VALW +5VALW

1
C601 1 2 0.1U_0402_16V4Z
R400

100K_0402_5%
U25 (Right) KSO15 JP21

2
8 VCC A0 1 24
7 2 KSO14
WP A1 KSO13 23
(28,37) EC_SMB_CK1 6 SCL A2 3 22
5 4 KSO12
(28,37) EC_SMB_DA1 SDA GND 21
KSI0
AT24C16N10SC-2.7_SO8 KSO11 20
KSO10 19
KSI1 18
17
1

KSI2
R401 KSO9 16
KSI3 15
100K_0402_5% KSO8 14
KSO7 13
KSO6 12
2

KSO5 11
KSO4 10
KSO3 9
KSI4 8
KSO2 7
KSO1 6
KSO0 5
KSI5 4
KSI6 3
KSI7 2
2006/01/23 (Left)
1
ACES_85201-24051
FOR DEBUG ONLY INT_FLASH_EN# C602 1 2 @ 0.1U_0402_16V4Z
+3VALW
R402 1 2 @ 100K_0402_5%
+3VALW

1
SB_INT_FLASH_SEL (14)

OE#
5

FSEL# 2 4 1 2 INT_FSEL#
(28) FSEL# A Y R403 @ 22_0402_5%
P

OE#

1
2 4 INT_FLASH_SEL @
(8,14) NB_SUS_STAT# A Y R404
G

U33 3
U26 10K_0402_5%
SN74AHCT1G125DCKR_SC70-5
1207 ADD
3

SN74AHCT1G125DCKR_SC70-5

2
@ +3VALW KSO15 C603 1 2 100P_0402_50V8J KSO7 C604 1 2 100P_0402_50V8J

1 2 KSO14 C605 1 2 100P_0402_50V8J KSO6 C606 1 2 100P_0402_50V8J


R405 0_0402_5%
KSO13 C607 1 2 100P_0402_50V8J KSO5 C608 1 2 100P_0402_50V8J

1MB Flash ROM KSO12 C609 1 2 100P_0402_50V8J KSO4 C610 1 2 100P_0402_50V8J

KBA[0..19]
(28) KBA[0..19] KSI0 C611 1 100P_0402_50V8J KSO3 C612 1 100P_0402_50V8J
2 2
ADB[0..7]
(28) ADB[0..7]
+3VALW 1MB ROM Socket KSO11 C613 1 2 100P_0402_50V8J KSI4 C614 1 2 100P_0402_50V8J

U27 KSO10 C615 1 2 100P_0402_50V8J KSO2 C616 1 2 100P_0402_50V8J

KBA0 21 31 JP22 KSI1 C617 1 2 100P_0402_50V8J KSO1 C618 1 2 100P_0402_50V8J


KBA1 A0 VCC0 KBA16 KBA17
20 A1 VCC1 30 1 1 2
KBA2 19 KBA15
KBA3 A2 C619 KBA14 3 4 KSI2 C620 1 100P_0402_50V8J KSO0 C621 1 100P_0402_50V8J
18 A3 5 6 2 2
KBA4 17 25 ADB0 0.1U_0402_16V4Z KBA13 KBA19
KBA5 A4 D0 ADB1 2 KBA12 7 8 KBA10 KSO9 C622 1 100P_0402_50V8J KSI5 C623 1 100P_0402_50V8J
16 A5 D1 26 9 10 2 2
KBA6 15 27 ADB2 KBA11 ADB7
KBA7 A6 D2 ADB3 KBA9 11 12 ADB6 KSI3 C624 1 100P_0402_50V8J KSI6 C625 1 100P_0402_50V8J
14 A7 D3 28 13 14 2 2
KBA8 8 32 ADB4 KBA8 ADB5
KBA9
KBA10
7
A8
A9
D4
D5 33 ADB5
ADB6
2006/01/23 FWE#
RESET#
15
17
16
18
ADB4 KSO8 C626 1 2 100P_0402_50V8J KSI7 C627 1 2 100P_0402_50V8J
36 A10 D6 34 19 20 +3VALW
KBA11 6 35 ADB7 DEL SB_INT_FLASH_SEL INT_FLASH_EN#
KBA12 A11 D7 INT_FLASH_SEL 21 22
5 A12 23 24
KBA13 4 KBA18 ADB3
KBA14 A13 RESET# KBA7 25 26 ADB2
3 A14 RP# 10 1 2 +3VALW 27 28
KBA15 2 11 R406 100K_0402_5% KBA6 ADB1
KBA16 A15 NC KBA5 29 30 ADB0
1 A16 READY/BUSY# 12 31 32
KBA17 40 29 KBA4 FRD#
KBA18 A17 NC0 KBA3 33 34
13 A18 NC1 38 35 36
KBA19 37 KBA2 FSEL#
A19 KBA1 37 38 KBA0
INT_FSEL# 39 40
22 CE#
FRD# 24 23 @ SUYIN_80065AR-040G2T
(28) FRD# OE# GND0
FWE# 9 39
WE# GND1

SST39VF080-70_TSOP40
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BIOS, I/O Port & K/B Connector
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 29 of 43
ZZZ 2006/01/23
R414 LED8 +3VALW
680_0402_5%
+5VALW 1 2 2 1 BATT_AMB_LED# BATT_AMB_LED# (28)
3
MDC

3
S
HT-110UD_1204 45@
MDC Conn. @
R508
G
2 SYSON# (35)
JP24 0_0603_5%
R409 LED2
680_0402_5% Q44
D

1
1 GND1 RES0 2
PWR_LED# AZ_SDOUT_MDC SI2301BDS_SOT23

1
R415 LED11
+5VS 1 2 2 1 (14) AZ_SDOUT_MDC 3 IAC_SDATA_OUT RES1 4 20mil
3 5 GND2 3.3V 6
@ 300_0402_5% (14) AZ_SYNC_MDC AZ_SYNC_MDC 7 8
3G_LED# HT-110UYG_1204 R408 1 IAC_SYNC GND3
+5VS 1 2 2 1 3G_LED# (28) (14) AZ_SDIN0_MDC 2 33_0402_5% 9 IAC_SDATA_IN GND4 10
3 AZ_RST_MDC# 11 12 AZ_BITCLK_MDC
(14) AZ_RST_MDC# IAC_RESET# IAC_BITCLK AZ_BITCLK_MDC (14)
1
94/08/04 HT-110UYG_1204 R410 LED4 C629
@ 680_0402_5%

GND
GND
GND
GND
GND
GND
1 2 2 1 PWR_SUSP_LED# 22P_0402_50V8J +3VALW
+5VALW PWR_SUSP_LED# (28) 2
3
ACES_88018-124G

13
14
15
16
17
18
HT-110UD_1204 1
PWR_LED# C628
Connector for MDC Rev1.5
1U_0603_10V4Z
2

R411 LED6
1

D 680_0402_5%
(28) PWR_LED 2 +5VALW 1 2 2 1 BATT_GRN_LED# BATT_GRN_LED# (28)
G 3 JP26
S Q17
2N7002_SOT23 HT-110UYG_1204 1
3

2
3
KSO17 4
(28) KSO17 KSI2 5
(28,29) KSI2 KSI5 6
(28,29) KSI5 KSO16 7
(28) KSO16 KSI3 8
(28,29) KSI3 KSI4 9
+5VALW (28,29) KSI4 10
ACES_85201-10051

C631

0.1U_0402_16V4Z
To LED/B Conn.
@
1 2
+5VS R497 0_0402_5%
JP27
1 1 2 2 +5VALW 4 4 3 3 USBP4- (14)
PWR_LED# 3 4
3 4
(28) MEDIA_LED# 5 5 6 6
(28) CAPS_LED# 7 7 8 8 1 1 2 2 USBP4+ (14)
9 10 USB20_N4
(28) NUM_LED# 9 10
(28) E-MAIL_LED# 11 12 USB20_P4 L52
+5VS +5VS 11 12 WCM2012F2S-900T04_0805
(31) ON/OFFBTN# 13 13 14 14
15 16 USB20_N6 1 2
(28) E-MAIL_BTN# 15 16
17 18 USB20_P6 @ R498 0_0402_5%
(28) IE_BTN# 17 18
1

(28) USER_BTN# 19 19 20 20
R412 R413 21 22
(28) EMPWR_BTN# 21 22 USB_EN# (26,28)
23 24 R499 0_0402_5%
680_0402_5% 680_0402_5% 23 24
25 25 26 26 1 2
27 28 @
27 28 WCM2012F2S-900T04_0805
2

29 30
GND
GND
GND
GND
GND
29 GND 30
4 4 3 3 USBP6- (14)
3
2

3
2

LED9 LED10 ACES_88018-304G


31
32
33
34
35
36

HT-110UD_1204 HT-110NBQA_BULE_1204 1 1 2 2 USBP6+ (14)


L53
1

1 2
WL_LED# BT_LED# @ R500 0_0402_5%
WL_LED# (28) BT_LED# (28)

BT_SW 2006/01/24
WL_SW
2006/03/03
5
5

1
5

1 +3VALW
1
5

1
2
2 2
2
3
Bluetooth Conn.
3

1
3 3 1
4 BTSW_EN# R417 C632 C633
4 BTSW_EN# (28)
6

4 WLSW_EN# 100K_0402_5% @
4 WLSW_EN# (28) +BT_VCC
6

SW2 0.1U_0402_16V4Z 1U_0603_10V4Z

3
SW1 HSS110_4P
S 2
6

G
HSS110_4P Q18 JP28
6

2
(28) BT_ON# 2

SI2301BDS_SOT23 1
2
D (14) USBP1+ 3
(14) USBP1- 4
2005/09/04

1
Geneva Grapevine W=40mils 5
+BT_VCC (25) WLAN_BT_DATA 6
(25) WLAN_BT_CLK 7
KSO16 KSO17 KSO16 KSO17 1
C636 C637 8

KSI0 VOL_UP LEFT ACES_87212-0800


4.7U_0805_10V4Z 0.1U_0402_16V4Z
2
KSI1 RIGHT VOL_DOWN
KSI2 PLAY ENTER KSI2 PLAY
KSI3 STOP KSI3 STOP VOL_UP
NEXT NEXT VOL_DOWN
Security Classification Compal Secret Data Compal Electronics, Inc.
KSI4 KSI4 2005/06/20 2006/06/20 Title
Issued Date Deciphered Date
KSI5 REV KSI5 REV ARCADE_TV
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CD-PLAY / MDC / BT / CIR / LED
Size Document Number Rev
KSI6 RECORD AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 30 of 43
A B C D E

ON/OFF switch
TOP Side
2 1
J2 @ JOPEN
2 1 +3VALW
J3 @ JOPEN +3VALW
Bottom Side Power Button

1
1 1

2
R418
R419 Lid Switch 100K_0402_5%

100K_0402_5%
Change P/N : SN111000207

2
D23

1
SW3
2 ON/OFF (28) 3 1 LID_SW# (28)
ON/OFFBTN# 1
(30) ON/OFFBTN#
3 51ON#
51ON# (36)

3
DAN202U_SC70
4 2
D24
MPU-101-81_4P @
PSOT24C_SOT23

1
2 2005/09/04
C638 D25

1
1000P_0402_50V7K RLZ20A_LL34
1

2
Scroll Up
1
D
EC_ON 2 Q19 SW4
(28) EC_ON
G EVQPLHA15_4P
2

S 2N7002_SOT23 SCRL_U 3 1
2 R420 2
3

4 2 SCRL_R
10K_0402_5%
BTN_R
1

5
6
Scroll Left Scroll Right

3
SW5 SW6 D26
EVQPLHA15_4P EVQPLHA15_4P @
SCRL_L 3 1 SCRL_R 3 1 PSOT24C_SOT23

1
4 2 4 2

SCRL_L

5
6

5
6
Scroll Down
SCRL_U
SW7

3
EVQPLHA15_4P
SCRL_D 3 1
D27
4 2 @
PSOT24C_SOT23

5
6

1
Left Right
2006/03/07
SW8 SW9 SCRL_D
JP36 EVQPLHA15_4P EVQPLHA15_4P
@ 20 PCI_CBE#0 BTN_L 3 1 BTN_R 3 1 BTN_L
20 PCI_CBE#0 (13,21,23,25)
19 PCI_AD6
19 PCI_AD6 (13,21,23,25)

3
18 PCI_AD4 4 2 4 2
3 18 PCI_AD4 (13,21,23,25) 3
17 PCI_AD2
17 PCI_AD2 (13,21,23,25)
16 PCI_AD0 D28
16 PCI_AD0 (13,21,23,25)
PCI_AD1 @

5
6

5
6
15 15 PCI_AD1 (13,21,23,25)
14 PCI_AD3 PSOT24C_SOT23
14 PCI_AD3 (13,21,23,25)
13 PCI_AD5
13 PCI_AD5 (13,21,23,25)
PCI_AD7

1
12 12 PCI_AD7 (13,21,23,25)
11 PCI_AD8
11
10 10
9
PCI_CBE#1
PCI_CBE#2
PCI_AD8 (13,21,23,25)
PCI_CBE#1 (13,21,23,25) To TP/B Conn.
9 PCI_CBE#2 (13,21,23,25)
8 PCI_CBE#3
8 PCI_CBE#3 (13,21,23,25)
7 7
6 JP29
6 CLK_PCI_DB (13)
5 5 +5VS +5VS 1
4 BTN_R C639 1 2 @ 100P_0402_50V8J
4 PCI_RST# (13,15,21,23,25,27,28) 2
3 TP_DATA
3 PCI_FRAME# (13,21,23,25) +5VS (28) TP_DATA 3
2 TP_CLK SCRL_R C640 1 2 @ 100P_0402_50V8J
2 PCI_TRDY# (13,21,23,25) (28) TP_CLK 4
1 PCI_AD9
1 PCI_AD9 (13,21,23,25) 5 SCRL_U C641 1 2 @ 100P_0402_50V8J
ACES_85201-2005 C642 BTN_R 6
SCRL_R 7 SCRL_L C643 1
8 2 @ 100P_0402_50V8J
0.1U_0402_16V4Z SCRL_U
SCRL_L 9 SCRL_D C644 1
10 2 @ 100P_0402_50V8J
SCRL_D
BTN_L 11 BTN_L C645 1
12 2 @ 100P_0402_50V8J

ACES_87151-1207 TP_DATA C646 1 2 @ 100P_0402_50V8J

TP_CLK C647 1 2 @ 100P_0402_50V8J

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power OK, Reset and RTC Circuit, TP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 31 of 43
A B C D E
A B C D E F G H

+VDDA
28.7K for Module Design (VDDA = 4.702)

1
R421 +5VAMP (output = 250 mA)
10K_0402_5% 60mil U28
+5VS L37 1 2 4 VIN VOUT 5 40mil +VDDA
KC FBM-L11-201209-221LMAT_0805

2
4.85V

2
1 1 2 DELAY SENSE or ADJ 6 1
1 2 L38 1 2 C649 C650 R422
C648 1U_0603_10V4Z KC FBM-L11-201209-221LMAT_0805 7 1 30K_0402_1% C651
ERROR CNOISE

1
10U_0805_10V4Z 10U_0805_10V4Z
R423 2 2
0.1U_0402_16V4Z 2
8 SD GND 3 1
10K_0402_5% C652

1
1 SI9182DH-AD_MSOP8 1
R424

1
C653 1 2 1 2
(28) BEEP# 2
1U_0603_10V4Z C654

2
560_0402_5% 1 2 MONO_IN R425
0.1U_0402_16V4Z 10K_0402_1%
1U_0603_10V4Z

1
C

2
R427 1 2
C655 1 2 1 2 2 Q20
(21) PCM_SPK# B R426
1U_0603_10V4Z
560_0402_5% E 2SC2411K_SC59 2.4K_0402_5%

3
C656 1 R428
(14) SB_SPKR 2 1 2
1U_0603_10V4Z

1
560_0402_5%
D29
R429 RB751V_SOD323
10K_0402_5%

2
HD Audio Codec
L39
+AVDD_AC97 MBK1608301YZF_0603
20mil 0.1U_0402_16V4Z +3VS_DVDD 2 1 +3VS
L40 1 2 0.1U_0402_16V4Z 40mil 1 1 1
+VDDA
FBM-L11-160808-800LMT_0603 1 1 1 C657 C658 C659
C661 C662
2 C660 10U_0805_10V4Z 2
10U_0805_10V4Z 2 2 2

25

38

9
2 2 2 U29
0.1U_0402_16V4Z 0.1U_0402_16V4Z

AVDD1

AVDD2

DVDD1

DVDD2
14 35 AMP_LEFT
LINE2_L FRONT_OUT_L AMP_LEFT (33)
15 36 AMP_RIGHT
LINE2_R FRONT_OUT_R AMP_RIGHT (33)
16 MIC2_L SURR_OUT_L 39

17 MIC2_R SURR_OUT_R 41

LINE_L 1 2 LINE_C_L 23 45
(33) LINE_L LINE1_L SIDESURR_OUT_L
C663 1U_0603_10V4Z
LINE_R 1 2 LINE_C_R 24 46
(33) LINE_R LINE1_R SIDESURR_OUT_R
C664 1U_0603_10V4Z
1 2 CD_L_RC 18 43
C665 @ 1U_0603_10V4Z CD_L CEN_OUT
2005/10/26
1 2 CD_R_RC 20 44
C666 @ 1U_0603_10V4Z CD_R LFE_OUT
1 2 CD_AGND_RC19 C668 1 2 22P_0402_50V8J
C667 @ 1U_0603_10V4Z CD_GND
BIT_CLK 6 AZ_BITCLK_HD (14)
MIC1_L 1 2 MIC1_C_L 21
(33) MIC1_L MIC1_L
J4 @ C669 1U_0603_10V4Z
1 2 22 8 R430 1 2 33_0402_5% AZ_SDIN3_HD (14)
1 2 MIC1_R SDATA_IN
JUMP_43X79 MONO_IN 12 37
PCBEEP PIN37_VREFO
J5 @ 29
3 LINE1_VREFO 3
1 1 2 2 (14) AZ_RST_HD# 11 RESET#
LINE2_VREFO 31
JUMP_43X79 (14) AZ_SYNC_HD 10 10mil
SYNC
MIC1_VREFO_L 28 MIC1_VREFO_L
(14) AZ_SDOUT_HD 5 SDATA_OUT
1 2 MIC1_VREFO_R 32
R432 0_0603_5% 2
(28) EAPD GPIO0
(33) NBA_PLUG 3 GPIO1 MIC2_VREFO 30
13 SENSE A AC97_VREF
10mil
1
R433
2
0_0603_5% P/N :SM010012010 34 SENSE B VREF 27
1
2005/09/20 (28) HD_EAPD# 2 1 47 SPDIFI/EAPD JDREF 40
C671

1
1 2 1 FBM-L11-160808-800LMT_0603 48 33 10U_0805_10V4Z
R434 0_0603_5% L55 SPDIFO VAUX R431 2
C728 4 26 20K_0402_1%
2006/03/31 220P_0402_50V7K
2
7
DVSS1
DVSS2
AVSS1
AVSS2 42 @
ALC883-LF_LQFP48
2

GND GNDA DGND


SPDIF 2 1 AGND
(33) SPDIF
1
L56 FBM-L11-160808-800LMT_0603
C717
120P_0402_25V8K
@ 2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec ALC883
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 32 of 43
A B C D E F G H
A B C D E

+5VAMP JP30
SPKL+ R435 1 2 0_0603_5% SPK_L+
SPKL- R436 0_0603_5% SPK_L- 1
1 2 2

1
SPKR+ R437 1 2 0_0603_5% SPK_R+
R439 SPKR- R438 0_0603_5% SPK_R- 3
1 2 4
+5VAMP
10K_0402_5% W=40mil +5VAMP 20mil ACES_85204-0400

VOL_AMP
Speaker Conn.
2

1 1
1.8K_0402_5%

1
(0.75V -> 8dB )
1

1 C672 C673 R441 1


0.1U_0402_16V4Z 4.7U_0805_10V4Z 100K_0402_5%
2 2
R440 2006/03/31 R442
100K_0402_5%

2
2

1 2
U30
10 1 EC_MUTE
VDD MUTE EC_MUTE (28)
15 VDD SHUTDOWN# 2
C674 2 1 0.1U_0402_16V4Z
9 SPKL-
VOL_AMP LOUT-
7 VOLUME
16 SPKR-
VOLMAX ROUT-
2 1 8 VOLMAX
C675 R443 0_0402_5% 11 SPKL+
0.47U_0603_16V4Z NBA_PLUG LOUT+
13 SE/BTL#
1 2 AMP_LEFT_C-1 1 2 14 SPKR+
(32) AMP_LEFT C676 1U_0603_10V4Z AMP_LEFT_C ROUT+
6 LIN-
1 2 AMP_RIGHT_C-1 1 2 AMP_RIGHT_C 3
(32) AMP_RIGHT C677 C678 1U_0603_10V4Z RIN-
GND 5
0.47U_0603_16V4Z BYPASS 4 12
BYPASS GND
20mil
1

1 APA2068KAI-TRL_SOP16
R444 R445
@ @ C679 2 2
1K_0402_5% 1K_0402_5% 4.7U_0805_10V4Z C718 C719
2
330P_0402_50V7K
S/PDIF Out JACK
330P_0402_50V7K
2

1 1

JP31

2
HPF Fc = 338Hz HPOUT_L_2 HPOUT_L_3
1
2
1 2 2
L47 FBM-11-160808-700T_0603 6
HPOUT_R_2 1 2 HPOUT_R_3 3

2
R482 L48 FBM-11-160808-700T_0603

2
+5VAMP 2 1 SPDIF_PLUG# 5
47_0603_5% R484 R483 100K_0402_5%
47_0603_5% 4
SPDIF 7
(32) SPDIF

1
+5VSPDIF 8

1
10

SPKL+ 1 2 HPOUT_L_1 ACES_20234-0101

+
C720 150U_D_6.3VM
SPKR+ 1 2 HPOUT_R_1

+
C721 150U_D_6.3VM

+5VAMP
+5VAMP
1

R485
@
3

S
100K_0402_5%
G
2SPDIF_PLUG# LINE-IN JACK
Q40 NBA_PLUG JP32
2

(32) NBA_PLUG
SI2301BDS_SOT23 Q41 2N7002_SOT23 5
1

D D
2SPDIF_PLUG#
1

4
3 G L43 FBM-11-160808-700T_0603 3

+5VSPDIF 20mil S LINE_R 1 2 LINE_R_R 3


(32) LINE_R
3

6
LINE_L 1 2 LINE_L_R 2
(32) LINE_L
L44 FBM-11-160808-700T_0603 1
1 1
SUYIN_010164FR006G118ZL
C685 C686
220P_0402_50V7K 220P_0402_50V7K
2 2

MIC1_VREFO_L
MIC JACK

1
JP33
Int MIC Conn. R448
5

2.2K_0402_5% 4
2005/09/06
JP34

2
15mil INT_MIC_L
3
1 6
2 (32) MIC1_L 1 2 FBM-11-160808-700T_0603 MIC1_L_1 2
L46 1
ACES_85204-0200 1
SUYIN_010164FR006G118ZL
C687
220P_0402_50V7K
4 2 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Amplifier & Audio Jack
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 33 of 43
A B C D E
H1 H4 H3 H2 H5
H_S394DD138 H_R315X394D138 H_C236D162 H_R366X394RDD138 H_C177D177N

@ @ @ @ @

1
FAN1 Conn H6
H_C236D162
H7
H_R315D197
H8
H_R315D177
H9
H_R315D177
H10
H_R315D197
+5VS
C689 10U_1206_16V4Z +5VS @ @ @ @ @

1
1 2

1
U31 D30
1 8 1SS355_SOD323 H13 H14 H15
VEN GND H_S374X354D138 H_S394D138 H_S394X394D138
2 VIN GND 7
+VCC_FAN1 3 6 D31
EN_DFAN1 VO GND 1N4148_SOT23

2
(28) EN_DFAN1 4 VSET GND 5
1 2 @ @ @
G993P1UF_SOP8

1
C690
10U_1206_16V4Z
1 2 H16 H19 H20
H_C158D158N H_C236D162 H_C236D162
+3VS C691
1000P_0402_50V7K
1 2 @ @ @

1
R451
10K_0402_5%
40mil JP35 H21 H23 H22 H24 H25
+VCC_FAN1 H_TS394X374BR394X374D138 H_TS559X295LUBS394X276UD138 H_S394D138 H_S354X293UD138 H_S374X354RD138
2

1
(28) FAN_SPEED1 2
3 @ @ @ @ @
1
C692 ACES_85205-03001

1
1000P_0402_50V7K
2 H_TR315X295UBR276X291UD138
H26 H27 H30 H28 H29
H_O217X157D217X157N H_TR315X295UBR276X291UD138 H_S354X335RUD138 H_C236D162

@ @ @ @ @

1
FD1 FD2 FD3 FD4 FD5 FD6

@ @ @ @ @ @

1
CF1 CF2 CF3 CF4 CF5 CF6 CF7 CF8 CF9 CF10

@ @ @ @ @ @ @ @ @ @

1
CF11 CF12 CF13 CF14 CF15 CF16 CF17 CF18 CF19 CF20

@ @ @ @ @ @ @ @ @ @

1
CF21

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN & Screw Hole
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
HCL51 LA-3211P
Date: 星期二, 四月 11, 2006 Sheet 34 of 43
A B C D E

+1.8VALW TO +1.8VS
+5VALW TO +5VS
+1.8VALW +1.8VS
+5VALW +5VS

1 2 1 1
Q21 C693 Q22 C696 4.7U_0805_10V4Z
8 1 C694 8 1 C695
D S D S

2
1U_0603_10V4Z
7
6
D S 2
3
2 1
10U_0805_10V4Z
R453
7
6
D S 2
3
2 2 2006/03/09 R454
1
5
D
D
S
G 4
1U_0402_6.3V4Z
470_0603_5% 5
D
D
S
G 4 R456
470_0603_5%
1207 DEL 1

SI4800BDY_SO8
1 1 R455 2 +VSBP SI4800BDY_SO8 1 2 +VSBP
C697 100K_0402_5%

1
1 1 1
C698 C699 C700 33K_0402_1%

1
4.7U_0805_10V4Z D D D D
2 0.1U_0603_25V7K SUSP Q24 4.7U_0805_10V4Z SUSP Q26
2 2 2 2
2 Q23 G G 2 2 Q25 G G
S 2N7002_SOT23 S 0.1U_0603_25V7K S 2N7002_SOT23 S
3 2N7002_SOT23 2N7002_SOT23

3
+1.8VALW TO +1.8V

+1.8VALW +1.8V

2 2
+5VALW +5VALW
1 1
Q28 C702 C703
8 D S 1
2

2
7 2 4.7U_0805_10V4Z
D S 2 2 R458 R459 R460
6 D S 3
5 4 470_0603_5%
D G 1U_0402_6.3V4Z 10K_0402_5% 10K_0402_5%
SI4800BDY_SO8 1 R461 2 +VSBP
100K_0402_5% SUSP SYSON#
1

1
1 1 (41) SUSP (30) SYSON#
C704 C705
1

1
D D D D
4.7U_0805_10V4Z 2 SYSON# 2 Q30 2 Q31 2 Q32
2 2 (28,29,40,41) SUSP# (28) SYSON
Q29 G G G G

2
0.1U_0603_25V7K S 2N7002_SOT23 S S S
2N7002_SOT23 R462 R463 2N7002_SOT23
3

3
2N7002_SOT23
10K_0402_5% 10K_0402_5%

1
3 3

+3VALW TO +3VS
+3VALW +3VS

1 1
Q33 C706 C707 4.7U_0805_10V4Z
2

8 D S 1
7 2 R464 +1.2VS +0.9VS +1.5VS +1.05VS
D S 2 2 470_0603_5%
6 D S 3
5 D G 4

2
1U_0402_6.3V4Z R465
SI4800BDY_SO8 R466 R467 R468 R469
1

1 2 +VSBP
1 1 470_0603_5% 470_0603_5% 470_0603_5% 470_0603_5%
C708 C709 68K_0402_1% @ @ @
1

D D
4.7U_0805_10V4Z SUSP Q35 1

1
2 2
2 0.1U_0603_25V7K 2 Q34 G G
1

1
2N7002_SOT23 D D D D
S S
2N7002_SOT23 SUSP 2@ SUSP 2@ SUSP 2@ SUSP
3

2
Q36 G Q37 G Q38 G Q39 G
S 2N7002_SOT23 S 2N7002_SOT23 S 2N7002_SOT23 S 2N7002_SOT23
3

3
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC-DC INTERFACE
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 35 of 43
A B C D E
A B C D

VS

VIN
VIN 1 2
PCN1 ADPIN PL1 PR1 1M_0402_1%

1
FBMA-L18-453215-900LMA90T_1812

1
1 2 VS
1
PR3 PR2
84.5K_0402_1% 5.6K_0402_5%
G 2 1 2
PR5 PR4 ACIN (14,28)

2
G

8
3 PC4 22K_0402_1% PU1A 10K_0402_1%

2
PC1 PC2 PC3 100P_0402_50V8J 1 2 3 NA

P
SINGA_2DC-G756I200 1000P_0402_50V7K 100P_0402_50V8J 1000P_0402_50V7K + PACIN
1
O 1 PACIN (38)
1

2
@ 2 -

G
1

1
LM393DG_SO8
PC5 PR6 PC6 PR7

4
1000P_0402_50V7K 20K_0402_1% 0.1U_0402_16V7K PD3 10K_0402_1%
RLZ4.3B_LL34

2
2
PR10 Vin Detector

2
2 1 RTCVREF
VIN 10K_0402_1%
3.3V High 18.384 17.901 17.430
Low 17.728 17.257 16.976

2
PR13
PD1
RLS4148_LLDS2 1 2

PD2 1K_1206_5%
RLS4148_LLDS2 PQ60

1
TP0610K-T1-E3_SOT23

1
68_1206_5%

68_1206_5%
2 1 PD4
BATT+

1
VIN 2 1 1 PR15 2 3 1
B+

PR8

PR9
RLS4148_LLDS2 1K_1206_5%
PQ1
PR11 TP0610K-T1-E3_SOT23

100K_0402_5%

100K_0402_5%
200_0603_5% 1 PR16

2
2

1
2 CHGRTCP 1 2 N1 3 1 VS 2

PR265

PR266
1K_1206_5%

2
ACIN
1

PR12
Precharge detector

1
100K_0402_1% PC7

2
0.22U_1206_25V7M PC8
0.1U_0603_25V7K
Min. typ. Max.
2
2

2
H-->L 14.620V 14.853V 15.245V

100K_0402_5%
(31) 51ON# 1 2

1
PR14
L-->H 15.534V 15.970V 16.421V

PR267
22K_0402_1%

1
RTCVREF
2

12
PR181 2
200_0603_5% (28,38) ACOFF
PU2 G920AT24U_SOT89
PR17 PR18 3.3V
PQ58
1

+CHGRTC 1 2 1 2 3 OUT IN 2 2
DTC115EUA_SC70

3
1

1
560_0603_5% 560_0603_5%
1

GND PR19
PC10 PC9 PD15 PQ59 499K_0402_1%
10U_0805_6.3V6M 1 1U_0805_25V4Z RLZ16B_LL34 DTC115EUA_SC70

3
2

PR20
2

2
PR21
100K_0402_1%
3 1 2 1 2 3

VL
PU1B 2.2M_0402_5%

1
LM393DG_SO8

1
PR22

8
PD5 499K_0402_1% PC11
2 5 0.01U_0402_25V7K

P
PJ1 PJ2 (4,14,37,39) MAINPWON +

2
1 7 O
1 PR23

2
+3VALWP 2 2 1 1 +3VALW +1.2VSP 2 2 1 1 +1.2VS 3 - 6 2 RTCVREF NA

G
(38) ACON

1
@ JUMP_43X118 @ JUMP_43X118 RB715F_SOT323 34K_0402_1%

1
(5A,200mils ,Via NO.= 10) (5A,200mils ,Via NO.= 10) PR25

1
PC12 191K_0402_1%
PJ3 0.1U_0603_25V7K PC13 PR24
1000P_0402_50V7K @ 66.5K_0402_1%

2
+5VALWP 2 2 1 1 +5VALW
PJ4

2
NA
@ JUMP_43X118 +0.9VSP 2 1 +0.9VS PR26
2 1

1
D 47K_0402_1%
(5A,200mils ,Via NO.= 10)
@ JUMP_43X118 PQ2 2 1 2 PACIN
(2A,80mils ,Via NO.= 4) 2N7002-7-F_SOT23-3 G
BATT ONLY S

1
PJ7 PJ5

3
+1.8VALWP 2 2 1 +1.8VALW
Precharge detector
1
@ JUMP_43X118
PJ6 Min. typ. Max.
+1.5VSP 2 2 1 1 +1.5VS
2 1 @ JUMP_43X118 H-->L 6.169V 6.231V 6.361V 2 +5VALWP
2 1 PQ3
(1A,40mils ,Via NO.= 2) L-->H 7.168V 7.349V 7.537V
@ JUMP_43X118 DTC115EUA_SC70
4
(8A,320mils ,Via NO.= 16) 4

3
PJ8
+1.05VSP 2 2 1 1 +1.05VS
@ JUMP_43X118
(5A,200mils ,Via NO.= 10)
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title
DCIN & DETECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 36 of 43
A B C D
A B C D

PH1 under CPU botten side :


CPU thermal protection at 85 degree C
Recovery at 70 degree C

1 1

PR257 VL VS VL
100K_0402_5%

2
1 2 +3VALWP
BATT+ BATT++ PR27

1
150K_0402_1%

1
PR258 PR36 PC14
PL14 1K_0402_5% 0.1U_0603_25V7K PR30
BATT+

10.7K_0402_1% 442K_0603_1%

1
2 1
FBMA-L18-453215-900LMA90T_1812 6C/8C# (38) 1 2
1 2 BATT++ PR32

8
61.9K_0402_1% PU3A

2
2
1 2 3

P
+
1

1
PR259 1
O MAINPWON (4,14,36,39)
PC186 @1K_0402_5% TM_REF1 2 -

G
1000P_0402_50V7K
PC185 LM393DG_SO8
2

100K_0603_1%_TH11-4H104FT
0.01U_0402_25V7K

4
PH1
1000P_0402_50V7K
1

1U_0603_6.3V6M
PC17
PR260 2 1
7 VL

PC18
1K_0402_5%

2
PJP2 battery connector 6
2 1 PR37
5 150K_0402_1%

2
4
SMART

2
3

1
PR261
Battery:
2 2
2 1K_0402_5%
1
1.GND 2 BATT_TEMP
1 PR39
BATT_TEMP (28)
150K_0402_1%
2.SMC SUYIN_200275MR007G161ZL
PJP2
3.SMD

2
PR262
4.TS 6.49K_0402_1%
1 2
5.B/I +3VALWP

6.ID
7.BATT+ 100_0402_5%
PR263
1 2 EC_SMB_DA1 (28,29)

PR264
100_0402_5%
1 2 EC_SMB_CK1 (28,29)

3 3

VS

8
PU3B
5

P
+
O 7
6 -

G
LM393DG_SO8
PQ41

4
TP0610K-T1-E3_SOT23

B+ 3 1 +VSBP
1

PR182 PC132
100K_0402_1% 0.1U_0603_25V7K
PC131
VL 0.22U_1206_25V7K
2

PR183
2

22K_0402_1%
2

1 2
PR184
4 100K_0402_1% 4

PR185
1

0_0402_5% D
1 2 2 PQ42
(39,40) POK 2N7002-7-F_SOT23-3
G
S
Security Classification Compal Secret Data Compal Electronics, Inc.
1

2005/06/23 2006/10/22 Title


3

Issued Date Deciphered Date


PC133 BATTERY CONN /OTP
0.1U_0402_16V7K THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
2

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 37 of 43
A B C D
A B C D E

Charger
Iadp=0~3.117A(65W)

P2
PQ6 PQ7 PR44 B+ PL12 CHG_B+ PQ5
AO4407_SO8 AO4407_SO8 P3 0.015_2512_1% AO4407_SO8
FBMA-L18-453215-900LMA90T_1812
VIN 8
7
1
2
1
2
8
7
1 4 1 2 1
2
8
7

2200P_0402_50V7K
0.1U_0603_25V7K
6 3 3 6 2 3 3 6

4.7U_1206_25V6K

4.7U_1206_25V6K
5 5 5

1
1 1

PC161

PC162

PC163

PC164
1
PC165 PC166 PR233

4
1
0.1U_0603_25V7K 0.1U_0603_25V7K 47K_0402_1%

2
1
1 2
PR234 VIN

2
1

200K_0402_1%

10K_0402_1%
0.1U_0603_25V7K

SI4810BDY-T1-E3_SO8
2

2
PR235

5
6
7
8
47K_0402_5%

PR236
2

D
D
D
D
3

PC167
PQ8 1SS355_SOD323

PQ50
DTA144EUA_SC70
2

47K PD16
ACOFF#
2

1
G
S
S
S
2 47K VIN 2 1

1
(37) 6C/8C#

4
3
2
1
1

2
G
PC168 PQ51
0.1U_0603_25V7K PU4 DTC115EUA_SC70

SI4810BDY-T1-E3_SO8
3 1 MAX1908ETI_QFN28
1

2 ACOFF

D
1

2
1 DCIN ACOFF (28,36)

5
6
7
8
PQ52 27
PC169 SI2301DS_SOT23~D CSSP

D
D
D
D

1
1U_0603_10V6K

PQ53
PQ10 PC170

2
2 2 1 17 CELLS
DTC115EUA_SC70 60.4K_0402_1% PR237 @ 1000P_0402_50V7K

3
CSSN 26

G
S
S
S
PR238 @ 0_0402_5%

2
2 1 4 REF
150K_0402_5%

charger_DHI

4
3
2
1
DHI 25
1
RHU002N06_SOT323

3 CLS
PR239
PQ54

PR58
1908LDO BATT+
1

D charger_LX 0.015_2512_1%
LX 23 1 2
1
100K_0402_1%

2 2 1 2 1 12 REFIN
1

2 G 2
1 4

2
PR242

10U_LF919AS-100M-P3_4.5A_20%
PC171 PR240 PR241 charger_DLO
2

S 21
DLO

4.7U_1206_25V6K

4.7U_1206_25V6K

4.7U_1206_25V6K
PL13
0.1U_0402_16V7K 9.31K_0402_1% 15K_0402_1% PC172
3

2 3
0.1U_0603_25V7K
2

15 VCTL

1
PC173

PC174

PC175
charger_BST
2

1
13 ICTL BST 24 1 2

1
11 PR243 0_0402_5%
ACOK# charger_DLOV PD17

2
8 SHDN# DLOV 22
1

D
10 ACIN 1SS355_SOD323
2 9 ICHG LDO 2 2 1

0.01U_0402_25V7K
G 2 1
PQ55 (28) IREF PR244

2
S 28
RHU002N06_SOT323 21K_0402_1% IINP 1908LDO 33_1206_5%
3

7 CCV

PC176
PR245

2
CSIP 19
1

2
PGND
18

GND
CCS
PD18 CSIN

CCI
PR246 16 PC177
BATT

2
ACOFF# 1 2 100K_0402_1% 1U_0603_10V6K

10K_0402_1%

NA
PC178

1
14

20
2
1U_0805_25V4Z

5
1N4148_SOD80

PR247
2

1
PR248 MAX1908-CCS
22K_0402_5%

0.01U_0402_25V7K

0.01U_0402_25V7K
(36) PACIN 1 2

2
PC179

PC180
1

1
(36) ACON

2
3 BATT+ 3
PC181
PR249 0.1U_0402_16V7K
Charge voltage
0_0402_5%
1 2
3S CC-CV MODE : 12.6V
(28) FSTCHG VS BATT+
LI-4S :17.8V--BATT-OVP=1.9758V
4S CC-CV MODE : 16.8V

0.01U_0402_25V7K
BATT-OVP=0.111*BATT+
2

1
10K_0402_5%

1
PR251

PR252
PR250 PC182 845K_0603_1%
FOR 8 CELL& 6 CELL IREF=0.806*Icharge 100K_0402_5% 0.1U_0402_16V7K
2

IREF=3.1V

PC183
1

2
+3VALWP
FOR 4 CELL IREF=0.403*Icharge

1
IREF=1.55V PR253

1
300K_0603_0.1%
PR255 PR254

8
PU5A 511K_0402_1% RHU002N06_SOT323 10K_0402_5%

2
3 1 2

P
+ PQ56
1 0
VS

2
2P4S:4800mAH/cell 0.8C=3.84A (28) BATT_OVP - 2

1
D

1
LM358ADR_SO8 2
1P4S:2400mAH/cell 0.8C=1.92A

1
PR256

4
G
8

PU5B 200K_0402_1% PC184 S

1
0.01U_0402_25V7K D

3
+ 5
P

2
OVP voltage : 7 0 2 6C/8C# (37)
G

2
- 6
G

S RHU002N06_SOT323
4 LM358ADR_SO8 4

3
LI-4S :17.8V----BATT-OVP=1.98V PQ57
4

BATT-OVP=0.111*BATT+
LI-3S :13.35V----BATT-OVP=1.98V
BATT-OVP=0.111*BATT+
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Charger
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 38 of 43
A B C D E
5 4 3 2 1

+5V Ipeak = 6.66A ~ 10A +3.3VALWP/+5VALWP


+3.3V Ipeak = 6.66A ~ 10A
BST_5V BST_3V

3
D D
PD11
DAP202U_SOT323

B+++ B+++
PJ12 VL

1
B+ 1 1 2 2

10U_1206_25VAK
B+++

1
4.7_1206_5%
2200P_0402_50V7K
10U_1206_25VAK

@ JUMP_43X118

PC42
1

4.7_1206_5%
PC41

47_0402_5%
PC39

2
1
PR72

PR73

PR71
PR75 PC44
2

0_0603_5% 0.1U_0402_16V7K

4.7U_1206_25V6K
DH_5V DH_5V-1 DH_3V

2
1 2
@

1 2

0.1U_0603_25V7K 1
PQ19 PQ18
8 G2 D2 1 1 D2 G2 8

PC45
7 D1/S2/K D2 2 2 D2 D1/S2/K 7
6 D1/S2/K G1 3 2VREF_8734 DL_3V 3 G1 D1/S2/K 6

PC48
VL

2
5 D1/S2/K S1/A 4 4 S1/A D1/S2/K 5

100K_0402_1%

100K_0402_1%
4.7U_0805_6.3V6K

2
1U_0603_6.3V6M
10UH_SIQB125-100APF_4.5A_20%

PR76

PR77
FDS6900AS_NL_SO8 FDS6900AS_NL_SO8

2
1

2
PC47

PC46

10UH_SIQB125-100APF_4.5A_20%
C C

1
PR78

1
1

PC49

18

20

13

17

2
499K_0402_1%

499K_0402_1%
PL4

0.1U_0603_25V7K 0_0603_5% PU6

1
PR79
2 1 2 1BST_5V-1 14

TON

VCC
LD05

V+
BST5

PR80
5 ILIM3 PR81
ILIM3 0_0603_5%
16
+5VALWP DH5 PL5
LX_5V
2

1
15 LX5
DL_5V ILIM5 PC50

1
19 DL5 ILIM5 11
0.1U_0603_25V7K

2
21 OUT5
FB5 9 28 BST_3V-1 2 PR82 1 2 1 NA
FB5 BST3 DH_3V-1 0_0603_5%
PD12 1 N.C. DH3 26
@ 10.5K_0402_1%

PR84 24
DL3 LX_3V
VS 1 2 1 2 6 SHDN# LX3 27 +3VALWP
2

0.047U_0603_16V7K

4 ON5 OUT3 22
PR83

47K_0402_1% 3
RLZ5.1B_LL34 ON3
PC52

PR85 7 FB3
FB3
100K_0402_1%
150U_V_6.3VM_R18

1 1 2 12 SKIP# PGOOD 2 POK (37,40)


1

0_0402_5%
PR172

PRO#

@ 6.81K_0402_1%
PC51

LDO3
1

GND
REF

2
2VREF_8734

PR86
2

2
1

23

25

2 10
0_0402_5%
PR87

MAX8734AEEI+_QSOP28
2
2

0.22U_0603_10V7K
+

4.7U_0805_6.3V6K
PC53

1
150U_V_6.3VM_R18

1
1
PC54

PC55
PR88

2
B 2 B
0_0402_5%

0_0402_5%
PR89
1

2
PR270

1
47K_0402_5%

1
1 2
(4,14,36,37) MAINPWON
1U_0603_6.3V6M

0.047U_0603_16V7K
1

1
PC188

PC187
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title
+5V/+3V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 39 of 43
5 4 3 2 1
A B C D

+1.2VP O.C.P= 8.67A~14.09A


+1.8VP O.C.P= 9.68A~15.72A
PJ13
2 1 B+
2 1

1
@ JUMP_43X118

1
PC57 PR94
10U_1206_25V6M 0_1206_5% PC59
10U_1206_25V6M

2
+5VALW

2
1 1

4.7U_0805_6.3V6K
1

2
1

1
PC61
PR95 PC63
PC62 2.2_0603_5% 2.2U_0805_10V6K
PD14 0.1U_0603_25V7K

2
DAP202U_SOT323

2
1
8
7
6
5

3
BST_1.2V-1

D
D
D
D
+1.8V PQ25

BST_1.8V-1
SI4800BDY-T1-E3_SO8

14

28
G
S
S
S
+1.8VALWP PC64 PU7 PC65

5
6
7
8
PL7 2 1 12 17 2 1

VIN

VCC
1.8UH_SIL104R-1R8PF_9.5A_30% DH_1.8V-2 SOFT1 SOFT2

1
2
3
4

D
D
D
D
1 2 LX_1.8V PC66 0.01U_0402_25V7K 0.01U_0402_25V7K PC67 PQ26
0.1U_0603_25V7K PR96 PR97 0.1U_0603_25V7K SI4800BDY-T1-E3_SO8
1 2 1 1 2BST_1.8V-2 6 23 BST_1.2V-2
1 2 2 1
BOOT1 BOOT2
+1.2V

8
7
6
5

G
S
S
S
0_0603_5%
+ PC68 0_0603_5%

D
D
D
D
220U_D2_4VMR15

4
3
2
1
PQ27 1 PR98 2 DH_1.8V-1 5 24 DH_1.2V-1 1 PR99 2 DH_1.2V-2 PL8 +1.2VSP
2 SI4810BDY-T1-E3_SO8 0_0603_5% UGATE1 UGATE2 0_0603_5% 1.8UH_SIL104R-1R8PF_9.5A_30%

G
S
S
S
0.01U_0402_25V7K

4 25 LX_1.2V NA 1 2
PHASE1 PHASE2
1

1 PR102 PR103
2
3
4
1

5
6
7
8
PC69

2
1.96K_0402_1% 2K_0402_1% 1
2

PR100 PR101 1 2 ISE_1.8V 7 22 ISE_1.2V 1 2

D
D
D
D
ISEN1 ISEN2

1
10.5K_0402_1% 0_0402_5% + PC70
2

DL_1.8V 2 27 PQ28 220U_D2_2VMR15


LGATE1 LGATE2

1
SI4810BDY-T1-E3_SO8 PR104 PR105

G
2.21K_0402_1% 2

S
S
S
0_0402_5%
2

PC71
0.01U_0402_25V7K

4
3
2
1

2
3 PGND1 PGND2 26
DL_1.2V

9 VOUT1 VOUT2 20
VSE_1.8V 10 19 VSE_1.2V
VSEN1 VSEN2
1 2 8 EN1 EN2 21 1 2
(37,39) POK 15 16 SUSP# (28,29,35,41)
PR106 PG1 PG2/REF PR107

GND

DDR

2
0_0402_5% 11 18 47K_0402_5%
OCSET1 OCSET2
1

1
PR109

1
PR111 PC73 ISL6227CAZ-T_SSOP28 PC72 @ 0_0402_5% PR110

13
PR108 @ 0_0402_5% @ 0.1U_0402_16V7K PR113 0.047U_0402_16V7K 6.49K_0402_1%

1
10K_0402_1% 80.6K_0402_1% PR112
2

1
90.9K_0402_1%
2

2
2

2
3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/11/01 Deciphered Date 2006/11/30 Title
+1.8V/+1.2V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom HCL51 LA-3211P 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 40 of 43
A B C D
5 4 3 2 1

D D

+5VS +1.2VSP

1
PR117
10K_0402_1%

1
1 2 PJ14
@ JUMP_43X118

2
PC76
1U_0603_6.3V6M

2
2
6

1
PU8
5 PC77

VCNTL
VIN 22U_1206_6.3V6M
7 POK

2
VOUT 4

PR114 3 +1.05VSP
0_0402_5% VOUT

1
1 2 8 EN FB 2 1

1
(28,29,35,40) SUSP#

GND

1
9 PR115 PC79 +
VIN

1
316_0402_1% 0.01U_0402_25V PC80 PC81
PC78 APL5912-KAC-TRL_SO8 22U_1206_6.3V6M @ 150U_D2E_6.3VM_R18

2
@ 0.1U_0402_16V7K 2

2
2

1
PR116
C 1K_0402_1% C

2
+1.8V

B B

1
+3VS
PJ10

1
@ JUMP_43X118
1

2
PJ11
1

@ JUMP_43X79

2
2

PU9
PU10 1 6 +5VALWP
VIN VCNTL
2

1 VIN VCNTL 6 +5VALWP


2 GND NC 5

1
2 5 PC88
GND NC
1

1
PC87 10U_1206_25VAK 3 7 PC89
VREF NC
1

10U_1206_25VAK 3 7 PC91 1U_0603_6.3V6M


VREF NC 1U_0603_6.3V6M PR122

2
4 VOUT NC 8
PR124 1K_0402_1%
2

4 VOUT NC 8
1.15K_0402_1% 9
TP

2
TP 9
G2992_SO8
2

G2992_SO8 PQ31
PQ38 2N7002-7-F_SOT23-3 +0.9VSP

1
2N7002-7-F_SOT23-3 D
+1.5VSP
1

D SUSP 1 2 2

1
1 2 2 PR125 G PR126
1

(35) SUSP PR123 G PR127 0_0402_5% S 1K_0402_1% PC95 PC96


1

0_0402_5% S 1K_0402_1% PC92 PC93 0.1U_0402_16V7K 10U_1206_25VAK


3
1

0.1U_0402_16V7K 10U_1206_25VAK PC97


3

2
PC94 @ 0.1U_0402_16V7K
2

@ 0.1U_0402_16V7K
2
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/23 Deciphered Date 2006/10/22 Title
+1.05V/+1.5V/+0.9V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom HCL51 LA-3211P 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 41 of 43
5 4 3 2 1
5 4 3 2 1

+5VS

CPU_B+ B+
PR186 PL9
5VS1 2 1 FBM-L11-322513-201LMAT_1210
2 1

0.01U_0402_25V7K
0_1206_5%

2200P_0402_50V7K
PR187

0.1U_0603_25V7K
1

PC134
10_0402_5%

1
+

10U_1206_25VAK

10U_1206_25VAK

10U_1206_25VAK
PC135

PC136

PC137

PC138

PC139

PC140
200K_0402_5%
100U_25V_M

PR188 1
2

2
D D

2
PC141 2

2
2
2.2U_0603_6.3V6K

2
PR189 PC142
@ 13K_0402_1% 1U_0603_6.3V6M

5
1

2
PQ43
PU11 SI7840DP-T1-E3_SO8
NTC

1
0_0402_5% VCC 19 25
PR190 Vcc VDD 0_0603_5% 0.22U_0603_16V7K 4
1 2 6 THRM TON 8
PR192 PC143
PR191 0_0402_5% 2 1 31 30 BST1_CPU 1 2 BSTM1_CPU 1 2
(5) CPU_VID0 D0 BST1 +CPU_CORE
PR268 2.2_0603_5%
PR193 0_0402_5% DH1__CPU-1 2 DH1__CPU-2 PL10

3
2
1
(5) CPU_VID1 2 1 32 D1 DH1 29 1
P_0.36H_ETQP4LR36WFC_24A_20%

4.7_1206_5%
PR194 0_0402_5% 2 1 33 28 LX1__CPU 2 1 +CPU_CORE
(5) CPU_VID2 D2 LX1

2.1K_0402_1%
PR195 0_0402_5% 2 1 34 26 DL1__CPU
(5) CPU_VID3 D3 DL1

5
6
7
8

5
6
7
8

2
FDS6676AS_SO8

PR196

PR198
FDS6676AS_SO8

10_0402_5%
PR197 0_0402_5% 2 1 35 27

D
D
D
D

D
D
D
D
(5) CPU_VID4 D4 PGND1

PQ44

PQ45
PR199 0_0402_5% 2 1 36 18 NTC
(5) CPU_VID5 D5 GND

1
3.48K_0402_1% 10K_0603_5%

2
G

G
S
S
S

S
S
S
PR200 0_0402_5% CSP1__CPU PR202 PR203

1
(5) CPU_VID6 1 2 37 D6 CSP1 17
1 2 1 2

680P_0603_50V7K
PR2042 71.5K_0402_1% CSN1_CPU

4
3
2
1

4
3
2
1
1 7 16

DL1__CPU
TIME CSN1 (5) VCCSENSE

PR201
PC144
FB_CPU

2
2 1 9 CCV FB 12 1 2
470P_0402_50V8J PC145

2
1 2 11 10 CCI_CPU PC146 0.22U_0603_16V7K
C REF CCI C
PR205 499_0402_1%(4,13) DPRSLPVR 1 2 PC147 0.22U_0603_16V7K 39 21 DH2_CPU-1
DPRSLPVR DH2

0_0402_5%
2
PR206 0_0402_5% (4) H_DPRSTP# 1 2 40 20 BST2_CPU
DPRSTP BST2
PR208 0_0402_5% (5) H_PSI# 1 2 3 22 LX2_CPU PR209 0_0402_5%
PSI LX2
1 2
+3VS 2 24 DL2__CPU
PWRGD DL2

PR207
PR210 @ 3K_0603_1% PC148 @ 0.022U_0402_16V7K

1
2

0_0603_5%
1 23 1 2 1 2 CPU_VCC_SENSE
CLKEN PGND2

PR211
2

38 14 CSP2_CPU PR214 3.65K_0402_1%


PR212 PR213 SHDN CSP2
1 2 1 2
PR216 @ 2K_0402_1% @ 2K_0402_1% 5 15 CSN2__CPU
0_0402_5% VRHOT CSN2 PR215 100_0402_5%

2
4 POUT GNDS 13
PC149
1

1 2 1 2 1 2

BSTM2_CPU
(15) VGATE 4700P_0402_25V7K
PR219 NTC PR217 PR218

1
(12) CLK_EN# 1 2 @ 3K_0603_1% @ 3K_0603_1%
MAX8770GTL+_TQFN40

2
@ 0_0402_5% 1 2 1 2
(28) VR_ON 1 2 PC151
1000P_0402_50V7K PC150
2

CPU_B+

0.22U_0603_16V7K
PR221 PR222 PR220 470P_0402_50V8J
1

1
0_0402_5% +3VS 2 20K_0402_1%

PC152
@ 10K_0402_5%
1

PR223

2200P_0402_50V7K
10U_1206_25VAK

10U_1206_25VAK

0.1U_0603_25V7K
10U_1206_25VAK
PR224 100_0402_5%

2
56_0402_5%
1

1
PC153

PC154

PC155

PC156

PC157
PR225 @ 0_0402_5% PQ47
1

B B
VSSENSE SI7840DP-T1-E3_SO8
2

1 2
(4,14) H_PROCHOT# (5) VSSENSE

2
PR269 2.2_0603_5%
1

1 2 DH2_CPU-2 4
1 2 PR227
(28) POUT
@10_0402_5%
2

PR226 10K_0402_5%
PC158
2

3
2
1
0.1U_0402_16V7K 2 1

4.7_1206_5%
1

PL11

1
P_0.36H_ETQP4LR36WFC_24A_20%

5
6
7
8
5
6
7
8

2.1K_0402_1%
PR228
FDS6676AS_SO8
D
D
D
D

1
FDS6676AS_SO8

PQ48
D
D
D
D

PR229
PQ49

2
G
S
S
S
G
S
S
S

680P_0603_50V7K
4
3
2
1

2
1

PC159
NTC

4
3
2
1

DL2__CPU
PR230 PR231
3.48K_0402_1% 10K_0603_5%

2
1 2 1 2

1 2

A PR232 0_0402_5% PC160 0.22U_0603_16V7K A


1 2

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2005/06/20 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+CPU_CORE
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期二, 四月 11, 2006 Sheet 42 of 43
5 4 3 2 1
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1


for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List VER Phase
D
1 D
For EMI require CPU core change from 0 to 2.2 42 MODIFY PR268/PR269 FROM 0 TO 2.2 DVT

modify 1.2V sequence(HW require) change PR107 from 0 to 1k ;add PC72: :0.01uF
2 40 DVT

change PR107 from 1K to 47K ;change PC72: : from


3 modify 1.2V sequence(HW require) 40 0.01uF to 0.047uF PVT
4

C C
7

10

11

B B

A A

Compal Electronics, Inc.


Title
PIR (PWR)
Size Document Number Rev
0.4

Date: 星期二, 四月 11, 2006 Sheet 43 of 43

5 4 3 2 1

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