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# STUDENT PROJECT

Submission date: 10th APRIL, 2011

## (d) Calculate delay (worst-case) and average power consumption.

(So you see, you are going to learn many new things!)

## WHAT YOU HAVE TO USE?

http://cmosedu.com/cmos1/cmosedu_models.txt , or get it from me).

(b) LTspice

## STYLE -I (FOR SECTION A STUDENTS ONLY)

Gk = Ak Bk (1a)

Pk = AK + Bk (1b)

## Co, 3 =G3+P3 [G2+P2 {G1+P1(G0+P0Ci,0)}] (2a)

Co,2 =G2+P2{G1+P1(G0+P0Ci,0)} (2b)

## Here, Ci,0 is input carry bit.

Example: To implement Co, 3 in CMOS, first Implement P3, G3,P2,G2 … etc. Please notice that each of PK and GK are
just OR & AND function. Now use these PK and GK to implement Co, 3 .

## STYLE-II (FOR SECTION B STUDENTS ONLY)

Her e you don’t need to generate P and G signals. Directly implement using A & B signals.

Co,3 =A3B3 +(A3 +B3 )[A2B2 +(A2 +B2 ){A1B1 +(A1 +B1 )(A0B0 +(A0 +B0 )Ci,0 )}]

(3a)

Co, 2 =A2B2 + (A2 +B2) {A1B1 + (A1 +B1)(A0B0 +(A0 +B0 )Ci,0 )}

(3b)

## Co, 0 =A0B0 + (A0 +B0) Ci, 0 ) (3d)

NOTE:

In both the styles, Pull up network (PUN) & Pull down network (PDN) will be same (generally

they are dual).This is due to special property these equations have gotten: inverting all the inputs

## How to make group:

Roll No 1-5 will implement eqn 2(a), Roll No 6-10 will implement eqn 2(b) and
so on. As there are only four eqns so the student should cycle through (rotate).

A similar statement holds true for section B student who are supposed to
implement Eqn 3.

REFERENCES:

## 2. RABEY, Digital integrated circuits, 2nd edition, chap: 11, pn-561-586

IN CASE YOU NEED ANY HELP, PLEASE FEEL FREE TO COME TO ME. Believe me, after