Quanta GM3

1 2 3 4 5 6 7 8
GM3(B) Pacino Intel Discrete & UMA Block Diagram

VER : 3A
A
Screw Hole blank Page POWER A
FAN & THERMAL
Merom or Penryn SMSC1423
PG 39 REGULATOR CPU VR
PG 45 PG 47 +1.5V_RUN/+1.05V_VCCP
PG 51
(478 Micro-FCPGA) PG 48
DC/DC
CLOCK REGULATOR +3.3V_ALW/+5V_ALW/
SLG8SP513V +1.8V_SUS/+1.25V_RUN +15V_ALW PG 52
POWER SYSTEM (QFN-64) /+0.9V_DDR_VTT
PG 3,4 PG 17 PG 49 VGA Core
RESET CIRCUIT PG 44 PG 50
BATT
AC/BATT CHARGER PG 46
LVDS
CONNECTOR 800 MHz FSB
RUN POWER SW Panel Connector
PG 54 +3.3V_SUS/+5V_SUS
PG 26
PCIEx16
+5V/+3.3V/+1.8V ATI M86-M VGA
PG 53
CRT CONN.
Crestline PCI EXPRESS GFX PG 27
GDDR2 x 8
B
HDMI B
DDR2-SODIMM1 667 MHZ DDR II (256M)

1299 uFCBGA HDMI CONN.
PG 23, 24 PG 18,19,20,21,22 PG 25
PG 15,16
667 MHZ DDR II
DDR2-SODIMM2 SiI1392 PG 18
IHDA
PG 5,6,7,8,9,10
PG 15,16 LAN
USB2.0 x 3
USB conn x 3 BCM5784M RJ45/Magnetics
SATA-ODD SATA PG 35
DMI interface PCIEx1 PG 43
PG 36 PG 42
PCIEx1
SATA-HDD SATA EXPRESS-CARD
USB2.0
PG 36
PG 30
ICH8-M PCIEx2
USB2.0 MINI-CARD
C PCIEx1 WLAN C
676 BGA PG 34
USB2.0
IHDA
USB2.0
USB2.0 MINI-CARD
PG 11,12,13,14 WWAN
AUDIO/AMP PG 33
STAC9228/92HD73C Biometric
Camera + D-MIC
PG 38
PG 40 PG 41 LPC MINI-CARD
WPAN
CIR PG 33
TSOP36136TR
Audio Audio KBC PG 37
SPK conn Jacks x3 ITE8512
18X8 1394 CONN.
PG 40 PG 41 33MHz PCI 8-in-1 Card Reader PG 29
PG 31 Keyboard
R5C833
SPI PS/2 PG 37 Card Reader CONN.
PG 28 PG 30
D
USER D
INTERFACE FLASH Touchpad

PG 38 2Mbyts
QUANTA
PG 32 PG 37
Title
COMPUTER
Schematic Block Diagram1
Size Document Number Rev

GM3 2B
Date: Monday, March 24, 2008 Sheet 1 of 62

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Table of Contents Power States

CONTROL
PAGE DESCRIPTION POWER PLANE VOLTAGE PAGE DESCRIPTION ACTIVE IN
SIGNAL
1 Schematic Block Diagram
2 Front Page +PWR_SRC 10V~+19V 4,26,32,34,48,49,50,51,52,55 MAIN POWER S0~S5
3-4 Merom
+RTC_CELL +3.0V~+3.3V 11,14,31,32 RTC S0~S5
5-10 Crestline
3,13,26,31,32,34,36,37,38,44,46,49,52,53,54
A 11-14 ICH8M +3.3V_ALW +3.3V 8051 POWER ALWON S0~S5 A
15-16 DDRII SO-DIMM(200P)

+5V_ALW +5V 35,36,46,48,49,52,53,54 LCD/CHARGE POWER ALWON S0~S5
17 Clock Generator
18-24 VGA +15V_ALW +15V 26,36,37,52,53 LARGE POWER +5V_ALW S0~S5
25 HDMI
+3.3V_LAN +3.3V 42,43 LAN POWER AUX_ON
26 LCD connector
27 CRT +5V_SUS +5V 14,38,50,51,53 SLP_S5# CTRLD POWER SUS_ON
28 Card reader PCI interface
+3.3V_SUS +3.3V 3,11,12,13,14,20,30,37,38,43,48,49,50,51,53 SLP_S5# CTRLD POWER 3.3V_SUS_ON
29 Card reader & 1394
30 Express card & card reader conn. +1.8V_SUS +1.8V 6,8,9,15,48,49,50,53,55 SODIMM POWER DDR_ON
31 SIO
+0.9V_DDR_VTT +0.9V 16,49,53 SODIMM POWER 0.9V_DDR_VTT_ON
32 Flash/RTC
14,20,25,27,36,37,38,39,40,41,53
33 WWAN/WPAN +5V_RUN +5V SLP_S3# CTRLD POWER RUN_ON
34 WLAN 6,8,9,11,12,13,14,15,17,19,20,22,25,26,27,28,
+3.3V_RUN +3.3V 30,33,34,36,38,39,40,41,42,53,55 SLP_S3# CTRLD POWER 3.3V_RUN_ON
35 USB port
B 36 SATA HDD & ODD +1.8V_RUN +1.8V 19,20,21,22,23,24,25,38,53 SDVO POWER RUN_ON B
37 TP/KB/MB/CIR
+1.5V_RUN +1.5V 4,9,14,30,33,34,48,,53,55 CALISTOGA/ICH8 POWER 1.5V_RUN_ON
38 switch/LED
39 FAN/Thermal +1.25V_RUN +1.25V 6,9,14,49,53 CALISTOGA/ICH8 POWER 1.25V_RUN_ON
40-41 Audio/CONN.
+1.05V_VCCP +1.05V 3,4,5,6,8,9,11,14,37,48,55 CPU/CALISTOGA/ICH8 POWER 1.05V_RUN_ON
42-43 Docking Conn/Q-Switch
44 System Reset Circuit +VCC_CORE +0.7V~+1.5V 4,51 CPU CORE POWER IMVP_VR_ON
45-46 Screw hole & Charger LCDVCC_TST_EN
+LCDVCC +3.3V 26 LCD Power & ENVDD
47 Blank page
48 1.05VCCP & 1.5VRUN +5V_MOD +5V 36 Module Power MODC_EN#
49 1.8VSUS & 0.9VTT
+5V_HDD +5V 36 HDD Power HDDC_EN#
50 VGA power circuit
51 CPU_ISL6266 (2phase) +5V_ALW2 +5V 37,38.52,53 LED power source LDO output
52 D/D ISL6237 3.3V/5V
53 RUN Power Switch
C C
54 DCIN,Batt
55 EMI CAP GND PLANE PAGE DESCRIPTION
56 SMBUS BLOCK
8731AGND
57 Power statu & Block diagram 46
AGND_0.9V
49
AGND_DC/DC
52
AGND_DC2
48
AGND_DDR
49
AGND_ISL6260
51
GND ALL
D D
QUANTA
Title
COMPUTER
Index & Power Status

GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
H_A#[3..16] U42A H_D#[0..63] U42B H_D#[0..63]

5 H_A#[3..16] 5 H_D#[0..63] H_D#[0..63] 5
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 5 D[0]# D[32]#
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 5 D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 5 D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35 H_D#32
A[6]# D[3]# D[35]# T168 PAD
H_A#7 M3 H5 H_D#4 F23 V23 H_D#36
A[7]# DEFER# H_DEFER# 5 D[4]# D[36]#
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 5 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38 PAD T169 H_D#40
A[9]# DBSY# H_DBSY# 5 D[6]# D[38]#
H_A#10 N3 +1.05V_VCCP H_D#7 E23 U23 H_D#39
T176 A[10]# H_BR0# 5 D[7]# D[39]#
ADDR GROUP 0
DATA GRP 0
H_A#11 H_D#8 H_D#40
DATA GRP 2
P5 A[11]# BR0# F1 Layout Note: K24 D[8]# D[40]# Y25
PAD H_A#12 P2 H_D#9 G24 W22 H_D#41 H_D#53
A[12]# Place R421 T148T147 D[9]# D[41]# PAD T172
H_A#13 L2 D20 H_IERR# R132 56 H_D#10 J24 Y23 H_D#42
CONTROL
A A[13]# IERR# +1.05V_VCCP close to PAD PAD D[10]# D[42]# A
H_A#14 P4 B3 H_D#11 J23 W24 H_D#43
A[14]# INIT# H_INIT# 11 D[11]# D[43]#
H_A#15 P1 A[15]# H_LOCK# 5
R116 CPU. H_D#12 H22 D[12]# D[44]# W25 H_D#44 PAD T173 H_D#57
H_A#16 R1 H4 51 H_D#13 F26 AA23 H_D#45
A[16]# LOCK# H_D#14 D[13]# D[45]# H_D#46
5 H_ADSTB#0 M1 ADSTB[0]# K22 D[14]# D[46]# AA24
H_REQ#[0..4] C1 H_RESET#_L
R121 0 H_RESET# H_D#15 H23 AB25 H_D#47
5 H_REQ#[0..4] RESET# H_RESET# 5 D[15]# D[47]#
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 5 5 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 5
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 5 5 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 5
H_REQ#2 K2 G3 H25 U22
REQ[2]# RS[2]# H_RS#2 5 5 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 5
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# 5 H_D#[0..63] H_D#[0..63]
H_REQ#4 L1
H_A#[17..35] REQ[4]# 5 H_D#[0..63] H_D#[0..63] 5
G6 H_D#16 N22 AE24 H_D#48
5 H_A#[17..35] HIT# H_HIT# 5 D[16]# D[48]#
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 5 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# ITP_BPM#0 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AB22
H_A#20 W6 AD3 ITP_BPM#1 Layout Note: H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# T165 D[20]# D[52]#
ADDR GROUP 1
PAD T177 H_A#14 H_A#21 U4 AD1 ITP_BPM#2 Place voltage H_D#21 M24 AC26 H_D#53
XDP/ITP SIGNALS
H_A#22 A[21]# BPM[2]# ITP_BPM#3 PAD H_D#22 D[21]# D[53]# H_D#54
Y5 A[22]# BPM[3]# AC4 L22 D[22]# D[54]# AD20
divider within
DATA GRP 1
H_A#9 H_A#23 ITP_BPM#4 H_D#23 H_D#55
DATA GRP 3
T180PAD U1 AC2 M23 AE22
H_A#24 A[23]# PRDY# ITP_BPM#5 0.5" of GTLREF H_D#24 D[23]# D[55]# H_D#56
R4 A[24]# PREQ# AC1 P25 D[24]# D[56]# AF23
H_A#24 T185PAD H_A#25 T5 AC5 ITP_TCK pin H_D#28 H_D#25 P23 AC25 H_D#57
H_A#26 A[25]# TCK ITP_TDI T152 T156 H_D#26 D[25]# D[57]# H_D#58
T3 A[26]# TDI AA6 P22 D[26]# D[58]# AE21
H_A#17 T184PAD H_A#27 W2 AB3 ITP_TDO PAD PAD H_D#27 T24 AD21 H_D#59
H_A#28 A[27]# TDO ITP_TMS +1.05V_VCCP H_D#28 D[27]# D[59]# H_D#60
W5 A[28]# TMS AB5 R24 D[28]# D[60]# AC22
H_A#29 Y4 AB6 ITP_TRST# H_D#29 L25 AD23 H_D#61
T182 H_A#30 A[29]# TRST# ITP_DBRESET# H_D#30 D[29]# D[61]# H_D#62
U2 A[30]# DBR# C20 ITP_DBRESET# 13 T25 D[30]# D[62]# AF22
PAD H_A#31 V4 H_D#31 N25 AC23 H_D#63
H_A#32 A[31]# D[31]# D[63]#
W3 A[32]# 5 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 5
H_A#33 AA4 THERMAL R134 56 +1.05V_VCCP R60 M26 AF24
A[33]# 5 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 5
H_A#34 AB2 1K/F N24 AC20
A[34]# 5 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 5
B H_A#35 AA3 D21 H_PROCHOT# B
A[35]# PROCHOT# PAD T13
V1 A24 H_THERMDA V_CPU_GTLREF AD26 R26 COMP0 Note:
5 H_ADSTB#1 ADSTB[1]# THERMDA H_THERMDA 39 GTLREF COMP[0]
B25 H_THERMDC CPU_TEST1 C23 MISC COMP[1] U26 COMP1 H_DPRTSTP need to daisy chain
THERMDC H_THERMDC 39 TEST1
A6 CPU_TEST2 D25 AA1 COMP2
11 H_A20M# A20M# TEST2 COMP[2] from ICH8 to IMVP6 to CPU.
A5 C7 H_THERM CPU_TEST3 C24 Y1 COMP3
11 H_FERR# FERR# THERMTRIP# TEST3 COMP[3]
ICH
C4 R53 CPU_TEST4 AF26

11 H_IGNNE# IGNNE# TEST4
R118 56 +1.05V_VCCP 2K/F CPU_TEST5 AF1 E5
TEST5 DPRSTP# H_DPRSTP# 6,11,51
D5 H CLK CPU_TEST6 A26 B5
11 H_STPCLK# STPCLK# TEST6 DPSLP# H_DPSLP# 11
11 H_INTR C6 LINT0 DPWR# D24 H_DPWR# 5
11 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 17 6,17 CPU_MCH_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGOOD 11
11 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# 17 6,17 CPU_MCH_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 5
6,17 CPU_MCH_BSEL2 C21 BSEL[2] PSI# AE6 H_PSI# 51
M4 RSVD[01]
N5 MLX_47387-4784
RSVD[02]
T2 RSVD[03] Voltage Level shift
V3 H_THERMDA C777 H_THERMDC
RESERVED
RSVD[04] 2200P_NC 50 +1.05V_VCCP +3.3V_ALW R137 1K/F_NC CPU_TEST1

B2 RSVD[05]
C3 PAD T14 CPU_TEST3
RSVD[06] R127 1K/F_NC CPU_TEST2 CPU_TEST5
D2 RSVD[07] PAD T3
D22 RSVD[08]
D3 C54 0.1U_NC CPU_TEST4 For the purpose of testability, route these signals
RSVD[09] R693 10
F6 RSVD[10] through a ground referenced Z0 = 55ohm trace that
2.2K_NC R138 0_NC CPU_TEST6
2
Q69 ends in a via that is near a GND via and is
accessible through an oscilloscope connection.
MLX_47387-4784 H_PROCHOT# 1 3 Place C close to the
CPU_PROCHOT#
CPU_TEST4 pin. Make sure
2N7002W-7-F_NC CPU_TEST4 routing is
C
reference to GND and away FSB BCLK BSEL2 BSEL1 BSEL0 C
from other noisy signal.
533 133 0 0 1
Populate ITP700Flex for bringup 667 166 0 1 1

800 200 0 1 0
+1.05V_VCCP
+3.3V_RUN
H_THERMTRIP# 6,52
Layout Note:
COMP0
Place couple 0.1uF Decoupling 1
COMP1
caps with in 0.1" ITP connector. COMP2
R130 COMP3
3
R599 R595 R594 +1.05V_VCCP +3.3V_SUS 10M Q29
51 39/F 150 2 2N7002W-7-F
32
JITP1 C673 0.1U_NC

1
10 H_THERM 2
ITP_TDI 1 TDI VTT0 27 C976 1 R62 R59 R78 R87
ITP_TMS 2 28 C674 0.1U_NC Q81 0.1U 54.9/F 27.4/F 54.9/F 27.4/F
1
ITP_TCK TMS VTT1 10 MMST3904-7-F 10

5 TCK VTAP 26
ITP_TDO R598 0_NC 7
ITP_TRST# TDO
3 TRST#
Comp0,2 connect with Zo=27.4ohm,Comp1,3
H_RESET# R600 22.6/F_NC ITP_DBRESET# R602 150
connect with Zo=55ohm, make those traces
12 RESET# DBR# 25
24 length shorter than 0.5".Trace should be
DBA# at least 25 mils away from any other
ITP_TCK 11 ITP disable guidelines toggling signal.
FBO
D
17 CLK_CPU_ITP# 8 BCLKN Signal Resistor Value Connect To Resistor Placement D
9 23 ITP_BPM#0
17 CLK_CPU_ITP BCLKP BPM0#
21 ITP_BPM#1 Layout nopte: TDI 150 ohm +/- 5% VTT Within 2.0" of the ITP
BPM1# ITP_BPM#2
19
10
14
GND0
BPM2#
BPM3# 17
15
ITP_BPM#3
ITP_BPM#4
Place R412,R354, R408, R409, R350
and R406 close to CPU
TMS 39 ohm +/- 5% VTT Within 2.0" of the ITP QUANTA
GND1 BPM4# ITP_BPM#5
R597 27/F ITP_TCK
16
18
20
GND2
GND3
BPM5#
NC0
13
4
6
TRST#
TCK
680 ohm +/- 5%
27 ohm +/- 5%
GND
GND
Within 2.0" of the ITP
Within 2.0" of the ITP Title
COMPUTER
GND4 NC1 Merom Processor (HOST BUS)
22 GND5 GND_0 29
R596 649/F ITP_TRST# 30 TDO Open VTT Within 2.0" of the ITP
GND_1 Size Document Number Rev
ITP700Flex_NC ITP_EN R268 Depop +3VRUN Close to CK410M Pin8 GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+VCC_CORE +VCC_CORE U42D

U42C A4 P6
VSS[001] VSS[082]
A7 VCC[001] VCC[068] AB20 A8 VSS[002] VSS[083] P21
A9 VCC[002] VCC[069] AB7 A11 VSS[003] VSS[084] P24
+VCC_CORE All use 10U 4V(+-20%,X6S,0805)Pb-Free. A10 AC7 A14 R2
VCC[003] VCC[070] VSS[004] VSS[085]
A12 VCC[004] VCC[071] AC9 A16 VSS[005] VSS[086] R5
C78 C81 C80 C79 C732 A17 AC15 AF2 T1
10U 10U 10U 10U 10U VCC[007] VCC[074] VSS[008] VSS[089]
A18 VCC[008] VCC[075] AC17 B6 VSS[009] VSS[090] T4
4 4 4 4 4 A20 AC18 B8 T23
A
805 805 805 805 805 VCC[009] VCC[076] VSS[010] VSS[091] A
B7 VCC[010] VCC[077] AD7 B11 VSS[011] VSS[092] T26
B9 VCC[011] VCC[078] AD9 B13 VSS[012] VSS[093] U3
+VCC_CORE B14 AD14 B21 U24
VCC[014] VCC[081] VSS[015] VSS[096]
B15 VCC[015] VCC[082] AD15 B24 VSS[016] VSS[097] V2
B17 VCC[016] VCC[083] AD17 C5 VSS[017] VSS[098] V5
B18 VCC[017] VCC[084] AD18 C8 VSS[018] VSS[099] V22
C82 C83 C84 C85 C77 B20 AE9 C11 V25
C9 VCC[019] VCC[086] AE10 C14 VSS[020] VSS[101] W1
4 4 4 4 4 C10 AE12 C16 W4
805 805 805 805 805 VCC[020] VCC[087] VSS[021] VSS[102]
C15 VCC[023] VCC[090] AE17 C22 VSS[024] VSS[105] Y3
8 inside cavity, north side, secondary layer. C17 VCC[024] VCC[091] AE18 C25 VSS[025] VSS[106] Y6
C18 VCC[025] VCC[092] AE20 D1 VSS[026] VSS[107] Y21
D9 VCC[026] VCC[093] AF9 D4 VSS[027] VSS[108] Y24
+VCC_CORE D10 AF10 D8 AA2
VCC[027] VCC[094] VSS[028] VSS[109]
D12 VCC[028] VCC[095] AF12 D11 VSS[029] VSS[110] AA5
C144 C143 C142 C141 C761 D17 AF17 D19 AA14
4 4 4 4 4 E7 AF20 +1.05V_VCCP D26 AA19
805 805 805 805 805 VCC[033] VCC[100] VSS[034] VSS[115]
E9 VCC[034] E3 VSS[035] VSS[116] AA22
E10 VCC[035] VCCP[01] G21 E6 VSS[036] VSS[117] AA25
E12 VCC[036] VCCP[02] V6 E8 VSS[037] VSS[118] AB1
E13 VCC[037] VCCP[03] J6 E11 VSS[038] VSS[119] AB4
+VCC_CORE E15 K6 + C96 E14 AB8
VCC[038] VCCP[04] 220U VSS[039] VSS[120]
B E17 VCC[039] VCCP[05] M6 E16 VSS[040] VSS[121] AB11 B
E18 J21 4 E19 AB13
VCC[040] VCCP[06] VSS[041] VSS[122]
E20 VCC[041] VCCP[07] K21 E21 VSS[042] VSS[123] AB16
C140 C139 C138 C137 C136 F7 M21 E24 AB19
10U 10U 10U 10U 10U VCC[042] VCCP[08] VSS[043] VSS[124]
F9 VCC[043] VCCP[09] N21 F5 VSS[044] VSS[125] AB23
4 4 4 4 4 F10 N6 F8 AB26
805 805 805 805 805 VCC[044] VCCP[10] VSS[045] VSS[126]
F12 VCC[045] VCCP[11] R21 F11 VSS[046] VSS[127] AC3
F14 R6 +1.5V_RUN F13 AC6
VCC[046] VCCP[12] VSS[047] VSS[128]
F15 VCC[047] VCCP[13] T21 F16 VSS[048] VSS[129] AC8
8 inside cavity, south side, secondary layer. F17 VCC[048] VCCP[14] T6 F19 VSS[049] VSS[130] AC11
F18 VCC[049] VCCP[15] V21 F2 VSS[050] VSS[131] AC14
F20 VCC[050] VCCP[16] W21 F22 VSS[051] VSS[132] AC16
AA7 VCC[051] F25 VSS[052] VSS[133] AC19
+VCC_CORE AA9 B26 G4 AC21
VCC[052] VCCA[01] VSS[053] VSS[134]
AA10 VCC[053] VCCA[02] C26 G1 VSS[054] VSS[135] AC24
AA12 VCC[054] G23 VSS[055] VSS[136] AD2
AA13 VCC[055] VID[0] AD6 VID0 51 G26 VSS[056] VSS[137] AD5
C729 C728 C727 C726 C731 C730 AA15 AF5 C194 C781 H3 AD8
VCC[056] VID[1] VID1 51 VSS[057] VSS[138]
10U 10U 10U 10U 10U 10U AA17 AE5 0.01U 10U H6 AD11
4 4 4 4 4 4 AA18 AF4 25 4 H21 AD13
805 805 805 805 805 805 AA20 AE3 H24 AD16
AB9 VCC[060] VID[5] AF3 VID5 51 J2 VSS[061] VSS[142] AD19
AC10 VCC[061] VID[6] AE2 VID6 51 J5 VSS[062] VSS[143] AD22
6 inside cavity, north side, primary layer. AB10 VCC[062] J22 VSS[063] VSS[144] AD25
AB12 VCC[063] Layout Note: J25 VSS[064] VSS[145] AE1
AB14 AF7 +VCCSENSE Place C105 near PIN K1 AE4
VCC[064] VCCSENSE +VCCSENSE 51 VSS[065] VSS[146]
+VCC_CORE AB15 K4 AE8
VCC[065] B26. VSS[066] VSS[147]
AB17 VCC[066] K23 VSS[067] VSS[148] AE11
AB18 AE7 +VSSSENSE K26 AE14
VCC[067] VSSSENSE +VSSSENSE 51 VSS[068] VSS[149]
C
L3 VSS[069] VSS[150] AE16 C
C755 C756 C757 C758 C759 C760 MLX_47387-4784 L6 AE19
10U 10U 10U 10U 10U 10U VSS[070] VSS[151]
. L21 VSS[071] VSS[152] AE23
4 4 4 4 4 4 L24 AE26
805 805 805 805 805 805 +VCC_CORE VSS[072] VSS[153]
M2 VSS[073] VSS[154] A2
M5 VSS[074] VSS[155] AF6
M22 VSS[075] VSS[156] AF8
6 inside cavity, south side, primary layer. M25 VSS[076] VSS[157] AF11
R47 N1 AF13
100/F VSS[077] VSS[158]
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
+VCCSENSE P3 A25
+VSSSENSE VSS[081] VSS[162]
VSS[163] AF25
+PWR_SRC
+1.05V_VCCP MLX_47387-4784
.
R48
+ C733 + C766 + C736 + C720 100/F
100U 100U 100U_NC 100U_NC
C91 C112 C87 C127 C88 C128 25 25 25 25
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
10 10 10 10 10 10
Route VCCSENSE and VSSSENSE
Layout Note: traces at 27.4ohms and
Layout out: Need to add 100uF cap on PWR_SRC for cap singing. length matched to within 25
Place these inside socket cavity on North side secondary. Place on PWR_SRC near +VCC_CORE. mil. Place PU and PD within
2 inch of CPU.
D D
QUANTA
Title
COMPUTER
Merom Processor (POWER)

GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
T154 T155
PAD PAD
H_D#3 H_D#12
T164
PAD
U45A H_A#[3..35]
H_D#[0..63] H_A#[3..35] 3
J13 H_A#3
3 H_D#[0..63] H_A#_3
H_D#0 E2 B11 H_A#4
H_D#27 H_D#28 H_D#1 H_D#_0 H_A#_4 H_A#5
A
G2 H_D#_1 H_A#_5 C11 A
H_D#2 G7 M11 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
M6 H_D#_3 H_A#_7 C15
H_D#4 H7 F16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H3 H_D#_5 H_A#_9 L13
H_D#6 G4 G17 H_A#10
H_D#7 H_D#_6 H_A#_10 H_A#11
F3 H_D#_7 H_A#_11 C14
H_D#8 N8 K16 H_A#12
H_D#9 H_D#_8 H_A#_12 H_A#13
H2 H_D#_9 H_A#_13 B13
H_D#10 M10 L16 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
N12 H_D#_11 H_A#_15 J17
H_D#12 N9 B14 H_A#16
+1.05V_VCCP H_D#13 H_D#_12 H_A#_16 H_A#17
H5 H_D#_13 H_A#_17 K19
H_D#14 P13 P15 H_A#18
H_D#15 H_D#_14 H_A#_18 H_A#19
K9 H_D#_15 H_A#_19 R17
H_D#16 M2 B16 H_A#20
H_D#_16 H_A#_20
1
H_D#17 W10 H20 H_A#21

R733 H_D#18 H_D#_17 H_A#_21 H_A#22
Y8 H_D#_18 H_A#_22 L19
221/F H_D#19 V4 D17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
M3 H_D#_20 H_A#_24 M17
H_D#21 J1 N16 H_A#25
2
H_SWING H_D#22 H_D#_21 H_A#_25 H_A#26

N5 H_D#_22 H_A#_26 J19
H_D#23 N3 B18 H_A#27
H_D#_23 H_A#_27
1
H_D#24 W6 E19 H_A#28

H_D#_24 H_A#_28
2
R732 H_D#25 W9 B17 H_A#29

100/F C805 H_D#26 H_D#_25 H_A#_29 H_A#30
N2 H_D#_26 H_A#_30 B15
0.1U/10V H_D#27 Y7 E17 H_A#31
1
H_D#28 H_D#_27 H_A#_31 H_A#32

Y9 C18
2
H_D#29 H_D#_28 H_A#_32 H_A#33

P4 H_D#_29 H_A#_33 A19
H_D#30 W3 B19 H_A#34
H_D#31 H_D#_30 H_A#_34 H_A#35
B N1 H_D#_31 H_A#_35 N19 B
H_D#32 AD12
H_D#33 H_D#_32
AE3 H_D#_33 H_ADS# G12 H_ADS# 3
H_D#34 AD9 H17
H_D#_34 H_ADSTB#_0 H_ADSTB#0 3
H_D#35 AC9 G20
H_D#_35 H_ADSTB#_1 H_ADSTB#1 3
HOST
H_D#36 AC7 C8
H_D#_36 H_BNR# H_BNR# 3
+1.05V_VCCP H_D#37 AC14 E8
H_D#_37 H_BPRI# H_BPRI# 3
H_D#38 AD11 F12
H_D#_38 H_BREQ# H_BR0# 3
H_D#39 AC11 D6
H_D#_39 H_DEFER# H_DEFER# 3
H_D#40 AB2 C10
H_D#_40 H_DBSY# H_DBSY# 3
H_D#41 AD7 AM5
H_D#_41 HPLL_CLK CLK_MCH_BCLK 17
1
H_D#42 AB1 AM7

H_D#_42 HPLL_CLK# CLK_MCH_BCLK# 17
R272 R268 H_D#43 Y3 H8
H_D#_43 H_DPWR# H_DPWR# 3
54.9/F 54.9/F H_D#44 AC6 K7
H_D#_44 H_DRDY# H_DRDY# 3
H_D#45 AE2 E4
H_D#_45 H_HIT# H_HIT# 3
H_D#46 AC5 C6 H_HITM# 3
2
H_SCOMP H_D#47 H_D#_46 H_HITM#

AG3 H_D#_47 H_LOCK# G10 H_LOCK# 3
H_SCOMP# H_D#48 AJ9 B7
H_D#_48 H_TRDY# H_TRDY# 3
H_D#49 AH8
H_RCOMP H_D#50 H_D#_49
AJ14 H_D#_50
H_D#51 AE9 H_D#_51 T149T150 T159T160
1
H_D#52 AE11
R734 H_D#53 H_D#_52 PAD PAD PAD PAD
AH12 H_D#_53 H_DINV#_0 K5 H_DINV#0 3
24.9/F H_D#54 AJ5 L2
H_D#_54 H_DINV#_1 H_DINV#1 3
H_D#55 AH5 AD13
H_D#_55 H_DINV#_2 H_DINV#2 3
Layout Note: H_D#56 AJ6 AE13 H_DINV#3 3
2
H_D#57 H_D#_56 H_DINV#_3

H_RCOMP trace should be AE7 H_D#_57
H_D#58 AJ7 M7
10-mil wide with 20-mil H_D#_58 H_DSTBN#_0 H_DSTBN#0 3
H_D#59 AJ2 K3
H_D#_59 H_DSTBN#_1 H_DSTBN#1 3
C
spacing. H_D#60 AE5 H_D#_60 H_DSTBN#_2 AD2 H_DSTBN#2 3 C
H_D#61 AJ3 AH11
H_D#_61 H_DSTBN#_3 H_DSTBN#3 3
H_D#62 AH2
H_D#63 H_D#_62
AH13 H_D#_63 H_DSTBP#_0 L7 H_DSTBP#0 3
H_DSTBP#_1 K2 H_DSTBP#1 3
H_DSTBP#_2 AC2 H_DSTBP#2 3
H_SWING B3 AJ10
+1.05V_VCCP H_SWING H_DSTBP#_3 H_DSTBP#3 3
H_RCOMP C2 H_RCOMP
H_REQ#_0 M14 H_REQ#0 3
H_SCOMP W1 E13
H_SCOMP H_REQ#_1 H_REQ#1 3
2
H_SCOMP# W2 A11
H_SCOMP# H_REQ#_2 H_REQ#2 3
R720 R192 0 H13
H_REQ#_3 H_REQ#3 3
1K/F 1 2 B6 B12
3 H_RESET# H_CPURST# H_REQ#_4 H_REQ#4 3
3 H_CPUSLP# E5 H_CPUSLP#
E12 H_RS#0 3
1
H_RS#_0
H_RS#_1 D7 H_RS#1 3
H_RS#_2 D8 H_RS#2 3
H_REF B9 H_AVREF
A9 H_DVREF
1
CRESTLINE_1p0_DU
1
R728 C807
2K/F 0.1U/10V
2
U45 QCI PN
2
Layout Note:
Place the 0.1 uF DIS
D decoupling capacitor AJSLA5U0T11 D
within 100 mils from
GMCH pins.
UMA
AJSLA5T0T13
QUANTA
Title
COMPUTER
Crestline (HOST)

GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U45B POP FOR UMA U45C +VCC_PEG

PCIE_MTX_GRX_N[0..15] 18
+3.3V_RUN
+1.8V_SUS PCIE_MTX_GRX_P[0..15] 18
R139 0_UMA UMA_BIA_PWM_RJ40
P36
P37
RSVD1
RSVD2 SM_CK_0 AV29 M_CLK_DDR0 15
POP FOR UMA 26 UMA_BIA_PWM
31 UMA_PANEL_BKEN
R226 0_UMA PANEL_BKEN_R H39 L_BKLT_CTRL
L_BKLT_EN PEG_COMPI N43 +VCC3G_PCIE_R R251 24.9/F
R35 BB23 LCTLA_CLK E39 M43
RSVD3 SM_CK_1 M_CLK_DDR1 15 L_CTRL_CLK PEG_COMPO
N35 BA25 R159 2.2K_UMA LCD_DDCCLK_R LCTLB_DATA E40
RSVD4 SM_CK_3 M_CLK_DDR3 15 L_CTRL_DATA
R323 AR12 AV23 R160 2.2K_UMA LCD_DDCDAT_R R144 0_UMA LCD_DDCCLK_R C37
RSVD5 SM_CK_4 M_CLK_DDR4 15 26 UMA_LCD_DDCCLK L_DDC_CLK PCIE_MRX_GTX_N[0..15] 18
1K/F AR13 R145 0_UMA LCD_DDCDAT_R D35 J51 PCIE_MRX_GTX_N0
RSVD6 26 UMA_LCD_DDCDAT L_DDC_DATA PEG_RX#_0
AM12 AW30 R181 0_UMA ENVDD_R K40 L51 PCIE_MRX_GTX_N1_L
R238 PCIE_MRX_GTX_N1
RSVD7 SM_CK#_0 M_CLK_DDR#0 15 26 UMA_ENVDD L_VDD_EN PEG_RX#_1
SM_RCOMP_VOH AN13 BA23 R213 0 LCTLA_CLK N47 PCIE_MRX_GTX_N2 0_DIS
RSVD8 SM_CK#_1 M_CLK_DDR#1 15 PEG_RX#_2
J12 AW25 R187 0 LCTLB_DATA 2R240 3.3K/F_UMA
1 L_IBG L41 T45 PCIE_MRX_GTX_N3
RSVD9 SM_CK#_3 M_CLK_DDR#3 15 LVDS_IBG PEG_RX#_3
AR37 AW23 PAD T22 L43 T50 PCIE_MRX_GTX_N4
RSVD10 SM_CK#_4 M_CLK_DDR#4 15 LVDS_VBG PEG_RX#_4
C377 C390 AM36 R248 0_UMA N41 U40 PCIE_MRX_GTX_N5
0.01U 2.2U R319 RSVD11 LVDS_VREFH PEG_RX#_5 PCIE_MRX_GTX_N6
AL36 RSVD12 SM_CKE_0 BE29 DDR_CKE0_DIMMA 15,16 N40 LVDS_VREFL PEG_RX#_6 Y44
25 10 3.01K AM37 AY32 +1.8V_SUS R197 UMA_LCD_ACLK- D46
0_UMA Y40 PCIE_MRX_GTX_N7
RSVD13 SM_CKE_1 DDR_CKE1_DIMMA 15,16 26 UMA_LCD_ACLK-_C LVDSA_CLK# PEG_RX#_7
A D20 BD39 R198 UMA_LCD_ACLK+ C45
0_UMA AB51 PCIE_MRX_GTX_N8 A
DDR_CKE3_DIMMB 15,16 26 UMA_LCD_ACLK+_C
MUXING
RSVD14 SM_CKE_3 R188 UMA_LCD_BCLK- D44
0_UMA LVDSA_CLK PEG_RX#_8 PCIE_MRX_GTX_N9
SM_CKE_4 BG37 DDR_CKE4_DIMMB 15,16 26 UMA_LCD_BCLK-_C LVDSB_CLK# PEG_RX#_9 W49
SM_RCOMP_VOL R189 UMA_LCD_BCLK+ E42
0_UMA AD44 PCIE_MRX_GTX_N10
26 UMA_LCD_BCLK+_C LVDSB_CLK PEG_RX#_10
LVDS
SM_CS#_0 BG20 DDR_CS0_DIMMA# 15,16 PEG_RX#_11 AD40 PCIE_MRX_GTX_N11
BK16 R321 R173 UMA_LCD_A0-_R
0_UMA G51 AG46 PCIE_MRX_GTX_N12
SM_CS#_1 DDR_CS1_DIMMA# 15,16 26 UMA_LCD_A0- LVDSA_DATA#_0 PEG_RX#_12
C399 C412 BG16 20/F R195 UMA_LCD_A1-_R
0_UMA E51 AH49 PCIE_MRX_GTX_N13
SM_CS#_2 DDR_CS2_DIMMB# 15,16 26 UMA_LCD_A1- LVDSA_DATA#_1 PEG_RX#_13
0.01U 2.2U R322 H10 BE13 R177 UMA_LCD_A2-_R
0_UMA F49 AG45 PCIE_MRX_GTX_N14
RSVD20 SM_CS#_3 DDR_CS3_DIMMB# 15,16 26 UMA_LCD_A2- LVDSA_DATA#_2 PEG_RX#_14
25 10 1K/F B51 SMRCOMPP AG41 PCIE_MRX_GTX_N15
RSVD21 SMRCOMPN PEG_RX#_15
BJ20 RSVD22 SM_ODT_0 BH18 M_ODT0 15,16 PCIE_MRX_GTX_P[0..15] 18
RSVD
GRAPHICS
BK22 BJ15 R174 UMA_LCD_A0+_R G50
0_UMA J50 PCIE_MRX_GTX_P0
RSVD23 SM_ODT_1 M_ODT1 15,16 26 UMA_LCD_A0+ LVDSA_DATA_0 PEG_RX_0
BF19 BJ14 R196 UMA_LCD_A1+_R E50
0_UMA L50 PCIE_MRX_GTX_P1_L
R245 PCIE_MRX_GTX_P1
DDR
BH20 BE16 R178 UMA_LCD_A2+_R F48
0_UMA M47 PCIE_MRX_GTX_P2 0_DIS
Santa Rosa Platform MOW WW15 BK18 R318 U44 PCIE_MRX_GTX_P3
RSVD26 SMRCOMPP 20/F PEG_RX_3 PCIE_MRX_GTX_P4
For 4Gb DRAM support, BJ18 RSVD27 SM_RCOMP BL15 PEG_RX_4 T49
BF23 BK14 SMRCOMPN R201 UMA_LCD_B0-_R
0_UMA G44 T41 PCIE_MRX_GTX_P5
change Pin-BJ29 to DDR_A_MA14, RSVD28 SM_RCOMP# 26 UMA_LCD_B0- LVDSB_DATA#_0 PEG_RX_5
BG23 R176 UMA_LCD_B1-_R
0_UMA B47 W45 PCIE_MRX_GTX_P6
RSVD29 26 UMA_LCD_B1- LVDSB_DATA#_1 PEG_RX_6
change Pin-BE24 to DDR_B_MA14. BC23 BK31 SM_RCOMP_VOH
26 UMA_LCD_B2-
R200 UMA_LCD_B2-_R
0_UMA B45 W41 PCIE_MRX_GTX_P7
RSVD30 SM_RCOMP_VOH SM_RCOMP_VOL LVDSB_DATA#_2 PEG_RX_7
BD24 RSVD31 SM_RCOMP_VOL BL31 PEG_RX_8 AB50 PCIE_MRX_GTX_P8
BJ29 Y48 PCIE_MRX_GTX_P9
15,16 DDR_A_MA14 RSVD32 PEG_RX_9
BE24 AR49 +V_DDR_MCH_REF R202 UMA_LCD_B0+_R E44
0_UMA AC45 PCIE_MRX_GTX_P10
15,16 DDR_B_MA14 RSVD33 SM_VREF_0 26 UMA_LCD_B0+ LVDSB_DATA_0 PEG_RX_10
BH39 AW4 R175 UMA_LCD_B1+_R A47
0_UMA AC41 PCIE_MRX_GTX_P11
RSVD34 SM_VREF_1 26 UMA_LCD_B1+ LVDSB_DATA_1 PEG_RX_11
AW20 R199 UMA_LCD_B2+_R A45
0_UMA AH47 PCIE_MRX_GTX_P12
RSVD35 26 UMA_LCD_B2+ LVDSB_DATA_2 PEG_RX_12
AG49 PCIE_MRX_GTX_P13
R208 0_UMA UMA_LCD_A3-_R
BK20 RSVD36 POP FOR UMA PEG_RX_13
AH45 PCIE_MRX_GTX_P14
PCI-EXPRESS
26 UMA_LCD_A3- C48 RSVD37 PEG_RX_14
R215 0_UMA UMA_LCD_A3+_R D47 B42 MCH_DREFCLK_L +1.25V_RUN AG42 PCIE_MRX_GTX_P15
26 UMA_LCD_A3+ RSVD38 DPLL_REF_CLK MCH_DREFCLK 17 PEG_RX_15
R179 0_UMA UMA_LCD_B3-_R B44 C42 MCH_DREFCLK#_L R717 0_UMA
26 UMA_LCD_B3- RSVD39 DPLL_REF_CLK# MCH_DREFCLK# 17
R180 0_UMA UMA_LCD_B3+_R DREF_SSCLK_L R716 0_UMA R269 0_DU PCIE_MTX_GRX_C_N0 C817 0.1U_DIS PCIE_MTX_GRX_N0
26 UMA_LCD_B3+ C44
A35
RSVD40 DPLL_REF_SSCLK H48
H47 DREF_SSCLK#_L R241 0_UMA
DREF_SSCLK 17 Non-iAMT R284 0_DU
E27
G27
TVA_DAC PEG_TX#_0 N45
U39 PCIE_MTX_GRX_C_N1 C813 0.1U_DIS PCIE_MTX_GRX_N1
17
CLK
RSVD41 DPLL_REF_SSCLK# DREF_SSCLK# 17 TVB_DAC PEG_TX#_1
B37 R230 0_UMA R286 0_DU K27 U47 PCIE_MTX_GRX_C_N2 C821 0.1U_DIS PCIE_MTX_GRX_N2
RSVD42 R290 TVC_DAC PEG_TX#_2 PCIE_MTX_GRX_C_N3 C819 0.1U_DIS PCIE_MTX_GRX_N3
B36 RSVD43 PEG_CLK K44 CLK_MCH_3GPLL 17 PEG_TX#_3 N51
TV
B34 K45 1K/F F27 R50 PCIE_MTX_GRX_C_N4 C830 0.1U_DIS PCIE_MTX_GRX_N4
RSVD44 PEG_CLK# CLK_MCH_3GPLL# 17 TVA_RTN PEG_TX#_4
C34 J27 T42 PCIE_MTX_GRX_C_N5 C825 0.1U_DIS PCIE_MTX_GRX_N5
RSVD45 MCH_CLVREF TVB_RTN PEG_TX#_5 PCIE_MTX_GRX_C_N6 C831 0.1U_DIS PCIE_MTX_GRX_N6
L27 TVC_RTN PEG_TX#_6 Y43
W46 PCIE_MTX_GRX_C_N7 C833 0.1U_DIS PCIE_MTX_GRX_N7
PEG_TX#_7 PCIE_MTX_GRX_C_N8 C837 0.1U_DIS PCIE_MTX_GRX_N8
B
Layout Note: DMI_RXN_0 AN47 DMI_MRX_ITX_N0 12 M35 TV_DCONSEL_0 PEG_TX#_8 W38 B
+3.3V_RUN Location of all MCH_CFG strap AJ38 P33 AD39 PCIE_MTX_GRX_C_N9 C838 0.1U_DIS PCIE_MTX_GRX_N9
DMI_RXN_1 DMI_MRX_ITX_N1 12 TV_DCONSEL_1 PEG_TX#_9
AN42 C344 R282 R269, R284 and R286 AC46 PCIE_MTX_GRX_C_N10 C840 0.1U_DIS PCIE_MTX_GRX_N10
resistors needs to be close to DMI_RXN_2 DMI_MRX_ITX_N2 12 PEG_TX#_10
R253 10K PM_EXTTS#0 AN46 0.1U 392/F DIS: 0 -->CS00002JB38 AC49 PCIE_MTX_GRX_C_N11 C841 0.1U_DIS PCIE_MTX_GRX_N11
DMI_RXN_3 DMI_MRX_ITX_N3 12 PEG_TX#_11
R247 10K PM_EXTTS#1 minmize stub. AC42 PCIE_MTX_GRX_C_N12 C847 0.1U_DIS PCIE_MTX_GRX_N12
UMA: 75 -->CS07502FB17 PEG_TX#_12 PCIE_MTX_GRX_C_N13 C848 0.1U_DIS PCIE_MTX_GRX_N13
DMI_RXP_0 AM47 DMI_MRX_ITX_P0 12 PEG_TX#_13 AH39
P27 AJ39 AE49 PCIE_MTX_GRX_C_N14 C852 0.1U_DIS PCIE_MTX_GRX_N14
3,17 CPU_MCH_BSEL0 CFG_0 DMI_RXP_1 DMI_MRX_ITX_P1 12 PEG_TX#_14
N27 AN41 AH44 PCIE_MTX_GRX_C_N15 C851 0.1U_DIS PCIE_MTX_GRX_N15
+1.05V_VCCP 3,17 CPU_MCH_BSEL1 CFG_1 DMI_RXP_2 DMI_MRX_ITX_P2 12 PEG_TX#_15
3,17 CPU_MCH_BSEL2 N24 CFG_2 DMI_RXP_3 AN45 DMI_MRX_ITX_P3 12
PAD T110 CFG3 C21 R153 0_UMA UMA_VGA_BLU_R H32 M45 PCIE_MTX_GRX_C_P0 C814 0.1U_DIS PCIE_MTX_GRX_P0
CFG_3 27 UMA_VGA_BLU CRT_BLUE PEG_TX_0
R262 56 THERMTRIP_MCH# CFG4 C23 AJ46 G32 T38 PCIE_MTX_GRX_C_P1 C816 0.1U_DIS PCIE_MTX_GRX_P1
DMI
PAD T108 CFG_4 DMI_TXN_0 DMI_MTX_IRX_N0 12 CRT_BLUE# PEG_TX_1
R243 4.02K_NC CFG5 F23 AJ41 R152 0_UMA UMA_VGA_GRN_R K29 T46 PCIE_MTX_GRX_C_P2 C824 0.1U_DIS PCIE_MTX_GRX_P2
CFG_5 DMI_TXN_1 DMI_MTX_IRX_N1 12 27 UMA_VGA_GRN CRT_GREEN PEG_TX_2
PAD T26 CFG6 N23 AM40 J29 N50 PCIE_MTX_GRX_C_P3 C822 0.1U_DIS PCIE_MTX_GRX_P3
CFG_6 DMI_TXN_2 DMI_MTX_IRX_N2 12 CRT_GREEN# PEG_TX_3
PAD T19 CFG7 G23 AM44 R154 0_UMA UMA_VGA_RED_R F29 R51 PCIE_MTX_GRX_C_P4 C826 0.1U_DIS PCIE_MTX_GRX_P4
CFG_7 DMI_TXN_3 DMI_MTX_IRX_N3 12 27 UMA_VGA_RED CRT_RED PEG_TX_4
VGA
PAD T16 CFG8 J20 E29 U43 PCIE_MTX_GRX_C_P5 C827 0.1U_DIS PCIE_MTX_GRX_P5
CFG_8 CRT_RED# PEG_TX_5
CFG
R214 4.02K_NC CFG9 C20 AJ47 W42 PCIE_MTX_GRX_C_P6 C832 0.1U_DIS PCIE_MTX_GRX_P6
CFG_9 DMI_TXP_0 DMI_MTX_IRX_P0 12 PEG_TX_6
PAD T27 CFG10 R24 AJ42 Y47 PCIE_MTX_GRX_C_P7 C836 0.1U_DIS PCIE_MTX_GRX_P7
CFG_10 DMI_TXP_1 DMI_MTX_IRX_P1 12 PEG_TX_7
PAD T21 CFG11 L23 AM39 R149 0_UMA UMA_CRT_CLK_DDC_R K33 Y39 PCIE_MTX_GRX_C_P8 C835 0.1U_DIS PCIE_MTX_GRX_P8
CFG_11 DMI_TXP_2 DMI_MTX_IRX_P2 12 27 UMA_CRT_CLK_DDC CRT_DDC_CLK PEG_TX_8
PAD T20 CFG12 J23 AM43 R150 0_UMA UMA_CRT_DAT_DDC_R G35 AC38 PCIE_MTX_GRX_C_P9 C839 0.1U_DIS PCIE_MTX_GRX_P9
CFG_12 DMI_TXP_3 DMI_MTX_IRX_P3 12 27 UMA_CRT_DAT_DDC CRT_DDC_DATA PEG_TX_9
PAD T18 CFG13 E23 R155 1 230/F_UMAUMA_VGAHSYNC_R F33 AD47 PCIE_MTX_GRX_C_P10 C842 0.1U_DIS PCIE_MTX_GRX_P10
CFG_13 27 UMA_VGAHSYNC CRT_HSYNC PEG_TX_10
PAD T15 CFG14 E20 R222 1.3K_UMA CRT_TVO_IREF C32 AC50 PCIE_MTX_GRX_C_P11 C843 0.1U_DIS PCIE_MTX_GRX_P11
CFG15 CFG_14 CRT_TVO_IREF PEG_TX_11
PAD T25 K23 CFG_15 27 UMA_VGAVSYNC
R1511 230/F_UMAUMA_VGAVSYNC_R E33 CRT_VSYNC PEG_TX_12 AD43 PCIE_MTX_GRX_C_P12 C844 0.1U_DIS PCIE_MTX_GRX_P12
R255 4.02K_NC CFG16 M20 AG39 PCIE_MTX_GRX_C_P13 C846 0.1U_DIS PCIE_MTX_GRX_P13
+3.3V_RUN CFG_16 PEG_TX_13
GRAPHICS VID
PAD T23 CFG17 M24 AE50 PCIE_MTX_GRX_C_P14 C850 0.1U_DIS PCIE_MTX_GRX_P14

CFG18 CFG_17 PEG_TX_14 PCIE_MTX_GRX_C_P15 C849 0.1U_DIS PCIE_MTX_GRX_P15
PAD T24 L32 CFG_18 PEG_TX_15 AH43
R258 4.02K_NC CFG19 R261 0_NC THERMTRIP_MCH#
R246 4.02K_NC CFG20
N33
L35
CFG_19
CFG_20
3,52 H_THERMTRIP# POP FOR UMA
CRESTLINE_1p0_DU
POP FOR DIS
GFX_VID_0 E35 T17 PAD
13 PM_BMBUSY# G41 PM_BM_BUSY# GFX_VID_1 A39 T104 PAD
L39 C38 T103 PAD R239 0_DU UMA_VGA_BLU_R
3,11,51 H_DPRSTP# PM_EXTTS#0 PM_DPRSTP# GFX_VID_2 R249 0_DU UMA_VGA_GRN_R R158 0_DIS LCD_DDCCLK_R
15 PM_EXTTS#0 L36 PM_EXT_TS#_0 GFX_VID_3 B39 T105 PAD
PM
PM_EXTTS#1 J36 E36 T109 PAD R228 0_DU UMA_VGA_RED_R R161 0_DIS LCD_DDCDAT_R
15 PM_EXTTS#1 PM_EXT_TS#_1 GFX_VR_EN R167 0_DIS UMA_CRT_CLK_DDC_R
13,44 ICH_PWRGD AW49 PWROK
C PLTRST#_R AV20 R168 0_DIS UMA_CRT_DAT_DDC_R SDVO_CTRLCLK_L R143 0_UMA C
RSTIN# SDVO_CTRLCLK 25
THERMTRIP_MCH# N20 R244 0_DIS UMA_VGAHSYNC_R SDVO_CTRLDATA_L R142 0_UMA
THERMTRIP# SDVO_CTRLDATA 25
G36 R225 0_DIS CRT_TVO_IREF
13,51 DPRSLPVR R227 0 DPRSLPVR R229 0_DIS UMA_VGAVSYNC_R
AM49 UMA USE RESISTOR 150/F R724 0_DIS MCH_DREFCLK_L PCIE_MRX_GTX_N1_L R742 0_UMA
CL_CLK CL_CLK0 13 SDVOB_INT- 25
AK50 R723 0_DIS MCH_DREFCLK#_L
BJ51
CL_DATA
AT43
CL_DATA0 13 PN:CS11502FB21 R242 0_DIS DREF_SSCLK_L PCIE_MRX_GTX_P1_L R743 0_UMA
PAD T112 ICH_CL_PWROK 13,31 SDVOB_INT+ 25
ME
NC_1 CL_PWROK R231 0_DIS DREF_SSCLK#_L

PAD T114 BK51 NC_2 CL_RST# AN49 ICH_CL_RST0# 13 DIS USE 0 OHM
PAD T116 BK50 NC_3 CL_VREF AM50 PN:CS00002JB38
PAD T120 BL50 MCH_CLVREF
NC_4
PAD T117 BL49 NC_5
Layout Note:
PAD T121 BL3 NC_6 Place 150 ohm
PAD T118 BL2 PCIE_MTX_GRX_C_N0 C247 0.1U_UMA
NC_7 termination resistors SDVOB_RED- 25
NC
PAD T115 BK1 PCIE_MTX_GRX_C_N1 C238 0.1U_UMA

NC_8 SDVOB_GREEN- 25
PAD T113 BJ1 H35 SDVO_CTRLCLK_L R157 0_DIS close to GMCH. PCIE_MTX_GRX_C_N2 C254 0.1U_UMA
SDVOB_BLUE- 25
NC_9 SDVO_CTRL_CLK
K36 SDVO_CTRLDATA_LR156 0_DIS PCIE_MTX_GRX_C_N3 C253 0.1U_UMA
PAD T111 E1
POP FOR DIS SDVOB_CLK- 25
MISC
NC_10 SDVO_CTRL_DATA
PAD T106 A5 NC_11 CLK_REQ# G39 CLK_3GPLLREQ# 17
PAD T100 C51 G40 PCIE_MTX_GRX_C_P0 C240 0.1U_UMA
NC_12 ICH_SYNC# MCH_ICH_SYNC# 13 SDVOB_RED+ 25
PAD T101 B50 PCIE_MTX_GRX_C_P1 C246 0.1U_UMA
NC_13 SDVOB_GREEN+ 25
PAD T102 A50 PCIE_MTX_GRX_C_P2 C261 0.1U_UMA
NC_14 SDVOB_BLUE+ 25
PAD T107 A49 A37 PCIE_MTX_GRX_C_P3 C255 0.1U_UMA
NC_15 TEST_1 SDVOB_CLK+ 25
PAD T119 BK2 NC_16 TEST_2 R32
CRESTLINE_1p0_DU DC Blocked Cap. AND POP FOR UMA

R209
R260 0
12 SB_NB_PCIE_RST# R292 0_NC 20K
PLTRST#_R Low=DMIx2
12,25,30,33,34,42 PLTRST# R291 0 R296 100 CFG5 DMI X2 Select High=DMIx4(Default)
PCI Express Low= Reveise Lane
CFG9 Graphic Lane High=Normal operation
D
FSB Dynamic Low=Dynamic ODT Disable D
CFG16 ODT High=Dynamic ODT Enable(default).
DMI Lane Low=Normal(default).
CFG19 Reversal High=Lane Reversed
Low=Only SDVO or PCIEx1 is
CFG20
SDVO/PCIE
Concurrent
operational (defaults) QUANTA
High=SDVO and PCIEx1 are operating
Operation simultaneously via PEG port
Title
COMPUTER
Low=No SDVO Device Present Crestline (VGA,DMI)
(default) Size Document Number Rev
SDVO_CRTL_DATA SDVO Present. High=SDVO Device Present
GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
DDR_A_D63 T201 PAD
DDR_A_D34 T200 PAD
PAD T206 DDR_A_D4
PAD T208 DDR_A_DQS#0
PAD T202 DDR_A_DQS0
DDR_A_MA13 T195 PAD
PAD T203 DDR_A_MA1 T196 PAD
PAD T188 DDR_A_CAS#
PAD T190 DDR_A_RAS#
PAD T192 DDR_A_WE#
15 DDR_A_D[0..63] 15 DDR_B_D[0..63]
U45D U45E
DDR_A_D0 AR43 BB19 DDR_A_BS0 DDR_B_D0 AP49 AY17 DDR_B_BS0
SA_DQ_0 SA_BS_0 DDR_A_BS0 15,16 SB_DQ_0 SB_BS_0 DDR_B_BS0 15,16
DDR_A_D1 AW44 BK19 DDR_A_BS1 DDR_B_D1 AR51 BG18 DDR_B_BS1
A SA_DQ_1 SA_BS_1 DDR_A_BS1 15,16 SB_DQ_1 SB_BS_1 DDR_B_BS1 15,16 A
DDR_A_D2 BA45 BF29 DDR_A_BS2 DDR_B_D2 AW50 BG36 DDR_B_BS2
SA_DQ_2 SA_BS_2 DDR_A_BS2 15,16 SB_DQ_2 SB_BS_2 DDR_B_BS2 15,16
DDR_A_D3 AY46 DDR_B_D3 AW51
DDR_A_D4 SA_DQ_3 DDR_A_CAS# DDR_B_D4 SB_DQ_3 DDR_B_CAS#
AR41 SA_DQ_4 SA_CAS# BL17 DDR_A_CAS# 15,16 AN51 SB_DQ_4 SB_CAS# BE17 DDR_B_CAS# 15,16
DDR_A_D5 AR45 DDR_B_D5 AN50
SA_DQ_5 DDR_A_DM[0..7] 15 SB_DQ_5 DDR_B_DM[0..7] 15
DDR_A_D6 AT42 AT45 DDR_A_DM0 DDR_B_D6 AV50 AR50 DDR_B_DM0
DDR_A_D7 SA_DQ_6 SA_DM_0 DDR_A_DM1 DDR_B_D7 SB_DQ_6 SB_DM_0 DDR_B_DM1
AW47 SA_DQ_7 SA_DM_1 BD44 AV49 SB_DQ_7 SB_DM_1 BD49
DDR_A_D8 BB45 BD42 DDR_A_DM2 DDR_B_D8 BA50 BK45 DDR_B_DM2
BF48 SA_DQ_9 SA_DM_3 AW38 BB50 SB_DQ_9 SB_DM_3 BL39
DDR_A_D10 BG47 AW13 DDR_A_DM4 DDR_B_D10 BA49 BH12 DDR_B_DM4
BJ45 SA_DQ_11 SA_DM_5 BG8 BE50 SB_DQ_11 SB_DM_5 BJ7
DDR_A_D12 BB47 AY5 DDR_A_DM6 DDR_B_D12 BA51 BF3 DDR_B_DM6
BG50 SA_DQ_13 SA_DM_7 AN6 AY49 SB_DQ_13 SB_DM_7 AW2
DDR_A_D14 BH49 DDR_B_D14 BF50
SA_DQ_14 DDR_A_DQS[0..7] 15 SB_DQ_14 DDR_B_DQS[0..7] 15
DDR_A_D15 BE45 AT46 DDR_A_DQS0 DDR_B_D15 BF49 AT50 DDR_B_DQS0
SA_DQ_15 SA_DQS_0 SB_DQ_15 SB_DQS_0
A
DDR_A_D16 AW43 BE48 DDR_A_DQS1 DDR_B_D16 BJ50 BD50 DDR_B_DQS1
SA_DQ_16 SA_DQS_1 SB_DQ_16 SB_DQS_1
B
DDR_A_D17 BE44 BB43 DDR_A_DQS2 DDR_B_D17 BJ44 BK46 DDR_B_DQS2
DDR_A_D18 SA_DQ_17 SA_DQS_2 DDR_A_DQS3 DDR_B_D18 SB_DQ_17 SB_DQS_2 DDR_B_DQS3
BG42 SA_DQ_18 SA_DQS_3 BC37 BJ43 SB_DQ_18 SB_DQS_3 BK39
DDR_A_D19 BE40 BB16 DDR_A_DQS4 DDR_B_D19 BL43 BJ12 DDR_B_DQS4
BF44 BH6 BK47 BL7
MEMORY
BH45 BB2 BK49 BE2
MEMORY
BG40 SA_DQ_22 SA_DQS_7 AP3 DDR_A_DQS#[0..7] 15 BK43 SB_DQ_22 SB_DQS_7 AV2 DDR_B_DQS#[0..7] 15
DDR_A_D23 BF40 AT47 DDR_A_DQS#0 DDR_B_D23 BK42 AU50 DDR_B_DQS#0
DDR_A_D24 SA_DQ_23 SA_DQS#_0 DDR_A_DQS#1 DDR_B_D24 SB_DQ_23 SB_DQS#_0 DDR_B_DQS#1
AR40 SA_DQ_24 SA_DQS#_1 BD47 BJ41 SB_DQ_24 SB_DQS#_1 BC50
DDR_A_D25 AW40 BC41 DDR_A_DQS#2 DDR_B_D25 BL41 BL45 DDR_B_DQS#2
AT39 SA_DQ_26 SA_DQS#_3 BA37 BJ37 SB_DQ_26 SB_DQS#_3 BK38
DDR_A_D27 AW36 BA16 DDR_A_DQS#4 DDR_B_D27 BJ36 BK12 DDR_B_DQS#4
AW41 SA_DQ_28 SA_DQS#_5 BH7 BK41 SB_DQ_28 SB_DQS#_5 BK7
DDR_A_D29 AY41 BC1 DDR_A_DQS#6 DDR_B_D29 BJ40 BF2 DDR_B_DQS#6
AV38 SA_DQ_30 SA_DQS#_7 AP2 BL35 SB_DQ_30 SB_DQS#_7 AV3
B DDR_A_D31 AT38 DDR_B_D31 BK37 B
SA_DQ_31 DDR_A_MA[0..13] 15,16 SB_DQ_31 DDR_B_MA[0..13] 15,16
DDR_A_D32 AV13 BJ19 DDR_A_MA0 DDR_B_D32 BK13 BC18 DDR_B_MA0
DDR_A_D33 SA_DQ_32 SA_MA_0 DDR_A_MA1 DDR_B_D33 SB_DQ_32 SB_MA_0 DDR_B_MA1
AT13 BD20 BE11 BG28
SYSTEM

AW11 BK27 BK11 BG25
SYSTEM
AV11 SA_DQ_35 SA_MA_3 BH28 BC11 SB_DQ_35 SB_MA_3 AW17
DDR_A_D36 AU15 BL24 DDR_A_MA4 DDR_B_D36 BC13 BF25 DDR_B_MA4
AT11 SA_DQ_37 SA_MA_5 BK28 BE12 SB_DQ_37 SB_MA_5 BE25
DDR_A_D38 BA13 BJ27 DDR_A_MA6 DDR_B_D38 BC12 BA29 DDR_B_MA6
BA11 SA_DQ_39 SA_MA_7 BJ25 BG12 SB_DQ_39 SB_MA_7 BC28
DDR_A_D40 BE10 BL28 DDR_A_MA8 DDR_B_D40 BJ10 AY28 DDR_B_MA8
BD10 SA_DQ_41 SA_MA_9 BA28 BL9 SB_DQ_41 SB_MA_9 BD37
DDR_A_D42 BD8 BC19 DDR_A_MA10 DDR_B_D42 BK5 BG17 DDR_B_MA10
AY9 SA_DQ_43 SA_MA_11 BE28 BL5 SB_DQ_43 SB_MA_11 BE37
DDR_A_D44 BG10 BG30 DDR_A_MA12 DDR_B_D44 BK9 BA39 DDR_B_MA12
AW9 SA_DQ_45 SA_MA_13 BJ16 BK10 SB_DQ_45 SB_MA_13 BG13
DDR_A_D46 BD7 DDR_B_D46 BJ8
DDR
DDR_A_D47 SA_DQ_46 DDR_B_D47 SB_DQ_46 DDR_B_RAS#

BB9 BJ6 AV16
DDR
SA_DQ_47 SB_DQ_47 SB_RAS# DDR_B_RAS# 15,16
DDR_A_D48 BB5 BE18 DDR_A_RAS# DDR_B_D48 BF4 AY18 T28 PAD
SA_DQ_48 SA_RAS# DDR_A_RAS# 15,16 SB_DQ_48 SB_RCVEN#
DDR_A_D49 AY7 AY20 T29 PAD DDR_B_D49 BH5
DDR_A_D50 SA_DQ_49 SA_RCVEN# DDR_B_D50 SB_DQ_49 DDR_B_WE#
AT5 SA_DQ_50 BG1 SB_DQ_50 SB_WE# BC17 DDR_B_WE# 15,16
DDR_A_D51 AT7 BA19 DDR_A_WE# DDR_B_D51 BC2
SA_DQ_51 SA_WE# DDR_A_WE# 15,16 SB_DQ_51
DDR_A_D52 AY6 DDR_B_D52 BK3
DDR_A_D53 SA_DQ_52 DDR_B_D53 SB_DQ_52
BB7 SA_DQ_53 BE4 SB_DQ_53
DDR_A_D54 AR5 DDR_B_D54 BD3
AR8 SA_DQ_55 BJ2 SB_DQ_55
DDR_A_D56 AR9 DDR_B_D56 BA3
AN3 SA_DQ_57 BB3 SB_DQ_57
DDR_A_D58 AM8 DDR_B_D58 AR1
AN10 SA_DQ_59 AT3 SB_DQ_59
DDR_A_D60 AT9 DDR_B_D60 AY2
C
DDR_A_D61 SA_DQ_60 DDR_B_D61 SB_DQ_60 C
AN9 SA_DQ_61 AY3 SB_DQ_61
DDR_A_D62 AM9 DDR_B_D62 AU2
AN11 SA_DQ_63 AT2 SB_DQ_63
CRESTLINE_1p0_DU CRESTLINE_1p0_DU
D D
QUANTA
Title
COMPUTER
Crestline (DDR2)

GM3 2B

1 2 3 4 5 6 7 8
5 4 3 2 1
+3.3V_RUN
+1.05V_VCCP U45G U45F
R170 10 D6
AT35 1 2 +VCC_GMCH_L 1 2 AB33
VCC_1 VCC_NCTF_1
AT34 VCC_2 VCC_AXG_NCTF_1 T17 AB36 VCC_NCTF_2
AH28 T18 SDMK0340L-7-F AB37
VCC_3 VCC_AXG_NCTF_2 VCC_NCTF_3
AC32 VCC_5 VCC_AXG_NCTF_3 T19 AC33 VCC_NCTF_4 VSS_NCTF_1 T27
AC31 VCC_4 VCC_AXG_NCTF_4 T21 AC35 VCC_NCTF_5 VSS_NCTF_2 T37
AK32 T22 AC36 U24
VCC CORE
VCC_6 VCC_AXG_NCTF_5 VCC_NCTF_6 VSS_NCTF_3
AJ31 VCC_7 VCC_AXG_NCTF_6 T23 AD35 VCC_NCTF_7 VSS_NCTF_4 U28
AJ28 T25 +1.05V_VCCP Layout Note: AD36 V31
AH32 VCC_9 VCC_AXG_NCTF_8 U15 Inside GMCH cavity. AF33 VCC_NCTF_9 VSS_NCTF_6 V35
D
AH31 VCC_10 VCC_AXG_NCTF_9 U16 AF36 VCC_NCTF_10 VSS_NCTF_7 AA19 D
AH29 VCC_11 VCC_AXG_NCTF_10 U17 AH33 VCC_NCTF_11 VSS_NCTF_8 AB17
AF32 VCC_12 VCC_AXG_NCTF_11 U19 AH35 VCC_NCTF_12 VSS_NCTF_9 AB35
VSS NCTF
VCC_AXG_NCTF_12 U20 AH36 VCC_NCTF_13 VSS_NCTF_10 AD19
1
U21 + C829 AH37 AD37
VCC_AXG_NCTF_13 220U C307 C294 C300 C333 VCC_NCTF_14 VSS_NCTF_11
VCC_AXG_NCTF_14 U23 Layout Note: AJ33 VCC_NCTF_15 VSS_NCTF_12 AF17
R30 U26 370 mils from edge. 22U/4V 0.22U/10V 0.22U/10V 0.1U/10V AJ35 AF35
2
VCC_AXG_NCTF_16 V16 AK33 VCC_NCTF_17 VSS_NCTF_14 AK17
VCC_AXG_NCTF_17 V17 AK35 VCC_NCTF_18 VSS_NCTF_15 AM17
VCC_AXG_NCTF_18 V19 AK36 VCC_NCTF_19 VSS_NCTF_16 AM24
VCC_AXG_NCTF_19 V20 AK37 VCC_NCTF_20 VSS_NCTF_17 AP26
VCC_AXG_NCTF_20 V21 AD33 VCC_NCTF_21 VSS_NCTF_18 AP28
VCC_AXG_NCTF_21 V23 AJ36 VCC_NCTF_22 VSS_NCTF_19 AR15
VCC_AXG_NCTF_22 V24 AM35 VCC_NCTF_23 VSS_NCTF_20 AR19
+1.05V_VCCP
VCC NCTF
Y15 Layout Note: AL33 AR28
+1.8V_SUS
POWER VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
Y16
Y17 1 2
370 mils from edge. AL35
AA33
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VSS_NCTF_21
AU32 Y19 R63 0_0805_UMA AA35

VCC_SM_1 VCC_AXG_NCTF_26 VCC_NCTF_27
AU33 VCC_SM_2 VCC_AXG_NCTF_27 Y20 AA36 VCC_NCTF_28
AU35 VCC_SM_3 VCC_AXG_NCTF_28 Y21 AP35 VCC_NCTF_29
AV33 Y23 UMA POP POWER JUMP + C263 + C820 + C834 + C279 AP36
VCC_SM_4 VCC_AXG_NCTF_29 220U_UMA 220U_UMA 220U_NC 220U_NC VCC_NCTF_30
AW33 VCC_SM_5 VCC_AXG_NCTF_30 Y24 AND C234 &C233 AR35 VCC_NCTF_31
AW35 Y26 2.5 7343 2.5 7343 2.5 7343 2.5 7343 AR36
AY35 VCC_SM_7 VCC_AXG_NCTF_32 Y28 Y32 VCC_NCTF_33
BA32 Y29 Y33
BA33
BA35
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
AA16
AA17
(3) Y35
Y36
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
POWER
BB33 VCC_SM_11 VCC_AXG_NCTF_36 AB16 Y37 VCC_NCTF_37 VSS_SCB1 A3
BC32 AB19 T30 B2
VSS SCB
VCC_SM_12 VCC_AXG_NCTF_37 VCC_NCTF_38 VSS_SCB2
BC33 VCC_SM_13 VCC_AXG_NCTF_38 AC16 T34 VCC_NCTF_39 VSS_SCB3 C1
C BC35 AC17 Layout Note: +1.05V_VCCP T35 BL1 C
VCC_SM_14 VCC_AXG_NCTF_39 VCC_NCTF_40 VSS_SCB4
BD32 VCC_SM_15 VCC_AXG_NCTF_40 AC19 Inside GMCH cavity for VCC_AXM. U29 VCC_NCTF_41 VSS_SCB5 BL51
BD35 VCC_SM_16 VCC_AXG_NCTF_41 AD15 U31 VCC_NCTF_42 VSS_SCB6 A51
BE32 VCC_SM_17 VCC_AXG_NCTF_42 AD16 1 2 U32 VCC_NCTF_43
BE33 AD17 R64 0_0805_UMA U33
BE35 VCC_SM_19 VCC_AXG_NCTF_44 AF16 U35 VCC_NCTF_45
VCC GFX NCTF
BF33 AF19 U36

VCC SM
VCC_SM_20 VCC_AXG_NCTF_45 C297 C308 C314 C330 C291 C857 VCC_NCTF_46

BF34 VCC_SM_21 VCC_AXG_NCTF_46 AH15 UMA POP POWER JUMP V32 VCC_NCTF_47
BG32 AH16 0.1U_UMA 0.1U_UMA 0.47U_UMA 1U_UMA 10U_UMA 22U_UMA V33
BG33
VCC_SM_22 VCC_AXG_NCTF_47
AH17
AND ALL CAP 603 10 603 10 805 6.3 805 4 V36
VCC_NCTF_48 +1.05V_VCCP
BG35 VCC_SM_24 VCC_AXG_NCTF_49 AH19 V37 VCC_NCTF_50
BH32 VCC_SM_25 VCC_AXG_NCTF_50 AJ16
BH34 VCC_SM_26 VCC_AXG_NCTF_51 AJ17 VCC_AXM_1 AT33
BH35 AJ19 AT31
VCC AXM
VCC_SM_27 VCC_AXG_NCTF_52 VCC_AXM_2
BJ32 VCC_SM_28 VCC_AXG_NCTF_53 AK16 VCC_AXM_3 AK29
BJ33 VCC_SM_29 VCC_AXG_NCTF_54 AK19 VCC_AXM_4 AK24
BJ34 VCC_SM_30 VCC_AXG_NCTF_55 AL16 Layout Note: VCC_AXM_5 AK23
BK32 AL17 +1.05V_VCCP AL24 AJ26
VCC_SM_31 VCC_AXG_NCTF_56 Inside GMCH cavity. VCC_AXM_NCTF_1 VCC_AXM_6
BK33 VCC_SM_32 VCC_AXG_NCTF_57 AL19 AL26 VCC_AXM_NCTF_2 VCC_AXM_7 AJ23
BK34 VCC_SM_33 VCC_AXG_NCTF_58 AL20 AL28 VCC_AXM_NCTF_3
BK35 VCC_SM_34 VCC_AXG_NCTF_59 AL21 AM26 VCC_AXM_NCTF_4
BL33 VCC_SM_35 VCC_AXG_NCTF_60 AL23 AM28 VCC_AXM_NCTF_5
VCC AXM NCTF

AU30 VCC_SM_36 VCC_AXG_NCTF_61 AM15 AM29 VCC_AXM_NCTF_6
AM16 C337 C331 C320 AM31
VCC_AXG_NCTF_62 0.1U/10V 0.1U/10V 0.1U/10V VCC_AXM_NCTF_7
AM19 AM32
2
VCC_AXG_NCTF_63 VCC_AXM_NCTF_8
VCC_AXG_NCTF_64 AM20 AM33 VCC_AXM_NCTF_9
R20
VCC_AXG_NCTF_65 AM21
AM23
Non-iAMT AP29
AP31
VCC_AXM_NCTF_10
VCC_AXG_1 VCC_AXG_NCTF_66 VCC_AXM_NCTF_11
T14 VCC_AXG_2 VCC_AXG_NCTF_67 AP15 AP32 VCC_AXM_NCTF_12
W13 VCC_AXG_3 VCC_AXG_NCTF_68 AP16 AP33 VCC_AXM_NCTF_13
2
B B
W14 VCC_AXG_4 VCC_AXG_NCTF_69 AP17 AL29 VCC_AXM_NCTF_14
Y12 AP19 R65 R171 AL31
1
AA20 VCC_AXG_6 VCC_AXG_NCTF_71 AP20 0_0805_DIS 0_0805_DIS AL32 VCC_AXM_NCTF_16
AA23 AP21 C345 C318 C339 AR31
VCC_AXG_7 VCC_AXG_NCTF_72 22U/4V 0.22U/10V 0.22U/10V VCC_AXM_NCTF_17
AA26 AP23 AR32
1
2
AA28
AB21
VCC_AXG_9 VCC_AXG_NCTF_74 AP24
AR20
(3) AR33 VCC_AXM_NCTF_19
VCC_AXG_10 VCC_AXG_NCTF_75
AB24 VCC_AXG_11 VCC_AXG_NCTF_76 AR21
AB29 VCC_AXG_12 VCC_AXG_NCTF_77 AR23 Layout Note:
AC20 VCC_AXG_13 VCC_AXG_NCTF_78 AR24 Place close to GMCH edge.
AC21 AR26 CRESTLINE_1p0_DU
VCC_AXG_14 VCC_AXG_NCTF_79
VCC GFX
AC23 VCC_AXG_15 VCC_AXG_NCTF_80 V26

AC28 Y31 +1.8V_SUS
AC29
VCC_AXG_18
VCC_AXG_19
VCC_AXG_NCTF_83 VCC_SM
AD20 VCC_AXG_20
AD23 VCC_AXG_21
1
AD24 AW45 VCCSM_LF1
VCC SM LF
VCC_AXG_22 VCC_SM_LF1
1
+1.05V_VCCP AD28 BC39 VCCSM_LF2 +
VCC_AXG_23 VCC_SM_LF2 VCCSM_LF3 C430 C438 C415 C422
AF21 VCC_AXG_24 VCC_SM_LF3 BE39
AF26 BD17 VCCSM_LF4 0.1U/10V 330U/2.5V 22U/4V 22U/4V
2
VCC_AXG_25 VCC_SM_LF4 VCCSM_LF5
AA31 VCC_AXG_26 VCC_SM_LF5 BD4
AH20 AW8 VCCSM_LF6
VCC_AXG_27 VCC_SM_LF6
2
AH21 AT6 VCCSM_LF7 Layout Note:

R185 VCC_AXG_28 VCC_SM_LF7
AH23 VCC_AXG_29 Place C233 where LVDS
1
0_0805_UMA AH24 VCC_AXG_30 and DDR2 taps. Layout Note:

AH26 C355 C362 C371 C367 C372 C365 C363 Place on the edge.
VCC_AXG_31 0.1U/10V 0.1U/10V 0.22U/10V 0.22U/10V 0.47U/10V 1U/10V 1U/10V
AD31
1
VCC_AXG_32
A AJ20 VCC_AXG_33
A
AN14 VCC_AXG_34
QUANTA
2
R182
(3) 0_0805_DIS
CRESTLINE_1p0_DU Title
COMPUTER
1
Crestline (VCC,NCTF)

GM3 2B

5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
UMA POP ALL U45H
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC +1.05V_VCCP +1.05V_VCCP
0_UMA
1 R722 2 +VCCSYNC J32 U13
VCC_HV
VCCSYNC VTT_1
2
+3.3V_RUN +VCCA_CRTDAC +VCCA_CRT_DAC U12
L19 BLM18PG181SN1D_UMA R204 0_0402_UMA VTT_2
A33 VCCA_CRT_DAC_1 VTT_3 U11
1
603 3 1 +VCCA_CRT_DAC B33 U9 D8
0.1U_UMA 10V VCCA_CRT_DAC_2 VTT_4 C292 C281 SDMK0340L-7-F_NC
U8
CRT
C249 C239 C802 VTT_5 2.2U/6.3V 4.7U/6.3V
U7
1
0.1U_UMA 22nF/3P_NC +VCCA_DAC_BG A30 VTT_6 +VCC_HV_L
VCCA_DAC_BG VTT_7 U5
10 U3
VTT_8
1
UMA POP ALL BESIDES C462 B32 VSSA_DAC_BG VTT_9
VTT_10
U2
U1 +1.05V_VCCP
T13 Place on the edge. R184
+VCCA_DPLLA VTT_11 10_NC
B49 VCCA_DPLLA VTT_12 T11
VTT
T10
2
+VCCA_DPLLB VTT_13
D H49 VCCA_DPLLB VTT_14 T9 D
Non-iAMT 45mA MAx. T7
PLL
VTT_15
1
+VCCA_HPLL AL2 T6
VCCA_HPLL VTT_16 C296 C290 + C299
+1.25V_RUN
FB_120ohm+-25%_100mHz 40mA MAx. UMA POP ALL VTT_17 T5 Non-
+VCCA_MPLL AM2 T3 0.47U/6.3V 4.7U 220U/4V +3.3V_RUN
_200mA_0.2ohm DC
2
+1.25V_RUN VCCA_MPLL VTT_18
10uH+-20%_100mA T2 603 7343 iAMT
2
L30 L13 VTT_19 6.3
R3
A LVDS
+VCCA_HPLL +VCCA_DPLLA +VCC_TX_LVDS_LA41 VTT_20 +1.25V_RUN
2 1 VCCA_LVDS VTT_21 R2
BLM18AG121SN1D 10uH/100MA_UMA R1 +1.25V_RUN
603 805 VTT_22
B41 VSSA_LVDS
Place on the edge.
1
+ C191
C856 C342 C188 0.1U_UMA +3.3V_RUN AT23 +VCC_AXD_L 1 22
22U/10V 0.1U/10V 470U/ESR9_UMA 10 VCC_AXD_1 L52 0
AU28
2
1206 7343 VCC_AXD_2

K50 VCCA_PEG_BG VCC_AXD_3 AU24 Reserved L pad for 1
1
L33 2.5V AT29
A PEG
VCC_AXD_4 C442 inductor.
AXD
BLM18AG121SN1D K49 AT25 C360
603 L15 VSSA_PEG_BG VCC_AXD_5 1U/10V 22U/10V
AT30
2
VCC_AXD_6
2 1 +VCCA_MPLL +VCCA_DPLLB Place caps close
1
10V 10uH/100MA_UMA C274 +VCCA_PEG_PLL U51 AR29
10V VCCA_PEG_PLL VCC_AXD_NCTF to VCC_AXD.
1
0.1U +1.25V_RUN
1 R294 2 0.1Caps should be + C236 10V C251 C252
2
1
0.5/F 603 placed 200 mils C243 0.1U_UMA AW18 B23 1U/10V 10U/6.3V
2
+VCCA_MPLL_L C352 470U/ESR9_UMA 10 VCCA_SM_1 VCC_AXF_1
AV19 B21
AXF
with in its pins. VCCA_SM_2
POWER VCC_AXF_2
1
0.1U 7343 AU19 A21

2
C858 10V 2.5V VCCA_SM_3 VCC_AXF_3

1 AU18 VCCA_SM_4
Place caps close
22U AU17 AJ50 +1.25V_RUN to B23, B21, A21
2
1206 10V VCCA_SM_5 VCC_DMI
A SM
1
+1.25V_RUN AT22 VCCA_SM_7
AT21 BK24 +VCC_SM_CK C328
SM CK
VCCA_SM_8 VCC_SM_CK_1
1
AT19 BK23 0.1U
2
VCCA_SM_9 VCC_SM_CK_2
2
1
+ C435 C346 C418 C429 C347 AT18 BJ24 10V Place 0 ohm close to +1.8V_SUS
100U 4.7U 22U 22U 1U VCCA_SM_10 VCC_SM_CK_3
AT17 VCCA_SM_11 VCC_SM_CK_4 BJ23
7343 805 805 805 603 +1.8V_SUS
Non-iAMT AR17
2
2
2V 6.3 10 10 10 VCCA_SM_NCTF_1
AR16 VCCA_SM_NCTF_2 1uH+-20%_300mA
0_UMA R842
R232 0_DIS +VCCD_LVDS_R 1 A43 +VCC_TX_LVDS_L 1 R730 2 +VCC_TX_LVDS L76 +VCC_TX_LVDS_R 2 1
A CK
R736 0_DIS +VCCQ_TVDAC_RR VCC_TX_LVDS 1uH/300MA_UMA 0_UMA
+1.25V_RUN BC29 VCCA_SM_CK_1
R711 0_DIS +VCCD_CRT_R BB29 +3.3V_RUN 805
C VCCA_SM_CK_2 C
1
R169 0_DIS +VCC_TVDACC_RR C40 +
R206 0_DIS +VCC_TVDACB_RR VCC_HV_1 C818
C25 B40
HV
R186 0_DIS +VCC_TVDACA_RR +VCC_TVDACA_RR VCCA_TVA_DAC_1 VCC_HV_2 C803 220U_UMA
B25
2
VCCA_TVA_DAC_2
1
R210 0_DIS +VCC_TX_LVDS_L 1000P_UMA 7343
R731 0_DIS +VCCA_DPLLA
(1) +VCC_TVDACB_RR
C27
B27
VCCA_TVB_DAC_1
AD51 C259 50 2.5
TV
R172 0_DIS +VCCA_DPLLB VCCA_TVB_DAC_2 VCC_PEG_1 0.1U/10V +VCC_PEG
B28 W50
UMA POP ALL
2
R211 0_DIS +VCCA_DAC_BG +VCC_TVDACC_RR VCCA_TVC_DAC_1 VCC_PEG_2 10V
A28 VCCA_TVC_DAC_2 VCC_PEG_3 W51
PEG
R224 0_DIS +VCCA_CRT_DAC V49 L39 91uH+-20%_1.5A
D TV/CRT
R725 0_DIS +VCCSYNC VCC_PEG_4
VCC_PEG_5 V50 2 1 +1.05V_VCCP
+VCCD_CRT_R M32 91nH/1.5A
VCCD_CRT
1
+VCCD_CRT_R 1 R704 20_UMA +VCCD_TVDAC_RR L29 VCCD_TVDAC
1
+VCC_RXR_DMI
DIS POP ALL AH50 +
DMI
+VCCQ_TVDAC_RR VCC_RXR_DMI_1 C353 C289
N28 VCCD_QDAC VCC_RXR_DMI_2 AH51
220U/4V 10U/6.3V
2
AN2 VCCD_HPLL
+1.25V_RUN A7 +VTTLF1 +1.05V_VCCP
+1.25V_RUN
VTTLF
L38 +VCCA_PEG_PLL VTTLF1 +VTTLF2
U48 VCCD_PEG_PLL VTTLF2 F2
+VCCA_PEG_PLL +VTTLF3 91uH+-20%_1.5A L40
1 2 Non-iAMT AH1
LVDS
VTTLF3
1
BLM21PG221SN1D J41 2 1
VCCD_LVDS_1
1
805 C341 C293 H42 2V 6.3 91nH/1.5A

VCCD_LVDS_2
1
0.1U 0.1U
2
1
R299 10V 10V
+VCCD_LVDS_R
FB_220ohm+-25%_100MHz +
1/F C354 C853
_2A_0.1ohm DC
1
603 CRESTLINE_1p0_DU 220U/4V 10U/6.3V

1 2
2
C295
0.1U
UMA POP C493 & RESISTOR
2
C361 10V
10U R841 0_UMA +VTTLF1
2
603 +1.8V_SUS 2 1 +VCCD_LVDS 1 R140 2 +VTTLF2

6.3 0_UMA +VTTLF3 1
1
L49 +1.8V_SUS
C316 C267 C804 1uH/300mA
C189 0.47U/10V 0.47U/10V 0.47U/10V +VCC_SM_CK 2 1
2
2
layout note: close to pin A41 C190 10U_NC
1
1U_UMA 603 1uH+-20%_300mA
B 603 6.3 B
+VCC_TX_LVDS_L 10 R314
1
1/F/0603
C405 C376
1 2
22U/10V 0.1U/10V +VCC_SM_CK_L
2
+1.25V_RUN
C374
C801 10U/6.3V
2
1
1000P_UMA C427 C423 C366 C394

50 22U 1U 1U 0.1U
805 603 603 10V
Non-iAMT
2
10 10 10
layout shound close to BB29 & BC29

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
UMA POP ALL BESIDES C466, C467, C463, C454, R441 & D33 0_DIS
+1.5V_RUN 1 R162 2 +VCCD_TVDAC_RR
+3.3V_RUN L16 +VCC_TVDAC +VCC_TVDACA_RR
1
BLM18PG181SN1D_UMA R223 0_0402_UMA

603 3 1 C779 C792 C780
22nF & 0.1uF for 10U_DIS 0.1U_DIS 0.022U_DIS
2
VCC_TVDACA:C_R should C241 C256 C258 603 10V 16

2
10U_UMA 0.1U_UMA 22nF/3P_NC 6.3 603

be placed with in 250 805 10
mils from Crestline. 6.3
DIS POP ALL
+VCCA_DAC_BG +VCC_TVBG +VCC_TVDACB_RR
R710 0_UMA R729 R712 0_UMA
3 1 0.03/F_UMA 3 1
2010 +1.5V_RUN
C794 C796 C795 C793
UMA POP ALL BESIDES C498 & C 506
A A
2
22nF/3P_NC 0.1U_UMA 0.1U_UMA 22nF/3P_NC +VCCD_CRT_R

10 10 R707 0_0402_UMA
3 1
C790 +VCCQ_TVDAC_RR
0.1U_UMA C791
2
+3.3V_RUN 10 22nF/3P_NC
+VCC_TVDACC_RR
+1.5V_RUN
D28
R191
3 1
0_UMA L77
+VCCQ_TVDAC
QUANTA
+VCC_TVDAC_L BLM18PG181SN1D_UMA R727 0_0402_UMA
2 1
R697 10_NC C250 C237 3 1 COMPUTER
2
SDMK0340L-7-F_NC 0.1U_UMA 22nF/3P_NC FB_180ohm+-25%_

<Size> C806 Title
TV DAC Voltage Follower Circuit -700 mV. 10 0.1U/10V/0402_UMA C799 Crestline (POWER)
100mHz_1500mA_
2
22nF/3P_NC
0.09ohm <Voltage>
DC Size Document Number Rev
GM3 2B

5 4 3 2 1
5 4 3 2 1
U45I U45J
C46 VSS_199 VSS_287 W11
A13 VSS_1 VSS_100 AW24 C50 VSS_200 VSS_288 W39
A15 VSS_2 VSS_101 AW29 C7 VSS_201 VSS_289 W43
A17 VSS_3 VSS_102 AW32 D13 VSS_202 VSS_290 W47
A24 VSS_4 VSS_103 AW5 D24 VSS_203 VSS_291 W5
AA21 VSS_5 VSS_104 AW7 D3 VSS_204 VSS_292 W7
AA24 VSS_6 VSS_105 AY10 D32 VSS_205 VSS_293 Y13
AA29 VSS_7 VSS_106 AY24 D39 VSS_206 VSS_294 Y2
D
AB20 VSS_8 VSS_107 AY37 D45 VSS_207 VSS_295 Y41 D
AB23 VSS_9 VSS_108 AY42 D49 VSS_208 VSS_296 Y45
AB26 VSS_10 VSS_109 AY43 E10 VSS_209 VSS_297 Y49
AC10 VSS_13 VSS_112 AY50 E28 VSS_212 VSS_300 Y11
AC13 VSS_14 VSS_113 B10 E32 VSS_213 VSS_301 P29
AC3 VSS_15 VSS_114 B20 E47 VSS_214 VSS_302 T29
AC39 VSS_16 VSS_115 B24 F19 VSS_215 VSS_303 T31
AC43 VSS_17 VSS_116 B29 F36 VSS_216 VSS_304 T33
AC47 VSS_18 VSS_117 B30 F4 VSS_217 VSS_305 R28
AD1 VSS_19 VSS_118 B35 F40 VSS_218
AD21 VSS_20 VSS_119 B38 F50 VSS_219
AD26 VSS_21 VSS_120 B43 G1 VSS_220
AD29 VSS_22 VSS_121 B46 G13 VSS_221 VSS_306 AA32
AD3 VSS_23 VSS_122 B5 G16 VSS_222 VSS_307 AB32
AD41 VSS_24 VSS_123 B8 G19 VSS_223 VSS_308 AD32
AD45 VSS_25 VSS_124 BA1 G24 VSS_224 VSS_309 AF28
AD49 VSS_26 VSS_125 BA17 G28 VSS_225 VSS_310 AF29
AD5 VSS_27 VSS_126 BA18 G29 VSS_226 VSS_311 AT27
AD50 VSS_28 VSS_127 BA2 G33 VSS_227 VSS_312 AV25
AD8 VSS_29 VSS_128 BA24 G42 VSS_228 VSS_313 H50
AE10 VSS_30 VSS_129 BB12 G45 VSS_229
AE14 VSS_31 VSS_130 BB25 G48 VSS_230
AE6 VSS_32 VSS_131 BB40 G8 VSS_231
AF20 BB44 H24
AF23
AF24
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
BB49
BB8
H28
H4
VSS_232
VSS_233
VSS_234
AF31 VSS_36 VSS_135 BC16 H45 VSS_235
AG2 VSS_37 VSS_136 BC24 J11 VSS_236
C AG38 VSS_38 VSS_137 BC25 J16 VSS_237
C
AG43 VSS_39 VSS_138 BC36 J2 VSS_238
AG47 VSS_40 VSS_139 BC40 J24 VSS_239
AG50 VSS_41 VSS_140 BC51 J28 VSS_240
AH3 BD13 J33
AH40
AH41
VSS_42
VSS_43
VSS_44
VSS_141
VSS_142
VSS_143
BD2
BD28
J35
J39
VSS_241
VSS_242
VSS_243
VSS
AH7 VSS_45 VSS_144 BD45
AH9 VSS_46 VSS_145 BD48 K12 VSS_245
AJ11 VSS_47 VSS_146 BD5 K47 VSS_246
AJ13 VSS_48 VSS_147 BE1 K8 VSS_247
AJ21 VSS_49 VSS_148 BE19 L1 VSS_248
AJ24 VSS_50 VSS_149 BE23 L17 VSS_249
AJ29 VSS_51 VSS_150 BE30 L20 VSS_250
AJ32 VSS_52 VSS_151 BE42 L24 VSS_251
AJ43 VSS_53 VSS_152 BE51 L28 VSS_252
AJ45 VSS_54 VSS_153 BE8 L3 VSS_253
AJ49 VSS_55 VSS_154 BF12 L33 VSS_254
AK20 VSS_56 VSS_155 BF16 L49 VSS_255
AK21 VSS_57 VSS_156 BF36 M28 VSS_256
AK26 VSS_58 VSS_157 BG19 M42 VSS_257
AK28 VSS_59 VSS_158 BG2 M46 VSS_258
AK31 VSS_60 VSS_159 BG24 M49 VSS_259
AK51 VSS_61 VSS_160 BG29 M5 VSS_260
AL1 VSS_62 VSS_161 BG39 M50 VSS_261
AM11 VSS_63 VSS_162 BG48 M9 VSS_262
AM13 VSS_64 VSS_163 BG5 N11 VSS_263
AM3 VSS_65 VSS_164 BG51 N14 VSS_264
AM4 VSS_66 VSS_165 BH17 N17 VSS_265
B
AM41 VSS_67 VSS_166 BH30 N29 VSS_266 B
AM45 VSS_68 VSS_167 BH44 N32 VSS_267
AN1 VSS_69 VSS_168 BH46 N36 VSS_268
AN38 VSS_70 VSS_169 BH8 N39 VSS_269
AN39 VSS_71 VSS_170 BJ11 N44 VSS_270
AN43 VSS_72 VSS_171 BJ13 N49 VSS_271
AN5 VSS_73 VSS_172 BJ38 N7 VSS_272
AN7 VSS_74 VSS_173 BJ4 P19 VSS_273
AP4 VSS_75 VSS_174 BJ42 P2 VSS_274
AP48 VSS_76 VSS_175 BJ46 P23 VSS_275
AP50 VSS_77 VSS_176 BK15 P3 VSS_276
AR11 VSS_78 VSS_177 BK17 P50 VSS_277
AR2 VSS_79 VSS_178 BK25 R49 VSS_278
AR39 VSS_80 VSS_179 BK29 T39 VSS_279
AR44 VSS_81 VSS_180 BK36 T43 VSS_280
AR47 VSS_82 VSS_181 BK40 T47 VSS_281
AR7 VSS_83 VSS_182 BK44 U41 VSS_282
AT10 VSS_84 VSS_183 BK6 U45 VSS_283
AT14 VSS_85 VSS_184 BK8 U50 VSS_284
AT41 VSS_86 VSS_185 BL11 V2 VSS_285
AT49 VSS_87 VSS_186 BL13 V3 VSS_286
AU1 VSS_88 VSS_187 BL19
AU29 BL37 CRESTLINE_1p0_DU
VSS_90 VSS_189
AU36 VSS_92 VSS_191 C12
AU49 VSS_93 VSS_192 C16
AU51 VSS_94 VSS_193 C19
AV39 VSS_95 VSS_194 C28
AV48 VSS_96 VSS_195 C29
A AW1 VSS_97 VSS_196 C33 A
AW12 VSS_98 VSS_197 C36
AW16 VSS_99 VSS_198 C41
CRESTLINE_1p0_DU
QUANTA
Title
COMPUTER
Crestline (VSS)

GM3 2B

5 4 3 2 1
1 2 3 4 5 6 7 8
32.768KHZ R816 10M +RTC_CELL +RTC_CELL

2 1
1
W2 R815 0 R550 R532
ICH_RTCX1 1 4 1 2 ICH_RTCX2 332K/F 332K/F
2
2 3 ICH_INTVRMEN ICH_LAN100_SLP
1
C945 32.768KHZ C944
A A
12P/50V 12P/50V
2
R548 R528
0_NC 0_NC
2
+RTC_CELL ICH8M Internal VR Enable Strap ICH8M LAN100 SLP Strap
(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5) (Internal VR for VccLAN1.05 and VccCL1.05)
Low = Internal VR Disabled Low = Internal VR Disabled
2
ICH_INTVRMEN High = Internal VR Enabled(Default) ICH_LAN100_SLP High = Internal VR Enabled(Default)
R535 R538 +1.05V_VCCP
1M 20K
U48A
2
1
ICH_RTCRST# ICH_RTCX1 AG25 E5
RTCX1 FWH0/LAD0 LPC_LAD0 31,33
2
ICH_INTRUDER# ICH_RTCX2 AF24 F5
RTCX2 FWH1/LAD1 LPC_LAD1 31,33
G8 R561 R560 R542
FWH2/LAD2 LPC_LAD2 31,33
1
ICH_RTCRST# AF23 F6 56_NC 56_NC 56
RTCRST# FWH3/LAD3 LPC_LAD3 31,33
C628
LPC
RTC
1U/10V ICH_INTRUDER# AD22 C4 LPC_LFRAME# 31,33
2
1
INTRUDER# FWH4/LFRAME# H_DPRSTP#
ICH_INTVRMEN AF25 G9 H_DPSLP#
INTVRMEN LDRQ0# PAD T62
ICH_LAN100_SLP AD21 E6 H_FERR#
LAN100_SLP LDRQ1#/GPIO23 PAD T56
T140 PAD GLAN_CLK B24 AF13 SIO_A20GATE

GLAN_CLK A20GATE SIO_A20GATE 31
A20M# AG26 H_A20M# 3
D22 LAN_RSTSYNC
Reserved for AF26 H_DPRSTP# +3.3V_RUN
DPRSTP# H_DPRSTP# 3,6,51
B R506 1 2 33_UMA ACZ_BIT_CLK Intel Nineveh T80 PAD LAN_RXD0 C21 AE26 H_DPSLP# B
LAN / GLAN
25 ICH_AZ_HDMI_BITCLK LAN_RXD0 DPSLP# H_DPSLP# 3
R508 1 2 33 T135 PAD LAN_RXD1 B21
40 ICH_AZ_CODEC_BITCLK design. LAN_RXD1
T86 PAD LAN_RXD2 C22 AD24 H_FERR#
LAN_RXD2 FERR# H_FERR# 3
2
T84 PAD LAN_TXD0
2
T71 PAD LAN_TXD1 D21 AG29 R501 R502

C594 C603 LAN_TXD2 LAN_TXD0 CPUPWRGD/GPIO49 H_PWRGOOD 3 10K 10K
T83 PAD E20 LAN_TXD1
27P/50V_UMA 27P/50V_NC C20 AF27
1
R533 10K_NC LAN_TXD2 IGNNE# H_IGNNE# 3
CPU
1
+3.3V_SUS 2 1 AH21 AE24 SIO_A20GATE
GLAN_DOCK#/GPIO13 INIT# H_INIT# 3
AC20 SIO_RCIN#
INTR H_INTR 3
R516 1 2 33_UMA ACZ_SYNC R545 24.9/F D25 AH14 SIO_RCIN#
25 ICH_AZ_HDMI_SYNC GLAN_COMPI RCIN# SIO_RCIN# 31
R517 1 2 33 +1.5V_PCIE_ICH 1 2 GLAN_COMP C25
40 ICH_AZ_CODEC_SYNC GLAN_COMPO
R503 1 2 33_UMA ACZ_RST# AD23
25 ICH_AZ_HDMI_RST# NMI H_NMI 3
R504 1 2 33 ACZ_BIT_CLK AJ16 AG28
31,40 ICH_AZ_CODEC_RST# HDA_BIT_CLK SMI# H_SMI# 3 +1.05V_VCCP
R496 1 2 33_UMA ACZ_SDOUT ACZ_SYNC AJ15
25 ICH_AZ_HDMI_SDOUT HDA_SYNC
R481 1 2 33 AA24
40 ICH_AZ_CODEC_SDOUT STPCLK# H_STPCLK# 3
ACZ_RST# AE14 HDA_RST#
2
AE27 THERMTRIP#_ICH
THRMTRIP# R559
Place all series terms close to ICH8 except for SDIN input 40 ICH_AZ_CODEC_SDIN0 AJ17 HDA_SDIN0
lines,which should be close to source.Placement of R603, R600, AH17 AA23 56
25 ICH_AZ_HDMI_SDIN1 PAD T85
IHDA
HDA_SDIN1 TP8
T133 PAD AH15 HDA_SDIN2
R607 & R612 should equal distance to the T split trace point as AD13 V1 IDE_D0
PAD PAD T129
1
R604, R599, R606 & R608 respective. Basically,keep the same T63 HDA_SDIN3 DD0 IDE_D1 THERMTRIP#_ICH
DD1 U2 PAD T128
distance from T for all series termination resistors. ACZ_SDOUT AE13 V3 IDE_D2
HDA_SDOUT DD2 PAD T36
T1 IDE_D3
DD3 PAD T126
+3.3V_SUS R472 2 1 10K_NC AE10 V4 IDE_D4
HDA_DOCK_EN#/GPIO33 DD4 PAD T39
R507 2 1 10K_NC AG14 T5 IDE_D5
HDA_DOCK_RST#/GPIO34 DD5 PAD T52
AB2 IDE_D6
DD6 PAD T131
AF10 T6 IDE_D7
38 SATA_ACT# SATALED# DD7 PAD T53
T3 IDE_D8
C DD8 PAD T47 C
C553 2 1 3900P SATA_TX0-_C AF6 R2 IDE_D9
36 SATA_TX0- 36 SATA_RX0- SATA0RXN DD9 PAD T127
C554 2 1 3900P SATA_TX0+_C Master HDD AF5 T4 IDE_D10
36 SATA_TX0+ 36 SATA_RX0+ SATA0RXP DD10 PAD T37
25 SATA_TX0-_C AH5 V6 IDE_D11
SATA0TXN DD11 PAD T35
25 SATA_TX0+_C AH6 V5 IDE_D12
SATA0TXP DD12 PAD T42
C900 2 1 3900P SATA_TX1-_C U1 IDE_D13
IDE
36 SATA_TX1- DD13 PAD T123
C898 2 1 3900P SATA_TX1+_C AG3 V2 IDE_D14
36 SATA_TX1+ 36 SATA_RX1- SATA1RXN DD14 PAD T122
25 SATA ODD AG4 U6 IDE_D15
36 SATA_RX1+ SATA1RXP DD15 PAD T59
25 SATA_TX1-_C AJ4
SATA_TX1+_C SATA1TXN IDE_DA0
AJ3 AA4
SATA
SATA1TXP DA0 PAD T40
C535 2 1 3900P SATA_TX2-_C AA1 IDE_DA1
36 SATA_TX2- DA1 PAD T130
C536 2 1 3900P SATA_TX2+_C AF2 AB3 IDE_DA2
36 SATA_TX2+ 36 SATA_RX2- SATA2RXN DA2 PAD T124
25 Second HDD 36 SATA_RX2+ AF1 SATA2RXP
25 SATA_TX2-_C AE4 Y6
SATA2TXN DCS1# PAD T51
SATA_TX2+_C AE3 Y5
SATA2TXP DCS3# PAD T44
Distance between the ICH-8 M and cap on the "P" 17 CLK_PCIE_SATA# AB7 SATA_CLKN DIOR# W4 PAD T38
signal should be identical distance between the 17 CLK_PCIE_SATA AC6 SATA_CLKP DIOW# W3 PAD T41
DDACK# Y2 PAD T125
ICH-8 M and cap on the "N" signal for same pair. Place within 500mils R765 24.9/F AG1 Y3 IDE_IRQ R425 2 1 8.2K
SATARBIAS# IDEIRQ +3.3V_RUN
of ICH8 ball 2 1 SATABIAS AG2 SATARBIAS IORDY Y1 IDE_DIORDY R766 2 1 4.7K
DDREQ W5 PAD T45
IC,ICH8M,BGA676,12-01,rev1p0_2
+3.3V_RUN
2
D XOR Chain Entrance Strap R482 D

1K_NC
ICH RSVD HDA SDOUT Description
QUANTA
1
0 0 RSVD ACZ_SDOUT
ICH_RSVD 13
0 1 Enter XOR Chain
COMPUTER
2
1 0 Normal Operation (Default) R787 Title

1K_NC ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
1 1 Set PCIE port config bit 1
1
GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
T239 PAD
T240 PAD
U48D
Place TX DC blocking caps close ICH8. 33 PCIE_RX1- P27 PERN1 DMI0RXN V27 DMI_MTX_IRX_N0 6
P26 PERP1 V26
Direct Media Interface

33 PCIE_RX1+ DMI0RXP DMI_MTX_IRX_P0 6
C953 1 2 0.1U PCIE_TXN1_C PCIE_TXN1_C N29 PETN1 U29
33 PCIE_TX1- DMI0TXN DMI_MRX_ITX_N0 6
C955 1 2 0.1U PCIE_TXP1_C MiniWWAN PCIE_TXP1_C N28 PETP1 U28
33 PCIE_TX1+ DMI0TXP DMI_MRX_ITX_P0 6
10 T242
T241 PAD PAD
10 34 PCIE_RX2- M27 PERN2 DMI1RXN Y27 DMI_MTX_IRX_N1 6
C951 1 2 0.1U PCIE_TXN2_C M26 PERP2 Y26
34 PCIE_TX2- 34 PCIE_RX2+ DMI1RXP DMI_MTX_IRX_P1 6
C952 1 2 0.1U PCIE_TXP2_C PCIE_TXN2_C L29 PETN2 W29
34 PCIE_TX2+ DMI1TXN DMI_MRX_ITX_N1 6
10 MiniWLAN PCIE_TXP2_C L28 PETP2 W28
DMI1TXP DMI_MRX_ITX_P1 6
10 T244
T243 PAD PAD
C949 1 2 0.1U PCIE_TXN3_C K27 PERN3 AB26
PCI-Express
33 PCIE_TX3- 33 PCIE_RX3- DMI2RXN DMI_MTX_IRX_N2 6
C950 1 2 0.1U PCIE_TXP3_C K26 PERP3 AB25
A 33 PCIE_TX3+ 33 PCIE_RX3+ DMI2RXP DMI_MTX_IRX_P2 6 A
10 PCIE_TXN3_C J29 PETN3 AA29
DMI2TXN DMI_MRX_ITX_N2 6
10 MiniWPAN PCIE_TXP3_C J28 PETP3 AA28
DMI2TXP DMI_MRX_ITX_P2 6
C948 1 2 0.1U PCIE_TXN4_C T246
30 PCIE_TX4- T245 PAD PAD
C947 1 2 0.1U PCIE_TXP4_C H27 PERN4 AD27
30 PCIE_TX4+ 30 PCIE_RX4- DMI3RXN DMI_MTX_IRX_N3 6
10 30 PCIE_RX4+ H26 PERP4 DMI3RXP AD26 DMI_MTX_IRX_P3 6
10 PCIE_TXN4_C G29 PETN4 AC29
DMI3TXN DMI_MRX_ITX_N3 6
C946 1 2 0.1U GLAN_TXN_C Express Card PCIE_TXP4_C G28 PETP4 AC28
42 PCIE_TX6-/GLAN_TX- DMI3TXP DMI_MRX_ITX_P3 6
C954 1 2 0.1U GLAN_TXP_C
42 PCIE_TX6+/GLAN_TX+
10 F27 PERN5 DMI_CLKN T26 CLK_PCIE_ICH# 17
10 F26 PERP5 DMI_CLKP T25 CLK_PCIE_ICH 17
E29 PETN5
T250
T249 PAD PADE28 PETP5 DMI_ZCOMP Y23
T248 Y24 DMI_COMP 1 2 Place within 500mils of ICH8
T247 PAD PAD DMI_IRCOMP +1.5V_PCIE_ICH
D27 R529 24.9/F
42 PCIE_RX6-/GLAN_RX- PERN6/GLAN_RXN
42 PCIE_RX6+/GLAN_RX+ D26 G3 ICH_USBP0- 35
GLAN_TXN_C C29
PERP6/GLAN_RXP USBP0N
G2 ICH_USBP0+ 35
Side pair Top / left
GLAN_TXP_C PETN6/GLAN_TXN USBP0P
Giga Bit LOM C28 PETP6/GLAN_TXP USBP1N H5 ICH_USBP1- 35
Side pair bottom / left
USBP1P H4 ICH_USBP1+ 35
ICH_SPI_CS1#_R Boot BIOS Strap C23 H2 ICH_USBP2- 54
T87 PAD SPI_CLK USBP2N Side pair top/right(DB)
PCI_GNT0# B23 H1 ICH_USBP2+ 54
T137 PAD SPI_CS0# USBP2P
GNT0# SPI_CS1# ICH_SPI_CS1#_R E22 J3 ICH_USBP3- 54
SPI
SPI_CS1# USBP3N Side pair Bot right(DB)
2
USBP3P J2 ICH_USBP3+ 54 PCI Pullups

R546 LPC 11 No stuff No stuff D23 K5 ICH_USBP4- 41
T91 PAD SPI_MOSI USBP4N Camera
R451 1K_NC F21 K4 ICH_USBP4+ 41
T81 PAD SPI_MISO USBP4P
1K_NC PCI 10 No stuff Stuff K2 ICH_USBP5- 33
USB_OC0_1# AJ19
USBP5N
K1 ICH_USBP5+ 33
Mini Card (WWAN)
35 USB_OC0_1#
1
OC0# USBP5P
SPI 01 Stuff No stuff AG16 OC1#/GPIO40 USBP6N L3 ICH_USBP6- 33
Mini Card (WPAN)
USB_OC2_3#
54 USB_OC2_3# AG15
AE15
OC2#/GPIO41 USB USBP6P L2
M5
ICH_USBP6+ 33
ICH_USBP7- 30
B OC4# AF15
OC3#/GPIO42 USBP7N
M4 ICH_USBP7+ 30
Express Card B
OC5# OC4#/GPIO43 USBP7P +3.3V_RUN
AG17 M2 ICH_USBP8- 35
OC6# AD12
OC5#/GPIO29 USBP8N
M1 ICH_USBP8+ 35
left side signal USB port RP42
OC7# OC6#/GPIO30 USBP8P PCI_FRAME#
AJ18 N3 ICH_USBP9- 38 6 5
USB_OC8# AD14
OC7#/GPIO31 USBP9N
N2 ICH_USBP9+ 38
Biometric PCI_STOP# 7 4 PCI_TRDY#
35 USB_OC8# OC8# USBP9P
OC9# AH18 PCI_DEVSEL# 8 3 PCI_PIRQD#
OC9# PCI_REQ1# PCI_PIRQB#
USBRBIAS# F2 9 2
F3 USBRBIAS 10 1 PCI_SERR#
USBRBIAS +3.3V_RUN
+3.3V_RUN
2
Short F2 and F3 at the package RP40
WWAN Noise - ICH improvements Non-iAMT +3.3V_SUS
and keep length to less than R763 PCI_IRDY# 6 5
OC6# C918 0.1U_NC RP49 22.6/F PCI_PERR# PCI_PIRQA#
1 2 7 4
OC4# C915 1 2 0.1U_NC OC6# 6 5
500mils. Trace Impedance PCI_PLOCK# 8 3 ICH_IRQH_GPIO5
OC5# C916 1 10 2 0.1U_NC OC4# 7 4 USB_OC8# should be 60ohms +/- 15%. PCI_PIRQB# 9 2 PCI_PIRQC#
1
OC7# C917 1 10 2 0.1U_NC OC5# 8 3 USB_OC2_3# 10 1 PCI_REQ0#
USB_OC8# C922 0.1U_NC OC7# USB_OC0_1# +3.3V_RUN
1 10 2 9 2
USB_OC2_3# C923 1 10 2 0.1U_NC 10 1 OC9#
USB_OC0_1# C924 0.1U_NC +3.3V_SUS
1 10 2
OC9# C925 1 10 2 0.1U_NC
10KX8
10
10
SB_WPAN_PCIE_RST# R468 2 1 20K
SB_WWAN_PCIE_RST# R791 2 1 20K
28 PCI_AD[0..31] U48B SB_WLAN_PCIE_RST# R467 2 1 20K
PCI_AD0 D20 A4 PCI_REQ0# SB_LOM_PCIE_RST# R477 2 1 20K
AD0 REQ0# PCI_REQ0# 28
PCI_AD1 PCI_GNT0# SB_NB_PCIE_RST# R495 20K
PCI_AD2
E19
D19
AD1 PCI GNT0# D7
E18 PCI_REQ1#
PCI_GNT0# 28 2 1
C AD2 REQ1#/GPIO50 PAD T65 C
PCI_AD3 A20 C18 PCI_GNT1# BIOS should not enable the
AD3 GNT1#/GPIO51 PAD T75
PCI_AD4 D17 B19 SB_WWAN_PCIE_RST# internal GPIO pull up resistor.
AD4 REQ2#/GPIO52 SB_WWAN_PCIE_RST# 33
PCI_AD5 A21 F18 PCI_GNT2#
PCI_AD6 A19 A11 SB_LOM_PCIE_RST# PCI_GNT3#
AD6 REQ3#/GPIO54 SB_LOM_PCIE_RST# 42
PCI_AD7 C19 C10 PCI_GNT3#
1
PCI_AD8
PCI_AD9
A18
B16
AD8
C17 R474 Non-iAMT +3.3V_SUS Add Buffers as needed for
AD9 C/BE0# PCI_C_BE0# 28
PCI_AD10 A12 E15 1K_NC C887 Loading and fanout concerns.
PCI_AD11 E16 F16 1 2
PCI_AD12 A14 E17 PCI_C_BE3# 28
2
PCI_AD13 AD12 C/BE3# 0.047U
G16 AD13
5
PCI_AD14 A15 C8 PCI_IRDY# U47
AD14 IRDY# PCI_IRDY# 28
PCI_AD15 B6 D9 10 2
AD15 PAR PCI_PAR 28
PCI_AD16 C11 G6 PCI_RST#_G A16 away override strap. 4
AD16 PCIRST# PCI_RST# 28
PCI_AD17 A9 D16 PCI_DEVSEL# PCI_RST#_G 1
AD17 DEVSEL# PCI_DEVSEL# 28
PCI_AD18 D11 A7 PCI_PERR# Low = A16 swap override enabled.
AD18 PERR# PCI_PERR# 28
PCI_AD19 B12 B7 PCI_PLOCK# SB_NB_PCIE_RST# High = Default. TC7SZ32FU(T5L,F,T)
AD19 PLOCK# PCI_PLOCK#
PCI_AD20 C12 F10 PCI_SERR#
AD20 SERR# PCI_SERR# 28
PCI_AD21 D10 C16 PCI_STOP# +3.3V_SUS
AD21 STOP# PCI_STOP# 28
PCI_AD22 C7 C9 PCI_TRDY# C958
AD22 TRDY# PCI_TRDY# 28
PCI_AD23 F13 A17 PCI_FRAME# CLK_PCI_ICH 1 2
AD23 FRAME# PCI_FRAME# 28
PCI_AD24 E11 AD24
2
PCI_AD25 E13 AG24 PCI_PLTRST# 0.047U
AD25 PLTRST#
5
PCI_AD26 E12 B10 CLK_PCI_ICH PCI_AD15 U50
AD26 PCICLK CLK_PCI_ICH 17 T210 PAD PAD T209
PCI_AD27 D8 G7 PCI_AD2 R772 10 2
AD27 PME# ICH_PME# 28,31
PCI_AD28 A6 PCI_AD3 10_NC 4
AD28 T213 PAD PAD T214 PLTRST# 6,25,30,33,34,42
PCI_AD29 E8 PCI_AD0 PCI_PLTRST# 1
T215 PAD PAD T216
2 1
PCI_AD30 AD29 PCI_AD2
D6 AD30 T217 PAD PAD T218
PCI_AD31 A3 PCI_AD21 TC7SZ32FU(T5L,F,T)
AD31 T219 PAD PAD T220
D PCI_AD17 C907 D
T221 PAD PAD T222
PCI_AD16 8.2P_NC
Interrupt I/F T223 PAD PAD T224
1
PCI_PIRQA# F9 F8 SB_WPAN_PCIE_RST#
T55 PAD PIRQA# PIRQE#/GPIO2 SB_WPAN_PCIE_RST# 33
PCI_PIRQB# B5 G11 SB_WLAN_PCIE_RST#
28 PCI_PIRQB#
28 PCI_PIRQC#
T132 PAD
PCI_PIRQC#
PCI_PIRQD#
C5
A10
PIRQB#
PIRQC#
PIRQF#/GPIO3
PIRQG#/GPIO4 F12
B3
SB_NB_PCIE_RST#
ICH_IRQH_GPIO5
SB_WLAN_PCIE_RST# 34
SB_NB_PCIE_RST# 6
PAD T49
Reserved for 16
EMI.Place
QUANTA
PIRQD# PIRQH#/GPIO5 PCI_IRDY#
T225
T229
PAD
PAD
PCI_TRDY#
PCI_FRAME#
PAD
PAD
T226
T230
resister and cap
close to ICH. Title
COMPUTER
T234 PAD PAD T233
PCI_STOP# ICH8-M (USB,DMI,PCIE,PCI)
T228 PAD PAD T227
PCI_DEVSEL#
T231 PAD PAD T232
PCI_GNT0# Size Document Number Rev
T235 PAD PAD T236
PCI_REQ0# GM3 2B
T237 PAD PAD T238
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3.3V_SUS
Non-iAMT
RP50
1 2 ICH_SMBDATA
3 4 ICH_SMBCLK Place these close to ICH8.
2.2KX2
CLK_ICH_48M
+3.3V_SUS Non-iAMT
2
A A
R789 10K_NC RSV_ICH_CL_RST1# +3.3V_RUN

Non-iAMT ASF 2.0 R519
2
2
1
1 10K ICH_RI# R444
+3.3V_SUS R521 2 1 10K SIO_EXT_SCI# 10_NC
R509 2 1 1K PCIE_WAKE#
1 1
2
RP45
1 2 ICH_SMLINK0
3 4 ICH_SMLINK1 R773 C564
8.2K 4.7P_NC
2
100KX2_NC
1
U48C
ICH_SMBCLK R798 1 2 0 ICH_SMLINK0 ICH_SMBCLK AJ26 AJ12 50
ICH_SMBDATA R524 1 30,33,34 ICH_SMBCLK SMBCLK SATA0GP/GPIO21
2 0 ICH_SMLINK1 30,33,34 ICH_SMBDATA
ICH_SMBDATA AD19 SMBDATA SATA1GP/GPIO19 AJ10
Clocks SATA
GPIO
RSV_ICH_CL_RST1# AG21 AF11 CLK_ICH_14M
SMB
T82 PAD LINKALERT# SATA2GP/GPIO36
T139 PAD ICH_SMLINK0 AC17 AG11
SMLINK0 SATA3GP/GPIO37
2
T79 PAD ICH_SMLINK1 AE19 SMLINK1 CLK_ICH_14M
CLK14 AG9 CLK_ICH_14M 17
+3.3V_RUN ICH_RI# AF17 G5 CLK_ICH_48M R473
RI# CLK48 CLK_ICH_48M 17
10_NC
T48 PAD RSV_LPCPD# F4 D3 ICH_SUSCLK
PAD T43
1 1
SUS_STAT#/LPCPD# SUSCLK
2
3 ITP_DBRESET# AD15 SYS_RESET#

SLP_S3# AG23 SIO_SLP_S3# 31
R775 AG12 AF21 C577
6 PM_BMBUSY# BMBUSY#/GPIO0 SLP_S4# PAD T88
8.2K AD18 4.7P_NC
SIO_SLP_S5# 31
2
USB_MCARD1_DET# SLP_S5#
34 USB_MCARD1_DET# AG22
1
CLKRUN# SMBALERT#/GPIO11
S4_STATE#/GPIO26 AH27
AE20 50
17 H_STP_PCI#
GPIO
STP_PCI#/GPIO15
2
AG18 AE23 ICH_PWRGD
SYS
17 H_STP_CPU# STP_CPU#/GPIO25 PWROK ICH_PWRGD 6,44
DPRSLPVR
DPRSLPVR 6,51
B R777 CLKRUN# AH11 AJ14 B
Power MGT
10_NC 28,31 CLKRUN# CLKRUN#/GPIO32 DPRSLPVR/GPIO16 R537 8.2K
PCIE_WAKE# AE17 AE21 ICH_BATLOW# 2 1 +3.3V_SUS
30,33,34,42 PCIE_WAKE#
1
IRQ_SERIRQ WAKE# BATLOW#

28,31 IRQ_SERIRQ AF12 SERIRQ
THERM_ALERT# AC13 C2
39 THERM_ALERT# THRM# PWRBTN# SIO_PWRBTN# 31
Option to " Disable " ICH_PWRGD R540 2 1 10K
clkrun. Pulling it down IMVP_PWRGD AJ20 AH20 RSV_ICH_LAN_RST#
31,44,51 IMVP_PWRGD VRMPWRGD LAN_RST# PAD T76
DPRSLPVR R784 1 2 100K
will keep the clks AJ22 AG27 ICH_RSMRST#
T134 PAD TP7 RSMRST# ICH_RSMRST# 31
running. ICH_RSMRST# R564 2 1 10K 14
USB_MCARD2_DET# AJ8 E1
33 USB_MCARD2_DET# TACH1/GPIO1 CK_PWRGD CLK_PWRGD 17
USB_MCARD3_DET# AJ9 RSV_ICH_LAN_RST# R523 2 1 10K
33 USB_MCARD3_DET# TACH2/GPIO6
AH9 E3 ICH_CL_PWROK
31 SIO_EXT_WAKE# TACH3/GPIO7 CLPWROK ICH_CL_PWROK 6,31
SIO_EXT_SMI# ICH_CL_PWROK R762 2 1 1M
31 SIO_EXT_SMI#
SIO_EXT_SCI#
AE16 GPIO8 Non-iAMT
12 R267
31 SIO_EXT_SCI#
0_NC
AC19
AG8
GPIO12 SLP_M# AJ25 PAD T90
37 KB_LED_DET# TACH0/GPIO17
PCIE_MCARD1_DET# R820 2 1 4.7K AH12 F23
Controller Link
34 PCIE_MCARD1_DET# GPIO18 CL_CLK0 CL_CLK0 6
PCIE_MCARD2_DET# AE11 AE18 RSV_ICH_CL_CLK1
GPIO
33 PCIE_MCARD2_DET# GPIO20 CL_CLK1 PAD T69
PCIE_MCARD3_DET# AG10
33 PCIE_MCARD3_DET# SCLOCK/GPIO22
34 WLAN_RADIO_DIS# AH25 QRT_STATE0/GPIO27 CL_DATA0 F22 CL_DATA0 6
AD16 AF19 RSV_ICH_CL_DATA1 +3.3V_SUS
41 CAMERA_CBL_DET# QRT_STATE1/GPIO28 CL_DATA1 PAD T78
17 SATA_CLKREQ# AG13 SATACLKREQ#/GPIO35
R465 2 1 10K PLTRST_DELAY# PLTRST_DELAY# AF9 D24 CL_VREF0 RSV_GPIO10 R795 2 1 10K
18 PLTRST_DELAY# SLOAD/GPIO38 CL_VREF0
AJ11 AH23 CL_VREF1
33 WPAN_RADIO_DIS_MINI# SDATAOUT0/GPIO39 CL_VREF1 PAD T138
33 WWAN_RADIO_DIS# AD10 SDATAOUT1/GPIO48
CL_RST# AJ23 ICH_CL_RST0# 6
SPKR AD9
40 SPKR SPKR
AJ27
MISC
MCH_ICH_SYNC#_R AJ13 MEM_LED/GPIO24 RSV_GPIO10
6 MCH_ICH_SYNC# 2 1 MCH_SYNC# ME_EC_ALERT/GPIO10 AJ24 PAD T136
R778 0 AF22 RSV_GPIO14
C EC_ME_ALERT/GPIO14 PAD T92 C
+3.3V_RUN RSV_WOL_EN
11 ICH_RSVD AJ21 TP3 WOL_EN/GPIO9 AG19 PAD T77 DIS:ALW
R786 2 1 2.2K_NC IMVP_PWRGD R543 8.2K
2 1 +3.3V_SUS
UMA:SUS
R770 1 2 100K USB_MCARD2_DET#
R771 100K USB_MCARD3_DET# +3.3V_RUN +3.3V_ALW +3.3V_SUS
R480
1
1
2
2 100K PCIE_MCARD1_DET# Non-iAMT
R490 1 2 100K PCIE_MCARD2_DET#
2
R774 1 2 100K PCIE_MCARD3_DET#
+3.3V_RUN +3.3V_RUN R531 R536 R796
Non-iAMT 3.24K/F 3.24K/F_NC 3.24K/F_NC
SMbus address D2
1
1
2
+3.3V_RUN R478 4
1K_NC These are for CL_VREF0 CL_VREF1
R781 2 1 10K_NC MCH_ICH_SYNC#_R backdrive issue. RP51
R476 2 1 10K IRQ_SERIRQ 2.2KX2
2
1
R500 2 1 10K THERM_ALERT# SPKR
2
1
C621 R534 C926 R792
1
3
Q47 0.1U 453/F 0.1U_NC 453/F_NC

No Reboot strap. 30,33,34 ICH_SMBDATA 3 1 MEM_SDATA 15
2
2
2
+3.3V_SUS Low = Default.
SPKR High = No Reboot. 2N7002W-7-F 10 10
R522 2 1 10K RSV_WOL_EN +3.3V_RUN

R505 2 1 10K SIO_EXT_SMI#
R788 1 2 100K USB_MCARD1_DET#
2
D Q76 D
30,33,34 ICH_SMBCLK 3 1 MEM_SCLK 15
2N7002W-7-F QUANTA
Title
COMPUTER
ICH8-M (PM,GPIO,SMB,CL)

GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+RTC_CELL U48E
+1.05V_VCCP
A23 VSS[001] VSS[099] K7
2
A5 VSS[002] VSS[100] L1
2
C616 C618 C629 AA2 L13
1U 0.1U 0.1U C598 C596 VSS[003] VSS[101]
AA7 L15
1
R783 100 U48F 0.1U 0.1U +1.05V_VCCP +1.5V_RUN VSS[004] VSS[102]
A25 L26
1
D16 VSS[005] VSS[103]
+5V_RUN 1 2 AD25 VCCRTC VCC1_05[01] A13 AB1 VSS[006] VSS[104] L27
10 10 10 B13 1 AB24 L4
VCC1_05[02] R469 VSS[007] VSS[105]
D30 A16 C13 10 10 AC11 L5
+ICH_V5REF_RUN V5REF[1] VCC1_05[03] VSS[008] VSS[106]
+3.3V_RUN 2 1 T7 V5REF[2] VCC1_05[04] C14 3 1 2 AC14 VSS[009] VSS[107] M12
603 D14 AC25 M13
VCC1_05[05] VSS[010] VSS[108]
1
SDMK0340L-7-F G4 E14 2 10 AC26 M14
C608 V5REF_SUS VCC1_05[06] VSS[011] VSS[109]
A VCC1_05[07] F14 AC27 VSS[012] VSS[110] M15 A
1U AA25 G14 BAT54C T/R AD17 M16
2
VCC1_5_B[01] VCC1_05[08] 805 VSS[013] VSS[111]
Non-iAMTR764 100
AA26
AA27
VCC1_5_B[02] VCC1_05[09] L11
L12
AD20
AD28
VSS[014] VSS[112] M17
M23
10 VCC1_5_B[03] VCC1_05[10] VSS[015] VSS[113]
+5V_SUS 1 2 AB27 VCC1_5_B[04] VCC1_05[11] L14 AD29 VSS[016] VSS[114] M28
AB28 VCC1_5_B[05] VCC1_05[12] L16 AD3 VSS[017] VSS[115] M29
D29 AB29 L17 AD4 M3
603 +ICH_V5REF_SUS VCC1_5_B[06] VCC1_05[13] VSS[018] VSS[116]
+3.3V_SUS 2 1 D28 VCC1_5_B[07] VCC1_05[14] L18 AD6 VSS[019] VSS[117] N1
D29 VCC1_5_B[08] VCC1_05[15] M11 AE1 VSS[020] VSS[118] N11
1
CORE
SDMK0340L-7-F E25 M18 AE12 N12
C896 VCC1_5_B[09] VCC1_05[16] VSS[021] VSS[119]
E26 VCC1_5_B[10] VCC1_05[17] P11 1uH+-20%_800mA AE2 VSS[022] VSS[120] N13
1U E27 P18 AE22 N14
2
VCC1_5_B[11] VCC1_05[18] L88 +1.5V_RUN VSS[023] VSS[121]

F24 VCC1_5_B[12] VCC1_05[19] T11 AD1 VSS[024] VSS[122] N15
F25 T18 1uH R817 1 AE25 N16
VCC1_5_B[13] VCC1_05[20] +1.5V_DMIPLL VSS[025] VSS[123]
10 G24 VCC1_5_B[14] VCC1_05[21] U11 2 1+1.5V_DMIPLL_R 2 1 AE5 VSS[026] VSS[124] N17
H23 VCC1_5_B[15] VCC1_05[22] U18 AE6 VSS[027] VSS[125] N18
H24 VCC1_5_B[16] VCC1_05[23] V11 AE9 VSS[028] VSS[126] N26
2
603 J23 V12 AF14 N27
VCC1_5_B[17] VCC1_05[24] C942 C943 VSS[029] VSS[127]
J24 VCC1_5_B[18] VCC1_05[25] V14 AF16 VSS[030] VSS[128] N4
K24 V16 0.01U 10U AF18 N5
1
VCC1_5_B[19] VCC1_05[26] VSS[031] VSS[129]
K25 VCC1_5_B[20] VCC1_05[27] V17 AF3 VSS[032] VSS[130] N6
+1.5V_RUN L23 V18 AF4 P12
VCC1_5_B[21] VCC1_05[28] 25 6.3 VSS[033] VSS[131]
L24 VCC1_5_B[22] AG5 VSS[034] VSS[132] P13
VCCA3GP
L25 VCC1_5_B[23] VCCDMIPLL R29 AG6 VSS[035] VSS[133] P14
M24 VCC1_5_B[24] AH10 VSS[036] VSS[134] P15
L62 603
FB_330ohm+-25%_100mHz_ M25 VCC1_5_B[25] VCC_DMI[1] AE28 +1.25V_RUN AH13 VSS[037] VSS[135] P16
N23 AE29 AH16 P17
1.5A_0.09 ohm DC VCC1_5_B[26] VCC_DMI[2] VSS[038] VSS[136]
1
805 N24 +1.05V_VCCP close to AC23 & AC24 +1.05V_VCCP AH19 P23
BLM21PG331SN1D VCC1_5_B[27] C640 C643 VSS[039] VSS[137]
N25 VCC1_5_B[28] V_CPU_IO[1] AC23 AH2 VSS[040] VSS[138] P28
+1.5V_PCIE_ICH P24 AC24 0.1U 22U AF28 P29
2
VCC1_5_B[29] V_CPU_IO[2] VSS[041] VSS[139]
B P25 VCC1_5_B[30] AH22 VSS[042] VSS[140] R11 B
R24 VCC1_5_B[31] VCC3_3[01] AF29 +3.3V_RUN AH24 VSS[043] VSS[141] R12
1
R25 10 10 C609 C595 C585 AH26 R13
VCC1_5_B[32] VSS[044] VSS[142]
1
R26 AD2 0.1U 0.1U 4.7U AH3 R14

VCC1_5_B[33] VCC3_3[02] VSS[045] VSS[143]
1
+ R27 AH4 R15
2
VCC1_5_B[34] VSS[046] VSS[144]
2
C957 C619 C604 C615 T23 AC8 1206 AH8 R16
220U 22U 22U 2.2U VCC1_5_B[35] VCC3_3[03] C574 C611 VSS[047] VSS[145]
T24 AD8 AJ5 R17
2
VCC1_5_B[36] VCC3_3[04] VSS[048] VSS[146]
VCCP_CORE
T27 AE8 0.1U 0.1U 10 10 10 B11 R18
1
VCC1_5_B[37] VCC3_3[05] VSS[049] VSS[147]
T28 VCC1_5_B[38] VCC3_3[06] AF8 B14 VSS[050] VSS[148] R28
4 10 10 10 T29 B17 R4
VCC1_5_B[39] VSS[051] VSS[149]
U24 VCC1_5_B[40] VCC3_3[07] AA3 10 10 WWAN Noise - ICH improvements805 B2 VSS[052] VSS[150] T12
U25 VCC1_5_B[41] VCC3_3[08] U7 B20 VSS[053] VSS[151] T13
7343 1206 1206 805 V23 V7 +3.3V_RUN B22 T14
VCC1_5_B[42] VCC3_3[09] VSS[054] VSS[152]
2
V24 VCC1_5_B[43] VCC3_3[10] W1 B8 VSS[055] VSS[153] T15
V25 W6 C570 C24 T16
IDE
+1.5V_RUN VCC1_5_B[44] VCC3_3[11] 0.1U VSS[056] VSS[154]

W25 W7 C26 T17
1
VCC1_5_B[45] VCC3_3[12] VSS[057] VSS[155]
1
Y25 VCC1_5_B[46] VCC3_3[13] Y7 C27 VSS[058] VSS[156] T2
C552 C550 C566 C573 C6 U12
VSS[059] VSS[157]
1
+VCCSATPLL AJ6 A8 10 0.1U_NC 0.1U_NC 0.1U_NC 0.1U_NC D12 U13
2
R769 VCCSATAPLL VCC3_3[14] VSS[060] VSS[158]
VCC3_3[15] B15 D15 VSS[061] VSS[159] U14
0 +1.5V_RUN AE7 B18 D18 U15
VCC1_5_A[01] VCC3_3[16] VSS[062] VSS[160]
2
AF7 B4 10 10 10 10 D2 U16
VCC1_5_A[02] VCC3_3[17] VSS[063] VSS[161]
ARX
AG7 B9 C626 C558 C589 D4 U17

2
VCC1_5_A[03] VCC3_3[18] VSS[064] VSS[162]

1
+VCCSATPLL_L AH7 C15 0.1U 0.1U 0.1U E21 U23
1
C576 VCC1_5_A[04] VCC3_3[19] VSS[065] VSS[163]
AJ7 D13 E24 U26
PCI
L84 1U VCC1_5_A[05] VCC3_3[20] VSS[066] VSS[164]

D5 E4 U27
2
10uH VCC3_3[21] 10 10 10 VSS[067] VSS[165]

AC1 VCC1_5_A[06] VCC3_3[22] E10 E9 VSS[068] VSS[166] U3
10uH+-20%_100mA AC2 VCC1_5_A[07] VCC3_3[23] E7
+3.3V_SUS +3.3V_RUN
F15 VSS[069] VSS[167] U5
ATX
10 AC3
AC4
VCC1_5_A[08] VCC3_3[24] F11 Non-iAMT E23
F28
VSS[070] VSS[168] V13
V15
C
+VCCSATPLL VCC1_5_A[09] VSS[071] VSS[169] C
+1.5V_RUN AC5 VCC1_5_A[10] VCCHDA AC12 F29 VSS[072] VSS[170] V28
603 F7 V29
VSS[073] VSS[171]
1
805 AC10 AD11 G1 W2

VCC1_5_A[11] VCCSUSHDA VSS[074] VSS[172]
2
C901 C571 C588 AC9 E2 W26
VCC1_5_A[12] VSS[075] VSS[173]
2
1U 10U 1U J6 TP_VCCSUS1.05_1 C569 G10 W27
2
VCCSUS1_05[1] TP_VCCSUS1.05_2 PAD T50 C563 0.1U VSS[076] VSS[174]

AA5 AF20 G13 Y28
1
VCC1_5_A[13] VCCSUS1_05[2] PAD T73 0.1U VSS[077] VSS[175]
AA6 G19 Y29
1
10 6.3 10 VCC1_5_A[14] TP_VCCSUS1.5_1 VSS[078] VSS[176]
VCCSUS1_5[1] AC16 PAD T70 G23 VSS[079] VSS[177] Y4
G12 10 G25 AB4
VCC1_5_A[15] TP_VCCSUS1.5_2 10 +3.3V_SUS VSS[080] VSS[178]
603 603 603
G17
H7
VCC1_5_A[16] VCCSUS1_5[2] J7 PAD T58 Non-iAMT G26
G27
VSS[081] VSS[179] AB23
AB5
VCC1_5_A[17] VSS[082] VSS[180]
VCCSUS3_3[01] C3 H25 VSS[083] VSS[181] AB6
AC7 VCC1_5_A[18] H28 VSS[084] VSS[182] AD5
1
+1.5V_RUN AD7 AC18 C607 C548 H29 U4
VCC1_5_A[19] VCCSUS3_3[02] 0.1U 0.1U VSS[085] VSS[183]
VCCSUS3_3[03] AC21 H3 VSS[086] VSS[184] W24
D1 AC22 H6
2
VCCUSBPLL VCCSUS3_3[04] VSS[087]
VCCPSUS
VCCSUS3_3[05] AG20 J1 VSS[088] VSS_NCTF[01] A1

+1.5V_RUN F1 VCC1_5_A[20] VCCSUS3_3[06] AH28 J25 VSS[089] VSS_NCTF[02] A2
USB CORE
L6 10 10 J26 A28
VCC1_5_A[21] VSS[090] VSS_NCTF[03]
2
L7 VCC1_5_A[22] VCCSUS3_3[07] P6 J27 VSS[091] VSS_NCTF[04] A29

C545 C540 M6 P7 WWAN Noise - ICH improvements J4 AH1
0.1U 0.1U VCC1_5_A[23] VCCSUS3_3[08] VSS[092] VSS_NCTF[05]
M7 C1 J5 AH29
1
VCC1_5_A[24] VCCSUS3_3[09] VSS[093] VSS_NCTF[06]

VCCSUS3_3[10] N7 K23 VSS[094] VSS_NCTF[07] AJ1
Non-iAMT W23 VCC1_5_A[25] VCCSUS3_3[11] P1 K28 VSS[095] VSS_NCTF[08] AJ2
1
1
10 10 P2 C562 C544 C634 C541 C559 K29 AJ28
TP_VCCSUSLAN1 F17 VCCSUS3_3[12] 0.1U_NC 0.1U_NC 0.1U_NC 0.1U_NC 0.1U VSS[096] VSS_NCTF[09]
Place C625 T68 PAD VCCLAN1_05[1] VCCSUS3_3[13] P3 K3 VSS[097] VSS_NCTF[10] AJ29
VCCPUSB
TP_VCCSUSLAN2 G18
close to A24. Non-iAMT P4 K6 B1
2
2
T67 PAD VCCLAN1_05[2] VCCSUS3_3[14] VSS[098] VSS_NCTF[11]
VCCSUS3_3[15] P5 VSS_NCTF[12] B29
+3.3V_RUN F19 VCCLAN3_3[1] VCCSUS3_3[16] R1
D +1.5V_RUN G20 R3 10 10 10 10 10 D
VCCLAN3_3[2] VCCSUS3_3[17]
2
+1.5V_RUN R5
C606 VCCSUS3_3[18]
A24 VCCGLANPLL VCCSUS3_3[19] R6
0.1U
QUANTA
1
GLAN POWER
A26 G22 TP_VCCCL1.05

VCCGLAN1_5[1] VCCCL1_05 PAD T89
2
+1.5V_PCIE_ICH A27
C625 10 VCCGLAN1_5[2] +VCCCL1_5
B26 VCCGLAN1_5[3] VCCCL1_5 A22
COMPUTER
2
0.1U B27 C927 PC187

1
VCCGLAN1_5[4] 0.1U_NC Title

B28 VCCGLAN1_5[5] VCCCL3_3[1] F20 +3.3V_RUN
1
C631 G21 1U_NC ICH8-M (POWER,GND)

1
10 4.7U VCCCL3_3[2]
B25 VCCGLAN3_3 Non-iAMT Size Document Number Rev
2
10 10 GM3 2B
+3.3V_RUN
6.3 Date: Monday, March 24, 2008 Sheet 14 of 62
1 2 3 4 5 603 6 7 8
1 2 3 4 5 6 7 8
MASTER SLAVE
+1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS
DDR_A_DM[0..7] 7
DDR_A_D[0..63] 7 DDR_B_DM[0..7] 7
+V_DDR_MCH_REF +V_DDR_MCH_REF
DDR_A_DQS[0..7] 7 DDR_B_D[0..63] 7
DDR_A_DQS#[0..7] 7 DDR_B_DQS[0..7] 7
DDR_A_MA[0..13] 7,16 DDR_B_DQS#[0..7] 7
JDIM1 JDIM2
DDR_B_MA[0..13] 7,16
1 VREF VSS46 2 1 VREF VSS46 2
A DDR_A_D4 +V_DDR_MCH_REF DDR_B_D0 A
3 VSS47 DQ4 4 3 VSS47 DQ4 4
DDR_A_D6 5 6 DDR_A_D0 DDR_B_D5 5 6 DDR_B_D1 +V_DDR_MCH_REF
DDR_A_D5 DQ0 DQ5 DDR_B_D4 DQ0 DQ5
7 DQ1 VSS15 8 7 DQ1 VSS15 8
9 10 DDR_A_DM0 9 10 DDR_B_DM0
DDR_A_DQS#0 VSS37 DM0 DDR_B_DQS#0 VSS37 DM0
11 DQS#0 VSS5 12 11 DQS#0 VSS5 12
1
DDR_A_DQS0 13 14 DDR_A_D7 DDR_B_DQS0 13 14 DDR_B_D7
DQS0 DQ6 DQS0 DQ6
1
15 16 DDR_A_D1 C510 C509 15 16 DDR_B_D6
DDR_A_D3 VSS48 DQ7 0.1U_10V 2.2U_6.3V DDR_B_D2 VSS48 DQ7 C471 C467
17 18 17 18
2
DDR_A_D2 DQ2 VSS16 DDR_A_D13 DDR_B_D3 DQ2 VSS16 DDR_B_D12 0.1U_10V 2.2U_6.3V
19 20 19 20
2
DQ3 DQ12 DDR_A_D12 DQ3 DQ12 DDR_B_D13
21 VSS38 DQ13 22 21 VSS38 DQ13 22
DDR_A_D9 23 24 DDR_B_D8 23 24
DDR_A_D8 DQ8 VSS17 DDR_A_DM1 DDR_B_D9 DQ8 VSS17 DDR_B_DM1
25 DQ9 DM1 26 25 DQ9 DM1 26
27 VSS49 VSS53 28 27 VSS49 VSS53 28
DDR_A_DQS#1 29 30 DDR_B_DQS#1 29 30
DQS#1 CK0 M_CLK_DDR0 6 DQS#1 CK0 M_CLK_DDR3 6
DDR_A_DQS1 31 32 DDR_B_DQS1 31 32
DQS1 CK0# M_CLK_DDR#0 6 DQS1 CK0# M_CLK_DDR#3 6
33 VSS39 VSS41 34 33 VSS39 VSS41 34
DDR_A_D11 35 36 DDR_A_D15 DDR_B_D11 35 36 DDR_B_D14
DDR_A_D14 DQ10 DQ14 DDR_A_D10 DDR_B_D10 DQ10 DQ14 DDR_B_D15
37 DQ11 DQ15 38 37 DQ11 DQ15 38
39 VSS50 VSS54 40 39 VSS50 VSS54 40
PC4800 DDR2 SDRAM
41 VSS18 VSS20 42 41 VSS18 VSS20 42
45 DQ17 DQ21 46 45 DQ17 DQ21 46
47 VSS1 VSS6 48 47 VSS1 VSS6 48
PC4800 DDR2 SDRAM

DDR_A_DQS#2 49 50 PM_EXTTS#0 PM_EXTTS#0 6 DDR_B_DQS#2 49 50 PM_EXTTS#1 PM_EXTTS#1 6
DDR_A_DQS2 DQS#2 NC3 DDR_A_DM2 DDR_B_DQS2 DQS#2 NC3 DDR_B_DM2
SO-DIMM (200P)
51 DQS2 DM2 52 51 DQS2 DM2 52

53 VSS19 VSS21 54 53 VSS19 VSS21 54
DDR_A_D23 55 56 DDR_A_D18 DDR_B_D22 55 56 DDR_B_D18 +1.8V_SUS Place these Caps near So-Dimm1.
57 DQ19 DQ23 58 57 DQ19 DQ23 58
SO-DIMM (200P)
59 VSS22 VSS24 60 59 VSS22 VSS24 60
63 DQ25 DQ29 64 63 DQ25 DQ29 64
1
B C892 C875 C891 C889 C893 B
65 VSS23 VSS25 66 65 VSS23 VSS25 66
DDR_A_DM3 67 68 DDR_A_DQS#3 DDR_B_DM3 67 68 DDR_B_DQS#3 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V
DM3 DQS#3 DDR_A_DQS3 DM3 DQS#3 DDR_B_DQS3
69 70 69 70
2
NC4 DQS3 NC4 DQS3
71 VSS9 VSS10 72 71 VSS9 VSS10 72
75 DQ27 DQ31 76 75 DQ27 DQ31 76
77 VSS4 VSS8 78 77 VSS4 VSS8 78
79 80 79 80 +1.8V_SUS
6,16 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 6,16 6,16 DDR_CKE3_DIMMB CKE0 CKE1 DDR_CKE4_DIMMB 6,16
81 VDD7 VDD8 82 81 VDD7 VDD8 82
83 NC1 A15 84 83 NC1 A15 84 Place these Caps near So-Dimm2.
DDR_A_BS2 85 86 DDR_B_BS2 85 86
7,16 DDR_A_BS2 A16_BA2 A14 DDR_A_MA14 6,16 7,16 DDR_B_BS2 A16_BA2 A14 DDR_B_MA14 6,16
87 VDD9 VDD11 88 87 VDD9 VDD11 88
DDR_A_MA12 89 90 DDR_A_MA11 DDR_B_MA12 89 90 DDR_B_MA11
A12 A11 A12 A11
1
DDR_A_MA9 91 92 DDR_A_MA7 DDR_B_MA9 91 92 DDR_B_MA7 C870 C873
DDR_A_MA8 A9 A7 DDR_A_MA6 DDR_B_MA8 A9 A7 DDR_B_MA6 2.2U_6.3V 2.2U_6.3V C872 C874 C871
93 A8 A6 94 93 A8 A6 94
95 96 95 96 2.2U_6.3V 2.2U_6.3V 2.2U_6.3V
2
DDR_A_MA5 VDD5 VDD4 DDR_A_MA4 DDR_B_MA5 VDD5 VDD4 DDR_B_MA4
97 A5 A4 98 97 A5 A4 98
DDR_A_MA3 99 100 DDR_A_MA2 DDR_B_MA3 99 100 DDR_B_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0 DDR_B_MA1 A3 A2 DDR_B_MA0
101 A1 A0 102 101 A1 A0 102
103 VDD10 VDD12 104 103 VDD10 VDD12 104
DDR_A_MA10 105 106 DDR_A_BS1 DDR_B_MA10 105 106 DDR_B_BS1
A10/AP BA1 DDR_A_BS1 7,16 A10/AP BA1 DDR_B_BS1 7,16
DDR_A_BS0 107 108 DDR_A_RAS# DDR_B_BS0 107 108 DDR_B_RAS# +1.8V_SUS
7,16 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 7,16 7,16 DDR_B_BS0 BA0 RAS# DDR_B_RAS# 7,16
DDR_A_WE# 109 110 DDR_B_WE# 109 110 Place these Caps near So-Dimm1.
7,16 DDR_A_WE# WE# S0# DDR_CS0_DIMMA# 6,16 7,16 DDR_B_WE# WE# S0# DDR_CS2_DIMMB# 6,16
111 VDD2 VDD1 112 111 VDD2 VDD1 112
DDR_A_CAS# 113 114 M_ODT0 DDR_B_CAS# 113 114 M_ODT2
7,16 DDR_A_CAS# CAS# ODT0 M_ODT0 6,16 7,16 DDR_B_CAS# CAS# ODT0 M_ODT2 6,16
115 116 DDR_A_MA13 115 116 DDR_B_MA13
6,16 DDR_CS1_DIMMA# S1# A13 6,16 DDR_CS3_DIMMB# S1# A13
1
117 VDD3 VDD6 118 117 VDD3 VDD6 118
M_ODT1 119 120 M_ODT3 119 120 C501 C888 C498 C500
6,16 M_ODT1 ODT1 NC2 6,16 M_ODT3 ODT1 NC2
121 122 121 122 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V
2
DDR_A_D37 VSS11 VSS12 DDR_A_D32 DDR_B_D37 VSS11 VSS12 DDR_B_D32
123 DQ32 DQ36 124 123 DQ32 DQ36 124
DQ33 DQ37 DQ33 DQ37
127 VSS26 VSS28 128 127 VSS26 VSS28 128
C DDR_A_DQS#4 DDR_A_DM4 DDR_B_DQS#4 DDR_B_DM4 +1.8V_SUS C
129 DQS#4 DM4 130 129 DQS#4 DM4 130
DDR_A_DQS4 131 132 DDR_B_DQS4 131 132 Place these Caps near So-Dimm2.
DQS4 VSS42 DDR_A_D38 DQS4 VSS42 DDR_B_D39
133 VSS2 DQ38 134 133 VSS2 DQ38 134
DDR_A_D39 DQ34 DQ39 DDR_B_D35 DQ34 DQ39
137 DQ35 VSS55 138 137 DQ35 VSS55 138
1
139 140 DDR_A_D44 139 140 DDR_B_D45
DDR_A_D40 VSS27 DQ44 DDR_A_D45 DDR_B_D41 VSS27 DQ44 DDR_B_D44 C497 C890 C496 C499
141 DQ40 DQ45 142 141 DQ40 DQ45 142
DDR_A_D41 143 144 DDR_B_D40 143 144 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V
2
DQ41 VSS43 DDR_A_DQS#5 DQ41 VSS43 DDR_B_DQS#5
145 VSS29 DQS#5 146 145 VSS29 DQS#5 146
DDR_A_DM5 147 148 DDR_A_DQS5 DDR_B_DM5 147 148 DDR_B_DQS5
DM5 DQS5 DM5 DQS5
149 VSS51 VSS56 150 149 VSS51 VSS56 150
153 DQ43 DQ47 154 153 DQ43 DQ47 154
155 VSS40 VSS44 156 155 VSS40 VSS44 156
159 DQ49 DQ53 160 159 DQ49 DQ53 160
161 VSS52 VSS57 162 161 VSS52 VSS57 162
163 NCTEST CK1 164 M_CLK_DDR1 6 163 NCTEST CK1 164 M_CLK_DDR4 6
165 VSS30 CK1# 166 M_CLK_DDR#1 6 165 VSS30 CK1# 166 M_CLK_DDR#4 6
DDR_A_DQS#6 167 168 DDR_B_DQS#6 167 168 +3.3V_RUN
DDR_A_DQS6 DQS#6 VSS45 DDR_A_DM6 DDR_B_DQS6 DQS#6 VSS45 DDR_B_DM6
169 DQS6 DM6 170 169 DQS6 DM6 170
171 VSS31 VSS32 172 171 VSS31 VSS32 172
DDR_A_D50 173 174 DDR_A_D54 +3.3V_RUN DDR_B_D54 173 174 DDR_B_D51
DQ50 DQ54 DQ50 DQ54
1
DQ51 DQ55 DQ51 DQ55 C523 C520
177 VSS33 VSS35 178 177 VSS33 VSS35 178
DDR_A_D60 179 180 DDR_A_D57 DDR_B_D56 179 180 DDR_B_D60 2.2U_6.3V 0.1U_10V
2
DQ56 DQ60 DQ56 DQ60
1

DQ57 DQ61 C504 C508 DQ57 DQ61
183 VSS3 VSS7 184 183 VSS3 VSS7 184
DDR_A_DM7 185 186 DDR_A_DQS#7 2.2U_6.3V 0.1U_10V DDR_B_DM7 185 186 DDR_B_DQS#7
2
DM7 DQS#7 DDR_A_DQS7 DM7 DQS#7 DDR_B_DQS7

187 VSS34 DQS7 188 187 VSS34 DQS7 188
DDR_A_D63 189 190 DDR_B_D58 189 190
DDR_A_D59 DQ58 VSS36 DDR_A_D62 DDR_B_D63 DQ58 VSS36 DDR_B_D62
191 DQ59 DQ62 192 191 DQ59 DQ62 192
D DDR_A_D58 DDR_B_D59 D
193 VSS14 DQ63 194 193 VSS14 DQ63 194
MEM_SDATA 195 196 MEM_SDATA 195 196 +3.3V_RUN
13 MEM_SDATA SDA VSS13 SDA VSS13
MEM_SCLK 197 198 MEM_SCLK 197 198
13 MEM_SCLK SCL SA0 SCL SA0
199 200 199 200 R411 2 1 10K
+3.3V_RUN VDD(SPD) SA1 +3.3V_RUN VDD(SPD) SA1
QUANTA
2
TYC_1-1734074-1 SMbus address A4 TYC_2-1734073-2

SMbus address A0 R392 R390 R413
10K 10K 10K
CLOCK 0,1
H 5.2
CLOCK 2,3
H 9.2 Title
COMPUTER
CKE 0,1 CKE 2,3
1
DDR2_SO-DIMM (200P) X 2

GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+0.9V_DDR_VTT Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.
A A
1
C529 C512 C468 C494 C511 C527 C514 C526 C531 C528 C493 C491 C517
0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V
2
+0.9V_DDR_VTT
1
C469 C489 C490 C515 C513 C465 C466 C464 C470 C472 C516 C530 C492
0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V 0.1U_10V
2
2
B B
+0.9V_DDR_VTT
7,15 DDR_A_MA[0..13] DDR_B_MA[0..13] 7,15
RP25 RP36
DDR_A_MA11 2 1 1 2 DDR_B_MA6
4P2R-S-56 4P2R-S-56
RP26 RP35
4P2R-S-56 4P2R-S-56
RP28 RP38
7,15 DDR_A_BS1 DDR_A_BS1 2 1 1 2 DDR_B_BS1
DDR_B_BS1 7,15
7,15 DDR_A_RAS# DDR_A_RAS# 4 3 3 4 DDR_B_RAS#
DDR_B_RAS# 7,15
4P2R-S-56 4P2R-S-56
RP29 RP39
DDR_A_MA13 2 1 1 2 M_ODT2
M_ODT2 6,15
M_ODT0 4 3 3 4 DDR_B_MA13
6,15 M_ODT0
4P2R-S-56 4P2R-S-56
RP13 RP34
7,15 DDR_A_BS2 DDR_A_BS2 2 1 1 2 DDR_B_MA3
4P2R-S-56 4P2R-S-56
RP12 RP32
C C
Please these resistor DDR_A_MA9 2 1 1 2 DDR_B_MA9 Please these resistor
closely DIMMA,all DDR_A_MA8 4 3 3 4 DDR_B_MA8 closely DIMMB,all
trace length<750 mil. 4P2R-S-56 4P2R-S-56 trace length<750 mil.
RP9 RP33
4P2R-S-56 4P2R-S-56
RP10 RP30
DDR_A_BS0 2 1 1 2 DDR_B_BS0
7,15 DDR_A_BS0 DDR_B_BS0 7,15
4P2R-S-56 4P2R-S-56
RP11 RP31
DDR_A_CAS# 2 1 1 2 DDR_B_CAS#
7,15 DDR_A_CAS# DDR_B_CAS# 7,15
DDR_A_WE# 4 3 3 4 DDR_B_WE#
7,15 DDR_A_WE# DDR_B_WE# 7,15
4P2R-S-56 4P2R-S-56
RP27 RP37
T194 DDR_A_MA2 DDR_B_MA4
2 1 1 2
PAD DDR_A_MA0 4 3 3 4 DDR_B_MA0
4P2R-S-56 4P2R-S-56
R388 1 2 56 R406 2 1 56
6,15 M_ODT1 M_ODT3 6,15
DDR_A_MA1 R386 1 2 56 R403 2 1 56
DDR_B_BS2 7,15
R402 1 2 56 R417 2 1 56
6,15 DDR_CS0_DIMMA# DDR_CS2_DIMMB# 6,15
R387 1 2 56 R405 2 1 56
6,15 DDR_CS1_DIMMA# DDR_CS3_DIMMB# 6,15
R389 1 2 56 R415 2 1 56
6,15 DDR_CKE0_DIMMA DDR_CKE4_DIMMB 6,15
D R401 1 2 56 R404 2 1 56 D
6,15 DDR_CKE1_DIMMA DDR_CKE3_DIMMB 6,15
R400 1 2 56 R416 2 1 56
6,15 DDR_A_MA14 DDR_B_MA14 6,15
QUANTA
Title
COMPUTER
DDR2 RES. ARRAY

GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Add capacitor pads for improving WWAN.
C457 1 2 27P CLK_ICH_48M U19

C440 1 2 27P_NC CLK_ICH_14M
C431 1 50 2 27P_NC CLK_PCI_8512
C432 1 50 2 27P_NC CLK_PCI_PCCARD +CK_VDD_PCI 9 61 CPU_BCLK 4 3 RP5 0
VDD_PCI CPU-0 CLK_CPU_BCLK 3
C439 1 50 2 27P_NC CLK_PCI_ICH 4 60 CPU_BCLK# 2 1
VDD_REF CPU-0# CLK_CPU_BCLK# 3
50 +CK_VDD_PLL3 23
+CK_VDD_48 VDD_PLL3 MCH_BCLK
50 16 VDD_48 CPU-1 58 4 3 RP7 0
CLK_MCH_BCLK 5
+CK_VDD_SRC 46 57 MCH_BCLK# 2 1
VDD_SRC CPU-1# CLK_MCH_BCLK# 5
62
A
+CK_VDD_MAIN 19
VDD_CPU
CK505 SRC-8/CPU_ITP 54
53
CPU_ITP
CPU_ITP#
4
2
3 RP17
1
0
CLK_PCIE_MINI1 34
CLK_PCIE_MINI1# 34
A
VDD_IO SRC-8#/CPU_ITP#
Y2 27
CLK_XTAL_IN 1 2 CLK_XTAL_OUT 33
VDD_IO
VDD_IO
QFN64
43 20 DOT96_SSC 2 1 RP4 0_DIS
VDD_IO SRC-0/DOT96 CLK_PCIE_VGA 18
14.318MHZ 52 21 DOT96_SSC# 4 3
VDD_IO SRC-0#/DOT96# CLK_PCIE_VGA# 18
2
2
C437 C443
33P 33P
56 VDD_IO
24 27M_NSS 2 1 RP8 0_DIS
to ATI VGA
SRC-1/SE1 CLK_VGA_27M_NSS 19
15 25 27M_SS 4 3 CLK_VGA_27M_SS 19
1
1
GND SRC-1#/SE2
14.318MHz 18
22
GND
28 PCIE_SATA
13 2 1 RP16 0
GND SRC-2/SATA CLK_PCIE_SATA 11
50 50 26 29 PCIE_SATA# 4 3
GND SRC-2#/SATA# CLK_PCIE_SATA# 11
30 GND
36 31 PCIE_MINI3 2 1 RP18 0
GND CR#_C/SRC-3 CLK_PCIE_MINI3 33
SATA_CLKREQ# R365 475 49 32 PCIE_MINI3# 4 3
13 SATA_CLKREQ# GND CR#_D/SRC-3# CLK_PCIE_MINI3# 33
CLK_3GPLLREQ# R364 1 2 475/F 59 +3.3V_RUN
6 CLK_3GPLLREQ# GND
1 34 MCH_3GPLL 2 1 RP20 0
GND SRC-4 CLK_MCH_3GPLL 6
35 MCH_3GPLL# 4 3
SRC-4# CLK_MCH_3GPLL# 6
CLK_LPC_DEBUG R363 1 2 22_NC SATA_CLKREQ#_C 8
33 CLK_LPC_DEBUG CR#_A/PCI-0
CLK_PCI_PCCARD R354 2 1 33 CLK_3GPLLREQ#_C 10 45 H_STP_PCI# R397 2 1 10K
28 CLK_PCI_PCCARD CR_B/PCI-1 PCI_STOP#/SRC-5 H_STP_PCI# 13
PCI_PCCARD 11 44 H_STP_CPU# R396 2 1 10K
TME/PCI-2 CPU_STOP#/SRC5-5# H_STP_CPU# 13
CLK_PCI_8512 R353 2 1 33 PCI_SIO 12
31 CLK_PCI_8512 SRC5_EN/PCI-3
27M_SEL 13 48 PCIE_EXPCARD 4 3 RP24 0
27M_SEL/PCI-4 SRC-6 CLK_PCIE_EXPCARD 30
CLK_PCI_ICH R350 2 1 33 PCI_ICH PCIE_EXPCARD#
12 CLK_PCI_ICH 14 ITP_EN/PCIF-5# SRC-6# 47 2 1 CLK_PCIE_EXPCARD# 30 Silego need pull up
13 CLK_ICH_48M
CLK_ICH_48M R375 2 1 33 CR#_F/SRC-7 51 MINI1CLK_REQ#_C R394 1 2 475/F MINI1CLK_REQ#
MINI1CLK_REQ# 34 but other?
50 CARD_CLK_REQ#_C R395 1 2 475/F CARD_CLK_REQ#
CR#_E/SRC-7# CARD_CLK_REQ# 30
1 2 R372 1 2 8.2K FSA 17
3,6 CPU_MCH_BSEL0 FSA/USB48
L55 BLM18SG260 R374 1 2 8.2K FSB 64 37 PCIE_MINI2 2 1RP21 0
3,6 CPU_MCH_BSEL1 FSB/TEST_MODE SRC-9 CLK_PCIE_MINI2 33
B R367 1 2 8.2K FSC 5 38 PCIE_MINI2# 4 3 B
3,6 CPU_MCH_BSEL2 FSC/TEST_SEL/REF SRC-9# CLK_PCIE_MINI2# 33
CLK_ICH_14M R366 2 1 33 55 41 PCIE_ICH 2 1 RP23 0
13 CLK_ICH_14M RESET# SRC-10 CLK_PCIE_ICH 12
63 42 PCIE_ICH# 4 3
13 CLK_PWRGD CK_PWRGD/PD# SRC-10# CLK_PCIE_ICH# 12
CLK_XTAL_OUT 2 40 PCIE_LOM 4 3 RP22 0
XOUT CR#_H/SRC-11 CLK_PCIE_LOM 42
CLK_XTAL_IN PCIE_LOM#
CLK_LPC_DEBUG FOR DEBUG 3 XIN CR#_G/SRC-11# 39 2 1 CLK_PCIE_LOM# 42
NEED POP RESISTOR CLK_SDATA 6 SDATA
CLK_SCLK 7 65
SCLK GND
+3.3V_RUN
SLG8SP513V
CLK_3GPLLREQ# R355 1 10K
POP RESISTOR FOR UMA to MCH DPLL_REF_CLK SATA_CLKREQ# R356
2
2 1 10K
CARD_CLK_REQ# R398 2 1 10K
DOT96_SSC 4 3 RP6 0_UMA MINI1CLK_REQ# R399 2 1 10K
MCH_DREFCLK 6
DOT96_SSC# 2 1 PCI_PCCARD R343 1 210K_NC
MCH_DREFCLK# 6
+3.3V_RUN to MCH DPLL_REF_SSCLK

27M_SS PCI_SIO R352 1 210K_NC
L58 BLM21PG600SN1D UMA without iAMT 27M_NSS
2
4
1
3
DREF_SSCLK# 6
PCI_ICH R341 1 210K_NC
RP14 0_UMA DREF_SSCLK 6
+CK_VDD_MAIN
13 +3.3V_RUN
805
1
120 ohms@100Mhz C487 CPU_ITP 2 1 RP15 0_NC

CLK_CPU_ITP 3
C459 C476 C486 C462 C473 C485 CPU_ITP# 4 3 FSC FSB FSA CPU SRC PCI
CLK_CPU_ITP# 3
2
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 10U_NC
2
R339
C POP for ITP use 10K_NC
1 0 1 100 100 33 C
10 10 10 10 10 10 6.3 0 0 1 133 100 33
1
R359 2.2 +3.3V_RUN 0 1 1 166 100 33
L51 1 2 +CK_VDD_PCI Non-iAMT PCI_ICH
BLM21PG600SN1D
SMbus address D2 0 1 0 200 100 33
1
805
4
2
2
120 ohms@100Mhz C446 0 0 0 266 100 33
0.1U These are for R340
2
backdrive issue. RP3 10K_NC 1 0 0 333 100 33

2.2KX2
R391 2.2 10 1 1 0 400 100 33
1
2
1 2 +CK_VDD_PLL3
3
1
Q40 1 1 1 RSVD 100 33

1
3 1 CLK_SDATA
26,31,39 SMBDAT1
C461
+3.3V_RUN
0.1U 27M_SEL
2
2N7002W-7-F
10 27M_SEL PIN20 PIN21 PIN24 PIN25
2
R358 2.2
1 2 +CK_VDD_48 R351 (PIN13)
+3.3V_RUN
10K_DIS 96/ 96/
0=UMA DOT96T DOT96C 100M_T 100M_C
1
1
C448 C447
0.1U 4.7U 27M_SEL 1 = Disc.
2
GRFX down SRCT0 SRCC0 27Mout 27MSSout
2
D 10 6.3 D
R342
R377 2.2 10K_UMA
2
1 2 +CK_VDD_SRC 603
Q39
1
QUANTA
1
3 1 CLK_SCLK
26,31,39 SMBCLK1
C460
0.1U COMPUTER
2
2N7002W-7-F Title
CLOCK GENERATOR
10
GM3 2B

1 2 3 4 5 6 7 8
5 4 3 2 1
6 PCIE_MTX_GRX_P[0..15]
6 PCIE_MTX_GRX_N[0..15] 6 PCIE_MRX_GTX_P[0..15]
U43A 6 PCIE_MRX_GTX_N[0..15]
PART 1 OF 7
C213 0.1U_DIS
10
PCIE_MTX_GRX_P0 AK33 AG31 PCIE_MRX_GTX_C_P0 PCIE_MRX_GTX_P0 PCIE_MRX_GTX_C_P0
PCIE_MTX_GRX_N0 PCIE_RX0P PCIE_TX0P PCIE_MRX_GTX_C_N0
AJ33 PCIE_RX0N PCIE_TX0N AG30 C231 0.1U_DIS
10
PCIE_MRX_GTX_P1 PCIE_MRX_GTX_C_P1
C233 0.1U_DIS
10
PCIE_MTX_GRX_P1 AJ35 AF31 PCIE_MRX_GTX_C_P1 PCIE_MRX_GTX_P2 PCIE_MRX_GTX_C_P2
AJ34 PCIE_RX1N P PCIE_TX1N AF30 C211 0.1U_DIS
10
C
C230 0.1U_DIS
10
PCIE_MTX_GRX_P2 AH35 I AF28 PCIE_MRX_GTX_C_P2 PCIE_MRX_GTX_P4 PCIE_MRX_GTX_C_P4
D AH34 AF27 C210 0.1U_DIS
10 D
PCIE_RX2N - PCIE_TX2N PCIE_MRX_GTX_P5 PCIE_MRX_GTX_C_P5
E C208 0.1U_DIS
10
PCIE_MTX_GRX_P3 AG35 AD31 PCIE_MRX_GTX_C_P3 PCIE_MRX_GTX_P6 PCIE_MRX_GTX_C_P6
PCIE_MTX_GRX_N3 AG34
PCIE_RX3P X PCIE_TX3P
AD30 PCIE_MRX_GTX_C_N3
PCIE_RX3N PCIE_TX3N C227 0.1U_DIS
10
P PCIE_MRX_GTX_P7 PCIE_MRX_GTX_C_P7
PCIE_MTX_GRX_P4 AF33
R AD28 PCIE_MRX_GTX_C_P4 PCIE_MRX_GTX_P8
C206 0.1U_DIS
10
PCIE_MRX_GTX_C_P8
PCIE_MTX_GRX_N4 PCIE_RX4P E PCIE_TX4P PCIE_MRX_GTX_C_N4
AE33 PCIE_RX4N PCIE_TX4N AD27 C226 0.1U_DIS
10
S
C224 0.1U_DIS
10
PCIE_MTX_GRX_P5 AE35 PCIE_RX5P
S PCIE_TX5P AB31 PCIE_MRX_GTX_C_P5 PCIE_MRX_GTX_P10 PCIE_MRX_GTX_C_P10
PCIE_MTX_GRX_N5 AE34 AB30 PCIE_MRX_GTX_C_N5
PCIE_RX5N PCIE_TX5N C204 0.1U_DIS
10
I C220 0.1U_DIS
10
PCIE_MTX_GRX_P6 AD35 N AB28 PCIE_MRX_GTX_C_P6 PCIE_MRX_GTX_P12 PCIE_MRX_GTX_C_P12
AD34 PCIE_RX6N PCIE_TX6N AB27 C222 0.1U_DIS
10
T PCIE_MRX_GTX_P13 PCIE_MRX_GTX_C_P13
E C200 0.1U_DIS
10
PCIE_MTX_GRX_P7 AC35 AA31 PCIE_MRX_GTX_C_P7 PCIE_MRX_GTX_P14 PCIE_MRX_GTX_C_P14
PCIE_MTX_GRX_N7 PCIE_RX7P R PCIE_TX7P PCIE_MRX_GTX_C_N7
AC34 PCIE_RX7N PCIE_TX7N AA30 C201 0.1U_DIS
10
F PCIE_MRX_GTX_P15 PCIE_MRX_GTX_C_P15
A C214 0.1U_DIS
10
PCIE_MTX_GRX_P8 AB33 AA28 PCIE_MRX_GTX_C_P8 PCIE_MRX_GTX_N0 PCIE_MRX_GTX_C_N0
AA33 PCIE_RX8N C PCIE_TX8N AA27 C232 0.1U_DIS
10
PCIE_MRX_GTX_N1 PCIE_MRX_GTX_C_N1
E
C234 0.1U_DIS
10
PCIE_MTX_GRX_P9 AA35 W31 PCIE_MRX_GTX_C_P9 PCIE_MRX_GTX_N2 PCIE_MRX_GTX_C_N2
AA34 PCIE_RX9N PCIE_TX9N W30 C212 0.1U_DIS
10
C229 0.1U_DIS
10
PCIE_MTX_GRX_P10 Y35 W28 PCIE_MRX_GTX_C_P10 PCIE_MRX_GTX_N4 PCIE_MRX_GTX_C_N4
Y34 PCIE_RX10N PCIE_TX10N W27 C209 0.1U_DIS
10
C207 0.1U_DIS
10
PCIE_MTX_GRX_P11 W35 V31 PCIE_MRX_GTX_C_P11 PCIE_MRX_GTX_N6 PCIE_MRX_GTX_C_N6
W34 PCIE_RX11N PCIE_TX11N V30 C228 0.1U_DIS
10
C PCIE_MRX_GTX_N7 PCIE_MRX_GTX_C_N7 C
C205 0.1U_DIS
10
PCIE_MTX_GRX_P12 V33 V28 PCIE_MRX_GTX_C_P12 PCIE_MRX_GTX_N8 PCIE_MRX_GTX_C_N8
U33 PCIE_RX12N PCIE_TX12N V27 C225 0.1U_DIS
10
C223 0.1U_DIS
10
PCIE_MTX_GRX_P13 U35 U31 PCIE_MRX_GTX_C_P13 PCIE_MRX_GTX_N10 PCIE_MRX_GTX_C_N10
U34 PCIE_RX13N PCIE_TX13N U30 C203 0.1U_DIS
10
C219 0.1U_DIS
10
PCIE_MTX_GRX_P14 T35 U28 PCIE_MRX_GTX_C_P14 PCIE_MRX_GTX_N12 PCIE_MRX_GTX_C_N12
T34 PCIE_RX14N PCIE_TX14N U27 C221 0.1U_DIS
10
C199 0.1U_DIS
10
PCIE_MTX_GRX_P15 R35 R31 PCIE_MRX_GTX_C_P15 PCIE_MRX_GTX_N14 PCIE_MRX_GTX_C_N14
R34 PCIE_RX15N PCIE_TX15N R30 C202 0.1U_DIS
10
Clock Calibration
AJ31 402
17 CLK_PCIE_VGA PCIE_REFCLKP
AJ30 AG26 R131 2K/F_DIS +PCIE_VDDC
17 CLK_PCIE_VGA# PCIE_REFCLKN PCIE_CALRN
SM Bus AJ27
PCIE_CALRP
AK35 NC_SMB_DATA
AK34 NC_SMBCLK NC_DRAM_0 AF3
402 AG9
R718 0_DIS NC_DRAM_1 R126
13 PLTRST_DELAY# AM32 PERSTB NC_AC_BATT AK29
AK14 1.27K_DIS
NC_FAN_TACH 402
M86-LP_DIS
B B
A A
QUANTA
Title
COMPUTER
VGA-M82-S (PCIe)

GM3 2B

5 4 3 2 1
5 4 3 2 1
+3.3V_DELAY
MEMORY APERTURE SIZE SELECT
8/15: The strap on VIP[3] is for enabling HD Audio on M86.
MEMORY CFG3 CFG2 CFG1 CFG0
GPIO9 GPIO13 GPIO12 GPIO11 U43B
SIZE
PART 2 OF 7
128MB X 0 0 0 R104 10K_NC VIP_0 AM12 AN9

VIP_0 TXCAM_DPA0P ATI_HDMI_CLK- 25
R103 10K_NC VIP_1 AL12 AN10
VIP_1 TXCAP_DPA0N ATI_HDMI_CLK+ 25
R110 10K_NC VIP_2 AJ12
R111 10K_DIS VIP_3 VIP_2 VIP / I2C
256MB X 0 0 1 AH12 VIP_3 TX0M_DPA1P AR10 ATI_HDMI_TX0-_R 25
R93 10K_NC VIP_4 AM10 AP10
R98
R97
10K_NC
10K_NC
VIP_5
VIP_6
AL10
VIP_4
VIP_5
TX0P_DPA1N ATI_HDMI_TX0+_R 25
HDMI CONN
64MB X 0 1 0 AJ10 VIP_6 TX1M_DPA2P AR11 ATI_HDMI_TX1-_R 25
R94 10K_NC VIP_7 AH10 AP11
VIP_7 TX1P_DPA2N ATI_HDMI_TX1+_R 25
512MB X 1 0 0 R88 10K_NC VHAD0 AM9 AR12
VHAD_0 TX2M_DPA3P ATI_HDMI_TX2-_R 25
D AL9 VHAD_1 TX2P_DPA3N AP12 ATI_HDMI_TX2+_R 25 D
AJ9 VPHCTL TXCBM_DPB0P AR14

TXCBP_DPB0N AP14
RAM_ RAM_ RAM_ RAM_ AL7 VPCLK0
Memory Straps TYPE_CFG3 TYPE_CFG2 TYPE_CFG1 TYPE_CFG0 AK7 VIPCLK TX3M_DPB1P AR15
TX3P_DPB1N AP15
400 MHz 256MB(16M*16) Hynix 1 1 1 1 R79 10K_NC PSYNC AM7 PSYNC
TX4M_DPB2P AR16
400 MHz 256MB(16M*16) Qimonda 1 1 1 0 R74 10K_NC DVALID AJ7 AP16
DVALID TX4P_DPB2N
500 MHz 256MB(16M*16) Hynix 1 1 0 1 AK6 SDA TX5M_DPB3P AR17
AM6 SCL TX5P_DPB3N AP17
500 MHz 256MB(16M*16) Qimonda 1 1 0 0
AN8 DVPCNTL__MVP_0 DPA_PVDD AM14 +TPVDD
500 MHz 256MB(16M*16) Samsung 1 0 1 1 AP8 DVPCNTL__MVP_1 DPA_PVSS AL14
AG1 DVPCNTL_0
AH3 INTEGRATED AH17
DVPCNTL_1 TMDS/DP DPB_PVDD +3.3V_DELAY
AH2 DVPCNTL_2 DPB_PVSS AG17
+3.3V_DELAY AH1 DVPCLK
AJ3 DVPDATA_0 DPB_VDDR_1 AN19 +DPB_VDDR
AJ2 DVPDATA_1 MULTI_GFX DPB_VDDR_2 AN20
R644 10K_DIS RAM_CFG0 AJ1 AP19
R648 10K_NC RAM_CFG1 DVPDATA_2 EXTERNAL DPA_VDDR_3 +DPA_VDDR
AK2 DVPDATA_3 TMDS DPA_VDDR_4 AR19
R659 10K_NC RAM_CFG2 AK1
R54 10K_NC RAM_CFG3 VRAM SIZE AL3
DVPDATA_4
DVPDATA_5 DPB_VSSR_1 AN18
AL2 AP18 R135
DVPDATA_6 DPB_VSSR_2 10K_DIS
AL1 DVPDATA_7 DPB_VSSR_3 AR18
+1.8V_RUN AM3 AN16 R90
DVPDATA_8 DPB_VSSR_4 10K_DIS
AM2 DVPDATA_9 DPB_VSSR_6 AN17
3
AN2 AN15 Q83
DVPDATA_10 DPA_VSSR_5
AP3 DVPDATA_11 DPA_VSSR_7 AN11 2
R667 10K_DIS RAM_TYPE_CFG0 AR3 AN12
DVPDATA_12 DPA_VSSR_8
3
R82 10K_NC RAM_TYPE_CFG1 AN4 AN13 MMST3904-7-F_DIS Q82
VRAM TYPE
1
R669 10K_DIS RAM_TYPE_CFG2 DVPDATA_13 DPA_VSSR_9
AR4 DVPDATA_14 DPA_VSSR_10 AN14 2 ATI_HDMI_DET 25
R674 10K_DIS RAM_TYPE_CFG3 AP4 DVPDATA_15 MMST3904-7-F_DIS
AN5 AG15
1
DVPDATA_16 DP_CALR
C AR5 DVPDATA_17 NC_TPVDDC AH18 C
AP5 AG18 R112 150/F_DIS
+3.3V_DELAY DVPDATA_18 NC_TPVSSC R85
AP6 DVPDATA_19 HPD1 AG6
RAM_TYPE_CFG0 AR6 10K_DIS
R651 10K_DIS GPIO0 RAM_TYPE_CFG1 DVPDATA_20 PLACE OR RESISTORS CLOSE TO ASIC
AN7 DVPDATA_21
R661 10K_DIS GPIO1 RAM_TYPE_CFG2 AP7 AR31 ATI_VGA_RED
DVPDATA_22 R ATI_VGA_RED 27
R650 10K_NC GPIO2 RAM_TYPE_CFG3 AR7 AP31 2 1
R662 10K_NC GPIO3 DVPDATA_23 RB R701 0_DIS
R645 10K_NC GPIO4 GPIO0 AG2 AR30 ATI_VGA_GRN
GPIO_0 G ATI_VGA_GRN 27
R660 10K_NC GPIO5 GPIO1 AF2 AP30 2 1
R646 10K_NC GPIO6 GPIO2 GPIO_1 GENERAL GB R700 0_DIS
AF1 GPIO_2
R649 10K_NC HDMI_HD_EN GPIO3 AE3 PURPOSE AR29 ATI_VGA_BLU
GPIO_3 I/O B ATI_VGA_BLU 27
R58 10K_NC GPIO10 GPIO4 AE2 AP29 2 1
R148 10K_DIS ATI_VGAHSYNC GPIO5 GPIO_4 DAC1 BB R694 0_DIS
AE1 GPIO_5
R61 10K_DIS GFX_CLKREQ# GPIO6 AD3 AN29 ATI_VGAHSYNC
GPIO_6 HSYNC ATI_VGAHSYNC 27
R666 1 2 10K_NC TEMP_FAIL# R664 0_DISATI_PANEL_BKEN_R AD2 AN30
31 ATI_PANEL_BKEN GPIO_7_BLON VSYNC ATI_VGAVSYNC 27
HDMI_HD_EN AD1
R719 10K_NC RAM_CFG3 GPIO_8_ROMSO
AD5 GPIO_9_ROMSI RSET AN31 2R166 1
GPIO_23_CLKREQB GPIO10 499/F_DIS ATI_VGA_BLU
DRIVES LOW
11 RAM_CFG0
AD4
AC3
GPIO_10_ROMSCK
AR32 ATI_VGA_GRN
RAM_CFG1 GPIO_11 AVDD +AVDD ATI_VGA_RED
DURING RESET AC2
RAM_CFG2 GPIO_12
R665 0_DIS
AC1 GPIO_13 AVSSQ AP32 DIS only
T95 PAD AB3 GPIO_14_HPD2
1 2 AB2 AR28 R698 Layout Note:
50 GFX_CORE_CNTRL GPIO_15_PWRCNTL_0 VDD1DI +VDD1DI
CLK_VGA_27M_SS_R T95 AB1 AP28 R696 150/F_DIS Place 150 ohm
GPIO_16_SSIN VSS1DI R695 150/F_DIS
22 THERMAL_INT# 1 2 AF5 GPIO_17_THERMAL_INT
R647 0_DIS AF4 AM19 150/F_DIS termination resistors
T4 PAD GPIO_18_HPD3 R2
R663 0_NC 20 TEMP_FAIL# TEMP_FAIL# AG4 GPIO_19_CTF R2B AL19 close to ATI CHIP.
1 2 T4 AG3 GPIO_20_PWRCNTL_1
20 BB_ENA AD9 AM18 R695 R696 R698
GPIO_21_BBEN G2
T5 PAD AD8 GPIO_22_ROMCSB G2B AL18
GFX_CLKREQ# AD7
R57 GPIO_23_CLKREQB
T5 AB4 GPIO_24_JMODE B2 AM17
R119 1 2 10K_DIS TEMP_FAIL# AB6 AL17
T8 PAD GPIO_25_TDI B2B
1K_DIS AB7
T6 PAD GPIO_26_TCK DAC2
T9 PADT8 AB9 GPIO_27_TMS C AK19
T12 PADT6 AA9 GPIO_28_TDO Y AK18
+1.8V_RUN AF8 AK17
B T11 PADT9 GEN_A COMP B
T7 PADT12 AF7 GEN_B
T10 PADT11 AG5 GEN_C V2SYNC AL15
T96 PADT7 AP9 GEN_D_HPD4 H2SYNC AM15
R99 AR9
T97 PADT10 GEN_E
T99 PADT96 AP13 GEN_F A2VDD AM21 +A2VDD
499R/F_DIS AR13
T98 PADT97 GEN_G
T99 A2VDDQ AL21 +A2VDDQ
T98 AD12 VREFG
PLACE VREF DIVIDER AK21
AND CAP CLOSE TO ASIC A2VSSQ
R95 AR20 AH22
249R_DIS C94 +DPLL_PVDD DPLL_PVDD VDD2DI +VDD2DI ATI_LCD_DDCDAT R141 2
AP20 DPLL_PVSS VSS2DI AG22 1 2.2K_DIS +3.3V_DELAY
ATI_LCD_DDCCLK R165 2 1 2.2K_DIS
100nF_DIS AM35 AJ21 2 R205 1 715/F_DIS
+PCIE_PVDD PCIE_PVDD R2SET
A14
DDC1DATA AM29
AL29
ATI_LCD_DDCDAT 26 LVDS
+MPVDD MPVDD DDC1CLK ATI_LCD_DDCCLK 26
R643 0_NC B15 PLL
MPVSS CLOCKS DDC
22 OSC_SPREAD 1 2 AJ15
XTAIN AR33 DP AUX DDC2DATA AH15
XTAOUT XTALIN DDC2CLK
R658 0_NC
AP33 XTALOUT
AJ5
HDMI
DDC3DATA_DP3_AUXN ATI_HDMI_SDA 25
1 2 CLK_VGA_27M_SS_R AG19 AJ4
17 CLK_VGA_27M_SS +DPLL_VDDC DPLL_VDDC DDC3CLK_DP3_AUXP ATI_HDMI_SCL 25
1
AG21 TS_FDO DDC4DATA_DP4_AUXN AH14 ATI_CRT_DAT_DDC 27

R709 0_DIS R652
R713 100/F_DIS
1 2 10K_NC 22 VGA_THERMDN AK4 THERMAL DDC4CLK_DP4_AUXP AG14 ATI_CRT_CLK_DDC 27 CRT
17 CLK_VGA_27M_NSS DMINUS
22 VGA_THERMDP AM4 DPLUS
2 1
2
R714 120/F_DIS
R706 0_NC M86-LP_DIS
22 OSC_OUT CLK_VGA_27M_NSS_R 1 2 R652
Y3 R699 0_NC
1 2 1 2
A A
27MHZ_NC
R147 1M_NC
1
C797 C778
18P_NC 18P_NC QUANTA
2
50 50
Title
COMPUTER
VGA-G86GLM (VIDEO)

GM3 2B

5 4 3 2 1
5 4 3 2 1
U43E
Part 6 of 7
P33 PCIE_VSS_1 VSS_66 P6
P34 PCIE_VSS_2 VSS_67 M9
P35 PCIE_VSS_3 VSS_68 M26
R27 PCIE_VSS_4 VSS_69 K28
R28 PCIE_VSS_5 VSS_70 M32
R29 PCIE_VSS_6 VSS_71 N14
R32 N17 U43D
PCIE_VSS_7 VSS_72
R33 PCIE_VSS_8 VSS_73 N19
U29 N22 +1.8V_RUN PART 5 OF 7
PCIE_VSS_9 VSS_74
U32 PCIE_VSS_10 VSS_75 N33
V29 PCIE_VSS_11 VSS_76 N3 D1 VDDR1_1 PCIE_VDDR_1 AR34 +PCIE_VDDR
V32 R5 C215 A8 AL33
PCIE_VSS_12 VSS_77 VDDR1_2 PCIE_VDDR_2
PCI-Express GND
T33 U8 C725 C724 C706 A12 AM33
PCIE_VSS_13 VSS_78 10uF_DIS 10uF_DIS 10uF_DIS 10uF_DIS VDDR1_3 PCIE_VDDR_3
D V34 PCIE_VSS_14 VSS_79 P13 A16 VDDR1_4 PCIE_VDDR_4 AN33 D
V35 PCIE_VSS_15 VSS_80 P15 A20 VDDR1_5 PCIE_VDDR_5 AN34
W29 PCIE_VSS_16 VSS_81 P18 A24 VDDR1_6 PCIE_VDDR_6 AN35
W32 PCIE_VSS_17 VSS_82 P21 A28 VDDR1_7 PCIE_VDDR_7 AP34
Memory I/O
W33 PCIE_VSS_18 VSS_83 P23 B1 VDDR1_8 PCIE_VDDR_8 AP35
AA29 P26 C168 C122 C180 C103 H1
PCIE_VSS_19 VSS_84 1U_DIS 1uF_DIS 1uF_DIS 1uF_DIS VDDR1_9
AA32 PCIE_VSS_20 VSS_85 P29 H35 VDDR1_10 PCIE_VDDC_1 R26 +PCIE_VDDC
AB29 PCIE_VSS_21 VSS_86 P30 L18 VDDR1_11 PCIE_VDDC_2 U26
AB32 PCIE_VSS_22 VSS_87 R1 L19 VDDR1_12 PCIE_VDDC_3 V25
Y33 PCIE_VSS_23 VSS_88 U5 L21 VDDR1_13 PCIE_VDDC_4 V26
AB34 P9 L22 W25
PCI-Express
PCIE_VSS_24 VSS_89 C113 C152 C133 C147 VDDR1_14 PCIE_VDDC_5
AB35 PCIE_VSS_25 VSS_90 R10 M10 VDDR1_15 PCIE_VDDC_6 W26
AC33 R14 1uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS M35 AA25
PCIE_VSS_26 VSS_91 VDDR1_16 PCIE_VDDC_7
AD29 PCIE_VSS_27 VSS_92 R17 P10 VDDR1_17 PCIE_VDDC_8 AD26
AD32 PCIE_VSS_28 VSS_93 R19 T1 VDDR1_18 PCIE_VDDC_9 AF26
AF29 PCIE_VSS_29 VSS_94 R22 Y1 VDDR1_19 PCIE_VDDC_10 AA26
AF32 PCIE_VSS_30 VSS_95 V3 B35 VDDR1_20 PCIE_VDDC_11 AB25
AD33 AK9 C50 C63 C52 C90 M1 AB26
PCIE_VSS_31 VSS_96 1uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS VDDR1_21 PCIE_VDDC_12 +VCC_GFX_CORE
AF34 PCIE_VSS_32 VSS_97 U10 D35 VDDR1_22
AF35 PCIE_VSS_33 VSS_98 U15 K10 VDDR1_23
AG27 PCIE_VSS_34 VSS_99 U18 K12 VDDR1_24 VDDC_1 N13
AG33 V7 L14 N21 C721 C104 C135 C146 C154
PCIE_VSS_37 VSS_102 VDDR1_27 VDDC_4 10uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS
AJ29 PCIE_VSS_38 VSS_103 W8 L15 VDDR1_28 VDDC_5 N23
AJ32 PCIE_VSS_39 VSS_104 V10 L17 VDDR1_29 VDDC_6 P14
AH33 PCIE_VSS_40 VSS_105 V14 VDDC_7 P17
I/O Internal
AL34 PCIE_VSS_41 VSS_106 V17 +VDD_CT AA11 VDD_CT_1 VDDC_8 P19
AL35 PCIE_VSS_42 VSS_107 V19 AB11 VDD_CT_2 VDDC_9 P22
AK32 V22 AD10 V18 C68 C161 C108 C105 C158
PCIE_VSS_43 VSS_108 VDD_CT_3 VDDC_10 10uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS
VSS_109 V1 AF10 VDD_CT_4 VDDC_11 V21
A2 VSS_1 VSS_110 AK12 P VDDC_12 V23
A34 VSS_2 VSS_111 V9 R11 VDD_CT_5 VDDC_13 W14
C3 VSS_3 VSS_112 W10 R25 VDD_CT_6 O VDDC_14 W17
Core
C5 VSS_4 VSS_113 W15 U11 VDD_CT_7 VDDC_15 W19
A4 VSS_5 VSS_114 W18 U25 VDD_CT_8 W VDDC_16 W22 C694 C157 C156 C155 C132
C18 W21 AA15 10uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS
VSS_6 VSS_115 ( 3.3V @ 50MA VDDR3)
E VDDC_17
C A21 VSS_7 VSS_116 W23 +3.3V_DELAY AE14 VDDR3_1 VDDC_18 AA18 C
C23 AA6 AE15 AA21
C11
VSS_8
VSS_9
VSS_117
VSS_118 AA10 AF12
VDDR3_2
VDDR3_3
R VDDC_19
VDDC_20 AA23
C13 AA14 C151 C97 C102 C114 AE17 AB14
VSS_10 VSS_119 10uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS VDDR3_4 VDDC_21 C722 C130 C129 C131 C111
C14 VSS_11 VSS_120 AA17 VDDC_22 AB17
A18 AA19 AP2 AB19 10uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS
VSS_12 VSS_121 VDDR4_1 VDDC_23
A11 VSS_13 VSS_122 AA22 AR2 VDDR4_2 VDDC_24 AB22
C26 VSS_14 VSS_123 AB8 VDDC_25 AC13
C33 VSS_15 VSS_124 AB10 AN1 VDDR5_1 VDDC_26 AC15
F35 VSS_16 VSS_125 AB13 AP1 VDDR5_2 VDDC_27 AC18
R7 AB15 AC21 C67 C159 C145 C134 C126
VSS_17 VSS_126 C153 C165 C89 VDDC_28 10uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS
G10 VSS_18 VSS_127 AB18 +VDD_MEM_CLK0 A25 VDDRHA_1 VDDC_29 AC23
F15 AB21 10uF_DIS 100nF_DIS
1uF_DIS A32 AE18
VSS_19 VSS_128 +VDD_MEM_CLK1 VDDRHA_2 VDDC_30
H17 VSS_20 VSS_129 AB23 VDDC_31 AE22
G21 VSS_21 VSS_130 AC14 B25 VSSRHA_1 VDDC_32 AE19
Memory I/O
D29 AC17 C98 C162 B32 AE21
Clock
VSS_22 VSS_131 1uF_DIS 1uF_DIS VSSRHA_2 VDDC_33
A29 VSS_23 VSS_132 AC19 VDDC_34 R13
G1 VSS_24 VSS_133 AC22 +VDD_MEM_CLK2 B2 VDDRHB_1 VDDC_35 R15
F14 VSS_25 VSS_134 AF9 +VDD_MEM_CLK3 L1 VDDRHB_2 VDDC_36 R18
J15 AD6 +1.8V_RUN R21
VSS_26 VSS_135 VDDC_37
E19 VSS_27 VSS_136 AB5 C2 VSSRHB_1 VDDC_38 R23
E22 VSS_28 VSS_137 AD24 L2 VSSRHB_2 VDDC_39 U14
E24 VSS_29 VSS_138 W5 VDDC_40 U17
D7 VSS_30 VSS_139 AF6 W13 BBN_1 VDDC_41 U19
Back
G9 AF14 AA13 U22
Bias
VSS_31 VSS_140 BBN_2 VDDC_42
F26 VSS_32 VSS_141 AF21 VDDC_43 V15
G29 VSS_33 VSS_142 AF22 U13 BBP_1 VDDC_44 W11
D33 AK10 V13 L8
VSS_34 VSS_143 BBP_2
M5 VSS_35 VSS_144 AF17 VDDCI_1 M12
G4 VSS_36 VSS_145 AF18 +BBP VDDCI_2 M24
E10 AF19 P11 BLM15AG121SN1D_DIS
VSS_37 VSS_146 C107 VDDCI_3 C235 C93 C171 C170
E12 VSS_38 VSS_147 AA3 VDDCI_4 P25
F17 AG12 C106 10uF_DIS 1uF_DIS 1uF_DIS 1uF_DIS
VSS_39 VSS_148 1uF_DIS 1uF_DIS
G18 VSS_40 VSS_149 AJ14
G22 AH21 M86-LP_DIS
VSS_41 VSS_150
F30 VSS_42 VSS_151 D4
J35 VSS_43 VSS_152 AF15 U43
B J18 VSS_44 VSS_153 AG10 B
H19 AN6 +BBP
VSS_45 VSS_154
J21 VSS_46 VSS_155 AK15 Q9
F7 VSS_47 VSS_156 AJ17
J12 AJ18 SI2303BDS-T1-E3_DIS
VSS_48 VSS_157
J24 VSS_49 VSS_158 AJ19
J26 VSS_50 VSS_159 AF24 3 1 +1.8V_RUN 3 1 +VCC_GFX_CORE
K30 VSS_51 VSS_160 AN32
1
J32 AK3 Q8
VSS_52 VSS_161 C42 2N7002W-7-F_DIS
F33 AN3
2
VSS_53 VSS_162 1U_DIS
K6 AR8
2
VSS_54 VSS_163 Q8
K9 VSS_55 VSS_164 AM1
K14 AK30 603 R49 2 1 100K_DIS+5V_RUN
VSS_56 VSS_165 10 Q9
K15 VSS_57 VSS_166 V11
K17 VSS_58 R49
3
K18 VSS_59
K19 A35 C42 2 Q10
VSS_60 MECH_1 19 BB_ENA
K21 VSS_61 MECH_2 AR1 Q20 2N7002W-7-F_DIS
K22 AR35
1
VSS_62 MECH_3 SI2303BDS-T1-E3_DIS R45
M28 VSS_63
K3 VSS_64 10K_DIS
L33 CORE GND +3.3V_DELAY 3 1 +3.3V_RUN Q10
VSS_65
1
U43
2
M86-LP_DIS R125 R45

+3.3V_SUS +3.3V_SUS 100K_DIS
2
Q20
1
R102 R125
100K_NC
2
1 R123 75K/F_DIS
4 2 Q19
3
2 2N7002W-7-F_DIS
A 2 Q18 U8 A
19 TEMP_FAIL#
3
2N7002W-7-F_NC 74AHCT1G08GW_NC R123 C160

0.1U_DIS
1
Q19
OPTIONAL RC NETWORK10
TO FINE TUNE
POWER SEQUENCING
C160
QUANTA
26,44,48,49,53 RUN_ON
R105 0_DIS R120 0_DIS
GFX_RUN_ON 50
Title
COMPUTER
C100 VGA-G86GLM (VIDEO)
0.1U_DIS
25 Size Document Number Rev
603 GM3 2B

5 4 3 2 1
5 4 3 2 1
+LVDDR LVDS TMDS
2
R129
+1.1V_GFX_PCIE
BLM15BD121SN1D_DIS +DPA_VDDR ( 1.1V @ 200MA EACH SINGLE LINK)
R129 0_DIS L68 C743 C745 1uF_DIS
10uF_DIS 100nF_DIS C744
1
+1.8V_RUN +LVDDC
BLM18PG471SN1D_DIS
L12 C183 C185 C186
10uF_DIS 100nF_DIS 100nF_DIS (1.8V @ 400MA LVDDC,LVDDR)
D D
+1.8V_RUN L11 +1.1V_GFX_PCIE
BLM15BD121SN1D_DIS +LPVDD BLM15BD121SN1D_DIS +DPB_VDDR
C166 C164 C163
(1.8V @ 30MA LPVDD) C150 C149 C148
( 1.1V @ 200MA EACH SINGLE LINK)
L11 L10
10uF_DIS 1uF_DIS 100nF_DIS 10uF_DIS 100nF_DIS 1uF_DIS
PLL_CLK +1.1V_GFX_PCIE
BLM18PG121SN1D_DIS
+PCIE_VDDC
(PCIE_VDDC 1.1V @ 1A )
L18
C245 C174 C177
10uF_DIS 1uF_DIS 100nF_DIS
+1.8V_RUN +DPLL_PVDD
BLM15BD121SN1D_DIS (1.8V @ 40MA DPLL_PVDD) C176 C175 C178
L69 C752 C753 C754 1uF_DIS 1uF_DIS 1uF_DIS
BLM15BD121SN1D_DIS +DPLL_VDDC
C125 C123 C124
(DPLL_VDDC 1.1V @ 100 MA)
L9
+1.8V_RUN 10uF_DIS 1uF_DIS 100nF_DIS
BLM15BD121SN1D_DIS +PCIE_PVDD
C244 C248 C257
(1.8V @ 40MA PCIE_PVDD)
L21
+VCC_GFX_CORE +MPVDD
BLM18PG471SN1D_DIS ( .95V-1.1V @ 345MA MPVDD)
C L67 C101 C110 C109 C
+1.8V_RUN
BLM15BD121SN1D_DIS +A2VDDQ (1.8V @ 2MA A2VDDQ)
L71 C765 C764 C763
DAC(CRT) +3.3V_DELAY
BLM15BD121SN1D_DIS +A2VDD
(3.3V @ 135MA A2VDD)
L73 C771 C769 C770
+1.8V_RUN 10uF_DIS 100nF_DIS
BLM15BD121SN1D_DIS +VDD1DI 1uF_DIS
C775 C776 C184 1uF_DIS
( 1.8V @ 100MA VDD1DI)
L74
10uF_DIS 100nF_DIS
+VDD2DI
+1.8V_RUN +AVDD
BLM15BD121SN1D_DIS (1.8V @ 65MA AVDD) PLACE ALL DECOUPLING AS CLOSE TO ASIC AS POSSIBLE
L14 C187 C193 1uF_DIS
+1.8V_RUN +TPVDD
BLM15BD121SN1D_DIS
L65 C741 C739 C738 (1.8V @ 20 MA SINGLE LINK 1X4DP and 40mA for Dual-Link 2X4DP)
10uF_DIS 100nF_DIS 1uF_DIS
B B
+1.8V_RUN
BLM15BD121SN1D_DIS +VDD_CT (VDD_CT 1.8V
L22 C260 C95 1uF_DIS @ 110MA (VDD_CT)
+1.8V_RUN
BLM18PG471SN1D_DIS +PCIE_VDDR (1.8V @ 400MA PCIE_VDDR)
L75 C810 C800 C798
MEM IO CLK
(1.8V @ MA VDDRHA_1
+1.8V_RUN +VDD_MEM_CLK0
BLM15BD121SN1D_DIS INCLUDED IN VDDR1)
L79 C181 C179 C182
+1.8V_RUN
BLM15BD121SN1D_DIS
+VDD_MEM_CLK1 (1.8V @ MA VDDRHA_2
L78 C811 C808 C809 INCLUDED IN VDDR1)
A A
+1.8V_RUN +VDD_MEM_CLK2
BLM15BD121SN1D_DIS (1.8V @ MA VDDRHB_1
L63 C717 C718 C719
10uF_DIS 1uF_DIS 100nF_DIS INCLUDED IN VDDR1)
QUANTA
+1.8V_RUN
BLM15BD121SN1D_DIS
C65 C72 C66
+VDD_MEM_CLK3
(1.8V @ MA VDDRHB_2 Title
COMPUTER
L6
10uF_DIS 1uF_DIS 100nF_DIS INCLUDED IN VDDR1) VGA-G86GLM (VIDEO)

GM3 2B

5 4 3 2 1
5 4 3 2 1
U43C
U43G
Part 3 of 7
23 ODTA0 ODTA0 Part 4 of 7
23 ODTA1 ODTA1 MDA0 P27 C27 MAA0
MDA1 DQA_0 MAA_0 MAA1 MDB0 MAB0
P28 DQA_1 MAA_1 B28 H15 DQB_0 MAB_0 H2
23 RASA0# RASA0# MDA2 P31 B27 MAA2 24 ODTB0 ODTB0 MDB1 G14 H3 MAB1
RASA1# MDA3 DQA_2 MAA_2 MAA3 ODTB1 MDB2 DQB_1 MAB_1 MAB2
23 RASA1# P32 DQA_3 MAA_3 G26 24 ODTB1 E14 DQB_2 MAB_2 J3
MDA4 M27 F27 MAA4 MDB3 D14 J5 MAB3
CASA0# MDA5 DQA_4 MAA_4 MAA5 RASB0# MDB4 DQB_3 MAB_3 MAB4
23 CASA0# K29 DQA_5 MAA_5 E27 24 RASB0# H12 DQB_4 MAB_4 J4
23 CASA1# CASA1# MDA6 K31 D27 MAA6 24 RASB1# RASB1# MDB5 G12 J6 MAB5
MDA7 DQA_6 MAA_6 MAA7 MDB6 DQB_5 MAB_5 MAB6
K32 DQA_7 MAA_7 J27 F12 DQB_6 MAB_6 G5
23 WEA0# WEA0# MDA8 M33 E29 MAA8 24 CASB0# CASB0# MDB7 D10 J9 MAB7
MEMORY INTERFACE A
DQA_8 MAA_8 DQB_7 MAB_7
MEMORY INTERFACE B
23 WEA1# WEA1# MDA9 M34 C30 MAA9 24 CASB1# CASB1# MDB8 B13 F3 MAB8
MDA10 DQA_9 MAA_9 MAA10 MDB9 DQB_8 MAB_8 MAB9
L34 DQA_10 MAA_10 E26 C12 DQB_9 MAB_9 F4
23 CKEA0 CKEA0 MDA11 L35 A27 MAA11 24 WEB0# WEB0# MDB10 B12 J1 MAB10
CKEA1 MDA12 DQA_11 MAA_11 A_A12 WEB1# MDB11 DQB_10 MAB_10 MAB11
23 CKEA1 J33 DQA_12 MAA_A12 G27 24 WEB1# B11 DQB_11 MAB_11 J2
MDA13 MDB12 B_A12
D
23 CSA0_0# CSA0_0# MDA14
J34
H33
DQA_13
DQA_14
MAA_BA2
MAA_BA0
D26
C28 A_BA0 NC for 16M x16 DDR2
24 CKEB0 CKEB0 MDB13
C9
B9
DQB_12
DQB_13
MAB_A12
MAB_BA2
J7
F1
D
CSA1_0# MDA15 A_BA1 CKEB1 MDB14 B_BA0

23 CSA1_0#
MDA16
H34
K27
DQA_15
DQA_16
MAA_BA1 B29 24 CKEB1
MDB15
A9
B8
DQB_14
DQB_15
MAB_BA0
MAB_BA1
G2
G3 B_BA1 NC for 16M x16 DDR2
MDA17 J29 M29 DQMA#0 24 CSB0_0# CSB0_0# MDB16 J10
MDA18 DQA_17 DQMAb_0 DQMA#1 CSB1_0# MDB17 DQB_16 DQMB#0
J30 DQA_18 DQMAb_1 K33 24 CSB1_0# H10 DQB_17 DQMBb_0 D12
MDA19 J31 G30 DQMA#2 MDB18 F10 C10 DQMB#1
MDA20 DQA_19 DQMAb_2 DQMA#3 MDB19 DQB_18 DQMBb_1 DQMB#2
F29 DQA_20 DQMAb_3 E33 D9 DQB_19 DQMBb_2 E7
23 CLKA0 CLKA0 MDA21 F32 C22 DQMA#4 MDB20 G7 C6 DQMB#3
CLKA0# MDA22 DQA_21 DQMAb_4 DQMA#5 MDB21 DQB_20 DQMBb_3 DQMB#4
23 CLKA0# D30 DQA_22 DQMAb_5 H21 G6 DQB_21 DQMBb_4 P3
MDA23 D32 C17 DQMA#6 MDB22 F6 R4 DQMB#5
CLKA1 MDA24 DQA_23 DQMAb_6 DQMA#7 CLKB0 MDB23 DQB_22 DQMBb_5 DQMB#6
23 CLKA1 G33 DQA_24 DQMAb_7 G17 24 CLKB0 D6 DQB_23 DQMBb_6 W3
23 CLKA1# CLKA1# MDA25 G34 24 CLKB0# CLKB0# MDB24 C8 V8 DQMB#7
MDA26 DQA_25 QSA0 MDB25 DQB_24 DQMBb_7
G35 DQA_26 QSA_0 M30 C7 DQB_25
QSA#[7..0] MDA27 F34 K34 QSA1 CLKB1 MDB26 B7 J14 QSB0
23 QSA#[7..0] DQA_27 QSA_1 24 CLKB1 DQB_26 QSB_0
MDA28 D34 G31 QSA2 24 CLKB1# CLKB1# MDB27 A7 B10 QSB1
QSA[7..0] MDA29 DQA_28 QSA_2 QSA3 MDB28 DQB_27 QSB_1 QSB2
23 QSA[7..0] C34 DQA_29 QSA_3 E34 B5 DQB_28 QSB_2 F9
MDA30 C35 B22 QSA4 QSB#[7..0] MDB29 A5 B6 QSB3
DQA_30 QSA_4 24 QSB#[7..0] DQB_29 QSB_3
DQMA#[7..0] MDA31 QSA5 MDB30 QSB4
read strobe
B34 F21 C4 P2
read strobe
23 DQMA#[7..0] DQA_31 QSA_5 DQB_30 QSB_4
MDA32 C24 B17 QSA6 QSB[7..0] MDB31 B4 P8 QSB5
DQA_32 QSA_6 24 QSB[7..0] DQB_31 QSB_5
MDA[63..0] MDA33 B24 D17 QSA7 MDB32 M3 W2 QSB6
23 MDA[63..0] MDA34 DQA_33 QSA_7 DQMB#[7..0] MDB33 DQB_32 QSB_6 QSB7
B23 DQA_34 24 DQMB#[7..0] M2 DQB_33 QSB_7 V6
MAA[11..0] MDA35 A23 M31 QSA#0 MDB34 N2
23 MAA[11..0] DQA_35 QSA_0B DQB_34
MDA36 C21 K35 QSA#1 MDB[63..0] MDB35 N1 H14 QSB#0
MDA37 DQA_36 QSA_1B QSA#2 24 MDB[63..0] MDB36 DQB_35 QSB_0B QSB#1
B21 DQA_37 QSA_2B G32 R3 DQB_36 QSB_1B A10
write strobe
MDA38 C20 E35 QSA#3 MAB[11..0] MDB37 R2 E9 QSB#2
DQA_38 QSA_3B 24 MAB[11..0] DQB_37 QSB_2B
write strobe
23 A_BA0 A_BA0 MDA39 B20 A22 QSA#4 MDB38 T3 A6 QSB#3
A_BA1 MDA40 DQA_39 QSA_4B QSA#5 MDB39 DQB_38 QSB_3B QSB#4
23 A_BA1 J22 DQA_40 QSA_5B E21 T2 DQB_39 QSB_4B P1
MDA41 H22 A17 QSA#6 MDB40 M8 P7 QSB#5
A_A12 MDA42 DQA_41 QSA_6B QSA#7 B_BA0 MDB41 DQB_40 QSB_5B QSB#6
23 A_A12 F22 DQA_42 QSA_7B E17 24 B_BA0 M7 DQB_41 QSB_6B W1
MDA43 D21 24 B_BA1 B_BA1 MDB42 P5 V5 QSB#7
MDA44 DQA_43 ODTA0 MDB43 DQB_42 QSB_7B
PLACE MVREF DIVIDERS MDA45
J19 DQA_44 ODTA0 C31
ODTA1 B_A12 MDB44
P4 DQB_43 ODTB0
G19 DQA_45 ODTA1 C25 24 B_A12 R9 DQB_44 ODTB0 D2
AND CAPS CLOSE TO ASIC MDA46 F19 MDB45 R8 K5 ODTB1
MDA47 DQA_46 CLKA0 MDB46 DQB_45 ODTB1
D19 DQA_47 CLKA0 A33 R6 DQB_46
+1.8V_RUN MDA48 C19 A26 CLKA1 MDB47 U4 A3 CLKB0
MDA49 DQA_48 CLKA1 MDB48 DQB_47 CLKB0 CLKB1
B19 DQA_49 U3 DQB_48 CLKB1 K1
C MDA50 A19 B33 CLKA0# MDB49 U2 C
MDA51 DQA_50 CLKA0b CLKA1# MDB50 DQB_49 CLKB0#
B18 DQA_51 CLKA1b B26 U1 DQB_50 CLKB0b B3
MDA52 C16 MDB51 V2 K2 CLKB1#
R193 MDA53 DQA_52 RASA0# MDB52 DQB_51 CLKB1b
B16 DQA_53 RASA0b A31 Y3 DQB_52
100/F_DIS MDA54 C15 D24 RASA1# MDB53 Y2 D3 RASB0#
MDA55 DQA_54 RASA1b MDB54 DQB_53 RASB0b RASB1#
A15 DQA_55 AA2 DQB_54 RASB1b K7
MDA56 H18 C32 CASA0# MDB55 AA1
C242 MDA57 DQA_56 CASA0b CASA1# MDB56 DQB_55 CASB0#
F18 DQA_57 CASA1b H26 U9 DQB_56 CASB0b C1
MDA58 E18 MDB57 U7 K4 CASB1#
+1.8V_RUN 100nF_DIS MDA59 DQA_58 CSA0_0# +1.8V_RUN MDB58 DQB_57 CASB1b
D18 DQA_59 CSA0b_0 A30 U6 DQB_58
R194 MDA60 J17 B30 PLACE MVREF DIVIDERS MDB59 V4 E1 CSB0_0#
100R/F_DIS MDA61 DQA_60 CSA0b_1 MDB60 DQB_59 CSB0b_0
G15 DQA_61 W9 DQB_60 CSB0b_1 E2
MDA62 CSA1_0# AND CAPS CLOSE TO ASIC MDB61
R740 MDA63
E15
D15
DQA_62
DQA_63
CSA1b_0
CSA1b_1
G24
H24 MDB62
W7
W6
DQB_61
DQB_62 CSB1b_0 L3 CSB1_0# NC for 16M x16 DDR2
100/F_DIS R96 MDB63 W4 M4
CKEA0 100R_DIS DQB_63 CSB1b_1
N35 MVREFDA CKEA0 B31
N34 F24 CKEA1 B14 E3 CKEB0
MVREFSA CKEA1 MVREFDB CKEB0 CKEB1
A13 MVREFSB CKEB1 K8
C29 WEA0#
C815 WEA0b WEA1# 100R_DIS 1K_DIS R146 WEB0#
AM34 NC_1 WEA1b D22 AM30 TESTEN WEB0b F2
R741 100nF_DIS R107 100nF_DIS AA8 M6 WEB1#
100R/F_DIS C99 TEST_MCLK WEB1b
AA7 TEST_YCLK
NC for 16M x16 DDR2 AA5
AH19
MEMTEST
PLLTEST
DRAM_RST AA4
M86-LP_DIS +1.8V_RUN
M86-LP_DIS
+1.8V_RUN R56 4.7K_DIS
U43 R672
100R_DIS
+3.3V_DELAY
R69 R68 R67
+3.3V_DELAY 4.7K_DIS 240R_DIS
4.7K_DIS
2
B R675 B
Q6 100R_DIS C735
THERMAL MONITOR
1
3 1 100nF_DIS
31,37 SMBCLK2
R35 R39
2N7002W-7-F_DIS 4.7K_DIS 4.7K_DIS
2
+3.3V_DELAY
U1 +3.3V_RUN
VGA_THERMDP 19 Spread Spectrum
2
8 SCLK VDD 1
1
Q7 If U7070, the discrete spread spectrum chip

3 1 7 2 C39 is not used, then pop R8328 in order to
31,37 SMBDAT2 SDATA D+ 2200P_DIS
2
THERMAL_INT# 6 3
pull-down BXTALOUT for EMI reasons.
19 THERMAL_INT# ALERT# D- VGA_THERMDN 19
2N7002W-7-F_DIS R72 R73
5 4 MB_THERM# 50 10K_NC 10K_NC
GND THERM# R115 10K_NC
U6
ADM1032ARM_DIS C39
19 OSC_OUT 1 XIN/CLKIN XOUT 8
1
C34 2 7 +3VL L7 +3.3V_RUN

0.1U_DIS R114 0_NC VSS VDD BLM18AG121SN1D_NC
MB_THERM# R44 2 1 10K_DIS +3.3V_DELAY 1 2 3 6 C73 C76
2
SO PD#
1
10U_NC 0.1U_NC
THERMAL_INT# R43 2 1 10K_DIS 4 5 805
19 OSC_SPREAD SSCLK REFCLK
10 10 10
2
P1819GF-08SR_NC
C34
S0
-1.75% (DOWN) 0
0.85% (CENTER) 1
A A
QUANTA
Title
COMPUTER
VGA-M82-S (PCIe)

GM3 2B

5 4 3 2 1
5 4 3 2 1
U10 U44
MDA[63..0]
22 MDA[63..0]
MAA[11..0]
MAA0
MAA1
M8
M3
A0 DQ0 G8
G2
MDA7
MDA1
GDDR2 16MX16 MEMORY MAA0
MAA1
M8
M3
A0 DQ0 G8
G2
MDA30
MDA25
22 MAA[11..0] A1 DQ1 A1 DQ1
MAA2 MDA6 MAA2 MDA28
QSA#[7..0] MAA3
M7
N2
A2 DQ2 H7
H3 MDA5
Hynix: AKD5JG-TW09 MAA3
M7
N2
A2 DQ2 H7
H3 MDA27
22 QSA#[7..0] A3 DQ3 A3 DQ3
MAA4
MAA5
N8 A4 DQ4 H1 MDA0
MDA3
Samsung: AKD5JG-T507 MAA4
MAA5
N8 A4 DQ4 H1 MDA24
MDA31
N3 A5 DQ5 H9 N3 A5 DQ5 H9
MAA6 N7 F1 MDA4 MAA6 N7 F1 MDA26
DQMA#[7..0] MAA7 A6 DQ6 MDA2 MAA7 A6 DQ6 MDA29
22 DQMA#[7..0] P2 A7 DQ7 F9 P2 A7 DQ7 F9
MAA8 P8 C8 MDA21 MAA8 P8 C8 MDA12
QSA[7..0] MAA9 A8 DQ8 MDA22 MAA9 A8 DQ8 MDA10
22 QSA[7..0] P3 A9 DQ9 C2 P3 A9 DQ9 C2
MAA10 M2 D7 MDA19 MAA10 M2 D7 MDA15
MAA11 A10 DQ10 MDA20 MAA11 A10 DQ10 MDA8
P7 A11 DQ11 D3 P7 A11 DQ11 D3
R2 D1 MDA17 R2 D1 MDA9
22 A_A12 A12 DQ12 22 A_A12 A12 DQ12
D9 MDA18 D9 MDA14
A_BA[1..0] A_BA0 DQ13 MDA16 A_BA0 DQ13 MDA11
22 A_BA[1..0] L2 BA0 DQ14 B1 L2 BA0 DQ14 B1
D A_BA1 L3 B9 MDA23 CLKA0 A_BA1 L3 B9 MDA13 D
BA1 DQ15 CLKA0# BA1 DQ15
DQMA#2 B3 DQMA#1 B3
UDM UDM
2
DQMA#0 F3 B7 QSA2 DQMA#3 F3 B7 QSA1
LDM UDQS QSA#2 LDM UDQS QSA#1
UDQS# A8 UDQS# A8
RASA0# K7 R163 R164 RASA0# K7
22 RASA0# RAS 22 RASA0# RAS
CASA0# L7 F7 QSA0 56_DIS 56_DIS CASA0# L7 F7 QSA3
22 CASA0# CAS LDQS 22 CASA0# CAS LDQS
WEA0# K3 E8 QSA#0 WEA0# K3 E8 QSA#3
22 WEA0# 22 WEA0#
1
CSA0_0# WE LDQS# CSA0_0# WE LDQS#
22 CSA0_0# L8 CS 22 CSA0_0# L8 CS
CKEA0 K2 A2 +1.8V_RUN CKEA0 K2 A2 +1.8V_RUN
22 CKEA0 CKE NC1 22 CKEA0 CKE NC1
ODTA0 K9 E2 ODTA0 K9 E2
22 ODTA0 ODT NC2 22 ODTA0 ODT NC2
1
L1 C197 L1
NC3 NC3
2
CLKA0 J8 R3 470P_DIS CLKA0 J8 R3
22 CLKA0 CLK NC4 22 CLKA0 CLK NC4
CLKA0# K8 R7 R133 CLKA0# K8 R7 R705
22 CLKA0# 22 CLKA0#
2
CLK# NC5 CLK# NC5
NC6 R8 499/F_DIS NC6 R8 499/F_DIS
+1.8V_RUN J1 50 +1.8V_RUN J1
1
VDDL VREF_A0 VDDL VREF_A1
VREF J2 VREF J2
J7 VSSDL J7 VSSDL
2
2
2
2
C61 C172 A3 A1 +1.8V_RUN R128 C785 C167 A3 A1 +1.8V_RUN R715
0.1U_DIS 0.1U_DIS VSS_0 VDD_0 C169 0.1U_DIS 0.1U_DIS VSS_0 VDD_0 C789
E3 E1 499/F_DIS E3 E1 499/F_DIS
1
1
VSS_1 VDD_1 0.1U_DIS VSS_1 VDD_1 0.1U_DIS
J3 J9 J3 J9
1
VSS_2 VDD_2 VSS_2 VDD_2
N1 M9 N1 M9
1
10 10 VSS_3 VDD_3 10 10 VSS_3 VDD_3
P9 VSS_4 VDD_4 R1 P9 VSS_4 VDD_4 R1
10 10
A7 VSSQ_0 VDDQ_0 A9 A7 VSSQ_0 VDDQ_0 A9
B2 VSSQ_1 VDDQ_1 C1 B2 VSSQ_1 VDDQ_1 C1
1
D2 C7 C216 C218 C217 C195 D2 C7 C788 C787 C786 C783
VSSQ_3 VDDQ_3 10U_DIS 10U_DIS 1U_DIS 0.01U_DIS VSSQ_3 VDDQ_3 10U_DIS 10U_DIS 1U_DIS 0.01U_DIS
D8 C9 D8 C9
2
VSSQ_4 VDDQ_4 VSSQ_4 VDDQ_4
E7 VSSQ_5 VDDQ_5 E9 E7 VSSQ_5 VDDQ_5 E9
F2 VSSQ_6 VDDQ_6 G1 F2 VSSQ_6 VDDQ_6 G1
F8 G3 6.3 6.3 10 25 F8 G3 6.3 6.3 10 25
H2 VSSQ_8 VDDQ_8 G7 H2 VSSQ_8 VDDQ_8 G7
603 603 603 603 603 603
1
1
C C
C120 C784 C121 C198 C115 C774 C772 C773
0.1U_DIS 0.1U_DIS 0.1U_DIS 0.1U_DIS 0.1U_DIS 0.1U_DIS 0.1U_DIS 0.1U_DIS
2
2
U41 U5
10 10 10 10 10 10 10 10
MAA0 M8 G8 MDA45 MAA0 M8 G8 MDA50
M3 A1 DQ1 G2 M3 A1 DQ1 G2
MAA2 M7 H7 MDA46 MAA2 M7 H7 MDA51
MAA4 N8 H1 MDA40 MAA4 N8 H1 MDA52
MAA6 N7 F1 MDA43 MAA6 N7 F1 MDA54 CLKA1
MAA7 A6 DQ6 MDA44 MAA7 A6 DQ6 MDA48 CLKA1#
P2 A7 DQ7 F9 P2 A7 DQ7 F9
A8 DQ8 A8 DQ8
2
M2 A10 DQ10 D7 M2 A10 DQ10 D7
MAA11 P7 D3 MDA32 MAA11 P7 D3 MDA62 R51 R52
A11 DQ11 MDA33 A11 DQ11 MDA61 56_DIS 56_DIS
22 A_A12 R2 A12 DQ12 D1 22 A_A12 R2 A12 DQ12 D1
D9 MDA38 D9 MDA57
1
A_BA0 DQ13 MDA35 A_BA0 DQ13 MDA63
L2 BA0 DQ14 B1 L2 BA0 DQ14 B1
A_BA1 L3 B9 MDA36 A_BA1 L3 B9 MDA59
BA1 DQ15 BA1 DQ15
1
DQMA#4 B3 DQMA#7 B3 C53
DQMA#5 UDM QSA4 DQMA#6 UDM QSA7 470P_DIS
F3 LDM UDQS B7 F3 LDM UDQS B7
A8 QSA#4 A8 QSA#7
2
RASA1# UDQS# RASA1# UDQS#
22 RASA1# K7 RAS 22 RASA1# K7 RAS
CASA1# L7 F7 QSA5 CASA1# L7 F7 QSA6
22 CASA1# CAS LDQS 22 CASA1# CAS LDQS
WEA1# K3 E8 QSA#5 WEA1# K3 E8 QSA#6 50
22 WEA1# WE LDQS# 22 WEA1# WE LDQS#
CSA1_0# L8 CSA1_0# L8
22 CSA1_0# CS +1.8V_RUN 22 CSA1_0# CS +1.8V_RUN
CKEA1 K2 A2 CKEA1 K2 A2
22 CKEA1 CKE NC1 22 CKEA1 CKE NC1
ODTA1 K9 E2 ODTA1 K9 E2
22 ODTA1 ODT NC2 22 ODTA1 ODT NC2
NC3 L1 NC3 L1
2
2
CLKA1 J8 R3 CLKA1 J8 R3
22 CLKA1 CLK NC4 22 CLKA1 CLK NC4
CLKA1# K8 R7 R642 CLKA1# K8 R7 R55
22 CLKA1# CLK# NC5 22 CLKA1# CLK# NC5
B +1.8V_RUN J1 +1.8V_RUN J1 B
1
1
VDDL VREF_A2 VDDL VREF_A3
VREF J2 VREF J2
J7 VSSDL J7 VSSDL
2
2
2
2
E3 E1 499/F_DIS E3 E1 499/F_DIS
1

J3 J9 J3 J9
1
1
N1 M9 N1 M9
1
1
10 10 VSS_3 VDD_3 10 10 VSS_3 VDD_3
10 10
2
1
D2 C7 C709 C86 C708 C748 D2 C7 C58 C57 C56 C60
D8 C9 D8 C9
1
2
F8 G3 6.3 6.3 10 25 F8 G3 6.3 6.3 10 25
603 603 603 603 603 603
1
1
C711 C747 C750 C714 C117 C59 C119 C116
2
10 10 10 10 10 10 10 10
A A
QUANTA
Title
COMPUTER
VGA-M82-S (VRAM)

GM3 2B

5 4 3 2 1
5 4 3 2 1
U2 U37
MDB[63..0]
22 MDB[63..0]
MAB[11..0]
MAB0
MAB1
M8
M3
A0 DQ0 G8
G2
MDB2
MDB6
GDDR2 16MX16 MEMORY MAB0
MAB1
M8
M3
A0 DQ0 G8
G2
MDB15
MDB11
22 MAB[11..0] A1 DQ1 A1 DQ1
MAB2 MDB3 MAB2 MDB14
QSB#[7..0] MAB3
M7
N2
A2 DQ2 H7
H3 MDB7
Hynix: AKD5JG-TW09 MAB3
M7
N2
A2 DQ2 H7
H3 MDB10
22 QSB#[7..0] A3 DQ3 A3 DQ3
MAB4
MAB5
N8 A4 DQ4 H1 MDB4
MDB0
Samsung: AKD5JG-T507 MAB4
MAB5
N8 A4 DQ4 H1 MDB9
MDB13
MAB6 N7 F1 MDB5 MAB6 N7 F1 MDB8
DQMB#[7..0] MAB7 A6 DQ6 MDB1 MAB7 A6 DQ6 MDB12
22 DQMB#[7..0] P2 A7 DQ7 F9 P2 A7 DQ7 F9
MAB8 P8 C8 MDB17 MAB8 P8 C8 MDB29
QSB[7..0] MAB9 A8 DQ8 MDB23 MAB9 A8 DQ8 MDB27
22 QSB[7..0] P3 A9 DQ9 C2 P3 A9 DQ9 C2
MAB10 M2 D7 MDB18 MAB10 M2 D7 MDB31
MAB11 A10 DQ10 MDB20 MAB11 A10 DQ10 MDB24
P7 A11 DQ11 D3 P7 A11 DQ11 D3
R2 D1 MDB21 R2 D1 MDB25
22 B_A12 A12 DQ12 22 B_A12 A12 DQ12
D9 MDB19 D9 MDB30
B_BA[1..0] B_BA0 DQ13 MDB22 B_BA0 DQ13 MDB26
22 B_BA[1..0] L2 BA0 DQ14 B1 L2 BA0 DQ14 B1
D B_BA1 L3 B9 MDB16 CLKB0 B_BA1 L3 B9 MDB28 D
BA1 DQ15 CLKB0# BA1 DQ15
DQMB#2 B3 DQMB#3 B3
UDM UDM
2
DQMB#0 F3 B7 QSB2 DQMB#1 F3 B7 QSB3
LDM UDQS QSB#2 LDM UDQS QSB#3
UDQS# A8 UDQS# A8
RASB0# K7 R34 R38 RASB0# K7
22 RASB0# RAS 22 RASB0# RAS
CASB0# L7 F7 QSB0 56_DIS 56_DIS CASB0# L7 F7 QSB1
22 CASB0# CAS LDQS 22 CASB0# CAS LDQS
WEB0# K3 E8 QSB#0 WEB0# K3 E8 QSB#1
22 WEB0# 22 WEB0#
1
CSB0_0# WE LDQS# CSB0_0# WE LDQS#
22 CSB0_0# L8 CS 22 CSB0_0# L8 CS
CKEB0 K2 A2 +1.8V_RUN CKEB0 K2 A2 +1.8V_RUN
22 CKEB0 CKE NC1 22 CKEB0 CKE NC1
ODTB0 K9 E2 ODTB0 K9 E2
22 ODTB0 ODT NC2 22 ODTB0 ODT NC2
1
L1 C30 L1
NC3 NC3
2
CLKB0 J8 R3 470P_DIS CLKB0 J8 R3
22 CLKB0 CLK NC4 22 CLKB0 CLK NC4
CLKB0# K8 R7 R31 CLKB0# K8 R7 R634
22 CLKB0# 22 CLKB0#
2
CLK# NC5 CLK# NC5
+1.8V_RUN J1 50 +1.8V_RUN J1
1
VDDL VREF_B0 VDDL VREF_B1
VREF J2 VREF J2
J7 VSSDL J7 VSSDL
2
2
2
2
E3 E1 499/F_DIS E3 E1 499/F_DIS
1
1
J3 J9 J3 J9
1
N1 M9 N1 M9
1
10 10 VSS_3 VDD_3 10 10 VSS_3 VDD_3
10 10
1
D2 C7 C27 C37 C40 C23 D2 C7 C686 C693 C691 C682
D8 C9 D8 C9
2
F8 G3 6.3 6.3 10 25 F8 G3 6.3 6.3 10 25
603 603 603 603 603 603
1
1
C C
C712 C45 C64 C20 C46 C684 C713 C699
2
2
U38 U3
10 10 10 10 10 10 10 10
MAB0 M8 G8 MDB46 MAB0 M8 G8 MDB56
M3 A1 DQ1 G2 M3 A1 DQ1 G2
MAB2 M7 H7 MDB47 MAB2 M7 H7 MDB59
MAB4 N8 H1 MDB41 MAB4 N8 H1 MDB60
MAB6 N7 F1 MDB40 MAB6 N7 F1 MDB61 CLKB1
MAB7 A6 DQ6 MDB45 MAB7 A6 DQ6 MDB58 CLKB1#
P2 A7 DQ7 F9 P2 A7 DQ7 F9
A8 DQ8 A8 DQ8
2
M2 A10 DQ10 D7 M2 A10 DQ10 D7
MAB11 P7 D3 MDB33 MAB11 P7 D3 MDB55 R33 R37
A11 DQ11 MDB32 A11 DQ11 MDB54 56_DIS 56_DIS
22 B_A12 R2 A12 DQ12 D1 22 B_A12 R2 A12 DQ12 D1
D9 MDB38 D9 MDB51
1
B_BA0 DQ13 MDB35 B_BA0 DQ13 MDB53
L2 BA0 DQ14 B1 L2 BA0 DQ14 B1
B_BA1 L3 B9 MDB36 B_BA1 L3 B9 MDB50
BA1 DQ15 BA1 DQ15
1
DQMB#4 B3 DQMB#6 B3 C33
DQMB#5 UDM QSB4 DQMB#7 UDM QSB6 470P_DIS
F3 LDM UDQS B7 F3 LDM UDQS B7
A8 QSB#4 A8 QSB#6
2
RASB1# UDQS# RASB1# UDQS#
22 RASB1# K7 RAS 22 RASB1# K7 RAS
CASB1# L7 F7 QSB5 CASB1# L7 F7 QSB7
22 CASB1# CAS LDQS 22 CASB1# CAS LDQS
WEB1# K3 E8 QSB#5 WEB1# K3 E8 QSB#7 50
22 WEB1# WE LDQS# 22 WEB1# WE LDQS#
CSB1_0# L8 CSB1_0# L8
22 CSB1_0# CS +1.8V_RUN 22 CSB1_0# CS +1.8V_RUN
CKEB1 K2 A2 CKEB1 K2 A2
22 CKEB1 CKE NC1 22 CKEB1 CKE NC1
ODTB1 K9 E2 ODTB1 K9 E2
22 ODTB1 ODT NC2 22 ODTB1 ODT NC2
NC3 L1 NC3 L1
2
2
CLKB1 J8 R3 CLKB1 J8 R3
22 CLKB1 CLK NC4 22 CLKB1 CLK NC4
CLKB1# K8 R7 R637 CLKB1# K8 R7 R41
22 CLKB1# CLK# NC5 22 CLKB1# CLK# NC5
B +1.8V_RUN J1 +1.8V_RUN J1 B
1
1
VDDL VREF_B2 VDDL VREF_B3
VREF J2 VREF J2
J7 VSSDL J7 VSSDL
2
2
2
2
E3 E1 499/F_DIS E3 E1 499/F_DIS
1

J3 J9 J3 J9
1
1
N1 M9 N1 M9
1
1
10 10 VSS_3 VDD_3 10 10 VSS_3 VDD_3
10 10
2
1
D2 C7 C690 C688 C698 C695 D2 C7 C24 C19 C29 C47
D8 C9 D8 C9
1
2
F8 G3 6.3 6.3 10 25 F8 G3 6.3 6.3 10 25
603 603 603 603 603 603
1
1
C705 C697 C703 C702 C704 C51 C49 C687
2
10 10 10 10 10 10 10 10
A A
QUANTA
Title
COMPUTER
VGA-M82-S (VRAM)

GM3 2B

5 4 3 2 1
5 4 3 2 1
DIS:CXCG900U000 / EXC24CG900U L72

ATI_HDMI_TX2-_L 1 2 HDMI_TX2-
ATI_HDMI_TX2+_L 4 3 HDMI_TX2+
UMA:CXCG240U000 / EXC24CG240U
EXC24CG900U_DU
R689 0_NC
1 2
UMA_HDMI_CLK+_R R256 150_NC HDMI_CLK_C C277 0.1U_NC UMA_HDMI_CLK-_R JHD1
20 R690 0_NC
UMA_HDMI_TX0+_R R265 150_NC HDMI_TX0_C C287 0.1U_NC UMA_HDMI_TX0-_R UMA_HDMI_TX2+_R R124 0_UMA ATI_HDMI_TX2+_L HDMI_TX2+ SHELL1 +5V_RUN
1 D2+ 1 2
UMA_HDMI_TX1+_R R271 150_NC HDMI_TX1_C C298 0.1U_NC UMA_HDMI_TX1-_R UMA_HDMI_TX2-_R R122 0_UMA ATI_HDMI_TX2-_L HDMI_TX2-
2
3
D2 Shield 8
D
UMA_HDMI_TX1+_R R117 0_UMA ATI_HDMI_TX1+_L HDMI_TX1+ D2- L70 D
4 D1+ 2
2
UMA_HDMI_TX2+_R R273 150_NC HDMI_TX2_C C305 0.1U_NC UMA_HDMI_TX2-_R 5 ATI_HDMI_TX1-_L 1 2 HDMI_TX1-
UMA_HDMI_TX1-_R R113 0_UMA ATI_HDMI_TX1-_L HDMI_TX1- D1 Shield D3 ATI_HDMI_TX1+_L HDMI_TX1+
6 D1- 4 3
UMA_HDMI_TX0+_R R92 0_UMA ATI_HDMI_TX0+_L HDMI_TX0+ 7 RB751V-40
D0+ EXC24CG900U_DU
8 UMA_HDMI_TX0-_R R86 0_UMA ATI_HDMI_TX0-_L HDMI_TX0-
8
9
D0 Shield
1
UMA_HDMI_CLK+_R R106 0_UMA ATI_HDMI_CLK+_L HDMI_CLK+ D0- R684 0_NC
10 CK+
UMA_HDMI_TX2+_R 11 1 2
UMA_HDMI_TX2-_R UMA_HDMI_CLK-_R R101 0_UMA ATI_HDMI_CLK-_L HDMI_CLK- CK Shield
12 CK-
13 R686 0_NC
UMA_HDMI_TX1+_R CE Remote
14 NC 1 2
UMA_HDMI_TX1-_R HDMI_SCL_R R668 0_UMA HDMI_DDC_CLK HDMI_DDC_CLK 15 DIS Used 6.8K CS26802JB11
HDMI_SDA_R R670 0_UMA HDMI_DDC_DATA HDMI_DDC_DATA DDC CLK
16 DDC DATA UMA Used 2.2K CS22202JB18
UMA_HDMI_TX0+_R 17 L64
GND
1
UMA_HDMI_TX0-_R 18 ATI_HDMI_TX0-_L 1 2 HDMI_TX0-
ATI_HDMI_DET R671 10K_DIS HDMI_DET +5V ATI_HDMI_TX0+_L HDMI_TX0+
19 HP DET 4 3
UMA_HDMI_CLK+_R 21 R76 R80
UMA_HDMI_CLK-_R SHELL2 2.2K_DU 2.2K_DU EXC24CG900U_DU
R235 3.3k_UMA SDVO_CTRLCLK
POP FOR UMA 16 R843 FOX_QJ1119L-NV13-8F
+3.3V_RUN
2
DEPOP FOR DIS 2 1
+3.3V_DELAY
R676 0_NC
R236 3.3k_UMA SDVO_CTRLDATA HDMI_DET_L R278 1K_UMA HDMI_DET 0 1 2
F1
EXT_SWING R233 649/F_UMA AVCC R677 0_NC
FM6 use 5.6K +5V_RUN 1 2
2 1
1 1 2
+3.3V_RUN
U13 R845 0_NC
29
28
26
25
23
22
20
19
42
16
POLY SWITCH 1.1A_NC
2
8 C71 L66
HTPLG
EXT_SWING
TX2+
TX2-
TX1+
TX1-
TX0+
TX0-
TXC+
TXC-
L29 0.1U_NC ATI_HDMI_SCL 1 3 HDMI_DDC_CLK ATI_HDMI_CLK-_L 1 2 HDMI_CLK-
2 VCC_PWR 1 2 +1.8V_RUN ATI_HDMI_CLK+_L 4 3 HDMI_CLK+
VCC BLM18PG181SN1_UMA
C
VCC 43 C
9 EXC24CG900U_DU
VCC Q108
2
C349 0.1U_UMA S_INT+ 46 48 C272 C271 C348 C325 C324 C322 C335 C327 C351
6 SDVOB_INT+ SDI+ VCC FDV301N_DIS
C350 0.1U_UMA S_INT- 47 38 100P_UMA 1000P_UMA1000P_UMA1000P_UMA1000P_UMA0.1U_UMA 0.1U_UMA 0.1U_UMA 10U_UMA R680 0_NC
6 SDVOB_INT- SDI- VCC ATI_HDMI_SDA 1 3 HDMI_DDC_DATA 1 2
51 5 R681 0_NC
6 SDVOB_RED+ SDR+ GND
6 SDVOB_RED- 52 SDR- GND 10 1 2
L27 Q109
54 21 AVCC 1 2 FDV301N_DIS
6 SDVOB_GREEN+ SDG+ AVCC +1.8V_RUN
55 27 BLM18AG121SN1D_UMA
6 SDVOB_GREEN- SDG- AVCC
C302 C286 C303 C301
Pop for ATI Graphic
6 SDVOB_BLUE+ 57
58
SDB+ SiI1392 AGND 18
24 1000P_UMA 0.1U_UMA 1000P_UMA 10U_UMA U9
6 SDVOB_BLUE- SDB- AGND
30 HDMI_TX1+ 1 6 HDMI_TX2+
AGND I/O I/O
2 VN VP 5 +5V_RUN
60 L23 HDMI_TX1- 3 4 HDMI_TX2-
6 SDVOB_CLK+ SDC+ I/O I/O
61 64 OVCC 1 2 +3.3V_RUN R682 2 1 499/F_DIS ATI_HDMI_CLK+_L C746 0.1U_DIS ATI_HDMI_CLK+
6 SDVOB_CLK- SDC- OVCC BLM18AG121SN1D_UMA R679 2 1 499/F_DIS ATI_HDMI_CLK-_L C742 0.1U_DIS ATI_HDMI_CLK- SRV05-4_NC
R277 1k_UMAEXT_RES 49
EXT_RES PVCC1 C268 C275
PVCC1 17
1U_UMA 10U_UMA
1 31 PVCC2 L25 R692 2 1 499/F_DIS ATI_HDMI_TX2+_L C768 0.1U_DIS ATI_HDMI_TX2+_R
6,12,30,33,34,42 PLTRST# RESET# PVCC2
SDVO_CTRLCLK 7 32 AVCC33V PVCC1 1 2 +1.8V_RUN R688 2 1 499/F_DIS ATI_HDMI_TX2-_L C767 0.1U_DIS ATI_HDMI_TX2-_R U7
6 SDVO_CTRLCLK SDSCL AVCC3.3
SDVO_CTRLDATA 6 33 VCC_PWR BLM18AG121SN1D_UMA HDMI_CLK+ 1 6 HDMI_TX0+
6 SDVO_CTRLDATA SDSDA RSVD I/O I/O
2 VN VP 5 +5V_RUN
HDMI_A1 8 C270 C269 C266 HDMI_CLK- 3 4 HDMI_TX0-
A1 L24 0.1U_UMA 1000P_UMA1U_UMA R687 ATI_HDMI_TX1+_L ATI_HDMI_TX1+_R I/O I/O
2 1 499/F_DIS C762 0.1U_DIS
HDMI_SDA_R 12 50 SVCC 1 2 +1.8V_RUN R685 2 1 499/F_DIS ATI_HDMI_TX1-_L C751 0.1U_DIS ATI_HDMI_TX1-_R SRV05-4_NC
R234 HDMI_SCL_R SDADDC SVCC0 BLM18AG121SN1D_UMA
B
11 SCLDDC SVCC1 56 B
1k_UMA
C280 C276 C273 C340 C288 L28
41 100P_UMA
1000P_UMA0.1U_UMA
1000P_UMA10U_UMA PVCC2 1 2 +1.8V_RUN R678 2 1 499/F_DIS ATI_HDMI_TX0+_L C737 0.1U_DIS ATI_HDMI_TX0+_R
GND BLM18AG121SN1D_UMA R673 1 499/F_DIS ATI_HDMI_TX0-_L C734 0.1U_DIS ATI_HDMI_TX0-_R
SPDIF/HDSDO
14 SCLROM GND 45 2
13 53
SDAROM SGND Reserve for EMI and close to HDMI CONN
HDASYNC
59 L26 C311 C310 C323

HDAVCC
SGND
HDBCLK
3
SPVCC 0.1U_UMA 1000P_UMA1U_UMA
HDRST
62 1 2 +3.3V_RUN
HDSDI
SPVCC
LINT#
LSDA
BLM18AG121SN1D_UMA
LSCL
+5V_RUN 2
44 63 Q12
TEST SPGND C283 C284 C282 2N7002W-7-F_DIS
1
SiI1392_UMA 100P_UMA 1000P_UMA10U_UMA L32
39
37
35
36
40
34
4
3
15
AVCC33V 1 2 +3.3V_RUN ATI_HDMI_DET ATI_HDMI_DET 19

BLM18AG121SN1D_UMA
11 ICH_AZ_HDMI_BITCLK +3.3V_DELAY
C317 C334 C343 C321 ATI_HDMI_TX2+_R
19 ATI_HDMI_TX2+_R
R237 4.7k_UMA +3.3V_RUN 0.1U_UMA 1000P_UMA10U_UMA 1000P_UMA
ATI_HDMI_TX2-_R
19 ATI_HDMI_TX2-_R
ATI_HDMI_TX1+_R
19 ATI_HDMI_TX1+_R
ICH_AZ_HDMI_SDOUT 11
ATI_HDMI_TX1-_R
ICH_AZ_HDMI_SYNC 11 19 ATI_HDMI_TX1-_R
1
ICH_AZ_HDMI_SDIN1_L R285 0_UMA
ICH_AZ_HDMI_SDIN1 11
ATI_HDMI_TX0+_R
ICH_AZ_HDMI_RST# 11 19 ATI_HDMI_TX0+_R
R66 R100
ATI_HDMI_TX0-_R 4.7K_DIS 4.7K_DIS
19 ATI_HDMI_TX0-_R
2
L31
HDAVCC 1 ATI_HDMI_SCL
2 +3.3V_RUN
BLM18AG121SN1D_UMA
19 ATI_HDMI_SCL
ATI_HDMI_SDA
1
19 ATI_HDMI_SDA
A A
C326
0.1U_UMA ATI_HDMI_CLK+
19 ATI_HDMI_CLK+
19 ATI_HDMI_CLK-
ATI_HDMI_CLK- QUANTA
Title
COMPUTER
SiI 1362

GM3 2B

5 4 3 2 1
5 4 3 2 1
D D
1 R6 0_DIS
2 ATI_LCD_BCLK-
LCD_BCLK-_C 1 R604 0_UMA
2
J1 UMA_LCD_BCLK-_C 6
1 R7 0_DIS
2 ATI_LCD_BCLK+
50 LCD_BCLK-_C LCD_BCLK+_C 1 R605 0_UMA
2
50 UMA_LCD_BCLK+_C 6
49 LCD_BCLK+_C 1 R8 0_DIS
2 ATI_LCD_B3-
49 LCD_B3- R606 0_UMA
48 48 1 2 UMA_LCD_B3- 6
47 LCD_B3- 1 R9 0_DIS
2 ATI_LCD_B3+
47 LCD_B3+ LCD_B3+ R607 0_UMA
46 46 1 2 UMA_LCD_B3+ 6
45 1 R10 0_DIS
2 ATI_LCD_B2-
45 LCD_B2- LCD_B2- R608 0_UMA
44 44 1 2 UMA_LCD_B2- 6
43 LCD_B2+ 1 R11 0_DIS
2 ATI_LCD_B2+
43 LCD_B2+ R609 0_UMA +LCDVCC +3.3V_RUN
42 42 1 2 UMA_LCD_B2+ 6
41 LCD_B1- 1 R12 0_DIS
2 ATI_LCD_B1-
+15V_ALW +3.3V_RUN +LCDVCC 41 LCD_B1+ LCD_B1- R610 0_UMA
40 40 1 2 UMA_LCD_B1- 6
Q65 39 1 R13 0_DIS
2 ATI_LCD_B1+
FDC655BN 39 LCD_B0- LCD_B1+ R611 0_UMA
38 38 1 2 UMA_LCD_B1+ 6
1
6 37 LCD_B0+ 1 R14 0_DIS
2 ATI_LCD_B0-
37
2
5 4 36 LCD_B0- 1 R612 0_UMA
2 C676 C675 C671
36 UMA_LCD_B0- 6
R590 2 35 LCD_ACLK-_C 1 R15 0_DIS
2 ATI_LCD_B0+ 0.1U 0.047U 0.1U
2
330K 35 LCD_ACLK+_C LCD_B0+ R613 0_UMA
1 34 34 1 2 UMA_LCD_B0+ 6
2
33 1 R16 0_DIS
2 ATI_LCD_ACLK-
33
2
R588 32 LCD_A3- LCD_ACLK-_C 1 R614 0_UMA
2 10 10 10
UMA_LCD_ACLK-_C 6
3
47 C670 C677 32 LCD_A3+ R17 0_DIS ATI_LCD_ACLK+
31 31 1 2
LCDVCC_ON 22U 0.01U 30 LCD_ACLK+_C 1 R615 0_UMA
2 UMA_LCD_ACLK+_C 6
1
30 LCD_A2- R18 0_DIS ATI_LCD_A3-
29 1 2
1
29
2
28 LCD_A2+ LCD_A3- 1 R616 0_UMA
2
28 UMA_LCD_A3- 6
2
25 27 1 R19 0_DIS
2 ATI_LCD_A3+
R592 C672 805 27 LCD_A1- LCD_A3+ R617 0_UMA
26 26 1 2 UMA_LCD_A3+ 6
100K_NC 0.01U 25 LCD_A1+ 1 R20 0_DIS
2 ATI_LCD_A2-
1
25 LCD_A2- R618 0_UMA
24 1 2 UMA_LCD_A2- 6
1
24 LCD_A0- R21 0_DIS ATI_LCD_A2+
23 23 1 2
25 22 LCD_A0+ LCD_A2+ 1 R619 0_UMA
2
22 UMA_LCD_A2+ 6
UMA_ENVDD 1 R593 0_UMA
2 ENVDD +3.3V_ALW +15V_ALW 21 1 R22 0_DIS
2 ATI_LCD_A1-
6 UMA_ENVDD 21
3
3
C 20 LCD_DDCCLK LCD_A1- 1 R620 0_UMA
2 C
20 UMA_LCD_A1- 6
2 2 19 LCD_DDCDAT 1 R23 0_DIS
2 ATI_LCD_A1+
Q62 19 LCD_A1+ R621 0_UMA
18 18 1 2 UMA_LCD_A1+ 6
1
Q63 2N7002W-7-F 17 1 R24 0_DIS

2 ATI_LCD_A0-
+3.3V_RUN
1
1
R589 R591 2N7002W-7-F 17 LCD_A0- R622 0_UMA
16 16 1 2 UMA_LCD_A0- 6
47K_NC 47K 15 1 R25 0_DIS
2 ATI_LCD_A0+ Adress : A9H --Contrast
R603 0_NC 15 +LCDVCC LCD_A0+ R623 0_UMA
14 1 2 UMA_LCD_A0+ 6
Support the new imbeded 1 2
14
13 1 R26 0_DIS
2 AAH --Backlight
LCD_TST 31 ATI_LCD_DDCCLK 19
2
13 LCD_DDCCLK R624 0_UMA

12 1 2 UMA_LCD_DDCCLK 6
diagnostics. 12
11 1 R27 0_DIS
2
11 +GFX_PWR_SRC ATI_LCD_DDCDAT 19
D24 10 LCD_DDCDAT 1 R625 0_UMA
2
10 UMA_LCD_DDCDAT 6
3
ENVDD 1 9 BACKLITE_DPST
9
3 EN_LCDVCC 2
8
7
8
7
+5V_ALW FOR ATI & UMA DIFFERENT LVDS PATH
Q64 6
6 SMBCLK1 17,31,39
2 DDTC124EUA-7-F 5
31 LCDVCC_TST_EN 5 SMBDAT1 17,31,39
4 INVERTER_CBL_DET# 31
1
BAT54C T/R 4
3 3 LCD_BAK# 31
1
2 C678 C679
2 PWM_VADJ 31
1 47P_NC 47P_NC
1 LCD_CBL_DET# 31
2
IPX_20323-050ED11
Shunt capacitors on LVDS for improving WWAN. GFX_PWR_SRC layout note:
50 50
UMA +3.3V_RUN 40 mil trace for tube type
LCD_B0- C11 1 2 3.3P_NC LCD_B0+ 45 mil for white LED type
LCD_B1- C10 1 2 3.3P_NC LCD_B1+ 65mil for RGB LED type
LCD_B2- C9 1 50 2 3.3P_NC LCD_B2+
LCD_A0- C6 1 50 2 3.3P_NC LCD_A0+
R726 R721 LCD_A1- C15 1 50 2 3.3P_NC LCD_A1+
10K_DIS 10K_UMA LCD_A2- C14 1 50 2 3.3P_NC LCD_A2+
LCD_A3- C13 1 50 2 3.3P_NC LCD_A3+
LCD_B3- C8 1 50 2 3.3P_NC LCD_B3+
50
2 1 BACKLITE_DPST 50
6 UMA_BIA_PWM U43F
R109 0_NC LCD_ACLK-_C
ATI_BIA_PWM 2 1 BACKLITE_DPST PART 7 OF 7 10K_DIS
2
B R108 0_NC B
2
R4 AJ26 AG7 ATI_BIA_PWM

C12 +LVDDR LVDDR_1 Control VARY_BL R75 0_DIS
0_NC AH26 LVDDR_2
3.3P_NC AJ6 ATI_ENVDD_R
2 1 ENVDD
1
DIGON
1
LCD_ACLK+_C AK27
50 +LVDDC LVDDC_1 ATI_LCD_BCLK+
AL27 LVDDC_2 TXCLK_UP AK24
AL24 ATI_LCD_BCLK-
TXCLK_UN ATI_LCD_B0+
AM24 LVSSR_1 TXOUT_U0P AN27
LCD_BCLK-_C AN28 AN26 ATI_LCD_B0-
LVSSR_2 TXOUT_U0N ATI_LCD_B1+
AN21 LVSSR_3 TXOUT_U1P AP27
2
AN24 AR27 ATI_LCD_B1-

LVSSR_4 TXOUT_U1N
2
R5 AN25 AG24 ATI_LCD_B2+

C7 LVSSR_5 TXOUT_U2P ATI_LCD_B2-
0_NC AM22 LVSSR_6 TXOUT_U2N AH24
Populate R65 for DPST ATI_LCD_B3+
3.3P_NC TUNE EMI DESIGN AP21 AK26
LVDS channel
1
LVSSR_7 TXOUT_U3P ATI_LCD_B3-

implementation only. AP26 AL26
1
LCD_BCLK+_C LVSSR_8 TXOUT_U3N

AM27 LVSSR_9
50 AR21 AR22 ATI_LCD_ACLK+
LVSSR_10 TXCLK_LP ATI_LCD_ACLK-
AR26 LVSSR_11 TXCLK_LN AP22
AM26 AN23 ATI_LCD_A0+
LVSSR_12 TXOUT_L0P ATI_LCD_A0-
AJ22 LVSSR_13 TXOUT_L0N AN22
Populate R341 for AJ24 AP23 ATI_LCD_A1+
+PWR_SRC +GFX_PWR_SRC LVSSR_14 TXOUT_L1P ATI_LCD_A1-
platform without DPST TXOUT_L1N AR23
AP24 ATI_LCD_A2+
support. No Stuff for TXOUT_L2P ATI_LCD_A2-
Discrete DSPT support
65mil TXOUT_L2N AR24
ATI_LCD_A3+
65mil 4
6
5
+LPVDD AL22
AK22
LPVDD TXOUT_L3P AP25
AR25 ATI_LCD_A3-
due to back up plan. 2
LPVSS TXOUT_L3N
1
1
M86-LP_DIS
2
Q4 C17 C16
3
R29 C18 FDC658AP 0.1U 0.1U

2
100K 0.1U
1
2
50 50
50
603 603
A A
2
603
R28
100K
1
QUANTA
3
2 Q5
20,44,48,49,53 RUN_ON
2N7002W-7-F
COMPUTER
1
Title
LCD CONN & CK-SSCD

GM3 2B

5 4 3 2 1
A B C D E
4 4
+3.3V_RUN +5V_RUN
2
D25 D26 D27 D2
2
DA204U_NC DA204U_NC DA204U_NC SDM10K45-7-F
ATI & UMA RGB SWITCH
1
Layout Note:
Setting R,G,B treac
3
impedance to 50 ohm.
R639 0_DIS 5V_CRT_REF
19 ATI_VGA_RED
R640 0_UMA RED_L L5 RED
6 UMA_VGA_RED BLM18BB750SN1D
603
PAD T2 M_SEN#_R
R635 0_DIS
19 ATI_VGA_GRN
R638 0_UMA GREEN_L L4 GREEN
6 UMA_VGA_GRN BLM18BB750SN1D
603 JVGA1
6
R631 0_DIS 11
19 ATI_VGA_BLU
R632 0_UMA BLUE_L L3 BLUE 1
6 UMA_VGA_BLU BLM18BB750SN1D
603 7
2
3 1 12 3
1
R36 R42 R46 2
150/F 150/F 150/F C31 C36 C41 C32 C35 C43 8
22P 22P 22P 10P 10P 10P
11 13
2
2
3
1
9
50 50 50 50 50 50 14
PAD T94 M_ID2# 4
+3.3V_RUN 10
R633 0_DIS ATI_DAT_DDC2_C +CRT_VCC 15
19 ATI_CRT_DAT_DDC
5
R30 0_DIS ATI_CLK_DDC2_C
19 ATI_CRT_CLK_DDC
3
1
Suyin_070549FR015S512ZR
3
1
C681 RP47
2
0.01U 2.2KX2 C701 RP48
0.01U 2.2KX2
ATI & UMA DATA/CLK SWITCH
1
Q67
1
NEED ADD 0 OHM ON GM SIDE BSS138_NL
4
2
+5V_RUN +CRT_VCC 25
4
2
R32 ATI_DAT_DDC2_C 1 3 25 G_DAT_DDC2_C
6 UMA_CRT_DAT_DDC
0_UMA
D1 SDM10K45-7-F R655 1K
2 1 2 1 6 UMA_CRT_CLK_DDC
2
+3.3V_RUN
5
2
R657 0_DIS U39
19 ATI_VGAHSYNC
R656 0_UMA R629 10
6 UMA_VGAHSYNC
VGAHSYNC_L
2 4 VGAHSYNC_R 1 2 R626 ATI_CLK_DDC2_C 1 3 G_CLK_DDC2_C
0_UMA
1
2 2
74AHCT1G125GW Q66
C707 BSS138_NL C21 C700
0.1U Place near 10P_NC 10P_NC
2
2 1 U24,U25 <
200 mil 50 50 L2 BLM18AG121SN1D
HSYNC JVGA_HS
5
603
R654 0_DIS U40
19 ATI_VGAVSYNC
R653 0_UMA R628 10 L1 BLM18AG121SN1D
6 UMA_VGAVSYNC
VGAVSYNC_L
2 4 VGAVSYNC_R 1 2 VSYNC JVGA_VS
603
1
74AHCT1G125GW
C22 C26 C28 C25
ATI & UMA H/V SWITCH 10P_NC 10P_NC 10P 10P
2
2
50 50 50 50
Place near JVGA1 connector <

200 mil
1 1
QUANTA
Title
COMPUTER
CRT&TV CONN

GM3 2B

A B C D E
A B C D E
+3.3V_R5C833
1
C933 C641 C653 C654 C967 C968
10U 0.01U 0.01U 0.01U 0.01U 0.01U
2
1 1
6.3 25 25 25 25 25
+3.3V_R5C833
603 +3.3V_R5C833
Place the power caps close

U49B to the relation pins. +3.3V_RUN R836 +3.3V_R5C833
0
1
10 VCC_PCI1 VCC_3V 67 1 2
C965 C960 C966 C959 20
10U 0.1U 0.01U 0.01U VCC_PCI2
27
2
VCC_PCI3
1
32 VCC_PCI4
Place the power caps close 41 C941 C961 805
6.3 10 25 25 VCC_PCI5 0.1U 10U
to the relation pins. 128
2
VCC_PCI6
61 VCC_RIN
603 10 6.3
16 VCC_ROUT1
34 VCC_ROUT2
64 603
VCC_ROUT3
1
1
114 VCC_ROUT4
C937 C936 C969 C964 120
0.01U 0.01U 0.47U 0.47U VCC_ROUT5
2
2
VCC_MD 86
25 25 10 10
12 PCI_AD[31..0] GND1 4
GND2 13
PCI Bus 603 603 PCI_AD31 125 22
PCI_AD30 AD31 GND3
126 AD30 GND4 28
PCI_AD29 127 54
2 PCI_AD28 AD29 GND5 2
PowerOnReset for VccCore 1 AD28 GND6 62
PCI_AD27 2 63
PCI_AD26 AD27 GND7
3 AD26 GND8 68
PCI_AD25 5 118
PCI_AD24 AD25 GND9
6 AD24 GND10 122
PCI_AD23 9
PCI_AD22 AD23
11 AD22
+3.3V_R5C833 PCI_AD21 12 99
PCI_AD20 AD21 AGND1
14 AD20 AGND2 102
PCI_AD19 15 103
AD19 AGND3
1
PCI_AD18 17 107
PCI_AD17 AD18 AGND4
18 AD17 AGND5 111
R818 PCI_AD16 19
100K PCI_AD15 AD16
36 AD15
PCI_AD14 37 +3.3V_R5C833 +3.3V_R5C833
2
PCI_AD13 AD14
38 AD13
PCI_AD12 39 AD12
1
1
C956 PCI_AD11 R825 10K
PCI / OTHER
40 AD11
GBRST# should be asserted only 1U PCI_AD10 42 69 1 2 +3.3V_R5C833
PCI_AD9 AD10 HWSPND# R838 R839
43 Memory Stick Enable
when system power supply is on.
2
PCI_AD8 AD9 10K 100K

44 AD8
PCI_AD7 46 XD Card Enable
2
10 PCI_AD6 AD7
47 AD6 MSEN 58
PCI_AD5 48
PCI_AD4 AD5 Serial ROM disable
49 AD4 XDEN 55
603 PCI_AD3 50
PCI_AD2 AD3 SD Card Enable
PCI Bus 51 AD2
PCI_AD1 52 57 MMC Card Enable
PCI_AD0 AD1 UDIO5
53 AD0
12 PCI_PAR 33 PAR
12 PCI_C_BE3# 7 C/BE3# UDIO3 65
3 3
12 PCI_C_BE1# 35 C/BE1#
PCI_AD17 8
R572 100 IDSEL
UDIO1 60
12 PCI_REQ0# 124 REQ#
12 PCI_GNT0# 123 GNT# UDIO0/SRIRQ# 72 IRQ_SERIRQ 13,31
12 PCI_FRAME# 23 FRAME#
12 PCI_IRDY# 24 IRDY#
12 PCI_TRDY# 25 TRDY# PCI Bus
12 PCI_DEVSEL# 26 DEVSEL#
12 PCI_STOP# 29 115 PCI_PIRQB# 12
1394 Interrupt
STOP# INTA#
12 PCI_PERR# 30 PERR#
12 PCI_SERR# 31 116 PCI_PIRQC# 12
Media card Interrupt
SERR# INTB#
71 GBRST#
12 PCI_RST# 119 PCIRST#
17 CLK_PCI_PCCARD 121 PCICLK

R819 2 1 0 70 66 T145 PAD
12,31 ICH_PME# PME# TEST
1
13,31 CLKRUN# 117 CLKRUN#

The ICH schematics need to include a R834
CoreLogic CLOCKRUN# pull-up resistor to implement CLKRUN#, 100K
and the ICH schematics must have a
2
pull-down, or constantly drive thesignal

low, in order to disable CLKRUN#.
CLK_PCI_PCCARD
4 Refer to DELL 4
1
M07 schematic
R803 X06
22
QUANTA
1 2
C928
1P Title
COMPUTER
2
8 IN 1 CONTROLLER
50 Size Document Number Rev

GM3 2B

A B C D E
A B C D E
80 mils
L85
BLM18PG181SN1D
+3.3V_RUN_PHY +3.3V_R5C833
modify
1
1 1
U49A C938 C935 C636 C635 603
10U 0.1U 0.01U 1000P
2
603 10 25 50
98 Place these caps as close to the R5C833 as possible.
AVCC_PHY1
AVCC_PHY2 106
110 6.3
AVCC_PHY3
AVCC_PHY4 112
AS CLOSE AS POSSIBLE TO R5C833

113 TPBIAS0
GUARD GND TPBIAS0 C929 0.33U
603
1394_XI 94 16
C940 XI R802 R801
22P C931 0.01U
50 Y4 56.2/F 56.2/F 25
24.576MHZ 104 TPB0N
TPBN0
1394_XO 1 2 95 105 TPB0P
C939 R804 0 XO TPBP0
22P
50
IEEE1394/SD
Populate C266 for *TPA0P/TPA0N,TPB0P/TPB0N pair trace : As close as possible.

TPA0N *TPA0P/TPA0N,TPB0P/TPB0N pair trace : Same length electrically.
R5C832 chipset. 4 TPAN0 108
*Termination resistor for TPA+/- TPB+/- : As close as possible to its cable driver (device pin out).
RICOH_FILO 96 109 TPA0P
C934 FIL0 TPAP0
2 0.01U_NC 2
25
R793 1 10K/F 2RICOH_REXT101
REXT
R800 R799 C930 270P
25
RICOH_VREF100 56.2/F 56.2/F
C932 VREF
0.01U R794 5.11K/F
25
5/14:FAE review report say RC533
don't need FILO item, Circuit area : As small as possible. L82
so NC it DLW21HN181SQ2L_NC
MDIO17 87 XD/MMC_DATA7 30 3 3 4 4
Place these caps as close AS CLOSE AS POSSIBLE TO
to the IC as possible. MDIO16 92 XD/MMC_DATA6 30 2 2 1 1
1394 CONNECTOR.
MDIO15 89 XD/MMC_DATA5 30
MDIO14 91 XD/MMC_DATA4 30
R751 0
90 TPB0N 1 2 TPB0-
MDIO13 SD/XD/MS_DATA3 30
R750 0
93 TPB0P 1 2 TPB0+
R752 0
81 TPA0N 1 2 TPA0-
R754 0
82 TPA0P 1 2 TPA0+
L83
75 DLW21HN181SQ2L_NC
MDIO05 XD_WP# 30
3 3 4 4
3 3
MDIO08 88 SD/XD/MS_CMD 30 +3.3V_R5C833 2 2 1 1
AS CLOSE AS POSSIBLE TO
MDIO19 83 XD_ALE 30 1394 CONNECTOR.
85 CON1
MDIO18 XD_CLE 30
2
FOX_UV31413-WS51P-7F
78 R814
MDIO02 XD_CE# 30
10K_NC TPB0- 1 1
1
77 TPB0+ 2
SD_WP#(XDR/B#) 30
1
MDIO03 2
close to the Chip
80 SD_CD# 2 1 TPA0- 3
MDIO00 XD_CDSW# 30 3
D32 1SS355
SD_CD# 30
TPA0+ 4
MS_INS# 4
MDIO01 79 2 1
5
6
7
8
D33 1SS355
MS_INS# 30
5
6
7
8
MDIO09 84 SD/XD/MS_CLK 30
MDIO04 76 MC_PWR_CTRL_0 30
MDIO06 74
PAD
97 T141
RSV
MDIO07 73
33
4 4
QUANTA
Title
COMPUTER
IEEE 1394

GM3 2B

A B C D E
1 2 3 4 5 6 7 8
L59 +1.5V_CARD
12 ICH_USBP7-
12 ICH_USBP7+
4
1
3
2
USBP7_D-
USBP7_D+
Express Card
1
PLW3216S900SQ2T1_NC +1.5V_CARD Max. 650mA, Average 500mA.
C539 C542
R418 0 0.1U 0.1U +3V_CARD Max. 1300mA, Average 1000mA.
2
1 2
R421 0 10 10
1 2
+1.5V_RUN +3.3V_RUN +3.3V_SUS +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
U27
A
Please the cap A
near connector.
17 AUXIN AUXOUT 15
+3.3V_CARD 2 3
3.3VIN_0 3.3VOUT_0
4 3.3VIN_1 3.3VOUT_1 5
CON2 12 11
1.5VIN_0 1.5VOUT_0
1 GND_1 14 1.5VIN_1 1.5VOUT_1 13
1
USBP7_D- 2
C579 C582 C572 USBP7_D+ USB- R452 100K
3 USB+
0.1U 0.1U 10U CPUSB# 4 2 1 ExpressSwitch +3.3V_SUS
+3.3V_SUS
2
CPUSB# CARD_RESET#
5 RSV_0
6 RSV_1 20 SHDN# PERST# 8
10 10 6.3
Please the cap 7 T54 EXPRCRD_STDBY# 1 10 EXPRCRD_PWREN# R439 2 1 100K
13,33,34 ICH_SMBCLK SMBCLK PAD STBY# CPPE#
near connector. 8 6 9 CPUSB# R447 2 1 100K
13,33,34 ICH_SMBDATA SMBDATA 6,12,25,33,34,42 PLTRST# SYSRST# CPUSB#
9 +1.5V_0 OC# 19
603 10 16
+1.5V_CARD +1.5V_1 NC
13,33,34,42 PCIE_WAKE# 11 WAKE# 7 GND0 RCLKEN 18
+3.3V_CARDAUX 12 +3.3VAUX
CARD_RESET# 13 PERST# R5538D001-TR-F
+3.3V_CARD 14 +3.3V_1
15 +3.3V_2
17 CARD_CLK_REQ# 16 CLKREQ#
EXPRCRD_PWREN# 17 3.3
31 EXPRCRD_PWREN# CPPE# +1.5V_RUN +3.3V_RUN +3.3V_SUS +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
17 CLK_PCIE_EXPCARD# 18 REFCLK-
17 CLK_PCIE_EXPCARD 19 REFCLK+
20 GND_2
1
12 PCIE_RX4- 21 PERn0
22 C547 C581 C555 C546 C583 C551
12 PCIE_RX4+ PERp0
23 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
2
GND_3
12 PCIE_TX4- 24 PETn0
B 25 B
NC1
NC2
NC3
NC4
12 PCIE_TX4+ PETp0 10 10 10 10 10 10
26 GND_4
Please the cap Please the cap Please the cap Please the cap Please the cap Please the cap
FOX_1CH411BAC-GM near pin 12 & near pin 2 & 4 near pin 17 near pin 15 near pin 3 & 5 near pin 11 &
27
28
29
30
14(1.5VIN). (3.3VIN). (AUXIN). (AUXOUT). (3.3VOUT). 13(1.5VOUT).
JAE PX10FS16PH-26P
PCI-Express TX and RX direct to connector.
+3.3V_RUN_CARD +3.3V_RUN_CARD
(65)
29 XD_CDSW#
CON5
SD_CD# 1 22
29 SD_CD# SD-CD MS-INS MS_INS# 29 29 SD_WP#(XDR/B#)
SD_WP# 2 23 XD/MMC_DATA5
SD-WP SD-DAT5 SD/XD/MS_DATA3
3 XD-VCC MS-DATA3 24 29 XD/MMC_DATA7
XD/MMC_DATA7 4 25 SD/XD/MS_CMD
XD/MMC_DATA6 XD-D7 SD-CMD SD/XD/MS_CLK
C
5 XD-D6 MS-SCLK 26 2 1 29 XD/MMC_DATA6 C
XD/MMC_DATA5 6 27 R768 0 XD/MMC_DATA4
XD/MMC_DATA4 XD-D5 SD-DAT4
7 XD-D4 MS-VCC 28 29 XD/MMC_DATA5
SD/XD/MS_DATA3 8 29 SD/XD/MS_DATA3
SD/XD/MS_DATA2 XD-D3 SD-DAT3 SD/XD/MS_DATA2
9 XD-D2 SD-DAT2 30 29 XD/MMC_DATA4
SD/XD/MS_DATA1 10 31
XD-D1 GND SD/XD/MS_DATA0
11 GND XD-D0 32 29 SD/XD/MS_DATA3
SD/XD/MS_DATA1 12 33 XD_WP#
SD/XD/MS_CMD SD-DAT1 XD-WP SD/XD/MS_CMD
13 MS-BS XD-WE 34 29 SD/XD/MS_DATA2
SD/XD/MS_DATA0 14 35 XD_ALE
SD/XD/MS_DATA1 SD-DAT0 XD-ALE XD_CLE
15 MS-DATA1 XD-CLE 36 29 SD/XD/MS_DATA1
XD/MMC_DATA7 16 37 XD_CE#
SD/XD/MS_DATA0 SD-DAT7 XD-CE SD/XD/MS_CLK
17 MS-DATA0 XD-RE 38 29 SD/XD/MS_DATA0
XD/MMC_DATA6 18 39 SD_WP#(XDR/B#)
SD/XD/MS_DATA2 SD-DAT6 XD-R/B XD_CDSW#
19 MS-DATA2 XD-CD 40 29 SD/XD/MS_CMD
SD/XD/MS_CLK 2 1 20 41
R767 0 SD-CLK GND
21 SD-VCC GND 42 29 XD_WP#
C899
29 XD_ALE
C883 C897 TTN_R015-B10-LV 270P
C884 270P_NC 2.2U 25
29 XD_CLE
270P_NC 25 6.3
25
29 XD_CE#
8 IN1 CARD READER 29 SD/XD/MS_CLK
603 +3.3V_R5C833 +3.3V_RUN_CARD

R760 0_NC
+3.3V_RUN_CARD 1 2 U46
D D
Q72 5 IN OUT 1
3 NC
2N7002W-7-F
C903 C886 C894 R761 SD_WP#(XDR/B#) 3 1 SD_WP#

29 MC_PWR_CTRL_0 4 EN GND 2
C885
QUANTA
0.01U 0.01U 0.01U 150K 1U
TPS2051BDBV Title
COMPUTER
SD Protect
2
25 25 25 C895 10 ExpressCard/SmartCard
0.1U
XD_CDSW# Size Document Number Rev
603 GM3 2B
10
1 2 3 4 5 6 7 8
5 4 3 2 1
U30 +RTC_CELL +3.3V_ALW

+3.3V_ALW 37 KSO[0..18]
R556 0
37 KSI[0..7]
3 1 2 SMBDAT0 1 2 RP43
ITE8512E VBAT1
VCC 11 +3.3V_RUN SMBCLK0 3 4 2.2KX2
2
LQFP-128L
1
KSO17 57 26 +3.3V_ALW C630 SMBDAT1 1 2 RP44
KSO17/GPC5 VSTBY1
2
2
KSO16 56 50 R553 0.1U SMBCLK1 3 4 10KX2
1
C620 C560 C612 C599 C600 KSO15 KSO16/GPC3 VSTBY2
55 KSO15 VSTBY3 92 0_NC
10U 0.1U 0.1U 0.1U 0.1U KSO14 54 114 SMBDAT2 1 2 RP46
1
1
KSO13 KSO14 VSTBY4 10 SMBCLK2
53 121 3 4 2.2KX2
2
KSO12 KSO13 VSTBY5
52 KSO12/SLCT VSTBY6 127
6.3 10 10 10 10 KSO11 51
KSO10 KSO11/ERR
Place these caps close to ITE8512. 46 KSO10/PE
KSO9 45
D 603 KSO8 KSO9/BUSY HWPG D
44 KSO8/ACK ADC0/GPI0 66 HWPG 44
KSO7 43 67 SIO_SLP_S5# 2 1
+3.3V_ALW KSO7/PD7 ADC1/GPI1 IMVP6_PROCHOT# 51
KSO6 42 68 R511 100K_NC
KSO6/PD6 ADC2/GPI2 KB_DET# 37
KSO5 41 KEYBOARD 69 LCD_CBL_DET#
KSO5/PD5 ADC3/GPI3 LCD_CBL_DET# 26
KSO4 40 70 INVERTER_CBL_DET#
KSO4/PD4 ADC4/GPI4 INVERTER_CBL_DET# 26
2
KSO3 39 71
KSO3/PD3 ADC5/GPI5 PBAT_PRES# 54
KSO2 38 72 ADP_OC
R552 KSO1 KSO2/PD2 ADC6/GPI6 SIO_SLP_S5#
37 KSO1/PD1 ADC/DAC ADC7/GPI7 73 SIO_SLP_S5# 13
100K KSO0 36 R683 2 1 0_NC
KSO0/PD0 CIR_ON/OFF# 37
76 R437 2 1 0_NC ADAPT_TRIP_SEL 46
1
D34 KSI7 DAC0/GPJ0
65 KSI7 DAC1/GPJ1 77 SIO_EXT_WAKE# 13
1 2 WRST# KSI6 64 78 IMVP_VR_ON 2 1
39,52 THERM_STP# KSI6 DAC2/GPJ2 LAN_DISABLE# 42
KSI5 63 79 R460 100K_NC
KSI5 DAC3/GPJ3 EXPRCRD_PWREN# 30
KSI4 62 80 SUS_ON 2 1
KSI4 DAC4/GPJ4 ICH_RSMRST# 13
1
SDMK0340L-7-F KSI3 61 81 1 2 R479 100K

KSI3/SLIN DAC5/GPJ5 SIO_PWRBTN# 13
C639 KSI2 60 D15 SDMK0340L-7-F HWPG 2 1
1U KSI1 KSI2/INT R457 100K
59
2
KSI0 KSI1/AFD
58 KSI0/STB
24 ADP_OC R454 1 20
PWM0/GPA0 BREATH_LED# 38 IINP 46
R453 2 1 0_NC
3 22
PWM1/GPA1 25
28
BAT2_LED# 38 ADAPT_OC 46
11,40 ICH_AZ_CODEC_RST# LPCRST/WUI4/GPD2 PWM2/GPA2 FAN1_PWM 39
CLK_PCI_8512 13 29
17 CLK_PCI_8512 LPCCLK PWM3/GPA3 PWM_VADJ 26
11,33 LPC_LFRAME# 6 LFRAME PWM4/GPA4 30 BAT1_LED# 38
10 31 +3.3V_RUN
11,33 LPC_LAD0 LAD0 PWM5/GPA5 KB_BACKLITE_EN 37
11,33 LPC_LAD1 9 LAD1 PWM PWM6/GPA6 32 CAP_LED# 37
11,33 LPC_LAD2 8 LAD2 PWM7/GPA7 34 BEEP 40
7 LCD_BAK# R554 2 1 10K_NC
11,33 LPC_LAD3 LAD3
TACH0/GPD6 47 FAN1_TACH 39
93 48 PANEL_BKEN R513 0_UMA
13,28 CLKRUN# CLKRUN/GPH0/ID0 TACH1/GPD7 UMA_PANEL_BKEN 6
C 5 LPC R510 0_DIS C
13,28 IRQ_SERIRQ SERIRQ ATI_PANEL_BKEN 19 +3.3V_ALW
D21 2 SDMK0340L-7-F
1 15 120
13 SIO_EXT_SMI# ECSMI/GPD4 TMRI0/WUI2/GPC4 LID_SW# 37
D20 2 SDMK0340L-7-F
1 23 124 R456 100K
13 SIO_EXT_SCI# ECSCI/GPD3 TMRI1/WUI3/GPC6 MEDIA_INT# 37
D23 2 SDMK0340L-7-F
1 126 LCD_CBL_DET# 2 1
11 SIO_A20GATE GA20/GPB5 INVERTER_CBL_DET#
26 LCD_TST 17 LPCPD/WUI6/GPE6 2 1
R455 100K
D17 2 SDMK0340L-7-F
1 4 108
11 SIO_RCIN# KBRST/GPB6 RXD/GPB0 WIRELESS_ON/OFF# 38
WRST# 14 109 1 R494 20_NC
WRST TXD/GPB1 AUX_EN_WOWL 34
LCD_BAK# 16 119
26 LCD_BAK# PWUREQ/GPC7 CRX0/GPC0 CIRRX 37
IR/UART CTX0/GPB2 123 RUN_ON_1 44
40 NB_MUTE# 19 L80HLAT/GPE0 CRX1/GPH1/ID1 94 HDDC_EN 36
20 95 IMVP_VR_ON
12,28 ICH_PME# L80LLAT/WUI7/GPE7 CTX1/GPH2/ID2 IMVP_VR_ON 51
+3.3V_ALW
SMBCLK0
Discrete Board ID Straps
46,54 SMBCLK0 110 SMCLK0/GPB3
SMBDAT0 SUS_ON
CHARGE & BAT 46,54 SMBDAT0 111 SMDAT0/GPB4 FLFRAME/GPG2/LF 100
106
SUS_ON 49,53
FLRST/GPG0/TM USB_R_SIDE_EN# 54
SMBCLK1 115 104
17,26,39 SMBCLK1 SMCLK1/GPC1 FLAD3/GPG6 ICH_CL_PWROK 6,13
CLK&LCD$thermal SMBDAT1 116 SMBUS LPC/FWH
17,26,39 SMBDAT1 SMDAT1/GPC2
1
FLASH FLAD2/SO 103 EC_FLASH_SPI_DO 32
SMBCLK2 117 102 R459 R776 R470 R461
22,37 SMBCLK2 SMCLK2/GPF6 FLAD1/SI EC_FLASH_SPI_DIN 32
G_thermal & LAN &media button SMBDAT2 118 101 10K_DIS 10K_NC 10K_NC 10K_NC
22,37 SMBDAT2 SMDAT2/GPF7 FLAD0/SCE EC_FLASH_SPI_CS# 32
FLCLK 105 EC_FLASH_SPI_CLK 32
2
85 BID0
38 LED_MASK# PS2CLK0/GPF0
86 82 BID1
13,44,51 IMVP_PWRGD PS2DAT0/GPF1 EGAD/GPE1 PS_ID 54
EGPC 83 KSO18
EGCS/GPE2 5V_ALW_ON 52
87 84 USB_L_SIDE_EN#
44 RESET_OUT# PS2CLK1/GPF2 EGCLK/GPE3 SNIFFER_GREEN# 38
37 NUM_LED# 88 PS2DAT1/GPF3 PS/2
2
B B
37 CLK_TP_SIO 89 PS2CLK2/GPF4
90 96 USB_L_SIDE_EN# R458 R475 R466 R464
37 DAT_TP_SIO PS2DAT2/GPF5 GPH3/ID3 USB_L_SIDE_EN# 35
97 BID0 10K_UMA 10K 10K 10K
GPH4/ID4 BID1
GPIO 98
1
GPH5/ID5 KSO18
GPH6/ID6 99
CLK_PCI_8512 ITE8512_XTAL1 128 107
CK32K GPG1/ID7 MODC_EN 36
ITE8512_XTAL2 2 UMA
R551 CK32KE
10 1 18 VGA_IDENTIFY
VSS1 RI1/WUI0/GPD0 SIO_SLP_S3# 13
ITE8512IX_JX 12 21 (USB_L_SIDE_EN#)
VSS2 RI2/WUI1/GPD1 ACAV_IN 46
27 35 SNIFFER_PWR_SW# 38
49
VSS3 WUI5/GPE5 1 = Discrete Gfx.
VSS4
1
91 112 0 = UMA.
VSS5 RING/PWRFAIL/LPCRST/GPB7 USB_SIN_SIDE_EN# 35
C637 113
2.2P +3.3V_ALW VSS6
122 125 MAIN_PWR_SW# 38 CHIPSET_ID1
2
L61 BLM18AG121SN1D VSS7 PWRSW/GPE4 (KSO18) BID1 BID0 GM3B (UMA) GM3 (Dis)
74 33 0 1 0 SSI (X00) SSI (X00)
AVCC GINT/GPD5 LCDVCC_TST_EN 26
50 603 75 0 1 1 PT (X01) PT (X01)
AVSS
2
0 0 0 ST (X02) ST (X02)
C561 IT8512E/IX-L 0 0 1 QT (A00) QT (A00)
32KHz Clock. L60 0.1U LQFP128-16X16-4-FX2 0 0 0 (A01) (A01)
1
0 0 1
ITE8512_XTAL2 603
BLM18AG121SN1D
10
2
R547
A 0 ITE8512IX_JX A
W1
1
1 4 ITE8512_XTAL1
2
QUANTA
1
2 3 C985 R735
1U_NC 0.1U
C632 32.768KHZ C624 0603
COMPUTER
2
18P 18P 10
1
50 50 Title
Ultra I/O Controller ITE 8512
ITE8512IX pin12 connect to GND. Size Document Number Rev
ITE8512JX pin12 connect to 0.1uF, 1uF. GM3 2B

5 4 3 2 1
5 4 3 2 1
RTC BATTERY
16Mbit (2M Byte), SPI +3.3V_ALW +3.3V_ALW
+RTC_CELL +3.3V_ALW +PWR_SRC
1
R435
1
10K
R499 U34
U28 10K 1 2 3 1
2
D19 OUT IN
31 EC_FLASH_SPI_CS# 1 CE# VDD 8 4 5/3#
R498 1 2 15 6 SDMK0340L-7-F
31 EC_FLASH_SPI_CLK
2
SCK
1
D D
R497 1 2 15 5 40 2 5 C633
31 EC_FLASH_SPI_DIN SI GND SHDN
R436 1 2 15 2 7 C642 1U_NC
31 EC_FLASH_SPI_DO SO HOLD# 2.2U MAX1615EUK-T+_NC 25
2
2
3 WP# VSS 4
C592 C593
22P SST25VF016B-50-4C-S2AF 0.1U 603 805
1
JRTC1
1 2 +RTC_1 1 2 +RTC 2
50 10 D18 6.3R562 1K 1
SDMK0340L-7-F
2
40 LTS_AAA-BAT-019-K01 RTC-BATTERY
C638
1U
1
603
10
C C
B B
A A
QUANTA
Title
COMPUTER
Ultra I/O Controller ECE5028

GM3 2B

5 4 3 2 1
1 2 3 4 5 6 7 8
L86
USBP6_D- 1 2 ICH_USBP6- 12
USBP6_D+ 4 3 ICH_USBP6+ 12
PLW3216S900SQ2T1_NC
1206
1 2
R811 0
1 2
R810 0
MiniCard Robson, UWB connector
+3.3V_RUN +3.3V_RUN +1.5V_RUN FOR DEBUG CARD
A A
J8
13,30,34,42 PCIE_WAKE# 1 WAKE# 3.3V_1 2

COEX2_WLAN_ACTIVE R576
1 0 2 3 4
34 COEX2_WLAN_ACTIVE RESERVED_1 GND0
R575 1 0 2 5 6
34 COEX1_BT_ACTIVE_MINI RESERVED_2 1.5V_1
7 8 1 R809 0_NC
2
T146 PAD CLKREQ# UIM_PWR LPC_LFRAME# 11,31
9 10 1 R808 0_NC
2 +1.5V_RUN
GND1 UIM_DATA LPC_LAD3 11,31
11 12 1 R807 0_NC
2
17 CLK_PCIE_MINI3# REFCLK- UIM_CLK LPC_LAD2 11,31
13 14 1 R806 0_NC
2
17 CLK_PCIE_MINI3 REFCLK+ UIM_RESET LPC_LAD1 11,31
15 16 1 R805 0_NC
2
GND2 UIM_VPP LPC_LAD0 11,31
1
R568 0
1 2 C648 C647
R578 1 PLTRST# 6,12,25,30,34,42
2 0_NC 17 18 0.047U 0.047U
2
6,12,25,30,34,42 PLTRST# R579 1 UIM_C8 GND3
17 CLK_LPC_DEBUG 2 0_NC 19 UIM_C4 W_DISABLE# 20 WPAN_RADIO_DIS_MINI# 13
21 GND4 PERST# 22 1R567 2 0_NC SB_WPAN_PCIE_RST# 12
23 24 10 10
12 PCIE_RX3- PERn0 3.3VAUX1 +3.3V_RUN
FOR DEBUG CARD 12 PCIE_RX3+ 25
27
PERp0 GND5 26
28
GND6 1.5V_2 +3.3V_RUN
29 GND7 SMB_CLK 30 ICH_SMBCLK 13,30,34
12 PCIE_TX3- 31 PETn0 SMB_DATA 32 ICH_SMBDATA 13,30,34
12 PCIE_TX3+ 33 PETp0 GND8 34
35 36 USBP6_D-
GND9 USB_D-
1
37 38 USBP6_D+
13 PCIE_MCARD3_DET# RESERVED_3 USB_D+
2
39 40 + C656
RESERVED_4 GND10 USB_MCARD3_DET# 13
41 42 C644 C659 C646 C658 C652 330U/6.3V_NC
COEX2_WLAN_ACTIVE RESERVED_5 LED_WWAN# R571 0 0.1U 0.047U 0.1U 0.047U 4.7U
43 44
2
RESERVED_6 LED_WLAN#
45 RESERVED_7 LED_WPAN# 46 1 2 LED_WPAN# 38
47 RESERVED_8 1.5V_3 48
49 50 10 10 10 10 6.3 6.3
RESERVED_9 GND11
2
51 RESERVED_10 3.3V_2 52
2
C663
33P_NC R577 603 7343
100K_NC FOX_AS0B226-S52N-7F
1
B B
50
MiniCard WWAN connector
+3.3V_RUN +3.3V_RUN +1.5V_RUN
J9
13,30,34,42 PCIE_WAKE# 1 WAKE# 3.3V_1 2

T142 PAD 3 RESERVED_1 GND0 4
T144 PAD 5 RESERVED_2 1.5V_1 6
7 8 +UIM_PWR
T143 PAD CLKREQ# UIM_PWR
9 10 UIM_DATA
GND1 UIM_DATA UIM_CLK
17 CLK_PCIE_MINI2# 11 REFCLK- UIM_CLK 12
13 14 UIM_RESET
17 CLK_PCIE_MINI2 REFCLK+ UIM_RESET +UIM_VPP
15 GND2 UIM_VPP 16
R570 0 L87
1 2 USBP5_D- 1 2 ICH_USBP5- 12
PLTRST# 6,12,25,30,34,42 USBP5_D+
17 UIM_C8 GND3 18 4 3 ICH_USBP5+ 12
19 UIM_C4 W_DISABLE# 20 WWAN_RADIO_DIS# 13
21 22 R569 0_NC PLW3216S900SQ2T1_NC
GND4 PERST#
12 PCIE_RX1- 23 PERn0 3.3VAUX1 24 1 2 SB_WWAN_PCIE_RST# 12
Layout Note:
25 26 R813
1206 0 R240 and R244
12 PCIE_RX1+ PERp0 GND5 +3.3V_RUN
27 GND6 1.5V_2 28 1 2
29 30
close to choke
GND7 SMB_CLK ICH_SMBCLK 13,30,34 R812 0 as possible to
PCI-Express TX and RX 12 PCIE_TX1- 31 PETn0 SMB_DATA 32 ICH_SMBDATA 13,30,34
direct to connector 12 PCIE_TX1+ 33 PETp0 GND8 34 1 2 minimize stubs.
35 36 USBP5_D-
GND9 USB_D- USBP5_D+
13 PCIE_MCARD2_DET# 37 RESERVED_3 USB_D+ 38
39 RESERVED_4 GND10 40 USB_MCARD2_DET# 13
41 RESERVED_5 LED_WWAN# 42 PAD T93
43 RESERVED_6 LED_WLAN# 44
45 RESERVED_7 LED_WPAN# 46 Place caps close to
47 48 +1.5V_RUN +3.3V_RUN connector.
RESERVED_8 1.5V_3
49 RESERVED_9 GND11 50
C 51 RESERVED_10 3.3V_2 52 C
1
1
1
FOX_AS0B226-S52N-7F + C655 + C657
C650 C645 C649 C661 C651 C660 330U 330U/6.3V_NC
0.047U 33P 33P 0.047U 33P 0.047U
2
ESD1
UIM_RESET 1 6 +UIM_VPP +UIM_PWR 10 50 50 10 50 10 6.3 6.3
JSIM1 1 6 +UIM_PWR
2 2 5 5
+UIM_PWR 5 6 UIM_CLK 3 4 UIM_DATA
VCC GND 3 4 7343 7343
2
UIM_RESET 3 4 +UIM_VPP C2 C4 C1 C5 C3
RST VPP 33P 33P 33P 33P 1U
SRV05-4.TCT
UIM_CLK 1 2 UIM_DATA
1
CLK DATA
50 50 50 50 10
FOX_2WM610A2C-GM-7F
layout note:10 mil trace and 20 mil space for SIM card 603
Place as close as possible to WWAN connector

and UIM_PWR use 20mil
D D
QUANTA
Title
COMPUTER
WWAN, WPAN

GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3.3V_WLAN
MiniCard WLAN connector
4
2
+3.3V_WLAN +3.3V_WLAN +1.5V_RUN RP41
2.2KX2
MINI1CLK_REQ# J7 Q49
2
2N7002W-7-F_NC
3
1
1
A 13,30,33,42 PCIE_WAKE# 1 WAKE# 3.3V_1 2 A

C662 R790 1 2 0 3 4 WLAN_SMBCLK 1 3
33 COEX2_WLAN_ACTIVE RESERVED_1 GND0 ICH_SMBCLK 13,30,33
220P R520 1 2 0 5 6
33 COEX1_BT_ACTIVE_MINI
2
MINI1CLK_REQ# RESERVED_2 1.5V_1

17 MINI1CLK_REQ# 7 CLKREQ# UIM_PWR 8
9 10 R446 0_NC
50 GND1 UIM_DATA
17 CLK_PCIE_MINI1# 11 REFCLK- UIM_CLK 12 1 2
17 CLK_PCIE_MINI1 13 REFCLK+ UIM_RESET 14
15 GND2 UIM_VPP 16
+3.3V_WLAN
R483 0
1 2 Q48
PLTRST# 6,12,25,30,33,42
2
17 18 2N7002W-7-F_NC
UIM_C8 GND3 WLAN_RADIO_OFF#
19 UIM_C4 W_DISABLE# 20
21 22 R484 0_NC WLAN_SMBDATA 1 3
GND4 PERST# ICH_SMBDATA 13,30,33
12 PCIE_RX2- 23 PERn0 3.3VAUX1 24 1 2 SB_WLAN_PCIE_RST# 12
12 PCIE_RX2+ 25 PERp0 GND5 26 +3.3V_WLAN
27 GND6 1.5V_2 28
29 30 WLAN_SMBCLK R445 0_NC
GND7 SMB_CLK WLAN_SMBDATA
PCI-Express TX and RX 12 PCIE_TX2- 31 PETn0 SMB_DATA 32 1 2
direct to connector 12 PCIE_TX2+ 33 PETp0 GND8 34
35 GND9 USB_D- 36 PAD T60
13 PCIE_MCARD1_DET# 37 RESERVED_3 USB_D+ 38 PAD T57
39 40
41
RESERVED_4 GND10
42
USB_MCARD1_DET# 13 Suport for WoW
RESERVED_5 LED_WWAN#
43 RESERVED_6 LED_WLAN# 44 LED_WLAN_OUT# 38
WLAN_ICH_CL_CLK1 45 46 WLAN_RADIO_OFF# 2 1
T72 PAD RESERVED_7 LED_WPAN# WLAN_RADIO_DIS# 13
WLAN_ICH_CL_DATA1
Non-iAMT T66 PAD
WLAN_ICH_CL_RST1#
47
49
RESERVED_8 1.5V_3 48
50 D14
T74 PAD RESERVED_9 GND11
51 52 SDMK0340L-7-F
RESERVED_10 3.3V_2 R440 0_NC
B 1 2 Prevent backdrive when B
FOX_AS0B226-S68N-7F
WoW is enabled.
Place caps close to

+1.5V_RUN +3.3V_WLAN connector.
1
1
2
+ C902
C584 C565 C575 C580 C602 C568 C610 330U/6.3V_NC
0.047U 0.047U 0.1U 0.047U 0.1U 0.047U 4.7U
2
+PWR_SRC +3.3V_ALW +3.3V_WLAN +3.3V_RUN
Q54 10 10 10 10 10 10 10 6.3
FDC655BN_NC R471
6 0
1
5 4 1 2 805 7343
2
R443 R486 1
100K_NC 100K_NC
805
2
3
3
Q53B
2N7002DW-7-F_NC 5
C C
6
Q53A
4
2 2N7002DW-7-F_NC
31 AUX_EN_WOWL
1
R442 R485 C587

1
1
200K_NC 470K_NC 4700P_NC

R463
2
100K_NC
2
50
2
603
D D
QUANTA
Title
COMPUTER
WLAN

GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
R212 0_0805
L20 2 1
Side pair left JUSB2
1 2 USBP0_D+ 3-1734062-3
12 ICH_USBP0+ +5V_SUS
4 3 USBP0_D- +USB_L_SIDE_PWR
12 ICH_USBP0-
FS2
10 1 V1+
DLW21HN900SQ2L 455/5A_NC U12 +USB_L_SIDE_PWR 5 V2+
R207 0_NC
9 1 2 2 IN GND 1
USBP0_D- 2
1206 DATA1_L
1 2
3 7 +USB_L_SIDE_PWR USBP1_D- 6
31 USB_L_SIDE_EN# EN1# OUT1 DATA2_L
R203 0_NC 8
OC1# USB_OC0_1# 12
1 2 USBP0_D+ 3
+USB_L_SIDE_PWR DATA1_H
4 EN2# OUT2 6
1
L17 5 USBP1_D+ 7
USBP1_D+ C812 C823 OC2# DATA2_H
12 ICH_USBP1+ 1 2
1
A 4 3 USBP1_D- 0.1U 10U_NC 4 A
SHEIL1
SHEIL2
SHEIL3
SHEIL4
12 ICH_USBP1-
2
TPS2062DR + C262 + C828 GND1
DLW21HN900SQ2L 150U/6.3V_NC 150U 8 GND2
1
10 10
2
R190
1206 0_NC Place one 150uF cap by each C264 C265
10
11
12
1 2 Each channel is 1A 0.1U 0.1U
2
805 6.3 6.3 USB connector.
R183 0_NC
1 2 10 10
7343 7343
Place ESD diodes as

close as USB connector.
U11
USBP1_D+ 1 6 USBP0_D+
I/O I/O
2 VN VP 5 +USB_L_SIDE_PWR
USBP1_D- 3 4 USBP0_D-
I/O I/O
SRV05-4_NC
left side single USB port

9
B B
L50 +USB_SIN_SIDE_PWR
1 2 USBP8_D-
12 ICH_USBP8-
4 3 USBP8_D+
12 ICH_USBP8+
JUSB1
DLW21HN900SQ2L 1 VCC
1
USBP8_D- 2
R334 0_NC C408 C409 USBP8_D+ DATA-
1206 3 DATA+
1 2 0.1U 0.1U 4
2
GND
R329 0_NC
1 2 10 10
R257 0_0805
2 1 FOX_3Q31804C-RB13B34-8F
+5V_SUS
FS1
455/5A_NC
10 U17
1 2 2 1 Place ESD diodes as
IN GND
close as USB connector.
3 7 +USB_SIN_SIDE_PWR U16
31 USB_SIN_SIDE_EN# EN1# OUT1
8 1 6 USBP8_D+
OC1# USB_OC8# 12 I/O I/O
2 VN VP 5 +USB_SIN_SIDE_PWR
1
4 6 +USB_SIN_SIDE_PWR 3 4 USBP8_D-
C453 C458 EN2# OUT2 I/O I/O
OC2# 5
0.1U 10U_NC SRV05-4_NC
2
1
TPS2062DR + C441 + C867
10 10 150U/6.3V_NC 150U
Place one 150uF cap by each
2
2
805 USB connector.
Each channel is 1A 6.3 6.3
C C
7343 7343
D D
QUANTA
Title
COMPUTER
External USB

GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
ODD Connector
JMOD1
Second HDD 1
SATA Connector.
Master GND1
RXP
RXN
2
3
4
SATA_TX1+ 11
SATA_TX1- 11
CON4 GND2 SATA_RXN1_C C869 0.01U/16V
TXN 5 SATA_RX1- 11
CON6 6 SATA_RXP1_C C868 0.01U/16V
TXP SATA_RX1+ 11
GND3 7
A GND1 1 A
RXP 2 SATA_TX2+ 11 GND1 1
RXN 3 SATA_TX2- 11 RXP 2 SATA_TX0+ 11 DP 8
GND2 4 RXN 3 SATA_TX0- 11 5V_0 9 +5V_MOD
5 SATA2_RXN0_C C410 2 1 3900P 4 10
TXN SATA_RX2- 11 GND2 5V_1
6 SATA2_RXP0_C C411 2 1 3900P 5 SATA1_RXN0_C C549 2 1 3900P 11
TXP SATA_RX2+ 11 TXN SATA_RX0- 11 MD
7 25 6 SATA1_RXP0_C C543 2 1 3900P 12
GND3 TXP SATA_RX0+ 11 GND4
25 GND3 7 25 GND5 13
25
3.3V_0 8 +3.3V_RUN
3.3V_1 9 3.3V_0 8 +3.3V_RUN
3.3V_2 10 3.3V_1 9
11 10 MLX_47628-1012 +5V_MOD
GND4 3.3V_2
GND5 12 GND4 11
GND6 13 GND5 12
5V_0 14 +5V_HDD GND6 13
5V_1 15 5V_0 14 +5V_HDD
1
16 15 C381
5V_2 5V_1 C404 C403 C380 C382
GND7 17 5V_2 16
18 17 10U_NC 0.1U 0.1U 1000P/50V
2
RSVD GND7 1U/10V/0603
GND8 19
12V_0 20 GND8 18
21 19 10 10 10
12V_1 12V_0
12V_2 22 12V_1 20
Place caps close to
805
connector.
LD2822H-SA9L6
GS12201-1011-9F
B +3.3V_RUN del pin18 and pin 22 B

+3.3V_RUN
C919 C913 C912 C910 C911

C395 C398 C402 10U/10V/0805_NC 1U_10V_0603_NC 0.1U/16V_NC 0.1U/16V_NC 1000P/50V_NC
1U_10V_0603_NC 0.1U/16V_NC 1000P/50V_NC +5V_ALW +5V_MOD +5V_RUN
Place caps close to Master Q70

connector. SI4800BDY-T1-E3 R748
8 3 0_NC
7 2 1 2
+3.3V_ALW 6 1
Place caps close to Second HDD connector. 5
1
+5V_HDD
Place caps close to C862 805
4
1
+5V_HDD SATA1 connector. 10U R324
2
R302 100K
C306 C329 C312 C332 C313 100K R749 100K
2
C906 +15V_ALW 2 1 MOD_EN_5V 10
10U/10V/0805 1U/10V/0603 0.1U/16V 0.1U/16V 1000P/50V C904 C909 C908 C905
2
1000P/50V
3
10U/10V/0805 1U/10V/0603 0.1U/16V 0.1U/16V 805
for EMI 5
Q35A
2N7002DW-7-F
4
6
1
31 MODC_EN 2
Q35B 60V C866
1
C C
2N7002DW-7-F 0.1U
2
+5V_ALW +5V_HDD +5V_RUN
R295
Q36 100K 60V 25
FDC655BN R270
2
6 0_NC
5 4 1 2 603
2
1
1
2
C319 R293805
3
+3.3V_ALW +15V_ALW 4.7U 100K

1
R315 6.3
1
100K
R303 2 1 HDD_EN_5V
100K 603
3
2
5
Q37A
2N7002DW-7-F
4
6
31 HDDC_EN 2
Q37B 60V C375
1
2N7002DW-7-F 0.1U
1
R304
D 100K 60V 25 D
2
603
QUANTA
Title
COMPUTER
SATA (HDD&CD_ROM)

GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3.3V_ALW +3.3V_ALW
+5V_RUN
31 KSO[0..18] KEYBOARD CONNECTOR
2
Touch Pad R393
31 KSI[0..7]
100K
1
3
JKB1
RP19
31 KB_DET#
1
KSI7 32
4.7KX2 KSI6 31
R276 100K KSI4 30
31 LID_SW# 29
JTP1 +3.3V_ALW 2 1 KSI2
2
4
KSI5 28
L56 603 BLM11A601S KSI1 27
L57 BLM11A601S TP_CLK 1 KSI3 26
31 CLK_TP_SIO 2 25
TP_DATA KSI0
A 31 DAT_TP_SIO 3 24 A
KSO5
603 4 KSO4 23
5 KSO7 22
+5V_RUN 6 21
KSO6
20
1
1
C478 C479 88502-0601 KSO8
19
1
10P 10P C475 C474 C436 C434 KSO3
10P 10P 0.047U C477 KSO1 18
2
2
0.1U 0.1U C920 KSO2 17
2
0.047U KSO0 16
50 50 50 50 10 KSO12 15
10 10 KSO16 14
KSO15 13
KSO13 12
KSO14 11
KSO9 10
KSO11 9
KSO10 8
KSO17 7
KSO18 6
CAP_LED_R R275 1 5
2 220 4
NUM_LED_R R274 1 2 220 3
2
1
8/17:add dioad to protect GPIO port HRS_ FH28D-64(32)SB-1SH(86)

Media Button
+3.3V_ALW
CP1 CP3 CP2
1
2
+3.3V_ALW +5V_ALW 8 7 KSO10 8 7 KSO0 8 7 KSO13
6 5 6 5 KSO12 6 5 KSO14
4 3 KSO17 4 3 KSO16 4 3 KSO9
+3.3V_ALW DA204U_NC KSO18 KSO15 KSO11
2 1 2 1 2 1
D11
100PX4_NC 100PX4_NC 100PX4_NC
3
1
R259 JMB1
100K_0402 1 5V_PWR CP5 CP4
B
22,31 SMBCLK2 2 CLK
B
3 8 7 KSO5 8 7 KSO8
22,31 SMBDAT2
2
DAT KSO4 KSO3

31 MEDIA_INT# 2 1 4 INT 6 5 6 5
R266 5 4 3 KSO7 4 3 KSO1
GND
FOR EMI
1
10K_0402 6 2 1 KSO6 2 1 KSO2

38 HDD_LED LED1
C278 7
38 WLAN_LED LED2
1U/10V/0603 8 100PX4_NC 100PX4_NC
38 BT_LED
2
LED3
9 3V_PWR
10 5V_LED CP7
50 CP6
50
C285 88501-1001 8 7 KSI7 8 7 KSI5
10U_NC 6 1206 5 KSI6 6 1206 5 KSI1
4 4 3 KSI4 4 3 KSI3
805 2 1 KSI2 2 1 KSI0
100PX4_NC 100PX4_NC
100P CAPS CLOSE TO JKB1
+3.3V_RUN
+5V_RUN
Consumer IR Key board Illumination
2
+5V_RUN +KB_LED
1
+3.3V_ALW +3.3V_ALW R264

2
100K FS3
47K
Q34 1206L050YR
1
1
1 3 2 DDTA114YUA-7-F 1 2
31 CAP_LED#
R585 R840 10K
100 10K Q31
U36 2N7002W-7-F R252 1 2 33_NC
2
CIRRX 4 +3.3V_RUN
C 31 CIRRX IRTX C
CIR_VCC 3 CAP_LED_R +KB_LED
VCC J4
2 GND1
1 +5V_RUN 1 +KB_LED
GND2 1
2
R283 100K_NC 2
KB_LED_DEC# 2
+3.3V_RUN 2 1 3 3
1
C667 C666 SIL_TSOP36136TS R263 LED_PWM 4 4
1
4.7U 0.1U 100K
2
88502-0401 C921
2
47K
Q33 0.1U
12
2
1 3 2 DDTA114YUA-7-F
31 NUM_LED#
10 10 10K 13 KB_LED_DET#
Q30 10
2N7002W-7-F
805
3
NUM_LED_R Q46
+5V_ALW +3.3V_ALW SI2304BDS-T1-E3
LED_PWM 3 1
2
R844
2
10K_NC
3
1
2 Q32
31 KB_BACKLITE_EN
2N7002W-7-F_NC
1
3
31 CIR_ON/OFF# 2
Q78
DDTC124EUA-7-F_NC CIR_VCC
1
D D
QUANTA
Title
COMPUTER
TOUCH PAD, BULE TOOTH & FIR

GM3 2B

1 2 3 4 5 6 7 8
A B C D E
Sniffer Switch SW1

+3.3V_RUN WLAN
HDD activity LED.
+3.3V_WLAN
+5V_RUN +3.3V_ALW 1 ON
1
+5V_RUN
1
R433
0 R587 G
2
100K 2
31 LED_MASK#
1
0_NC
2
1 R434 2 R449 R586 0
2
1
2
100K 2 1 3
4 47K 31 WIRELESS_ON/OFF# S 4
Q51
1
2
47K 34 LED_WLAN_OUT# 1 3WLAN_ACT# 2 DDTA114YUA-7-F
Q43 10K C669
SATA_ACT# 1 3 2 DDTA114YUA-7-F Q50 1U_NC LSS12P-PC-V-T/R
10K 2N7002W-7-F
Q42
3
2N7002W-7-F 603
R430 220 R448 220
3
HDD_LED_L
1 2 WLAN_LED_L1 2
HDD_LED 37 WLAN_LED 37 10 Sniffer Switch ON/OFF
+3.3V_RUN +3.3V_ALW
+3.3V_RUN BT / UWB LED +3.3V_RUN
+5V_RUN
2
+3.3V_ALW
R573
2
1
0 DA204U_NC
R281
1
R427 R566 0_NC 100K D13
2 2
100K 100K 1 R574 2
31 LED_MASK#
3
Q60 R280 0
1
2
47K
DTA114YUA 2 1 SNIFFER1
31 SNIFFER_PWR_SW#
33 LED_WPAN# 1 3 BT_ACT# 2
SATA_ACT# 10K
11 SATA_ACT#
Q61 PC73
2N7002W-7-F 1U_NC 8/17:add dioad to protect GPIO port
3
This circuit is only needed if
R565 220 603
3
the platform has the SNIFFER. BT_LED_L 1 2 BT_LED 37
Power Switch 3
10 +3.3V_ALW
+3.3V_ALW
2
Power & Suspend.
R288 DA204U_NC
100K D12
+3.3V_SUS +5V_SUS +5V_SUS
3
R279 10K
POWER_ SW_IN0#
31 MAIN_PWR_SW#
2
R557 C336 JSW1
5
100K U35 1U 1
SNIFFER1 GND
2
1
BR_LED# 2 BR_LED SSW1
31 BREATH_LED# 1 3 4 2 1 BREATH_LED S_LED1 3 SLED1
R563 220 603 C972 4
Q56 1000P SLED2
5 GND
2N7002W-7-F TC7SZ04FU(T5L,F,T) 50 BREATH_LED 6
3
POWER_ SW_IN0# PLED
SLED2:AP detection C973
7 PSW
1000P JST_SM07B-SHLS-TF
50 C974
1000P
50
2 2
+3.3V_ALW +3.3V_ALW +5V_ALW2
Battery status. Sniffer LED
2
Q55
1
DDTA114YUA-7-F
R797 Biometric
C859
2
100K
47K
1 2
1
1 3 BAT2_ACT# 2
31 BAT1_LED# +1.8V_RUN +3.3V_RUN
10K 12P/50V_NC
Q58
2N7002W-7-F J2
3
L37 1
USBP9_D- 2
BAT1_LED 54 12 ICH_USBP9- 1 2 3
4 3 USBP9_D+
12 ICH_USBP9+ 4
+3.3V_ALW +3.3V_SUS +3.3V_SUS +5V_SUS PLW3216S900SQ2T1_NC 5
6
R297
1206 0
2
Q57 1 2 88501-0601
1
DDTA114YUA-7-F
R441 Q45 R298 0
2
100K DDTA114YUA-7-F 1 2
47K 47K
1
31 BAT2_LED# 2 31 SNIFFER_GREEN# 1 3SNIFFER_G_ACT# 2

10K 10K
Q44
2N7002W-7-F
1 1
3
FOR RF SPRING SW LED R431 220

BAT2_LED 54 SNIFFER G_R 2 1 S_LED1
QUANTA
1
U14
6 USBP9_D-
+3.3V_RUN
Title
COMPUTER
I/O I/O SWITCH, KEYBOARD & LED
2 VN VP 5
3 4 USBP9_D+
I/O I/O Size Document Number Rev
SRV05-4_NC GM3 2B

A B C D E
1 2 3 4 5 6 7 8
D7 +5V_RUN
SSM34PT_NC
1 2
2
R702
0 J6
+FAN1_VOUT DA204U_NC
+5V_RUN 1 2 4 4
FAN1_PWM 3 D5
31 FAN1_PWM 3
805 2 FAN1_PWM
3
2
2
1
1 1
C196 C782
2.2U 0.1U MLX_53261-0471 8/17:add diode to protect GPIO port
1
2
A A
10 10
805 R703 4.7K

+5V_RUN FAN1_TACH 31
10/20mils +3.3V_RUN
REM_DIODE1_P
+3.3V_RUN
U4
3
1
1 10 THERM_SCL
Q68 C740 C70 VDD SCL
2
2
MMST3904-7-F 2200P_NC 2200P 2 9 THERM_SDA
2
DP1 SDA
1
REM_DIODE1_N 3 8 THERM_ALERT#_C 1 3 THERM_ALERT# THERM_ALERT# 13

50 50 DN1 ALERT#
H_THERMDA 4 7 close to IC
3 H_THERMDA DP2 SYS_SHDN#
Q11
1
C69 5 6
2200P DN2 GND 2N7002W-7-F
B B
SMSC_EMC 1423
2
H_THERMDC SYS_SHDN#
3 H_THERMDC THERM_STP# 31,52
50
+3.3V_RUN
cap should close to thermal IC
1
C74
1
0.1U
2
+3.3V_RUN +3.3V_RUN R89
10 1M
3
Q14
2
2 2N7002W-7-F
1
1
3
1
R71 R84
Q13 10K 10K 2 C92
2
2N7002W-7-F 0.1U
2
2
Q15
1
3 1 THERM_SDA 2N7002W-7-F
17,26,31 SMBDAT1
10
+3.3V_RUN
OTP 85 degree C
Q16
2
2N7002W-7-F R70 10K/F

+3.3V_RUN 1 2 THERM_ALERT#_C
C C
3 1 THERM_SCL
17,26,31 SMBCLK1
R83 1 2 6.8K/F SYS_SHDN#
D D
QUANTA
Title
COMPUTER
FAN & THERMAL

GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+5V_SPK_AMP LIN- RIN- HP2_OUT_L HP2_OUT_R J3

GAIN1 GAIN2 GAIN AUD_SPK_R1 1 1
1
C503 C502 C522 C521 +5V_SPK_AMP AUD_SPK_R2
2 0 0 6dB 2 2
2
47P_NC 47P_NC 220P 220P AUD_SPK_L1 3
R409 R408 AUD_SPK_L2 3
0 1 10dB 4
2
4
2
100K_NC 100K 50 50 50 50
1 0 15.6dB R753 MLX_48227-0401
2
100K
15
1
1 AUD_AMP_GAIN1 1 1 21.6dB C861 C863 C864 C865

AUD_AMP_GAIN2 100P 100P 100P 100P
1
R756 0_NC
2
SPKR_INL- REGEN 50 50 50 50
EMI Request
1
R410 R407
A A
100K 100K_NC C879
R558 1 2 0 805 0.033U
2
16
1
R450 2 1 0 603
R555 2 1 0 603
R373 2 1 0 603
R310 2 1 0 603 R429 0_NC
+3.3V_RUN 1 2
+5V_SPK_AMP
INTERNAL SPEAKER AMP +3.3V_RUN
1
C533
18
1
0.1U C532
U20
1
C881 C880 C882 U23 0.1U

C=1/2*pi*400*amp input R
2
1U 1U 0.1U 10 TC7SZ08FU(T5L,F,T)
2
5
603 603 AUD_FRONT_L C519 1 2 0.01U 1206 50 LIN- 3 6 AUD_SPK_L1 10
2
SPKR_INL+ OUTL+
5
10 10 10 Layout Note: AUD_FRONT_R C518 1 2 0.01U 1206 50 RIN- 2 7 AUD_SPK_L2 NB_MUTE# 1
1206 2.2U R708 SPKR_INR+ OUTL- AMP_HP1_SHUD_L#
Place close AUD_HP2_L0 50C525 2 1AUD_HP2_L0_R 1
15
2.2K 2 HP2_OUT_L 27 20 AUD_SPK_R1 HP1_JD 2
4 1
4
U23 pin 23. AUD_HP2_R0 50C524 2 1AUD_HP2_R0_R 1 2.2K 2 HP2_OUT_R 26
HP_INL
HP_INR
TPA6040A4 OUTR+
OUTR- 19 AUD_SPK_R2 EAPD# 2
AMP_HP1_SHUD# 41
1206 2.2U R737 U22
QFN 32PIN HPL
3
C505 1 2 1U 603 10 TC7SZ08FU(T5L,F,T)
19 24 16 AUD_HP2_L1 41
3
AUD_SPK_ENABLE# BIAS
23 SPKR_EN# HPR 15 AUD_HP2_R1 41
AMP_HP2_EN 22
R782 +VDDA REGEN HP_EN SPKR_INL- +VDDA
25 REG_EN SPKR_INL- 4
5.1K/F AUD_AMP_GAIN1 31 1 SPKR_INR-
SENSEB +3.3V_RUN AUD_AMP_GAIN2 GAIN1 SPKR_INR-
1 2 32 GAIN2
Layout Note: VOUT 29
+VDDA
17 +5V_SPK_AMP
Close to U1 Pin 34 HPVDD
1
1
C914 9 30 +5V_SPK_AMP C507 C506 R757 2.2K_NC
R779 R780 1000P CPVDD VDD 1U 1U SPKR_INR-
B 1 PVDD_8 8 2 1 B
1
20K/F 39.2K/F C481 C482 C483 1 2 1U 10 18 603 603
2
2
50 10U 1U 805 16 C1P PVDD_18 10 10
12 C1N
2
805 603 11 28 C488 C480 C495 C878 R755
3 2
3 2
2
10 10 CPGND GND_28 1U 10U 0.1U 0.033U
PGND_5 5 0_NC
14 21 603 805
1
PVSS PGND_21 10 10 10 16
41 HP2_JD 2 2 MIC1_JD 41 13 CPVSS Layout Note:
2
Q74 Q75 C877 Place close U23.
1
2N7002W-7-F 2N7002W-7-F 1U TPA6040A4 Layout Note: R438 0_NC
1
805 +3.3V_RUN 1 2
16 Place close to
pin 18. +3.3V_RUN
1
C538
1
FB_60ohm+-25%_100MHz 0.1U U25 C537
+3.3V_RUN +VDDA TC7SZ08FU(T5L,F,T) 0.1U
_3A_0.05ohm DC
2
10
AZALIA (HD) CODEC
2
5
2 1 DVDD 10
5
NB_MUTE# 1
1
1
R493 0_0805 C601 C617 C597
U31
C623 C590 4 AMP_HP2_EN_L 1
1U 1U 0.1U 1U 0.1U HP2_JD 2 4 AMP_HP2_EN
10 10 10 10 EAPD# 2
2
2
603 603 10 1 25 603 U24
3
R539 +VDDA DVDD_CORE AVDD TC7SZ08FU(T5L,F,T)
9 38
3
5.1K/F DVDD_CORE AVDD
40 DVDD
SENSEA 1 2 R492 0_NC
C591 1000P_NC 13 SENSEA
SENSE_A SENSEB
1 2 SENSE_B 34
1
C627 +5V_SPK_AMP +5V_RUN

R549 1000P 6
C 11 ICH_AZ_CODEC_BITCLK HDA_BITCLK C
39.2K/F R525 1 2 33 AZ_CODEC_SDIN0 8
11 ICH_AZ_CODEC_SDIN0
2
50 HDA_SDI L81 BLM21PG600SN1D

11 ICH_AZ_CODEC_SDOUT 5 HDA_SDO PORT_A_L 39 AUD_HP1_L 41
11 ICH_AZ_CODEC_SYNC 10 41 AUD_HP1_R 41
3 2
HDA_SYNC PORT_A_R
1
11,31 ICH_AZ_CODEC_RST# 11 HDA_RST# NC/VREFOUT_A 37 FB_60ohm+-25%_100MHz
C484 C876
2 21 1U 10U _3A_0.05ohm DC
HP1_JD 41 AUD_INT_MIC_IN 41
2
PORT_B_L 603 805
PORT_B_R 22 Layout Note:
Q59 28 10 10
Place close to
1
2N7002W-7-F VREFOUT_B
Layout Note: PORT_C_L 23 pin 8.
24
Close to U1 Pin 13 PORT_C_R
29
VREFOUT_C
18 NC/CD_L
19 35 AUD_FRONT_L Close to U31 +VDDA C614
+5V_SPK_AMP NC/CD_GND PORT_D_L AUD_FRONT_R 0.1U
20 NC/CD_R PORT_D_R 36
32 16
VREFOUT_D
R71,R69 close to U1, Let DVDD width be 10-mils 2 1
PORT_E_L 14 AUD_MIC_L 41
2
PORT_E_R 15 AUD_MIC_R 41
5
R758 R759 31
GPIO4/VREFOUT_E AUD_MIC1_VREFO 41
100K 100K C622 1U R541 10K 1 BEEP 31
16 AUD_HP2_L0 AUD_PC_BEEP 1 2BEEP2 2 1 BEEP1 4
PORT_F_L AUD_HP2_R0 603 10
17 2 SPKR 13
1
PORT_F_R
1
AUD_SPK_ENABLE# +3.3V_RUN 30
GPIO3/VREFOUT_F R544 603
3
43 2.2K U33
PORT_G_L
3
DMIC_DATA R512 0_NC 2 44 74LVC1G86GW

41 DMIC_DATA DMIC0/VOL_UP/GPIO1 PORT_G_R
2
EAPD# 2 EAPD# 3
2
R518 0_NC DMIC1/VOL_DN/GPIO2
PORT_H_L 45
D Q71 R491 R487 DVDD 46 D
1
2N7002W-7-F 10K_NC R785 0 PORT_H_R

0
1
EAPD# 47 DMIC_CLK/GPIO0/SPDIF_IN
QUANTA
3
EAPD# R489 0 48 12 AUD_PC_BEEP

SPDIF_OUT_0 PC_BEEP
31 NB_MUTE# 2 CAP2 33
R488 0_NC
Q73
41 DMIC_CLK
DMIC_DATA R515 0 4
VREFFILT 27
COMPUTER
1
DVSS1
1
2N7002W-7-F 7 26 Title
DVSS2 AVSS1 C613 C605 Azelia CODEC
AVSS2 42
10U 1U
2
R514 0_NC 805 603 Size Document Number Rev

92HD73C1X5PRGXB2X 10 10 GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3.3V_RUN
Headphone Jack Array Microphone & Camera
2
R289
Stereo MIC Jack 100K
JCAMERA1
1
USBP4_D+ 1
CAMERA_CBL_DET# USBP4_D- 2
+3.3V_CCD 3
4
A 5 A
L36 0 603 DMIC_DATA_R 6

40 DMIC_DATA 7
22 ohm
L35 603 DMIC_CLK_R 8
40 DMIC_CLK 9
CAMERA_CBL_DET#
13 CAMERA_CBL_DET# 10
I-pex 20374-010E-1
DMIC_DATA
1
C358
33P_NC
+3.3V_CCD trace width
2
50
use 25 mils
L41 BLM18AG121SN1D
+3.3V_RUN +3.3V_CCD DMIC_CLK
603
1
C373 C364 C357
10U 10U 33P_NC
2
B 805 805 50 B
10 10
JAUDIO1 L46
1 2 USBP4_D-
40 AUD_MIC1_VREFO 1 12 ICH_USBP4-
4 3 USBP4_D+
2 12 ICH_USBP4+
40 AUD_MIC_L 3 PLW3216S900SQ2T1_NC
JACK 2 (MIC) 40 AUD_MIC_R 4
5
JACK 1 40 AUD_HP2_L1 6
1
1206
2
40 AUD_HP2_R1 7 R312 0
(HP2) AUD_HP1_L1 8
AUD_HP1_R1 9
JACK 3 (HP) 10 1
R313 0
2
11
MIC1_JD 12
40 MIC1_JD 13
HP2_JD
40 HP2_JD 14
HP1_JD
40 HP1_JD 15
+VDDA
48227-1501
R419
2
2 1 MIC1_JD
R584
C C
100K 100K
+VDDA U51A
R414
8
LM358ADR2G
1
+3.3V_RUN 2 1 HP2_JD 3
2
1 R826 0
2
R581 2 +VDDA
100K
2
1K C665 R835
R412
2.2U 100K
4
HP1_JD JP11 805
2 1
1
HS8102E INT_MIC_C_L+ 10 C971
1
0.1U
100K 2
2
C664
2
1
2
2.2U R580 10
805 1K
1
2
10
C962 0.1U U51B
8
603 16 R832 10K LM358ADR2G
INT_MIC_2_L+ INT_MIC_L1+ 1 INT_MIC_L0+ C970 0.1U
15 2 1 2 5
7 INT_MIC_IN_OP 2 1 AUD_INT_MIC_IN 40
INT_MIC_2_L- 2 1 INT_MIC_L1- 2 1 INT_MIC_L0- 6
C567 1 2 2.2UF R833 10K 603 16
40 AUD_HP1_L
2
1206 50V R738 U29 C963 0.1U
4
AUD_HP1_L21 2.2K 2 AUD_HP1_L0 13 9 AUD_HP1_L1 R583 603 16
C586 1 INL OUTL
40 AUD_HP1_R 2 2.2UF AUD_HP1_R21 2.2K 2 AUD_HP1_R0 15 INR OUTR 11 AUD_HP1_R1 1K
1206 50V R739 4
NC1
6 1 2
1
NC2
1
2
14 8 INT_MIC_C_L- R837 100K
40 AMP_HP1_SHUD# SHDNR NC3
18 SHDNL NC4 12
16 D22
NC5
2
D C578 1 2 2.2U 1 20 C668 SM05_NC D

1206 25 C1P NC6 2.2U R582
3 C1N SVDD 10 +3.3V_RUN
19 805 1K Layout Note:
1
PVDD
2
AUD_HP1_L0 AUD_HP1_R0 5 2 10
7
PVSS PGND
17 C557 Place close to CODEC.
QUANTA
1
SVSS SGND
1
C986 C987 1U
1
220P 220P MAX4411ETP 805

COMPUTER
2
16
2
50 50 C556 Title
2.2U AUDIO CONN
1
15 1206
10 GM3 2B

1 2 3 4 5 6 7 8
5 4 3 2 1
+1.2V_LOM
Core Power Decoupling +2.5V_LOM
+3.3V_LAN
C456 C420 C392 C391 C450 C445 C396 C370 C369

4.7U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U R370 +3.3V_LAN +2.5V_LOM
10 10 10 10 10 10 10 10 10 0_NC
X5R X7R X7R X7R X7R X7R X7R X7R X7R 805
805
R376 R301
U15
15
19
56
61
68
6
0 0_NC
VDDP Power Decoupling +1.2V_LOM +2.5V_LOM
DC/VDDP
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
805 805
L48
+2.5V_LOM BLM18AG601SN1D
36 LAN_BIASVDDH 1 2
R347 0 805 BIASVDDH
5 VDDC_IO/VDDC
C406 C401 R371 0_NC 805 55 C407 0.1U/10V
D VDDC_IO/VDDC D
0.1U 0.1U 13 L43
10 10 VDDC LAN_XTALVDDH BLM18AG601SN1D
20 VDDC XTALVDDH 23
X7R X7R 34 1 2
VDDC
60 VDDC C388 0.1U/10V
45 R349 0 +LAN_AVDDL
AVDDL/AVDDH R346 0_NC +LAN_AVDDH L53
BLM18AG601SN1D Place one cap close to each
VDDIO Power Decoupling DC/AVDDH 38 1 2
of the pins, 38,45, and 52
+3.3V_LAN
52 C416 0.1U/10V R357 0_NC TRD2-
C417 C393 C451 C449

+1.2V_LOM L54
BLM18AG601SN1D
+LAN_AVDDL
BCM5784M/5787M DC/AVDDH
C444 0.1U/10V
AVDDH_LAN_TRD2N R361
R345
0
0_NC
+LAN_AVDDH
TRD2+
4.7U
10
0.1U
10
0.1U
10
0.1U
10
1 2 39 AVDDL 10mm x 10mm LAN_TRD2N_TRD2P R348 0 TRD2-
51 AVDDL TRD2- 43
X5R X7R X7R X7R C452 4.7U/10V/0805 C421 0.1U/10V 68-Pin QFN 49
TRD3_N TRD3- 43
805 50 R360 0_NC +LAN_AVDDL
TRD3_P TRD3+ 43
LAN_TRD2P_AVDDL R338 0 TRD2+
TRD2+ 43
L47 48 AVDDH_LAN_TRD2N R328 0_NC TRD1-
BLM18AG601SN1D AVDDH/TRD2_N LAN_TRD2N_TRD2P AVDDH_LAN_TRD1N R327 0 +LAN_AVDDH
TRD2_N/TRD2_P 47
1 2 +LAN_GPHYPLLVDDL 35 46 LAN_TRD2P_AVDDL
GPHY_PLLVDDL TRD2_P/AVDDL R335 0_NC TRD1+
R309 2 1 200/FLAN_XTALO C397 4.7U/10V/0805 C400 0.1U/10V LAN_TRD1N_TRD1P R330 0 TRD1-
TRD1- 43
42 AVDDH_LAN_TRD1N
L45 AVDDH/TRD1_N LAN_TRD1N_TRD1P R333 0_NC +LAN_AVDDL
Y1 43
LAN_XTALI BLM18AG601SN1D TRD1_N/TRD1_P LAN_TRD1P_AVDDL LAN_TRD1P_AVDDL R344 0 TRD1+
1 2 TRD1_P/AVDDL 44 TRD1+ 43
1 2 +LAN_PCIEPLLVDDL 30 PCIE_PLLVDDL
TRD0_N 41 TRD0- 43
C379 4.7U/10V/0805 C385 0.1U/10V 40
TRD0_P TRD0+ 43
25MHz
C368 C383 L44 2
LINKLED# LINKLED# 43
27P 27P BLM18AG601SN1D +LAN_PCIEPLLVDDLR305 0 1
SPD100LED# SPD100LED# 43
50 50 1 2 +LAN_PCIESDSVDDL R306 0_NC 27 67
PCIE_PLLVDDL SPD1000LED# SPD1000LED# 43
NPO NPO 33 66
PCIE_VDDL TRAFFICLED# IO_LOM_ACTLED_YEL# 43
C378 4.7U/10V/0805 R307 0
C C384 0.1U/10V R308 0_NC 24 8 LAN_GPIO T30 C
PCIE_VDDL/GND GPIO2 +3.3V_LAN R381 & R382: Stuff only if U18 is installed
PAD
10 9 +3.3V_LAN
UART_MODE BCM_WP
GPIO1_SERIALDI 7
1
C386 1 2 0.1U LAN_PCIETXDP 26 4
12 PCIE_RX6+/GLAN_RX+ PCIE_TXD_P GPIO0_SERIALDO
C387 1 2 0.1U LAN_PCIETXDN 25
12 PCIE_RX6-/GLAN_RX- PCIE_TXD_N
31 R381 R379 R382
12 PCIE_TX6+/GLAN_TX+ PCIE_RXD_P
10 32 4.7K 4.7K_NC 4.7K C414
12 PCIE_TX6-/GLAN_TX- PCIE_RXD_N
13,30,33,34 PCIE_WAKE# 12 U18 0.1U
2
R337 0 WAKE# 10
6,12,25,30,33,34 PLTRST# 10 PERST# 8 VCC A0 1
R336 0_NC 29 65 BCM_SCL 7 2 X7R
12 SB_LOM_PCIE_RST# PCIE_REFCLK_P SCLK_EECLK NC A1
28 63 SI 6 3
17 CLK_PCIE_LOM PCIE_REFCLK_N SI SCL A2
64 BCM_SDA 5 4
17 CLK_PCIE_LOM# SO_EEDATA SDA VSS
62 CS#
+3.3V_LAN CS# BCM_SCL R380 4.7K
24LC02BT-I/STG
R8093 & R8094: Stuff only if no pull-ups on system side
SI R369 4.7K
1
CS# R368 4.7K

LAN_DISABLE# R385
+3.3V_RUN 4.7K
R378
ENERGY_DET 59 LAN_ENERGY_DET T34 T33 T32 T31
4.7K +3.3V_LAN PAD PAD PAD
is hign active R384 1K
PAD
+3.3V_LAN
54
2
R383 1K VAUX_PRSNT +2.5V_LOM

53 VMAIN_PRSNT
3 C428 C424
31 LAN_DISABLE# LOW_PWR 0.1U_NC 4.7U_NC
58 17 R320 0 10 10
TEST1/SMB_CLK VDDC_IO/VDDP X7R X5R
57 TEST2/SMB_DATA 805
LAN_XTALO 22 18 LAN_REGCTL25
XTALO REGOUT12_IO/REGCTL25
3
LAN_XTALI 21 XTALI
LAN_RDAC 37 1 Q38
RDAC +3.3V_LAN MMJT9435T1G_NC
pin 57,58 R362 2 1 1 C419 C425 +2.5V_LOM

B B
2
4
R326 0.1U 4.7U
5784 pull-up 4.7k to 3.3V_LAN 10 10
1.24K/F
3
5787M connect SM-BUS to support ASF. +3.3V_LAN X7R X5R C413 C426
805 0.1U_NC 10U_NC
R332 2 1 4.7K_NC 14 LAN_REGCTL12 1 Q41 10 10
REGCTL12 MMJT9435T1G X7R X7R
LOMCLK_REQ# +1.2V_LOM 805
2
4
R331 2 1 0_NC
C455 C454
LOMCLK_REQ# 11 Package Body 0.1U 10U
CLK_REQ# 10 10
Pull-down R331 for 5787M.
X7R X7R
GND
Table 1 - Component Stuffing Requirements 16 R325 0 805

SUPER_IDDQ/GND
R8101 is required only if Q1 can
69
INSTALL NOT INSTALL R311 2 1 20K_NC not dissipate the required power
LAN_DISABLE# 31
BCM5784
(12) 5784M 5787M

R575,R577,R527,R534,R563, R574,R576,R529,R562,R564,
R568,R570,R572,Q101,C1721, R569,R571,R573,R585,R505, Note:thermal pad R325 39k 0
5787M C1722,C1723,C1724,R579,R581, R578,R580,R582 R311 20k *20k_NC
R583,R575,L79,R648,R649
R575,R577,R527,R534,R563,
R574,R576,R529,R562,R564, R568,R570,R572,Q101,C1721,
5784 R569,R571,R573,R585,R505, C1722,C1723,C1724,R579,R581,
A
R578,R580,R582 R583,R575,L79,R648,R649 A
QUANTA
Title
COMPUTER
LAN

GM3 2B

5 4 3 2 1
A B C D E
RJ-45 Connector
CON3
R316 330
1 2 12
TRANSFORM 42 IO_LOM_ACTLED_YEL#
+3.3V_LAN 13
LED_YN
LED_YP
Y
+3.3V_LAN RJ45-TX3- 8
L80 RJ45-TX3+ 8
4
7 7 4
24 RJ45-TX0+ RJ45-TX1- 6
CHIP SIDE MEDIA SIDE TX0+ 6
1
TRD0+ 1 RJ45-TX2- 5
42 TRD0+ TD0+ Q28 5
23 RJ45-TX0- RJ45-TX2+ 4
TRD0- TX0- DTA114YUA RJ45-TX1+ 4
42 TRD0- 2 TD0- D9 47K 3 3
22 TXCT0 RJ45-TX0- 2
TDCT TXCT0 RJ45-TX0+ 2
3 TDCT0 42 SPD100LED# 1 2 2 1 1
1:1 21 TXCT1
TXCT1 10K
TDCT 4 10
TDCT1 RJ45-TX1+ CH751H-40PT LED_GND
TX1+ 20
TRD1+ 5
42 TRD1+
3
TD1+ RJ45-TX1- R250 330 O G
TX1- 19
TRD1- 6 +3.3V_LAN D35 2 1 9
42 TRD1- TD1- 1:1 LED_GN/AP
18 RJ45-TX2+ 1 2 11
TX2+ LED_GP/AN
CHSGND1
CHSGND2
TRD2+ 7
42 TRD2+ TD2+
17 RJ45-TX2- R691 4.7K
TRD2- TX2-
42 TRD2- 8 TD2- 42 SPD1000LED#
16 TXCT2 +3.3V_LAN
TDCT TXCT2
9 TDCT2 1 2
1:1 15 TXCT3
14
15
TXCT3
1
TDCT 10 D36
TDCT3 CH751H-40PT Q27
14 RJ45-TX3+
TRD3+ TX3+ DTA114YUA
42 TRD3+ 11 TD3+ D10 47K
13 RJ45-TX3-
TRD3- TX3-
42 TRD3- 12 TD3- 42 LINKLED# 1 2 2
1:1
10K
MGG3S-00006 or H5120NL
CH751H-40PT
R254 330
3
2 1
3 TRD3- TRD3+ TRD2- TRD2+ TRD1- TRD1+ TRD0- TRD0+ 3
1
1
C977 C978 C979 C980 C981 C982 C983 C984
7p_NC 7p_NC 7p_NC 7p_NC 7p_NC 7p_NC 7p_NC 7p_NC
2
2
+3.3V_SUS
10 10 10 10 10 10 10 10
2
R317
FOR EMI requirement and should close to L80 0_0805
1
+3.3V_LAN
+2.5V_LOM
TXCT0 R744 75/F
TXCT1 R745 75/F
0603 package. TXCT2 R746 75/F
TXCT3 R747 75/F
2
3P C845
R300 L42 RJ45-TX0+ RJ45-TX0-
0_NC BLM18AG601SN1D_NC pop L75 for 5787M. 3P C854
depop L75 for 5784M. C338 RJ45-TX1+ RJ45-TX1-
1000P 3P C855
1
3K RJ45-TX2+ RJ45-TX2-
1
NPO 3P C860
2 2
TDCT 1808 RJ45-TX3+ RJ45-TX3-
layout note: layout note:

1
C359 C356 C315 C309

0.1U 0.1U 0.1U 0.1U cap should close to transformer cap should close to CONN
one cap mapping one pin
2
10 10 10 10
Reserved for EMI. Reserved for EMI.
1 1
QUANTA
Title
COMPUTER
LAN SWITCH

GM3 2B

A B C D E
1 2 3 4 5 6 7 8
+3.3V_ALW
U26
74AHCT1G08GW
5
A A
13,31,51 IMVP_PWRGD 2
4 ICH_PWRGD 6,13
31 RESET_OUT# 1
3
Keep Away from high speed buses
+3.3V_ALW
B B
R426
0
14
U21A
R428 1 2 0 1
49 1.25V_RUN_PWRGD
3
R424 1 2 0 2
48 1.5V_RUN_PWRGD
U21C
SN74AHC08PW 9
8
10
U21B
R422 1 2 0 4 SN74AHC08PW
52 3V_ALW_PWRGD
6
R420 1 2 0 5
52 5V_ALW_PWRGD
SN74AHC08PW
U21D
12
11 HWPG 31
R423 1 2 0 13
48 1.05V_RUN_PWRGD
SN74AHC08PW
C C
+3.3V_ALW
U32
74AHCT1G08GW
5
49 1.8V_SUS_PWRGD 2
4 RUN_ON 20,26,48,49,53
31 RUN_ON_1 1
3
R527 1 2 0_NC
D D
R526
1
10K_NC
2 RUN_ON
QUANTA
R530 10K_NC
1 2 RUN_ON_1
Title
COMPUTER
System Reset Circuit

GM3 2B

1 2 3 4 5 6 7 8
1 2 3 4 5
TH1 TH2 TH3 TH4 TH5 TH6 TH7

H-C394D126P2 H-TC276BC236D126P2 H-TC276BC236D126P2 H-TC394BC315D126P2 H-TC394BC315D126P2 H-C256D130P2 H-TC276BC354D126P2
1
A A

H-TC394BC276D126P2 h-c315d189p2 H-C315D157I197P2 H-C315D157I197P2 H-C315D126P2 H-C256D126P2 H-C433D433N
1
1
TH18 TH19 TH20 TH23
TH15 TH16 TH17 H-C315D157I197P2 H-TC276BC236D110P2 H-C315D157I197P2 H-TC197BC236D65P2
H-C276D126P2 H-TC394BC236D126P2 H-C315D157I197P2
1
1
B B

H-TC197BC236D65P2 H-TC197BC236D104P2 H-TC197BC236D65P2 H-TC197BC236D104P2 H-TC197BC236D65P2 H-TC275BC492D110P2 H-TC394BC315D126P2
1
1
TH31 TH33 TH34 TH35 TH32 TH36
h-tr8x9bc276d126p2 H-C118D118N h-c236d110p2 h-c236d110p2 h-o71x118d31x78p2 h-o71x118d31x78p2
1
C C
D D
QUANTA
Title
COMPUTER
Battery Selector

GM3 2B

1 2 3 4 5
A B C D E
+PWR_SRC
Id=9.6A@Vgs=10V
PQ24
SI4835BDY-T1-E3
1 8
2 7
PQ4 3 6
SI4835BDY-T1-E3 FL5 CHGR_IN 5
PR27
8 1 0.01/F/2512 HI1206T161R-10
4
+DC_IN_SS +DC_IN_SS 7 2 1 2 +DC_IN_SS
6 3
5
4
PC153 PR131
1 PC143 470K 1
4
2200P/50V 0.1U/50V/0603
PR29 PR28
10K 100K
CSSP
3
PQ9
2
2N7002W-7-F
CSSN
+DC_IN_SS
LDO
2
PD12 PC144 PC147 PC148
PC152
0.1U/50V/0603
SDM10K45-7-F
10U/25V/1206
10U/25V/1206
PR50
2200P/50V
365K/F
PR47
1
PC51
28
27
1
1U/25V/0805 0/0603
GND
CSSN
CSSP
PR49
LDO 22 PC150 1U/10V/0603
49.9K/F DCIN LDO
8731_ACIN 2 25 BST RDS(ON)=30m ohm

ACIN BST
5
6
7
8
2 PR41 PR40 PC50 2
10K/F 0.01U/25V 33/F/0603 0.1U/50V/0603 PQ30
PC57 21 4 SI4800BDY-T1-E3
LDO 1U/10V/0603 FL4
31 ACAV_IN 13 ACOK
26 PL3 PR122
VCC PC151
0 PR46 +3.3V_ALW 11 PC55 5.8UH 30% 5.5A 24m(SIL104R-5R8PF) 0.01/F/2512 HI1206T161R-10
1
2
3
VDD DHI CHG_CS 1
DHI 24 2 +VCHGR 54
PR38
5
6
7
8
15.8K/F 23 LX 3300P/50V PC9 PC12 PC17 PC20 PC125 PC129
4
PC53 0.1U/50V/0603 LX PR143 1/0603 PC135 PC24
0.1U/50V/0603
3300P/50V
1000P/50V
2200P/50V
10U/25V/1206
10U/25V/1206
10U/25V/1206
10 20 DLO 4 PR147
31,54 SMBCLK0 SCL DLO 2.2/0805
10U/25V/1206_NC
31,54 SMBDAT0 9 SDA
GNDA_CHG
14 BATSEL PGND 19 RDS(ON)=21m
SMBUS Address 12
1
2
3
31 IINP
IINP 8 IINP CSIP 18 ohm PQ29
12H
Adress :
SI4812BDY-T1-E3 PC154
17 1000P/50V
CSIN
6 CCV
PR39
CSIP Max Charging current
5 15 +VCHGR
CCI FBSA CSIN setting 4.7A
PR150 16 100
10K/F FBSB
4 CCS PC54
GND
DAC
3 220P/50V
PR48 REF
8.45K/F
TABLE 1
7
12
PC56 PC157 PC60 PC58 8731REF PU3

0.1U/10V
0.01U/25V
0.01U/25V
0.01U/25V
PC61 PC59
3 3
1U/10V/0603
0.1U/10V
PR145 TRIP CURRENT

ADAPTER(W) PR152 PR157 PR153 PR154
(A)
0/0603
GNDA_CHG 65 3.17 57.6K 13K 105 N/A
90 4.43 51.1K 17.8K 348 33.2K
+3.3V_ALW
130 6.43 32.4K 20.5K 100 27.4K
+5V_ALW 150 7.43 30.9K 24.9K 432 88.7K

+5V_ALW
SEE TABLE 1 PR155
PC162 PC163 100K_NC
200 9.75
11.28
19.1K 28K 301 36.5K
100P/50V_NC
PR152 PR148
0.01U/25V_NC
51.1K/F_NC 1M/F_NC
230 (see note3) 32.4K 6.49K 115 N/A
ADAPT_OC 31
SEE TABLE 1
PR149 Note 1: PR96 is popluated if ADAPT_TRIP_SEL is used to program for
SEE TABLE 1 100K_NC
the next lower adapter.
8
PR154 33.2K/F/0603_NC PU7A ADAPT_TRIP_SET is floating for the higher adaptor,

3
31 ADAPT_TRIP_SEL 3 +
1 2 PQ31 PR156 grounded for the lower adaptor.
2 1K_NC
- 2N7002W-7-F_NC Note 2: 24.9K at PR96 allows the 65W adaptor seetting to switch
1
0_NC PR151 PR157 PC161 PC159 PC160 PC158 LM393DR2G_NC

4
down to 45W.
100P/50V_NC
100P/50V_NC
17.8K/F_NC
0.01U/25V_NC
0.01U/25V_NC
4 PC156 4
0.1U/10V_NC Note 3: PR35 must be 5mOhms instead of 10mOhms for the 230W adaptor.
SEE TABLE 1
PR153
QUANTA
348/F/0603_NC
SEE TABLE 1 For GPRS immunity place PC41 & PC39 as close to Title
COMPUTER
Charger (ISL88731)
the IC as possible
GNDA_CHG Size Document Number Rev
GM3 2B

A B C D E
1 2 3 4 5
A A
BLANK PAGE FOR PAGE

B B
NUMBER SAME AS DISCRETE
C C
D D
QUANTA
Title
COMPUTER
GM3 2B

1 2 3 4 5
5 4 3 2 1
FL6 +PWR_SRC
HI1206T161R-10(160,6A)
+DC_PWR_SRC
PC166 PC167
PC69 PC68 10U/25V/1206 10U/25V/1206
2200P/50V 0.1U/50V/0603
+1.05V_VCCP
+1.05V_VCCP(UMA)
D TDC : 12.1A D
5
6
7
8
9
PC164
0.1U/16V_NC
51117DH 4 PQ32
OCP : 17.2A
FDS8878_DU Iout_ripple current : 2.605A
1
2
3
PR158 TPS51117RGYR PR160 PC165
0 PU8 0/0603 0.1U/50V/0603
26,44,49,53 RUN_ON 1 EN_PSV VBST 14 Frequency=300KHz 10
PL7
2 TON DRVH 13
1.5UH 30% 10A(SIL104R-1R5PF)_DU +1.05V_VCCP(DIS)
PR53 +1.05V_VCCP_P 51117LX +1.05V_VCCP_P
300/0603
3 VOUT LL 12 2 1 TDC : 7A
+5V_ALW 4 11 PC169 OCP : 10A
V5FILT TRIP
6
5
6
7
8
9
51117_FB + Iout_ripple current : 2.459A
330U/4V/ESR25
5 VFB V5DRV 10 +5V_ALW
PC168
44 1.05V_RUN_PWRGD 6 9 51117DL 4 PQ33 PR58 0.1U/10V
PGOOD DRVL 2.2/F/0603_NC
THERM
FDS6680AS_DU
7 8 PC62
GND PGND
1
2
3
PR51
0.015U/50V/0603_NC
PR159 80.6K/F/0603
15
100K PC63 PC66 PR161
1U/10V/0603 10K/F_DU PC71
0.1U/10V_NC
C PC64 2200p/50V_NC C
1U/10V/0603
+3.3V_SUS
PR54
0/0603
51117_FB
PR55
237K/F
PR52 UMA(12.1A) Discrete(7A)
200K/F/0603
FDS8880_NL FDS8878
PQ32 (BAM88800012) (BAM88780020)
FDMS8672S FDS6680AS
PQ33 (BAM86720000) (BAM66800061)
+1.8V_SUS SIL105RA-1R3 SIL104R-1R5PF

B PL7 (CV-13E0MZ00) (DC-15A00010) B
+3.3V_SUS PC82
+3.3V_RUN
7 10U/25V/1206 Max current->2.06A 11K/F 10K/F

7 PU5 PR161 (CS31102FB11) (CS31002FB26)
10 8 16 +1.5V_RUN_P
VIN1 VOUT1 +1.5V_RUN
2
PR183 PR182 PR66 9 17

100K_NC 100K_NC 100K VIN2 VOUT2
10 VIN3 VOUT3 18
PR64
0/0805
10
L6935_ADJ PC84
19 1 R1
1
44 1.5V_RUN_PWRGD ADJ NC1 PR68 PC86

5 PGOOD NC2 3
6 4 20K/F
0.1U/10V_NC
VBIAS NC3 22U/10V/1206

7 EN NC4 11
20,26,44,49,53 RUN_ON 20 12
PR65 0 SS NC5
NC6 13
2 14 L6935_ADJ
GND NC7
21 GND NC8 15
PC83 PC81
0.1U/10V PC85 L6935TR
680P/50V
0.1U/10V
PR67
R2 10K/F
A A
VOUT=0.5 x( 1+R1/R2)
QUANTA
Title
COMPUTER
GM3 2B

5 4 3 2 1
5 4 3 2 1
UMA(10.25A) Discrete(15.6A)
PR169
0_NC
+1.8V_SUS(DIS)
FDS8880_NL FDS6298 TDC : 15.6A
PQ35 (BAM88800012) (BAM62980005)
OCP : 22.4A
S3_1.8V S5_1.8V
Iout_ripple current : 4.896A
PHK28NQ03LT FDMS8672S
PQ34 (BAM28030Z12) (BAM86720000)
D D
PC179 PC178
10.5K/F/0603 13.3K/F/0603 0.1U/10V 0.1U/10V +1.8V_SUS(UMA)
PR172 (CS31053F909) (CS31333F919) TDC : 10.25A
OCP : 14.9A
+DC2_PWR_SRC FL7 +PWR_SRC

HI1206T161R-10
PC183 PC184 PC186 PC185
10U/25V/1206
10U/25V/1206
0.1U/50V/0603
2200P/50V
5
6
7
8
9
PR171
+1.8V_SUS_P 4 PQ35 2.2/0805

PU9 FDS6298_DU
PC172
TPS51116_8 Frequency=400KHz
1 19 +1.8V_DH
1
2
3
VLDOIN DRVH PC180
C 1U/10V/0603 PR168 0 PC177 0.1U/50V/0603 2200P/50V PL8 C
+0.9V_DDR_VTT 2 VTT VBST 20
NEC_MPC1040LR88C_0.88uH
4 18 +1.8V_LX +1.8V_SUS_P +1.8V_SUS
PC175 PC171 VTTSNS LL
10U/10V/0805 10U/10V/0805 +1.8V_DL PC95
10 5 GND DRVL 17
PC170
330U/2.5V/ESR15
3 VTTGND PGND 16
5
6
7
8
9
+ +
0.1U/25V/0603
DIS_MODE 6 11 S3_1.8V PR175 0 PR170 PC94
10
MODE S3 RUN_ON 20,26,44,48,53
PR164 4 PQ34 2.2/0805_NC
7 12 S5_1.8V PR174 0 FDMS8672S_DU
330U/2.5V/ESR15_DIS
+V_DDR_MCH_REF VTTREF S5 SUS_ON 31,53
0/0603 5VIN 8 14 5VIN
1
2
3
PC173 COMP V5IN PR173 100K/F PC181
3300P/50V 9 13 +3.3V_ALW 2200P/50V_NC
VDDSNS PGOOD
GND
GND
GND
GND
GND
GND
GND
10 VDDQSET CS 15
1.8V_SUS_PWRGD 44
PR165 0
21
22
23
24
25
26
27
FOR DDR II
PC182
PR172
PR163 0 1000P/50V_NC 13.3K/F/0603_DU
DIS_MODE PR176
+5V_ALW 5VIN OCP Setting 0
(Note1)
PR177 0_NC
PC96
+1.8V_SUS_P +5V_ALW2 4.7U/10V/0805
PR162 0_NC PR181 0
B B
PC174
18P/50V_NC
PC176 PR166
143K/F_NC
0.1U/10V_NC
(Note 1) Current Limiting Setting :

PR167
100K/F_NC +1.8V_SUS PC75 Rtrip(Kohm)=100*(Iocp-0.5*Iripple)*Rds(on)
+1.8V_SUS
10U/4V/0805
Enable Delay 200us

Max current->0.9A
PU4
+3.3V_SUS 10 9 +1.25V_RUN_P
IN OUT +1.25V_RUN
PR63
PR59
43K/F
44 1.25V_RUN_PWRGD 2 VCC OUTS 6 10
100K MAX8794
5 PGOOD PGND 8
7 SHDN AGND 3
20,26,44,48,53 RUN_ON PC76 PC78
PR60 0 4 1 10U/4V/0805 10U/4V/0805
A REFIN REFOUT A
BP
11
PC80 PC74
PC79 PR62
PR61
100K/F
1000P/50V 0.1U/25V/0603 PC77
1U/10V/0603
0.33U/16V/0603 0 QUANTA
Title
COMPUTER
1.8VSUS & 0.9VTT (TPS51116)

GM3 2B

5 4 3 2 1
1 2 3 4 5
+5V_SUS
+PWR_SRC
PR19 FL1
10/0603_DIS HI1206T161R-10_DIS
GFX_+5V_RUN +GPU_PWR_SRC
20 GFX_RUN_ON GFX_RUN_ON
A A
PC3 PC1
10U/25V/1206_DIS PC18
10U/25V/1206_DIS PC13
2200P/50V_DIS 0.1U/50V/0603_DIS
+VCC_GFX_CORE
PC33 PC136
1U/10V/0603_DIS 2.2U/10V/0805_DIS TDC : 13A
2
OCP : 15A
PD5
SDM10K45-7-F_DIS
28
27
26
25
24
23
22
PR18 PU1
5
6
7
8
9
61.9K/F_NC +VCC_GFX_CORE
TPO
AVDD
GND
VDD
SHDNA#
SKIP#
PGND1
PR25
PR12 0/0603_NC 0/0603_NC 4 PQ5
+VCC_GFX_CORE 1 21 PR22 PC26 FDS6298_DIS
TON LGATE 1/0603_DIS 0.22U/50V/0603_DIS
2 20 PL4
1
2
3
OVP/UVP BOOT NEC_MPC1040LR88C_0.88uH_DIS
GFX_REF 3 19 ISL88550LX +1.1V_RUN_VGA_P
REF PHASE
Ra
4 18 ISL88550DH
ILIM MAX8632ETI+_DIS UGATE
5
6
7
8
9
PC155 PC140
140K/F_DIS PR129
PC23 PR13
5 POK1 VIN 17
ISL88550DL 4 2.2/0805_NC + + 10
220U/2.5V/ESR15_DIS
220U/2.5V/ESR15_DIS
0.22U/6.3V_DIS Rb 6 16 PC149
PR11 POK2 OUT 0.1U/10V_DIS
PQ6
178K/F_DIS 7 15 FDMS8672S_DIS Frequency:300K
1
2
3
STBY# FB PC134
4 29
PGND2
REFIN
EPAD
VTTR
VTTS
B 30 32 1500P/50V_NC B
VTTI
VTT
EPAD EPAD
SS
31 EPAD EPAD 33
+3.3V_SUS PR9
100K_DIS
PC8
8
10
11
12
13
14
1 2
GFX_REF
PR3 0.047U/10V_DIS +1.8V_SUS

100K
1 2
PR7 PC11
4.99K/F/0603_DIS 10U/6.3V/1206_DIS PC123 PR119
1000P/50V_DIS 24.9K/F/0603_DIS
PR26
PC5
GFX_PCIE_PWRGD +1.1V_GFX_PCIE
PR8 PR2
1U/10V/0603_DIS
100K_DIS 49.9K/F/0603_DIS 0/0603_DIS
GFX_CORE_PWRGD
PR118 PR116 Place near GND pin24
118K/F_DIS
PC6 PC7 PR120 PR117
PC14 22U/4V/0805_DIS 22U/4V/0805_DIS 0_DIS 0/0603_NC
69.8K/F/0603_DIS
0.01U/16V_DIS
PC120
100P/50V_NC
C C
+3.3V_SUS
TON OPEN REF PR15 256MB
3
10K_NC
Frequency 300K 450K PR16
10K_DIS
19 GFX_CORE_CNTRL 2 PQ1
BSS138_NL_DIS
High: 1.1V
PR123 PC128
1
Low: 0.95V 100K_DIS 0.01U/16V_DIS
"for the 128MB sku: No

Stuff PR44 for the 256MB
sku: Stuff PR44".
D D
ILIM Iovp=(2*(Rb/(Ra+Rb))*0.1*(1/RDSON)+(I_DELTA/2)
SKIP# AVDD = Low-noise, forced-PWM mode.
QUANTA
OVP/UVP
GND = Pulse-skipping operation.
The overvoltage limit is 116% of Vout. Title
COMPUTER
VGA DC/DC
The undervoltage limit is 70% of Vout.
GM3 2B

1 2 3 4 5
5 4 3 2 1
+PWR_SRC
FL2
HI1206T161R-10
+CPU_PWR_SRC
+3.3V_SUS FL3
HI1206T161R-10
T1
PQ2
PR20 PC19 PC126 PC28 PC130 PC133 PC29 PC124 PC21
5
6
7
8
9
5
6
7
8
9
PAD
PR121 NTMFS4707NT1G
2.2/0805_NC
2200P/50V
10/0603
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
0.1U/50V/0603
0.1U/50V/0603
2200P/50V
UG1 4 4
D D
PR4 0
H_DPRSTP# 3,6,11
PQ3
1
2
3
1
2
3
PR5 499/F
DPRSLPVR 6,13
NTMFS4707NT1G_NC
PR6 0 PC35
IMVP_VR_ON 31
PC15 1500P/50V_NC
CLK_EN#
0.1U/10V
VID6 4
PL5 0.36uH_30A_ETQP4LR36WFC
VID5 4
PH1 2 1 +VCC_CORE
VID4 4
VID3 4
VID2 4 PQ25
3
+3.3V_SUS NTMFS4119NT1G PR133 PC52 PC48 PC47
VID1 4
5
6
7
8
9
5
6
7
8
9
2.2/0805
VID0 4
49
48
47
46
45
44
43
42
41
40
39
38
37
PU2 LG1 4 4
0.1U/50V/0603
330U/2V/ESR9
330U/2V/ESR9
3V3
CLK_EN#
DPRSTP#
VID6
VID5
VID4
VID3
VID2
VID1
VID0
GND
DPRSLPVR
VR_ON
PR124 PC139 + +
1.91K/F PR10 1500P/50V
1
2
3
1
2
3
1/0603
13,31,44 IMVP_PWRGD 1 PGOOD BOOT1 36
PR14 0
2 35 UG1 PC22 PQ26
3 H_PSI# PSI# UGATE1
0.22U/50V/0603 NTMFS4119NT1G
PR125 4.99K/F
PWR_MON 3 34 PH1
PMON PHASE1 VSUM PR30 3.65K/F/0603
PC127 0.1U/10V PR17 147K/F
PR126 499/F 4
5 33
RBIAS PGND1 ISEN1 PR32 10K/0603
+3.3V_SUS
5 32 LG1 +5V_SUS PR37
31 IMVP6_PROCHOT# VR_TT# LGATE1 ISL6266_VO 1/0603
PR144 NTC_470K_NC PR21 4.02K/F_NC PC25
6 NTC
ISL6262A PVCC 31
ISEN2 PR35 10K/0603 +CPU_PWR_SRC
PC32 0.015U/16V 2.2U/10V/0805
C 7 30 LG2 C
PC27 0.01U/16V_NC SOFT LGATE2
MAT
PQ8 PR23 PC10 PC16 PC31 PC30 PC132 PC131 PC121 PC122
ERTJ0EV474J ISL6266_VO PR127 12.7K/F 8 29
OCSET PGND2
5
6
7
8
9
5
6
7
8
9
NTMFS4707NT1G_NC
10U/25V/1206
10U/25V/1206
Close to Phase 1 Inductor
2.2/0805_NC
0.1U/50V/0603
0.1U/50V/0603
10U/25V/1206_NC
10U/25V/1206_NC
2200P/50V
2200P/50V
PC36 1000P/50V 9 28 PH2 UG2 4 4
VW PHASE2
PR24 6.81K/F
5 UG2 PQ7
5 10 27
1
2
3
1
2
3
COMP UGATE2 PC34
0.22U/50V/0603 NTMFS4707NT1G PC37
PC39 220P/50V 11 26 PR128 1/0603 1500P/50V_NC
FB BOOT2
PL6 0.36uH_30A_ETQP4LR36WFC
12 25 PH2 2 1 +VCC_CORE
PR31 97.6K/F PC38 470P/50V FB2 NC
DROOP
3
VDIFF
VSUM
ISEN2
ISEN1
VSEN
PQ27 PR132
GND
VDD
RTN
DFB
VIN
2.2/0805
VO
5 NTMFS4119NT1G
5
6
7
8
9
5
6
7
8
9
PR134
1K
13
14
15
16
17
18
19
20
21
22
23
24
PR139 255/F PC141 1000P/50V LG2 4 4
+ PC67 + PC65
PR135
ISEN2 PC49
ISEN1
330U/2V/ESR9
PC45 0.22U/25V/0603 PC138
0.1U/50V/0603
330U/2V/ESR9
1
2
3
1
2
3
PR138 1K PR130 ISL6266_VO 1500P/50V
5 5 PC40 1K
ISL6266_VO
0
0.01U/50V +CPU_PWR_SRC
5
VSUM
5 PC44 0.22U/25V/0603
PR136 PR140 PQ28
10/0603
4.53K/F/0603 NTMFS4119NT1G
PR36
PC42 10/0603 VSUM PR42 3.65K/F/0603
B 5 +5V_SUS B
180P/50V ISEN2 PR43 10K/0603
PC43
PC41 PC146 PC137
0.33U/16V/0603
0.01U/50V PC46 1U/10V/0603 ISL6266_VO PR45 1/0603

0.1U/50V/0603
PR137
0.01U/16V
PR33
0 ISEN1 PR44 10K/0603
4 +VCCSENSE 0/0805
4 +VSSSENSE
VSUM
0
PR34
Parallel
PR142
PC145 PR141 2.61K/F
PC142 0.022U/16V
0.22U/10V/0603 11K/F
PR146
10K_NTC
ISL6266_VO
Close to Phase 1 Inductor
A A
QUANTA
Title
COMPUTER
CPU_Core_2Phase (ISL6266)

GM3 2B

5 4 3 2 1
5 4 3 2 1
DC/DC +3V_ALW/+5V_SUS/+5V_ALW /+15V_ALW

PR103
1 2 ISL6237_ONLOD
PR179 Place these CAPs
HI1206T161R-10
close to FETs 390K PR102 +3.3V_ALW
150K/F
+DC1_PWR_SRC No Install for ISL6236
Place these CAPs TDC : 6.2A
Install 10 ohm for MAX8778 close to FETs
PR178
HI1206T161R-10
OCP : 8.6A
D
+PWR_SRC Iout_ripple current : 2.78A D
PC191 PC110 PC188 PC102 PC112 PC101 +5V_ALW2 PR94 +5V_VCC1 PC189 PC192
10/0603_NC Frequency=300KHz
2200P/50V
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
PR101
0.1U/50V/0603
0.1U/50V/0603
+5V_ALW
2200P/50V
0/0603 PC104
4.7U/10V1206
TDC : 7.25A +3.3V_ALW
OCP : 9.8A PR108
0_NC
PR109
0
PC107 PC111
ISL6237_ONLOD
1U/10V/0603
Frequency=400KHz PC105
0.1U/10V
0.1U/50V/0603 PR105
0_NC PR110
+5V_ALW PC106
0_NC
2 1
5
6
7
8
0.1U/50V/0603_NC PQ23
PR106 4 SI4800BDY-T1-E3
0_NC
42
8
7
6
5
4
3
2
1
10
1
2
3
8
7
6
5
PC99 41 PL2
PAD
LDOREFIN
VIN
NC
VCC
TON
LDO
ONLDO
REF
0.1U/50V/0603_NC PAD 3.3UH +-30% 8A (SIL1045R-3R3)
40 PAD
PQ36 +5V_DH +3.3V_LX +3.3V_ALWP
10 FDS8884
4 39
38
PAD PR114
+5V_ALWP 9 PAD 365K/F
BYP REFIN2 32
PL9 3 10 31
2
1
3.3UH +-30% 8A (SIL1045R-3R3) OUT1 PU6 ILIM2 PC109 PC115
11 FB1 OUT2 30
+5V_ALWP +5V_LX 1 2 12 29 PR112
ILIM1 SKIP#
5
6
7
8
C PR99 200K/F POK1 ISL6237 POK2 0 C
13 PGOOD1 PGOOD2 28 PQ22
+5V_EN1 +3.3V_EN2 +
0.1U/50V/0603
14 EN1 EN2 27
PC103 PC190 15 26 +3.3V_DH 4 SI4812BDY-T1-E3 330U/6.3V/ESR17
PR88 DH1 DH2
16 LX1 LX2 25
9
8
7
6
5
0_NC 37
+ PC100 PAD
PQ37
330U/6.3V/ESR17
36
1
2
3
PAD
PGND
+5V_DL 0.1U/50V/0603 PR113
0.1U/50V/0603
FDS6680AS_NL
BST1
BST2
4
GND
VDD
PAD
PAD
PAD
DL1
DL2
PC113 0_NC
NC
0.1U/50V/0603
PR87 PR107
3
2
1
35
34
33
17
18
19
20
21
22
23
24
0 PR96 1/0603
1/0603
+3.3V_DL
SECFB
+5V_ALW2
PR111
PC108 0/0603 0
1U/10V/0603 PR104
+3.3V_ALWP +3.3V_ALWP
PC117
10U/6.3V/0603_NC PD10
1 PC114 PR98
0.1U/50V/0603 100K PR115
BAT54S-7-F 3 100K
PC118
2
PC116 POK2
+15V_ALW 3V_ALW_PWRGD 44
0.1U/50V/0603 0.1U/50V/0603
B PD11 POK1 B
5V_ALW_PWRGD 44
1
BAT54S-7-F 3
SECFB
+5V_ALW2
PC119
PR180
0.1U/50V/0603
PR90
+5V_ALW2
39K/F 0_NC
PR89 PR92
0 0
+3.3V_EN2 THERM_STP# 31,39
PD9 1SS355
+5V_EN1 2 1 H_THERMTRIP# 3,6
31 5V_ALW_ON
200K/F 0
PR95
PR97 PR91
A 0_NC A
QUANTA
Title
COMPUTER
VGA DC/DC

GM3 2B

5 4 3 2 1
1 2 3 4 5
+5V_ALW2 +3.3V_ALW +15V_ALW +3.3V_ALW +3.3V_SUS

+5V_ALW2 +3.3V_ALW +5V_ALW
+5V_RUN +3.3V_SUS
+15V_ALW +5V_RUN PQ17
PQ20 3.5A FDC655BN 0.44A
SI4800BDY-T1-E3 6
1
8 3 5 4
1
7 2 PR72 PR74 PR78 2 PC92
PR93 PR86 PR100 6 1 PC97 100K 100K_NC 100K 1
2
100K 100K_NC 100K
0.1U/50V/0603
5
PR85 PR77
0.1U/50V/0603
3
20K SUS_3.3V_ENABLE 20K
4
RUN_ENABLE
3
A A
1
3
SUS_ON_3.3V# 5
RUN_ON# 5 PQ16A
1
PQ21A 2N7002DW-7-F
4
6
1
2N7002DW-7-F PC98 2 PC93 PR76
31,49 SUS_ON
4
2 4700P PQ16B 4700P 100K_NC
20,26,44,48,49 RUN_ON
PQ21B 2N7002DW-7-F
2
1 2N7002DW-7-F
2
50 50
603 603
+5V_SUS
+15V_ALW +5V_ALW PQ13 +5V_SUS
SI4800BDY-T1-E3 TDC : 1A
8 3
7 2
1
6 1 PC90
2
PR75 5
PR73
0.1U/50V/0603
100K
PQ11 +1.8V_RUN 20K
4
+15V_ALW +1.8V_SUS +1.8V_RUN
2
FDS6298_DU 3.86A(DIS) SUS_ENABLE_5V
1
9 0.38A(UMA)
3
B 8 3 B
1
2
7 2 SUS_ON_3.3V# 2
PR56 6 1 PC72 PC91
2
100K 5 PQ15 4700P
1
PR57 2N7002W-7-F
0.1U/50V/0603
25
20K
2
4
RUN_ENABLE_1.8V
1
3
RUN_ON# 2
1
PQ10 PC70 +1.8V_RUN UMA Discrete

1
2N7002W-7-F 0.033U
2
SI4800BDY-T1-E3 FDS6298
50 PQ11 (BAM48000040) (BAM62980005)
603
+3.3V_RUN
+15V_ALW +3.3V_ALW +3.3V_RUN
PQ12 5.3A
FDS8880_NL
8 3
7 2
1
6 1 PC88
2
PR71 5
100K PR69
0.1U/50V/0603
C C
PD6 20K
4
CH751H-40H_NC
2
RUN_ENABLE_3.3V 1 2
1
3
PR70
1
RUN_ON# 2 0
1 2 PC89
PQ14 4700P
1
2N7002W-7-F
25 +1.8V_SUS +5V_SUS +3.3V_SUS

Reserve discharge path
1
R1 R2 R3
30/F_NC 1K_NC 1K_NC
Reserve discharge path
3 2
3 2
3 2
+5V_RUN +3.3V_RUN +1.8V_RUN +1.5V_RUN +0.9V_DDR_VTT +1.25V_RUN SUS_ON_3.3V# 2 2 2
Q1 Q2 Q3
1
1
2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC

R216 R219 R221 R218 R220
1K_NC R217 1K_NC 1K_NC 1K_NC 1K_NC
10_NC
3 2
3 1
3 2
3 2
3 2
3 2
D D
RUN_ON# 2 2 2 2 2 2
Q21 Q26 Q22 Q25 Q24 Q23

QUANTA
1
2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC
Title
COMPUTER
RUN POWER SW

GM3 2B

1 2 3 4 5
A B C D E
PC2 2200P +3.3V_ALW

1 2
PC4 0.1U PD2 PD1 PD4 PD3
2
1 2 603 DA204U_NC DA204U_NC DA204U_NC DA204U_NC
50
50 +3.3V_ALW
for EMI resquirement, add Reserve on jump on +VCHGR
and close to pin1 and 2 of JABT1
3
1 1
+VCHGR 46
Adress : 16H C975
1
1000P
50 20 20 20 20 PR1
JBAT1
10 10K
1 RP1 SMBUS Address 16
BATT1+ 100X2
2
2
BATT2+
SMB_CLK 3 1 2 SMBCLK0 31,46
SMB_DAT 4 3 4 SMBDAT0 31,46
BATT_PRES# 5
SYSPRES# 6 1 2 PBAT_PRES# 31
BATT_VOLT 7 3 4 PBAT_ALARM#
BATT1- 8
9 RP2
BATT2- 100X2
1775946-2
+5V_ALW2
+3.3V_ALW
2
PD7
DA204U
1
PR82
2.2K
3
PQ19
2
2 2N7002W-7-F 20 2
PR81
DB_PSID PL1 DB_PSID_R 3 1 1 2
BLM11B102SPT PS_ID 31
603 100
2
PR83 +5V_ALW2 +5V_ALW2
100K/F
PD8
2
DA204U_NC
1
2
D31 PR79
3
SSM24PT_NC 10K
2
2
3
1 2 PS_ID_DISABLE#
1
1
PQ18
40 PR84 MMST3904-7-F PR80 100_NC
20
15K/F
40
2
3 3
J5
17 GND DC 1 +DC_IN_SS
18 GND DC 2
19 GND DC 3
20 GND DC 4
21 GND DC 5
22 GND DC 6
23 GND DC 7
24 GND DC 8
25 GND DC 9
26 10 DB_PSID
JACK_LED PSID
+5V_SUS 27 PWR PWR 11 +5V_SUS

ICH_USBP2- 28 12 ICH_USBP3-
12 ICH_USBP2- USB- USB- ICH_USBP3- 12
ICH_USBP2+ 29 13 ICH_USBP3+
12 ICH_USBP2+ USB+ USB+ ICH_USBP3+ 12
30 GND GND 14
38 BAT1_LED 31 BAT_LED BAT_LED 15 BAT2_LED 38
12 USB_OC2_3# 32 USB_OC USB_EN 16 USB_R_SIDE_EN# 31
QT110326-3101G-7F
4 4
QUANTA
Title
COMPUTER
DCIN,BATT CONNECTOR
8/15: move the righT side USB and DC-in connector schematic to DB.
so change BTB(J14) CONN to 32pin Size Document Number Rev
GM3 2B

A B C D E
5 4 3 2 1
Reserved for EMI.

26
Stitching caps PV1

150-265525-C1(H:5.5)
PV2
150-265525-C1(H:5.5)
PV3
150-265525-C1(H:5.5)
+PWR_SRC +1.5V_RUN +1.5V_RUN +1.8V_SUS +1.05V_VCCP
1
GND
GND
GND
PC87 C463 C433 C389 C534
D D
0.1U_NC 0.1U_NC 0.1U_NC 0.1U_NC 0.1U_NC
2
1
+1.5V_RUN
25 +1.05V_VCCP
25 +1.8V_SUS
25 +1.05V_VCCP
25 +3.3V_RUN
25
603 603 603 603 603
Page 26 Page 27 Page 31 Page 38 Page 40

SATA (HDD&CD_ROM) PCCARD /CONN SIO(MEC5025) Azelia CODEC LAN(BCM5755M)
C C
Page 48 Page 49
1.5VRUN,1.05V(VTT) 1.25V,1.8V,0.9V
Place C860,C216,C1426 close to PQ33. Place C867,C254,C1428 close to PQ91.

Place C862,C222,C1427 close to PQ73. Place C863,C253,C1429 close to PQ92.
Page 51 Page 52
CPU_MAX8786(3phase) D/D Power
B B
A A
QUANTA
Title
COMPUTER
EMI CAP

GM3 2B

5 4 3 2 1
1 2 3 4 5 6 7 8
30
+3.3V_SUS 32 WWAN, WPAN
7
8 EXPRESS CARD
A 2.2K 2.2K A
+3.3V_WLAN
AJ26 ICH_SMBCLK 7002 WLAN_SMBCLK 30
MINICARD-WLAN
ICH8-M AD19 ICH_SMBDATA WLAN_SMBDAT 32
7002
+3.3V_ALW
+3.3V_WLAN
100
3
2.2K 2.2K 4 BATTERY
100
110 SMBCLK0 10
111 SMBDAT0 9 CHARGER
B B
+3.3V_ALW
10K 10K 6
5
LCD
+3.3V_RUN
115 SMBCLK1 7002 7
116 SMBDAT1 6 CLOCK
7002
+3.3V_RUN 10
SIO 9 THERMAL
ITE8512
C C
2
+3.3V_ALW MEDIA BUTTON
3
2.2K 2.2K
+3.3V_RUN
117 SMBCLK2 7002

D
118 SMBDAT2 D
7002
8 QUANTA
+3.3V_RUN 7 M86LP/THERMAL Title
COMPUTER
SMBUS BLOCK

GM3 2B

1 2 3 4 5 6 7 8
5 4 3 2 1
POWER STATES
Signal SLP SLP SLP S4 ALWAYS SUS RUN
S3# S4# S5# STATE# PLANE PLANE PLANE CLOCKS USB PORT# DESTINATION
State
S0 (Full ON) / M0 HIGH HIGH HIGH 0 Right Top

D D
S3 (Suspend to RAM) / M1 LOW HIGH HIGH 1 Right Bottom
S4 (Suspend to DISK) / M1 LOW HIGH HIGH 2 Side TOP
S5 (SOFT OFF) / M1 LOW HIGH LOW 3 Side Bottom

ICH8-M 4 Ext. USB TOP
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH
S4 (Suspend to DISK) / M-OFF LOW LOW HIGH 5 DIgital Camera
S5 (SOFT OFF) / M-OFF LOW LOW LOW 6 Express Card
7 WPAN/Bluetooth
PM TABLE
C 8 Ext. USB Bottom C
+3.3V_ALW +1.8V_SUS +0.9V_DDR_VTT +3.3V_RUN_CARD +DC_IN
+3.3V_RTC_LDO +1.8V_LOM +1.05V_VCCP +2.5V_RUN +DC_IN_SS 9 WWAN
power +3.3V_WLAN +3.3V_LAN +1.25V_RUN +5V_MOD +PWR_SRC
plane +5V_ALW +3.3V_SUS +1.5V_CARD +5V_RUN +RTC_CELL 1 None
+15V_ALW +5V_SUS +1.5V_RUN +5V_SPK_AMP
+3.3V_CARD +CPU_PWR_SRC 2 None
+3.3V_CARDAUX +VCC_CORE ECE 5011
+3.3V_R5C832 +VDDA 3 None
State
+3.3V_RUN
S0 ON ON ON ON 4 None
S3 ON ON OFF ON
PCI EXPRESS DESTINATION
S5 S4/AC ON OFF OFF ON
B
Lane 1 MINI CARD-1 WWAN B
S5 S4/AC don't exist OFF OFF OFF ON

Lane 2 MINI CARD-2 WLAN
Lane 3 MINI CARD-3 WPAN

PCI TABLE Lane 4 Express Card
PCI DEVICE IDSEL REQ#/GNT# PIRQ Lane 5 None
Lane 6 None
BCM4401B AD16 REQ#0 / GNT#0 PIRQB
R5C833 AD17 REQ#1 / GNT#1 PIRQC: Card reader

A
PIEQD: 1394 A
QUANTA
Title
COMPUTER
Schematic Block Diagram1

GM3 2B

5 4 3 2 1
5 4 3 2 1
GM3 Power Design Block Diagram

2007/09/06 +5V_SUS +3.3V_SUS
D SI4835 Q3 D
FDS4835
+DC_IN +DC_IN_SS
IMVP_VR_ON
Power Jack CPU POWER IMVP_PWRGD
ISL6266
Adapter input
+VCC_CORE
TWO PHASE
SOLUTION
Charger
Pag 51
MAX8731A +5V_VCC1
5V_ALW_ON
+5V_ALW
Pag 46 SYSTEM POWER
+3.3V_ALW
ISL6237
+VCHGR
+5V_ALW2(for +3.3V_ALW) +5V_ALW2
+15V_ALW
C 3V_ALW_PWRGD C
Pag 52
SI4835 5V_ALW_PWRGD
+PWR_SRC
+5V_ALW
Primary Battery
SUS_ON
DDR POWER +1.8V_SUS
TPS51116 1.8VSUS_PWRGD
Pag 49
RUN_ON +0.9V_DDR_VTT
+1.8V_SUS FDS6298 +1.8V_RUN TPS51116/LDO
Pag 53
RUN_ON RUN_ON
+1.8V_SUS MAX8794
RUN POWER +1.25V_RUN
PLANE
+5V_ALW SI4800BDY +5V_RUN
B
SWITCH B
Pag 53 RUN_ON
+5V_ALW
RUN_ON
1.05V_RUN_PWRGD
RUN_ON N&S BRIDGE
+3.3V_ALW FDS8880_NL +3.3V_RUN +1.05V_VCCP
POWER
Pag 53
TPS51117
RUN_ON
Pag 48
+1.8V_SUS L6935TR +1.5V_RUN
+3.3V_ALW
FDC655BN +3.3V_SUS
+5V_SUS
Pag 53 RUN_ON
SUS_ON
A SUS POWER GFX_RUN_ON GFX_CORE_PWRGD A
N&S BRIDGE +VCC_GFX_CORE
POWER
SI4800BDY MAX8632ETI+
+5V_ALW +5V_SUS
Pag 53
Pag 50 QUANTA
GFX_PCIE_PWRGD
Title
COMPUTER
SUS_ON MAX8632/LDO Power Block Diagram
+1.1V_GFX_PCIE
GM3 2B

5 4 3 2 1
6 5 4 3 2 1
Model Item Page Date Rev. Description

Base on David.Lin 070725 1400 release preliminary schematic to check the all part PCB
Pacino footprint. I found there are some parts not had footprint and update it. The change location
as below.
of Intel
There are some concern need to highlight: 1. D1changed to CH751H-40PT. 2. L84 & L85 need to
1 All 7/25 1A changed to Dell PSL part. 3. LAN jack need to double check. 4. JKB1, JMOD1, JP1, L15 need
to get the spec for create new layout footprint and apply for new P/N. 5. JDIM1 & JDIM2
should be conbined to one JDIM.
U12, L27, L28, C225, C226, D4, L9, U3, JDIM2, D1, L84, L85, U14, U18, U22, U23, U25, BT2,
CON2, CON3, L34, L35, Q10, U11, U13,ESD1, CON7, D15, D38, D39, D40, JACMER1, JKB1, JMOD1,
JP1, L15, M1, Q7, Q67, SW1, U20, U41, FL1, FL3, FL4, FL7, FL8, FL9, FL10, FL11, JDCIN1,
PC125, PC139, PC151, PC153, PC161, PL3, PL4, PL10, PL11, PL12, PQ13, PQ24, PQ42, PQ43,
PQ44, PQ45, PR84, PU1, PU4, PU9.
FAE review schematic and recommend add C8466 & C8356 between REM_DIODE1_P and REM_DIODE1_N.
F This is just a reservation in case there's any noise coupling issue happening. F
Then have 2 different filter cap locations (one near EMC1423 and the oyher near the OTP 3904
2 39 8/13 1A diode) to try to reduce the noise.
Of cource, only one cap can be installed.
FAE review schematic and recommend add poly switch and 0.1u cap colse to
3 25 8/13 1A 5V_RUN of HDMI CONN to avoid NB reboot.
4 29 8/15 1A FAE review schematic, NC FILO pin since 5C833 don't need cap to GND
5 19 8/15 1A The strap on VIP[3] is for enabling HD Audio on M86. so pull to hign.
6 54 8/15 1A move the right side USB and DC-in connector schematic to DB. so change BTB(J2) CONN to 32pin
8/15 FAE review schematic:

7 19 8/15 1A reverse TMDS signal for working property.
change voltage allocation resistor to make sure the input clock swing level is at 1.8V
8/16:per SPEC recommend: use 7002 to avoid the

8 39 8/16 leakage current from 3V_SUS.
1A
8/17:add diode to protect below GPIO port,p39---FAN1_PWM p38---SNIFFER1 and POWER_ SW_IN0#,
9 37-39 8/17 p37---MEDIA_INT
1A
8/20: For FAE suggestion. Charge pump from +5V LDO, might cause high ripple voltage.
Add PC116 10U/6.3V/0603.
10 52 8/20 1A
11 52 8/20 1A Since FDS8878 Rg too big,change PQ44 to FDS8884.
12 52 8/20 1A Change PR225 to 180K and PR224 to 294K for setting current limit.
E E
13 52 8/20 1A For FAE recommend , PD16 could be deleted.
14 49 8/20 1A Change PR85 to 143K for 1.82 output voltage
15 48 8/20 1A Due to output ripple current too big ,cheange PL25 from 0.88uH to 1.5uH.
16 48 8/20 1A PR449 should be cancelled, not necessary
17 48 8/20 1A Change PR452 to 9.09k for OCP
18 48 8/20 1A For FAE recommend. PC447 no stuff, reserved.
19 48 8/20 1A Add PC78 for meet output ripple current.
20 48 8/20 1A Change PR102 to 4.53K and PR105 to 49.9k for setting VTT=1.1V. (VTTS =REFIN/2=1V)
21 38 8/22 1A Added LED level shift for support white LED need used 5V drive.
22 22 8/23 1A add level shift circuit to protect thermal IC
23 42 8/23 1A add level shift circuit to provent ALW and LAN plan interconnect
13 31 37
24 8/24 1A Check single net and correct by JM
40 48 55
25 52 8/27 1A Due to SIL1045R-3R8PF will be EOL, change PL11,PL12 to SIL1045R-3R3.
26 37 8/27 1A change KB pin number to 32 pin
27 43 8/28 1A change LED of LAN jack control signal to LINKLED
28 43 8/28 1A Co-layout SIM card connector and WTB together
D 29 37 8/28 1A Dell had update K/B pin define to 34 pin and re-define pin definition D
30 31 8/28 1A KSO18 is output pin, so change to pin 85, and KB_DET# from pin 85 change to pin 70.
31 39 8/28 1A reverse 1~4 pin definitiom for thermal team design
32 28, 12 8/29 1A change R5c833 PCI_PIRQD# to PCI_PIRQB# for AMD platform signal control requirement
33 37 8/29 1A due to move keyboard light sensor to media button board,

add KB_BACKLITE_SET function to media button connector pin 10.
34 37 8/29 1A change keyboard pin number to 32 pin
35 48 8/29 1A For Dell recommend,change 1.5V LDO from MAX8794 to ST L6935.
36 49 8/29 1A For TI FAE recommend,connect PC76 to GND.
37 35 8/30 1A For support power USB function, change power to 5V_ALW
38 31 8/30 1A change IMVP6_PROCHOT# from pin 88 to GPI 1 for design requirement. and pin88 assign to
5V_ALW_ON
39 25,43,38 8/30 1A for EMC team requirement, reserve cap, ESD protect, common choke at CON side
40 52 8/30 1A Add PC180 for reserve MAX8778 IC.
41 52 53 8/30 1A Due to Pacino need to support USB charger function,change following item.
1.Change power plan from +5V_ALW to +5V_ALW2:pin9 ,pin7,pin19, PC116 and PR156
2.Add a load switch PQ42 for +5V_ALW to +5V_SUS
42 28 8/31 1A refer M08 platform, change to 100 ohm

C C
43 22 9/2 1A Reserve external spread spectrum circuit for ATI graphic using
44 48 9/3 1A change PR455 to 237K from 178K to setting switching operating frequency at around 300 KHz
45 52 9/3 1A For FAE recommend, change PD14 input power from "+5V_ALW2" to "+5V_ALW" and PC116
can be NA.
46 52 9/3 1A For FAE recommend, conncet pin20 to pin19 for ISL6236 (or MAX8778) can populate on
ISL6237 location.
47 49 9/3 1A Change PC155 to correct net name "+1.8V_SUS_P".
48 20 9/3 1A M86 internal thernal protect function pin is high active,

re-design protect logic circuit for it.
49 54 9/3 1A for EMI resquirement, add Reserve on jump on +VCHGR

and close to pin1 and 2 of JABT1
50 38 9/3 1A Reserve ESD protector at J4 pin1 (+3V_RUN )for Biometric (close to J4 )
51 46 9/3 1A Add PC39 for reserve debug noise issue.
52 48 9/3 1A Change PU5 pin6 through PR58 to +3.3V_SUS.
53 49 9/3 1A Change PR79 from 10K to 0ohm.
54 50 9/3 1A For reserve EMI sunnber, add PR157 and PC117.
55 48 9/3 1A For DELL recommend , reserve PC143 and PC144 for TI controller.
B 56 38 9/3 1A For DELL recommend , Add GPIO pin to mask HDD and BT LED active B
57 17, 33, 34 9/3 1A for WLAN card using CLK-REQ pin, so change CLK_PCIE_MINI1 to WLAN
and CLK_PCIE_MINI3 to WPAN.
58 26, 6 9/3 1A add third pair LVDS signal to support 24bit panel
59 31 9/4 1A delete JACK_LED_DET# pin for DC jack design, so move KSO18 to pin99.
60 46 9/5 1A Reserve a 0 ohm PR59 resister for EA test.
61 48 9/5 1A Add PC145 for ST FAE recommend.
62 37 9/6 1A Add KB_BACKLITE_EN control circuit on MB side
63 37 9/6 1A Add 3_ALW at pin 5 for Lid switch IC power pin
64 42 9/6 1A Reserved BCM5784M SUPER_IDDQ circuit.
65 30 9/8 1A add MMC card function at card reader connector
A A
QUANTA
Title
COMPUTER
X00 change list

GM3 2B

6 5 4 3 2 1
6 5 4 3 2 1
Pacino 12,13, 9/27 2A modify SST design issue:

1 17,25, 1. delete unnecessary 0 ohm resistor
of Intel 09 2. select correct frequence for DIS/UMA(R351&R342)
3. CARD_CLK_REQ# pull high
4. PLTRST_DELAY# pull down to avoid floating.
5. NC R451 to set Boot BIOS Strap for LPC interface
For second source concern, change below item.

2 52 ,50 10/2 2A 1. Change PD9 from BAS316 to 1SS355
2. Change PD5 from CH501H-40PT to SDM10K45-7-F
3. Change PQ1 from BSS138-7-F to BSS138_NL
F F
use 0805 0 ohm to instead of jump(1/8W, 1.6A per resistor )
3 8 10/3 2A
pull high the GPIO 0 & GPIO 1 to enable PCIE FULL TX OUTPUT SWING
4 19 10/3 2A and PCIE TRANSMITTER DE-EMPHASIS function to solve no display problem.
5 41 10/15 2A The camera pin assignment changed : 2 pin camera power pin and they are 3.3 V ..
6 40 10/15 2A change resister setting for STA92HD73C chip
7 46 52 10/15 2A Due to SI4810BDY-T1-E3 will be EOL, change PQ29 and PQ22 from SI4810 to SI4812.
8 19 10/16 2A Due to VDDR4 and VDDR5(option reference source voltage) use 1.8V_RUN,
FAE suggust DVPDATA use 1.8V pull high
remove external SIM card CONN that on MB side

9 33 10/17 2A
It is multi_function pin(SMBALERT#/GPIO11). Before bios programming, the PIN

10 13 10/17 2A function is SMBALERT.If it is pull high to 3.3_RUN, the ICH8 will be alert by this pin.
It cause the S3 can’t normally sleep when system cold boot first time. so change to SUS power
11 38 10/18 2A Sniffer behavior is reverse, so modify design at PT stage
12 42 10/18 2A change to 5784 design
13 40 10/22 2A change TPA6040A4 symbol design to meet SPEC definition

E E
14 19 10/22 2A FAE suggust: Ground R2B/G2B/B2B and Implement R2SET to GND even if DAC2 is unused.
15 43 10/23 2A for factory requirement---increase pad length for SMT yield rate
16 41 10/24 2A for DELL SPEC---change camera conn pin definition
17 31, 37 10/25 2A modify LED Key board Illumination schematic and remove EC pin 68
reserve 18 44 10/29 2A HWPG monitor change: change 3V/5V_ALW_PWRGD to GFX_PCIE/CORE_PWRGD
reserve 19 12,13, 10/29 2A create +3.3V_S5 and +5V_S5 power at ICH part to fix ITE chip SUS resume problem,
14,31 and move LID_SW# to pinj 68 and pin 120 for S5_ON using
20 35 10/30 2A add FSUSB31K8X to control USB signal can be passed above SUS,
and USB_SIN_SIDE_EN# can control whether USB can
supply power for external device at S5 mode
reserve 21 53 10/30 2A For EE request , add two power rail "+3.3V_S5" and "+5V_S5" for south-bridge battery mode.
22 48 10/30 2A 1.5V_RUN_PWRGD pull-high to RUN_ON for solve glitch issue.
23 38,54 10/30 2A add 1000p cap and close to connector for EMI
24 35 10/30 2A change LCD connector pin definition for LED panel:

1. change pin 8 form GND to +5V_ALW
2. change pin 16 from GND to LCD_VCC
25 31 11/1 2A change GPIO design

1. delete pin 83 SNIFFER_YELLOW#
2. move 5V_ALW_ON to pin 83
D 3. swap pin 108 WIRELESS_ON/OFF# and pin 35 SNIFFER_PWR_SW# D
26 38 11/1 2A change GPIO design

1. swap WIRELESS_ON/OFF# and SNIFFER_PWR_SW#
2. remove SNIFcircuitFER_YELLOW#
27 31 11/5 2A change GPIO design for fix thermail no function issue

1. NC ADAPT_OC and ADAPT_TRIP_SEL
2. add #V_ALW_ON function at pin 76
28 3 11/5 2A Modify H_THERMTRIP# Voltage Level shift circuit.
29 41 11/6 2A add one GND pin for Audio precision dB value
reserve 30 37 11/8 2A add circuit to control CIR power
31 49 11/12 2A Add PR181 for reserve +5V_ALW2.
32 43 11/12 2A for EMI requirement, add 7p cap close to LAN switch
33 37 11/13 2A for DELL requirement, add fuse between +5V_RUN and +KB_LED
34 31 11/13 2A use pin 14(WRST#) to monitor THERM_STP# function
35 25 11/13 2A for Silicon image FAE suggestion:

1. EMI may come from the impedance mis-match, that'll get distorted waveform .
Try to replace the common choke with (i.e 22 ohm ) resistor,
2. Try to reduce the source termination resistor (i.e 300 ohm --> 150 ohm) to get cleaner eye .
3. change AVCC33V to 3.3V_RUN
C C
36 25 11/13 2A per FAE suggestion:change C525 and C524 to 2.2u for batter Audio precision
37 50 11/13 2A Chnage PR11 to 100Kohm for set correct O.C.P.
38 50 11/13 2A For EE request, set VGA voltage to 0.95V/1.1V. Change PR116 to 69.8K and PR118 to 118K.
39 4 11/13 2A Base on acoustic team test ,add two EC-cap for noice issue. Stuff C733 and C766.
40 52 11/13 2A Base on test result, change PR114 to 294K for set OCP.
41 48 11/13 2A Change PR161 to 11K for set correct OCP.
42 48 11/13 2A For 1.05V jitter issue, chnage below item.

UMA: Change output CAP from 390U/2.5V/ESR10 to 330U/4V/ESR25
Discrete: 1. Change output CAP from 390U/2.5V/ESR10 to 330U/4V/ESR25

2. Add PC62 1500PF
43 48 11/13 2A Change 1.05V UMA PQ33 from FDS6676AS to FDMS8672S for improve efficiency.
44 49 11/13 2A Base on EA report test , stuff PR171 and PC180 for reduce hiogh side VDS ring.
45 46 11/13 2A Due to software support UL function via "IINP", no stuff UL circuit.

46 13 11/14 2A add 4.7k on PCIE_MCARD1_DET# trace to solve WLAN card detect issue
47 19 11/15 2A change GPIO pin from 3.3V_RUN to 3.3V_delay to solve leakage problem
between 3.3V_RUN and 3.3v_delay(4ms) when boot.
B B
QUANTA
Title
COMPUTER
X01 change list

GM3 2B
A A
6 5 4 3 2 1
6 5 4 3 2 1
Pacino 1 32 11/26 2B Change RTC connector because ME modifyr.

of Intel 2 31 11/26 2B Exchange 'SNIFFER_PWR_SW#' AND 'WIRELESS_ON/OFF#. per EC limition.
F F
3 31 11/26 2B Change NUM_LED# from SIO pin98 to pin 88 and used Pin 98 for BID only per EC limition.
4 54 11/26 2B Change PSID relation parts to +5V_ALW2 for power saving in S5.
5 38 11/26 2B Change Sniffer Switch power rail from RUN plane to ALW plane.
6 43 11/26 2B Added LINK1000# for BCM cann't support GLAN LED drived by LINKLED#/SPD100LED#.
7 45 11/27 2B Modify Screw hole base on ME update.
8 17 11/29 2B Link to MCH DPLL clock is wrong. Change to correct link.
9 31 11/30 2B Fine tune GPIO define for EC.
Change MMB LED power source from 5V_ALW2 plane to 5V_ALW for power saving and avoid LED
E 10 37 12/04 2B flash when AC in.
E
11 22 12/04 2B Check AMD +3.3V_DELAY power plane connection component for AMD new update REF133-7 file.
12 40 12/19 2B Change Audio AMP thermal PAD leave to NC.
13 31 12/26 2B Change SMBus pull hihg resistor form 2.2k to 10k for LED panel flash.
14 37 12/26 2B since we will use WLAN and BT LED to show function at factory side.
Change power supply of Cap and Num LED from 5V_ALW2, 3.3V_ALW to 5V_RUN and 3.3V_RUN.
15 19 12/26 2B Change HDMI detect circuit to solve external panel feed back voltage shortage
then caude ATI chip can't switch to HMDI mode problem.
D 16 37 12/26 2B Change the Media board power from 3V_ALW to 5V_ALW2 to solve D
LED flash issue when AC/Bat plug in.
Change the lid switch IC power source from 3.3V_SUS to 3.3V_ALW to avoid
17 37 12/26 2B system can enter S4 mode but wake up fail problem
18 48 1/3 2B Change PC85 to 680P for meet sequence.
19 50 1/3 2B Change PR7 to 4.99K for adjust +1.1V_GFX_PCIE rail.
20 53 1/3 2B Change PQ11 from SO8 to power package footprint.
21 48 49 1/3 2B Change PR161 ,PR172 ,PR11 ,PR114 to correct resistance for reliability request.
C C
50 52
22 35 1/4 2B remove USB charge circuit
23 26 1/7 2B pull DPST signal to high for setting 100% duty cycle
24 31 1/7 2B pin12 should reserve 1u cap for ITE8512JX using
25 19 1/7 2B modify HDMI detect circuit to fix the monitor detection problem..
26 55 1/7 2B create EMI spring

B B
27 31 1/11 2B per TXC report, we should change W1 cap to 18p
28 41 1/11 2B per IDT FAE suggestion, serial 22 ohm on DMIC_CLK can help DMIC performance
29 37 1/11 2B add 10u cap at JMB1, let 3.3V_ALE get lower drop voltage on MMB side.
30 6, 19 1/11 2B EMI demand add 33p cap on RGB signal.
A
QUANTA A
Title
COMPUTER
X02 change list

GM3 2B

6 5 4 3 2 1
6 5 4 3 2 1
Pacino 1 25 2/14 3A add level shift to separate the data and CLK of VGA IC and HDMI TV,
and also reduce stray capacitance.
of Intel
2 25 2/14 3A change diode to reduce stray capacitance per WPI suggestion
F F
3 12,28,31 2/14 3A use pin-22 monitor ICH_AZ_CODEC_RST# to delay NB_MUTE# signal for solve PO noise issue
4 50 2/20 3A For Reliability calculate , change PR11 from 150K to 178K.
5 51 2/20 3A Due to C4E hung up issue, change v_core power IC from ISL6266A to ISL6262A. Below is change list.
1. PU2: Change PN from AL006266000 to AL006262025
2. PR24: Change PN from CS28252FB15 to CS26812FB13
3. PC39: Change PN from CH11006JB18 to CH12206KB14
4. PC38: Change PN from CH12704JB07 to CH14706KB18
5. PR139: Change PN from CS11002JB32 to CS12552FB18
6. PC141: Change PN from CH22206KB16 to CH21006JB10
7. PC40,PC41: Change PN from CH1336K1B02 to CH31006KB18
E
8. PR136: Change PN from CS23833F911 to CS24533F921 E
6 48 2/20 3A For 1.05V OVP issue in Vista , no stuff PC62.
7 25 2/20 3A Due to L6935 has improved powergood issue, no stuff PR183 and stuff PR66.
add HDMI solution per Silicon image suggestion
8 48 2/15 3A 1. Change R233 to 650 ohm
2. Remove external RC between HDMI +/- signal.
add HDMI EMI solution DIS:CXCG900U000 / EXC24CG900U; UMACXCG240U000 / EXC24CG240U
9 35 2/23 3A add common chock for EMI solution

Quanta PN: DC09004A014
D 10 35 2/25 3A cange power jump to 0805 resistor D
11 27 2/25 3A add filter CAP for EMI
12 13, 37 2/25 3A by ICH-8 GPIO-17 dectect the LED keyboard connector
13 17 2/26 3A exchange 27SS and 27NSS / DREF_SSCLK# & DREF_SSCLK for follow CLK GEN spec. design.
14 13 2/27 3A ICH_RSMRST# pull down for RTC timer issue when plug in AC
C C
15 40, 41 2/27 3A MUST ADD 2.2K-OHM RESISTORS TO PREVENT AMPLIFIER CLIPPING
and ADD 220PF CAPACITORS TO ALLOW PROPER DYNAMIC
RANGE MEASUREMENTS
16 19 22/29 3A Add 10k ohm on HDMI_DET to ensure Vin on test fixture input 2.4V the voltage not drop under 2V spec. definition.
17 9 03/03 3A Based on SR_check 1.6, UMA should pull down 75 ohm on TV_DAC pins if disable TV-out function.
18 40 03/05 3A Change C518, C519 from 0.033uF to 0.01uF per Dell audio update requirement.
Change net name of "AUD_HP2_L1" between R708 & C525 to "AUD_HP2_L0_R" and "AUD_HP2_R1" between R708 & C525 to
19 40 03/20 3A "AUD_HP2_R0_R" for the original net name same as U20.15 & U20.16 will cause the HP2 no function.
B B
A A
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Title
COMPUTER
A00 change list

GM3 2B

6 5 4 3 2 1

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GM3(B) Pacino Intel Discrete & UMA Block Diagram

DDR2-SODIMM1 667 MHZ DDR II (256M)

INTERFACE FLASH Touchpad

Size Document Number Rev

Date: Monday, March 24, 2008 Sheet 1 of 62

Table of Contents Power States

15-16 DDRII SO-DIMM(200P)

Size Document Number Rev

Date: Monday, March 24, 2008 Sheet 2 of 62

H_A#[3..16] U42A H_D#[0..63] U42B H_D#[0..63]

C4 R53 CPU_TEST4 AF26

RSVD[04] 2200P_NC 50 +1.05V_VCCP +3.3V_ALW R137 1K/F_NC CPU_TEST1

Populate ITP700Flex for bringup 667 166 0 1 1

JITP1 C673 0.1U_NC

ITP_TCK TMS VTT1 10 MMST3904-7-F 10

Date: Monday, March 24, 2008 Sheet 3 of 62

+VCC_CORE +VCC_CORE U42D

Size Document Number Rev

Date: Monday, March 24, 2008 Sheet 4 of 62

H_D#17 W10 H20 H_A#21

H_SWING H_D#22 H_D#_21 H_A#_25 H_A#26

H_D#24 W6 E19 H_A#28

R732 H_D#25 W9 B17 H_A#29

H_D#28 H_D#_27 H_A#_31 H_A#32

H_D#29 H_D#_28 H_A#_32 H_A#33

H_D#42 AB1 AM7

H_SCOMP H_D#47 H_D#_46 H_HITM#

H_D#57 H_D#_56 H_DINV#_3

Size Document Number Rev

Date: Monday, March 24, 2008 Sheet 5 of 62

U45B POP FOR UMA U45C +VCC_PEG

PAD T23 CFG17 M24 AE50 PCIE_MTX_GRX_C_P14 C850 0.1U_DIS PCIE_MTX_GRX_P14

NC_1 CL_PWROK R231 0_DIS DREF_SSCLK#_L

PAD T115 BK1 PCIE_MTX_GRX_C_N1 C238 0.1U_UMA

CRESTLINE_1p0_DU DC Blocked Cap. AND POP FOR UMA

Date: Monday, March 24, 2008 Sheet 6 of 62

DDR_A_D34 SA_DQ_33 SA_MA_1 DDR_A_MA2 DDR_B_D34 SB_DQ_33 SB_MA_1 DDR_B_MA2

DDR_A_D47 SA_DQ_46 DDR_B_D47 SB_DQ_46 DDR_B_RAS#

Size Document Number Rev

Date: Monday, March 24, 2008 Sheet 7 of 62

AU32 Y19 R63 0_0805_UMA AA35

BF33 AF19 U36

VCC_SM_20 VCC_AXG_NCTF_45 C297 C308 C314 C330 C291 C857 VCC_NCTF_46

VCC AXM NCTF

AC23 VCC_AXG_15 VCC_AXG_NCTF_80 V26

AH21 AT6 VCCSM_LF7 Layout Note:

0_0805_UMA AH24 VCC_AXG_30 and DDR2 taps. Layout Note:

Size Document Number Rev

Date: Monday, March 24, 2008 Sheet 8 of 62

1206 7343 VCC_AXD_2

0.1U 7343 AU19 A21

C858 10V 2.5V VCCA_SM_3 VCC_AXF_3

1206 10V VCCA_SM_5 VCC_DMI

AT19 BK23 0.1U

805 C341 C293 H42 2V 6.3 91nH/1.5A

603 CRESTLINE_1p0_DU 220U/4V 10U/6.3V

603 +1.8V_SUS 2 1 +VCCD_LVDS 1 R140 2 +VTTLF2

1000P_UMA C427 C423 C366 C394

layout shound close to BB29 & BC29

BLM18PG181SN1D_UMA R223 0_0402_UMA

VCC_TVDACA:C_R should C241 C256 C258 603 10V 16

10U_UMA 0.1U_UMA 22nF/3P_NC 6.3 603