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  • 000 1 TC74HC139P

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    Ahmar Hayat Khan
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    This document provides information about a C-MOS dual 2-to-4 decoder/demultiplexer integrated circuit. It includes a top view of the chip layout showing the pin locations, truth table describing the relationship between the inputs and outputs, and notes explaining the high and low logic levels.

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    000-1-TC74HC139P

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    This document provides information about a C-MOS dual 2-to-4 decoder/demultiplexer integrated circuit. It includes a top view of the chip layout showing the pin locations, truth table describing the relationship between the inputs and outputs, and notes explaining the high and low logic levels.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Scarica in formato PDF, TXT o leggi online su Scribd
    Segnala contenuti inappropriati
    15 visualizzazioni1 pagina

    000 1 TC74HC139P

    Caricato da

    Ahmar Hayat Khan
    This document provides information about a C-MOS dual 2-to-4 decoder/demultiplexer integrated circuit. It includes a top view of the chip layout showing the pin locations, truth table describing the relationship between the inputs and outputs, and notes explaining the high and low logic levels.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Scarica in formato PDF, TXT o leggi online su Scribd
    Segnala contenuti inappropriati
    di 1

    TC74HC139P

    IL08

    C-MOS DUAL 2-TO-4 DECODER/DEMULTIPLEXER


    —TOP VIEW—

    4 12
    Y0 Y0
    1EN IN 1 VDD 16 2 5 14 11
    A Y1 A Y1
    3 6 13 10
    B Y2 B Y2
    1A IN 2 15 2EN IN 7 9
    Y3 Y3
    EN EN
    1B IN 3 14 2A IN 1 15

    1Y0 OUT 4 13 2B IN
    INPUTS OUTPUTS
    1Y1 OUT 5 12 2Y0 OUT EN B A Y3 Y2 Y1 Y0
    0 0 0 1 1 1 0
    1Y2 OUT 6 11 2Y1 OUT 0 0 1 1 1 0 1
    0 1 0 1 0 1 1
    1Y3 OUT 7 10 2Y2 OUT 0 1 1 0 1 1 1
    1 x x 1 1 1 1
    8 GND 9 2Y3 OUT
    0 : LOW LEVEL
    1 : HIGH LEVEL
    x : DON’T CARE

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