Code :EE05539 RA

II B.Tech II Semester (R05) Supplementary Examinations, December 2010

SWITCHING THEORY & LOGIC DESIGN
(Instrumentation & Control Engineering)
For students of RR regulation readmitted to II B.Tech II Semester (R05)
Time: 3 hours Max Marks: 80
Answer any FIVE questions
All questions carry equal marks
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1. (a) Express the Decimal Digits 0 - 9 in 8421, 2421, 84-2-1 and Excess-3.
(b) Convert the Hexadecimal number 1001 to Decimal and then to Binary.
2. (a) Draw the NAND logic diagram that implements the complement of the following function.
F(A,B,C,D) = Σ (0,1,2,3,4,8,9,12)
(b) Obtain the complement of the following Boolean expressions.
i. AB+A(B+C)+B’(B+D)
ii. A+B+A’B’C
(c) Obtain the dual of the following Boolean expressions.
i. A’B+A’BC’+A’BCD+A’BC’D’E
ii. ABEF+ABE’F’+A’B’EF
3. (a) Differentiate prime implicant and essential prime implicant?
(b) Minimize the following
P function using tabular minimization.
F (A, B, C, D) = m(0, 1, 2, 8, 9, 15, 17, 21, 24, 25, 27, 31)
4. (a) Implement the following Boolean function using a 8:1 multiplexer considering ‘C’ as the
input and A,B,C as selection lines. f (ABCD) = AB̄ + BD + B̄C D̄
(b) Draw the Gate level diagram of a Decimal to BCD encoder.
5. Write a brief note on:
(a) Architecture of PLDs
(b) Capabilation and the limitations of threshold gates.
6. (a) Show how mod-12 JK counter could be Built using mod-3 & mod-4 counters.
(b) Explain the steps in synchronous sequential circuit design.
7. A clocked sequential circuit is provided with a single input x and single output Z. Whenever
the input produce a string of pulses 1 1 1 or 0 0 0 and at the end of the sequence it produce
an output Z = 1 and overlapping is also allowed.
(a) Obtain State - Diagram.
(b) Also obtain state - Table.
(c) Find equivalence classes using partition method & design the circuit using D - flip-flops.
8. (a) Draw the ASM chart for the following state transistion, start from the initial state T1 ,
then if xy=00 go to T2 , if xy=01 go to T3 , if xy=10 go to T1 , other wise go to T3 .
(b) Show the exit paths in an ASM block for all binary combinations of control variables x, y
and z, starting from an initial state.

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