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Digital logic II project

Objective:

• It is required to form groups from 1- 5 students in each group .

• Names of each group will be given to teaching assistants in the lab and
also the chosen project .

• It is required to choose one project, and design the required.

Submission rules:

• The submission will be in lab time in the week that starts 18/12/2010

• No help from teaching assistants is given.

• All group members must understand the whole project.

• Any copiers , the two groups will get a zero mark


1-traffic light (8 marks):

• It is required to design traffic light controller through a four way


intersection as in figure 1, the controller has 3 inputs from the
three sensors that monitor the traffic, and according to traffic it
goes to a certain state from four allowed states.

Fig (1)

• X has zero value which mean no traffic and a one value that
means we have traffic.

• S1-S3 are outputs to traffic light, they are either logic1 which is
green or logic 0 red.

• Each road is a two way road except for road 4.

• Note that you have 3 inputs (x1,x2 and x3) and 2 flip flops.

Required:

• Analysis through assuming states, constructing state table , state


graph and design using flip flops ,……

OR
• Making hardware design of traffic lights on a white board or PCB.

OR
• Making a VHDL code for the controller.
2-traffic light 2 (8 marks):

• It is required to design traffic light controller, where two sets of


traffic lights are used in a junction.

• The signals to the traffic sets are logic 1 or 0 to each color; don't
forget the use of the yellow light after green then red.

Required:

• Analysis through assuming states, constructing state table, state


graph and design using flip flops ,……

OR
• Making hardware design of traffic lights on a white board or PCB.

OR
• Making a VHDL code for the controller.
3-count up timer (8 marks +2 bonus):

• It is required to design a count up timer Hr Min sec , having a reset


button that returns to 00 00 00 state., and having a stop button to
makes the counter stop

• The counter should automatically stop at state 01 30 00 and then


reset.

• It is required a state table Or a state graph

• It is also required to design the circuit as a hardware on white board or


a PCB , you can't use a micro-controller in the design.

4-digital clock(8 marks ):

• It is required to design a digital clock on a white board or a PCB


using counters and seven segments.

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