Sei sulla pagina 1di 1

Code No: R5210203 R5

II B.Tech I Semester(R05) Supplementary Examinations, November 2010


PULSE AND DIGITAL CIRCUITS
(Common to Electrical & Electronic Engineering, Electronics & Communication Engineering
and Electronics & Instrumentation Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
?????

1. (a) Prove that for any periodic input wave form the average level of the steady state output signal
form the RC high pass circuits is always Zero.
(b) Prove the above statement for different periodic input waveforms. [8+8]
2. (a) Draw the diode comparator circuit and explain the operation of it when ramp input signal is
applied.
(b) Explain the operation of two level slicer. [10+6]
3. Explain the following
(a) How a transistor can be used as a switch. Under what conditions a transistor is said to be “OFF”
& “ON” respectively?
(b) The phenomenon of “latching” in a transistor switch.
(c) Switching times of transistor. [8+4+4]
4. Write short notes on:
(a) Gate width of mono-stable multi.
(b) Astable multivibrator as a voltage to frequency converter with circuit and waveform. [8+8]
5. (a) Draw the circuit diagram and waveforms of a transistor bootstrap time base generator and explain
principle of operation
(b) Why short recovery time is required? Draw and explain bootstrap sweep circuit with this time.
[8+8]
6. (a) Explain the factors which influence the stability of a relaxation divider with the help of a neat
waveforms.
(b) A UJT sweep operates with Vv = 3V, Vp=16V and η=0.5. A sinusoidal synchronizing voltage
of 2V peak is applied between bases and the natural frequency of the sweep is 1kHz, over what
range of sync signal frequency will the sweep remain in 1:1 synchronism with the sync signal?
[8+8]
7. (a) With the help of a neat diagram, explain the working of two-diode sampling gate.
(b) Derive expressions for gain and minimum control voltages of a bi-directional two- diode sampling
gate. [8+8]
8. (a) With the help of circuit diagram explain the purpose of clamping diode in a positive diode AND
gate.
(b) Explain the effect of and diode capacitance on the output pulse of diode AND gate. [8+8]

?????

Potrebbero piacerti anche