Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
AIM: To design and set up an first order Butter worth low pass filter for f c
= 1 KHz and to plot the frequency response.
Low Pass Filter : A low-pass filter is a circuit that has a constant output
voltage from dc to a cutoff frequency f c . As the frequency increases
above f c, the output voltage is attenuated (decreases).
Fig. (a) shows a first order low-pass Butterworth filter that uses an
RC network for filtering. And the op-amp is used in the non inverting
configuration, hence it does not lond down the RC network. Resistors R1
and f F, determine the gain of the filter.
Fig. (a)
Tabular Column :
100 Khz
Frequency Response :
PROCEDURE :
1. Before wiring the circuit, check all the components using multi meter and
IC IC tester.
2. Design the filter for a gain and make the connections as shown in circuit
diagram.
3. Set the signal generator (input voltage) amplitude say IV peak to peak
and observe the input (Vo) and output (Vo ) signals of the circuit
simultaneously on CRO screen.
4. By varying the frequency of the input from Hz range to higher kHz range
and note the frequency of signal and corresponding output voltage across
pin number 6 of the op-amp with respect to ground. [See that input
voltage V in remains constant throughout the frequency range].
7. Plot the graph with frequency along X-axis and gain of dB along Y-axis.
RESULT :
THEORY : High pass filters attenuate the output voltage for all
frequencies below the cut-off frequency fc , Above fc , the magnitude of
the output voltage is constant. The range of frequencies that are
transmitted is known as the pass band. The range of frequencies that are
attenuated is known as the stop band.
Fig.(a) shows a first order high pass Butter worth filter with a low
cut off frequency of fc. This is the frequency at which the magnitude of
the gain is a 0.707 times its pass band value. Obviously, all frequencies
higher than fc are pass band frequencies, with the highest frequency
determined by the closed-loop bandwidth of the op-amp.
CircuitDiagram
Design : : Let fc=1Khz
Tabular Column :
100 Mhz
PROCEDURE :
1. Before wiring the circuit, check all the components using multi
meter and IC IC tester.
2. Design the filter for a gain and make the connections as shown in
circuit diagram.
7. Plot the graph with frequency along X-axis and gain dB along y-axis.
RESULT :
AIM : To design and set up an 2nd order butter worth Band Reject filter
and to plot the frequency response.
The frequency response of the active notch filter is shown in Fig. (c).
Circuit Diagram :
Design : fc=1/(2ЛRC)
Tabular Column :
100 Khz
PROCEDURE
1. Before wiring the circuit, check all the components using multi
meter and IC tester.
6. Plot the graph with frequency along X-axis and Gain in dB along Y-axis.
RESULT :
Experiment No.3 : ACTIVE BAND PASS FILTER
AIM : To design and set up an 2nd order Butter worth Band pass filter and
too plot the frequency response.
[1] It has two feedback paths, hence the name multiple feedback
filter.
[2] The op-amp is used in the inverting mode.
Circuit Diagram :
R2=Q/(2Пfc[2Q2-Af])
R3=Q/ЛfcC where Af=10, Q= fc /(fh-fl) = 3
Tabular Column :
100 Khz
PROCEDURE :
6. Plot the graph with frequency along X-axis and Gain in dB along
Y-axis.
RESULT :
Experiment No.3 : ENVELOPE DETECTOR
Circuit Diagram :
Design : 1/fc << RLC << 1/W
W=fm So RLC << 1/fm Choose proper value of C find RL for given carrier
and message signal frequencies
PROCEDURE :
1. Before wiring the circuit, check all the components using multi
meter.
4. Vary the modulation index knob (that is M1) and note down v
max’ , v min simultaneously and also note down the o/p voltage
vO in steps.
RESULT :
Experiment No.4 : COLLECTOR MODULATION
THEORY : Fig.(a) shows the basic circuit for a BJT modulator. It is high
power class C amplifier with high level modulators. The modulator is a
linear power amplifier that takes the low level modulating signal and
amplifies it to a high power level. The modulating output signal is coupled
through modulating transformer T1 to the class C amplifier. The
secondary winding of the modulation transformer is connected in series
with the collector supply voltage Vcc of the class C amplifier. This means
that modulating signal is applied in series with the collector power supply
voltage of the class C amplifier applying collector modulation.
When the modulating signal occurs, the a.c. voltage across the
secondary of the modulating transformer will be added to and subtracted
from the collector supply voltage. This varying supply voltage is then
applied to the class C amplifier, resulting in variations in the amplitude of
the carrier sine wave in accordance with the modulated signal. Due to
this amplitude of the current pulses also vary in accordance with the
modulating signal. The tuned circuit then converts the current pulses into
an amplitude modulated wave as shown in Fig. (b).
Circuit Diagram :
Tabular Column :
Vm signal Modulation
Amplitude Vmax Vmin index
vm µ
PROCEDURE :
Result :
Experiment No.5 : BALANCED MODULATION IC 1496
GENERAL DESCRIPTION :
Features :
The equivalent internal circuitry and 14 – pin Dip pin out for the
LM1496 are shown in Fig.(b) and (c).
PROCEDURE :
1. Before wiring the circuit check all the components using multi
meter.
2. Make the connections as shown in circuit diagram.
3. Apply positive (+ 12 V) and negative (-12 V) voltage to the IC as
Vcc.
4. Set the carrier wave amplitude and frequencies and also the
modulating signal amplitude and frequencies so as to get the
DSBSC wave.
5. Check for the positive and negative o/p voltage at pin no.6 and
12 respectively.
6. Observe the phase reversals at the cross points as shown in the
Fig.(d).
Circuit Diagram :
Result :
Here the carrier signal is applied to the center taps of the input
and output transformer and modulating signal is applied to the input
transformer T1. The o/p appears across the secondary of the
transformer. The diodes connected in the bridge acts like switches,
and their switching is controlled by the carrier signal as it is usually
higher in frequency and amplitude than the modulating signal.
Circuit Diagram :
PROCEDURE :
1. Before wiring the circuit, check all the components using multi
meter.
2. Make the connections as shown in circuit diagram.
Result :
Features :
CIRCUIT DIAGRAM :
PROCEDURE :
1. Before wiring the circuit checl all the components using multi
meter.
THEORY : The noise triangle showed that noise has a greater effect on
the higher modulating frequencies than on the lower ones. Thus, if the
higher frequencies were artificially boosted at the transmitter and
correspondingly cut at the receiver, an improvement in noise immunity
could be excepted, thereby increasing the signal to noise ratio. This
boosting of the higher modulating frequencies, in accordance with a pre-
arranged curve, is termed pre-emphasis and the compensation at the
receiver is called de-emphasis.
Take two modulating signals having the same initial amplitude, with
one of them pre-emphasized to twice this amplitude, whereas the other is
unaffected (being at a much lower frequency).
CIRCUIT DIAGRAM :
PRE-EMPHASIS
DE-EMPHASIS
PROCEDURE :
1. Before wiring the circuit, check all the components using multi
meter.
6. Plot the graph with frequency along X-axis and gain dB along Y-
axis.
The sampling theorem states that, if the sampling rate in any pulse
modulation system exceeds twice the maximum signal frequency, the
original signal can be reconstructed in the receiver with minimal
distortion.CIRCUIT DIAGRAM :
PROCEDURE :
1. Before wiring the circuit check all the components using multi
meter.
CIRCUIT DIAGRAM:
In this system the leading edge x, is held in fixed position while the
trailing edge, varies towards or a way from X in accordance to
instantaneous value of sampled signal. The length XY of the pulse is
hence width modulated.
PROCEDURE :
1. Before wiring the circuit check all the components using multi
meter.
2. Make the connections as shown in circuit diagram.
3. Set the carrier amplitude to around 4 V (P-P)
4. Set the signal amplitude to around 2 V (P-P) and frequency < 1
kHz.
5. Observe the output signal at pin no.6, of second op-amp and also
observe the variation in pulse width by varying the modulating
signal amplitude.
6. Draw PWM waveform.
CIRCUIT DIAGRAM:
Experiment No. 12 : TRANSISTOR MIXER
PROCEDURE :
1. Before wiring the circuit check all the components using multi
meter.
2. Connect the IFT in between signal source and CRO and measure the
tuned frequency that is f IFT = 455 KhZ.
3. Rig up the circuit as shown in Fig. (a). Using the same 1FT.
4. Switch on the signal source V1 and V2 (use always MHz frequency
range). Adjust V2 amplitude to be 10 times larger than V1.
For ex : V1 = 5 V (P-P) and V2 = 0.5 V (P-P)
5. Vary the frequency of RF source V1 and local oscillator source V2
such that we can see undistorted sine wave on CRO.
6. Note down V1 and V2 the difference should be equal to IFT frequency
that is 455 kHz.
7. Tabulate the readings in the tabular column.
8. If f2 – f1 = fIFT up conversion and if f1 – f2 = fIFT down conversion.
9. Plot the waveform.
CIRCUIT DIAGRAM:
AIM :
It consists of :
Phase detector
Error amplifier
The lock range and capture range for IC 565 PLL are given by
the following equations : …..
Where C2 is in Farads.
CIRCUIT DIAGRAM: