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布林代數和邏輯閘

Boolean Algebra
and Logic Gates
數位邏輯 梁奕智
布林代數 Boolean algebra
 All variables are switching variable.
 The value can only take in 1 or 0.
 Includes basic operations: NOT, AND, OR.
 Boolean logic 布林邏輯
 Assign TRUE for 1 and FALSE for 0.
 Switching device 交換電路元件
 Assign HIGH for 1 and LOW for 0.
交換電路 switching circuit

X1 Z1
X2 Z2
Input X3 Switching circuit Z3 Output
Xm Zn

A circuit of logic gates. 由邏輯閘組成的電



邏輯閘 Logic gates

NOT gate

AND gate

OR gate

A switching device representing a specific logic operation.


邏輯閘: 代表特定邏輯操作的交換電路元件.
NOT gate (反相器 inverter)

NOT operation, Complement operation, Inversion

0’ = 1 1’ = 0

Logic diagram
結構圖
X =1 → X '= 0
X =0 → X '=1
NOT gate 電路

A CMOS inverter (Appendix A)


時序圖 timing diagram

Driving

Gate delay may present in logic gates.


AND gate
AND operation, Logic (Boolean) multiplication
0.0 = 0 0.1 = 0 1.0 = 0 1 .1 = 1

Logic diagram

C = 1 iff
both A and B are 1
OR gate
(inclusive) OR operation, Logic (Boolean) addition
0 + 0=0 0 + 1=1 1 + 0=1 1 + 1=1

Logic diagram

C = 1 iff
A or B (or both) are 1
布林表示式 Boolean expression
 Boolean expression:
 對布林變數的一連串邏輯操作.

 順序 NOT → AND → OR

AB'+C
布林表示式 Boolean expression

[ A(C + D)]'+ BE
真值表 truth table
 對應布林表示式裡出現的所有變數的值所
給出的布林表示式的值.
相等的表示式
如果對所有表示式內的變數的可能值, 表示式1
的值均等於表示式2的值, 則兩表示式相同.
AB'+C = ( A + C )( B'+C )
相等的邏輯閘
AB'+C

( A + C )( B'+C )
布林代數 吸收律 absorption laws
 OR 吸收 X +0= X
X +1 = 1
1 + X 1 + X 2 + ... = 1
 AND 吸收

X •1 = X
X •0 = 0
0 • X 1 • X 2 • ... = 0
布林代數 同體律 idempotent laws

X +X=X

X ‧X = X
布林代數 摺疊律 involution law

(X’)’=X
布林代數 互補律 laws of
complementarity

X+X’=1

X‧X’=0
布林代數 交換律 commutative laws

X +Y=Y +X

X ‧Y = Y ‧X
布林代數 結合律 associative laws
(X + Y) + Z = X + (Y + Z)

X+Y+Z

(X Y) Z = X (Y Z)

XYZ
布林代數 結合律 associative laws
布林代數 分配律 distributive laws

X (Y+Z) = XY + XZ
布林代數 吸收律 absorption laws (2)

X +XY =X
X +XY =X‧1+XY=X(1+Y)=X

X ‧(X+Y) =X

X ‧(X+Y) =XX+XY=X+XY=X
布林代數 分配律 distributive laws (2)

X+YZ=(X+Y)(X+Z)

(X+Y)(X+Z)
=XX+YX+XZ+YZ
=X+XY+XZ+YZ
=X+YZ
布林代數 分配律 distributive laws (2)

X+WYZ=(X+W)(X+Y)(X+Z)
(X+W)(X+YZ)=(X+W)(X+Y)(X+Z)
Simplification Theorems
XY+XY’=X
XY+XY’=X(Y+Y’)=X‧1=X

(X+Y)(X+Y’)=X
=XX+XY+XY’+YY’=X+XY+XY’+0
=X
Simplification Theorems

(X+Y’)Y=XY =XY+YY’=XY

XY’+Y=X+Y =XY’+XY+Y
=X(Y’+Y)+Y=X+Y
Simplify expressions

F=A(A’+B) F=AA’+AB=AB

Z=A’BC+A’ Z=A’(BC+1)=A’
Simplify expressions

Z=[(A+B’C+D+EF)(A+B’C+(D+EF)’]
X Y X Y’
=[(X+Y)(X+Y’)]=X+XY+XY’+YY’=X
=A+B’C
Simplify expressions
Z=(AB+C)(B’D+C’E’)+(AB+C)’
Y’ X Y
=Y’X+Y=Y’X+YX+Y=X(Y+Y’)+Y
=X+Y
=(B’D+C’E’)+(AB+C)’
乘開 multiplying out
Z=(A+BC)(A+D+E)
=A+A(D+E)+A(BC)+BC(D+E)
=A+BCD+BCE

積項和 sum-of-products
所有的乘積項均為單一變數的乘積
分解 factoring
Z=A+B’CD
=(A+B’)(A+CD)
=(A+B’)(A+C)(A+D)
Z=AB’+C’D
=(AB’+C’)(AB’+D)
=(A+C’)(B’+C’)(A+D)(B’+D)
和項積 product-of-sums
所有的和項均為單一變數的和積
二階電路 two-level circuit
sum-of-products
Z=AB’+CD’E+AC’E’

product-of-sums

Z=(A+B’)(C+D’+E)(A+C’+E’)
DeMorgan’s law

(X+Y)’=X’‧Y’

(XY)’=X’+Y’

NOT 可以分配, 但是AND要換成OR,


OR要換成AND
DeMorgan’s law

[(A’+B)C’]’
=(A’+B)’+(C’)’ =(A’)’B’+C
=AB’+C
DeMorgan’s law

[(AB’+C)D’+E]’
=[(AB’+C)D’]’ E’
=[(AB’+C)’+D]E’
=[(AB’)’C’+D]E’
=[(A’+B)C’+D]E’
DeMorgan’s law
[(AB’+C)D’+E]’

[(A’+B)C’+D]E’
DeMorgan’s law
[(AB’+C)D’+E]’
=[(A’+B)C’+D]E’
=[A’C’+BC’+D]E’
=A’C’E’+BC’E’+DE’

sum-of-products
DeMorgan’s law
[(AB’+C)D’+E]’
=[(A’+B)C’+D]E’
=[(A’+B+D)(C’+D)]E’
=(A’+B+D)(C’+D)E’

product-of-sums

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