ABSTRACT

With the explosion of portable electronic devices, power

efficient processors have become increasingly important. In this paper we
present a set of circuit techniques to implement a 32-bit low-power ARM
processor, found commonly in embedded systems, using a six metal layer
0.18� m TSMC process. Our methodology is based on Clustered Voltage
Scaling (CVS) and dual – Vth techniques aiming to reduce both dynamic
power and static power simultaneously.