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Register name
Initial value
$REGZERO, $REGONE
0x000000
PC
0x08
IR
0x00
programIdx
0x00
CPU has internal 32 words instruction memory, where first 8 words are reserved for
global variables. It is a 3 stage CPU with stages:
1. FETCH
2. DECODE
3. EXECUTE
Execution time depends on the instruction being executed and varies between 3 and 7
cycles.
Instruction set is given in the following table:
Instruction
ALU group
Functionality
Perform an ALU operation on operands in
registers $REGZERO and $REGONE and
stores result in $REGZERO register
JUMP
Branch to a given target address
JEQ
Check if zero flag is set and branch to a
given target address
LOAD
Load the data from given memory location
to the register $REGZERO.
UPDATE_LCD Store source operands and the result to the
memory mapped LCD controller registers.
Execution time
3 CLK
3 CLK
3 CLK
3 CLK
7 CLK
LCD controller is mapped as first 4 words of external memory module. First three locations
are for 2 source operands and the result, the fourth is for triggering the LCD module.
Instruction
descriptions
Instruction have the following structure:
31
26
000000
000001
000010
000011
000100
000101
000110
000111
001000
001001
001010
001011
001100
001101
31
X
X
X
X
X
X
X
X
X
X
X
X
X
X
26
0
target address1
target address1
10000
10001
31
26
10010
31
AND
OR
XOR
NOT
ADD
SUB
MUL
DIV(QUOT)
DIV(REM)
SLL
SRL
SRA
ROL
ROR
25
REG2
0
load address1
26
10100
JUMP
JEQ
LOAD
0
UPDATE_LCD