/**********************************************************************/

/*
Header for Pin Re-Mapping peripheral library functions
*/
/*********************************************************************/
#include "peripheralversion.h"
#ifndef __PPS_H
#define __PPS_H
/*---------------------------------------------------------------------------------------------------*/
/* Remappable Peripheral Inputs:
*/
/*---------------------------------------------------------------------------------------------------*/
#if defined(_PPI_PPS_V2) || defined (_PPI_PPS_V3)
#define IN_PIN_PPS_VSS
0
/* Assign VSS as Input Pin */
#define IN_PIN_PPS_C1OUT
1
/* Assign C1OUT as Input Pin */
#define IN_PIN_PPS_C2OUT
2
/* Assign C2OUT as Input Pin */
#define IN_PIN_PPS_C3OUT
3
/* Assign C3OUT as Input Pin */
#define IN_PIN_PPS_C4OUT
4
/* Assign C4OUT as Input Pin */
#define IN_PIN_PPS_PTGO30
6
/* Assign PTGO30 as Input Pin */
#define IN_PIN_PPS_PTGO31
7
/* Assign PTGO31 as Input Pin */
#define IN_PIN_PPS_FINDX1
8
/* Assign FINDX1 as Input Pin */
#define IN_PIN_PPS_FHOME1
9
/* Assign FHOME1 as Input Pin */
#define IN_PIN_PPS_FINDX2
10
/* Assign FINDX2 as Input Pin */
#define IN_PIN_PPS_FHOME2
11
/* Assign FHOME2 as Input Pin */
#define IN_PIN_PPS_C5OUT
12
/* Assig
n C5OUT as Input Pin */
#else
#define IN_PIN_PPS_RP0
/* Assign RP0 as Input
#define IN_PIN_PPS_RP1
/* Assign RP1 as Input
#define IN_PIN_PPS_RP2
/* Assign RP2 as Input
#define IN_PIN_PPS_RP3
/* Assign RP3 as Input
#define IN_PIN_PPS_RP4
/* Assign RP4 as Input
#define IN_PIN_PPS_RP5
/* Assign RP5 as Input
#define IN_PIN_PPS_RP6
/* Assign RP6 as Input
#define IN_PIN_PPS_RP7
/* Assign RP7 as Input
#define IN_PIN_PPS_RP8

0
Pin */
1
Pin */
2
Pin */
3
Pin */
4
Pin */
5
Pin */
6
Pin */
7
Pin */
8

/* Assign RP8 as Input Pin */

#define IN_PIN_PPS_RP9
/* Assign RP9 as Input Pin */
#define IN_PIN_PPS_RP10
/* Assign RP10 as Input Pin */
#define IN_PIN_PPS_RP11
/* Assign RP11 as Input Pin */
#define IN_PIN_PPS_RP12
/* Assign RP12 as Input Pin */
#define IN_PIN_PPS_RP13
/* Assign RP13 as Input Pin */
#define IN_PIN_PPS_RP14
/* Assign RP14 as Input Pin */
#define IN_PIN_PPS_RP15
/* Assign RP15 as Input Pin */
#endif
#define IN_PIN_PPS_RP16
/* Assign RP16 as Input
#define IN_PIN_PPS_RP17
/* Assign RP17 as Input
#define IN_PIN_PPS_RP18
/* Assign RP18 as Input
#define IN_PIN_PPS_RP19
/* Assign RP19 as Input
#define IN_PIN_PPS_RP20
/* Assign RP20 as Input
#define IN_PIN_PPS_RP21
/* Assign RP21 as Input
#define IN_PIN_PPS_RP22
/* Assign RP22 as Input
#define IN_PIN_PPS_RP23
/* Assign RP23 as Input

9
10
11
12
13
14
15

16
Pin */
17
Pin */
18
Pin */
19
Pin */
20
Pin */
21
Pin */
22
Pin */
23
Pin */

#if defined (_PPI_PPS_V2)

#define IN_PIN_PPS_RPI24
/* Assign RPI24 as Input Pin */
#define IN_PIN_PPS_RPI25
/* Assign RPI25 as Input Pin */

24
25

#define IN_PIN_PPS_RPI27
/* Assign RPI27 as Input Pin */
#define IN_PIN_PPS_RPI28
/* Assign RPI28 as Input Pin */

27

#define IN_PIN_PPS_RP30
/* Assign RP30 as Input Pin */
#define IN_PIN_PPS_RP31
/* Assign RP31 as Input Pin */
#define IN_PIN_PPS_RPI32
/* Assign RPI32 as Input Pin */
#define IN_PIN_PPS_RPI33
/* Assign RPI33 as Input Pin */
#define IN_PIN_PPS_RPI34
/* Assign RPI34 as Input Pin */
#define IN_PIN_PPS_RPI35
/* Assign RP35 as Input Pin */
#define IN_PIN_PPS_RPI36
/* Assign RP36 as Input Pin */
#define IN_PIN_PPS_RPI37

30

28

31
32
33
34
35
36
37

/* Assign RP37 as Input Pin */

#define IN_PIN_PPS_RPI38
/* Assign RP38 as Input Pin */
#define IN_PIN_PPS_RPI39
/* Assign RP39 as Input Pin */
#define IN_PIN_PPS_RPI40
/* Assign RP40 as Input Pin */
#define IN_PIN_PPS_RPI41
/* Assign RP41 as Input Pin */
#define IN_PIN_PPS_RPI42
/* Assign RP42 as Input Pin */
#define IN_PIN_PPS_RPI43
/* Assign RP43 as Input Pin */
#define IN_PIN_PPS_RPI44
/* Assign RPI44 as Input Pin */
#define IN_PIN_PPS_RPI45
/* Assign RPI45 as Input Pin */
#define IN_PIN_PPS_RPI46
/* Assign RPI46 as Input Pin */
#define IN_PIN_PPS_RPI47
/* Assign RPI47 as Input Pin */
#define IN_PIN_PPS_RPI49
/* Assign RP49 as Input Pin */
#define IN_PIN_PPS_RPI50
/* Assign RP50 as Input Pin */
#define IN_PIN_PPS_RPI51
/* Assign RPI51 as Input Pin */
#define IN_PIN_PPS_RPI52
/* Assign RPI52 as Input Pin */
#define IN_PIN_PPS_RPI53
/* Assign RPI53 as Input Pin */
#define IN_PIN_PPS_RP54
/* Assign RP54 as Input Pin */
#define IN_PIN_PPS_RP55
/* Assign RP55 as Input Pin */
#define IN_PIN_PPS_RP56
/* Assign RP56 as Input Pin */
#define IN_PIN_PPS_RP57
/* Assign RP57 as Input Pin */
#define IN_PIN_PPS_RPI58
/* Assign RPI58 as Input Pin */
#define IN_PIN_PPS_RPI60
/* Assign RP60 as Input Pin */
#define IN_PIN_PPS_RPI61
/* Assign RP61 as Input Pin */
#define IN_PIN_PPS_RPI62
/* Assign RP62 as Input Pin */
#define IN_PIN_PPS_RP63
/* Assign RP63 as Input Pin */
#define IN_PIN_PPS_RP64
/* Assign RP64 as Input Pin */
#define IN_PIN_PPS_RP65
/* Assign RP65 as Input Pin */
#define IN_PIN_PPS_RP66
/* Assign RP66 as Input Pin */
#define IN_PIN_PPS_RP67
/* Assign RP67 as Input Pin */
#define IN_PIN_PPS_RP68
/* Assign RP68 as Input Pin */
#define IN_PIN_PPS_RP69

38
39
40
41
42
43
44
45
46
47
49
50
51
52
53
54
55
56
57
58
60
61
62
63
64
65
66
67
68
69

/* Assign RP69 as Input Pin */

#define IN_PIN_PPS_RP70
/* Assign RP70 as Input Pin */
#define IN_PIN_PPS_RP71
/* Assign RP71 as Input Pin */
#define IN_PIN_PPS_RPI72
/* Assign RP72 as Input Pin */
#define IN_PIN_PPS_RPI73
/* Assign RP73 as Input Pin */
#define IN_PIN_PPS_RPI74
/* Assign RP74 as Input Pin */
#define IN_PIN_PPS_RPI75
/* Assign RP75 as Input Pin */
#define IN_PIN_PPS_RPI76
/* Assign RP76 as Input Pin */
#define IN_PIN_PPS_RPI77
/* Assign RP77 as Input Pin */
#define IN_PIN_PPS_RPI78
/* Assign RP78 as Input Pin */
#define IN_PIN_PPS_RP79
/* Assign RP79 as Input Pin */
#define IN_PIN_PPS_RP80
/* Assign RP80 as Input Pin */
#define IN_PIN_PPS_RPI81
/* Assign RP81 as Input Pin */
#define IN_PIN_PPS_RP82
/* Assign RP82 as Input Pin */
#define IN_PIN_PPS_RPI83
/* Assign RP83 as Input Pin */
#define IN_PIN_PPS_RP84
/* Assign RP84 as Input Pin */
#define IN_PIN_PPS_RP85
/* Assign RP85 as Input Pin */
#define IN_PIN_PPS_RPI86
/* Assign RP86 as Input Pin */
#define IN_PIN_PPS_RP87
/* Assign RP87 as Input Pin */
#define IN_PIN_PPS_RPI88
/* Assign RP88 as Input Pin */
#define IN_PIN_PPS_RPI89
/* Assign RP89 as Input Pin */
#define IN_PIN_PPS_RPI94
/* Assign RPI94 as Input Pin */
#define IN_PIN_PPS_RPI95
/* Assign RPI95 as Input Pin */
#define IN_PIN_PPS_RPI96
/* Assign RPI96 as Input Pin */
#define IN_PIN_PPS_RP97
/* Assign RP97 as Input Pin */
#define IN_PIN_PPS_RP98
/* Assign RP98 as Input Pin */
#define IN_PIN_PPS_RP99
/* Assign RP99 as Input Pin */
#define IN_PIN_PPS_RP100
/* Assign RP100 as Input Pin */
#define IN_PIN_PPS_RP101
/* Assign RP101 as Input Pin */
#define IN_PIN_PPS_RP104
/* Assign RP104 as Input Pin */
#define IN_PIN_PPS_RP108

70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
94
95
96
97
98
99
100
101
104
108

/* Assign RP108 as Input Pin */

#define IN_PIN_PPS_RP109
/* Assign RP109 as Input Pin */
#define IN_PIN_PPS_RP110
/* Assign RP110 as Input Pin */
#define IN_PIN_PPS_RP111
/* Assign RP111 as Input Pin */
#define IN_PIN_PPS_RP112
/* Assign RP112 as Input Pin */
#define IN_PIN_PPS_RP113
/* Assign RP113 as Input Pin */
#define IN_PIN_PPS_RP118
/* Assign RP118 as Input Pin */
#define IN_PIN_PPS_RPI119
/* Assign RPI119 as Input Pin */
#define IN_PIN_PPS_RP120
/* Assign RP120 as Input Pin */
#define IN_PIN_PPS_RPI121
/* Assign RPI121 as Input Pin */
#define IN_PIN_PPS_RPI124
/* Assign RP124 as Input Pin */
#define IN_PIN_PPS_RP125
/* Assign RP125 as Input Pin */
#define IN_PIN_PPS_RP126
/* Assign RP126 as Input Pin */
#define IN_PIN_PPS_RP127
/* Assign RP127 as Input Pin */

109
110
111
112
113
118
119
120
121
124
125
126
127

#elif defined (_PPI_PPS_V3) && !defined (_C5EVT)

#define IN_PIN_PPS_RPI24
24
/* Assign RPI24 as Input Pin */
#define IN_PIN_PPS_RPI25
25
/* Assign RPI25 as Input Pin */
#define IN_PIN_PPS_RPI27
27
/* Assign RPI27 as Input Pin */
#define IN_PIN_PPS_RPI28
28
/* Assign RPI28 as Input Pin */
#define IN_PIN_PPS_RPI32
32
/* Assign RPI32 as Input Pin */
#define IN_PIN_PPS_RPI33
33
/* Assign RPI33 as Input Pin */
#define IN_PIN_PPS_RPI34
34
/* Assign RPI34 as Input Pin */
#define IN_PIN_PPS_RP35
35
/* Assign RP35 as Input Pin */
#define IN_PIN_PPS_RP36
36
/* Assign RP36 as Input Pin */
#define IN_PIN_PPS_RP37
37
/* Assign RP37 as Input Pin */
#define IN_PIN_PPS_RP38
38
/* Assign RP38 as Input Pin */
#define IN_PIN_PPS_RP39
39
/* Assign RP39 as Input Pin */
#define IN_PIN_PPS_RP40
40
/* Assign RP40 as Input Pin */
#define IN_PIN_PPS_RP41
41
/* Assign RP41 as Input Pin */
#define IN_PIN_PPS_RP42
42
/* Assign RP42 as Input Pin */
#define IN_PIN_PPS_RP43
43

/* Assign RP43 as Input Pin */

#define IN_PIN_PPS_RPI44
/* Assign RPI44 as Input Pin */
#define IN_PIN_PPS_RPI45
/* Assign RPI45 as Input Pin */
#define IN_PIN_PPS_RPI46
/* Assign RPI46 as Input Pin */
#define IN_PIN_PPS_RPI47
/* Assign RPI47 as Input Pin */
#define IN_PIN_PPS_RPI51
/* Assign RPI51 as Input Pin */
#define IN_PIN_PPS_RPI52
/* Assign RPI52 as Input Pin */
#define IN_PIN_PPS_RPI53
/* Assign RPI53 as Input Pin */
#define IN_PIN_PPS_RP54
/* Assign RP54 as Input Pin */
#define IN_PIN_PPS_RP55
/* Assign RP55 as Input Pin */
#define IN_PIN_PPS_RP56
/* Assign RP56 as Input Pin */
#define IN_PIN_PPS_RP57
/* Assign RP57 as Input Pin */
#define IN_PIN_PPS_RPI58
/* Assign RPI58 as Input Pin */
#define IN_PIN_PPS_RPI94
/* Assign RPI94 as Input Pin */
#define IN_PIN_PPS_RPI95
/* Assign RPI95 as Input Pin */
#define IN_PIN_PPS_RPI96
/* Assign RPI96 as Input Pin */
#define IN_PIN_PPS_RP97
/* Assign RP97 as Input Pin */
#define IN_PIN_PPS_RP118
/* Assign RP118 as Input Pin */
#define IN_PIN_PPS_RPI119
/* Assign RPI119 as Input Pin */
#define IN_PIN_PPS_RP120
/* Assign RP120 as Input Pin */
#define IN_PIN_PPS_RPI121
/* Assign RPI121 as Input Pin */

44
45
46
47
51
52
53
54
55
56
57
58
94
95
96
97
118
119
120
121

#elif defined (_PPI_PPS_V3) && defined (_C5EVT)

#define IN_PIN_PPS_RPI24
24
/* Assign RPI24 as Input Pin */
#define IN_PIN_PPS_RPI25
25
/* Assign RPI25 as Input Pin */
#define IN_PIN_PPS_RPI27
27
/* Assign RPI27 as Input Pin */
#define IN_PIN_PPS_RPI28
28
/* Assign RPI28 as Input Pin */
#define IN_PIN_PPS_RP30
30
/* Assign RP30 as Input Pin */
#define IN_PIN_PPS_RP31
31
/* Assign RP31 as Input Pin */
#define IN_PIN_PPS_RPI32
32
/* Assign RPI32 as Input Pin */
#define IN_PIN_PPS_RPI33
33
/* Assign RPI33 as Input Pin */
#define IN_PIN_PPS_RPI34
34

/* Assign RPI34 as Input Pin */

#define IN_PIN_PPS_RP35
/* Assign RP35 as Input Pin */
#define IN_PIN_PPS_RP36
/* Assign RP36 as Input Pin */
#define IN_PIN_PPS_RP37
/* Assign RP37 as Input Pin */
#define IN_PIN_PPS_RP38
/* Assign RP38 as Input Pin */
#define IN_PIN_PPS_RP39
/* Assign RP39 as Input Pin */
#define IN_PIN_PPS_RP40
/* Assign RP40 as Input Pin */
#define IN_PIN_PPS_RP41
/* Assign RP41 as Input Pin */
#define IN_PIN_PPS_RP42
/* Assign RP42 as Input Pin */
#define IN_PIN_PPS_RP43
/* Assign RP43 as Input Pin */
#define IN_PIN_PPS_RPI44
/* Assign RPI44 as Input Pin */
#define IN_PIN_PPS_RPI45
/* Assign RPI45 as Input Pin */
#define IN_PIN_PPS_RPI46
/* Assign RPI46 as Input Pin */
#define IN_PIN_PPS_RPI47
/* Assign RPI47 as Input Pin */
#define IN_PIN_PPS_RP49
/* Assign RP49 as Input Pin */
#define IN_PIN_PPS_RP50
/* Assign RP50 as Input Pin */
#define IN_PIN_PPS_RPI51
/* Assign RPI51 as Input Pin */
#define IN_PIN_PPS_RPI52
/* Assign RPI52 as Input Pin */
#define IN_PIN_PPS_RPI53
/* Assign RPI53 as Input Pin */
#define IN_PIN_PPS_RP54
/* Assign RP54 as Input Pin */
#define IN_PIN_PPS_RP55
/* Assign RP55 as Input Pin */
#define IN_PIN_PPS_RP56
/* Assign RP56 as Input Pin */
#define IN_PIN_PPS_RP57
/* Assign RP57 as Input Pin */
#define IN_PIN_PPS_RPI58
/* Assign RPI58 as Input Pin */
#define IN_PIN_PPS_RPI60
/* Assign RP60 as Input Pin */
#define IN_PIN_PPS_RPI61
/* Assign RP61 as Input Pin */
#define IN_PIN_PPS_RPI63
/* Assign RP63 as Input Pin */
#define IN_PIN_PPS_RP69
/* Assign RP69 as Input Pin */
#define IN_PIN_PPS_RP70
/* Assign RP70 as Input Pin */
#define IN_PIN_PPS_RPI72
/* Assign RP72 as Input Pin */
#define IN_PIN_PPS_RPI76

35
36
37
38
39
40
41
42
43
44
45
46
47
49
50
51
52
53
54
55
56
57
58
60
61
63
69
70
72
76

/* Assign RP76 as Input Pin */

#define IN_PIN_PPS_RPI77
/* Assign RP77 as Input Pin */
#define IN_PIN_PPS_RPI80
/* Assign RP80 as Input Pin */
#define IN_PIN_PPS_RP81
/* Assign RP81 as Input Pin */
#define IN_PIN_PPS_RPI94
/* Assign RPI94 as Input Pin */
#define IN_PIN_PPS_RPI95
/* Assign RPI95 as Input Pin */
#define IN_PIN_PPS_RPI96
/* Assign RPI96 as Input Pin */
#define IN_PIN_PPS_RPI112
/* Assign RP112 as Input Pin */
#define IN_PIN_PPS_RP113
/* Assign RP113 as Input Pin */
#define IN_PIN_PPS_RP118
/* Assign RP118 as Input Pin */
#define IN_PIN_PPS_RPI119
/* Assign RPI119 as Input Pin */
#define IN_PIN_PPS_RP120
/* Assign RP120 as Input Pin */
#define IN_PIN_PPS_RPI121
/* Assign RPI121 as Input Pin */
#define IN_PIN_PPS_RPI124
/* Assign RP124 as Input Pin */
#define IN_PIN_PPS_RP125
/* Assign RP125 as Input Pin */
#define IN_PIN_PPS_RP126
/* Assign RP126 as Input Pin */
#define IN_PIN_PPS_RP127
/* Assign RP127 as Input Pin */
#else
#define IN_PIN_PPS_RP24
/* Assign RP24 as Input Pin */
#define IN_PIN_PPS_RP25
/* Assign RP25 as Input Pin */
#define IN_PIN_PPS_VSS
/* Input Pin tied to Vss */
#endif

77
80
81
94
95
96
112
113
118
119
120
121
124
125
126
127

24
25
31

#ifdef _PPI_PPS_V4 //#ifdef _PPI_PPS_V2 - gives errors!

#define IN_PIN_PPS_RPI35
IN_PIN_PPS_RP35
#define IN_PIN_PPS_RPI36
IN_PIN_PPS_RP36
#define IN_PIN_PPS_RPI37
IN_PIN_PPS_RP37
#define IN_PIN_PPS_RPI38
IN_PIN_PPS_RP38
#define IN_PIN_PPS_RPI39
IN_PIN_PPS_RP39
#define IN_PIN_PPS_RPI40
IN_PIN_PPS_RP40
#define IN_PIN_PPS_RPI41
IN_PIN_PPS_RP41
#define IN_PIN_PPS_RPI42
IN_PIN_PPS_RP42
#define IN_PIN_PPS_RPI43
IN_PIN_PPS_RP43
#define IN_PIN_PPS_RPI49
IN_PIN_PPS_RP49
#define IN_PIN_PPS_RPI50
IN_PIN_PPS_RP50
#define IN_PIN_PPS_RPI60
IN_PIN_PPS_RP60
#define IN_PIN_PPS_RPI61
IN_PIN_PPS_RP61
#define IN_PIN_PPS_RPI62
IN_PIN_PPS_RP62
#define IN_PIN_PPS_RPI72
IN_PIN_PPS_RP72
#define IN_PIN_PPS_RPI73
IN_PIN_PPS_RP73

#define
#define
#define
#define
#define
#define
#define
#define
#define
#define
#define
#endif

IN_PIN_PPS_RPI74
IN_PIN_PPS_RPI75
IN_PIN_PPS_RPI76
IN_PIN_PPS_RPI77
IN_PIN_PPS_RPI78
IN_PIN_PPS_RPI81
IN_PIN_PPS_RPI83
IN_PIN_PPS_RPI86
IN_PIN_PPS_RPI88
IN_PIN_PPS_RPI89
IN_PIN_PPS_RPI124

IN_PIN_PPS_RP74
IN_PIN_PPS_RP75
IN_PIN_PPS_RP76
IN_PIN_PPS_RP77
IN_PIN_PPS_RP78
IN_PIN_PPS_RP81
IN_PIN_PPS_RP83
IN_PIN_PPS_RP86
IN_PIN_PPS_RP88
IN_PIN_PPS_RP89
IN_PIN_PPS_RP124

#define IN_FN_PPS_INT1
RPINR0bits.INT1R
n External Interrupt 1 (INTR1) to the corresponding RPn pin*/
#define IN_FN_PPS_INT2
RPINR1bits.INT2R
n External Interrupt 2 (INTR2) to the corresponding RPn pin*/
#if defined(_PPI_PPS_V2)|| defined (_PPI_PPS_V3)
#define IN_FN_PPS_INT3
RPINR1bits.INT3R
n External Interrupt 3 (INTR3) to the corresponding RPn pin*/
#define IN_FN_PPS_INT4
RPINR2bits.INT4R
n External Interrupt 4 (INTR4) to the corresponding RPn pin*/
#endif
#define IN_FN_PPS_T2CK
n Timer2 External Clock
#define IN_FN_PPS_T3CK
n Timer3 External Clock
#define IN_FN_PPS_T4CK
n Timer4 External Clock
#define IN_FN_PPS_T5CK
n Timer5 External Clock

RPINR3bits.T2CKR
(T2CK) to the corresponding RPn pin*/
RPINR3bits.T3CKR
(T3CK) to the corresponding RPn pin*/
RPINR4bits.T4CKR
(T4CK) to the corresponding RPn pin*/
RPINR4bits.T5CKR
(T5CK) to the corresponding RPn pin*/

#if defined(_PPI_PPS_V2)|| defined (_PPI_PPS_V3)

#define IN_FN_PPS_T6CK
RPINR5bits.T6CKR
n Timer6 External Clock (T6CK) to the corresponding RPn pin*/
#define IN_FN_PPS_T7CK
RPINR5bits.T7CKR
n Timer7 External Clock (T7CK) to the corresponding RPn pin*/
#define IN_FN_PPS_T8CK
RPINR6bits.T8CKR
n Timer8 External Clock (T8CK) to the corresponding RPn pin*/
#define IN_FN_PPS_T9CK
RPINR6bits.T9CKR
n Timer9 External Clock (T9CK) to the corresponding RPn pin*/
#endif
#define
n Input
#define
n Input

IN_FN_PPS_IC1
RPINR7bits.IC1R
Capture 1 (IC1) to the corresponding RPn pin*/
IN_FN_PPS_IC2
RPINR7bits.IC2R
Capture 2 (IC2) to the corresponding RPn pin*/

#if defined (_C5EVT)

#define IN_FN_PPS_IC3
RPINR8bits.IC3R
n Input Capture 3 (IC4) to the corresponding RPn pin*/
#define IN_FN_PPS_IC4
RPINR8bits.IC4R
n Input Capture 4 (IC4) to the corresponding RPn pin*/
#define IN_FN_PPS_IC5
RPINR9bits.IC5R
n Input Capture 5 (IC5) to the corresponding RPn pin*/
#define IN_FN_PPS_IC6
RPINR9bits.IC6R

/* Assig
/* Assig

/* Assig
/* Assig

/* Assig
/* Assig
/* Assig
/* Assig

/* Assig
/* Assig
/* Assig
/* Assig

/* Assig
/* Assig

/* Assig
/* Assig
/* Assig
/* Assig

n Input Capture 6 (IC6) to the corresponding RPn pin*/

#define IN_FN_PPS_SDI1
RPINR20bits.SDI1R
n SPI1 Data Input (SDI1) to the corresponding RPn pin*/
#define IN_FN_PPS_SCK1
RPINR20bits.SCK1R
n SPI1 Clock Input (SCK1IN) to the corresponding RPn pin*/
#define IN_FN_PPS_SS1
RPINR21bits.SS1R
n SPI1 Slave Select Input (SS1IN) to the corresponding RPn pin*/
#define IN_FN_PPS_SDI2
RPINR22bits.SDI2R
n SPI2 Data Input (SDI2) to the corresponding RPn pin*/
#define IN_FN_PPS_SCK2
RPINR22bits.SCK2R
n SPI2 Clock Input (SCK2IN) to the corresponding RPn pin*/
#define IN_FN_PPS_SS2
RPINR23bits.SS2R
n SPI2 Slave Select Input (SS2IN) to the corresponding RPn pin*/

/* Assig
/* Assig
/* Assig
/* Assig
/* Assig
/* Assig

#elif defined (_PPI_PPS_V2) || defined(_PPI_PPS_V3) && !defined (_C5EVT)

#define IN_FN_PPS_IC3
RPINR8bits.IC3R
/*
n Input Capture 3 (IC4) to the corresponding RPn pin*/
#define IN_FN_PPS_IC4
RPINR8bits.IC4R
/*
n Input Capture 4 (IC4) to the corresponding RPn pin*/
#define IN_FN_PPS_SDI1
RPINR20bits.SDI1R
/*
n SPI1 Data Input (SDI1) to the corresponding RPn pin*/
#define IN_FN_PPS_SCK1
RPINR20bits.SCK1R
/*
n SPI1 Clock Input (SCK1IN) to the corresponding RPn pin*/
#define IN_FN_PPS_SS1
RPINR21bits.SS1R
/*
n SPI1 Slave Select Input (SS1IN) to the corresponding RPn pin*/
#define IN_FN_PPS_SDI2
RPINR22bits.SDI2R
/*
n SPI2 Data Input (SDI2) to the corresponding RPn pin*/
#define IN_FN_PPS_SCK2
RPINR22bits.SCK2R
/*
n SPI2 Clock Input (SCK2IN) to the corresponding RPn pin*/
#define IN_FN_PPS_SS2
RPINR23bits.SS2R
/*
n SPI2 Slave Select Input (SS2IN) to the corresponding RPn pin*/

Assig
Assig
Assig
Assig
Assig
Assig
Assig
Assig

#endif

#define
n Input
#define
n Input

IN_FN_PPS_IC7
RPINR10bits.IC7R
Capture 7 (IC7) to the corresponding RPn pin*/
IN_FN_PPS_IC8
RPINR10bits.IC8R
Capture 8 (IC8) to the corresponding RPn pin*/

/* Assig
/* Assig

#define IN_FN_PPS_OCFA
RPINR11bits.OCFAR
n Output Capture A (OCFA) to the corresponding RPn pin*/

/* Assig

#if defined(_PPI_PPS_V2)|| defined (_PPI_PPS_V3)

#define IN_FN_PPS_OCFB
RPINR11bits.OCFBR
n Output Capture B (OCFB) to the corresponding RPn pin*/
#endif

/* Assig

#if defined(_PPI_PPS_V2)||
#define IN_FN_PPS_FLT1
n PWM1 Fault (FLT1) to the
#define IN_FN_PPS_FLT2
n PWM2 Fault (FLT2) to the
#define IN_FN_PPS_FLT3
n PWM3 Fault (FLT3) to the
#define IN_FN_PPS_FLT4
n PWM4 Fault (FLT4) to the
#else
#define IN_FN_PPS_FLTA1

defined (_PPI_PPS_V3)
RPINR12bits.FLT1R
corresponding RPn pin*/
RPINR12bits.FLT2R
corresponding RPn pin*/
RPINR13bits.FLT3R
corresponding RPn pin*/
RPINR13bits.FLT4R
corresponding RPn pin*/
RPINR12bits.FLTA1R

/* Assig
/* Assig
/* Assig
/* Assig
/* Assig

n PWM1 Fault (FLTA1) to the corresponding RPn pin*/

#define IN_FN_PPS_FLTA2
RPINR13bits.FLTA2R
n PWM2 Fault (FLTA2) to the corresponding RPn pin*/
#endif
#define IN_FN_PPS_QEA1
RPINR14bits.QEA1R
n A (QEA) to the corresponding pin*/
#define IN_FN_PPS_QEB1
RPINR14bits.QEB1R
n B (QEB) to the corresponding pin*/
#define IN_FN_PPS_QEI1
RPINR15bits.INDX1R
n QEI INDEX (INDX) to the corresponding RPn pin*/
#if defined(_PPI_PPS_V2)|| defined (_PPI_PPS_V3)
#define IN_FN_PPS_QEH1
RPINR15bits.HOME1R
n QEI HOME to the corresponding RPn pin*/
#endif
#define IN_FN_PPS_QEA2
RPINR16bits.QEA2R
n A (QEA) to the corresponding pin*/
#define IN_FN_PPS_QEB2
RPINR16bits.QEB2R
n B (QEB) to the corresponding pin*/
#define IN_FN_PPS_QEI2
RPINR17bits.INDX2R
n QEI INDEX (INDX) to the corresponding RPn pin*/
#if defined(_PPI_PPS_V2)|| defined (_PPI_PPS_V3)
#define IN_FN_PPS_QEH2
RPINR17bits.HOME2R
n QEI HOME to the corresponding RPn pin*/
#endif
#define
n UART1
#define
n UART1
#define
n UART2
#define
n UART2

IN_FN_PPS_U1RX
Receive (U1RX) to the
IN_FN_PPS_U1CTS
Clear to Send (U1CTS)
IN_FN_PPS_U2RX
Receive (U2RX) to the
IN_FN_PPS_U2CTS
Clear to Send (U2CTS)

RPINR18bits.U1RXR
corresponding RPn pin*/
RPINR18bits.U1CTSR
to the corresponding RPn pin*/
RPINR19bits.U2RXR
corresponding RPn pin*/
RPINR19bits.U2CTSR
to the corresponding RPn pin*/

/* Assig

/* Assig
/* Assig
/* Assig

/* Assig

/* Assig
/* Assig
/* Assig

/* Assig

/* Assig
/* Assig
/* Assig
/* Assig

#define IN_FN_PPS_SDI1
RPINR20bits.SDI1R
n SPI1 Data Input (SDI1) to the corresponding RPn pin*/
#define IN_FN_PPS_SCK1
RPINR20bits.SCK1R
n SPI1 Clock Input (SCK1IN) to the corresponding RPn pin*/
#define IN_FN_PPS_SS1
RPINR21bits.SS1R
n SPI1 Slave Select Input (SS1IN) to the corresponding RPn pin*/
#define IN_FN_PPS_SDI2
RPINR22bits.SDI2R
n SPI2 Data Input (SDI2) to the corresponding RPn pin*/
#define IN_FN_PPS_SCK2
RPINR22bits.SCK2R
n SPI2 Clock Input (SCK2IN) to the corresponding RPn pin*/
#define IN_FN_PPS_SS2
RPINR23bits.SS2R
n SPI2 Slave Select Input (SS2IN) to the corresponding RPn pin*/

/* Assig

#define IN_FN_PPS_CSDI
RPINR24bits.CSDIR
n DCI Serial Data Input (CSDIN) to the corresponding RPn pin*/
#define IN_FN_PPS_CSCK
RPINR24bits.CSCKR
n DCI Serial Clock Input (CSCKIN) to the corresponding RPn pin*/
#define IN_FN_PPS_COFS
RPINR25bits.COFSR
n DCI Frame Sync Input (COFSIN) to the corresponding RPn pin*/

/* Assig

#define IN_FN_PPS_C1RX
RPINR26bits.C1RXR
n ECAN1 Receive Input (C1RX) to the corresponding RPn pin*/

/* Assig

/* Assig
/* Assig
/* Assig
/* Assig
/* Assig

/* Assig
/* Assig

#if defined(_PPI_PPS_V2)|| defined (_PPI_PPS_V3)

#define IN_FN_PPS_C2RX
RPINR26bits.C2RXR
/*
n ECAN2 Receive Input (C2RX) to the corresponding RPn pin*/
#define IN_FN_PPS_U3RX
RPINR27bits.U3RXR
/* Assign UART3 Receive (U3RX) to the corresponding RPn pin*/
#define IN_FN_PPS_U3CTS
RPINR27bits.U3CTSR
/*
n UART3 Clear to Send (U3CTS) to the corresponding RPn pin*/
#define IN_FN_PPS_U4RX
RPINR28bits.U4RXR
/* Assign UART4 Receive (U4RX) to the corresponding RPn pin*/
#define IN_FN_PPS_U4CTS
RPINR28bits.U4CTSR
/*
n UART4 Clear to Send (U4CTS) to the corresponding RPn pin*/
#define IN_FN_PPS_SDI3
RPINR29bits.SDI3R
/* Assign SPI3 Data Input (SDI3) to the corresponding RPn pin*/
#define IN_FN_PPS_SCK3
RPINR29bits.SCK3R
/* Assign SPI3 Clock Input (SCK3IN) to the corresponding RPn pin*/
#define IN_FN_PPS_SS3
RPINR30bits.SS3R
/* Assign SPI3 Slave Select Input (SS3IN) to the corresponding RPn pin*/
#define IN_FN_PPS_SDI4
RPINR31bits.SDI4R
/* Assign SPI4 Data Input (SDI4) to the corresponding RPn pin*/
#define IN_FN_PPS_SCK4
RPINR31bits.SCK4R
/* Assign SPI4 Clock Input (SCK4IN) to the corresponding RPn pin*/
#define IN_FN_PPS_SS4
RPINR32bits.SS4R
/* Assign SPI4 Slave Select Input (SS4IN) to the corresponding RPn pin*/
#define IN_FN_PPS_IC9
RPINR33bits.IC9R
/* Assign Input Capture 9 (IC9) to the corresponding RPn pin*/
#define IN_FN_PPS_IC10
RPINR33bits.IC10R
/* Assign Input Capture 10 (IC10) to the corresponding RPn pin*/
#define IN_FN_PPS_IC11
RPINR34bits.IC11R
/* Assign Input Capture 11 (IC11) to the corresponding RPn pin*/
#define IN_FN_PPS_IC12
RPINR34bits.IC12R
/* Assign Input Capture 12 (IC12) to the corresponding RPn pin*/
#define IN_FN_PPS_IC13
RPINR35bits.IC13R
/* Assign Input Capture 13 (IC13) to the corresponding RPn pin*/
#define IN_FN_PPS_IC14
RPINR35bits.IC14R
/* Assign Input Capture 14 (IC14) to the corresponding RPn pin*/
#define IN_FN_PPS_IC15
RPINR36bits.IC15R
/* Assign Input Capture 15 (IC15) to the corresponding RPn pin*/
#define IN_FN_PPS_IC16
RPINR36bits.IC16R
/* Assign Input Capture 16 (IC16) to the corresponding RPn pin*/
#define IN_FN_PPS_OCFC
RPINR37bits.OCFCR
/* Assign Output Capture C (OCFC) to the corresponding RPn pin*/
#define IN_FN_PPS_SYNCI1
RPINR37bits.SYNCI1R
/*
n PWM Sync Input 1 (SYNCI1) to the corresponding RPn pin*/
#define IN_FN_PPS_SYNCI2
RPINR38bits.SYNCI2R
/*
n PWM Sync Input 2 (SYNCI2) to the corresponding RPn pin*/
#define IN_FN_PPS_DTCMP1
RPINR38bits.DTCMP1R
/*
n PWM Dead Time Compensation 1 (DTCMP1) to the corresponding RPn pin*/
#define IN_FN_PPS_DTCMP2
RPINR39bits.DTCMP2R
/*
n PWM Dead Time Compensation 2 (DTCMP2) to the corresponding RPn pin*/
#define IN_FN_PPS_DTCMP3
RPINR39bits.DTCMP3R
/*
n PWM Dead Time Compensation 3 (DTCMP3) to the corresponding RPn pin*/
#define IN_FN_PPS_DTCMP4
RPINR40bits.DTCMP4R
/*
n PWM Dead Time Compensation 4 (DTCMP4) to the corresponding RPn pin*/
#define IN_FN_PPS_DTCMP5
RPINR40bits.DTCMP5R
/*
n PWM Dead Time Compensation 5 (DTCMP5) to the corresponding RPn pin*/
#define IN_FN_PPS_DTCMP6
RPINR41bits.DTCMP6R
/*
n PWM Dead Time Compensation 6 (DTCMP6) to the corresponding RPn pin*/
#define IN_FN_PPS_DTCMP7
RPINR41bits.DTCMP7R
/*
n PWM Dead Time Compensation 7 (DTCMP7) to the corresponding RPn pin*/

Assig

Assig

Assig

Assig
Assig
Assig
Assig
Assig
Assig
Assig
Assig
Assig

#define IN_FN_PPS_FLT5
RPINR42bits.FLT5R
/* Assign PWM5 Fault (FLT5) to the corresponding RPn pin*/
#define IN_FN_PPS_FLT6
RPINR42bits.FLT6R
/* Assign PWM6 Fault (FLT6) to the corresponding RPn pin*/
#define IN_FN_PPS_FLT7
RPINR43bits.FLT7R
/* Assign PWM7 Fault (FLT7) to the corresponding RPn pin*/
#endif
#define iPPSInput(fn,pin)
#define PPSInput(fn,pin)

fn=pin
iPPSInput(fn,pin)

/*---------------------------------------------------------------------------------------------------*/
/* Remappable Peripheral Outputs:
*/
/*---------------------------------------------------------------------------------------------------*/
#define OUT_FN_PPS_NULL
/* RPn tied to default port pin */
#if defined(_PPI_PPS_V2)
#define OUT_FN_PPS_U1TX
/* RPn tied to UART1 Transmit */
#define OUT_FN_PPS_U1RTS
/* RPn tied to UART1 Ready To Send */
#define OUT_FN_PPS_U2TX
/* RPn tied to UART2 Transmit */
#define OUT_FN_PPS_U2RTS
/* RPn tied to UART2 Ready To Send */
#define OUT_FN_PPS_SDO1
/* RPn tied to SPI1 Data Output */
#define OUT_FN_PPS_SCK1
/* RPn tied to SPI1 Clock Output */
#define OUT_FN_PPS_SS1
/* RPn tied to SPI1 Slave Select Output */
#define OUT_FN_PPS_CSDO
/* RPn tied to DCI Serial Data Output*/
#define OUT_FN_PPS_CSCKOUT
/* RPn tied to DCI Serial Clock Output*/
#define OUT_FN_PPS_COFSOUT
/* RPn tied to DCI Frame Sync Output*/
#define OUT_FN_PPS_C1TX
/* RPn tied to ECAN1 Transmit */
#define OUT_FN_PPS_C2TX
/* RPn tied to ECAN2 Transmit */
#define OUT_FN_PPS_OC1
/* RPn tied to Output Compare 1 */
#define OUT_FN_PPS_OC2
/* RPn tied to Output Compare 2 */
#define OUT_FN_PPS_OC3
/* RPn tied to Output Compare 3 */
#define OUT_FN_PPS_OC4
/* RPn tied to Output Compare 4 */
#define OUT_FN_PPS_OC5
/* RPn tied to Output Compare 5 */
#define OUT_FN_PPS_OC6

0x0000

0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x000B
0x000C
0x000D
0x000E
0x000F
0x0010
0x0011
0x0012
0x0013
0x0014
0x0015

/* RPn tied to Output Compare 6 */

#define OUT_FN_PPS_OC7
/* RPn tied to Output Compare 7 */
#define OUT_FN_PPS_OC8
/* RPn tied to Output Compare 8 */
#define OUT_FN_PPS_C1OUT
/* RPn tied to Comparator1 Output */
#define OUT_FN_PPS_C2OUT
/* RPn tied to Comparator2 Output */
#define OUT_FN_PPS_C3OUT
/* RPn tied to Comparator3 Output */
#define OUT_FN_PPS_U3TX
/* RPn tied to UART3 Transmit */
#define OUT_FN_PPS_U3RTS
/* RPn tied to UART3 Ready To Send */
#define OUT_FN_PPS_U4TX
/* RPn tied to UART4 Transmit */
#define OUT_FN_PPS_U4RTS
/* RPn tied to UART4 Ready To Send */
#define OUT_FN_PPS_SDO3
/* RPn tied to SPI3 Data Output */
#define OUT_FN_PPS_SCK3
/* RPn tied to SPI3 Clock Output */
#define OUT_FN_PPS_SS3
/* RPn tied to SPI3 Slave Select Output */
#define OUT_FN_PPS_SDO4
/* RPn tied to SPI4 Data Output */
#define OUT_FN_PPS_SCK4
/* RPn tied to SPI4 Clock Output */
#define OUT_FN_PPS_SS4
/* RPn tied to SPI4 Slave Select Output */
#define OUT_FN_PPS_OC9
/* RPn tied to Output Compare 9 */
#define OUT_FN_PPS_OC10
/* RPn tied to Output Compare 10 */
#define OUT_FN_PPS_OC11
/* RPn tied to Output Compare 11 */
#define OUT_FN_PPS_OC12
/* RPn tied to Output Compare 12 */
#define OUT_FN_PPS_OC13
/* RPn tied to Output Compare 13 */
#define OUT_FN_PPS_OC14
/* RPn tied to Output Compare 14 */
#define OUT_FN_PPS_OC15
/* RPn tied to Output Compare 15 */
#define OUT_FN_PPS_OC16
/* RPn tied to Output Compare 16 */
#define OUT_FN_PPS_SYNCO1
/* RPn tied to Output SYNCO1 */
#define OUT_FN_PPS_SYNCO2
/* RPn tied to Output SYNCO2 */
#define OUT_FN_PPS_QEI1CCMP
/* RPn tied to Output QEI1CCMP */
#define OUT_FN_PPS_QEI2CCMP
/* RPn tied to Output QEI2CCMP */
#define OUT_FN_PPS_REFCLKO
/* RPn tied to Output REFCLKO */

0x0016
0x0017
0x0018
0x0019
0x001A
0x001B
0x001C
0x001D
0x001E
0x001F
0x0020
0x0021
0x0022
0x0023
0x0024
0x0025
0x0026
0x0027
0x0028
0x0029
0x002A
0x002B
0x002C
0x002D
0x002E
0x002F
0x0030
0x0031

#elif defined (_PPI_PPS_V3) && !defined (_C5EVT)

#define OUT_FN_PPS_U1TX
0x0001

/* RPn tied to UART1 Transmit */

#define OUT_FN_PPS_U2TX
/* RPn tied to UART2 Transmit */
#define OUT_FN_PPS_SDO2
/* RPn tied to SPI2 Data Output */
#define OUT_FN_PPS_SCK2
/* RPn tied to SPI2 Clock Output */
#define OUT_FN_PPS_SS2
/* RPn tied to SPI2 Slave Select Output */
#define OUT_FN_PPS_C1TX
/* RPn tied to ECAN1 Transmit */
#define OUT_FN_PPS_OC1
/* RPn tied to Output Compare 1 */
#define OUT_FN_PPS_OC2
/* RPn tied to Output Compare 2 */
#define OUT_FN_PPS_OC3
/* RPn tied to Output Compare 3 */
#define OUT_FN_PPS_OC4
/* RPn tied to Output Compare 4 */
#define OUT_FN_PPS_C1OUT
/* RPn tied to Comparator1 Output */
#define OUT_FN_PPS_C2OUT
/* RPn tied to Comparator2 Output */
#define OUT_FN_PPS_C3OUT
/* RPn tied to Comparator3 Output */
#define OUT_FN_PPS_SYNCO1
/* RPn tied to Output SYNCO1 */
#define OUT_FN_PPS_QEI1CCMP
/* RPn tied to Output QEI1CCMP */
#define OUT_FN_PPS_REFCLKO
/* RPn tied to Output REFCLKO */
#define OUT_FN_PPS_C4OUT
/* RPn tied to Comparator4 Output */

0x0003
0x0008
0x0009
0x000A
0x000E
0x0010
0x0011
0x0012
0x0013
0x0018
0x0019
0x001A
0x002D
0x002F
0x0031
0x0032

#elif defined (__PPI_PPS_V3) && defined (_C5EVT)

#define OUT_FN_PPS_U1TX
0x0001
/* RPn tied to UART1 Transmit */
#define OUT_FN_PPS_U2TX
0x0003
/* RPn tied to UART2 Transmit */
#define OUT_FN_PPS_SDO2
0x0008
/* RPn tied to SPI2 Data Output */
#define OUT_FN_PPS_SCK2
0x0009
/* RPn tied to SPI2 Clock Output */
#define OUT_FN_PPS_SS2
0x000A
/* RPn tied to SPI2 Slave Select Output */
#define OUT_FN_PPS_CSDO
0x000B
/* RPn tied to DCI Serial Data Output*/
#define OUT_FN_PPS_CSCKOUT
0x000C
/* RPn tied to DCI Serial Clock Output*/
#define OUT_FN_PPS_COFSOUT
0x000D
/* RPn tied to DCI Frame Sync Output*/
#define OUT_FN_PPS_C1TX
0x000E
/* RPn tied to ECAN1 Transmit */
#define OUT_FN_PPS_C2TX
0x000F
/* RPn tied to ECAN2 Transmit */
#define OUT_FN_PPS_OC1
0x0010
/* RPn tied to Output Compare 1 */
#define OUT_FN_PPS_OC2
0x0011
/* RPn tied to Output Compare 2 */
#define OUT_FN_PPS_OC3
0x0012

/* RPn tied to Output Compare 3 */

#define OUT_FN_PPS_OC4
/* RPn tied to Output Compare 4 */
#define OUT_FN_PPS_OC5
/* RPn tied to Output Compare 5 */
#define OUT_FN_PPS_OC6
/* RPn tied to Output Compare 6 */
#define OUT_FN_PPS_OC7
/* RPn tied to Output Compare 7 */
#define OUT_FN_PPS_OC8
/* RPn tied to Output Compare 8 */
#define OUT_FN_PPS_C1OUT
/* RPn tied to Comparator1 Output */
#define OUT_FN_PPS_C2OUT
/* RPn tied to Comparator2 Output */
#define OUT_FN_PPS_C3OUT
/* RPn tied to Comparator3 Output */
#define OUT_FN_PPS_U3TX
/* RPn tied to UART3 Transmit */
#define OUT_FN_PPS_U3RTS
/* RPn tied to UART3 Ready To Send */
#define OUT_FN_PPS_U4TX
/* RPn tied to UART4 Transmit */
#define OUT_FN_PPS_U4RTS
/* RPn tied to UART4 Ready To Send */
#define OUT_FN_PPS_SDO3
/* RPn tied to SPI3 Data Output */
#define OUT_FN_PPS_SCK3
/* RPn tied to SPI3 Clock Output */
#define OUT_FN_PPS_SS3
/* RPn tied to SPI3 Slave Select Output */
#define OUT_FN_PPS_SYNCO1
/* RPn tied to Output SYNCO1 */
#define OUT_FN_PPS_SYNCO2
/* RPn tied to Output SYNCO2 */
#define OUT_FN_PPS_QEI1CCMP
/* RPn tied to Output QEI1CCMP */
#define OUT_FN_PPS_QEI2CCMP
/* RPn tied to Output QEI2CCMP */
#define OUT_FN_PPS_REFCLKO
/* RPn tied to Output REFCLKO */
#define OUT_FN_PPS_C4OUT
/* RPn tied to Comparator4 Output */
#define OUT_FN_PPS_C5OUT
/* RPn tied to Comparator5 Output */
#else
#define OUT_FN_PPS_C1OUT
/* RPn tied to Comparator1 Output */
#define OUT_FN_PPS_C2OUT
/* RPn tied to Comparator2 Output */
#define OUT_FN_PPS_U1TX
/* RPn tied to UART1 Transmit */
#define OUT_FN_PPS_U1RTS
/* RPn tied to UART1 Ready To Send */
#define OUT_FN_PPS_U2TX
/* RPn tied to UART2 Transmit */
#define OUT_FN_PPS_U2RTS
/* RPn tied to UART2 Ready To Send */
#define OUT_FN_PPS_SDO1

0x0013
0x0014
0x0015
0x0016
0x0017
0x0018
0x0019
0x001A
0x001B
0x001C
0x001D
0x001E
0x001F
0x0020
0x0021
0x002D
0x002E
0x002F
0x0030
0x0031
0x0032
0x0033

0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007

/* RPn tied to SPI1 Data Output */

#define OUT_FN_PPS_SCK1
/* RPn tied to SPI1 Clock Output */
#define OUT_FN_PPS_SS1
/* RPn tied to SPI1 Slave Select Output */
#define OUT_FN_PPS_SDO2
/* RPn tied to SPI2 Data Output */
#define OUT_FN_PPS_SCK2
/* RPn tied to SPI2 Clock Output */
#define OUT_FN_PPS_SS2
/* RPn tied to SPI2 Slave Select Output */
#define OUT_FN_PPS_CSDO
/* RPn tied to DCI Serial Data Output*/
#define OUT_FN_PPS_CSCKOUT
/* RPn tied to DCI Serial Clock Output*/
#define OUT_FN_PPS_COFSOUT
/* RPn tied to DCI Frame Sync Output*/
#define OUT_FN_PPS_C1TX
/* RPn tied to ECAN1 Transmit */
#define OUT_FN_PPS_OC1
/* RPn tied to Output Compare 1 */
#define OUT_FN_PPS_OC2
/* RPn tied to Output Compare 2 */
#define OUT_FN_PPS_OC3
/* RPn tied to Output Compare 3 */
#define OUT_FN_PPS_OC4
/* RPn tied to Output Compare 4 */
#define OUT_FN_PPS_UPDN1
/* RPn tied to QEI1 UPDN Output */
#define OUT_FN_PPS_UPDN2
/* RPn tied to QEI2 UPDN Output */
#endif
#if defined(_PPI_PPS_V2)
#define OUT_PIN_PPS_RP64
n RP64 as Output Pin */
#define OUT_PIN_PPS_RP65
n RP65 as Output Pin */
#define OUT_PIN_PPS_RP66
n RP66 as Output Pin */
#define OUT_PIN_PPS_RP67
n RP67 as Output Pin */
#define OUT_PIN_PPS_RP68
n RP68 as Output Pin */
#define OUT_PIN_PPS_RP69
n RP69 as Output Pin */
#define OUT_PIN_PPS_RP70
n RP70 as Output Pin */
#define OUT_PIN_PPS_RP71
n RP71 as Output Pin */
#define OUT_PIN_PPS_RP79
n RP79 as Output Pin */
#define OUT_PIN_PPS_RP80
n RP80 as Output Pin */
#define OUT_PIN_PPS_RP82
n RP82 as Output Pin */
#define OUT_PIN_PPS_RP84
n RP84 as Output Pin */
#define OUT_PIN_PPS_RP85
n RP85 as Output Pin */

0x0008
0x0009
0x000A
0x000B
0x000C
0x000D
0x000E
0x000F
0x0010
0x0012
0x0013
0x0014
0x0015
0x001A
0x001B

RPOR0bits.RP64R

/* Assig

RPOR0bits.RP65R

/* Assig

RPOR1bits.RP66R

/* Assig

RPOR1bits.RP67R

/* Assig

RPOR2bits.RP68R

/* Assig

RPOR2bits.RP69R

/* Assig

RPOR3bits.RP70R

/* Assig

RPOR3bits.RP71R

/* Assig

RPOR4bits.RP79R

/* Assig

RPOR4bits.RP80R

/* Assig

RPOR5bits.RP82R

/* Assig

RPOR5bits.RP84R

/* Assig

RPOR6bits.RP85R

/* Assig

#define OUT_PIN_PPS_RP87
n RP87 as Output Pin */
#define OUT_PIN_PPS_RP96
n RP96 as Output Pin */
#define OUT_PIN_PPS_RP97
n RP97 as Output Pin */
#define OUT_PIN_PPS_RP98
n RP98 as Output Pin */
#define OUT_PIN_PPS_RP99
n RP99 as Output Pin */
#define OUT_PIN_PPS_RP100
/* Assign RP100 as Output
#define OUT_PIN_PPS_RP101
/* Assign RP101 as Output
#define OUT_PIN_PPS_RP102
/* Assign RP102 as Output
#define OUT_PIN_PPS_RP103
/* Assign RP103 as Output
#define OUT_PIN_PPS_RP104
/* Assign RP104 as Output
#define OUT_PIN_PPS_RP108
/* Assign RP108 as Output
#define OUT_PIN_PPS_RP109
/* Assign RP109 as Output
#define OUT_PIN_PPS_RP112
/* Assign RP112 as Output
#define OUT_PIN_PPS_RP113
/* Assign RP113 as Output
#define OUT_PIN_PPS_RP118
/* Assign RP118 as Output
#define OUT_PIN_PPS_RP120
/* Assign RP120 as Output
#define OUT_PIN_PPS_RP125
/* Assign RP125 as Output
#define OUT_PIN_PPS_RP126
/* Assign RP126 as Output
#define OUT_PIN_PPS_RP127
/* Assign RP127 as Output

RPOR6bits.RP87R

/* Assig

RPOR7bits.RP96R

/* Assig

RPOR7bits.RP97R

/* Assig

RPOR8bits.RP98R

/* Assig

RPOR8bits.RP99R

/* Assig

RPOR9bits.RP100R
Pin */
RPOR9bits.RP101R
Pin */
RPOR10bits.RP102R
Pin */
RPOR10bits.RP103R
Pin */
RPOR11bits.RP104R
Pin */
RPOR11bits.RP108R
Pin */
RPOR12bits.RP109R
Pin */
RPOR12bits.RP112R
Pin */
RPOR13bits.RP113R
Pin */
RPOR13bits.RP118R
Pin */
RPOR14bits.RP120R
Pin */
RPOR14bits.RP125R
Pin */
RPOR15bits.RP126R
Pin */
RPOR15bits.RP127R
Pin */

#elif defined(_PPI_PPS_V3) && !defined (_C5EVT)

#define OUT_PIN_PPS_RP20
n RP20 as Output Pin */
#define OUT_PIN_PPS_RP35
n RP35 as Output Pin */
#define OUT_PIN_PPS_RP36
n RP36 as Output Pin */
#define OUT_PIN_PPS_RP37
n RP37 as Output Pin */
#define OUT_PIN_PPS_RP38
n RP38 as Output Pin */
#define OUT_PIN_PPS_RP39
n RP39 as Output Pin */
#define OUT_PIN_PPS_RP40
n RP40 as Output Pin */
#define OUT_PIN_PPS_RP41
n RP41 as Output Pin */
#define OUT_PIN_PPS_RP42
n RP42 as Output Pin */
#define OUT_PIN_PPS_RP43

RPOR0bits.RP20R

/* Assig

RPOR0bits.RP35R

/* Assig

RPOR1bits.RP36R

/* Assig

RPOR1bits.RP37R

/* Assig

RPOR2bits.RP38R

/* Assig

RPOR2bits.RP39R

/* Assig

RPOR3bits.RP40R

/* Assig

RPOR3bits.RP41R

/* Assig

RPOR4bits.RP42R

/* Assig

RPOR4bits.RP43R

/* Assig

n RP43 as Output Pin */

#define OUT_PIN_PPS_RP54
n RP54 as Output Pin */
#define OUT_PIN_PPS_RP55
n RP55 as Output Pin */
#define OUT_PIN_PPS_RP56
n RP56 as Output Pin */
#define OUT_PIN_PPS_RP57
n RP57 as Output Pin */
#define OUT_PIN_PPS_RP97
n RP97 as Output Pin */
#define OUT_PIN_PPS_RP118
/* Assign RP118 as Output Pin */
#define OUT_PIN_PPS_RP120
/* Assign RP120 as Output Pin */

RPOR5bits.RP54R

/* Assig

RPOR5bits.RP55R

/* Assig

RPOR6bits.RP56R

/* Assig

RPOR6bits.RP57R

/* Assig

RPOR7bits.RP97R

/* Assig

RPOR8bits.RP118R
RPOR9bits.RP120R

#elif defined (_C5EVT) && defined (_PPI_PPS_V3)

#define OUT_PIN_PPS_RP20
n RP20 as Output Pin */
#define OUT_PIN_PPS_RP35
n RP35 as Output Pin */
#define OUT_PIN_PPS_RP36
n RP36 as Output Pin */
#define OUT_PIN_PPS_RP37
n RP37 as Output Pin */
#define OUT_PIN_PPS_RP38
n RP38 as Output Pin */
#define OUT_PIN_PPS_RP39
n RP39 as Output Pin */
#define OUT_PIN_PPS_RP40
n RP40 as Output Pin */
#define OUT_PIN_PPS_RP41
n RP41 as Output Pin */
#define OUT_PIN_PPS_RP42
n RP42 as Output Pin */
#define OUT_PIN_PPS_RP43
n RP43 as Output Pin */
#define OUT_PIN_PPS_RP48
n RP48 as Output Pin */
#define OUT_PIN_PPS_RP49
n RP49 as Output Pin */
#define OUT_PIN_PPS_RP54
n RP54 as Output Pin */
#define OUT_PIN_PPS_RP55
n RP55 as Output Pin */
#define OUT_PIN_PPS_RP56
n RP56 as Output Pin */
#define OUT_PIN_PPS_RP57
n RP57 as Output Pin */
#define OUT_PIN_PPS_RP69
n RP69 as Output Pin */
#define OUT_PIN_PPS_RP70
n RP70 as Output Pin */
#define OUT_PIN_PPS_RP81
n RP81 as Output Pin */
#define OUT_PIN_PPS_RP97
n RP97 as Output Pin */
#define OUT_PIN_PPS_RP113
/* Assign RP113 as Output Pin */

RPOR0bits.RP20R

/* Assig

RPOR0bits.RP35R

/* Assig

RPOR1bits.RP36R

/* Assig

RPOR1bits.RP37R

/* Assig

RPOR2bits.RP38R

/* Assig

RPOR2bits.RP39R

/* Assig

RPOR3bits.RP40R

/* Assig

RPOR3bits.RP41R

/* Assig

RPOR4bits.RP42R

/* Assig

RPOR4bits.RP43R

/* Assig

RPOR5bits.RP48R

/* Assig

RPOR5bits.RP49R

/* Assig

RPOR6bits.RP54R

/* Assig

RPOR6bits.RP55R

/* Assig

RPOR7bits.RP56R

/* Assig

RPOR7bits.RP57R

/* Assig

RPOR8bits.RP69R

/* Assig

RPOR8bits.RP70R

/* Assig

RPOR9bits.RP81R

/* Assig

RPOR9bits.RP97R

/* Assig

RPOR10bits.RP113R

#define OUT_PIN_PPS_RP118
/* Assign RP118 as Output
#define OUT_PIN_PPS_RP120
/* Assign RP120 as Output
#define OUT_PIN_PPS_RP125
/* Assign RP125 as Output
#define OUT_PIN_PPS_RP126
/* Assign RP126 as Output
#define OUT_PIN_PPS_RP127
/* Assign RP127 as Output
#else
#define OUT_PIN_PPS_RP0
n RP0 as Output Pin */
#define OUT_PIN_PPS_RP1
n RP1 as Output Pin */
#define OUT_PIN_PPS_RP2
n RP2 as Output Pin */
#define OUT_PIN_PPS_RP3
n RP3 as Output Pin */
#define OUT_PIN_PPS_RP4
n RP4 as Output Pin */
#define OUT_PIN_PPS_RP5
n RP5 as Output Pin */
#define OUT_PIN_PPS_RP6
n RP6 as Output Pin */
#define OUT_PIN_PPS_RP7
n RP7 as Output Pin */
#define OUT_PIN_PPS_RP8
n RP8 as Output Pin */
#define OUT_PIN_PPS_RP9
n RP9 as Output Pin */
#define OUT_PIN_PPS_RP10
n RP10 as Output Pin */
#define OUT_PIN_PPS_RP11
n RP11 as Output Pin */
#define OUT_PIN_PPS_RP12
n RP12 as Output Pin */
#define OUT_PIN_PPS_RP13
n RP13 as Output Pin */
#define OUT_PIN_PPS_RP14
n RP14 as Output Pin */
#define OUT_PIN_PPS_RP15
n RP15 as Output Pin */
#define OUT_PIN_PPS_RP16
n RP16 as Output Pin */
#define OUT_PIN_PPS_RP17
n RP17 as Output Pin */
#define OUT_PIN_PPS_RP18
n RP18 as Output Pin */
#define OUT_PIN_PPS_RP19
n RP19 as Output Pin */
#define OUT_PIN_PPS_RP20
/* Assign RP20 as Output
#define OUT_PIN_PPS_RP21
/* Assign RP21 as Output
#define OUT_PIN_PPS_RP22
/* Assign RP22 as Output
#define OUT_PIN_PPS_RP23
/* Assign RP23 as Output

RPOR10bits.RP118R
Pin */
RPOR11bits.RP120R
Pin */
RPOR11bits.RP125R
Pin */
RPOR12bits.RP126R
Pin */
RPOR12bits.RP127R
Pin */
RPOR0bits.RP0R

/* Assig

RPOR0bits.RP1R

/* Assig

RPOR1bits.RP2R

/* Assig

RPOR1bits.RP3R

/* Assig

RPOR2bits.RP4R

/* Assig

RPOR2bits.RP5R

/* Assig

RPOR3bits.RP6R

/* Assig

RPOR3bits.RP7R

/* Assig

RPOR4bits.RP8R

/* Assig

RPOR4bits.RP9R

/* Assig

RPOR5bits.RP10R

/* Assig

RPOR5bits.RP11R

/* Assig

RPOR6bits.RP12R

/* Assig

RPOR6bits.RP13R

/* Assig

RPOR7bits.RP14R

/* Assig

RPOR7bits.RP15R

/* Assig

RPOR8bits.RP16R

/* Assig

RPOR8bits.RP17R

/* Assig

RPOR9bits.RP18R

/* Assig

RPOR9bits.RP19R

/* Assig

RPOR10bits.RP20R
Pin */
RPOR10bits.RP21R
Pin */
RPOR11bits.RP22R
Pin */
RPOR11bits.RP23R
Pin */

#define OUT_PIN_PPS_RP24
/* Assign RP24 as Output Pin */
#define OUT_PIN_PPS_RP25
/* Assign RP25 as Output Pin */

RPOR12bits.RP24R
RPOR12bits.RP25R

#endif
#define iPPSOutput(pin,fn)
pin=fn
#define PPSOutput(fn,pin)
iPPSOutput(pin,fn)
/*---------------------------------------------------------------------------------------------------*/
#define PPSUnLock
#define PPSLock
#endif /*__PPS_H */

__builtin_write_OSCCONL(OSCCON & 0xbf)

__builtin_write_OSCCONL(OSCCON | 0x40)