Using D type flip flops, design a synchronous circuit which will
give a logic 1 for one clock period when the following pattern is detected in a series data stream X .0 1 1 0.. The final 0 can be the first 0 in the next pattern. Typical Sequences: Input X 000101101110110110000 Output Z 000000010000001001000 This circuit is a 4bit register and when 0 1 1 0 is stored, the output Z will be logic 1.
Q2. Draw the load line for RL = 30k, and Vdd = 6V onto the NMOS transistor characteristics given below. Sketch the input-output voltage characteristics of the inverter.