Dell Inspiron 1545 - Wistron Dr1 Roberts Uma - 48.4aq01.031 08212-3

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Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Roberts
-3
Cover Page
Custom
1 59 Monday, August 03, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cover Page
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cover Page
Custom
<Core Design>
Intel Cantiga-GM + ICH9M
2009-08-03
REV : -3
DR1(Roberts) Schematics Document
uFCPGA Mobile Penryn
DY : Nopop Component
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Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Block Diagram
Custom
2 59 Thursday, August 27, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Block Diagram
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Block Diagram
Custom
<Core Design>
EMC2102
FSB
800/1066MHz
DMIx4
KBC
Thermal & Fan
Int.
KB
LPC Bus
2MB
Flash ROM
Intel Mobile CPU
DDRII
667/800
DDRII
667/800
Slot 0
Slot 1
DDRII 667/800 Channel A
DDR II 667/800 Channel B
Roberts Block Diagram
LVDS(Dual Channel)
CRT
(on I/O board)
LCD
RGB CRT
Penryn
Cantiga-GML
AGTL+ CPU I/F
External Graphics
DDR Memory I/F
ICH9-M
USB 2.0/1.1 ports (12)
SATA ports (4)
High Definition Audio
ACPI 1.1
LPC I/F
PCI/PCI BRIDGE
PCI Express ports (6)
WINBOND
WPCE773L
SPI
5, 6, 7
8,9,10,11,12,13
14
15
35
Clock Generator
SLG8SP513VTR
24
4
42 44
25
16,17,18,19
Touch
PAD
44
PCB LAYER
L3: Signal
L2: VCC
L5: GND
L4: Signal
L6: Bottom
L1: Top
Project code : 91.4AQ01.001
PCB P/N : 48.4AQ01.031
Revision : 08212-3
C-LINK
26
27
+3.3V_RTC_LDO
28, 29
30
31
+0.9V_DDR_VTT
32
ISL6266A
OUTPUTS
+VCC_CORE
INPUTS
+PWR_SRC
CPU DC/DC
OUTPUTS
+V_DDR_MCH_REF
TPS51116
SYSTEM DC/DC
INPUTS
+1.8V_SUS
+3.3V_ALW
OUTPUTS
+5V_ALW +PWR_SRC
MAX17020
INPUTS
SYSTEM DC/DC
OUTPUTS
+1.05V_VCCP
TPS51117
SYSTEM DC/DC
INPUTS
+PWR_SRC
OUTPUTS
+1.5V_RUN +1.8V_SUS
APL5912
INPUTS
SYSTEM DC/DC
OUTPUTS
+PWR_SRC
MAXIM CHARGER
INPUTS
MAX8731A
+DC_IN
+5V_ALW2
+PBATT
41
Bluetooth
41
USB 2.0 x 1
PCIE
20
10/100 NIC
Marvell 88E8040
PCIE x 1
Left Side:
USB x 2
Right Side:
USB x 1
CAMERA
(Option)
41
43
USB 2.0 x 1
USB 2.0 x 1
USB 2.0
802.11a/b/g
37
Mini-Card
41
41
New Card
PCIE x 1
G577BR91U
Power SW
RJ45
CONN
PCIE x 1 & USB 2.0 x 1
Intel
Intel
Socket P
ODD
S
A
T
A
36 36
S
A
T
A
HDD
Realtek
RTS5159
CardReader
21
SD/MMC
MS/MS Pro/xD
37
USB2.0
Azalia
CODEC
IDT
92HD71B7
AZALIA
23
OP AMP
MAX9789A
22
2CH SPEAKER
MIC IN
HP1
Internal Analog MIC
Digital Mic Array
34
+5V_RUN
OUTPUTS
+3.3V_RUN
LDO
SYSTEM DC/DC
INPUTS
+5V_ALW
+3.3V_ALW
USB 2.0 x 2
I
/
O

B
o
a
r
d
C
o
n
n
e
c
t
o
r
+PWR_SRC
CAMERA Module
40
A
A
B
B
C
C
D
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E
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Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Table of Content
Custom
3 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Table of Content
Custom
3 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Table of Content
Custom
3 59 Monday, May 18, 2009
<Core Design>
CFG19 DMI Lane Rever sal 0 = Normal operation (Default): Lane Numbered in
Order
1 = Rever se Lanes
DMI x4 mode [ MCH- >I CH] : ( 3- >0, 2- >1, 1- >2 and 0- >3)
DMI x2 mode [ MCH- >I CH] : ( 3- >0, 2- >1)
Pai r Devi ce
0
1
2
3
4
5
6
7
8
9
10
11
HDA_SDOUT
Signal
XOR Chai n Ent r ance/
PCI E Por t Conf i g1 bi t 1,
Ri si ng Edge of PWROK.
Usage/When Sampled
Al l ows ent r ance t o XOR Chai n t est i ng when TP3
pul l ed l ow. When TP3 not pul l ed l ow at r i si ng edge
of PWROK, set s bi t 1 of RPC. PC ( Cof i g Regi st er s:
of f set 224h) . Thi s si gnal has weak i nt er nal
pul l - down.
Comment
SATALED# PCI Expr ess Lane
Rever sal . Ri si ng Edge
of PWROK.
Si gnal has weak i nt er nal pul l - up. Set s bi t 27
of MPC. LR ( Devi ce 28: Funct i on 0: Of f set D8) .
SPKR
No Reboot .
I f sampl ed hi gh, t he syst emi s st r apped t o t he
" No Reboot " mode ( I CH9 wi l l di sabl e t he TCO Ti mer
syst emr eboot f eat ur e) . The st at us i s r eadabl e
vi a t he NO REBOOT bi t .
TP3
XOR Chai n Ent r ance.
The pul l - up or pul l - down
act i ve when conf i gur ed
f or nat i ve GLAN_DOCK#
f unct i onal i t y and det er mi ned
by LAN cont r ol l er .
CFG6 i TPM Host I nt er f ace
1 = The iTPM Host Interface is disabled (default)
CFG7 I nt el Management
engi ne cr ypt o st r ap
CFG9
0 = Tr anspor t Layer Secur i t y ( TLS) ci pher
CFG20 Di gi t al Di spl ay Por t
( SDVO/ DP/ i HDMI )
Concur r ent wi t h PCI e
0 = Only Digital Display Port or PCIE is
operational (Default)
1 = Di gi t al di spl ay Por t and PCI e ar e oper at i ng
si mul at aneousl y vi a t he PEG por t
SDVO
_CTRLDATA
SDVO Pr esent 0 = No SDVO Card Present (Default)
ICH9 EDS 642879 Rev.1.5
HDA_SYNC PCI E conf i g1 bi t 0,
Thi s si gnal has a weak i nt er nal pul l - down.
Set s bi t 0 of PRC. PC ( Conf i g Regi st er s: Of f set
224h) .
GNT2#/
GPI O53
PCI E conf i g2 bi t 2,
Thi s si gnal has a weak i nt er nal pul l - up.
Set s bi t 2 of PRC. PC2 ( Conf i g Regi st er s: Of f set
224h) .
GPI O20 Reser ved.
Thi s si gnal shoul d not be pul l l ow unl ess usi ng
XOR Chai n t est i ng.
GPI O33/
HDA_DOCK
_EN#
Fl ash Descr i pt or
Secur i t y Over r i de
St r ap. Ri si ng Edge of
PWROK.
Sampl ed l ow: t he Fl ash Descr i pt or Secur i t y wi l l be
over r i dden. I f hi gh, t he secur i t y measur es wi l l be
i n ef f ect . Thi s shoul d onl y be enabl ed i n
manuf act ur i ng envi r onment s usi ng an ext er nal
pul l - up r esi st er .
Cantiga chipset and ICH9M I/O controller
Hub strapping configuration
sui t e wi t h no conf i dent i al i t y
1 = TLS cipher suite with confidentiality(Default)
PCI E Gr aphi cs Lane 0 = Reser ved Lanes, 15- >0, 14- >1 ect . .
1 = Normal operation (Default): Lane Numbered in
Order
1 = SDVO Car d Pr esent
L_DDC_DATA Local Fl at Panel
( LFP) Pr esent
0 = LFP Disabled (Default)
1 = LFP Car d Pr esent ; PCI E di sabl ed
USB1
USB2
RESERVED
Car d Reader
MI NI CARD
BLUETOOTH
USB3
CAMERA
NEWCARD
RESERVED
RESERVED
RESERVED
PULL-DOWN 20K
PULL-DOWN 20K
GPIO49
PULL-UP 20K
ICH9M Functional Strap Definitions
ICH9 Integrated pull-up
and pull-down Resistors
SIGNAL Resistor Type/Value
HDA_BIT_CLK
HDA_RST#
HDA_SDIN[3:0]
HDA_SDOUT
HDA_SYNC
GNT[3:0]#/GPIO[55,53,51]
GPIO20
LDA[3:0]#/FHW[3:0]#
LDRQ[0]
PME#
PWRBTN#
SATALED#
LAN_RXD[2:0]
LDRQ[1]/GPIO23
TP[3]
SPKR
SPI_CS1#/GPIO58/CLGPIO6
USB[11:0][P,N]
SPI_MOSI
SPI_MISO
TACH_[3:0]
PULL-DOWN 20K
PULL-DOWN 15K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 15K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
Thi s si gnal shoul d not be pul l ed hi gh.
GNT1#/
GPI O51
ESI St r ap ( Ser ver Onl y)
ESI compat i bl e mode i s f or ser ver pl at f or ms onl y.
Thi s si gnal shoul d not be pul l ed l ow f or deskt op
and mobi l e.
GNT3#/
GPI O55
Top- Bl ock Swap
over r i de. Ri si ng Edge
of PWROK.
Sampl ed l ow: Top- Bl ock Swap mode ( i nver t s A16 f or
al l cycl es t ar get i ng FWH BI OS space) .
Not e: Sof t war e wi l l not be abl e t o cl ear t he
Top- Swap bi t unt i l t he syst emi s r eboot ed
wi t hout GNT3# bei ng pul l ed down.
GNT0#:
SPI _CS1#/
GPI O58
ICH9 EDS 642879 Rev.1.5 Montevina Platform Design guide 22339 Rev.0.5
CFG10 PCI E Loopback enabl e 0 = Enabl e ( Not e 3)
1 = Disable (Default)
CFG[ 13: 12] XOR/ ALL
NOTE:
1. Al l st r ap si gnal s ar e sampl ed wi t h r espect t o t he l eadi ng edge of t he ( G) MCH
Power OK ( PWROK) si gnal .
2. i TPM can be di sabl ed by a ' Sof t - St r ap' opt i on i n t he Fl ash- decr i pt or sect i on of
t he Fi r mwar e. Thi s ' Sof t - St r ap' i s act i vat ed onl y af t er enabl i ng i TPM vi a CFG6.
Onl y one of t he CFG10/ CFG12/ CFG13 st r aps can be enabl ed at any t i me.
CL_CLK[1:0]
CL_DATA[1:0]
CL_RST0#
DPRSLPVR/GPIO16
ENERGY_DETECT
HDA_DOCK_EN#/GPIO33
011 = FSB667
010 = FSB800
ot her s = Reser ved
CFG[ 4: 3]
CFG[ 15: 14]
CFG[ 18: 17]
00 = Reser ve
10 = XOR mode Enabl ed
01 = ALLZ mode Enabl e ( Not e 3)
11 = Disabled (Default)
CFG16 FSB Dynami c ODT 0 = Dynami c ODT Di sabl ed
1 = Dynamic ODT Enabled (Default) Boot BI OS Dest i nat i on
Sel ect i on 0: 1.
Cont r ol l abl e vi a Boot BI OS Dest i nat i on bi t
( Conf i g Regi st er s: Of f set 3410h: bi t 11: 10) .
GNT0# i s MSB, 01- SPI , 10- PCI , 11- LPC
SPI _MOSI I nt egr at ed TPM Enabl e,
Ri si ng Edge of CLPWROK.
Sampl e l ow: t he I nt egr at ed TPM wi l l be di sabl e.
Sampl e hi gh: t he MCH TPM enabl e st r ap i s sampl ed
l ow and t he TPM Di sabl e bi t i s cl ear , t he
I nt egr at ed TPM wi l l be enabl e.
GLAN_DOCK#
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
Pin Name
USB
USB Table PCIE Routing
LANE2
LANE3 LAN
MiniCard WLAN
GPI O49 DMI Ter mi nat i on
Vol t age. Ri si ng Edge
of CLPWROK.
The si gnal i s r equi r ed t o be l ow f or deskt op
appl i cat i ons and r equi r ed t o be hi gh f or mobi l e
appl i cat i ons.
Strap Description Configuration
0 = The i TPM Host I nt er f ace i s enabl ed ( Not e 2)
CFG[ 2: 0] FSB Fr equency Sel ect 000 = FSB1067
CFG8
Reser ved
CFG5 DMI x2 Sel ect 0 = DMI x2
1 = DMI x4 (Default)
LANE5 New Card
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_MCH_DREFCLK
NEWCARD_CLKREQ#
CLK_MCH_DREFCLK#
PCI2_TME
FSB
FSA
PCI2_TME
FSC
CLK_XTAL_OUT
27_SEL
27_SEL
ITP_EN
FSB
FSA
FSC
ITP_EN
CLK_XTAL_IN
CLK_PCIE_NEW
CLK_PCIE_NEW#
CLKREQ#_1
NEWCARD_CLKREQ#
MINI1_CLKREQ#
+3.3V_RUN 3D3V_S0_CK505
3D3V_S0_CK505_IO
3D3V_S0_CK505
3D3V_S0_CK505_IO 3D3V_S0_CK505
+3.3V_RUN
3D3V_S0_CK505
+3.3V_RUN
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK#
CLK_MCH_BCLK
MCH_SSCDREFCLK#
MCH_SSCDREFCLK
CLK_MCH_DREFCLK#
CLK_MCH_DREFCLK
NEWCARD_CLKREQ#
CLK_48M_ICH
H_STP_PCI#
H_STP_CPU#
ICH_SMBCLK
ICH_SMBDATA
CK_PWRGD
CLKSATAREQ#
CLKREQ#_B
PCLK_KBC
CLK_PCI_ICH
CLK_14M_ICH
CPU_BSEL2
CPU_BSEL1
CPU_BSEL0
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
CLK_PCIE_NEW#
CLK_PCIE_NEW
CLK_PCIE_ICH#
CLK_PCIE_ICH
CLK_MCH_3GPLL#
CLK_MCH_3GPLL
CLK_PCIE_SATA#
CLK_PCIE_SATA
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCLK_FWH
CLK_CPU_ITP#
CLK_CPU_ITP
CLK_48M_CARD
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
MINI1_CLKREQ#
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Clock Generator SLG8SP513VTR
Custom
4 59 Tuesday, August 11, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
GM45
PM45
PCI 2_TME Out put
0
1
Over cl ocki ng of CPU and SRC al l owed
Over cl ocki ng of CPU and SRC not al l owed
27_SEL PI N 20 PI N 21
I TP_EN Out put
0 SRC8
1 CPU_I TP
SSID = CLOCK
SEL1
FSB
SEL0
FSA
133M
100M
166M
800M
0 1
0
1
X
667M
200M
0 1
CPU
SEL2
FSC
FSB
0 1
0
1
0 1
1067M 266M
0 0 0
533M
Main source: 71.08513.003 (SLG8SP513VTR)
2nd source: 71.00875.C03 (RTM875N-606-VD-GRT)
3rd source:
Co-layout Ref: 71.09355.B03 (ICS9LPRS355BKLFT)
0 DOT96T DOT96C
1 SRCT0 SRCC0
A00.08/0910
A00.08/0910
A00.08/0922
SB
1 2 R196 33R2J -2-GP
DY
R196 33R2J -2-GP
DY
1 2 R204
0R0603-PAD
R204
0R0603-PAD
1 2 R193 10KR2J -3-GP R193 10KR2J -3-GP
1
2
C
2
1
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
2
1
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
2
1
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
2
1
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1 2 R190 33R2J -2-GP R190 33R2J -2-GP
1
2
C461
SC12P50V2J N-3GP
C461
SC12P50V2J N-3GP
1
2
R218
10KR2J -3-GP
DY
R218
10KR2J -3-GP
DY
1 2 R214 2K2R2J -2-GP R214 2K2R2J -2-GP
1
2
C
2
3
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
2
3
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
2
0
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
2
0
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
2
1
1
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
2
1
1
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1 2 R178 475R2F-L1-GP R178 475R2F-L1-GP
1
2
C
2
2
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
2
2
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
2
1
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
2
1
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
2
2
6
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
C
2
2
6
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
1
2
C
2
2
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
2
2
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
2
3
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
2
3
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
4
6
4
S
C
4
D
7
P
5
0
V
2
C
N
-
1
G
P
DY
C
4
6
4
S
C
4
D
7
P
5
0
V
2
C
N
-
1
G
P
DY
1 2 R186 10KR2J -3-GP R186 10KR2J -3-GP
1
2
C
2
3
3
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
2
3
3
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1 2
X3
X-14D31818M-37GP
X3
X-14D31818M-37GP
1
2
C
2
0
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
2
0
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
G
N
D
R
E
F
1
X2
2
X1
3
V
D
D
R
E
F
4
REF0/FSLC/TEST_SEL
5
SDATA
6
SCLK
7
PCI0/CR#_A
8
V
D
D
P
C
I
9
PCI1/CR#_B
10
PCI2/TME
11
PCI3
12
PCI4/27_SELECT
13
PCI_F5/ITP_EN
14
G
N
D
P
C
I
1
5
V
D
D
4
8
1
6
USB_48MHZ/FSLA
17
G
N
D
4
8
1
8
V
D
D
9
6
_
I
O
1
9
SRCT0/DOTT_96
20
SRCC0/DOTC_96
21
G
N
D
2
2
V
D
D
P
L
L
3
2
3
27MHZ_NONSS/SRCT1/SE1
24
27MHZ_SS/SRCC1/SE2
25
G
N
D
2
6
V
D
D
P
L
L
3
_
I
O
2
7
SRCT2/SATAT
28
SRCC2/SATAC
29
G
N
D
S
R
C
3
0
SRCT3/CR#_C
31
SRCC3/CR#_D
32
V
D
D
S
R
C
_
I
O
3
3
SRCT4
34
SRCC4
35
G
N
D
S
R
C
3
6
SRCT9
37
SRCC9
38
SRCC11/CR#_G
39
SRCT11/CR#_H
40
SRCT10
41
SRCC10
42
V
D
D
S
R
C
_
I
O
4
3
CPU_STOP#
44
PCI_STOP#
45
V
D
D
S
R
C
4
6
SRCC6
47
SRCT6
48
G
N
D
S
R
C
4
9
SRCC7/CR#_E
50
SRCT7/CR#_F
51
V
D
D
S
R
C
_
I
O
5
2
CPUC2_ITP/SRCC8
53
CPUT2_ITP/SRCT8
54
NC#55
55
V
D
D
C
P
U
_
I
O
5
6
CPUC1_F
57
CPUT1_F
58
G
N
D
C
P
U
5
9
CPUC0
60
CPUT0
61
V
D
D
C
P
U
6
2
CK_PWRGD/PD#
63
FSLB/TEST_MODE
64
G
N
D
6
5
U54
ICS9LPRS355BKLFT-GP-U
U54
ICS9LPRS355BKLFT-GP-U
1
2
C
2
3
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
2
3
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
2
4
3
S
C
4
D
7
P
5
0
V
2
C
N
-
1
G
P
DY
C
2
4
3
S
C
4
D
7
P
5
0
V
2
C
N
-
1
G
P
DY
1 2 R212 33R2J -2-GP R212 33R2J -2-GP
1 2 R217 22R2J -2-GP R217 22R2J -2-GP
1
2
E
C
5
7
S
C
2
2
P
5
0
V
2
J
N
-
4
G
P
E
C
5
7
S
C
2
2
P
5
0
V
2
J
N
-
4
G
P
1
2
R198
10KR2J -3-GP
R198
10KR2J -3-GP
1 2
R216
22R2J -2-GP
R216
22R2J -2-GP
1 2 R215 1KR2J -1-GP R215 1KR2J -1-GP
1 2
C245 SC4D7P50V2CN-1GP
DY
C245 SC4D7P50V2CN-1GP
DY
1 2 R195 10KR2J -3-GP R195 10KR2J -3-GP
1 2 R207 33R2J -2-GP R207 33R2J -2-GP
1
2
C
2
3
6
S
C
4
D
7
P
5
0
V
2
C
N
-
1
G
P
DY
C
2
3
6
S
C
4
D
7
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
C
4
6
3
S
C
4
D
7
P
5
0
V
2
C
N
-
1
G
P
DY
C
4
6
3
S
C
4
D
7
P
5
0
V
2
C
N
-
1
G
P
DY
1 2 R411 1KR2J -1-GP R411 1KR2J -1-GP
1 2 R200
0R0603-PAD
R200
0R0603-PAD
1
2
R206
10KR2J -3-GP
R206
10KR2J -3-GP
1
2
R202
10KR2J -3-GP
DY
R202
10KR2J -3-GP
DY
1
2
R209
10KR2J -3-GP
R209
10KR2J -3-GP
1
2
C462
SC12P50V2J N-3GP
C462
SC12P50V2J N-3GP
1
2
C
2
2
4
S
C
4
D
7
P
5
0
V
2
C
N
-
1
G
P
DY
C
2
2
4
S
C
4
D
7
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
C
2
3
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
2
3
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
EC140
SC47P50V2J N-3GP
DY
EC140
SC47P50V2J N-3GP
DY
1 2 R181 1KR2J -1-GP R181 1KR2J -1-GP
1 2 R412
0R0402-PAD
R412
0R0402-PAD
1
2
EC139
SC47P50V2J N-3GP
DY
EC139
SC47P50V2J N-3GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#[35..3]
ITP_TCK
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TDO
ITP_DBRESET#
ITP_BPM#5
RSVD_CPU_4
RSVD_CPU_1
RSVD_CPU_8
RSVD_CPU_5
RSVD_CPU_6
RSVD_CPU_7
RSVD_CPU_2
RSVD_CPU_3
H_A#35
H_A#33
RSVD_CPU_9
RSVD_CPU_10
H_A#18
H_A#20
H_A#21
H_A#22
H_A#17
H_A#19
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_RS#1
H_RS#0
H_RS#2
H_CPURST#
RSVD_CPU_11
H_A#34
H_A#32
CPU_IERR#
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
H_THERMDC
H_THERMDA
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
H_RS#[2..0]
H_ADSTB#1
H_FERR#
H_IGNNE#
H_A20M#
H_LOCK#
H_INIT#
H_ADS#
H_BNR#
H_DRDY#
H_DBSY#
H_BREQ#0
H_BPRI#
H_DEFER#
H_STPCLK#
H_INTR
H_NMI
H_SMI#
H_HIT#
H_HITM#
H_TRDY#
H_ADSTB#0
H_REQ#[4..0]
H_A#[35..3]
H_CPURST#
H_THRMTRIP#
CLK_CPU_BCLK
CLK_CPU_BCLK#
H_THERMDA
H_THERMDC
CPU_PROCHOT#
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_DBRESET#
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CPU-FSB(1/3)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CPU-FSB(1/3)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CPU-FSB(1/3)
Custom
<Core Design>
H_THRMTRI P# shoul d connect t o
I CH9 and MCH wi t hout T- i ng.
H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil
TEST7
62.10040.221
SSID = CPU
A00.08/0903
1 2 R50 0R2J -2-GP
DY
R50 0R2J -2-GP
DY
1
TP34 TP34
1
TP31 TP31
1
TP12 TP12
1
TP24 TP24
1 2 R47 56R2J -4-GP R47 56R2J -4-GP
1
TP30 TP30
1
TP23 TP23
1 2 R51 56R2J -4-GP R51 56R2J -4-GP
1
TP19 TP19
1
TP25 TP25
1
TP13 TP13
1
2
C49
SC2200P50V2KX-2GP
DY
C49
SC2200P50V2KX-2GP
DY
1
TP55 TP55
1
TP21 TP21
1 2 R76 56R2J -4-GP
DY
R76 56R2J -4-GP
DY
A3#
J 4
A4#
L5
A5#
L4
A6#
K5
A7#
M3
A8#
N2
A9#
J 1
A10#
N3
A11#
P5
A12#
P2
A13#
L2
A14#
P4
A15#
P1
A16#
R1
A20M#
A6
ADS#
H1
ADSTB0#
M1
REQ0#
K3
REQ1#
H2
REQ2#
K2
REQ3#
J 3
REQ4#
L1
A17#
Y2
A18#
U5
A19#
R3
A20#
W6
A21#
U4
A22#
Y5
A30#
U2
A24#
R4
A25#
T5
A26#
T3
A32#
W3
A28#
W5
A29#
Y4
A27#
W2
A31#
V4
A33#
AA4
A34#
AB2
A35#
AA3
FERR#
A5
IGNNE#
C4
RSVD#M4
M4
RSVD#N5
N5
RSVD#T2
T2
RSVD#V3
V3
RSVD#B2
B2
RSVD#C3
C3
BNR#
E2
BPRI#
G5
DEFER#
H5
DBSY#
E1
DRDY#
F21
BR0#
F1
IERR#
D20
INIT#
B3
LOCK#
H4
RS0#
F3
RS1#
F4
RS2#
G3
TRDY#
G2
HIT#
G6
HITM#
E4
BPM0#
AD4
BPM1#
AD3
BPM2#
AD1
BPM3#
AC4
PRDY#
AC2
PREQ#
AC1
TCK
AC5
TDI
AA6
TDO
AB3
TMS
AB5
TRST#
AB6
DBR#
C20
PROCHOT#
D21
THRMDA
A24
THERMTRIP#
C7
BCLK0
A22
BCLK1
A21
RSVD#D2
D2
RSVD#F6
F6
RSVD#D3
D3
RSVD#D22
D22
STPCLK#
D5
LINT0
C6
LINT1
B4
SMI#
A3
A23#
U1
ADSTB1#
V1
RESET#
C1
KEY_NC
B1
THRMDC
B25
1 OF 4
R
E
S
E
R
V
E
D
HCLK
THERMAL
A
D
D
R

G
R
O
U
P

1
X
D
P
/
I
T
P

S
I
G
N
A
L
S
C
O
N
T
R
O
L
A
D
D
R

G
R
O
U
P

0
I
C
H
U41A
BGA479-SKT6-GPU7
1 OF 4
R
E
S
E
R
V
E
D
HCLK
THERMAL
A
D
D
R

G
R
O
U
P

1
X
D
P
/
I
T
P

S
I
G
N
A
L
S
C
O
N
T
R
O
L
A
D
D
R

G
R
O
U
P

0
I
C
H
U41A
BGA479-SKT6-GPU7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#41
H_D#40
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
TEST1
TEST2
COMP0
COMP1
COMP2
COMP3
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
CPU_GTLREF0
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#48
H_D#49
H_D#51
H_D#50
H_D#52
H_D#53
H_D#54
H_D#55
H_D#57
H_D#56
H_D#58
H_D#59
H_D#60
H_D#61
H_D#63
H_D#62
H_D#[63..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_DINV#[3..0]
CPU_TEST3
CPU_TEST5
+1.05V_VCCP
H_DSTBN#2
H_DSTBP#2
H_DINV#2
H_DSTBN#3
H_DSTBP#3
H_DINV#3
H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGOOD
H_CPUSLP#
H_D#[63..0]
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_DSTBN#1
H_DSTBP#1
H_DINV#1
CPU_BSEL2
CPU_BSEL0
CPU_BSEL1
PSI#
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CPU-FSB(2/3)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CPU-FSB(2/3)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CPU-FSB(2/3)
Custom
<Core Design>
Layout Not e:
Comp0, 2 connect wi t h Zo=27. 4 ohm, make
t r ace l engt h shor t er t han 0. 5" .
Comp1, 3 connect wi t h Zo=55 ohm, make
t r ace l engt h shor t er t han 0. 5" .
Layout notes
Z= 55 Ohm 0.5" MAX for CPU_GTLREF0
Rout e t he CPU_TEST3 and CPU_TEST5 si gnal s
t hr ough a gr ound r ef er enced Zo = 55- ohmt r ace
t hat ends i n a vi a t hat i s near a GND vi a
and i s accessi bl e t hr ough an osci l l oscope connect i on.
62.10040.221
SSID = CPU
D16#
N22
D17#
K25
D18#
P26
D19#
R23
D20#
L23
D21#
M24
D22#
L22
D23#
M23
D24#
P25
D25#
P23
D26#
P22
D27#
T24
D28#
R24
D29#
L25
D30#
T25
D31#
N25
DINV0#
H25
DINV1#
N24
DSTBN0#
J 26
DSTBN1#
L26
DSTBP0#
H26
DSTBP1#
M26
D0#
E22
D1#
F24
D2#
E26
D3#
G22
D4#
F23
D5#
G25
D6#
E25
D7#
E23
D8#
K24
D9#
G24
D10#
J 24
D11#
J 23
D12#
H22
D13#
F26
D14#
K22
D15#
H23
D53#
AC26
D60#
AC22
D63#
AC23
GTLREF
AD26
TEST2
D25
BSEL0
B22
BSEL1
B23
BSEL2
C21
DINV2#
U22
D32#
Y22
D33#
AB24
D34#
V24
D35#
V26
D36#
V23
D38#
U25
D39#
U23
D40#
Y25
D41#
W22
D42#
Y23
D43#
W24
D44#
W25
D45#
AA23
D46#
AA24
D47#
AB25
DSTBP2#
AA26
DSTBN2#
Y26
D48#
AE24
D49#
AD24
D52#
AB21
D54#
AD20
D55#
AE22
D56#
AF23
D57#
AC25
D58#
AE21
D59#
AD21
D61#
AD23
DINV3#
AC20
DSTBN3#
AE25
D51#
AB22
D50#
AA21
D62#
AF22
COMP0
R26
COMP1
U26
DPRSTP#
E5
DPSLP#
B5
DPWR#
D24
PWRGOOD
D6
SLP#
D7
PSI#
AE6
TEST1
C23
TEST6
A26
TEST3
C24
TEST5
AF1
TEST4
AF26
D37#
T22
DSTBP3#
AF24
COMP2
AA1
COMP3
Y1
2 OF 4
D
A
T
A

G
R
P
0
D
A
T
A

G
R
P
1
D
A
T
A

G
R
P
2
D
A
T
A

G
R
P
3
MI SC
U41B
BGA479-SKT6-GPU7
2 OF 4
D
A
T
A

G
R
P
0
D
A
T
A

G
R
P
1
D
A
T
A

G
R
P
2
D
A
T
A

G
R
P
3
MI SC
U41B
BGA479-SKT6-GPU7
1 2 R53 1KR2J -1-GP
DY
R53 1KR2J -1-GP
DY 1
2
R354
2KR2F-3-GP
R354
2KR2F-3-GP
1 2 R350 27D4R2F-L1-GP R350 27D4R2F-L1-GP
1 2 R60 1KR2J -1-GP
DY
R60 1KR2J -1-GP
DY
1 2 R7 1KR2J -1-GP
DY
R7 1KR2J -1-GP
DY
1 2 R58 1KR2J -1-GP
DY
R58 1KR2J -1-GP
DY
1 2 R349 54D9R2F-L1-GP R349 54D9R2F-L1-GP
1
2
C376
SC1KP50V2KX-1GP
DY
C376
SC1KP50V2KX-1GP
DY
1 2 R14 27D4R2F-L1-GP R14 27D4R2F-L1-GP
1 2 R13 54D9R2F-L1-GP R13 54D9R2F-L1-GP
1
2
R357
1KR2F-3-GP
R357
1KR2F-3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU_VID6
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_GND3
CPU_GND2
CPU_GND4
CPU_GND1
+VCC_CORE
+1.5V_RUN +1.5V_VCCA
+1.05V_VCCP
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
CPU_VID[6..0]
VCC_SENSE
VSS_SENSE
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CPU-Power(3/3)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CPU-Power(3/3)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CPU-Power(3/3)
Custom
<Core Design>
layout note: "+1.5V_VCCA"
as short as possible
VCC_SENSE and VSS_SENSE l i nes
shoul d be of equal l engt h.
Layout Not e:
Pl ace as cl ose as possi bl e
t o t he CPU VCCA pi n.
NCTF
PI N
62.10040.221
62.10040.221
SSID = CPU
1
2
C
3
6
5
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
3
6
5
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
2
C10
SC22U6D3V5MX-2GP
C10
SC22U6D3V5MX-2GP
1
2
C
3
6
7
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
3
6
7
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
2
C
3
6
8
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
3
6
8
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
C
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
4
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C377
SC10U6D3V5MX-3GP
C377
SC10U6D3V5MX-3GP
1
2
C
4
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 R311 100R2F-L1-GP-U R311 100R2F-L1-GP-U
1
2
C
1
1
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
1
1
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
VSS
AF2
VSS
A4
VSS
A8
VSS
A11
VSS
A14
VSS
A16
VSS
A19
VSS
A23
VSS
B6
VSS
B8
VSS
B11
VSS
B13
VSS
B16
VSS
B19
VSS
B21
VSS
B24
VSS
C5
VSS
C8
VSS
C11
VSS
C14
VSS
C16
VSS
C19
VSS
C2
VSS
C22
VSS
C25
VSS
D1
VSS
D4
VSS
D8
VSS
D11
VSS
D13
VSS
D16
VSS
D19
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E11
VSS
E14
VSS
E16
VSS
E19
VSS
E21
VSS
E24
VSS
F5
VSS
F8
VSS
F11
VSS
F13
VSS
F16
VSS
F19
VSS
F2
VSS
F22
VSS
F25
VSS
G4
VSS
G1
VSS
G23
VSS
G26
VSS
H3
VSS
H6
VSS
H21
VSS
H24
VSS
J 2
VSS
J 5
VSS
J 22
VSS
J 25
VSS
K1
VSS
K4
VSS
K23
VSS
K26
VSS
L3
VSS
L6
VSS
L21
VSS
L24
VSS
M2
VSS
M5
VSS
M22
VSS
M25
VSS
N1
VSS
N4
VSS
N23
VSS
N26
VSS
P3
VSS
P6
VSS
P21
VSS
P24
VSS
R2
VSS
R5
VSS
R22
VSS
R25
VSS
T1
VSS
T4
VSS
T23
VSS
T26
VSS
U3
VSS
U6
VSS
U21
VSS
U24
VSS
V2
VSS
V5
VSS
V22
VSS
V25
VSS
W1
VSS
W4
VSS
W23
VSS
W26
VSS
Y3
VSS
Y6
VSS
Y21
VSS
Y24
VSS
AA2
VSS
AA5
VSS
AA8
VSS
AA11
VSS
AA14
VSS
AA16
VSS
AA19
VSS
AA22
VSS
AA25
VSS
AB1
VSS
AB4
VSS
AB8
VSS
AB11
VSS
AB13
VSS
AB16
VSS
AB19
VSS
AB23
VSS
AB26
VSS
AC3
VSS
AC6
VSS
AC8
VSS
AC11
VSS
AC14
VSS
AC16
VSS
AC19
VSS
AC21
VSS
AC24
VSS
AD2
VSS
AD5
VSS
AD8
VSS
AD11
VSS
AD13
VSS
AD16
VSS
AD19
VSS
AD22
VSS
AD25
VSS
AE1
VSS
AE4
VSS
AE8
VSS
AE11
VSS
AE14
VSS
AE16
VSS
AE19
VSS
AE23
VSS
AE26
VSS
A2
VSS
AF6
VSS
AF8
VSS
AF11
VSS
AF13
VSS
AF16
VSS
AF19
VSS
AF21
VSS
A25
VSS
AF25
4 OF 4 U41D
BGA479-SKT6-GPU7
4 OF 4 U41D
BGA479-SKT6-GPU7
1
2
C
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
3
6
3
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
3
6
3
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
C
3
0
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
3
0
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
C
3
5
7
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
3
5
7
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
C
3
3
8
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
3
3
8
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
C
1
5
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
1
5
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1 2 R302 100R2F-L1-GP-U R302 100R2F-L1-GP-U
1
2
C
1
4
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
1
4
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
C
6
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
6
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
2
C
3
4
0
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
3
4
0
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
TP10 TP10
1
TP56 TP56
1
2
C
5
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
5
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
2
C
3
7
0
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
3
7
0
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
2
C
3
4
4
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
3
4
4
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
C374
SCD01U16V2KX-3GP
C374
SCD01U16V2KX-3GP
1
2
C
3
1
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
3
1
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
2
C8
SCD1U10V2KX-4GP
C8
SCD1U10V2KX-4GP
1
2
C
1
7
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
1
7
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
VCC
A7
VCC
A9
VCC
AC10
VCC
A10
VCC
A12
VCC
A13
VCC
A15
VCC
A17
VCC
A18
VCC
A20
VCC
B7
VCC
B9
VCC
B10
VCC
B12
VCC
B14
VCC
B15
VCC
B17
VCC
B18
VCC
B20
VCC
C9
VCC
C10
VCC
C12
VCC
C13
VCC
C15
VCC
C17
VCC
C18
VCC
D9
VCC
D10
VCC
D12
VCC
D14
VCC
D15
VCC
D17
VCC
D18
VCC
E7
VCC
E9
VCC
E10
VCC
E12
VCC
E13
VCC
E15
VCC
AA7
VCC
AA9
VCC
AA10
VCC
AA12
VCC
AA13
VCC
AA15
VCC
AA17
VCC
AA18
VCC
AA20
VCC
AB9
VCC
AB12
VCC
AB14
VCC
AB15
VCC
AB17
VCC
AB18
VCC
E17
VCC
E18
VCC
E20
VCC
F7
VCC
F9
VCC
F10
VCC
F12
VCC
F14
VCC
F15
VCC
F17
VCC
F18
VCC
F20
VCC
AB20
VCC
AB7
VCC
AC7
VCC
AC9
VCC
AC12
VCC
AC13
VCC
AC15
VCC
AC17
VCC
AC18
VCC
AD7
VCC
AD9
VCC
AD10
VCC
AD12
VCC
AD14
VCC
AD15
VCC
AD17
VCC
AD18
VCC
AE9
VCC
AE10
VCC
AE12
VCC
AE13
VCC
AE15
VCC
AE17
VCC
AE18
VCC
AE20
VCC
AF9
VCC
AF10
VCC
AF12
VCC
AF14
VCC
AF15
VCC
AF17
VCC
AF18
VCC
AF20
VCCP
G21
VCCP
J 6
VCCP
J 21
VCCP
K6
VCCP
K21
VCCP
M6
VCCP
M21
VCCP
N6
VCCP
N21
VCCP
R6
VCCP
R21
VCCP
T6
VCCP
T21
VCCP
V6
VCCP
V21
VCCP
W21
VCCA
B26
VCCA
C26
VID0
AD6
VID6
AE2
VID4
AE3
VID2
AE5
VID5
AF3
VID3
AF4
VID1
AF5
VSSSENSE
AE7
VCCSENSE
AF7
VCC
AB10
3 OF 4 U41C
BGA479-SKT6-GPU7
3 OF 4 U41C
BGA479-SKT6-GPU7
1
2
C
2
9
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
2
9
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
T
C
1
7
S
T
2
2
0
U
2
D
5
V
B
M
-
L
G
P
DY
T
C
1
7
S
T
2
2
0
U
2
D
5
V
B
M
-
L
G
P
DY
1
2
C
3
6
6
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
3
6
6
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
C
3
4
7
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
3
4
7
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
C
2
6
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
2
6
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
2
C
1
2
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
1
2
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
C
1
3
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
1
3
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
2
C
3
5
2
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
3
5
2
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
TP20 TP20
1
2
C336
SC22U6D3V5MX-2GP
C336
SC22U6D3V5MX-2GP
1
2
C
3
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
3
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
2
C
3
2
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
3
2
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1 2 R356
0R0603-PAD
R356
0R0603-PAD
1
2
C
3
5
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
3
5
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
TP224 TP224
1
2
C
4
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C24
SC22U6D3V5MX-2GP
C24
SC22U6D3V5MX-2GP
1
2
C
2
5
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
2
5
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
2
C
3
6
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
3
6
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_D#[63..0]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_AVREF
H_RCOMP
H_SWING
H_SWING
H_RCOMP
H_DINV#0
H_RS#1
H_DSTBN#0
H_REQ#2
H_DSTBP#0
H_REQ#4
H_REQ#3
H_RS#0
H_DINV#3
H_DSTBN#3
H_DSTBP#3
H_REQ#1
H_DINV#2
H_DSTBN#2
H_DSTBP#2
H_REQ#0
H_DINV#1
H_RS#2
H_DSTBN#[3..0]
H_DSTBN#1
H_DSTBP#[3..0]
H_DSTBP#1
H_DINV#[3..0]
H_A#6
H_A#16
H_A#34
H_A#32
H_A#22
H_A#20
H_A#26
H_A#11
H_A#5
H_A#31
H_A#3
H_A#9
H_A#15
H_A#21
H_A#19
H_A#25
H_A#4
H_A#30
H_A#29
H_A#8
H_A#14
H_A#18
H_A#24
H_A#28
H_A#7
H_A#13
H_A#17
H_A#12
H_A#35
H_A#33
H_A#23
H_A#27
H_A#10
H_A#[35..3]
H_REQ#[4..0]
H_RS#[2..0]
+1.05V_VCCP
+1.05V_VCCP
H_D#[63..0]
H_CPURST#
H_CPUSLP#
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_REQ#[4..0]
H_RS#[2..0]
H_BNR#
H_BREQ#0
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_DBSY#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_BPRI#
H_DEFER#
H_DPWR#
H_TRDY#
H_A#[35..3]
CLK_MCH_BCLK
CLK_MCH_BCLK#
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cantiga-HOST(1/6)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cantiga-HOST(1/6)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cantiga-HOST(1/6)
Custom
<Core Design>
Place R51 near to the chip ( < 0.5")
H_RCOMP routing Trace width and
Spacing use 10 / 20 mil
H_SWING routing Trace width and
Spacing use 10 / 20 mil
H_SWING Resistors and
Capacitors close MCH
500 mil ( MAX )
SSID = MCH
1
2
R372
2KR2F-3-GP
R372
2KR2F-3-GP
1
2
R369
1KR2F-3-GP
R369
1KR2F-3-GP
1
2
R367
100R2F-L1-GP-U
R367
100R2F-L1-GP-U
1 2
R361 24D9R2F-L-GP R361 24D9R2F-L-GP
H_A#_10
P16
H_A#_11
R16
H_A#_12
N17
H_A#_13
M13
H_A#_14
E17
H_A#_15
P17
H_A#_16
F17
H_A#_17
G20
H_A#_18
B19
H_A#_19
J 16
H_A#_20
E20
H_A#_21
H16
H_A#_22
J 20
H_A#_23
L17
H_A#_24
A17
H_A#_25
B17
H_A#_26
L16
H_A#_27
C21
H_A#_28
J 17
H_A#_29
H20
H_A#_3
A14
H_A#_30
B18
H_A#_31
K17
H_A#_4
C15
H_A#_5
F16
H_A#_6
H13
H_A#_7
C18
H_A#_8
M16
H_A#_9
J 13
H_ADS#
H12
H_ADSTB#_0
B16
H_ADSTB#_1
G17
H_BNR#
A9
H_BPRI#
F11
H_BREQ#
G12
HPLL_CLK#
AH6
H_CPURST#
C12
HPLL_CLK
AH7
H_D#_0
F2
H_REQ#_2
F13
H_REQ#_3
B13
H_D#_1
G8
H_D#_10
M9
H_D#_20
L6
H_D#_30
N10
H_D#_40
AA8
H_D#_50
AA2
H_D#_60
AE11
H_D#_8
D4
H_D#_9
H3
H_DBSY#
B10
H_D#_11
M11
H_D#_12
J 1
H_D#_13
J 2
H_D#_14
N12
H_D#_15
J 6
H_D#_16
P2
H_D#_17
L2
H_D#_18
R2
H_D#_19
N9
H_D#_2
F8
H_D#_21
M5
H_D#_22
J 3
H_D#_23
N2
H_D#_24
R1
H_D#_25
N5
H_D#_26
N6
H_D#_27
P13
H_D#_28
N8
H_D#_29
L7
H_D#_3
E6
H_D#_31
M3
H_D#_32
Y3
H_D#_33
AD14
H_D#_34
Y6
H_D#_35
Y10
H_D#_36
Y12
H_D#_37
Y14
H_D#_38
Y7
H_D#_39
W2
H_D#_4
G2
H_D#_41
Y9
H_D#_42
AA13
H_D#_43
AA9
H_D#_44
AA11
H_D#_45
AD11
H_D#_46
AD10
H_D#_47
AD13
H_D#_48
AE12
H_D#_49
AE9
H_D#_5
H6
H_D#_51
AD8
H_D#_52
AA3
H_D#_53
AD3
H_D#_54
AD7
H_D#_55
AE14
H_D#_56
AF3
H_D#_57
AC1
H_D#_58
AE3
H_D#_59
AC3
H_D#_6
H2
H_D#_61
AE8
H_D#_62
AG2
H_D#_63
AD6
H_D#_7
F6
H_DEFER#
E9
H_DINV#_0
J 8
H_DINV#_1
L3
H_DINV#_2
Y13
H_DINV#_3
Y1
H_DPWR#
J 11
H_DRDY#
F9
H_DSTBN#_0
L10
H_DSTBN#_1
M7
H_DSTBN#_2
AA5
H_DSTBN#_3
AE6
H_DSTBP#_0
L9
H_DSTBP#_1
M8
H_DSTBP#_2
AA6
H_DSTBP#_3
AE5
H_AVREF
A11
H_DVREF
B11
H_TRDY#
C9
H_HIT#
H9
H_HITM#
E12
H_LOCK#
H11
H_REQ#_0
B15
H_REQ#_1
K13
H_REQ#_4
B14
H_A#_32
B20
H_A#_33
F21
H_A#_34
K21
H_A#_35
L20
H_SWING
C5
H_CPUSLP#
E11
H_RCOMP
E3
H_RS#_0
B6
H_RS#_1
F12
H_RS#_2
C8
H
O
S
T
1 OF 10 U52A
CANTIGA-GM-GP-U-NF
H
O
S
T
1 OF 10 U52A
CANTIGA-GM-GP-U-NF
1
2
R368
221R2F-2-GP
R368
221R2F-2-GP
1
2
C403
SCD1U16V2KX-3GP
DY
C403
SCD1U16V2KX-3GP
DY
1
2
C399
SCD1U10V2KX-4GP
C399
SCD1U10V2KX-4GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DMI_TXP3
DMI_RXN3
DMI_TXN2
DMI_TXN1
DMI_TXN0
TSATN#
DMI_TXN3
DMI_RXP3
DMI_RXP2
DMI_RXP1
DMI_RXP0
DMI_TXP2
DMI_TXP1
DMI_TXP0
DMI_RXN2
DMI_RXN1
DMI_RXN0
SM_RCOMP_VOH
SM_RCOMP_VOL
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG16
CFG18
CFG20
CFG19
MCH_CLVREF
SM_REXT
RSTIN#
CFG13
CFG18
M_RCOMPP
M_RCOMPN
CFG7
CFG9
CFG8
CFG5
CFG16
CFG11
CFG10
CFG12
CFG19
CFG6
PM_EXTTS#1
PM_EXTTS#0
TSATN#_KBC
TSATN#
SM_RCOMP_VOH
SM_RCOMP_VOL
CLK_MCH_3GPLL#
CLK_MCH_3GPLL
CLK_MCH_DREFCLK#
CLK_MCH_DREFCLK
MCH_SSCDREFCLK#
MCH_SSCDREFCLK
CLKREQ#_B
CFG3
CFG4
CFG14
CFG15
CFG17
CFG20
+1.8V_SUS
+1.05V_VCCP
+3.3V_RUN
+3.3V_RUN +1.05V_VCCP
+1.8V_SUS
+1.8V_SUS
+V_DDR_MCH_REF
+3.3V_RUN
DMI_RXN0
DMI_TXN0
DMI_TXN1
DMI_TXP1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP2
DMI_TXP3
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP2
DMI_RXP3
DMI_RXP1
MCH_CLKSEL1
MCH_CLKSEL2
MCH_CLKSEL0
M_CLK_DDR#2
M_CLK_DDR#3
M_CLK_DDR0
M_CLK_DDR1
M_CKE0
M_CKE1
M_CKE2
M_CKE3
M_CLK_DDR2
M_CLK_DDR3
M_CS1#
M_CS2#
M_CS3#
M_CS0#
M_CLK_DDR#0
M_CLK_DDR#1
M_ODT0
M_ODT1
M_ODT2
M_ODT3
CL_CLK0
CL_DATA0
H_DPRSTP#
PM_SYNC#
PLT_RST#
PM_PWROK
DPRSLPVR
H_THRMTRIP#
MCH_ICH_SYNC#
PM_EXTTS#0
PM_EXTTS#1
TSATN#_KBC
M_PWROK
CL_RST#0
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_MCH_DREFCLK
CLK_MCH_DREFCLK#
MCH_SSCDREFCLK
MCH_SSCDREFCLK#
CLKREQ#_B
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cantiga-DMI/CFG(2/6)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
FSB setting
MCH_CLVREF ~= 0.35V
SDVO/iHDMI/DP
interface disabled
SDVO/iHDMI/DP
interface enabled
DDPC_CTRLDATA
TLS cipher suite with
confidentiality
CFG 16 FSB dynamic ODT disable
CFG Strap High Low
DMI X 2
CFG 9 PCIE GFX lane reversed
CFG 19
DMI Lane Reserved
DMI X 4
Normal operation Reverse DMI lanes
ITPM enable
Only PCIE or SDVO
is operational
ITPM disable
CFG 20
SDVO concurrent
with PCIE
PCIE and SDVO are
operatiing simultaneously
via the PEG port
SDVO_CTRLDATA
CFG 5
CFG 6
SDVO interface disable
CFG 7
TLS cipher suite with
no confidentiality
FSB Dynamic ODT enable
CFG 10 PCIE loopback enable PCIE loopback disable
CFG 12 ALLZ mode enable ALLZ mode disable
CFG 13 XOR mode enable XOR mode disable
PCIE GFX lane
numbered in oder
SDVO interface enable
L_DDC_DATA LFP disable LFP card present
SSID = MCH
*is current setting
*
*
*
*
*
*
*
*
*
*
*
*
*
-3
2009/07/27
1 2 R105 2K21R2F-GP
DY
R105 2K21R2F-GP
DY
1
2
C94
SC100P50V2J N-3GP
DY
C94
SC100P50V2J N-3GP
DY
1 2 R111 2K21R2F-GP
DY
R111 2K21R2F-GP
DY
1
2
R116
3K01R2F-3-GP
R116
3K01R2F-3-GP
1 2
R94
100R2J -2-GP
R94
100R2J -2-GP
1 TP271 TP271
1
2
R145
10KR2J -3-GP
DY
R145
10KR2J -3-GP
DY
1 2 R101 2K21R2F-GP
DY
R101 2K21R2F-GP
DY
1
2
R371
10KR2J -3-GP
DY
R371
10KR2J -3-GP
DY
1
TP84 TP84
1
2
C162
SCD01U16V2KX-3GP
C162
SCD01U16V2KX-3GP
1 2
R142
10KR2J -3-GP
DY
R142
10KR2J -3-GP
DY
1 2 R128 2K21R2F-GP
DY
R128 2K21R2F-GP
DY
1
TP85 TP85
1 2 R375 2K21R2F-GP
DY
R375 2K21R2F-GP
DY
1
2
R377
80D6R2F-L-GP
R377
80D6R2F-L-GP
1 2 R112 2K21R2F-GP
DY
R112 2K21R2F-GP
DY
1
2
R380
80D6R2F-L-GP
R380
80D6R2F-L-GP
1
2
R130
499R2F-2-GP
R130
499R2F-2-GP
1 2 R117 4K02R2F-GP
DY
R117 4K02R2F-GP
DY
1 2 R121 4K02R2F-GP
DY
R121 4K02R2F-GP
DY
1 2
R131
10KR2J -3-GP
R131
10KR2J -3-GP
1
2
C145
SC2D2U10V3KX-1GP
C145
SC2D2U10V3KX-1GP
1 2 R382 4K02R2F-GP
DY
R382 4K02R2F-GP
DY
C
B
E
Q19
MMBT3904WT1G-GP
DY
Q19
MMBT3904WT1G-GP
DY
SA_CK_0
AP24
SA_CK_1
AT21
SB_CK_0
AV24
SA_CK#_0
AR24
SA_CK#_1
AR21
SB_CK#_0
AU24
SA_CKE_0
BC28
SA_CKE_1
AY28
SB_CKE_0
AY36
SB_CKE_1
BB36
SA_CS#_0
BA17
SA_CS#_1
AY16
SB_CS#_0
AV16
SB_CS#_1
AR13
SM_DRAMRST#
BC36
SA_ODT_0
BD17
SA_ODT_1
AY17
SB_ODT_0
BF15
SB_ODT_1
AY13
SM_RCOMP
BG22
SM_RCOMP#
BH21
CFG_18
P29
CFG_19
R28
CFG_2
P25
CFG_0
T25
CFG_1
R25
CFG_20
T28
CFG_3
P20
CFG_4
P24
CFG_5
C25
CFG_6
N24
CFG_7
M24
CFG_8
E21
CFG_9
C23
CFG_10
C24
CFG_11
N21
CFG_12
P21
CFG_13
T21
CFG_14
R20
CFG_15
M20
CFG_16
L21
CFG_17
H21
PM_SYNC#
R29
PM_EXT_TS#_0
N33
PM_EXT_TS#_1
P32
PWROK
AT40
RSTIN#
AT11
DPLL_REF_CLK
B38
DPLL_REF_CLK#
A38
DPLL_REF_SSCLK
E41
DPLL_REF_SSCLK#
F41
DMI_RXN_0
AE41
DMI_RXN_1
AE37
DMI_RXN_2
AE47
DMI_RXN_3
AH39
DMI_RXP_0
AE40
DMI_RXP_1
AE38
DMI_RXP_2
AE48
DMI_RXP_3
AH40
DMI_TXN_0
AE35
DMI_TXN_1
AE43
DMI_TXN_2
AE46
DMI_TXN_3
AH42
DMI_TXP_0
AD35
DMI_TXP_1
AE44
DMI_TXP_2
AF46
DMI_TXP_3
AH43
RESERVED#AL34
AL34
RESERVED#AN35
AN35
RESERVED#AK34
AK34
RESERVED#AM35
AM35
RESERVED#BG23
BG23
RESERVED#BF23
BF23
RESERVED#BH18
BH18
RESERVED#BF18
BF18
PM_DPRSTP#
B7
SB_CK_1
AU20
SB_CK#_1
AV20
RESERVED#AY21
AY21
RESERVED#AH9
AH9
RESERVED#AH10
AH10
RESERVED#AH12
AH12
RESERVED#AH13
AH13
RESERVED#M36
M36
RESERVED#N36
N36
RESERVED#R33
R33
RESERVED#T33
T33
GFX_VID_0
B33
GFX_VID_1
B32
GFX_VID_2
G33
GFX_VID_3
F33
GFX_VR_EN
C34
SM_RCOMP_VOH
BF28
SM_RCOMP_VOL
BH28
THERMTRIP#
T20
DPRSLPVR
R32
RESERVED#K12
K12
CL_CLK
AH37
CL_DATA
AH36
CL_PWROK
AN36
CL_RST#
AJ 35
CL_VREF
AH34
NC#A47
A47
NC#BG48
BG48
NC#BF48
BF48
NC#BD48
BD48
NC#BC48
BC48
NC#BH47
BH47
NC#BG47
BG47
NC#BE47
BE47
NC#BH46
BH46
NC#BF46
BF46
NC#BG45
BG45
NC#BH44
BH44
NC#BH43
BH43
NC#BH6
BH6
NC#BH5
BH5
NC#BG4
BG4
SDVO_CTRLCLK
G36
SDVO_CTRLDATA
E36
CLKREQ#
K36
RESERVED#T24
T24
ICH_SYNC#
H36
TSATN#
B12
PEG_CLK#
E43
PEG_CLK
F43
NC#BH3
BH3
GFX_VID_4
E33
RESERVED#B31
B31
DDPC_CTRLCLK
N28
NC#BF3
BF3
NC#BH2
BH2
NC#BG2
BG2
NC#BE2
BE2
NC#BG1
BG1
NC#BF1
BF1
NC#BD1
BD1
NC#BC1
BC1
NC#F1
F1
SM_VREF
AV42
SM_PWROK
AR36
SM_REXT
BF17
RESERVED#M1
M1
HDA_BCLK
B28
HDA_RST#
B30
HDA_SDI
B29
HDA_SDO
C29
HDA_SYNC
A28
DDPC_CTRLDATA
M28
RESERVED#B2
B2
P
M
M
I
S
C
N
C
D
D
R

C
L
K
/

C
O
N
T
R
O
L
/
C
O
M
P
E
N
S
A
T
I
O
N
C
L
K
D
M
I
C
F
G
R
S
V
D
G
R
A
P
H
I
C
S

V
I
D
M
E
H
D
A
2 OF 10 U52B
CANTIGA-GM-GP-U-NF
P
M
M
I
S
C
N
C
D
D
R

C
L
K
/

C
O
N
T
R
O
L
/
C
O
M
P
E
N
S
A
T
I
O
N
C
L
K
D
M
I
C
F
G
R
S
V
D
G
R
A
P
H
I
C
S

V
I
D
M
E
H
D
A
2 OF 10 U52B
CANTIGA-GM-GP-U-NF
1
2
R119
1KR2F-3-GP
R119
1KR2F-3-GP
1
TP86 TP86
1
TP87 TP87
1
2
R122
1KR2F-3-GP
R122
1KR2F-3-GP
1
2 3
4
RN20
SRN10KJ -5-GP
RN20
SRN10KJ -5-GP
1
2
C159
SC2D2U10V3KX-1GP
C159
SC2D2U10V3KX-1GP
1
TP88 TP88
1 2 R383 2K21R2F-GP
DY
R383 2K21R2F-GP
DY
1
2
R370
56R2J -4-GP
R370
56R2J -4-GP
1 2 R103 2K21R2F-GP
DY
R103 2K21R2F-GP
DY
1
2
C
1
7
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
1
7
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 R374 499R2F-2-GP R374 499R2F-2-GP
1 2 R104 2K21R2F-GP
DY
R104 2K21R2F-GP
DY
1
2
R126
1KR2F-3-GP
R126
1KR2F-3-GP
1 2 R102 2K21R2F-GP
DY
R102 2K21R2F-GP
DY
1
2
C151
SCD01U16V2KX-3GP
C151
SCD01U16V2KX-3GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQS#3
M_A_DQS#0
M_A_DQS#6
M_A_DQS#4
M_A_DQS#1
M_A_DQS#2
M_A_DQS#5
M_A_DQS#7
M_A_A0
M_A_A6
M_A_A3
M_A_A5
M_A_A7
M_A_A1
M_A_A2
M_A_A4
M_A_A10
M_A_A8
M_A_A13
M_A_A11
M_A_A9
M_A_A12
M_A_DQS#[7..0]
M_A_A[14..0]
M_A_DM[7..0]
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS[7..0]
M_A_DQS5
M_A_DQS7
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS0
M_A_DQS1
M_A_DQS6
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ15
M_B_DQ13
M_B_DQ12
M_B_DQ14
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ23
M_B_DQ21
M_B_DQ20
M_B_DQ22
M_B_DQ28
M_B_DQ26
M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ24
M_B_DQ27
M_B_DQ30
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ39
M_B_DQ37
M_B_DQ36
M_B_DQ38
M_B_DQ44
M_B_DQ42
M_B_DQ45
M_B_DQ41
M_B_DQ47
M_B_DQ40
M_B_DQ43
M_B_DQ46
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ55
M_B_DQ53
M_B_DQ52
M_B_DQ54
M_B_DQ60
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ63
M_B_DQ56
M_B_DQ59
M_B_DQ62
M_B_DQ[63..0]
M_A_DQ44
M_A_DQ36
M_A_DQ47
M_A_DQ40
M_A_DQ39
M_A_DQ37
M_A_DQ35
M_A_DQ34
M_A_DQ59
M_A_DQ54
M_A_DQ53
M_A_DQ63
M_A_DQ60
M_A_DQ61
M_A_DQ58
M_A_DQ51
M_A_DQ48
M_A_DQ57
M_A_DQ55
M_A_DQ49
M_A_DQ50
M_A_DQ62
M_A_DQ52
M_A_DQ56
M_A_DQ[63..0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ7
M_A_DQ5
M_A_DQ4
M_A_DQ6
M_A_DQ12
M_A_DQ10
M_A_DQ13
M_A_DQ9
M_A_DQ8
M_A_DQ11
M_A_DQ15
M_A_DQ14
M_A_DQ27
M_A_DQ25
M_A_DQ20
M_A_DQ19
M_A_DQ30
M_A_DQ18
M_A_DQ16
M_A_DQ28
M_A_DQ17
M_A_DQ26
M_A_DQ31
M_A_DQ29
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ21
M_A_DQ46
M_A_DQ42
M_A_DQ38
M_A_DQ32
M_A_DQ45
M_A_DQ33
M_A_DQ43
M_A_DQ41
M_B_DQS#[7..0]
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS[7..0]
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A12
M_B_A9
M_B_A11
M_B_A13
M_B_A8
M_B_A10
M_B_A[14..0]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_DM[7..0]
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_A_A14
M_B_A14
M_A_DQS#[7..0]
M_A_DQS[7..0]
M_A_A[14..0]
M_A_DM[7..0]
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CAS#
M_B_RAS#
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CAS#
M_B_DQ[63..0]
M_A_RAS#
M_A_DQ[63..0]
M_B_DQS#[7..0]
M_B_DQS[7..0]
M_B_A[14..0]
M_B_DM[7..0]
M_A_WE#
M_B_WE#
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cantiga-DDR(3/6)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cantiga-DDR(3/6)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cantiga-DDR(3/6)
Custom
<Core Design>
SSID = MCH
SB_DQ_0
AK47
SB_DQ_1
AH46
SB_DQ_10
BA48
SB_DQ_11
AY48
SB_DQ_12
AT47
SB_DQ_13
AR47
SB_DQ_14
BA47
SB_DQ_15
BC47
SB_DQ_16
BC46
SB_DQ_17
BC44
SB_DQ_18
BG43
SB_DQ_19
BF43
SB_DQ_2
AP47
SB_DQ_20
BE45
SB_DQ_21
BC41
SB_DQ_22
BF40
SB_DQ_23
BF41
SB_DQ_24
BG38
SB_DQ_25
BF38
SB_DQ_26
BH35
SB_DQ_27
BG35
SB_DQ_28
BH40
SB_DQ_29
BG39
SB_DQ_3
AP46
SB_DQ_30
BG34
SB_DQ_31
BH34
SB_DQ_32
BH14
SB_DQ_33
BG12
SB_DQ_34
BH11
SB_DQ_35
BG8
SB_DQ_36
BH12
SB_DQ_37
BF11
SB_DQ_38
BF8
SB_DQ_39
BG7
SB_DQ_4
AJ 46
SB_DQ_40
BC5
SB_DQ_41
BC6
SB_DQ_42
AY3
SB_DQ_43
AY1
SB_DQ_44
BF6
SB_DQ_45
BF5
SB_DQ_46
BA1
SB_DQ_47
BD3
SB_DQ_48
AV2
SB_DQ_49
AU3
SB_DQ_5
AJ 48
SB_DQ_50
AR3
SB_DQ_51
AN2
SB_DQ_52
AY2
SB_DQ_53
AV1
SB_DQ_54
AP3
SB_DQ_55
AR1
SB_DQ_56
AL1
SB_DQ_57
AL2
SB_DQ_58
AJ 1
SB_DQ_59
AH1
SB_DQ_6
AM48
SB_DQ_60
AM2
SB_DQ_61
AM3
SB_DQ_62
AH3
SB_DQ_63
AJ 3
SB_DQ_7
AP48
SB_DQ_8
AU47
SB_DQ_9
AU46
SB_BS_0
BC16
SB_BS_1
BB17
SB_BS_2
BB33
SB_CAS#
BG16
SB_DM_0
AM47
SB_DM_1
AY47
SB_DM_2
BD40
SB_DM_3
BF35
SB_DM_4
BG11
SB_DM_5
BA3
SB_DM_6
AP1
SB_DM_7
AK2
SB_DQS_0
AL47
SB_DQS_1
AV48
SB_DQS_2
BG41
SB_DQS_3
BG37
SB_DQS_4
BH9
SB_DQS_5
BB2
SB_DQS_6
AU1
SB_DQS_7
AN6
SB_DQS#_0
AL46
SB_DQS#_1
AV47
SB_DQS#_2
BH41
SB_DQS#_3
BH37
SB_DQS#_4
BG9
SB_DQS#_5
BC2
SB_DQS#_6
AT2
SB_DQS#_7
AN5
SB_MA_0
AV17
SB_MA_1
BA25
SB_MA_10
BB16
SB_MA_11
AW33
SB_MA_12
AY33
SB_MA_13
BH15
SB_MA_2
BC25
SB_MA_3
AU25
SB_MA_4
AW25
SB_MA_5
BB28
SB_MA_6
AU28
SB_MA_7
AW28
SB_MA_8
AT33
SB_MA_9
BD33
SB_MA_14
AU33
SB_RAS#
AU17
SB_WE#
BF14
D
D
R

S
Y
S
T
E
M

M
E
M
O
R
Y

B
5 OF 10 U52E
CANTIGA-GM-GP-U-NF
D
D
R

S
Y
S
T
E
M

M
E
M
O
R
Y

B
5 OF 10 U52E
CANTIGA-GM-GP-U-NF
SA_DQ_0
AJ 38
SA_DQ_1
AJ 41
SA_DQ_10
AU40
SA_DQ_11
AT38
SA_DQ_12
AN41
SA_DQ_13
AN39
SA_DQ_14
AU44
SA_DQ_15
AU42
SA_DQ_16
AV39
SA_DQ_17
AY44
SA_DQ_18
BA40
SA_DQ_19
BD43
SA_DQ_2
AN38
SA_DQ_20
AV41
SA_DQ_21
AY43
SA_DQ_22
BB41
SA_DQ_23
BC40
SA_DQ_24
AY37
SA_DQ_25
BD38
SA_DQ_26
AV37
SA_DQ_27
AT36
SA_DQ_28
AY38
SA_DQ_29
BB38
SA_DQ_3
AM38
SA_DQ_30
AV36
SA_DQ_31
AW36
SA_DQ_32
BD13
SA_DQ_33
AU11
SA_DQ_34
BC11
SA_DQ_35
BA12
SA_DQ_36
AU13
SA_DQ_37
AV13
SA_DQ_38
BD12
SA_DQ_39
BC12
SA_DQ_4
AJ 36
SA_DQ_40
BB9
SA_DQ_41
BA9
SA_DQ_42
AU10
SA_DQ_43
AV9
SA_DQ_44
BA11
SA_DQ_45
BD9
SA_DQ_46
AY8
SA_DQ_47
BA6
SA_DQ_48
AV5
SA_DQ_49
AV7
SA_DQ_5
AJ 40
SA_DQ_50
AT9
SA_DQ_51
AN8
SA_DQ_52
AU5
SA_DQ_53
AU6
SA_DQ_54
AT5
SA_DQ_55
AN10
SA_DQ_56
AM11
SA_DQ_57
AM5
SA_DQ_58
AJ 9
SA_DQ_59
AJ 8
SA_DQ_6
AM44
SA_DQ_60
AN12
SA_DQ_61
AM13
SA_DQ_62
AJ 11
SA_DQ_63
AJ 12
SA_DQ_7
AM42
SA_DQ_8
AN43
SA_DQ_9
AN44
SA_BS_0
BD21
SA_BS_1
BG18
SA_BS_2
AT25
SA_CAS#
BD20
SA_DM_0
AM37
SA_DM_1
AT41
SA_DM_2
AY41
SA_DM_3
AU39
SA_DM_4
BB12
SA_DM_5
AY6
SA_DM_6
AT7
SA_DQS_0
AJ 44
SA_DQS_1
AT44
SA_DQS_2
BA43
SA_DQS_3
BC37
SA_DQS_4
AW12
SA_DQS_5
BC8
SA_DQS_6
AU8
SA_DQS_7
AM7
SA_DM_7
AJ 5
SA_DQS#_0
AJ 43
SA_DQS#_1
AT43
SA_DQS#_2
BA44
SA_DQS#_3
BD37
SA_DQS#_4
AY12
SA_DQS#_5
BD8
SA_DQS#_6
AU9
SA_DQS#_7
AM8
SA_MA_0
BA21
SA_MA_1
BC24
SA_MA_10
BC21
SA_MA_11
BG26
SA_MA_12
BH26
SA_MA_13
BH17
SA_MA_2
BG24
SA_MA_3
BH24
SA_MA_4
BG25
SA_MA_5
BA24
SA_MA_6
BD24
SA_MA_7
BG27
SA_MA_8
BF25
SA_MA_9
AW24
SA_RAS#
BB20
SA_WE#
AY20
SA_MA_14
AY25
D
D
R

S
Y
S
T
E
M

M
E
M
O
R
Y

A
4 OF 10 U52D
CANTIGA-GM-GP-U-NF
D
D
R

S
Y
S
T
E
M

M
E
M
O
R
Y

A
4 OF 10 U52D
CANTIGA-GM-GP-U-NF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC_GMCH_35
SM_LF7_GMCH
SM_LF6_GMCH
SM_LF3_GMCH
SM_LF2_GMCH
SM_LF1_GMCH
SM_LF5_GMCH
SM_LF4_GMCH
VCC_AXG_SENSE
VSS_AXG_SENSE
+1.05V_VCCP
+1.8V_SUS
+1.05V_VCCP
+1.8V_SUS
+1.05V_VCCP
+1.05V_VCCP
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cantiga-Power(4/6)
Custom
11 59 Monday, J uly 27, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cantiga-Power(4/6)
Custom
11 59 Monday, J uly 27, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cantiga-Power(4/6)
Custom
11 59 Monday, J uly 27, 2009
<Core Design>
FOR VCC SM
Place on the Edge
Pl ace CAP wher e
LVDS and DDR2 t aps
FOR VCC CORE
Coupling CAP 370 mils from the Edge
Place on the Edge
Coupling CAP
Coupling CAP
+1.05V_VCCP 50mA
VCC_AXF
VCC_HDA +1.5V_RUN 50mA
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
157.2mA VCCD_HPLL
VCCA_SM_CK 26mA
139.2mA VCCA_MPLL
VCCA_HPLL 24mA
720mA +1.05V_VCCP
+1.05V_VCCP
VCCA_SM
+1.05V_VCCP
50mA VCCA_PEG_PLL
+1.8V_SUS
+1.8V_SUS 124mA
Supply Signal Group
VCC_AXG
2898.52mA VCC +1.05V_VCCP
Imax
1782mA VCC_PEG
852mA VTT
8700mA
3000mA VCC_SM
456mA VCC_DMI
VCC_SM_CK
+1.05V_VCCP
+1.05V_VCCP
+1.5V_RUN VCCD_TVDAC 35mA
+3.3V_RUN VCCA_PEG_BG 414uA
+1.05V_VCCP
+3.3V_RUN VCC_HV 105.3mA
321.35mA
VCCD_LVDS
VCCD_PEG_PLL
+1.8V_SUS 60.31mA
8
7
0
0
m
A
2
8
9
8
.
5
2
m
A
3
0
0
0
m
A
SSID = MCH
SB
1
2
C
8
0
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
8
0
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
8
1
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
C
8
1
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
1
2
T
C
1
9
S
T
2
2
0
U
2
D
5
V
B
M
-
2
G
P
T
C
1
9
S
T
2
2
0
U
2
D
5
V
B
M
-
2
G
P
1
2
T
C
2
1
S
T
2
2
0
U
2
D
5
V
B
M
-
2
G
P
T
C
2
1
S
T
2
2
0
U
2
D
5
V
B
M
-
2
G
P
2
1
C
1
8
2
S
C
D
4
7
U
6
D
3
V
2
K
X
-
G
P
2
1
C
1
8
2
S
C
D
4
7
U
6
D
3
V
2
K
X
-
G
P
1
2
C
1
1
3
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
C
1
1
3
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
1
TP83 TP83
1
2
C
1
5
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
1
5
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
1
4
2
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
1
4
2
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
4
2
6
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
4
2
6
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1
2
C
3
8
3
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
3
8
3
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C
1
6
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
1
6
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
VCC_NCTF
AM32
VCC_NCTF
AC30
VCC_NCTF
AJ 29
VCC_NCTF
AK25
VCC_NCTF
AA32
VCC_NCTF
Y32
VCC_NCTF
W32
VCC_NCTF
U32
VCC_NCTF
AM30
VCC_NCTF
AL30
VCC_NCTF
AK30
VCC_NCTF
AG30
VCC_NCTF
AF30
VCC_NCTF
AE30
VCC_NCTF
AL32
VCC_NCTF
W30
VCC_NCTF
V30
VCC_NCTF
AK32
VCC_NCTF
AH29
VCC_NCTF
AG29
VCC_NCTF
AE29
VCC_NCTF
AL28
VCC_NCTF
AK28
VCC_NCTF
AL26
VCC_NCTF
AK26
VCC_NCTF
AJ 32
VCC_NCTF
AK24
VCC_NCTF
AH32
VCC_NCTF
AG32
VCC_NCTF
AE32
VCC_NCTF
AC32
VCC_NCTF
AC29
VCC_NCTF
AA29
VCC_NCTF
Y29
VCC_NCTF
W29
VCC_NCTF
V29
VCC_NCTF
U30
VCC_NCTF
AL29
VCC_NCTF
AK29
VCC_NCTF
AH30
VCC_NCTF
AB30
VCC_NCTF
AA30
VCC_NCTF
Y30
VCC
AG34
VCC
AC34
VCC
AB34
VCC
AA34
VCC
Y34
VCC
V34
VCC
U34
VCC
AM33
VCC
AK33
VCC
AJ 33
VCC
AG33
VCC
AF33
VCC
AE33
VCC
AC33
VCC
AA33
VCC
Y33
VCC
W33
VCC
V33
VCC
U33
VCC
AH28
VCC
AF28
VCC
AC28
VCC
AA28
VCC
AJ 26
VCC
AG26
VCC
AE26
VCC
AC26
VCC
AH25
VCC
AG25
VCC
AF25
VCC
AG24
VCC
AJ 23
VCC
AH23
VCC
AF23
VCC
T32
VCC_NCTF
AK23
P
O
W
E
R
V
C
C

N
C
T
F
V
C
C

C
O
R
E
6 OF 10 U52F
CANTIGA-GM-GP-U-NF
P
O
W
E
R
V
C
C

N
C
T
F
V
C
C

C
O
R
E
6 OF 10 U52F
CANTIGA-GM-GP-U-NF
1
2
C
1
1
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
1
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
VCC_SM
AY32
VCC_SM
BF31
VCC_SM
AW29
VCC_SM
BD32
VCC_SM
BC32
VCC_SM
BB32
VCC_SM
BA32
VCC_SM
AW32
VCC_SM
AV32
VCC_SM
AU32
VCC_SM
AT32
VCC_SM
AR32
VCC_SM
AP32
VCC_SM
AN32
VCC_SM
BH31
VCC_SM
BG31
VCC_SM
AN33
VCC_SM
BG30
VCC_SM
BH29
VCC_SM
BG29
VCC_SM
BF29
VCC_SM
BD29
VCC_SM
BC29
VCC_SM
BB29
VCC_SM
BA29
VCC_SM
AY29
VCC_SM
BH32
VCC_SM
AV29
VCC_SM
AU29
VCC_SM
AT29
VCC_SM
AR29
VCC_AXG_NCTF
V23
VCC_AXG_NCTF
AM21
VCC_AXG_NCTF
AL21
VCC_AXG_NCTF
AK21
VCC_AXG_NCTF
W21
VCC_AXG_NCTF
V21
VCC_AXG_NCTF
U21
VCC_AXG_NCTF
AM20
VCC_AXG_NCTF
AK20
VCC_AXG_NCTF
W20
VCC_AXG_NCTF
V28
VCC_AXG_NCTF
U20
VCC_AXG_NCTF
AM19
VCC_AXG_NCTF
AL19
VCC_AXG_NCTF
AK19
VCC_AXG_NCTF
AJ 19
VCC_AXG_NCTF
AH19
VCC_AXG_NCTF
AG19
VCC_AXG_NCTF
AF19
VCC_AXG_NCTF
AE19
VCC_AXG_NCTF
AB19
VCC_AXG_NCTF
W26
VCC_AXG_NCTF
AA19
VCC_AXG_NCTF
Y19
VCC_AXG_NCTF
W19
VCC_AXG_NCTF
V19
VCC_AXG_NCTF
U19
VCC_AXG_NCTF
AM17
VCC_AXG_NCTF
AK17
VCC_AXG_NCTF
AH17
VCC_AXG_NCTF
AG17
VCC_AXG_NCTF
AF17
VCC_AXG_NCTF
V26
VCC_AXG_NCTF
AE17
VCC_AXG_NCTF
AC17
VCC_AXG_NCTF
AB17
VCC_AXG_NCTF
Y17
VCC_AXG_NCTF
W17
VCC_AXG_NCTF
V17
VCC_AXG_NCTF
AM16
VCC_AXG_NCTF
AL16
VCC_AXG_NCTF
AK16
VCC_AXG_NCTF
AJ 16
VCC_AXG_NCTF
W25
VCC_AXG_NCTF
AH16
VCC_AXG_NCTF
AG16
VCC_AXG_NCTF
AF16
VCC_AXG_NCTF
AE16
VCC_AXG_NCTF
AC16
VCC_AXG_NCTF
AB16
VCC_AXG_NCTF
AA16
VCC_AXG_NCTF
V25
VCC_AXG_NCTF
W24
VCC_AXG_NCTF
V24
VCC_AXG_NCTF
W23
VCC_SM
AP29
VCC_SM
BG32
VCC_SM
BF32
VCC_AXG_NCTF
W28
VCC_SM
AP33
VCC_AXG
Y26
VCC_AXG
AE25
VCC_AXG
AB25
VCC_AXG
AA25
VCC_AXG
AE24
VCC_AXG
AC24
VCC_AXG
AA24
VCC_AXG
Y24
VCC_AXG
AE23
VCC_AXG
AC23
VCC_AXG
AB23
VCC_AXG
AA23
VCC_AXG
AJ 21
VCC_AXG
AG21
VCC_AXG
AE21
VCC_AXG
AC21
VCC_AXG
AA21
VCC_AXG
Y21
VCC_AXG
AH20
VCC_AXG
AF20
VCC_AXG
AE20
VCC_AXG
AC20
VCC_AXG
AB20
VCC_AXG
AA20
VCC_AXG
T17
VCC_AXG
AM15
VCC_AXG
AL15
VCC_AXG
AJ 15
VCC_AXG
AH15
VCC_AXG
AF15
VCC_AXG
AB15
VCC_SM_LF
AV44
VCC_SM_LF
BA37
VCC_SM_LF
AM40
VCC_SM_LF
AV21
VCC_SM_LF
AY5
VCC_SM_LF
AM10
VCC_SM_LF
BB13
VCC_AXG
T16
VCC_AXG
AG15
VCC_AXG
AA15
VCC_AXG
Y15
VCC_AXG
V15
VCC_AXG
U15
VCC_AXG
AN14
VCC_AXG
AM14
VCC_AXG
U14
VCC_AXG
T14
VCC_AXG_SENSE
AJ 14
VSS_AXG_SENSE
AH14
VCC_AXG_NCTF
Y16
VCC_AXG_NCTF
W16
VCC_AXG_NCTF
V16
VCC_AXG_NCTF
U16
VCC_SM/NC
BA36
VCC_SM/NC
BB24
VCC_SM/NC
BD16
VCC_SM/NC
BB21
VCC_SM/NC
AW16
VCC_SM/NC
AW13
VCC_SM/NC
AT13
VCC_AXG
AE15
P
O
W
E
R
V
C
C

S
M
V
C
C

G
F
X
V
C
C

G
F
X

N
C
T
F
V
C
C

S
M

L
F
7 OF 10 U52G
CANTIGA-GM-GP-U-NF
P
O
W
E
R
V
C
C

S
M
V
C
C

G
F
X
V
C
C

G
F
X

N
C
T
F
V
C
C

S
M

L
F
7 OF 10 U52G
CANTIGA-GM-GP-U-NF
1
2
C
9
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
9
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
4
3
1
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
3
1
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
1
8
6
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
1
8
6
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
1
7
8
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
1
7
8
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
1
0
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
0
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
9
1
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
C
9
1
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
1
2
C
9
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
9
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
1
1
1
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
1
1
1
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
TP82 TP82
1
2
C
1
7
0
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
1
7
0
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
2
1
C
1
6
1
S
C
D
4
7
U
6
D
3
V
2
K
X
-
G
P
2
1
C
1
6
1
S
C
D
4
7
U
6
D
3
V
2
K
X
-
G
P
1
2
C
8
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
8
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
1
6
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
1
6
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 R125
0R0402-PAD
R125
0R0402-PAD
1
2
C
4
3
5
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
4
3
5
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
C
9
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
9
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
1
7
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
7
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
1
3
4
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
C
1
3
4
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
1
2
C
3
9
0
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
3
9
0
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1D8V_TXLVDS_S3
1D5VRUN_QDAC
1D8V_SUS_DLVDS
1D5VRUN_TVDAC
1D05V_RUN_HPLL
M_VCCA_DPLLA
M_VCCA_DPLLB
M_VCCA_MPLL
M_VCCA_HPLL
M_VCCA_DAC_BG
1D05V_SM_CK
1D5VRUN_QDAC
1D5VRUN_TVDAC
VCCA_PEG_BG
1D05V_RUN_PEGPLL
3D3V_CRTDAC_S0
M_VCCA_HPLL
M_VCCA_MPLL
M_VCCA_DPLLA
M_VCCA_DPLLB
1D05V_VCC_AXF
VTTLF1
VTTLF2
VTTLF3
VCC_HDA
1D8V_TXLVDS
1D05V_RUN_PEGPLL
1D05V_RUN_PEGPLL
+1.8V_SUS
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+3.3V_RUN +3.3V_VCC_HV
+3.3V_TV_DAC +3.3V_CRT_LDO
+1.8V_SUS
+1.05V_VCCP
+1.8V_SUS
+1.8V_SUS
+1.05V_VCCP
+3.3V_CRT_LDO
+3.3V_CRT_LDO
+1.05V_VCCP
+1.5V_RUN
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+3.3V_CRT_LDO
+1.5V_RUN
+1.05V_VCCP
+1.05V_VCCP +5V_RUN
+3.3V_VCC_HV
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cantiga-Power/Filter(5/6)
Custom
12 59 Monday, J uly 27, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
12 59 Monday, J uly 27, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
12 59 Monday, J uly 27, 2009
<Core Design>
220ohm 100MHz
120ohm 100MHz
120ohm 100MHz
180ohm 100MHz
Reserved for TV ripple
8
5
2
m
A
1
7
8
2
m
A
4
5
6
m
A
414uA
7
2
0
m
A
2
6
m
A
24mA
139.2mA
157.2mA
50mA
50mA
3
2
1
.
3
5
m
A
50mA
35mA
60.31mA
1
2
4
m
A
1
0
5
.
3
m
A
7
3
m
A
5mA
6
4
.
8
m
A
13.2mA
7
9
m
A
2mA
118.8mA
SSID = MCH
Main source:
74.09091.H3F
2nd source:
74.09198.07F
A00.08/0903
SB
1
2
C
4
2
7
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
C
4
2
7
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C185
SCD1U10V2KX-4GP
C185
SCD1U10V2KX-4GP
1
2
C
1
5
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
1
5
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
1
2
7
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
C
1
2
7
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
DY
1 2
L12
FCM1608KF-1-GP
L12
FCM1608KF-1-GP
1 2 R97
0R0805-PAD
R97
0R0805-PAD
1
2
C
3
8
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
3
8
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 R402
0R0402-PAD
R402
0R0402-PAD
1
2
C
4
5
0
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
4
5
0
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C442
SCD1U10V2KX-4GP
C442
SCD1U10V2KX-4GP
1 2 R403
0R0402-PAD
R403
0R0402-PAD
EN
1
GND
2
VIN
3
VOUT
4
NC#5
5
U53
G9091-330T12U-GP
U53
G9091-330T12U-GP
1
2
C
1
3
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
1
3
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
4
3
4
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
C
4
3
4
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
1 2 R408
0R0603-PAD
R408
0R0603-PAD
1 2 R378
0R0402-PAD
R378
0R0402-PAD
1
2
C
3
8
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
3
8
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 R394
0R0603-PAD
R394
0R0603-PAD
1
2
C
4
1
6
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
4
1
6
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
C436
SC1U10V3KX-3GP
C436
SC1U10V3KX-3GP
1
2
C
4
3
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
3
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C137
SC10U6D3V5MX-3GP
C137
SC10U6D3V5MX-3GP
2
1
C
3
9
5
S
C
D
4
7
U
6
D
3
V
2
K
X
-
G
P
2
1
C
3
9
5
S
C
D
4
7
U
6
D
3
V
2
K
X
-
G
P
1
2
C
1
5
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
1
5
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C407
SC10U6D3V5MX-3GP
DY
C407
SC10U6D3V5MX-3GP
DY
1 2 R395
0R0402-PAD
R395
0R0402-PAD
1
2
C
3
9
1
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
C
3
9
1
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
1
2
C
4
3
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
4
3
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2
C
4
4
7
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
C
4
4
7
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
1
2
C
1
8
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
8
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1 2 R405
0R0603-PAD
R405
0R0603-PAD
1 2
L11
FCM1608KF-1-GP
L11
FCM1608KF-1-GP
1
2
C
4
1
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
4
1
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2
C
1
2
3
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
C
1
2
3
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
1
2
C
4
4
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
4
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
2
1
C
3
9
4
S
C
D
4
7
U
6
D
3
V
2
K
X
-
G
P
2
1
C
3
9
4
S
C
D
4
7
U
6
D
3
V
2
K
X
-
G
P
1 2 R140
0R0603-PAD
R140
0R0603-PAD
1
2
R351
0R0603-PAD
R351
0R0603-PAD 1 2
R396
10R2J -2-GP
R396
10R2J -2-GP
1
2
C
1
5
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
1
5
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C446
SC10U6D3V5MX-3GP
C446
SC10U6D3V5MX-3GP
1 2
L3
HCB1608K-181T20GP
L3
HCB1608K-181T20GP
1
2
C
4
4
0
S
C
1
K
P
5
0
V
2
K
X
-
1
G
P
C
4
4
0
S
C
1
K
P
5
0
V
2
K
X
-
1
G
P
1
2
C
1
8
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
1
8
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1 2 R398
0R0402-PAD
R398
0R0402-PAD
1 2 R390
0R0603-PAD
R390
0R0603-PAD
2
1
C
9
0
S
C
D
4
7
U
6
D
3
V
2
K
X
-
G
P
2
1
C
9
0
S
C
D
4
7
U
6
D
3
V
2
K
X
-
G
P
1
2
T
C
3
S
T
2
2
0
U
2
D
5
V
B
M
-
L
G
P
DY
T
C
3
S
T
2
2
0
U
2
D
5
V
B
M
-
L
G
P
DY
1
2
3
D22
BAT54-7-F-GP
D22
BAT54-7-F-GP
1
2
C
3
9
3
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
C
3
9
3
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
1 2 R120
0R0603-PAD
R120
0R0603-PAD
1 2 R373
0R0603-PAD
R373
0R0603-PAD
1
2
C449
SC22U6D3V5MX-2GP
C449
SC22U6D3V5MX-2GP
1
2
C
1
2
6
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
1
2
6
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
VTT
V3
VTT
U3
VTT
V2
VTT
U2
VCCA_PEG_BG
AD48
VCCA_PEG_PLL
AA48
VCCA_CRT_DAC
B27
VCCA_CRT_DAC
A26
VCCA_DPLLA
F47
VCCA_DPLLB
L48
VCCA_HPLL
AD1
VCCA_LVDS
J 48
VCCA_MPLL
AE1
VCCA_TV_DAC
B24
VCCA_TV_DAC
A24
VCCD_PEG_PLL
AA47
VTT
U6
VTT
T6
VTT
U5
VTT
T5
VTT
T8
VTT
U7
VTT
T7
VCCD_HPLL
AF1
VTT
U13
VTT
T13
VTT
T12
VTT
U11
VTT
T11
VTT
U10
VTT
T10
VTT
U9
VTT
T9
VTT
U8
VTT
U12
VCCA_SM_CK
AP28
VCCA_SM_CK
AN28
VCCA_DAC_BG
A25
VCCD_TVDAC
M25
VTTLF
A8
VTTLF
L1
VTTLF
AB2
VCC_DMI
AH48
VCC_DMI
AF48
VCC_SM_CK
BF21
VCC_SM_CK
BH20
VCC_SM_CK
BG20
VCC_SM_CK
BF20
VCCD_LVDS
M38
VCCD_QDAC
L28
VCC_AXF
B22
VCC_AXF
B21
VCC_AXF
A21
VCCA_SM
AR20
VCCA_SM
AP20
VCCA_SM
AN20
VCCA_SM
AR17
VCCA_SM
AP17
VCCA_SM
AT16
VCCA_SM
AR16
VCCA_SM
AP16
VCC_TX_LVDS
K47
VSSA_LVDS
J 47
VCC_HV
C35
VCC_HV
B35
VCC_PEG
V48
VCCD_LVDS
L37
VCC_PEG
U48
VCC_PEG
V47
VCC_PEG
U47
VCC_PEG
U46
VCCA_SM
AN17
VCCA_SM_CK
AP25
VCCA_SM_CK
AN25
VCCA_SM_CK
AN24
VCCA_SM_CK_NCTF
AM28
VCCA_SM_CK_NCTF
AM26
VCCA_SM_CK_NCTF
AM25
VCCA_SM_CK_NCTF
AL25
VCCA_SM_CK_NCTF
AM24
VCCA_SM_CK_NCTF
AL24
VCCA_SM_CK_NCTF
AM23
VTT
T2
VTT
V1
VTT
U1
VCC_HV
A35
VCC_DMI
AH47
VCC_DMI
AG47
VSSA_DAC_BG
B25
VCCA_SM_CK_NCTF
AL23
VCC_HDA
A32
POWER
C
R
T
P
L
L
A

P
E
G
A

S
M
T
V
D

T
V
/
C
R
T
L
V
D
S
V
T
T
L
F
P
E
G
S
M

C
K
A
X
F
V
T
T
D
M
I
H
V
A

C
K
A

L
V
D
S
H
D
A
8 OF 10 U52H
CANTIGA-GM-GP-U-NF
POWER
C
R
T
P
L
L
A

P
E
G
A

S
M
T
V
D

T
V
/
C
R
T
L
V
D
S
V
T
T
L
F
P
E
G
S
M

C
K
A
X
F
V
T
T
D
M
I
H
V
A

C
K
A

L
V
D
S
H
D
A
8 OF 10 U52H
CANTIGA-GM-GP-U-NF
1
2
C441
SC1KP50V2KX-1GP
C441
SC1KP50V2KX-1GP
1
2
R100
1R3F-GP
R100
1R3F-GP
1
2
C
1
2
8
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
C
1
2
8
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
1
2
C438
SCD1U10V2KX-4GP
C438
SCD1U10V2KX-4GP
1 2 R115
0R0603-PAD
R115
0R0603-PAD
1
2
C
4
2
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
2
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
4
0
8
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
4
0
8
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
1
3
5
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
1
3
5
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
2
E
C
4
8
S
C
D
1
U
2
5
V
3
K
X
-
G
P
E
C
4
8
S
C
D
1
U
2
5
V
3
K
X
-
G
P
1
2
C437
SCD1U10V2KX-4GP
C437
SCD1U10V2KX-4GP
1
2
C419
SC10U6D3V5MX-3GP
C419
SC10U6D3V5MX-3GP
2
1
C
1
4
3
S
C
D
4
7
U
6
D
3
V
2
K
X
-
G
P
2
1
C
1
4
3
S
C
D
4
7
U
6
D
3
V
2
K
X
-
G
P
1
2
C
1
5
3
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
C
1
5
3
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
1
2
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
1
2
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
1
5
4
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
C
1
5
4
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C181
SCD1U10V2KX-4GP
C181
SCD1U10V2KX-4GP
1
2
C
4
4
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
4
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
1
3
0
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
C
1
3
0
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
1
2
C
4
4
5
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
4
4
5
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1 2
L16
BLM18BB221SN1D-GP
L16
BLM18BB221SN1D-GP
1
2
C
1
8
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
8
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
1
4
4
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
DY
C
1
4
4
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
DY
1
2
C
1
4
0
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
C
1
4
0
S
C
2
2
U
6
D
3
V
5
M
X
-
2
G
P
1
2
C
3
8
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
3
8
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
1
9
1
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
1
9
1
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1 2 R152
0R0603-PAD
R152
0R0603-PAD
1 2 R360
0R0603-PAD
R360
0R0603-PAD
1
2
C
4
4
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
4
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GMCH_GND4
GMCH_GND1
GMCH_GND2
GMCH_GND3
PEG_CMP
M_BLUE
GMCH_VS
CRT_IREF
GMCH_HS
LVDS_VBG
M_GREEN
M_RED
LIBG
TV_DACB
TV_DACC
TV_DACA
LDDC_DATA
LDDC_CLK
L_CTRL_DATA
L_CTRL_CLK
DDC_CLK_CON
DDC_DATA_CON
GMCH_DDCCLK
GMCH_DDCDATA
GMCH_DDCDATA
GMCH_DDCCLK
+1.05V_VCCP
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
VGA_TXAOUT0+
VGA_TXAOUT1+
VGA_TXAOUT2+
VGA_TXAOUT0-
VGA_TXAOUT1-
VGA_TXAOUT2-
VGA_TXACLK-
VGA_TXACLK+
LBKLT_CTL
LDDC_CLK
LDDC_DATA
GMCH_BL_ON
GMCH_HSYNC
GMCH_VSYNC
VGA_TXBCLK-
VGA_TXBCLK+
VGA_TXBOUT0+
VGA_TXBOUT1+
VGA_TXBOUT2+
VGA_TXBOUT0-
VGA_TXBOUT1-
VGA_TXBOUT2-
M_BLUE
M_GREEN
M_RED
LCDVDD_EN
DDC_CLK_CON
DDC_DATA_CON
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Cantiga-GND/LVDS/VGA(6/6)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
NCTF
PIN
Place R105
close to
MCH within
500 mils.
CRT_IREF
routing Trace
width use 20 mil.
SSID = MCH
5V @ ext. CRT side
1
TP225 TP225
VSS
AU48
VSS
A23
VSS
AR48
VSS
AL48
VSS
BB47
VSS
AW47
VSS
AN47
VSS
AJ 47
VSS
AF47
VSS
AD47
VSS
AB47
VSS
Y47
VSS
T47
VSS
N47
VSS
L47
VSS
G47
VSS
BD46
VSS
BA46
VSS
AV46
VSS
AR46
VSS
AM46
VSS
V46
VSS
R46
VSS
P46
VSS
H46
VSS
F46
VSS
BF44
VSS
AH44
VSS
AD44
VSS
AA44
VSS
Y44
VSS
U44
VSS
T44
VSS
M44
VSS
F44
VSS
BC43
VSS
AV43
VSS
AU43
VSS
AM43
VSS
J 43
VSS
C43
VSS
BG42
VSS
AY42
VSS
AT42
VSS
AN42
VSS
AJ 42
VSS
AE42
VSS
N42
VSS
L42
VSS
BD41
VSS
AU41
VSS
AM41
VSS
AH41
VSS
AD41
VSS
AA41
VSS
Y41
VSS
U41
VSS
T41
VSS
M41
VSS
G41
VSS
B41
VSS
BG40
VSS
BB40
VSS
AV40
VSS
AN40
VSS
H40
VSS
E40
VSS
AT39
VSS
AM39
VSS
AJ 39
VSS
AE39
VSS
N39
VSS
L39
VSS
B39
VSS
BH38
VSS
BC38
VSS
BA38
VSS
AU38
VSS
AH38
VSS
AD38
VSS
AA38
VSS
Y38
VSS
U38
VSS
T38
VSS
J 38
VSS
F38
VSS
C38
VSS
BD36
VSS
AM36
VSS
AE36
VSS
P36
VSS
L36
VSS
J 36
VSS
F36
VSS
B36
VSS
AH35
VSS
AA35
VSS
Y35
VSS
U35
VSS
T35
VSS
BF34
VSS
AM34
VSS
AJ 34
VSS
AF34
VSS
AE34
VSS
W34
VSS
B34
VSS
A34
VSS
BG33
VSS
BC33
VSS
BA33
VSS
AV33
VSS
AR33
VSS
AL33
VSS
AH33
VSS
AB33
VSS
P33
VSS
L33
VSS
H33
VSS
N32
VSS
K32
VSS
F32
VSS
C32
VSS
A31
VSS
AN29
VSS
T29
VSS
N29
VSS
K29
VSS
H29
VSS
F29
VSS
A29
VSS
BG28
VSS
BD28
VSS
BA28
VSS
AV28
VSS
AT28
VSS
AR28
VSS
AJ 28
VSS
AG28
VSS
AE28
VSS
AB28
VSS
Y28
VSS
P28
VSS
K28
VSS
H28
VSS
F28
VSS
C28
VSS
BF26
VSS
AH26
VSS
AF26
VSS
AB26
VSS
AA26
VSS
C26
VSS
B26
VSS
BH25
VSS
BD25
VSS
BB25
VSS
AV25
VSS
AR25
VSS
AJ 25
VSS
AC25
VSS
Y25
VSS
N25
VSS
L25
VSS
J 25
VSS
G25
VSS
E25
VSS
BF24
VSS
BF37
VSS
BB37
VSS
AW37
VSS
AT37
VSS
AN37
VSS
AJ 37
VSS
H37
VSS
C37
VSS
BG36
VSS
AU36
VSS
AT24
VSS
AH24
VSS
AB24
VSS
L24
VSS
AY46
VSS
G24
VSS
E24
VSS
AG23
VSS
B23
VSS
AY24
VSS
AJ 24
VSS
AF24
VSS
R24
VSS
K24
VSS
J 24
VSS
F24
VSS
BH23
VSS
Y23
VSS
AK15
VSS
AD12
VSS
AJ 6
VSS
9 OF 10 U52I
CANTIGA-GM-GP-U-NF
VSS
9 OF 10 U52I
CANTIGA-GM-GP-U-NF
1
TP226 TP226
1 2 R379 150R2F-1-GP R379 150R2F-1-GP
1 2 R144 2K37R2F-GP R144 2K37R2F-GP
1
2 3
4
RN19
SRN2K2J -1-GP
RN19
SRN2K2J -1-GP
1
2
R133
49D9R2F-GP
R133
49D9R2F-GP
1 2 R389 75R2F-2-GP R389 75R2F-2-GP
VSS
BG21
VSS
AW21
VSS
AU21
VSS
AP21
VSS
AN21
VSS
AH21
VSS
AF21
VSS
AB21
VSS
R21
VSS
M21
VSS
J 21
VSS
G21
VSS
BC20
VSS
BA20
VSS
AW20
VSS
AT20
VSS
AJ 20
VSS
AG20
VSS
Y20
VSS
N20
VSS
K20
VSS
F20
VSS
C20
VSS
A20
VSS
BG19
VSS
A18
VSS
BG17
VSS
BC17
VSS
AW17
VSS
AT17
VSS
R17
VSS
M17
VSS
H17
VSS
C17
VSS
BA16
VSS
AU16
VSS
AN16
VSS
N16
VSS
K16
VSS
G16
VSS
E16
VSS
BG15
VSS
W15
VSS
A15
VSS
BG14
VSS
AA14
VSS
C14
VSS
BG13
VSS
BC13
VSS
BA13
VSS
AN13
VSS
AJ 13
VSS
AE13
VSS
N13
VSS
L13
VSS
G13
VSS
E13
VSS
BF12
VSS
AV12
VSS
AT12
VSS
AM12
VSS
AA12
VSS
J 12
VSS
A12
VSS
BD11
VSS
BB11
VSS
AY11
VSS
AN11
VSS
AH11
VSS
Y11
VSS
N11
VSS
G11
VSS
C11
VSS
BG10
VSS
AV10
VSS
AT10
VSS
AJ 10
VSS
AE10
VSS
AA10
VSS
BH8
VSS
B9
VSS
G9
VSS
AD9
VSS
AM9
VSS
AN9
VSS
BC9
VSS
M10
VSS
BF9
VSS
AH8
VSS
Y8
VSS
L8
VSS
E8
VSS
B8
VSS
AY7
VSS
AU7
VSS
AN7
VSS
AJ 7
VSS
AE7
VSS
AA7
VSS
N7
VSS
J 7
VSS
BG6
VSS
BD6
VSS
AV6
VSS
AT6
VSS
AC15
VSS
AM6
VSS
M6
VSS
C6
VSS
BA5
VSS
AH5
VSS
AD5
VSS
Y5
VSS
L5
VSS
J 5
VSS
H5
VSS
F5
VSS
BE4
VSS
BC3
VSS
AV3
VSS
AL3
VSS_NCTF
AF32
VSS_NCTF
AB32
VSS_NCTF
V32
VSS_NCTF
AJ 30
VSS_NCTF
AM29
VSS_NCTF
AF29
VSS_NCTF
AB29
VSS_NCTF
U26
VSS_NCTF
U23
VSS_NCTF
AL20
VSS_NCTF
V20
VSS_NCTF
AC19
VSS_NCTF
AL17
VSS_NCTF
AJ 17
VSS_NCTF
AA17
VSS_NCTF
U17
VSS_SCB
BH48
VSS_SCB
BH1
VSS_SCB
A48
VSS_SCB
C1
VSS_SCB
A3
NC#E1
E1
NC#D2
D2
NC#C3
C3
NC#B4
B4
NC#A5
A5
NC#A6
A6
NC#A43
A43
NC#A44
A44
NC#B45
B45
NC#C46
C46
NC#D47
D47
NC#B47
B47
NC#A46
A46
NC#F48
F48
NC#E48
E48
NC#C48
C48
NC#B48
B48
VSS
R3
VSS
P3
VSS
BA2
VSS
AR2
VSS
AU2
VSS
AP2
VSS
F3
VSS
AW2
VSS
AE2
VSS
AF2
VSS
AH2
VSS
AJ 2
VSS
AD2
VSS
AC2
VSS
Y2
VSS
M2
VSS
K2
VSS
AM1
VSS
AA1
VSS
P1
VSS
H1
VSS
BB8
VSS
AV8
VSS
AT8
VSS
U24
VSS
U28
VSS
U25
VSS
U29
VSS
L12
VSS
V
S
S

N
C
T
F
V
S
S

S
C
B
N
C
10 OF 10 U52J
CANTIGA-GM-GP-U-NF
VSS
V
S
S

N
C
T
F
V
S
S

S
C
B
N
C
10 OF 10 U52J
CANTIGA-GM-GP-U-NF
1
2
3 4
5
6
U4
2N7002SPT
U4
2N7002SPT
1
2 3
4
RN41
SRN10KJ -5-GP
RN41
SRN10KJ -5-GP
1
TP103 TP103
1 2
R124 1K02R2F-1-GP R124 1K02R2F-1-GP
PEG_COMPI
T37
PEG_COMPO
T36
PEG_RX#_0
H44
PEG_RX#_1
J 46
PEG_RX#_2
L44
PEG_RX#_3
L40
PEG_RX#_4
N41
PEG_RX#_5
P48
PEG_RX#_6
N44
PEG_RX#_7
T43
PEG_RX#_8
U43
PEG_RX#_9
Y43
PEG_RX#_10
Y48
PEG_RX#_11
Y36
PEG_RX#_12
AA43
PEG_RX#_13
AD37
PEG_RX#_14
AC47
PEG_RX#_15
AD39
PEG_RX_0
H43
PEG_RX_1
J 44
PEG_RX_2
L43
PEG_RX_3
L41
PEG_RX_4
N40
PEG_RX_5
P47
PEG_RX_6
N43
PEG_RX_7
T42
PEG_RX_8
U42
PEG_RX_9
Y42
PEG_RX_10
W47
PEG_RX_11
Y37
PEG_RX_12
AA42
PEG_RX_13
AD36
PEG_RX_14
AC48
PEG_RX_15
AD40
PEG_TX#_0
J 41
PEG_TX#_10
Y40
PEG_TX#_3
M40
PEG_TX#_4
M42
PEG_TX#_5
R48
PEG_TX#_6
N38
PEG_TX#_7
T40
PEG_TX#_8
U37
PEG_TX#_9
U40
PEG_TX#_1
M46
PEG_TX#_11
AA46
PEG_TX#_12
AA37
PEG_TX#_13
AA40
PEG_TX#_14
AD43
PEG_TX#_15
AC46
PEG_TX#_2
M47
PEG_TX_0
J 42
PEG_TX_1
L46
PEG_TX_2
M48
PEG_TX_3
M39
PEG_TX_4
M43
PEG_TX_5
R47
PEG_TX_6
N37
PEG_TX_7
T39
PEG_TX_8
U36
PEG_TX_9
U39
PEG_TX_10
Y39
PEG_TX_11
Y46
PEG_TX_12
AA36
PEG_TX_13
AA39
PEG_TX_14
AD42
PEG_TX_15
AD46
L_CTRL_CLK
M32
L_CTRL_DATA
M33
L_DDC_CLK
K33
L_DDC_DATA
J 33
L_VDD_EN
M29
LVDS_IBG
C44
LVDS_VBG
B43
LVDS_VREFH
E37
LVDS_VREFL
E38
LVDSA_CLK#
C41
LVDSA_CLK
C40
LVDSA_DATA#_0
H47
LVDSA_DATA#_1
E46
LVDSA_DATA#_2
G40
LVDSA_DATA_1
D45
LVDSA_DATA_2
F40
LVDSB_CLK#
B37
LVDSB_CLK
A37
LVDSB_DATA#_0
A41
LVDSB_DATA#_1
H38
LVDSB_DATA#_2
G37
LVDSB_DATA_1
G38
LVDSB_DATA_2
F37
L_BKLT_EN
G32
TVA_DAC
F25
TVB_DAC
H25
TVC_DAC
K25
TV_RTN
H24
CRT_BLUE
E28
CRT_DDC_CLK
H32
CRT_DDC_DATA
J 32
CRT_GREEN
G28
CRT_HSYNC
J 29
CRT_TVO_IREF
E29
CRT_RED
J 28
CRT_IRTN
G29
CRT_VSYNC
L29
LVDSA_DATA_0
H48
LVDSB_DATA_0
B42
L_BKLT_CTRL
L32
TV_DCONSEL_0
C31
TV_DCONSEL_1
E32
LVDSA_DATA#_3
A40
LVDSA_DATA_3
B40
LVDSB_DATA#_3
J 37
LVDSB_DATA_3
K37
L
V
D
S
P
C
I
-
E
X
P
R
E
S
S

G
R
A
P
H
I
C
S
T
V
V
G
A
3 OF 10 U52C
CANTIGA-GM-GP-U-NF
L
V
D
S
P
C
I
-
E
X
P
R
E
S
S

G
R
A
P
H
I
C
S
T
V
V
G
A
3 OF 10 U52C
CANTIGA-GM-GP-U-NF
1
TP78 TP78
1 2
R392 33R2J -2-GP R392 33R2J -2-GP
1 2 R386 75R2F-2-GP R386 75R2F-2-GP
1
TP80 TP80
1 2
R123 33R2J -2-GP R123 33R2J -2-GP
1 2 R376 150R2F-1-GP R376 150R2F-1-GP
1
2 3
4
RN2
SRN2K2J -1-GP
RN2
SRN2K2J -1-GP
1 2 R385 75R2F-2-GP R385 75R2F-2-GP
1 2 R381 150R2F-1-GP R381 150R2F-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_ODT0
M_CS0#
M_A_A1
M_A_A3
M_A_BS#1
M_A_RAS#
M_A_A7
M_CLK_DDR#0
M_CLK_DDR1
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
ICH_SMBDATA
ICH_SMBCLK
M_CLK_DDR0
M_CLK_DDR#0
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_CLK_DDR#1
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR#1
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_A0
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ17
M_A_DQ18
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ19
M_A_DQ20
M_A_A1
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_A2
M_A_A3
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_A4
M_A_A5
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_BS#1
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQ0
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_ODT0
M_ODT1
M_A_DQS#0
M_A_BS#2
M_A_DQS#1
M_A_DQS#2
M_A_BS#0
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_A12
M_A_A11
M_A_A14
M_A_CAS#
M_A_WE#
M_A_A4
M_A_A0
M_A_BS#0
M_A_A10
M_CKE1
M_CS1#
M_ODT1
M_A_BS#2
M_A_A6
M_A_A5
M_A_A9
M_A_A2
M_A_A8
M_A_A13
M_CKE0
+1.8V_SUS
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+1.8V_SUS
+3.3V_RUN
+3.3V_RUN
+V_DDR_MCH_REF
M_A_DQS#[7..0]
M_A_DQ[63..0]
M_A_DM[7..0]
M_A_DQS[7..0]
M_A_A[14..0]
M_CLK_DDR#0
M_CKE1
M_CS0#
M_CLK_DDR#1
M_CLK_DDR1
M_CKE0
M_A_WE#
M_A_CAS#
M_CS1#
M_CLK_DDR0
M_A_RAS#
ICH_SMBDATA
PM_EXTTS#0
ICH_SMBCLK
M_A_BS#2
M_A_BS#0
M_A_BS#1
M_ODT0
M_ODT1
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DDRII-SODIMM SLOT1
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DDRII-SODIMM SLOT1
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DDRII-SODIMM SLOT1
Custom
<Core Design>
Layout Note:
Place these resistors close to DM1,
all trace length Max=1.5".
Layout Note:
Place near DM1
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT.
put near connector SSID = MEMORY
-1
1
2 3
4
RN8
SRN56J -4-GP
RN8
SRN56J -4-GP
1
2
C
1
2
2
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
1
2
2
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
2 3
4
RN10
SRN56J -4-GP
RN10
SRN56J -4-GP
1
2
C
1
3
8
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
DY
C
1
3
8
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
DY
1
2 3
4
RN4
SRN56J -4-GP
RN4
SRN56J -4-GP
1
2 3
4
RN29
SRN56J -4-GP
RN29
SRN56J -4-GP
1
2
C
1
0
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
1
0
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
C
8
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
8
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
9
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
9
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2 3
4
RN31
SRN56J -4-GP
RN31
SRN56J -4-GP
1
2
C
1
3
2
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
1
3
2
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
2
C
4
3
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
4
3
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
C
7
4
D
U
M
M
Y
-
C
2
C
7
4
D
U
M
M
Y
-
C
2
1
2
C
1
9
2
D
U
M
M
Y
-
C
2
C
1
9
2
D
U
M
M
Y
-
C
2
1
2 3
4
RN28
SRN56J -4-GP
RN28
SRN56J -4-GP
1
2
C
1
6
0
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
DY
C
1
6
0
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
DY
1
2
T
C
8
S
T
2
2
0
U
2
D
5
V
B
M
-
L
G
P
DY
T
C
8
S
T
2
2
0
U
2
D
5
V
B
M
-
L
G
P
DY
1
2
C203
SCD1U16V2KX-3GP
C203
SCD1U16V2KX-3GP
1
2
C
4
2
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
2
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2 3
4
RN17
SRN56J -4-GP
RN17
SRN56J -4-GP
1
2
C
5
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
5
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
1
1
6
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
1
1
6
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
2
C
5
3
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
DY
C
5
3
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
DY
1
2
C202
SC2D2U10V3KX-1GP
DY
C202
SC2D2U10V3KX-1GP
DY
1
2
C
1
1
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
1
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1 2 R56 0R0402-PAD R56 0R0402-PAD
1
2
C
1
9
5
D
U
M
M
Y
-
C
2
C
1
9
5
D
U
M
M
Y
-
C
2
1
2
C
8
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
8
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2 3
4
RN35
SRN56J -4-GP
RN35
SRN56J -4-GP
1
2
C
9
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
9
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
C
1
0
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
0
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
4
0
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
0
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1 2 R55 0R0402-PAD R55 0R0402-PAD
1
2
C
1
1
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
1
1
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
C
7
2
D
U
M
M
Y
-
C
2
C
7
2
D
U
M
M
Y
-
C
2
1
2 3
4
RN37
SRN56J -4-GP
RN37
SRN56J -4-GP
1
2
C
1
0
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
0
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
1
0
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
0
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
4
2
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
2
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
A0
102
A1
101
A2
100
A3
99
A4
98
A5
97
A6
94
A7
92
A8
93
A9
91
A10/AP
105
A11
90
A12
89
A13
116
A14
86
A15
84
A16/BA2
85
BA0
107
BA1
106
DQ0
5
DQ1
7
DQ2
17
DQ3
19
DQ4
4
DQ5
6
DQ6
14
DQ7
16
DQ8
23
DQ9
25
DQ10
35
DQ11
37
DQ12
20
DQ13
22
DQ14
36
DQ15
38
DQ16
43
DQ17
45
DQ18
55
DQ19
57
DQ20
44
DQ21
46
DQ22
56
DQ23
58
DQ24
61
DQ25
63
DQ26
73
DQ27
75
DQ28
62
DQ29
64
DQ30
74
DQ31
76
DQ32
123
DQ33
125
DQ34
135
DQ35
137
DQ36
124
DQ37
126
DQ38
134
DQ39
136
DQ40
141
DQ41
143
DQ42
151
DQ43
153
DQ44
140
DQ45
142
DQ46
152
DQ47
154
DQ48
157
DQ49
159
DQ50
173
DQ51
175
DQ52
158
DQ53
160
DQ54
174
DQ55
176
DQ56
179
DQ57
181
DQ58
189
DQ59
191
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
11
DQS1#
29
DQS2#
49
DQS3#
68
DQS4#
129
DQS5#
146
DQS6#
167
DQS7#
186
DQS0
13
DQS1
31
DQS2
51
DQS3
70
DQS4
131
DQS5
148
DQS6
169
DQS7
188
OTD0
114
OTD1
119
VREF
1
VSS
2
GND
202
RAS#
108
WE#
109
CAS#
113
CS0#
110
CS1#
115
CKE0
79
CKE1
80
CK0
30
CK0#
32
CK1
164
CK1#
166
DM0
10
DM1
26
DM2
52
DM3
67
DM4
130
DM5
147
DM6
170
DM7
185
SDA
195
SCL
197
VDDSPD
199
SA0
198
SA1
200
NC#50
50
NC#69
69
NC#83
83
NC#120
120
NC#163/TEST
163
VDD
81
VDD
82
VDD
87
VDD
88
VDD
95
VDD
96
VDD
103
VDD
104
VDD
111
VDD
112
VDD
117
VDD
118
VSS
3
VSS
8
VSS
9
VSS
12
VSS
15
VSS
18
VSS
21
VSS
24
VSS
27
VSS
28
VSS
33
VSS
34
VSS
39
VSS
40
VSS
41
VSS
42
VSS
47
VSS
48
VSS
53
VSS
54
VSS
59
VSS
60
VSS
65
VSS
66
VSS
71
VSS
72
VSS
77
VSS
78
VSS
121
VSS
122
VSS
127
VSS
128
VSS
132
VSS
133
VSS
138
VSS
139
VSS
144
VSS
145
VSS
149
VSS
150
VSS
155
VSS
156
VSS
161
VSS
162
VSS
165
VSS
168
VSS
171
VSS
172
VSS
177
VSS
178
VSS
183
VSS
184
VSS
187
VSS
190
VSS
193
VSS
196
GND
201
MH1
MH1
MH2
MH2
DM2
SKT-SODIMM200-37GP 62.10017.E21
DM2
SKT-SODIMM200-37GP 62.10017.E21
1
2 3
4
RN33
SRN56J -4-GP
RN33
SRN56J -4-GP
1
2
C
1
1
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
1
1
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2 3
4
RN12
SRN56J -4-GP
RN12
SRN56J -4-GP
1
2
C
1
1
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
1
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2 3
4
RN6
SRN56J -4-GP
RN6
SRN56J -4-GP
1
2 3
4
RN39
SRN56J -4-GP
RN39
SRN56J -4-GP
1
2 3
4
RN11
SRN56J -4-GP
RN11
SRN56J -4-GP
1
2
C
1
0
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
1
0
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_B_A12
M_B_A14
M_B_A11
M_B_A10
M_B_BS#0
M_CKE3
M_CKE2
M_B_A13
M_CLK_DDR#3
M_CLK_DDR3
M_CLK_DDR2
M_CLK_DDR#2
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DM0
M_B_DM1
M_B_DM2
ICH_SMBDATA
ICH_SMBCLK
M_B_DM3
M_B_DM4
M_CLK_DDR#2
M_CLK_DDR2
M_CLK_DDR3
M_CLK_DDR#3
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_DQ0
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_DQ1
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_BS#2
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_BS#0
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_ODT2
M_ODT3
M_B_DQS#0
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_BS#1
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_A8
M_B_A5
M_B_A6
M_B_A7
M_B_A3
M_B_A1
M_B_A2
M_B_A4 M_B_BS#1
M_B_A0
M_B_RAS#
M_CS2#
M_B_WE#
M_B_CAS#
M_ODT2
M_CS3#
M_ODT3
M_B_A9
M_B_BS#2
+1.8V_SUS
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+3.3V_RUN
+1.8V_SUS
+3.3V_RUN
+3.3V_RUN
+V_DDR_MCH_REF
M_B_DQS#[7..0]
M_B_DQ[63..0]
M_B_DM[7..0]
M_B_DQS[7..0]
M_B_A[14..0]
PM_EXTTS#1
M_CKE3
M_CS2#
M_CKE2
M_B_WE#
M_B_CAS#
M_CS3#
M_B_RAS#
ICH_SMBDATA
M_CLK_DDR#2
M_CLK_DDR2
M_CLK_DDR#3
M_CLK_DDR3
ICH_SMBCLK
M_B_BS#2
M_B_BS#0
M_B_BS#1
M_ODT2
M_ODT3
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DDRII-SODIMM SLOT2
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DDRII-SODIMM SLOT2
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DDRII-SODIMM SLOT2
Custom
<Core Design>
Layout Note:
Place near DM2
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT.
Layout Note:
Place these resistors close to DM2,
all trace length Max=1.5".
put near connector SSID = MEMORY
-1
1
2 3
4
RN5
SRN56J -4-GP
RN5
SRN56J -4-GP
1
2 3
4
RN32
SRN56J -4-GP
RN32
SRN56J -4-GP
1
2
C
4
1
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
4
1
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2 3
4
RN9
SRN56J -4-GP
RN9
SRN56J -4-GP
1
2
C
8
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
8
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
1
3
6
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
1
3
6
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
2 3
4
RN16
SRN56J -4-GP
RN16
SRN56J -4-GP
1 2 R57 0R0402-PAD R57 0R0402-PAD
1
2
C
7
5
D
U
M
M
Y
-
C
2
C
7
5
D
U
M
M
Y
-
C
2
1
2
C
1
2
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
2
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
1
1
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
1
1
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
C
1
0
7
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
1
0
7
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
2
C200
SCD1U16V2KX-3GP
C200
SCD1U16V2KX-3GP
1
2
C
4
3
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
4
3
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2 3
4
RN36
SRN56J -4-GP
RN36
SRN56J -4-GP
1
2
C
4
1
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
1
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
4
0
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
0
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
9
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
9
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
1
0
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
0
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
7
1
D
U
M
M
Y
-
C
2
C
7
1
D
U
M
M
Y
-
C
2
1
2 3
4
RN34
SRN56J -4-GP
RN34
SRN56J -4-GP
1
2
C
1
5
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
1
5
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2 3
4
RN7
SRN56J -4-GP
RN7
SRN56J -4-GP
1
2 3
4
RN40
SRN56J -4-GP
RN40
SRN56J -4-GP
1
2 3
4
RN27
SRN56J -4-GP
RN27
SRN56J -4-GP
1
2
T
C
4
S
T
2
2
0
U
2
D
5
V
B
M
-
L
G
P
DY
T
C
4
S
T
2
2
0
U
2
D
5
V
B
M
-
L
G
P
DY
1
2
C
1
1
2
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
1
1
2
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
2 3
4
RN30
SRN56J -4-GP
RN30
SRN56J -4-GP
1
2
C201
SC2D2U10V3KX-1GP
C201
SC2D2U10V3KX-1GP
1
2
C
4
0
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
4
0
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
C
1
3
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
3
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
5
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
5
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2 3
4
RN13
SRN56J -4-GP
RN13
SRN56J -4-GP
1
2
C
1
0
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
0
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2 3
4
RN14
SRN56J -4-GP
RN14
SRN56J -4-GP
1
2
C
9
7
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
DY
C
9
7
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
DY
1
2
C
1
9
3
D
U
M
M
Y
-
C
2
C
1
9
3
D
U
M
M
Y
-
C
2
1
2
C
5
6
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
DY
C
5
6
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
DY
1
2 3
4
RN15
SRN56J -4-GP
RN15
SRN56J -4-GP
1
2
C
1
9
7
D
U
M
M
Y
-
C
2
C
1
9
7
D
U
M
M
Y
-
C
2
1
2
EC12
SCD1U25V3KX-GP
EC12
SCD1U25V3KX-GP
1
2
C
4
0
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
0
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
4
2
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
2
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2 3
4
RN38
SRN56J -4-GP
RN38
SRN56J -4-GP
1
2
C
4
1
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
1
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
1
0
5
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
1
0
5
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
2
C
4
1
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
1
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1 2 R54 0R0402-PAD R54 0R0402-PAD
A0
102
A1
101
A2
100
A3
99
A4
98
A5
97
A6
94
A7
92
A8
93
A9
91
A10/AP
105
A11
90
A12
89
A13
116
A14
86
A15
84
A16_BA2
85
BA0
107
BA1
106
DQ0
5
DQ1
7
DQ2
17
DQ3
19
DQ4
4
DQ5
6
DQ6
14
DQ7
16
DQ8
23
DQ9
25
DQ10
35
DQ11
37
DQ12
20
DQ13
22
DQ14
36
DQ15
38
DQ16
43
DQ17
45
DQ18
55
DQ19
57
DQ20
44
DQ21
46
DQ22
56
DQ23
58
DQ24
61
DQ25
63
DQ26
73
DQ27
75
DQ28
62
DQ29
64
DQ30
74
DQ31
76
DQ32
123
DQ33
125
DQ34
135
DQ35
137
DQ36
124
DQ37
126
DQ38
134
DQ39
136
DQ40
141
DQ41
143
DQ42
151
DQ43
153
DQ44
140
DQ45
142
DQ46
152
DQ47
154
DQ48
157
DQ49
159
DQ50
173
DQ51
175
DQ52
158
DQ53
160
DQ54
174
DQ55
176
DQ56
179
DQ57
181
DQ58
189
DQ59
191
DQ60
180
DQ61
182
DQ62
192
DQ63
194
NC#50
50
NC#69
69
NC#83
83
NC#120
120
NC#163/TEST
163
CS0#
110
CS1#
115
CKE0
79
CKE1
80
RAS#
108
CAS#
113
WE#
109
SCL
197
SDA
195
ODT0
114
ODT1
119
VREF
1
GND
201
DQS0
13
DQS1
31
DQS2
51
DQS3
70
DQS4
131
DQS5
148
DQS6
169
DQS7
188
DQS0#
11
DQS1#
29
DQS2#
49
DQS3#
68
DQS4#
129
DQS5#
146
DQS6#
167
DQS7#
186
DM0
10
DM1
26
DM2
52
DM3
67
DM4
130
DM5
147
DM6
170
DM7
185
CK0
30
CK0#
32
CK1
164
CK1#
166
SA0
198
SA1
200
VDD_SPD
199
VDD
81
VDD
82
VDD
87
VDD
88
VDD
95
VDD
96
VDD
103
VDD
104
VDD
111
VDD
112
VDD
117
VDD
118
VSS
2
VSS
3
VSS
8
VSS
9
VSS
12
VSS
15
VSS
18
VSS
21
VSS
24
VSS
27
VSS
28
VSS
33
VSS
34
VSS
39
VSS
40
VSS
41
VSS
42
VSS
47
VSS
48
VSS
53
VSS
54
VSS
59
VSS
60
VSS
65
VSS
66
VSS
71
VSS
72
VSS
77
VSS
78
VSS
121
VSS
122
VSS
127
VSS
128
VSS
132
VSS
133
VSS
138
VSS
139
VSS
144
VSS
145
VSS
149
VSS
150
VSS
155
VSS
156
VSS
161
VSS
162
VSS
165
VSS
168
VSS
171
VSS
172
VSS
177
VSS
178
VSS
183
VSS
184
VSS
187
VSS
190
VSS
193
VSS
196
GND
202
MH1
MH1
MH2
MH2
DM1
SKT-SODIMM200-38GP
62.10017.E31
DM1
SKT-SODIMM200-38GP
62.10017.E31
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQA#
PCI_PLOCK#
PCI_PIRQG#
PCI_PIRQE#
PCI_PIRQH#
PCI_PLTRST#
PCI_REQ0#
PCI_REQ2#
PCI_REQ1#
PCI_PIRQF#
PCI_REQ3#
PCI_PIRQA#
PCI_GNT0#
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_SERR#
PCI_PERR#
PCI_STOP#
PCI_TRDY#
PCI_TRDY#
PCI_GNT3#
SPI_CLK
SPI_MOSI_R
SPI_CS#0
USB_OC#1
SPI_MOSO_R
USB_OC#11
USB_OC#7
USB_OC#9
USB_OC#8
USB_OC#0
USB_OC#4
USB_OC#5
USB_OC#6
DMI_IRCOMP_R
USB_RBIAS_PN
USB_OC#10
SPI_MOSI
USB_OC#3
SPI_CLK_R
USB_OC#2
SPI_CS#1
SPI_CS#0_R
SPI_MOSO
USB_OC#11
USB_OC#2
USB_OC#1 USB_OC#5
USB_OC#4
USB_OC#7
USB_OC#6
USB_OC#0
PLT_RST#
PCI_PLTRST#
PCI_GNT0#
PCI_GNT3#
SPI_CS#1
ICH_GND1
ICH_GND2
ICH_GND4
ICH_GND3
USB_PN9
USB_PP9
SPI_HOLD#
SPI_WP#
SPI_MOSO
SPI_CS#0
SPI_MOSI
SPI_CLK
PCI_GNT1#
PCI_GNT2#
PCIRST1#
PCIE_C_TXN2
PCIE_C_TXP2
ICH_PME#
PCI_DEVSEL#
PCI_IRDY#
PCIE_C_TXN5
PCIE_C_TXP5
PCIE_C_TXN3
PCIE_C_TXP3
USB_PN10
USB_PP10
USB_PN3
USB_PP3
PCI_REQ2#
PCI_STOP#
PCI_FRAME#
PCI_REQ1#
PCI_PERR#
PCI_PIRQD#
PCI_REQ3#
PCI_PIRQF#
PCI_PLOCK#
PCI_PIRQC#
PCI_SERR#
PCI_PIRQE#
PCI_PIRQB#
PCI_PIRQG#
PCI_PIRQH#
PCI_REQ0#
USB_OC#3
USB_OC#8
USB_OC#10
USB_OC#9
USB_PN5
USB_PP5
USB_PN8
USB_PP8
+3.3V_RUN
+1.5V_RUN
+3.3V_ALW
+3.3V_ALW +3.3V_ALW
+3.3V_RUN
+3.3V_RUN
CLK_PCI_ICH
CLK_PCIE_ICH#
CLK_PCIE_ICH
DMI_RXN3
DMI_RXP3
DMI_RXN2
DMI_RXP2
DMI_RXN1
DMI_RXP1
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI_TXN1
DMI_TXP1
DMI_TXN2
DMI_TXP2
DMI_TXN3
DMI_TXP3
PLT_RST#
USB_PP0
USB_PN0
USB_OC#0
PCIE_TXN2
PCIE_RXN2
PCIE_RXP2
PCIE_TXP2
PCIE_RXN5
PCIE_RXP5
PCIE_TXN5
PCIE_TXP5
PCIE_TXN3
PCIE_RXN3
PCIE_RXP3
PCIE_TXP3
USB_PP10
USB_PN10
USB_PP1
USB_PN1
USB_OC#1
USB_OC#2
USB_PP2
USB_PN2
USB_PP4
USB_PN4
USB_PP6
USB_PN6
USB_PP11
USB_PN11
USB_PP7
USB_PN7
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
ICH9-PCI/PCIE/DMI/USB/GND(1/4)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
10
11
USB3
RESERVED
RESERVED
RESERVED
CAMERA
RESERVED
NEW CARD
USB1
USB
Pair
4 MINI CARD
5
0
2
3
1
Device
6
7
8
9
BLUETOOTH
USB2
0 1
1 1
A16 swap override strap
BOOT BIOS Strap
SPI _CS#1 BOOT BI OS Locat i on PCI _GNT#0
PCI_GNT#3
low = A16 swap override enable
high = default
0 1 SPI
LPC(Default)
PCI
NCTF PIN
BlUETOOTH
USB1
New Card
CAMERA
Mini Card
Card Reader
SSID = ICH
New Card
LAN
Card Reader
USB3
USB2
1
TP135 TP135
B
1
A
2
GND
3
Y
4
VCC
5
U32
74LVC1G08GW-1-GP
DY
U32
74LVC1G08GW-1-GP
DY
1 TP251 TP251
1 2
R442 1KR2J -1-GP
DY
R442 1KR2J -1-GP
DY
1
2
3
4 5
6
7
8
RN55
SRN8K2J -4-GP
RN55
SRN8K2J -4-GP
1 2 C497 SCD1U16V2KX-3GP C497 SCD1U16V2KX-3GP
1
TP178 TP178
AD0
D11
AD1
C8
AD2
D9
AD3
E12
AD4
E9
AD5
C9
AD6
E10
AD7
B7
AD8
C7
AD9
C5
AD10
G11
AD11
F8
AD12
F11
AD13
E7
AD14
A3
AD15
D2
AD16
F10
AD17
D5
AD18
D10
AD19
B3
AD20
F7
AD21
C3
AD22
F3
AD23
F4
AD24
C1
AD25
G7
AD26
H7
AD27
D1
AD28
G5
AD29
H6
AD30
G1
AD31
H3
REQ0#
F1
GNT0#
G4
REQ1#/GPIO50
B6
GNT1#/GPIO51
A7
REQ2#/GPIO52
F13
GNT2#/GPIO53
F12
REQ3#/GPIO54
E6
GNT3#/GPIO55
F6
C/BE0#
D8
C/BE1#
B4
C/BE2#
D6
C/BE3#
A5
IRDY#
D3
PAR
E3
PCIRST#
R1
DEVSEL#
C6
PERR#
E4
PLOCK#
C2
SERR#
J 4
STOP#
A4
TRDY#
F5
FRAME#
D7
PLTRST#
C14
PCICLK
D4
PME#
R2
PIRQA#
J 5
PIRQB#
E1
PIRQC#
J 6
PIRQD#
C4
PIRQH#/GPIO5
G2
PIRQG#/GPIO4
F2
PIRQF#/GPIO3
K6
PIRQE#/GPIO2
H4
PCI
Interrupt I/F
2 OF 6
U25B
ICH9M-GP-NF
PCI
Interrupt I/F
2 OF 6
U25B
ICH9M-GP-NF
1
2
3
4 5
6
7
8
RN57
SRN8K2J -4-GP
RN57
SRN8K2J -4-GP
CS#
1
SO
2
WP#
3
GND
4
VCC
8
HOLD#
7
SCLK
6
SI
5
U27
MX25L512MC-12G-GP
DY
U27
MX25L512MC-12G-GP
DY
1 2
R245
10KR2J -3-GP
DY
R245
10KR2J -3-GP
DY
1
TP127 TP127
1 2 R262
0R0402-PAD
R262
0R0402-PAD
1 2 R237 15R2J -GP
DY
R237 15R2J -GP
DY
1
2
3
4 5
6
7
8
RN56
SRN8K2J -4-GP
RN56
SRN8K2J -4-GP
1
TP253 TP253
1
TP249 TP249
1
TP250 TP250
1
2
3
4 5
6
7
8
RN25
SRN8K2J -4-GP
RN25
SRN8K2J -4-GP
1 2
R441 1KR2J -1-GP DY R441 1KR2J -1-GP DY
1
2
R240
10KR2J -3-GP
DY
R240
10KR2J -3-GP
DY
PERN1
N29
PERP1
N28
PETN1
P27
PETP1
P26
PERN2
L29
PERP2
L28
PETN2
M27
PETP2
M26
PERN3
J 29
PERP3
J 28
PETN3
K27
PETP3
K26
PERN4
G29
PERP4
G28
PETN4
H27
PETP4
H26
PERN5
E29
PERP5
E28
PETN5
F27
PETP5
F26
PERN6/GLAN_RXN
C29
PERP6/GLAN_RXP
C28
PETN6/GLAN_TXN
D27
PETP6/GLAN_TXP
D26
DMI0RXN
V27
DMI0RXP
V26
DMI0TXN
U29
DMI0TXP
U28
DMI1RXN
Y27
DMI1RXP
Y26
DMI1TXN
W29
DMI1TXP
W28
DMI2RXN
AB27
DMI2RXP
AB26
DMI2TXN
AA29
DMI2TXP
AA28
DMI3RXN
AD27
DMI3RXP
AD26
DMI3TXN
AC29
DMI3TXP
AC28
DMI_CLKN
T26
DMI_CLKP
T25
DMI_ZCOMP
AF29
DMI_IRCOMP
AF28
OC0#/GPIO59
N4
OC1#/GPIO40
N5
OC2#/GPIO41
N6
OC3#/GPIO42
P6
OC4#/GPIO43
M1
OC5#/GPIO29
N2
OC6#/GPIO30
M4
OC7#/GPIO31
M3
USBP0N
AC5
USBP0P
AC4
USBP1N
AD3
USBP1P
AD2
USBP2N
AC1
USBP2P
AC2
USBP3N
AA5
USBP3P
AA4
USBP4N
AB2
USBP4P
AB3
USBP5N
AA1
USBP5P
AA2
USBP6N
W5
USBP6P
W4
USBP7N
Y3
USBP7P
Y2
USBRBIAS#
AG1
USBRBIAS
AG2
SPI_CLK
D23
SPI_CS0#
D24
SPI_CS1#/GPIO58/CLGPIO6
F23
SPI_MOSI
D25
SPI_MISO
E23
OC8#/GPIO44
N3
OC9#/GPIO45
N1
USBP8P
W2
USBP8N
W1
USBP9N
V2
USBP9P
V3
USBP10N
U5
USBP11N
U1
USBP10P
U4
USBP11P
U2
OC10#/GPIO46
P5
OC11#/GPIO47
P3
P
C
I
-
E
x
p
r
e
s
s
D
i
r
e
c
t

M
e
d
i
a

I
n
t
e
r
f
a
c
e
USB
S
P
I
4 OF 6
U25D
ICH9M-GP-NF
P
C
I
-
E
x
p
r
e
s
s
D
i
r
e
c
t

M
e
d
i
a

I
n
t
e
r
f
a
c
e
USB
S
P
I
4 OF 6
U25D
ICH9M-GP-NF
1
2
3
4 5
6
7
8
RN26
SRN8K2J -4-GP
RN26
SRN8K2J -4-GP
1
2
3
4 5
6
7
8
RN58
SRN8K2J -4-GP
RN58
SRN8K2J -4-GP
1
TP138 TP138
1 2
R443 1KR2J -1-GP
DY
R443 1KR2J -1-GP
DY
1
2
C315
SCD1U16V2KX-3GP
DY
C315
SCD1U16V2KX-3GP
DY
1
TP248 TP248
1
TP177 TP177
1
TP125 TP125
1 2 R230 15R2J -GP
DY
R230 15R2J -GP
DY
VSS
AA26
VSS
AA27
VSS
AA3
VSS
AA6
VSS
AB1
VSS
AA23
VSS
AB28
VSS
AB29
VSS
AB4
VSS
AB5
VSS
AC17
VSS
AC26
VSS
AC27
VSS
AC3
VSS
AD1
VSS
AD10
VSS
AD12
VSS
AD13
VSS
AD14
VSS
AD17
VSS
AD18
VSS
AD21
VSS
AD28
VSS
AD29
VSS
AD4
VSS
AD5
VSS
AD6
VSS
AD7
VSS
AD9
VSS
AE12
VSS
AE13
VSS
AE14
VSS
AE16
VSS
AE17
VSS
AE2
VSS
AE20
VSS
AE24
VSS
AE3
VSS
AE4
VSS
AE6
VSS
AE9
VSS
AF13
VSS
AF16
VSS
AF18
VSS
AF22
VSS
AH26
VSS
AF26
VSS
AF27
VSS
AF5
VSS
AF7
VSS
AF9
VSS
AG13
VSS
AG16
VSS
AG18
VSS
AG20
VSS
AG23
VSS
AG3
VSS
AG6
VSS
AG9
VSS
AH12
VSS
AH14
VSS
AH17
VSS
AH19
VSS
AH2
VSS
AH22
VSS
AH25
VSS
AH28
VSS
AH5
VSS
AH8
VSS
AJ 12
VSS
AJ 14
VSS
AJ 17
VSS
AJ 8
VSS
B11
VSS
B14
VSS
B17
VSS
B2
VSS
B20
VSS
B23
VSS
B5
VSS
B8
VSS
C26
VSS
C27
VSS
E11
VSS
E14
VSS
E18
VSS
E2
VSS
E21
VSS
E24
VSS
E5
VSS
E8
VSS
F16
VSS
F28
VSS
F29
VSS
G12
VSS
G14
VSS
G18
VSS
G24
VSS
G26
VSS
G27
VSS
G8
VSS
H2
VSS
H23
VSS
H28
VSS
H29
VSS
H5
VSS
J 23
VSS
J 26
VSS
J 27
VSS
AC22
VSS
K28
VSS
K29
VSS
L13
VSS
L15
VSS
L2
VSS
L26
VSS
L27
VSS
L5
VSS
L7
VSS
M12
VSS
M13
VSS
M14
VSS
M15
VSS
M16
VSS
M17
VSS
M23
VSS
M28
VSS
M29
VSS
N11
VSS
N12
VSS
N13
VSS
N14
VSS
N15
VSS
N16
VSS
N17
VSS
N18
VSS
N26
VSS
N27
VSS
P12
VSS
P13
VSS
P14
VSS
P15
VSS
P16
VSS
P17
VSS
P2
VSS
P23
VSS
P28
VSS
P29
VSS
P4
VSS
P7
VSS
R11
VSS
R12
VSS
R13
VSS
R14
VSS
R15
VSS
R16
VSS
R17
VSS
R18
VSS
R28
VSS
T12
VSS
T13
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
T23
VSS
U12
VSS
U13
VSS
U14
VSS
U15
VSS
U16
VSS
U17
VSS
AD23
VSS
U26
VSS
U27
VSS
U3
VSS
A1
VSS
A2
VSS
A28
VSS
A29
VSS
AH1
VSS
AH29
VSS
AJ 1
VSS
AJ 2
VSS
AJ 28
VSS
AJ 29
VSS
B1
VSS
B29
VSS
V1
VSS
V13
VSS
V15
VSS
V23
VSS
V28
VSS
G21
VSS
V29
VSS
V4
VSS
V5
VSS
W26
VSS
W27
VSS
W3
VSS
Y1
VSS
Y28
VSS
Y29
VSS
Y4
VSS
Y5
VSS
AG28
VSS
AH6
VSS
AF2
VSS
B26
VSS
B25
5 OF 6
U25E
ICH9M-GP-NF
5 OF 6
U25E
ICH9M-GP-NF
1
TP246 TP246
1
TP247 TP247
1 2 R241 15R2J -GP
DY
R241 15R2J -GP
DY
1
TP261 TP261
1 2
R208
22R2F-1-GP
R208
22R2F-1-GP
1 2 R233 15R2J -GP
DY
R233 15R2J -GP
DY
1
2
3
4
5 6
7
8
9
10
RP1
SRN10KJ -L3-GP
RP1
SRN10KJ -L3-GP
1
2
R429
24D9R2F-L-GP
R429
24D9R2F-L-GP
1
TP179 TP179
1
TP252 TP252
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_FERR#_R
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
H_DPRSTP#
H_THERMTRIP_R
SATARBIAS
SATA_LED#
SATA_TXN0_C
SATA_TXP0_C
SATA_TXN1_C
SATA_TXP1_C
GLAN_COMP
ACZ_SDATAOUT_R
ACZ_BIT_CLK
ICH_RTCX2
ICH_RTCX1
ICH_RTCRST#
SM_INTRUDER#
ACZ_SYNC_R
ICH_INTVRMEN
ACZ_RST#_R
SRTCRST#
ICH_INTVRMEN
SM_INTRUDER#
ICH_RTCRST#
LAN100_SLP
LAN100_SLP
H_THERMTRIP_1
GPIO56
LPC_LAD[0..3]
+1.05V_VCCP
+1.5V_RUN
+RTC_CELL
+3.3V_RUN
+3.3V_RUN
+RTC_CELL
+RTC_CELL
+1.05V_VCCP
CLK_PCIE_SATA#
LPC_LAD[0..3]
KBRCIN#
LPC_LFRAME#
H_IGNNE#
H_INIT#
H_INTR
H_STPCLK#
H_NMI
H_SMI#
KA20GATE
H_FERR#
H_A20M#
H_DPRSTP#
H_DPSLP#
H_PWRGOOD
SATA_TXN1
SATA_TXP1
SATA_RXN1_C
SATA_RXP1_C
SATA_TXN0
SATA_TXP0
SATA_RXN0_C
SATA_RXP0_C
H_THRMTRIP#
ICH_SDOUT_CODEC
ICH_AZ_CODEC_RST#
ICH_AZ_CODEC_BITCLK
ICH_AZ_CODEC_SYNC
CLK_PCIE_SATA
ICH_SDIN_CODEC
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
ICH9-LAN/HDA/SATA/LPC(2/4)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
integrated VccSus1_05,VccSus1_5,VccCL1_5
integrated VccLan1_05VccCL1_05
INTVRMEN
LAN100_SLP
High=Enable Low=Disable
High=Enable Low=Disable
Place within 500 mil of SB.
Place within 500 mils from SB.
HDD
ODD
Placed Within 2" from SB.
SSID = ICH
A00.08/0903
SB
1 2
R448
330KR2F-L-GP
R448
330KR2F-L-GP
1
2
C526
SC1U10V3KX-3GP
C526
SC1U10V3KX-3GP
1
2
C227
SC4D7P50V2CN-1GP
DY
C227
SC4D7P50V2CN-1GP
DY
1 2 R167
0R0402-PAD
R167
0R0402-PAD
1
2
C520
SC12P50V2J N-3GP
C520
SC12P50V2J N-3GP
1 2
R438
10KR2J -3-GP
DY
R438
10KR2J -3-GP
DY
1 2
R164
56R2J -4-GP
R164
56R2J -4-GP
1 2
R461
20KR2F-L-GP
R461
20KR2F-L-GP
1 2
R456
20KR2F-L-GP
R456
20KR2F-L-GP
1
2
C522
SC12P50V2J N-3GP
C522
SC12P50V2J N-3GP
1 2
R187 24D9R2F-L-GP R187 24D9R2F-L-GP
2
1
G49
GAP-OPEN
G49
GAP-OPEN
RTCX1
C23
RTCX2
C24
INTVRMEN
B22
INTRUDER#
C22
GLAN_CLK
E25
LAN_RSTSYNC
C13
LAN_RXD0
F14
LAN_RXD1
G13
LAN_RXD2
D14
LAN_TXD0
D13
LAN_TXD1
D12
LAN_TXD2
E13
HDA_BIT_CLK
AF6
HDA_SYNC
AH4
HDA_RST#
AE7
HDA_SDIN0
AF4
HDA_SDIN1
AG4
HDA_SDIN2
AH3
HDA_SDOUT
AG5
SATALED#
AG8
SATA0RXN
AJ 16
SATA0RXP
AH16
SATA0TXN
AF17
SATA0TXP
AG17
SATA1RXN
AH13
SATA1RXP
AJ 13
SATA1TXN
AG14
SATA1TXP
AF14
SATA_CLKN
AH18
SATA_CLKP
AJ 18
SATARBIAS#
AJ 7
SATARBIAS
AH7
FWH0/LAD0
K5
FWH1/LAD1
K4
FWH2/LAD2
L6
FWH3/LAD3
K2
LDRQ0#
J 3
LDRQ1#/GPIO23
J 1
FWH4/LFRAME#
K3
A20GATE
N7
A20M#
AJ 27
DPRSTP#
AJ 25
DPSLP#
AE23
FERR#
AJ 26
CPUPWRGD
AD22
IGNNE#
AF25
INIT#
AE22
INTR
AG25
RCIN#
L3
SMI#
AF24
NMI
AF23
STPCLK#
AH27
THRMTRIP#
AG26
RTCRST#
A25
GLAN_DOCK#/GPIO56
B10
GLAN_COMPO
B27
GLAN_COMPI
B28
HDA_SDIN3
AE5
SATA4TXN
AG12
SATA4RXN
AH11
SATA4TXP
AF12
SATA4RXP
AJ 11
PECI
AG27
HDA_DOCK_EN#/GPIO33
AG7
HDA_DOCK_RST#/GPIO34
AE8
LAN100_SLP
A22
SATA5RXN
AH9
SATA5RXP
AJ 9
SATA5TXN
AE10
SATA5TXP
AF10
SRTCRST#
F20
R
T
C
L
A
N

/

G
L
A
N
I
H
D
A
S
A
T
A
L
P
C
C
P
U
1 OF 6
U25A
ICH9M-GP-NF
R
T
C
L
A
N

/

G
L
A
N
I
H
D
A
S
A
T
A
L
P
C
C
P
U
1 OF 6
U25A
ICH9M-GP-NF
1 2 R444 24D9R2F-L-GP R444 24D9R2F-L-GP
1 2 R197 33R2J -2-GP R197 33R2J -2-GP
1 2
R506
10KR2J -3-GP
DY
R506
10KR2J -3-GP
DY
1
2
C307
SC1U10V3KX-3GP
C307
SC1U10V3KX-3GP
1 2 R205 33R2J -2-GP R205 33R2J -2-GP
1 2
R165 54D9R2F-L1-GP R165 54D9R2F-L1-GP
1 2
R242
10KR2J -3-GP
DY
R242
10KR2J -3-GP
DY
1 2 R194 33R2J -2-GP R194 33R2J -2-GP
1 2
R166 56R2J -4-GP R166 56R2J -4-GP
1 2
R264
1MR2J -1-GP
R264
1MR2J -1-GP
1 2
R271
330KR2F-L-GP
R271
330KR2F-L-GP
1
TP235 TP235
1 2 R445 10MR2J -L-GP R445 10MR2J -L-GP
1 2 R201 33R2J -2-GP R201 33R2J -2-GP
1
2
C230
SC4D7P50V2CN-1GP
DY
C230
SC4D7P50V2CN-1GP
DY
1 2
R163
56R2J -4-GP
R163
56R2J -4-GP
1
2 3
4
X4
X-32D768KHZ-38GPU
X4
X-32D768KHZ-38GPU
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM_BATLOW#_R
PM_SLP_S5#
ICH_TP3
ICH_TP7
H_STP_PCI#
VGATE_PWRGD
H_STP_CPU#
SMB_ALERT#
ITP_DBRESET#_1
LINKALERT#
CL_VREF1_ICH
ICH_RI#
PM_SLP_M#
ICH_SUSCLK
GPIO18
GPIO22
GPIO27
GPIO28
ME_EC_CLK1
ME_EC_DATA1
GPIO20
GPIO48
SATA0GP
GPIO24
GPIO22
INT_SERIRQ
INT_SERIRQ
GPIO17
SATA1GP
SATA2GP
SATA3GP
GPIO26
M_PWROK
LAN_RST#1
PM_PWROK
PCIE_WAKE# PCIE_WAKE#
DPRSLPVR
PM_PWROK LINKALERT#
PM_CLKRUN#
CLKSATAREQ#
GPIO18
LAN_RST#1
M_PWROK
SMB_DATA
SMB_CLK
RSMRST#_KBC
ECSCI#
ECSMI#
PM_SLP_S3#
SB_SLP_S3#
SB_SLP_S3#
SMB_CLK
SMB_DATA
ME_EC_CLK1
ME_EC_DATA1
SMB_ALERT#
PM_BATLOW#_R
ITP_DBRESET#_1
ICH_RI#
H_STP_PCI#
H_STP_CPU#
ECSCI#
ECSMI#
ECSWI#
ECSWI#
CLK_SEL0
CLK_SEL1
CLK_SEL0
CLK_SEL1
GPIO12
SUS_STAT#
iTPM_EN
iTPM_EN
SATA0GP
SATA1GP
SATA2GP
SATA3GP
CL_VREF0_ICH
GPIO10
GPIO10
GPIO13
GPIO13
GPIO14
GPIO14
GPIO17
GPIO48
+3.3V_ALW +3.3V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
H_STP_PCI#
PM_SYNC#
H_STP_CPU#
THERM_SCI#
PM_CLKRUN#
MCH_ICH_SYNC#
DPRSLPVR
PM_SLP_S4#
CLK_14M_ICH
CLK_48M_ICH
CL_DATA0
CL_CLK0
CK_PWRGD
CLKSATAREQ#
PM_PWRBTN#
SMB_DATA
SMB_CLK
INT_SERIRQ
SB_SPKR
ICH_SUSCLK
M_PWROK
RSMRST#_KBC
PCIE_WAKE#
CL_RST#0
PM_PWROK
ICH_SMBCLK
ICH_SMBDATA
PM_SLP_S3#
ITP_DBRESET#_1
ECSCI#
ECSWI#
ECSMI#
VGATE_PWRGD
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
ICH9-GPIO/PM/CL(3/4)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
SSID = ICH
0
1
1
1
CLK Gen
Sel ec t
CLK Gen
sel ec t
CLK_SEL0
Sel i go
Real t ek
I CS
CLL_SEL1
1
0
i TPM
Sel ec t
i TPM_EN
1 = Enabl e
0 = Di sabl e Di sabl e X X
1
2
R179
10KR2J -3-GP
DY
R179
10KR2J -3-GP
DY
1
TP259 TP259
1 2 R439
0R0402-PAD
R439
0R0402-PAD
1
TP181 TP181
1 2 R451 10KR2J -3-GP R451 10KR2J -3-GP
1
TP263 TP263
1 TP236 TP236
1 2 R265
0R0402-PAD
R265
0R0402-PAD
1 2 R266 0R0402-PAD R266 0R0402-PAD
1 2 R263 0R2J -2-GP
DY
R263 0R2J -2-GP
DY
1 2 R504 10KR2J -3-GP
DY
R504 10KR2J -3-GP
DY
1 TP184 TP184
1 2 R247 10KR2J -3-GP R247 10KR2J -3-GP
1 TP262 TP262
1
2 3
4
RN60
SRN2K2J -1-GP
RN60
SRN2K2J -1-GP
1
2
R446
100KR2J -1-GP
R446
100KR2J -1-GP
1
2
R185
10KR2J -3-GP
DY
R185
10KR2J -3-GP
DY
1 2 R238 10KR2J -3-GP R238 10KR2J -3-GP
1
TP183 TP183
1
2
R
4
5
0
4
5
3
R
2
F
-
1
-
G
P
R
4
5
0
4
5
3
R
2
F
-
1
-
G
P
1
TP186 TP186
1 2 R424 10KR2J -3-GP R424 10KR2J -3-GP
1 2 R455 10KR2J -3-GP R455 10KR2J -3-GP
1
2 3
4
RN59
SRN10KJ -5-GP
RN59
SRN10KJ -5-GP
1
2
R427
10KR2J -3-GP
DY
R427
10KR2J -3-GP
DY
1 TP168 TP168
1
TP182 TP182
1
2
R449
100KR2J -1-GP
DY
R449
100KR2J -1-GP
DY
1
2
R454
3K24R2F-GP
R454
3K24R2F-GP
1
2 3
4
RN62
SRN2K2J -1-GP
RN62
SRN2K2J -1-GP
1 2 R447 10KR2J -3-GP R447 10KR2J -3-GP
SATA0GP/GPIO21
AH23
SATA1GP/GPIO19
AF19
SATA4GP/GPIO36
AE21
SATA5GP/GPIO37
AD20
SMBCLK
G16
SMBDATA
A13
LINKALERT#/GPIO60/CLGPIO4
E17
SMLINK0
C17
SMLINK1
B18
SUS_STAT#/LPCPD#
R4
SYS_RESET#
G19
PMSYNC#/GPIO0
M6
TACH1/GPIO1
AG19
TACH2/GPIO6
AH21
TACH3/GPIO7
AG21
GPIO8
A21
LAN_PHY_PWR_CTRL/GPIO12
C12
SMBALERT#/GPIO11
A17
TACH0/GPIO17
AE18
GPIO18
K1
SCLOCK/GPIO22
AJ 22
SATACLKREQ#/GPIO35
L1
STP_PCI#
A14
STP_CPU#
E19
SLOAD/GPIO38
AE19
SDATAOUT0/GPIO39
AG22
CLKRUN#
L4
SDATAOUT1/GPIO48
AF21
WAKE#
E20
SERIRQ
M5
THRM#
AJ 23
VRMPWRGD
D21
CLK14
H1
CLK48
AF3
SUSCLK
P1
SLP_S3#
C16
SLP_S4#
E16
SLP_S5#
G17
PWROK
G20
DPRSLPVR/GPIO16
M2
BATLOW#
B13
PWRBTN#
R3
LAN_RST#
D20
RSMRST#
D22
RI#
F19
S4_STATE#/GPIO26
C10
GPIO27
A9
GPIO28
D19
SST
A20
CK_PWRGD
R5
CLPWROK
R6
SLP_M#
B16
GPIO20
AF8
CL_CLK0
F24
CL_CLK1
B19
CL_DATA0
F22
CL_DATA1
C19
CL_VREF0
C25
CL_VREF1
A19
CL_RST0#
F21
GPIO10/SUS_PWR_ACK
C18
GPIO9/WOL_EN
C20
GPIO14/AC_PRESENT
C11
GPIO24/MEM_LED
A16
SPKR
M7
TP3
B21
CL_RST1#
D18
GPIO49
AH24
ENERGY_DETECT/GPIO13
C21
GPIO57/CLGPIO5
A8
PWM2
AJ 21
PWM0
AH20
MCH_SYNC#
AJ 24
PWM1
AJ 20
S
A
T
A
S
M
B
S
Y
S
G
P
I
O
G
P
I
O
G
P
I
O
C
l
o
c
k
s
P
o
w
e
r

M
G
T
C
o
n
t
r
o
l
l
e
r

L
i
n
k
M
I
S
C
3 OF 6
U25C
ICH9M-GP-NF
S
A
T
A
S
M
B
S
Y
S
G
P
I
O
G
P
I
O
G
P
I
O
C
l
o
c
k
s
P
o
w
e
r

M
G
T
C
o
n
t
r
o
l
l
e
r

L
i
n
k
M
I
S
C
3 OF 6
U25C
ICH9M-GP-NF
1
2
C
3
0
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
3
0
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1 2 R505 10KR2J -3-GP
DY
R505 10KR2J -3-GP
DY
1 2 R180 8K2R2J -3-GP
DY
R180 8K2R2J -3-GP
DY
1 TP257 TP257
1 2 R503 10KR2J -3-GP
DY
R503 10KR2J -3-GP
DY
1
2 3
4
RN63
SRN10KJ -5-GP
DY
RN63
SRN10KJ -5-GP
DY
1
2
R
2
6
1
4
5
3
R
2
F
-
1
-
G
P
DY
R
2
6
1
4
5
3
R
2
F
-
1
-
G
P
DY
1 2 R440 10KR2J -3-GP R440 10KR2J -3-GP
1 2 R421 10KR2J -3-GP R421 10KR2J -3-GP
1
TP180 TP180
1
2
3
4 5
6
7
8
RN61
SRN8K2J -4-GP
RN61
SRN8K2J -4-GP
1
2
3 4
5
6
U56
2N7002SPT
U56
2N7002SPT
1 2 R501 10KR2J -3-GP
DY
R501 10KR2J -3-GP
DY
1
2
R423
10KR2J -3-GP
DY
R423
10KR2J -3-GP
DY
1 TP123 TP123
1
TP124 TP124
1 2 R502 10KR2J -3-GP
DY
R502 10KR2J -3-GP
DY
1
2
3
4 5
6
7
8
RN49
SRN10KJ -6-GP
RN49
SRN10KJ -6-GP
1 2 R232 100KR2J -1-GP
DY
R232 100KR2J -1-GP
DY
B
1
A
2
GND
3
Y
4
VCC
5
U29
74LVC1G08GW-1-GP
DY
U29
74LVC1G08GW-1-GP
DY
1 2 R235 8K2R2J -3-GP R235 8K2R2J -3-GP
1
2
R268
3K24R2F-GP
DY
R268
3K24R2F-GP
DY
1 2 R267 10KR2J -3-GP R267 10KR2J -3-GP
1 2 R244 8K2R2J -3-GP R244 8K2R2J -3-GP
1
2
C
5
2
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
2
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SB_VCC_3_3_C
SB_V_CPU_IO
3D3V_VCCPCORE_ICH_S0
VCCSUS1_5[1]
VCCSUS1_05[1]
VCCSUS1_05[2]
SB_VCCCL3_3
V5REF_S0
V5REF_S5
V5REF_S0 V5REF_S5
3D3V_GLAN_S0
VCC_GLAN_PLL
1D5V_USB_S0
VCC_GLAN_PLL
VCCDMI
SB_VCCLAN3_3
SB_VCCLAN3_3
1D5V_DMIPLL_ICH_S0
SB_V_CPU_IO
SB_VCC_3_3_C
PCI_VCCP_CORE_S0
SB_VCCHDA
VCCSUS1_5[3]
VCCSUS1_05[3]
VCCSUS1_5[2]
SB_VCCSUS3_3
VCCLAN1D05
SB_VCCHDA
+1.05V_VCCP
+1.5V_RUN 1D5V_DMIPLL_ICH_S0
+1.05V_VCCP
+3.3V_RUN
+1.5V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+RTC_CELL
+1.5V_RUN
+VCCSATAPLL +1.5V_RUN
+3.3V_RUN +5V_ALW +3.3V_ALW +5V_RUN
+1.5V_RUN
+3.3V_RUN
+1.5V_RUN
+3.3V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.05V_VCCP
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
ICH9-POWER(4/4)
Custom
19 59 Monday, J uly 27, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
ICH9-POWER(4/4)
Custom
19 59 Monday, J uly 27, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
ICH9-POWER(4/4)
Custom
19 59 Monday, J uly 27, 2009
<Core Design>
*Within a given well, 5VREF needs to
be up before the corresponding 3.3V rail
7
3
m
A
1
3
4
2
m
A
6
4
6
m
A
1
6
3
4
m
A
50mA
2mA
23mA
11mA
23mA
47mA
2mA
2mA
3
0
8
m
A
2
1
2
m
A
11mA
11mA
1mA
8
0
m
A
78mA
SSID = ICH
A00.08/0909
A00.08/0909
A00.08/0909
SB
1
2
C
2
7
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
2
7
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2
C304
SC1U10V3KX-3GP
C304
SC1U10V3KX-3GP
1
2
C
3
1
2
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
3
1
2
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C
2
2
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
2
2
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2
C
4
9
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
9
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1 2
L7
IND-1D2UH-5-GP
L7
IND-1D2UH-5-GP
1
2
C
5
1
3
S
C
1
U
1
0
V
3
K
X
-
3
G
P
DY
C
5
1
3
S
C
1
U
1
0
V
3
K
X
-
3
G
P
DY
1
TP260 TP260
1 2 R269
0R0603-PAD
R269
0R0603-PAD
1
2
C
5
0
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
0
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
2
1
D
1
5
C
H
7
5
1
H
-
4
0
P
T
D
1
5
C
H
7
5
1
H
-
4
0
P
T
1
2
R213
10R2J -2-GP
R213
10R2J -2-GP
1
TP243 TP243
1
2
C
4
7
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
7
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
4
8
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
8
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2
R172
0R3J -0-U-GP
DY
R172
0R3J -0-U-GP
DY
1
2
C
2
6
5
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
2
6
5
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C
4
8
0
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
8
0
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C276
SC4D7U6D3V3KX-GP
C276
SC4D7U6D3V3KX-GP
2
1
D
1
4
C
H
7
5
1
H
-
4
0
P
T
D
1
4
C
H
7
5
1
H
-
4
0
P
T
1 2 R177
0R0603-PAD
R177
0R0603-PAD
1
2
C
3
1
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
3
1
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1 2 R431
0R0603-PAD
R431
0R0603-PAD
1 2 R191
0R0402-PAD
R191
0R0402-PAD
1
2
C
4
8
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
8
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
4
9
0
S
C
D
0
2
2
U
1
6
V
2
K
X
-
3
G
P
C
4
9
0
S
C
D
0
2
2
U
1
6
V
2
K
X
-
3
G
P
V5REF
A6
V5REF_SUS
AE1
VCC1_5_B
AA24
VCC1_5_B
AA25
VCC1_5_B
AB24
VCC1_5_B
AB25
VCC1_5_B
AC24
VCC1_5_B
AC25
VCC1_5_B
AD24
VCC1_5_B
AD25
VCC1_5_B
AE25
VCC1_5_B
AE26
VCC1_5_B
AE27
VCC1_5_B
AE28
VCC1_5_B
AE29
VCC1_5_B
F25
VCC1_5_B
G25
VCC1_5_B
H24
VCC1_5_B
H25
VCC1_5_B
J 24
VCC1_5_B
J 25
VCC1_5_B
K24
VCC1_5_B
K25
VCC1_5_B
L23
VCC1_5_B
L24
VCC1_5_B
L25
VCC1_5_B
M24
VCC1_5_B
M25
VCC1_5_B
N23
VCC1_5_B
N24
VCC1_5_B
N25
VCC1_5_B
P24
VCC1_5_B
P25
VCC1_5_B
R24
VCC1_5_B
R25
VCC1_5_B
R26
VCC1_5_B
R27
VCC1_5_B
T24
VCC1_5_B
T27
VCC1_5_B
T28
VCC1_5_B
T29
VCC1_5_B
U24
VCC3_3
AG29
VCCDMIPLL
R29
VCC1_5_A
AC16
VCC1_5_A
AD15
VCC1_5_A
AD16
VCC1_5_A
AE15
VCC1_5_A
AF15
VCCSATAPLL
AJ 19
VCC3_3
AJ 6
VCC1_5_A
AC11
VCC1_5_A
AD11
VCCUSBPLL
AJ 5
VCCLAN1_05
A10
VCCLAN1_05
A11
VCC1_05
A15
VCC1_05
B15
VCC1_05
C15
VCC1_05
D15
VCC1_05
E15
VCC1_05
F15
VCC1_05
L11
VCC1_05
L12
VCC1_05
L14
VCC1_05
L16
VCC1_05
L17
VCC1_05
L18
VCC1_05
M11
VCC1_05
M18
VCC1_05
P11
VCC1_05
P18
VCC1_05
T11
VCC1_05
T18
VCC1_05
U11
VCC1_05
U18
VCCLAN3_3
A12
VCCLAN3_3
B12
VCCHDA
AJ 4
VCCSUSHDA
AJ 3
V_CPU_IO
AB23
V_CPU_IO
AC23
VCC3_3
F9
VCC3_3
G3
VCC3_3
G6
VCC3_3
J 2
VCC3_3
J 7
VCC3_3
K7
VCCRTC
A23
VCCSUS3_3
A18
VCCSUS3_3
D16
VCCSUS3_3
D17
VCCSUS3_3
E22
VCCSUS3_3
T1
VCCSUS3_3
T2
VCCSUS3_3
T3
VCCSUS3_3
T4
VCCSUS3_3
T5
VCCSUS3_3
T6
VCCSUS3_3
U6
VCCSUS3_3
U7
VCCSUS3_3
V6
VCCSUS3_3
V7
VCCSUS3_3
W6
VCCSUS3_3
W7
VCC1_5_A
AG10
VCCSUS1_05
AC8
VCCSUS1_05
F17
VCC1_5_A
G9
VCC1_5_A
AC12
VCC1_5_A
AC13
VCC1_5_A
AC14
VCC1_5_A
AA7
VCCSUS3_3
AF1
VCC3_3
B9
VCC1_5_A
AB6
VCC1_05
V12
VCC1_05
V17
VCC1_05
V14
VCC1_05
V11
VCC1_05
V18
VCC1_05
V16
VCCGLAN1_5
E27
VCCGLAN1_5
D29
VCCGLAN1_5
E26
VCCGLAN1_5
D28
VCCGLAN3_3
A26
VCCGLANPLL
A27
VCC3_3
AD19
VCCSUS3_3
Y6
VCCSUS1_5
AD8
VCCSUS1_5
F18
VCCDMI
Y23
VCCDMI
W23
VCCCL1_05
G22
VCCCL3_3
B24
VCCCL3_3
A24
VCCCL1_5
G23
VCC1_5_B
W24
VCC1_5_B
V25
VCC1_5_B
U25
VCC1_5_B
W25
VCC1_5_B
U23
VCC1_5_B
V24
VCC1_5_B
K23
VCC1_5_B
Y24
VCC1_5_B
Y25
VCC1_5_A
AG15
VCC1_5_A
AH15
VCC1_5_A
AJ 15
VCC1_5_A
AE11
VCC1_5_A
AF11
VCCSUS3_3
Y7
VCC3_3
AF20
VCC3_3
AG24
VCC3_3
AC20
VCC3_3
AC10
VCC1_5_A
AC21
VCC1_5_A
G10
VCC1_5_A
AC19
VCC1_5_A
AC18
VCC1_5_A
AC9
VCC1_5_A
AJ 10
VCC1_5_A
AH10
VCC1_5_A
AG11
VCC1_5_A
AB7
VCC1_5_A
AC6
VCC1_5_A
AC7
VCCSUS3_3
T7
C
O
R
E
V
C
C
A
3
G
P
A
T
X
A
R
X
U
S
B

C
O
R
E
P
C
I
G
L
A
N

P
O
W
E
R
V
C
C
P
_
C
O
R
E
V
C
C
P
S
U
S
V
C
C
P
U
S
B
6 OF 6
U25F
ICH9M-GP-NF
C
O
R
E
V
C
C
A
3
G
P
A
T
X
A
R
X
U
S
B

C
O
R
E
P
C
I
G
L
A
N

P
O
W
E
R
V
C
C
P
_
C
O
R
E
V
C
C
P
S
U
S
V
C
C
P
U
S
B
6 OF 6
U25F
ICH9M-GP-NF
1
2
C
4
9
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
4
9
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
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DY
1 2
L5
IND-1D2UH-5-GP
L5
IND-1D2UH-5-GP
1
2
C
5
0
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
5
0
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
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DY
1
2
C
5
2
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
2
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
2
4
6
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
2
4
6
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2C
2
1
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
2
1
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 R183
0R0603-PAD
R183
0R0603-PAD
1 2 R430
0R0603-PAD
R430
0R0603-PAD
1 2 R436
0R0603-PAD
R436
0R0603-PAD
1
2
C
4
8
1
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
4
8
1
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
R274
10R2J -2-GP
R274
10R2J -2-GP
1
2
C
3
0
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
3
0
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 R452
0R0603-PAD
R452
0R0603-PAD
1
2
C
2
3
1
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
C
2
3
1
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
1
2
C221
SCD1U10V2KX-4GP
C221
SCD1U10V2KX-4GP
1
2
C
2
6
3
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
C
2
6
3
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
4
9
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
9
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
2
4
4
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
2
4
4
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C
2
2
0
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
2
2
0
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
5
2
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
2
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
E
C
5
6
S
C
D
1
U
2
5
V
3
K
X
-
G
P
E
C
5
6
S
C
D
1
U
2
5
V
3
K
X
-
G
P
1
2
C
4
7
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
4
7
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2
C
2
1
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
2
1
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
2
1
3
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
2
1
3
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C
2
5
1
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
2
5
1
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
2
C477
SCD1U10V2KX-4GP
C477
SCD1U10V2KX-4GP
1 2 R188
0R0402-PAD
R188
0R0402-PAD
1
2
C
4
8
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
8
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
4
9
6
S
C
D
1
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1
0
V
2
K
X
-
4
G
P
C
4
9
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C242
SCD1U16V2KX-3GP
C242
SCD1U16V2KX-3GP
1 2 R437
0R0603-PAD
R437
0R0603-PAD
1
2
C521
SCD1U10V2KX-4GP
DY
C521
SCD1U10V2KX-4GP
DY
1
2
C
5
1
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
1
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
3
0
1
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
3
0
1
S
C
D
1
U
1
0
V
2
K
X
-
4
G
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DY
1
2
C
4
8
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
8
2
S
C
D
1
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1
0
V
2
K
X
-
4
G
P
1
2
C
2
5
3
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
C
2
5
3
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
1
2
C
5
1
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
1
5
S
C
D
1
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1
0
V
2
K
X
-
4
G
P
1
2
C
4
9
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
4
9
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2
C
5
1
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
5
1
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2
C
5
1
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
1
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
3
0
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
3
0
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
3
0
3
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
3
0
3
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
2
T
C
9
S
T
2
2
0
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2
D
5
V
B
M
-
L
G
P
DY
T
C
9
S
T
2
2
0
U
2
D
5
V
B
M
-
L
G
P
DY
1 2 R270
0R0603-PAD
R270
0R0603-PAD
1 2
L4
L-10UH-11-GP
L4
L-10UH-11-GP
1 2 R434
0R0603-PAD
R434
0R0603-PAD
1
2
C
5
1
1
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
1
1
S
C
D
1
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1
0
V
2
K
X
-
4
G
P
1
2
C
5
0
1
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C
D
1
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1
0
V
2
K
X
-
4
G
P
C
5
0
1
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 R453
0R0603-PAD
R453
0R0603-PAD
1
2
C
4
8
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
4
8
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2
C
5
0
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
0
9
S
C
D
1
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1
0
V
2
K
X
-
4
G
P
1
2
C
2
3
2
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
2
3
2
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
3
0
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
3
0
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2
C
2
2
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
2
2
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
2
5
2
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
2
5
2
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDI1+
MDI0+
MDI0-
MDI1-
LANPWR
LANHP
CTRL12
LANSC
LANHN
LANSV
LANRSET
LAN_RXN3
LAN_RXP3
LANX1 LANX2
LOM_DISABLE#
LANX1
LANX2
CTRL25
MDI1+
MDI1-
MDI0+
MDI0-
MDIS0_LAN
MDIS1_LAN
V
P
D
_
D
A
T
A
+3.3V_LAN +2.5V_LOM +1.2V_LOM
+3.3V_LAN
+3.3V_LAN
+3.3V_ALW
+2.5V_LOM
+1.2V_LOM
+3.3V_LAN
+3.3V_RUN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_RUN
MDI0-
MDI1-
MDI0+
MDI1+
PM_LAN_ENABLE
PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3
PCIE_WAKE#
CLK_PCIE_LAN
CLK_PCIE_LAN#
PLT_RST#
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
LAN Marvell-88E8040
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
LAN Marvell-88E8040
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
LAN Marvell-88E8040
Custom
<Core Design>
SSID = LOM
A00.08/0903
A
V
D
D
L
2
3
A
V
D
D
L
1
9
A
V
D
D
L
2
2
A
V
D
D
L
2
8
A
V
D
D
L
3
2
A
V
D
D
5
1
A
V
D
D
5
2
A
V
D
D
L
5
7
PD_12
3
PD_25
4
G
N
D
6
5
HSDACN
25
HSDACP
24
LED_ACT#
59
LED_SPEED#
60
NC#62
62
LED_LINK#
63
LOM_DISABLE#
10
R
X
N
1
8
T
X
N
2
1
N
C
#
2
7
2
7
N
C
#
3
1
3
1
R
X
P
1
7
T
X
P
2
0
N
C
#
2
6
2
6
N
C
#
3
0
3
0
P
U
_
V
D
D
O
_
T
T
L
#
4
2
4
2
P
U
_
V
D
D
O
_
T
T
L
#
4
3
4
3
PERST#
5
REFCLKN
56
REFCLKP
55
RSET
16
PCIE_RXN
53
PCIE_RXP
54
NC#37
37
NC#36
36
NC#35
35
NC#34
34
SWITCH_VAUX
9
SWITCH_VCC
11
T
E
S
T
M
O
D
E
4
6
T
S
T
P
T
2
9
PCIE_TXN
50
PCIE_TXP
49
VAUX_AVLBL
12
V
D
D
2
V
D
D
7
V
D
D
1
3
V
D
D
3
3
V
D
D
3
9
V
D
D
4
4
V
D
D
4
8
V
D
D
5
8
V
D
D
2
5
6
4
V
D
D
O
_
T
T
L
1
V
D
D
O
_
T
T
L
8
V
D
D
O
_
T
T
L
4
0
V
D
D
O
_
T
T
L
4
5
V
D
D
O
_
T
T
L
6
1
VMAIN_AVLBL
47
V
P
D
_
C
L
K
3
8
V
P
D
_
D
A
T
A
4
1
WAKE#
6
XTALI
15
XTALO
14
U26
88E8040-A0-NNC1C000-GP
U26
88E8040-A0-NNC1C000-GP
1 2
C247 SCD01U16V2KX-3GP
DY
DY
1 2
X2
XTAL-25MHZ-96GP
X2
XTAL-25MHZ-96GP
1 2 R221 2KR2F-3-GP R221 2KR2F-3-GP
1
2
C
2
9
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
2
9
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 C292 SC1U10V3KX-3GP C292 SC1U10V3KX-3GP
1
TP139 TP139
1
2
C259
SC12P50V2J N-3GP
C259
SC12P50V2J N-3GP
1
2
R257
10KR2J -3-GP
R257
10KR2J -3-GP
1
TP269 TP269
1 2
R224 49D9R2F-GP
DY
R224 49D9R2F-GP
DY
1 2 R246
0R0402-PAD
R246
0R0402-PAD
1
2
C260
SC12P50V2J N-3GP
C260
SC12P50V2J N-3GP
1 2 C261 SC1KP50V2KX-1GP C261 SC1KP50V2KX-1GP
1
TP147 TP147
1 2
R222 49D9R2F-GP
DY
R222 49D9R2F-GP
DY
1 2 C291
SC4D7U6D3V5KX-3GP
C291
SC4D7U6D3V5KX-3GP
1
2
C
2
6
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
2
6
9
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
S
D
G
G
D
Q14
AO3403-GP
G
D
Q14
AO3403-GP
1
2
C
2
8
6
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
2
8
6
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1 2
R228
10MR2J -L-GP
DY
R228
10MR2J -L-GP
DY
1 2
DY
DY
1
2
C
2
9
0
S
C
4
D
7
U
6
D
3
V
5
K
X
-
3
G
P
C
2
9
0
S
C
4
D
7
U
6
D
3
V
5
K
X
-
3
G
P
1 2
R236
4K7R2J -2-GP
R236
4K7R2J -2-GP
1 2 C278 SC4D7U6D3V5KX-3GP C278 SC4D7U6D3V5KX-3GP
1 2
R234
4K7R2J -2-GP
R234
4K7R2J -2-GP
1
TP270 TP270
1 2
R223 49D9R2F-GP
DY
R223 49D9R2F-GP
DY
G
S
D
Q15
2N7002-7F-GP
Q15
2N7002-7F-GP
1 2
R225 49D9R2F-GP
DY
R225 49D9R2F-GP
DY
1 2 R243 10KR2J -3-GP
DY
R243 10KR2J -3-GP
DY
1
2
C
2
6
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
2
6
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
TP136 TP136
1 2
R248 0R3J -0-U-GP
DY
R248 0R3J -0-U-GP
DY
1 2
R229
4K7R2J -2-GP
R229
4K7R2J -2-GP
1
2
C
2
7
1
S
C
4
D
7
U
6
D
3
V
5
K
X
-
3
G
P
C
2
7
1
S
C
4
D
7
U
6
D
3
V
5
K
X
-
3
G
P
1 2
R507 0R3J -0-U-GP
DY
R507 0R3J -0-U-GP
DY
1 2 R239 10KR2J -3-GP
DY
R239 10KR2J -3-GP
DY
1
TP145 TP145
1
2
R231
0R2J -2-GP
DY
R231
0R2J -2-GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CARD_EESK
CARD_EEDO
XD_D4/SD_DAT1
XD_D3/MS_D1
SD_CLK/XD_D1/MS_CLK
SD_WP
CARD_RST#_R
XD_RDY
XD_CLE CARD_EEDI
SD_DAT0/XD_D6/MS_D0
MODE_SEL
SD_DAT2/XD_RE#
CARD_RREF
SD_CMD
CARD_EEDO
CARD_EEDI
CARD_EESK
XD_D2/MS_D2
SD_CD#
CARD_RST#
SD_DAT3/XD_WE#
MODE_SEL
CARD_EECS
MS_INS#
XD_D5/MS_BS
XD_CD#
XD_D0
VREG
XD_ALE
CARD_EECS
XD_D7/MS_D3
XD_WP#
XD_CE#
XTAL_CTR
SD_CLK/XD_D1/MS_CLK
MS_CLK
SD_CLK
USB_PN10
USB_PP10
USB_PP10
USB_PN10
+3.3V_PHY
+3.3V_PHY
+3.3V_RUN
+3.3V_PHY
+3.3V_PHY
+3.3V_RUN_CARD
+3.3V_PHY
XD_CD#
SD_WP
SD_CD#
XD_D4/SD_DAT1
XD_D5/MS_BS
XD_D3/MS_D1
SD_DAT0/XD_D6/MS_D0
XD_D2/MS_D2
MS_INS#
XD_D7/MS_D3
SD_CLK/XD_D1/MS_CLK
XD_D0
XD_WP#
XD_RDY
SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
XD_ALE
XD_CE#
XD_CLE
SD_CMD
MS_CLK
SD_CLK
CLK_48M_CARD
USB_PP10
USB_PN10
PLT_RST#
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
RTS5158E
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
RTS5158E
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
RTS5158E
Custom
<Core Design>
Please close to pin11 and pin33.
Reserve for changing USB VID/PID.
SSID = SDIO
Power mode select
No staff R and C for power saving mode.
Please close to pin8.
A00.08/0902
A00.08/1002
A00.08/1002
1
2
C
2
9
8
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
2
9
8
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1 2 R249
0R0402-PAD
R249
0R0402-PAD
1 2 R250
0R0402-PAD
R250
0R0402-PAD
1 2 R259
0R0603-PAD
R259
0R0603-PAD
1
2
C
3
2
0
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
C
3
2
0
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
1 2 R272 10KR2J -3-GP R272 10KR2J -3-GP
1 2
R510
2K2R2J -2-GP
R510
2K2R2J -2-GP
CS
1
SK
2
DI
3
DO
4
GND
5
ORG
6
DC
7
VCC
8
U33
AT93C46DN-SH-B-GP
DY
U33
AT93C46DN-SH-B-GP
DY
1
2
R283
499KR2F-1-GP
DY
R283
499KR2F-1-GP
DY
1
2
C
3
0
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
3
0
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
12
43
L6
DLW21SN900SQ2LUGP
DY
L6
DLW21SN900SQ2LUGP
DY
1
2
R280
10KR2J -3-GP
DY
R280
10KR2J -3-GP
DY
1
2
C280
SC15P50V2J N-2-GP
DY
C280
SC15P50V2J N-2-GP
DY
1
2
C568
SC1U10V2KX-1GP
C568
SC1U10V2KX-1GP
1
2
C
2
9
7
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
2
9
7
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C
3
1
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
3
1
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C318
SC1U10V2KX-1GP
DY
C318
SC1U10V2KX-1GP
DY
1
2
C
3
1
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
3
1
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C317
SC47P50V2J N-3GP
DY
C317
SC47P50V2J N-3GP
DY
1
2
C311
SCD1U16V2KX-3GP
DY
C311
SCD1U16V2KX-3GP
DY
1
2
C299
SCD1U16V2KX-3GP
C299
SCD1U16V2KX-3GP
1
2
C273
SC15P50V2J N-2-GP
DY
C273
SC15P50V2J N-2-GP
DY
A
V
_
P
L
L
1
R
R
E
F
2
N
C
#
3
3
DM
4
DP
5
G
N
D
6
N
C
#
7
7
3
V
3
_
I
N
8
C
A
R
D
_
3
V
3
9
V
R
E
G
1
0
D
3
V
3
1
1
G
N
D
1
2
XTAL_CTR
13
G
P
I
O
0
1
4
EEDO
15
EECS
16
EESK
17
EEDI
18
SP1
19
SP2
20
SP3
21
M
S
_
D
4
2
2
SP4
23
M
S
_
D
5
2
4
SP5
25
SP6
26
SP7
27
SP8
28
SP9
29
N
C
#
3
0
3
0
SP10
31
G
N
D
3
2
D
3
V
3
3
3
SP11
34
SP12
35
S
D
_
C
M
D
3
6
SP13
37
SP14
38
SP15
39
SP16
40
SP17
41
SP18
42
SP19
43
R
S
T
#
4
4
M
O
D
E
_
S
E
L
4
5
G
N
D
4
6
XTLO
47
XTLI
48
U34
RTS5158E-GRT-GP
U34
RTS5158E-GRT-GP
1
2
R284
100KR2J -1-GP
DY
R284
100KR2J -1-GP
DY
1 2
R260
6K2R2F-GP
R260
6K2R2F-GP 1 2
R282
BLM18BD601SN1D-GP
R282
BLM18BD601SN1D-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_DMIC_CLK
I
C
H
_
A
Z
_
C
O
D
E
C
_
S
D
O
U
T
1
ICH_SDOUT_CODEC
AUD_SENSE_A
AUD_VREFOUT_B
AUD_HP1_OUT_L
AUD_HP1_OUT_R
AUD_LINE_OUT_R
AUD_EXT_MIC_L
AUD_EXT_MIC_R
SB_AZ_CODEC_SDIN0_R
AUD_DMIC_IN0
AUD_DMIC_CLK
AUD_VREFFLT
AUD_CAP2
ICH_AZ_CODEC_BITCLK_R
AUD_SENSE_B
AUD_PC_BEEP
AUD_INT_MIC_L
AUD_INT_MIC_R
AUD_LINE_OUT_L
AUD_VREFOUT_C
SB_SPKR_R
+VDDA
+3.3V_RUN
+VDDA
+3.3V_RUN
+3.3V_RUN
+VDDA
AUD_DMIC_CLK_G
AUD_HP1_J D#
EXT_MIC_J D#
AUD_EXT_MIC_L
AUD_EXT_MIC_R
AUD_VREFOUT_B
AUD_LINE_OUT_L
AUD_LINE_OUT_R
AUD_HP1_OUT_R
AUD_HP1_OUT_L
INT_MIC_L_R
ICH_AZ_CODEC_SYNC
ICH_AZ_CODEC_RST#
AUD_DMIC_IN0
ICH_SDIN_CODEC
ICH_AZ_CODEC_BITCLK
ICH_SDOUT_CODEC
SB_SPKR
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
AUDIO CODEC 92HD71B7
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Azal i a I /F EMI
SSID = AUDIO
Port A---> HP
Port B---> Ext Mic
Port C---> Int Mic
Port D---> Speaker
PC
BEEP
AUD_PC_BEEP
Trace width>15 mils
Place C915 close to pin9
Place C914 close to pin1
From SB
1 2 R473 39K2R2F-L-GP R473 39K2R2F-L-GP
1
2
C532
SC4D7P50V2CN-1GP
DY
C532
SC4D7P50V2CN-1GP
DY
1
2
C
5
3
0
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
5
3
0
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C
5
5
5
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
5
5
5
S
C
1
U
1
0
V
3
K
X
-
3
G
P
OE#
1
A
2
GND
3
Y
4
VCC
5
U59
74LVC1G125DC-GP
DY
U59
74LVC1G125DC-GP
DY
1
2
C529
SCD1U10V2KX-4GP
C529
SCD1U10V2KX-4GP
1
2
C528
SCD1U10V2KX-4GP
DY
C528
SCD1U10V2KX-4GP
DY
1 2 R478 20KR2F-L-GP R478 20KR2F-L-GP
1
2
C
5
5
0
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
5
0
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 C560 SC1U6D3V2KX-GP C560 SC1U6D3V2KX-GP
1
2
R468
DUMMY-C2
R468
DUMMY-C2
1
2
C
5
3
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
3
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
5
3
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
3
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 R477 22R2J -2-GP R477 22R2J -2-GP
DVDD_CORE
1
DVDD_IO
3
VOL_UP/DMIC_0/GPIO1
2
VOL_DN/DMIC_1/GPIO2
4
GPIO5
43
GPIO6
44
GPIO7/SPDIF_OUT1
45
DMIC_CLK
46
SDO
5
BITCLK
6
DVSS
7
SDI_CODEC
8
DVDD_CORE
9
SYNC
10
RESET#
11
SPDIF_OUT0
48
EAPD/GPIO0/SPDIF_OUT0OR1
47
AVDD1
25
AVDD2
38
AVSS1
26
AVSS2
42
CAP2
33
VREFFILT
27
PORTA_L
39
PORTA_R
41
NC#37
37
PORTB_L
21
PORTB_R
22
VREFOUT_B
28
PORTC_L
23
PORTC_R
24
VREFOUT_C
29
PORTD_L
35
PORTD_R
36
PORTE_L
14
PORTE_R
15
VREFOUT_E/GPIO4
31
PORTF_L
16
PORTF_R
17
GPIO3
30
NC#18
18
NC#19
19
NC#20
20
PCBEEP
12
MONO_OUT
32
NC#40/OTP
40
SENSE_A
13
SENSE_B/NC#34
34
GND
49
U61
92HD71B7A5NLGXB3X8-GP
U61
92HD71B7A5NLGXB3X8-GP
1
2
R487
20KR2F-L-GP
R487
20KR2F-L-GP
1
2
C
5
6
1
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
5
6
1
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1 2 R292 4K7R2J -2-GP R292 4K7R2J -2-GP
1 2 R465 33R2J -2-GP R465 33R2J -2-GP
1 2
R464
499KR2F-1-GP
R464
499KR2F-1-GP
1
2
EC154
SC22P50V2J N-4GP
EC154
SC22P50V2J N-4GP
1
2
R479
5K1R2F-2-GP
R479
5K1R2F-2-GP
1 2 R467
0R0402-PAD
R467
0R0402-PAD
1
2
R466
47R2J -2-GP
DY
R466
47R2J -2-GP
DY
1
2
C
5
5
8
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
5
5
8
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1 2 R463 22R2J -2-GP R463 22R2J -2-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_LIN_L
AUD_SET
AUD_LIN_R
AUD_SPK_L2
AUD_SPK_R2
AUD_SPK_R1
AUD_SPK_L1
AUD_AMP_GAIN1
AUD_AMP_GAIN2
AUD_HP1_EN
AUD_SPK_ENABLE#
AMP_C1P
AMP_C1N
AUD_BIAS
AMP_MUTE#_R
AUD_CPVSS
AUD_HP1_OUT_R2
AUD_HP1_OUT_L2
AUD_HP1_J ACK_R
AUD_HP1_J ACK_L
AMP_REGEN
AUD_SPK_ENABLE
AUD_HP1_J D AUD_HP1_EN
AMP_MUTE#
AUD_HP1_J D
AUD_HP1_J D#
AMP_MUTE#
AUD_SPK_ENABLE# AUD_HP1_J D#
AUD_AMP_GAIN2 AUD_AMP_GAIN1
NB_SPK_EN#
AUD_HP1_OUT_L1
AUD_HP1_OUT_R1
KBC_BEEP_R AMP_REGEN
AUD_SET
AUD_BIAS
+VDDA
+5V_SPK_AMP
+VDDA
+5V_RUN
+5V_RUN
+5V_SPK_AMP
+5V_SPK_AMP +5V_SPK_AMP
+5V_SPK_AMP
+5V_SPK_AMP
+5V_SPK_AMP +5V_SPK_AMP
+5V_SPK_AMP
AUD_HP1_OUT_R
AUD_HP1_OUT_L
AUD_LINE_OUT_R
AUD_LINE_OUT_L
AMP_MUTE#
AUD_SPK_L1
AUD_SPK_L2
AUD_SPK_R2
AUD_SPK_R1
AUD_HP1_J ACK_R
AUD_HP1_J ACK_L
AUD_HP1_J D#
KBC_BEEP
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
AUDIO AMP/SPEAKER
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
AUDIO AMP/SPEAKER
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
AUDIO AMP/SPEAKER
Custom
<Core Design>
Close to U24.8 Close to U24.18
Si gnal i nver t er f or speak er shut dow n
From EC
R486
R483
R469
R286
C535
C566
TPA6040A
( 74. 06040. 013)
MAX9789A
( 74. 09789. 013)
No ASM
No ASM
No ASM
0 Ohm
0. 033uF
0. 033uF
No ASM
No ASM
No ASM
100K
0 Ohm
Main
source
100K
Second
source
SSID = AUDIO
60ohm 100MHz
3000mA 0.05ohm DC
Close to Pin9
1 1 21.6dB
0 0 6dB
GAIN1 GAIN2 GAIN
1 0 15.6dB
0 1 10dB
GAI N SETTI NG
From EC
C565 1uF
C567 No ASM 0. 1uF
No ASM
C564
C557
10uF
10uF
2. 2uF
2. 2uF
A00.08/0922
1 2
R488
2K2R2J -2-GP
R488
2K2R2J -2-GP
1
2
C
5
6
3
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
5
6
3
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
R484
1KR2J -1-GP
R484
1KR2J -1-GP
1 2 C544 SCD033U16V3KX-GP C544 SCD033U16V3KX-GP
1
2
R293
100KR2J -1-GP
R293
100KR2J -1-GP
1 2
G78
GAP-OPEN-PWR
G78
GAP-OPEN-PWR
P
G
N
D
5
P
V
D
D
8
C
P
V
D
D
9
C
P
G
N
D
1
1
C
P
V
S
S
1
3
P
V
S
S
1
4
H
P
V
D
D
1
7
P
V
D
D
1
8
P
G
N
D
2
1
HP_EN
22
G
N
D
2
8
V
D
D
3
0
G
N
D
3
3
SET
1
REGEN
4
BIAS
24
C1P
10
C1N
12
HPR
15
HPL
16
HP_INR
26
HP_INL
27
MUTE#
25
VOUT
29
GAIN1
31
GAIN2
32
OUTL+
6
OUTL-
7
OUTR-
19
OUTR+
20
SPKR_INR
2
SPKR_INL
3
SPKR_EN#
23
U62
MAX9789A-GP
U62
MAX9789A-GP
1
2
C546
SC1U6D3V2KX-GP
C546
SC1U6D3V2KX-GP
1
2
C
3
2
2
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
3
2
2
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
5
6
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
6
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 C535 SCD033U16V3KX-GP
6040
C535 SCD033U16V3KX-GP
6040
1
2
R288
100KR2J -1-GP
R288
100KR2J -1-GP
1
2
R291
100KR2J -1-GP
R291
100KR2J -1-GP
1 2
G77
GAP-OPEN-PWR
G77
GAP-OPEN-PWR
1 2 R486 100KR2J -1-GP
6040
R486 100KR2J -1-GP
6040
1 2
C551
SC1U10V3KX-3GP
C551
SC1U10V3KX-3GP
1
2
C
5
4
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
5
4
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2
R490
2K2R2J -2-GP
R490
2K2R2J -2-GP
1
2
R
4
6
9
0
R
2
J
-
2
-
G
P
9789
R
4
6
9
0
R
2
J
-
2
-
G
P
9789
1
2
3 4
5
6
U36
2N7002SPT
U36
2N7002SPT
1
2
C
5
5
2
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
5
5
2
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
R289
100KR2J -1-GP
DY
R289
100KR2J -1-GP
DY
1 2 C566 SCD033U16V3KX-GP
6040
C566 SCD033U16V3KX-GP
6040
1
2
3
D17
BAW56-2-GP
D17
BAW56-2-GP
1
2
C
5
5
6
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
5
5
6
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
5
5
4
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
5
5
4
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
R287
100KR2J -1-GP
R287
100KR2J -1-GP
1 2
G79
GAP-OPEN-PWR
G79
GAP-OPEN-PWR
1 2
L18
BLM21PG600SN-1GP
L18
BLM21PG600SN-1GP
1
2
C
5
4
8
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
5
4
8
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1 2
R286
100KR2J -1-GP
9789
R286
100KR2J -1-GP
9789
1
2
C
5
5
3
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C
5
5
3
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1 2
G80
GAP-OPEN-PWR
G80
GAP-OPEN-PWR
1
2
R485
100KR2J -1-GP
R485
100KR2J -1-GP
1
2
R285
100KR2J -1-GP
R285
100KR2J -1-GP
1 2 R483 0R2J -2-GP
9789
R483 0R2J -2-GP
9789
1
2
C
5
6
5
S
C
1
U
1
0
V
3
K
X
-
3
G
P
6040
C
5
6
5
S
C
1
U
1
0
V
3
K
X
-
3
G
P
6040
1
2
3 4
5
6
U35
2N7002SPT
U35
2N7002SPT
1
2
R489
10MR2J -L-GP
R489
10MR2J -L-GP
1 2
C564
SC10U6D3V5MX-3GP
6040B
C564
SC10U6D3V5MX-3GP
6040B
1 2
C557
SC10U6D3V5MX-3GP
6040B
C557
SC10U6D3V5MX-3GP
6040B
1 2 C543 SCD033U16V3KX-GP C543 SCD033U16V3KX-GP
1
2
C
5
3
8
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
5
3
8
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1 2 C567 SCD1U10V2KX-4GP
9789
9789
1
2
R290
100KR2J -1-GP
DY
R290
100KR2J -1-GP
DY
1 2
R472
10KR2J -3-GP
R472
10KR2J -3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EC_SPI_CLK
EC_SPI_DO
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
ECSCI#_KBC
EC_SPI_CLK_C
KCOL15
KCOL16
ECSWI#_KBC
KROW0
LPC_LAD0
KROW1
KBC_VCORF
KCOL1
KROW2
LPC_LAD1
KCOL2
KROW3
LPC_LAD2
KCOL3
VBAT
LPC_LAD3
KCOL4
KROW4
KROW5
KCOL5
KCOL6
KROW6
KROW7
EC_SPI_DI
KCOL7
KCOL8
X3_1
KBC_XI
KBC_XO
KBC_XI
EC_SPI_CS#
KCOL17
KBC_XO
KCOL0
KBC_SDA1
KBC_SCL1
KB_DET#
LCD_CBL_DET#
BAT_SCL
KBC_PWRBTN#
CAMERA_DET#
KA20GATE
E51_RxD
BAT_SDA
LID_CLOSE#
KBRCIN#
PLT_RST1#_1
PLT_RST1#_1
E51_TxD
E51_RxD
ECRST#_C
ECRST#
S5_ENABLE
KBC_SDA1
ECSWI#_KBC
ECSMI#_KBC
ECSCI#_KBC
PCLK_KBC
P
C
L
K
_
K
B
C
_
R
C
E51_TxD
KBC_THERMTRIP#
KCOL0
ECRST#
KBC_SCL1
KBC_SDA1
KBC_THERMTRIP#
CPUCORE_ON RUNPWROK
PM_PWROK_R
TSATN#_KBC
KBC_THERMTRIP#
PCB_VER0
PCB_VER1
PCB_VER2
ECSMI#_KBC
KBC_GPIO76
KBC_GPIO76
CPUCORE_ON_R
KBC_SCL1
PCB_VER0
PCB_VER1
PCB_VER2
RUNPWROK_R
BIOS_ID
BIOS_ID
+3.3V_RUN +3.3V_RTC_LDO
+3.3V_RTC_LDO
+3.3V_RUN
+3.3V_RTC_LDO
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+1.05V_VCCP
EC_SPI_DI
KA20GATE
AC_IN# BAT_SDA
AD_OFF
KBC_PWRBTN#
BAT_SCL
WIFI_RF_EN
PCLK_KBC
PM_CLKRUN#
BRIGHTNESS
AD_IA
PM_SLP_S3#
LPC_LFRAME#
KBC_BEEP
EC_SPI_CLK
KBRCIN#
LID_CLOSE#
INT_SERIRQ
KCOL[0..16]
KROW[0..7]
LPC_LAD[0..3]
EC_SPI_CS#
EC_SPI_DO
PS_ID_EC
TPCLK
TPDATA
PLT_RST#
S5_ENABLE
PSID_DISABLE#
USB_PWR_EN#
PURE_HW_SHUTDOWN#
CAP_SCL
THERM_SCL
THERM_SDA
CAP_SDA
ECSMI#
ECSCI#
ECSWI#
H_THRMTRIP#
BLUETOOTH_EN
E51_RxD
E51_TxD
RUNPWROK
BAT_IN#
PM_SLP_S4#
AMP_MUTE#
PM_PWROK
LCD_TST
TSATN#_KBC
LCD_CBL_DET#
KB_DET#
CAMERA_DET#
PM_PWRBTN#
CAPA_INT#
RSMRST#_KBC
VGATE_PWRGD
HDD_5V_EN
CPUCORE_ON
GMCH_BL_ON
PM_LAN_ENABLE
3V_5V_POK
BLON_OUT
PWRLED
BATLOW_LED
LCD_TST_EN
EC_SPI_WP#_R
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
KBC Winbond WPC773L
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
KBC Winbond WPC773L
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
KBC Winbond WPC773L
Custom
<Core Design>
CAP close to VCC-GND pin pair
1
0 0
0
0
MB
VERSI ON I D
1
1
1
VER1
MB
VERSI ON I D
VER2
X00
KBC
CLK EMI
X01
X02
SSID = KBC
VER0
0
0
0
0
-3.09/0803
A00.08/0902
BI OS_I D: Pul l Hi gh f or Di scr et e
KBC i nt er nal Pul l Low f or UMA
A00.08/0902
A00.08/0903
A00.08/0903
A00.08/0903
A00.08/0903
SB
-1
-1
0 1 1
-3
-2
1 0 0
1
2
C204
SC1U10V3KX-3GP
C204
SC1U10V3KX-3GP
1
2
R413
0R0402-PAD
R413
0R0402-PAD
1 2
R416
0R2J -2-GP
DY
R416
0R2J -2-GP
DY
1 2
R157 10KR2J -3-GP R157 10KR2J -3-GP
1
2
C194
SCD1U10V2KX-4GP
C194
SCD1U10V2KX-4GP
1 2
R147 10KR2J -3-GP
DY
R147 10KR2J -3-GP
DY
1
2
C
4
5
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
C
4
5
6
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
DY
1
2
C
4
5
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
5
8
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C214
SC1U10V3KX-3GP
C214
SC1U10V3KX-3GP
1
2
R
1
5
0
1
0
K
R
2
J
-
3
-
G
P
R
1
5
0
1
0
K
R
2
J
-
3
-
G
P
1
2
3
D13
BAS16-1-GP
D13
BAS16-1-GP
1
2
3 4
5
6
U22
2N7002SPT
U22
2N7002SPT
1 2
R422 10KR2J -3-GP
DY
R422 10KR2J -3-GP
DY
1 2 L17 BLM18AG601SN-3GP L17 BLM18AG601SN-3GP
1
2
C
4
5
9
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
4
5
9
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
R
1
5
1
1
0
K
R
2
J
-
3
-
G
P
DY
R
1
5
1
1
0
K
R
2
J
-
3
-
G
P
DY
1 TP122 TP122
1
2
C196
SC10U6D3V5MX-3GP
DY
C196
SC10U6D3V5MX-3GP
DY
1
2
C453
SC4D7P50V2CN-1GP
DY
C453
SC4D7P50V2CN-1GP
DY
1 2 R192
0R2J -2-GP
R192
0R2J -2-GP
1 2
C240
SC15P50V2J N-2-GP
C240
SC15P50V2J N-2-GP
1 2
R401 100KR2J -1-GP R401 100KR2J -1-GP
1
2
R
1
4
1
1
0
K
R
2
J
-
3
-
G
P
R
1
4
1
1
0
K
R
2
J
-
3
-
G
P
1 2
R418
0R2J -2-GP
DY
R418
0R2J -2-GP
DY
1 2
R417 0R2J -2-GP
DY
R417 0R2J -2-GP
DY
1 2
R425 100KR2J -1-GP R425 100KR2J -1-GP
1 2
C199
SCD1U16V2KX-3GP
C199
SCD1U16V2KX-3GP
32KX1/32KCLKIN
77
32KX2
79
GPIO55/CLKOUT
30
VCC_POR#
85
KBSIN0
54
KBSIN1
55
KBSIN2
56
KBSIN3
57
KBSIN4
58
KBSIN5
59
KBSIN6
60
KBSIN7
61
KBSOUT0/J ENK#
53
KBSOUT1/TCK
52
KBSOUT2/TMS
51
KBSOUT3/TDI
50
KBSOUT4/J EN0#
49
KBSOUT5/TDO
48
KBSOUT6/RDY#
47
KBSOUT7
43
KBSOUT8
42
KBSOUT9
41
KBSOUT10
40
KBSOUT11
39
KBSOUT12/GPIO64
38
KBSOUT13/GPIO63
37
KBSOUT14/GPIO62
36
KBSOUT15/GPIO61/XOR_OUT
35
GPIO60/KBSOUT16
34
GPIO57/KBSOUT17
33
GPIO56/TA1
31
GPIO14/TB1
63
GPIO15/A_PWM
32
GPIO13/C_PWM
62
F_SDI
86
F_SDO
87
F_CS0#
90
F_SCK
92
GPIO12/PSDAT3
13
GPIO25/PSCLK3
12
GPIO27/PSDAT2
11
GPIO26/PSCLK2
10
GPIO35/PSDAT1
71
GPIO37/PSCLK1
72
GPIO20/TA2
117
GPIO21/B_PWM
118
KBC
FIU
PS/2
2 OF 2 U20B
WPCE773LA0DG-GP
KBC
FIU
PS/2
2 OF 2 U20B
WPCE773LA0DG-GP
1 2
R170
0R0402-PAD
R170
0R0402-PAD
1 2 R153
0R0402-PAD
R153
0R0402-PAD
G
N
D
5
G
N
D
1
8
G
N
D
4
5
G
N
D
7
8
G
N
D
8
9
G
N
D
1
1
6
A
G
N
D
1
0
3
VCORF
44
GPIO10/LPCPD#
124
LRESET#
7
LCLK
2
LFRAME#
3
LAD0
126
LAD1
127
LAD2
128
LAD3
1
SERIRQ
125
GPIO11/CLKRUN#
8
KBRST#
122
GA20
121
ECSCI#/GPIO54
29
GPIO65/SMI#
9
GPIO67/PWUREQ#
123
V
D
D
4
V
C
C
1
9
V
C
C
4
6
V
C
C
7
6
V
C
C
8
8
A
V
C
C
1
0
2
G
P
I
O
4
1
8
0
GPIO87/SIN_CR
113
GPO83/SOUT_CR/BADDR1
111
GPIO16
114
GPO84/BADDR0
112
GPIO06
93
GPIO53
28
GPIO36
15
GPIO51
26
GPIO47
24
GPIO24
6
GPIO34
14
GPIO45/E_PWM
22
GPIO70
73
GPIO40/F_PWM
16
GPIO42/TCK
17
GPIO43/TMS
20
GPIO44/TDI
21
GPIO46/TRST#
23
GPIO50/TDO
25
GPIO52/RDY#
27
GPI90/AD0
97
GPI91/AD1
98
GPI92/AD2
99
GPI93/AD3
100
GPI94
101
GPI95
105
GPI96
106
GPI97
107
VREF
104
GPIO77
84
GPIO76/SHBM
83
GPIO75
82
GPIO66/G_PWM
81
GPIO23
119
GPIO03
95
GPIO05
108
GPIO04
96
GPIO31
120
GPIO07
94
GPIO01/TB2
64
GPIO30
109
V
C
C
1
1
5
GPIO32/D_PWM
65
GPIO33/H_PWM
66
GPIO74/SDA2
68
GPIO73/SCL2
67
GPIO22/SDA1
69
GPIO17/SCL1
70
GPO82/TRIS#
110
GPIO81
91
GPIO71
74
GPIO72
75
LPC
SER/IR
SPI
GPIO
A/D
D/A
SP
SMB
1 OF 2 U20A
WPCE773LA0DG-GP
LPC
SER/IR
SPI
GPIO
A/D
D/A
SP
SMB
1 OF 2 U20A
WPCE773LA0DG-GP
1
2
C
4
6
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
6
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2
R173
10KR2J -3-GP
R173
10KR2J -3-GP
1 2
R509 10KR2J -3-GP
DY
R509 10KR2J -3-GP
DY
1
2
3
D11
BAS16-1-GP
D11
BAS16-1-GP
1
2 3
4
RN46
SRN4K7J -8-GP
RN46
SRN4K7J -8-GP
1
2
R410
0R2J -2-GP
DY
R410
0R2J -2-GP
DY
C
B
E
Q9
CH3904PT-GP
Q9
CH3904PT-GP
1 2
C228
SC15P50V2J N-2-GP
C228
SC15P50V2J N-2-GP
1 2 R182
0R0402-PAD
R182
0R0402-PAD
1
2
R
1
3
8
1
0
K
R
2
J
-
3
-
G
P
DY
R
1
3
8
1
0
K
R
2
J
-
3
-
G
P
DY
1 2
R156
0R2J -2-GP
DY
R156
0R2J -2-GP
DY
1 2
34
X1
X-32D768KHZ-38GPU
X1
X-32D768KHZ-38GPU
1
2
C
4
5
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
5
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
R
1
4
6
1
0
K
R
2
J
-
3
-
G
P
R
1
4
6
1
0
K
R
2
J
-
3
-
G
P
1
2
R199
20MR3-GP
R199
20MR3-GP
1
2
C
4
6
0
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
6
0
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2 3
4
RN21
SRN10KJ -5-GP
DY
RN21
SRN10KJ -5-GP
DY
1
2
C190
SC470P50V2KX-3GP
DY
C190
SC470P50V2KX-3GP
DY
1
2
E
C
1
3
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
3
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1 2
R406 100KR2J -1-GP
DY
R406 100KR2J -1-GP
DY
1 2
R404 100KR2J -1-GP R404 100KR2J -1-GP
1 2
R415 0R2J -2-GP
DY
R415 0R2J -2-GP
DY
1
2
C
4
5
1
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
5
1
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
R149
4K7R2J -2-GP
R149
4K7R2J -2-GP
1
2
C
4
6
6
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
4
6
6
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
3
D12
BAS16-1-GP
D12
BAS16-1-GP
1 2
R400 10KR2J -3-GP
DY
R400 10KR2J -3-GP
DY
1
2
R162
2K2R2J -2-GP
R162
2K2R2J -2-GP
1 2 R159
0R0402-PAD
R159
0R0402-PAD
1 2 R158
0R0402-PAD
R158
0R0402-PAD
C
B
E
Q10
CH3906PT-GP
Q10
CH3906PT-GP
1 2
R420 10KR2J -3-GP R420 10KR2J -3-GP
1
2
R
1
4
3
1
0
K
R
2
J
-
3
-
G
P
DY
R
1
4
3
1
0
K
R
2
J
-
3
-
G
P
DY
1 2
R409 100KR2J -1-GP R409 100KR2J -1-GP
1 2
R203
33KR3-GP
R203
33KR3-GP
1
2 3
4
RN47
SRN4K7J -8-GP
RN47
SRN4K7J -8-GP
1
2
R148
10KR2J -3-GP
DY
R148
10KR2J -3-GP
DY
1 2
R407 10KR2J -3-GP R407 10KR2J -3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_32K
EMC2102_SHDN
EMC2102_DN2
EMC2102_FAN_mode
EM2102_RESET#
V_DEGREE
EMC2102_DN3
EMC2102_FAN_TACH
EMC2102_FAN_DRIVE
EMC2102_DP3
ALERT#
EMC2102_DP2
EMC2102_FAN_TACH_1
EMC2102_VDD_3D3
EMC2102_CLK_SEL
EM2102_RESET#
EMC2102_FAN_DRIVE
EMC2102_FAN_TACH_1
CLK_32K CLK_32K_R CLK_32K
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_RUN +5V_RUN +3.3V_RUN
RUN_POWER_ON
+3.3V_RTC_LDO
+3.3V_RUN
+3.3V_RTC_LDO
+3.3V_RUN
+3.3V_RUN
PM_SLP_S3#
PM_PWROK
THERM_SDA
THERM_SCI#
THERM_SCL
H_THERMDC
H_THERMDA
PURE_HW_SHUTDOWN#
ICH_SUSCLK
EMC2102_FAN_DRIVE
EMC2102_FAN_TACH_1
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Thermal/Fan Controllor EMC2102
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
C37 must be near Q1
C388 must be near Q18
GND = Internal Oscillator Selected
+3.3V = External 32.768kHz Clock Selected
Layout not i ce :
Bot h H_THERMDA and THERMDC r out i ng
10 mi l t r ace wi dt h and 10 mi l spaci ng.
C61 must be
near EMC2102
Layout not i ce :
Bot h DN2 and DP2 r out i ng 10 mi l
t r ace wi dt h and 10 mi l spaci ng.
3.HW T8 sensor
C63 must be
near EMC2102
Layout not i ce :
Bot h DN3 and DP3 r out i ng 10 mi l
t r ace wi dt h and 10 mi l spaci ng.
GND = Fan is OFF
OPEN = Fan is at 60% full-scale
+3.3V = Fan is at 75% full-scale
GND = Channel 1
OPEN = Channel 3
+3.3V = Disabled
2.System Sensor, Put between CPU and NB.
1.For CPU Sensor
TRIP_SET Pin Voltage
V_DEGREE=(((Degree-75)/21)
32K suspend clock output
SSID = Thermal
T8 shut down i s set 88 deg- C.
A00.08/0922
1
2
C60
SCD1U16V2KX-3GP
C60
SCD1U16V2KX-3GP
1 TP72 TP72
1 2
R67
10KR2J -3-GP
DY
R67
10KR2J -3-GP
DY
1
2
R78
2K37R2F-GP
R78
2K37R2F-GP
K A
D6
RB551V30-GP
D6
RB551V30-GP
G
S D
Q13
2N7002-7F-GP
Q13
2N7002-7F-GP
VDD_3V
1
DN1
2
DP1
3
DN2
4
DP2
5
DN3
6
DP3
7
S
H
D
N
_
S
E
L
9
F
A
N
_
M
O
D
E
1
0
T
R
I
P
_
S
E
T
1
1
S
Y
S
_
S
H
D
N
#
1
2
T
H
E
R
M
T
R
I
P
#
1
3
P
O
W
E
R
_
O
K
#
1
4
N
C
#
8
8
NC#15
15
RESET#
16
CLK_SEL
17
CLK_IN
18
ALERT#
19
GND
20
NC#21
21
S
M
D
A
T
A
2
2
S
M
C
L
K
2
3
V
D
D
_
5
V
b
2
4
F
A
N
b
2
5
F
A
N
a
2
6
V
D
D
_
5
V
a
2
7
T
A
C
H
2
8
G
N
D
2
9
EMC2102
U8
EMC2102-DZK-GP
EMC2102
U8
EMC2102-DZK-GP
1
2
C388
SC470P50V3J N-2GP
DY
C388
SC470P50V3J N-2GP
DY
1 2 R87 0R2J -2-GP
DY
R87 0R2J -2-GP
DY
1
2
C389
SCD1U16V2KX-3GP
C389
SCD1U16V2KX-3GP
1
2
C386
SC4D7U6D3V5KX-3GP
C386
SC4D7U6D3V5KX-3GP
C37
SC470P50V3J N-2GP
DY
C37
SC470P50V3J N-2GP
DY
1 2 R85
10KR2J -3-GP
R85
10KR2J -3-GP
C
B
E
Q1
MMBT3904-3-GP
Q1
MMBT3904-3-GP
1 2
R219
10R2J -2-GP
R219
10R2J -2-GP
1
2
R82
10KR2F-2-GP
R82
10KR2F-2-GP
1
2
R63
10KR2J -3-GP
R63
10KR2J -3-GP
1 2
R66
0R2J -2-GP
DY
R66
0R2J -2-GP
DY
1
2
C50
SC470P50V3J N-2GP
C50
SC470P50V3J N-2GP
G
S D
Q17
2N7002-7F-GP
Q17
2N7002-7F-GP
C
B
E
Q18
MMBT3904-3-GP
Q18
MMBT3904-3-GP
1
2
R348
10KR2J -3-GP
DY
R348
10KR2J -3-GP
DY
1 2
R71
10KR2J -3-GP
R71
10KR2J -3-GP
1 2
R346
49D9R2F-GP
DY
R346
49D9R2F-GP
DY
1 TP223 TP223
1
2
R362
10KR2J -3-GP
R362
10KR2J -3-GP
1
2 3
4
RN3
SRN4K7J -8-GP
RN3
SRN4K7J -8-GP
1
2
C63
SC470P50V3J N-2GP
C63
SC470P50V3J N-2GP
1 2
R68
10KR2J -3-GP
DY
R68
10KR2J -3-GP
DY
1 2
R340
49D9R2F-GP
R340
49D9R2F-GP
1
2
R347
10KR2J -3-GP
R347
10KR2J -3-GP
1 2 R88 10KR2J -3-GP R88 10KR2J -3-GP
1
2
C61
SC470P50V3J N-2GP
C61
SC470P50V3J N-2GP
B
1
A
2
GND
3
Y
4
VCC
5
U10
74LVC1G08GW-1-GP
DY
U10
74LVC1G08GW-1-GP
DY
1 2 R84
10KR2J -3-GP
R84
10KR2J -3-GP
1 2
C82
SCD1U16V2KX-3GP
DY
C82
SCD1U16V2KX-3GP
DY
1
2
C78
SCD1U16V2KX-3GP
C78
SCD1U16V2KX-3GP
1
2
R89
8K2R2J -3-GP
R89
8K2R2J -3-GP
1
2
C70
SCD1U16V2KX-3GP
C70
SCD1U16V2KX-3GP
1
2
C249
SC4D7P50V2CN-1GP
DY
C249
SC4D7P50V2CN-1GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ACAV_IN
ACAV_IN
DCIN_GATE2
MAX8731_DCIN
MAX8731_CSIP
MAX8731_DAC
ACAV_IN
M
A
X
8
7
3
1
_
C
S
S
P
M
A
X
8
7
3
1
_
C
S
S
N
BAT_SCL
BAT_SDA
MAX8731_LX1
MAX8731_CSIN
MAX8731_CCI
MAX8731_CCS
MAX8731_VCC
MAX8731_LDO
MAX8731_CCV
M
A
X
8
7
3
1
_
C
C
V
1
MAX8731_DHI
MAX8731_DLO
MAX8731_BST
MAX8731_LX
MAX8731_REF
MAX8731_ACIN
MAX8731_BST1
BAT_SENSE
DC_IN_D
BATT_SENSE
DCIN_GATE1
ACAV_IN
+PBATT
+3.3V_RTC_LDO
MAX8731_LDO
CHG_AGND
CHG_AGND
CHG_AGND
CHG_AGND
CHG_AGND CHG_AGND
CHG_AGND
CHG_AGND
CHG_PWR
+DC_IN_SS
+DC_IN_SS
+SDC_IN
+DC_IN_SS
+PBATT
+PWR_SRC
+3.3V_RTC_LDO
+PBATT
AC_IN#
BATT_SENSE
BAT_SDA
BAT_SCL
AD_IA
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CHARGER MAX8731
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CHARGER MAX8731
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CHARGER MAX8731
Custom
<Core Design>
Layout Trace 300mil Layout Trace 300mil
Layout Trace 250mil
Layout Trace 300mil
Adaptor In Soft-Start Circuit
SSID = Charger
Id=-8A
Qg=17~24nC
Rdson=15~20mohm
A00.08/0903
A00.08/0909
1 2
R306
D01R2512F-4-GP
R306
D01R2512F-4-GP
1 2
C42 SC220P50V2KX-3GP C42 SC220P50V2KX-3GP
G
S
D
Q3
2N7002-7F-GP
Q3
2N7002-7F-GP
1 2
G11
GAP-CLOSE-PWR
G11
GAP-CLOSE-PWR
1
2
C
5
7
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
C
5
7
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
1 2
C34 SCD1U25V3KX-GP C34 SCD1U25V3KX-GP
1 2
R335
100R2F-L1-GP-U
R335
100R2F-L1-GP-U
1 2
R62
100KR2J -1-GP
R62
100KR2J -1-GP
1
2
E
C
7
9
S
C
D
1
U
5
0
V
3
K
X
-
G
P
E
C
7
9
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1
2
G
5
6
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
G
5
6
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1
2
C
5
5
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
C
5
5
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
1
2
3
4 5
6
7
8 S
S
S
G D
D
D
D
U47
AO4407A-GP
S
S
S
G D
D
D
D
U47
AO4407A-GP
1
2
C
6
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
6
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1 2
R44
1R3F-GP
R44
1R3F-GP
1
2
C
3
2
9
S
C
1
0
U
2
5
V
0
K
X
-
3
G
P
C
3
2
9
S
C
1
0
U
2
5
V
0
K
X
-
3
G
P
1
2
C
3
6
9
S
C
1
0
U
2
5
V
0
K
X
-
3
G
P
C
3
6
9
S
C
1
0
U
2
5
V
0
K
X
-
3
G
P
1 2
R45
0R3J -0-U-GP
R45
0R3J -0-U-GP
DAC
7
VDD
11
DCIN
22
PGND
19
SCL
10
SDA
9
ACIN
2
BATSEL
14
INP
8
ACOK
13
GND
12
CCV
6
CCI
5
CCS
4
CSSP
28
CSSN
27
REF
3
BST
25
LDO
21
DHI
24
LX
23
DLO
20
A
S
N
S
1
CSIN
17
FBSB
16
FBSA
15
VCC
26
CSIP
18
G
N
D
2
9
U7
MAX8731AETI-GP
U7
MAX8731AETI-GP
1
2
C41
SCD1U25V3KX-GP
C41
SCD1U25V3KX-GP
G
S
D
Q2
2N7002-7F-GP
Q2
2N7002-7F-GP
1
2
R295
470KR2J -2-GP
R295
470KR2J -2-GP
1
2
C
5
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
5
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
5
1
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
5
1
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
5
8
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
C
5
8
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
1 2 R61 10KR2F-2-GP R61 10KR2F-2-GP
1
2
C
4
0
S
C
D
1
U
2
5
V
3
K
X
-
G
P
C
4
0
S
C
D
1
U
2
5
V
3
K
X
-
G
P
1 2
L9
IND-5D8UH-GP
L9
IND-5D8UH-GP
1
2
C
3
7
1
S
C
1
0
U
2
5
V
0
K
X
-
3
G
P
DY
C
3
7
1
S
C
1
0
U
2
5
V
0
K
X
-
3
G
P
DY
1
2
3
4 5
6
7
8 S
S
S
G D
D
D
D
U37
AO4407A-GP
S
S
S
G D
D
D
D
U37
AO4407A-GP
1 2
C48
SC1U10V3KX-3GP
C48
SC1U10V3KX-3GP
1
2
C64
SCD1U25V3KX-GP
C64
SCD1U25V3KX-GP
1
2
G
5
7
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
G
5
7
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1
2
C
3
2
3
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
DY
C
3
2
3
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
DY
1
2
E
C
7
6
S
C
D
1
U
5
0
V
3
K
X
-
G
P
E
C
7
6
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1
2
C
4
6
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
C
4
6
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
1
2
R72
100KR2J -1-GP
R72
100KR2J -1-GP
1
2
R341
15K4R2F-GP
R341
15K4R2F-GP
1
2
C38
SC1U10V3KX-3GP
C38
SC1U10V3KX-3GP
1
2
R
6
5
1
0
K
R
2
F
-
2
-
G
P
R
6
5
1
0
K
R
2
F
-
2
-
G
P
1 2
R64
49K9R2F-L-GP
R64
49K9R2F-L-GP
1
2
R339
10KR2F-2-GP
R339
10KR2F-2-GP
1
2
G
5
0
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
G
5
0
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
K A
D5
BAS516-1-GP
D5
BAS516-1-GP
1 2
R338
D01R2512F-4-GP
R338
D01R2512F-4-GP
1 2 3 4
5678
S S S G
DDDD
U45
SI4800BDY-T1
S S S G
DDDD
U45
SI4800BDY-T1
1
2
R48
49K9R2F-L-GP
R48
49K9R2F-L-GP
1
2
R49
33R2J -2-GP
R49
33R2J -2-GP
1
2
C372
SCD01U50V2KX-1GP
C372
SCD01U50V2KX-1GP
1 2 3 4
5678
S S S G
DDDD
U44
SI4800BDY-T1
S S S G
DDDD
U44
SI4800BDY-T1
1
2
C
6
7
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
6
7
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
3
3
1
S
C
1
0
U
2
5
V
0
K
X
-
3
G
P
C
3
3
1
S
C
1
0
U
2
5
V
0
K
X
-
3
G
P
1
2
C47
SCD1U25V3KX-GP
C47
SCD1U25V3KX-GP
1
2
R52
365KR3F-GP
R52
365KR3F-GP
1
2
G
5
1
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
G
5
1
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
G
S
D
Q4
2N7002-7F-GP
Q4
2N7002-7F-GP
1
2
E
C
7
7
S
C
D
1
U
5
0
V
3
K
X
-
G
P
E
C
7
7
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1
2
R59
10KR2J -3-GP
R59
10KR2J -3-GP
1 2 R46
0R0402-PAD
R46
0R0402-PAD
1
2
E
C
8
0
S
C
D
1
U
5
0
V
3
K
X
-
G
P
E
C
8
0
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1
2
C39
SC1U25V5KX-1GP
C39
SC1U25V5KX-1GP
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
+3.3V_ALWP
5
V
_
P
H
A
S
E
1
_
S
n
8
7
7
8
_
F
B
1
_
1
17020_PHASE1
5V_EN
3V_5V_POK
17020_ILIM1
3
V
/5
V
_
T
O
N
3V/5V_VIN
3V_5V_POK
LDO_EN
3V_EN
17020_ILIM2
8
7
7
8
_
S
E
C
F
B
8778_BOOT1_1
17020_BOOT2
17020_BOOT1
+5V_ALWP
8778_BOOT2_1
8778_LGATE2
3V_5V_POK
17020_LGATE1
17020_REFIN2
17020_OUT2
17020_UGATE2
17020_PHASE2
17020_FB 17020_SKIP#
3V_EN
5V_EN
8
7
7
8
_
P
H
A
S
E
2
_
S
n
+5V_VCC1
+5V_ALW2
+5V_ALW2
PWR_SRC_17020
MAX8778_3/5V_AGND
PWR_SRC_17020
MAX8778_3/5V_AGND
MAX8778_3/5V_AGND
+3.3V_RTC_LDO
PWR_SRC_17020
+3.3V_RTC
MAX8778_3/5V_AGND
+5V_VCC1
+2.0V_REF_3V5VREG
+5V_VCC1
+3.3V_ALW
+PWR_SRC PWR_SRC_17020
PWR_SRC_17020 +PWR_SRC
+5V_ALW
+3.3V_ALWP
MAX8778_3/5V_AGND
MAX8778_3/5V_AGND MAX8778_3/5V_AGND
MAX8778_3/5V_AGND
MAX8778_3/5V_AGND
MAX8778_3/5V_AGND
+5V_ALWP
+5V_VCC1
+5V_ALW2
+3.3V_RTC
+5V_ALW2
+3.3V_RTC_LDO
3V_5V_POK
3V_5V_EN
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DC to DC 3.3V/5V
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DC to DC 3.3V/5V
A2
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DC to DC 3.3V/5V
A2
<Core Design>
5V_ALW +/- 5%
Design Current: 6A
Peak current 8.5A
9.35<OCP<12A
3V_ALW +/- 5%
Design Current: 5.4A
Peak current 7.8A
8.58<OCP<10.92A
No Install for ISL6236
Install 10 ohm for MAX8778
0.1uF for ISL6236,
Install with 1uF for
Max8778
NEC 220uF
6D3V, V Size
ESR=25mohm
CLOSE TO PI N 10
CLOSE TO PI N 30
SSID = PWR.Plane.Regulator_3p3v5v
NEC 220uF
6D3V, V Size
ESR=25mohm
I / P cap: 10U 25V K1206 X5R/ 78. 10622. 52L
I nduct or : 3. 3UH PCMC063T3R3MN CYNTEC DCR 28~30mohmI sat =13. 5Ar ms 68. 3R310. 20A
O/ P cap: 220U 6. 3V PSLV0J 227M( 25) 25mOhm2. 236Ar ms NEC_TOKI N/ 77. C2271. 00L
O/ P cap: 150U 6. 3V PSLB20J 157M( 45) 45mOhm1. 374r ms NEC_TOKI N/ 77. C1571. 09L
H/ S: I RF8707 SO- 8/ 14. 2mohm/ 17. 5mOhm@4. 5Vgs/ 84. 08707. 037
L/ S: FDS4712 SO- 8/ 15mohm/ 18mOhm@4. 5Vgs/ 84. 04712. 037
Open
(REF)
GND TONSEL
forced-PWM
operation
ultrasonic
mode
pulse-skipping
mode
Operating
Mode
High
(VCC or 3.3V)
Open/REF (2V) SKIPSEL
300kHz
200kHz
300kHz
400kHz
500kHz
400kHz
CH2 Freq
CH1 Freq
High
(VCC)
GND
0.96/1.0/1.04 3.23/3.3/3.37 4.90/5.0/5.10
Operating
Mode
VCC LDOREFIN GND
VLDOREFIN
= 0.5V
1.482/1.50/1.518 4.925/5.00/5.075
Operating
Mode
VCC FB1 GND
1.038/1.050 /1.062 3.255/3.30/3.345
Operating
Mode
RTC
(3.3V)
REFIN2 5V
Vout1 = 0.7(Rtop/Rbottom + 1)
Vout2 = Vref(Rrefin_top/Rrefin_bottom + 1)
I / P cap: 10U 25V K1206 X5R/ 78. 10622. 52L
I nduct or : 3. 3UH PCMC063T3R3MN CYNTEC DCR 28~30mohmI sat =13. 5Ar ms 68. 3R310. 20A
O/ P cap: 220U 6. 3V PSLV0J 227M( 25) 25mOhm2. 236Ar ms NEC_TOKI N/ 77. C2271. 00L
O/ P cap: 150U 6. 3V PSLB20J 157M( 45) 45mOhm1. 374r ms NEC_TOKI N/ 77. C1571. 09L
L/ S: FDS4712 SO- 8/ 15mohm/ 18mOhm@4. 5Vgs/ 84. 04712. 037
4/14 modify.
Add RC circuit for power sequence.
A00.08/0903
A00.08/0903
A00.08/0903
A00.08/0903
A00.08/0903
A00.08/0902
A00.08/0903
SB
1 2
C146
SC1U25V3KX-1-GP
C146
SC1U25V3KX-1-GP
1 2
G45
GAP-CLOSE-PWR
G45
GAP-CLOSE-PWR
1 2
C165
SC1U25V3KX-1-GP
C165
SC1U25V3KX-1-GP
1 2 R106 0R0402-PAD R106 0R0402-PAD
1
2
C
3
9
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
3
9
7
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2 R136
270KR2F-GP
R136
270KR2F-GP
1 2 R110 0R0402-PAD R110 0R0402-PAD
1 2
G43
GAP-CLOSE-PWR
G43
GAP-CLOSE-PWR
1 2
G26
GAP-CLOSE-PWR
G26
GAP-CLOSE-PWR
1 2
G68
GAP-CLOSE-PWR
G68
GAP-CLOSE-PWR
1
2
C180
SCD1U10V2KX-4GP
DY
C180
SCD1U10V2KX-4GP
DY
1 2 R134 0R0402-PAD R134 0R0402-PAD
1
2
R
1
2
9
2
D
2
R
5
F
-
2
-
G
P
DY
R
1
2
9
2
D
2
R
5
F
-
2
-
G
P
DY
1
2
R86
2D2R5F-2-GP
DY
R86
2D2R5F-2-GP
DY
1
2
R137
0R0402-PAD
R137
0R0402-PAD
1 2
G42
GAP-CLOSE-PWR
G42
GAP-CLOSE-PWR
1
2
C139
SCD1U25V3KX-GP
C139
SCD1U25V3KX-GP
1 2 3 4
5678
S S S G
DDDD
U12
IRF8707PBF-GP
S S S G
DDDD
U12
IRF8707PBF-GP
1
2
C
1
5
5
S
C
1
U
2
5
V
3
K
X
-
1
-
G
P
C
1
5
5
S
C
1
U
2
5
V
3
K
X
-
1
-
G
P
1 2
G21
GAP-CLOSE-PWR
G21
GAP-CLOSE-PWR
1
2
R109
100KR2J -1-GP
R109
100KR2J -1-GP
1 2
R135
0R3J -0-U-GP
R135
0R3J -0-U-GP
1
2
C
4
2
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
2
4
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C169
SCD1U50V3KX-GP
C169
SCD1U50V3KX-GP
1
2
R384
0R0402-PAD
R384
0R0402-PAD
1
2
C
1
7
6
S
C
3
3
0
P
5
0
V
2
K
X
-
3
G
P
DY C
1
7
6
S
C
3
3
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
C79
SC330P50V2KX-3GP
DY
C79
SC330P50V2KX-3GP
DY
1 2
C183
SCD1U25V3KX-GP
C183
SCD1U25V3KX-GP
1
2
C
1
4
8
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
1
4
8
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1 2
R127
0R0402-PAD
R127
0R0402-PAD
1
2
C141
SCD1U10V2KX-4GP
DY
C141
SCD1U10V2KX-4GP
DY
1
2
R397
0R0805-PAD
R397
0R0805-PAD
1 2
G31
GAP-CLOSE-PWR
G31
GAP-CLOSE-PWR
1 2
R108
237KR2F-GP
R108
237KR2F-GP
1 2
G66
GAP-CLOSE-PWR
G66
GAP-CLOSE-PWR
1
2
G41
GAP-CLOSE-PWR-3-GP
G41
GAP-CLOSE-PWR-3-GP
1 2
R393
10R3F-GP
R393
10R3F-GP
1
2
C
8
5
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
8
5
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
2
C172
SC1U25V3KX-1-GP
C172
SC1U25V3KX-1-GP
1
2
C
4
2
1
S
C
1
K
P
5
0
V
2
K
X
-
1
G
P
C
4
2
1
S
C
1
K
P
5
0
V
2
K
X
-
1
G
P
1
2
R
1
0
7
0
R
2
J
-
2
-
G
P
DY R
1
0
7
0
R
2
J
-
2
-
G
P
DY
1 2 R391
0R0402-PAD
R391
0R0402-PAD
1 2
G44
GAP-CLOSE-PWR
G44
GAP-CLOSE-PWR
1 2
G46
GAP-CLOSE-PWR
G46
GAP-CLOSE-PWR
1
2
R132
0R2J -2-GP
DY
R132
0R2J -2-GP
DY
1 2
G27
GAP-CLOSE-PWR
G27
GAP-CLOSE-PWR
1 2
G63
GAP-CLOSE-PWR
G63
GAP-CLOSE-PWR
VIN
1
GND
2
EN
3
NC#4
4
VOUT
5
U19
G9091-330T11U-GP
U19
G9091-330T11U-GP
1 2
L15
IND-3D3UH-57GP
L15
IND-3D3UH-57GP
1 2
R118
0R3J -0-U-GP
R118
0R3J -0-U-GP
1 2
G17
GAP-CLOSE-PWR
G17
GAP-CLOSE-PWR
1 2
G25
GAP-CLOSE-PWR
G25
GAP-CLOSE-PWR
1 2
G29
GAP-CLOSE-PWR
G29
GAP-CLOSE-PWR
1
2
R
1
1
3
0
R
2
J
-
2
-
G
P
DY
R
1
1
3
0
R
2
J
-
2
-
G
P
DY
1
2
T
C
2
S
T
2
2
0
U
6
D
3
V
D
M
-
1
5
G
P
T
C
2
S
T
2
2
0
U
6
D
3
V
D
M
-
1
5
G
P
1
2
C
8
6
S
C
D
1
U
5
0
V
3
K
X
-
G
P
C
8
6
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1234
5 6 7 8
SSSG
D D D D
U15
IR
F
8
7
0
7
P
B
F
-
G
P
SSSG
D D D D
U15
IR
F
8
7
0
7
P
B
F
-
G
P
1
2
R399
0R0805-PAD
R399
0R0805-PAD
1 2
G32
GAP-CLOSE-PWR
G32
GAP-CLOSE-PWR
1
2
C
1
4
7
S
C
D
1
U
5
0
V
3
K
X
-
G
P
C
1
4
7
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1
2
C
1
8
4
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
1
8
4
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C
4
0
2
S
C
2
2
0
0
P
5
0
V
2
K
X
-
2
G
P
DY
C
4
0
2
S
C
2
2
0
0
P
5
0
V
2
K
X
-
2
G
P
DY
1
2
C
4
2
2
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
4
2
2
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
2
C
1
7
9
S
C
D
1
U
2
5
V
3
K
X
-
G
P
C
1
7
9
S
C
D
1
U
2
5
V
3
K
X
-
G
P
1 2
G48
GAP-CLOSE-PWR
G48
GAP-CLOSE-PWR
1 2
G23
GAP-CLOSE-PWR
G23
GAP-CLOSE-PWR
1 2
PR19 0R2J -2-GP
DY
PR19 0R2J -2-GP
DY
1 2
G19
GAP-CLOSE-PWR
G19
GAP-CLOSE-PWR
1 2
G33
GAP-CLOSE-PWR
G33
GAP-CLOSE-PWR
1 2
G36
GAP-CLOSE-PWR
G36
GAP-CLOSE-PWR
1 2 3 4
5678
S S S G
DDDD
U
1
1
A
O
4
7
1
2
-
G
P
S S S G
DDDD
U
1
1
A
O
4
7
1
2
-
G
P
1 2
G64
GAP-CLOSE-PWR
G64
GAP-CLOSE-PWR
1
2
G
1
8
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
G
1
8
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1 2
G47
GAP-CLOSE-PWR
G47
GAP-CLOSE-PWR
1
2
C177
SC4D7U6D3V5KX-3GP
C177
SC4D7U6D3V5KX-3GP
1
2
TC7
S
T
2
2
0
U
6
D
3
V
D
M
-
1
5
G
P
TC7
S
T
2
2
0
U
6
D
3
V
D
M
-
1
5
G
P
1
2
C
4
0
1
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
4
0
1
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
2
TC20
S
T
1
5
0
U
6
D
3
V
B
M
-
1
-
G
P
DY
TC20
S
T
1
5
0
U
6
D
3
V
B
M
-
1
-
G
P
DY
1 2
G28
GAP-CLOSE-PWR
G28
GAP-CLOSE-PWR
1 2
G30
GAP-CLOSE-PWR
G30
GAP-CLOSE-PWR
1234
5 6 7 8
SSSG
D D D D
U
1
7
A
O
4
7
1
2
-
G
P
SSSG
D D D D
U
1
7
A
O
4
7
1
2
-
G
P
R
E
F
1
T
O
N
2
V
C
C
3
O
N
L
D
O
4
R
T
C
5
IN
6
L
D
O
7
L
D
O
R
E
F
IN
8
BYP
9
OUT1
10
FB1
11
ILIM1
12
PGOOD1
13
ON1
14
DH1
15
LX1
16
B
S
T
1
1
7
D
L
1
1
8
V
D
D
1
9
S
E
C
F
B
2
0
A
G
N
D
2
1
P
G
N
D
2
2
D
L
2
2
3
B
S
T
2
2
4
LX2
25
DH2
26
ON2
27
PGOOD2
28
SKIP#
29
OUT2
30
ILIM2
31
REFIN2
32
GND
33
U18
MAX17020ETJ -GP
U18
MAX17020ETJ -GP
1
2
C
1
7
1
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
1
7
1
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C149
SCD1U25V3KX-GP
C149
SCD1U25V3KX-GP
1 2
L13
IND-3D3UH-57GP
L13
IND-3D3UH-57GP
1 2
G70
GAP-CLOSE-PWR
G70
GAP-CLOSE-PWR
1 2
R114
0R2J -2-GP
DY
R114
0R2J -2-GP
DY
1
2
R387
0R2J -2-GP DY
R387
0R2J -2-GP DY
1 2
G72
GAP-CLOSE-PWR
G72
GAP-CLOSE-PWR
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
6
2
6
6
A
_
D
R
O
O
P
6266A_BOOT2
6266A_SOFT
6
2
6
6
A
_
V
S
U
M
6
2
6
6
A
_
V
R
O
N
6266A_LGATE2
6
2
6
6
A
_
V
D
I
F
F
6266A_PSI# 6266A_UGATE1
6
2
6
6
A
_
D
0
6
2
6
6
A
_
D
2
6
2
6
6
A
_
D
1
6
2
6
6
A
_
D
5
6
2
6
6
A
_
D
4
6
2
6
6
A
_
D
3
6
2
6
6
A
_
D
6
6266A_FB2
6266A_VO
6
2
6
6
A
_
V
I
N
6266A_PMON
6266A_VW
6266A_VO
6
2
6
6
A
_
C
L
K
_
E
N
#
6266A_PHASE1
6
2
6
6
A
_
D
P
R
S
T
P
#
6
2
6
6
A
_
D
P
R
S
L
P
V
R
6266A_PHASE2
6266A_FB
6266A_COMP
6
2
6
6
A
_
V
S
E
N
6266A_RBIAS
6
2
6
6
A
_
D
F
B
6266A_OCSET
6266A_UGATE2
6266A_VSUM
C
P
U
_
V
I
D
6
C
P
U
_
V
I
D
5
6
2
6
6
A
_
V
O
6266A_ LGATE1
C
P
U
_
V
I
D
3
C
P
U
_
V
I
D
4
C
P
U
_
V
I
D
1
C
P
U
_
V
I
D
2
C
P
U
_
V
I
D
0
6266A_NTC
6
2
6
6
A
_
R
T
N
6
2
6
6
A
_
3
V
3
6
2
6
6
A
_
V
D
D
6266A_PHASE1
6266A_PHASE2
6
2
6
6
A
_
I
S
E
N
26266A_ISEN1
6266A_VO
6266A_SOFT
CLK_EN#
6266AGND
+3.3V_RUN
+5V_RUN
+1.05V_VCCP
+3.3V_RUN
+5V_RUN
PWR_SRC_CPU
+3.3V_RUN
CPU_PROCHOT#
VGATE_PWRGD
PSI#
VCC_SENSE
VSS_SENSE
DPRSLPVR
H_DPRSTP#
CPU_VID[6..0]
6266A_PHASE2
6266A_PHASE1
6266A_VO
6266A_ISEN2
6266A_ISEN1
6266A_VSUM
6266A_ LGATE1
6266A_LGATE2
6266A_UGATE1
6266A_UGATE2
CPUCORE_ON
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
CPU VCORE POWER(1/2)
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Place close to
1st phase choke
Place close to 1st Choke
74. 06266. 073
SSID = CPU.Regulator
A00.08/0903 A00.08/0903
A00.08/0903
SB
1 2
C339
SCD22U25V3KX-GP
C339
SCD22U25V3KX-GP
1 2
R321
1KR2F-3-GP
R321
1KR2F-3-GP
1 2
C346
SCD015U50V3KX-GP
C346
SCD015U50V3KX-GP
1 2
R315 4K99R2F-L-GP R315 4K99R2F-L-GP
1
2
R
3
1
3
0
R
0
4
0
2
-
P
A
D
R
3
1
3
0
R
0
4
0
2
-
P
A
D
1 2
R314
1R3F-GP
R314
1R3F-GP
1 2
C349
SC100P50V2J N-3GP
C349
SC100P50V2J N-3GP
1 2
C351
SCD22U25V3KX-GP
C351
SCD22U25V3KX-GP
1
2
R312
1K91R2F-1-GP
R312
1K91R2F-1-GP
1 TP22 TP22
1
2
C19
SCD22U10V2KX-1GP
C19
SCD22U10V2KX-1GP
1
2
R
3
0
1
0
R
0
4
0
2
-
P
A
D
R
3
0
1
0
R
0
4
0
2
-
P
A
D
1
2
C337
SCD1U10V2KX-4GP
C337
SCD1U10V2KX-4GP
1 2
PR12 1KR2J -1-GP
DY
PR12 1KR2J -1-GP
DY
1
2
C
2
0
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
C
2
0
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
1 2
C345
SC2D2U10V3KX-1GP
C345
SC2D2U10V3KX-1GP
1
2
R
2
9
0
R
0
4
0
2
-
P
A
D
R
2
9
0
R
0
4
0
2
-
P
A
D
1
2
R
3
2
7
1
K
R
2
F
-
3
-
G
P
R
3
2
7
1
K
R
2
F
-
3
-
G
P
1 2
R38 12K1R2F-L1-GP R38 12K1R2F-L1-GP
1 2
R324
0R0402-PAD
R324
0R0402-PAD
1 2 R35
0R0402-PAD
R35
0R0402-PAD
1 2 R330
0R0402-PAD
R330
0R0402-PAD
1 2
R319
1R3F-GP
R319
1R3F-GP
1 2
R318
97K6R2F-GP
R318
97K6R2F-GP
1
2
R
3
0
8
0
R
0
4
0
2
-
P
A
D
R
3
0
8
0
R
0
4
0
2
-
P
A
D
1 2
R41
10R3F-GP
R41
10R3F-GP
1
2
C
3
6
4
S
C
1
8
0
P
5
0
V
2
J
N
-
1
G
P
C
3
6
4
S
C
1
8
0
P
5
0
V
2
J
N
-
1
G
P
1
2
R
3
0
3
0
R
0
4
0
2
-
P
A
D
R
3
0
3
0
R
0
4
0
2
-
P
A
D
1
2
R322
1KR2F-3-GP
R322
1KR2F-3-GP
1 2
R317
8K25R2F-1-GP
R317
8K25R2F-1-GP
1
2
R
2
9
8
0
R
0
4
0
2
-
P
A
D
R
2
9
8
0
R
0
4
0
2
-
P
A
D
1
2
C28
SC1U10V3KX-3GP
C28
SC1U10V3KX-3GP
1
2
C
2
7
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
C
2
7
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
1 2
R316 147KR2F-GP R316 147KR2F-GP
1
2
C18
SCD22U10V2KX-1GP
C18
SCD22U10V2KX-1GP
1 2 R299 NTC-470K-1-GP
DY
R299 NTC-470K-1-GP
DY
1
2
R
3
1
0
0
R
0
4
0
2
-
P
A
D
R
3
1
0
0
R
0
4
0
2
-
P
A
D
1 2 R297 10KR2J -3-GP R297 10KR2J -3-GP
1
2
R332
2K61R2F-1-GP
R332
2K61R2F-1-GP
1
2C
3
6
0
S
C
D
0
4
7
U
1
0
V
2
K
X
-
2
G
P
C
3
6
0
S
C
D
0
4
7
U
1
0
V
2
K
X
-
2
G
P
1
2
R36
68R2F-GP
DY
R36
68R2F-GP
DY
1
2
C361
SC330P50V2KX-3GP
C361
SC330P50V2KX-3GP
1
2
R
1
6
9
4
9
9
R
2
F
-
2
-
G
P
R
1
6
9
4
9
9
R
2
F
-
2
-
G
P
1 2 R329
0R0402-PAD
R329
0R0402-PAD
1
2
R
3
0
9
0
R
0
4
0
2
-
P
A
D
R
3
0
9
0
R
0
4
0
2
-
P
A
D
PGOOD
1
PSI#
2
PMON
3
RBIAS
4
VR_TT#
5
NTC
6
SOFT
7
OCSET
8
VW
9
COMP
10
FB
11
FB2
12
V
D
I
F
F
1
3
V
S
E
N
1
4
R
T
N
1
5
D
R
O
O
P
1
6
D
F
B
1
7
V
O
1
8
V
S
U
M
1
9
V
I
N
2
0
G
N
D
2
1
V
D
D
2
2
I
S
E
N
2
2
3
I
S
E
N
1
2
4
NC#25
25
BOOT2
26
UGATE2
27
PHASE2
28
PGND2
29
LGATE2
30
PVCC
31
LGATE1
32
PGND1
33
PHASE1
34
UGATE1
35
BOOT1
36
V
I
D
0
3
7
V
I
D
1
3
8
V
I
D
2
3
9
V
I
D
3
4
0
V
I
D
4
4
1
V
I
D
5
4
2
V
I
D
6
4
3
V
R
_
O
N
4
4
D
P
R
S
L
P
V
R
4
5
D
P
R
S
T
P
#
4
6
C
L
K
_
E
N
#
4
7
3
V
3
4
8
G
N
D
4
9
U40
ISL6266AHRZ-GP
U40
ISL6266AHRZ-GP
1
2
C362
SCD01U50V2KX-1GP
C362
SCD01U50V2KX-1GP
1
2
R
3
2
3
3
K
9
2
R
2
F
-
G
P
R
3
2
3
3
K
9
2
R
2
F
-
G
P
1
2
R300
NTC-10K-9-GP
R300
NTC-10K-9-GP
1
2
R
3
0
4
0
R
0
4
0
2
-
P
A
D
R
3
0
4
0
R
0
4
0
2
-
P
A
D
1 2
R320
100R2F-L1-GP-U
R320
100R2F-L1-GP-U
1
2
R
3
2
8
1
1
K
R
2
F
-
L
-
G
P
R
3
2
8
1
1
K
R
2
F
-
L
-
G
P
1 2
C356
SC2200P50V2KX-2GP
C356
SC2200P50V2KX-2GP
1
2
C359
SC330P50V2KX-3GP
C359
SC330P50V2KX-3GP
1
2
R
3
3
1
1
0
R
3
F
-
G
P
R
3
3
1
1
0
R
3
F
-
G
P
1
2
R305
10R3F-GP
R305
10R3F-GP
1 2 C343 SCD01U50V2KX-1GP
DY
DY
1 2 R37 4K02R2F-GP
DY
R37 4K02R2F-GP
DY
1 2
C341
SCD1U16V2KX-3GP
C341
SCD1U16V2KX-3GP
1
2
R
3
0
7
0
R
0
4
0
2
-
P
A
D
R
3
0
7
0
R
0
4
0
2
-
P
A
D
1 2
C348
SC270P50V2KX-1GP
C348
SC270P50V2KX-1GP
1
2
C
3
5
8
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
C
3
5
8
S
C
D
2
2
U
1
0
V
2
K
X
-
1
G
P
1 2 PR11 10KR2J -3-GP
DY
PR11 10KR2J -3-GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
6266A_VSUM
6266A_ISEN2
6266A_ISEN1
6266A_VO
6266A_UGATE1
6266A_ LGATE1
6266A_ISEN1
6266A_VSUM
6266A_VO
6266A_ISEN2
6266A_PHASE2
6266A_LGATE2
6266A_UGATE2
6266A_PHASE1
+VCC_CORE
+VCC_CORE
PWR_SRC_CPU
PWR_SRC_CPU
PWR_SRC_CPU +PWR_SRC
+PWR_SRC
6266A_PHASE1
6266A_PHASE2
6266A_ISEN1
6266A_ISEN2
6266A_VSUM
6266A_VO
6266A_UGATE1
6266A_ LGATE1
6266A_UGATE2
6266A_LGATE2
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
68. R3610. 20C
68. R3610. 20C
I / P cap: 10U 25V K1206 X5R/ 78. 10622. 52L
I nduct or : 0. 36UH PCMC104T- R36MN1R05J CYNTEC DCR 1. 05( +5%~- 5%) mohm
I sat =60Ar ms 68. R3610. 20C
O/ P cap: 330U 2V EEFSX0D331ER 9mOhm3. 0Ar ms Panasoni c/ 79. 33719. L01
H/ S: AOL1426 Power PAK/ 10. 2mohm/ 12. 5mOhm@4. 5Vgs/ 84. 01426. 037
L/ S: AOL1412 Power PAK/ 3. 8mohm/ 4. 65mOhm@4. 5Vgs/ 84. 01412. 037
SSID = CPU.Regulator
CPU noise
1
2
T
C
1
3
S
E
3
3
0
U
2
V
D
M
-
L
-
G
P
T
C
1
3
S
E
3
3
0
U
2
V
D
M
-
L
-
G
P
1 2 R40 10KR2F-2-GP R40 10KR2F-2-GP
1
2
T
C
1
5
S
E
3
3
0
U
2
V
D
M
-
L
-
G
P
T
C
1
5
S
E
3
3
0
U
2
V
D
M
-
L
-
G
P
1
2
C
4
S
C
D
1
U
2
5
V
3
K
X
-
G
P
C
4
S
C
D
1
U
2
5
V
3
K
X
-
G
P
1
2
C
3
3
5
S
C
D
1
U
2
5
V
3
K
X
-
G
P
C
3
3
5
S
C
D
1
U
2
5
V
3
K
X
-
G
P
1
2
G
5
3
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
G
5
3
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1 2
G6
GAP-CLOSE-PWR
G6
GAP-CLOSE-PWR
1 2 3 4
5678
S S S G
DDDD
U38
AOL1412-GP
S S S G
DDDD
U38
AOL1412-GP
1 2 3 4
5678
S S S G
DDDD
U39
AOL1426-GP
S S S G
DDDD
U39
AOL1426-GP
1 2
L10
IND-D36UH-9-GP
L10
IND-D36UH-9-GP
1
2
G
5
5
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
G
5
5
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1
2
C
3
5
4
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
3
5
4
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
2
TC16 S
E
3
3
0
U
2
V
D
M
-
L
-
G
P
TC16 S
E
3
3
0
U
2
V
D
M
-
L
-
G
P
1
2
C
2
3
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
2
3
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
2
TC14 S
E
3
3
0
U
2
V
D
M
-
L
-
G
P
DY
TC14 S
E
3
3
0
U
2
V
D
M
-
L
-
G
P
DY
1
2
C
3
3
3
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
3
3
3
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
2
C
3
5
3
S
C
D
1
U
2
5
V
3
K
X
-
G
P
C
3
5
3
S
C
D
1
U
2
5
V
3
K
X
-
G
P
1 2 R325 10KR2F-2-GP R325 10KR2F-2-GP
1 2
G7
GAP-CLOSE-PWR
G7
GAP-CLOSE-PWR
1 2 3 4
5678
S S S G
DDDD
U43
AOL1412-GP
S S S G
DDDD
U43
AOL1412-GP
1
2
C
2
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
2
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1 2
L8
IND-D36UH-9-GP
L8
IND-D36UH-9-GP
1
2
G
5
2
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
G
5
2
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1 2 R333 3K65R2F-1-GP R333 3K65R2F-1-GP
1 2
G3
GAP-CLOSE-PWR
G3
GAP-CLOSE-PWR
1
2
PTC3
SE100U25VM-14GP
DY
PTC3
SE100U25VM-14GP
DY
1 2 R39 10KR2F-2-GP R39 10KR2F-2-GP
1
2
C
2
2
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
2
2
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1 2
G10
GAP-CLOSE-PWR
G10
GAP-CLOSE-PWR
1 2 3 4
5678
S S S G
DDDD
U6
AOL1412-GP
S S S G
DDDD
U6
AOL1412-GP
1 2 R334 1R2F-GP R334 1R2F-GP
1 2
G2
GAP-CLOSE-PWR
G2
GAP-CLOSE-PWR
1
2
G
5
4
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
G
5
4
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1
2
TC1 S
E
3
3
0
U
2
V
D
M
-
L
-
G
P
TC1 S
E
3
3
0
U
2
V
D
M
-
L
-
G
P
1 2 3 4
5678
S S S G
DDDD
U42
AOL1426-GP
S S S G
DDDD
U42
AOL1426-GP
1
2
TC10
SE100U25VM-14GP
DY
TC10
SE100U25VM-14GP
DY
1 2
G1
GAP-CLOSE-PWR
G1
GAP-CLOSE-PWR
1 2
G8
GAP-CLOSE-PWR
G8
GAP-CLOSE-PWR
1
2
C
1
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
1
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1 2 3 4
5678
S S S G
DDDD
U
3
A
O
L
1
4
2
6
-
G
P
S S S G
DDDD
U
3
A
O
L
1
4
2
6
-
G
P
1
2
C
3
5
5
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
3
5
5
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1 2 R43 1R2F-GP R43 1R2F-GP
1 2
G5
GAP-CLOSE-PWR
G5
GAP-CLOSE-PWR
1
2
C
2
1
S
C
D
1
U
2
5
V
3
K
X
-
G
P
C
2
1
S
C
D
1
U
2
5
V
3
K
X
-
G
P
1
2
C
3
3
4
S
C
D
1
U
2
5
V
3
K
X
-
G
P
C
3
3
4
S
C
D
1
U
2
5
V
3
K
X
-
G
P
1 2
G9
GAP-CLOSE-PWR
G9
GAP-CLOSE-PWR
1 2
G4
GAP-CLOSE-PWR
G4
GAP-CLOSE-PWR
1 2 R326 10KR2F-2-GP R326 10KR2F-2-GP
1 2 3 4
5678
S S S G
DDDD
U2
AOL1412-GP
S S S G
DDDD
U2
AOL1412-GP
1 2 3 4
5678
S S S G
DDDD
U5
AOL1426-GP
S S S G
DDDD
U5
AOL1426-GP
1 2 R42 3K65R2F-1-GP R42 3K65R2F-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_DRVH
+1.05V_DRVL
+1.05V_LL
+1.05V_VFB
+1.05V_VBST
+1.05V_LL1
+1.05V_TRIP
+1.05V_EN
+1.05V_VOUT
+1.05V_V5FILT
+1.05V_TON
+1.05V_VFB
+1.05V_VOUT
+1.05V_LL
PM_SLP_S3#
+PWR_SRC +1.05V_PWR_SRC
+1.05V_RUNP
+3.3V_RUN
+1.05V_PWR_SRC
+5V_ALW
+1.05V_VCCP
+5V_ALW
+1.05V_RUNP
+1.05V_RUNP +1.05V_VCCP
+1.05V_PWR_SRC +PWR_SRC
+
1
.
0
5
V
_
P
W
R
_
S
R
C
+5V_RUN
RUNPWROK PM_SLP_S3#
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DC to DC 1.05V
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DC to DC 1.05V
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DC to DC 1.05V
Custom
<Core Design>
Vout=0.75V*(R1+R2)/R2
I / P cap: 10U 25V K1206 X5R/ 78. 10622. 52L
I nduct or : 1. 0UH PCMC104T1R0MN Cynt ec DCR: 3. 0 ~3. 5mohmI sat =40Ar ms 68. 1R01A. 20A
O/ P cap: 330U 2. 5V PSLV0E337M( 15) 15mOhm2. 886Ar ms NEC_TOKI N/ 77. C3371. 10L
L/ S: FDS8672S SO- 8/ 5. 3mOhm/ 7. 0mohm@4. 5Vgs/ 84. 08672. A37
Swi t chi ng f r eq- - >350KHz
+1.05V_SUSP+/- 5%
Peak current 20.4A
22.44<OCP<28.5
TI : Non_ASM
RT : ASM
RT: Non_ASM
TI : ASM
TI : Non_ASM
RT : ASM
RT: Non_ASM
TI : ASM
H/S: IRF8707 SO-8/
14.2mohm/17.5mOhm@4.5Vgs
84.08707.037
L/S: FDS8672S SO-8
5.3mOhm/7.0mohm@4.5Vgs
84.08672.A37
SSID = PWR.Plane.Regulator_1p05v
1
2
C400
SC1U10V3KX-3GP
C400
SC1U10V3KX-3GP
1 2
G62
GAP-CLOSE-PWR
G62
GAP-CLOSE-PWR
1 2
R365
0R3J -0-U-GP
R365
0R3J -0-U-GP
1
2
C
4
1
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
C
4
1
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2
PR13
1M1R2J -GP
DY
PR13
1M1R2J -GP
DY
1 2
G40
GAP-CLOSE-PWR
G40
GAP-CLOSE-PWR
1
2
R364
300R3-GP
R364
300R3-GP
1
2
R
3
6
6
6
K
1
9
R
2
D
-
1
-
G
P
R
3
6
6
6
K
1
9
R
2
D
-
1
-
G
P
1
2
PR15
17K4R3F-GP
DY
PR15
17K4R3F-GP
DY
1 2
G14
GAP-CLOSE-PWR
G14
GAP-CLOSE-PWR
1 2
G24
GAP-CLOSE-PWR
G24
GAP-CLOSE-PWR
1
2
G35
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
G35
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1 2
G12
GAP-CLOSE-PWR
G12
GAP-CLOSE-PWR
1 2
G37
GAP-CLOSE-PWR
G37
GAP-CLOSE-PWR
1 2
G69
GAP-CLOSE-PWR
G69
GAP-CLOSE-PWR
1 2
G67
GAP-CLOSE-PWR
G67
GAP-CLOSE-PWR
EN_PSV
1
TON
2
VOUT
3
V5FILT
4
VFB
5
PGOOD
6
GND
7
PGND
8
DRVL
9
V5DRV
10
TRIP
11
LL
12
DRVH
13
VBST
14
U49
TPS51117PWR-GP
U49
TPS51117PWR-GP
1
2
R352
30KR2F-GP
R352
30KR2F-GP
1 2
G73
GAP-CLOSE-PWR
G73
GAP-CLOSE-PWR
2 1
D23
CH751H-40PT
D23
CH751H-40PT
1 2
C398
SCD1U25V3KX-GP
C398
SCD1U25V3KX-GP
1 2
G15
GAP-CLOSE-PWR
G15
GAP-CLOSE-PWR
1
2
C429
SC330P50V3KX-GP
DY
C429
SC330P50V3KX-GP
DY
1 2 3 4
5678
S S S G
DDDD
U13
IRF8707PBF-GP
S S S G
DDDD
U13
IRF8707PBF-GP
1 2
L14
COIL-1UH-33-GP
L14
COIL-1UH-33-GP
1 2
G58
GAP-CLOSE-PWR
G58
GAP-CLOSE-PWR
1 2
G38
GAP-CLOSE-PWR
G38
GAP-CLOSE-PWR
1 2
G20
GAP-CLOSE-PWR
G20
GAP-CLOSE-PWR
1
2
C
1
2
0
S
C
D
1
U
5
0
V
3
K
X
-
G
P
C
1
2
0
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1
2
TC5
S
T
3
3
0
U
2
D
5
V
D
M
-
1
3
G
P
TC5
S
T
3
3
0
U
2
D
5
V
D
M
-
1
3
G
P
1 2
G39
GAP-CLOSE-PWR
G39
GAP-CLOSE-PWR
1
2
C
1
2
1
S
C
2
2
0
0
P
5
0
V
2
K
X
-
2
G
P
DY C
1
2
1
S
C
2
2
0
0
P
5
0
V
2
K
X
-
2
G
P
DY
1 2 3 4
5678
D D
G
D
S
D
S S
U
1
6
F
D
S
8
6
7
2
S
-
G
P
D D
G
D
S
D
S S
U
1
6
F
D
S
8
6
7
2
S
-
G
P
1 2
G76
GAP-CLOSE-PWR
G76
GAP-CLOSE-PWR
2
1
D21
CH551H-30PT-GP
D21
CH551H-30PT-GP
1 2
G75
GAP-CLOSE-PWR
G75
GAP-CLOSE-PWR
1
2
R388
2D2R5F-2-GP
DY
R388
2D2R5F-2-GP
DY
1 2 3 4
5678
D D
G
D
S
D
S S
U51
FDS8672S-GP
D D
G
D
S
D
S S
U51
FDS8672S-GP
1 2
G65
GAP-CLOSE-PWR
G65
GAP-CLOSE-PWR
1 2
R358
100KR2J -1-GP
R358
100KR2J -1-GP
1
2
C382
SC18P50V2J N-1-GP
DY
C382
SC18P50V2J N-1-GP
DY
1 2
G74
GAP-CLOSE-PWR
G74
GAP-CLOSE-PWR
1 2
G61
GAP-CLOSE-PWR
G61
GAP-CLOSE-PWR
1 2
G71
GAP-CLOSE-PWR
G71
GAP-CLOSE-PWR
1 2
G22
GAP-CLOSE-PWR
G22
GAP-CLOSE-PWR
1
2
3
D19
BAW56-2-GP
D19
BAW56-2-GP
1
2
C
4
1
1
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
4
1
1
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
2
R353
12KR2F-L-GP
R353
12KR2F-L-GP
1 2 R355 100KR2J -1-GP R355 100KR2J -1-GP
1 2 R363 200KR2J -L1-GP R363 200KR2J -L1-GP
1
2
C396
SC1U10V3KX-3GP
C396
SC1U10V3KX-3GP
1 2
G13
GAP-CLOSE-PWR
G13
GAP-CLOSE-PWR
1
2
C
1
2
5
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
1
2
5
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
2
TC6
S
T
3
3
0
U
2
D
5
V
D
M
-
1
3
G
P
TC6
S
T
3
3
0
U
2
D
5
V
D
M
-
1
3
G
P
1
2
C
3
7
8
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
C
3
7
8
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
1 2 3 4
5678
S S S G
DDDD
U
5
0
I
R
F
8
7
0
7
P
B
F
-
G
P
S S S G
DDDD
U
5
0
I
R
F
8
7
0
7
P
B
F
-
G
P
1 2
G34
GAP-CLOSE-PWR
G34
GAP-CLOSE-PWR
1
2
C
4
1
2
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
4
1
2
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1 2
G16
GAP-CLOSE-PWR
G16
GAP-CLOSE-PWR
1 2
G59
GAP-CLOSE-PWR
G59
GAP-CLOSE-PWR
1 2
G60
GAP-CLOSE-PWR
G60
GAP-CLOSE-PWR
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPS51116_VDDQSNS
TPS51116_UGT
TPS51116_LGT
TPS51116_VBST TPS51116_PHS
51116_VDDQSET
TPS51116_PHS_SET
TPS51116_LGT
TPS51116_VDDQSNS
TPS51116_VBST
TPS51116_UGT
51116_VDDQSET
51116_VDD
TPS51116_PHS
TPS51116_VBST1
0D9V_EN
0D9V_EN
0D9V_EN
+5116_PWR_SRC
+1.8V_SUS_P
+5116_PWR_SRC
+1.8V_SUS_P
+0D9V_DDR_P
+1.8V_SUS
+0.9V_DDR_VTT
+PWR_SRC
+0D9V_DDR_P
+0D9V_DDR_P
+3.3V_ALW
+5V_ALW
+5V_ALW
+5V_ALW
+1.8V_SUS_P
+5V_ALW
+V_DDR_MCH_REF
+1.8V_SUS_P
+5V_ALW
+5116_PWR_SRC
RUNPWROK
PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S4#
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DC to DC 1.8V/0.9V
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DC to DC 1.8V/0.9V
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DC to DC 1.8V/0.9V
Custom
<Core Design>
TI TPS51116 for 1.8V and 0.9V
Cl ose t o VFB Pi n ( pi n5) VDDQSET VDDQ (V) VTTREF and VTT NOTE
GND
V5IN
FB Resistors
2.5
Adjustable
1.8
VVDDQSNS/2
VVDDQSNS/2
VVDDQSNS/2
DDR
DDR2
1.5 V < VVDDQ < 3 V
State S3 S5 VDDR VTTREF VTT
S0
S3
S4/S5
Hi Hi
Hi Lo
Lo Lo
On
On
On
On
On
Off Off Off
Off(Hi-Z)
+1.8V_SUS +/- 5%
Peak current 13.9A
15.29<OCP<19.46A
I / P cap: 10U 25V K1206 X5R/ 78. 10622. 52L
I nduct or : 1. 5UHPCMC063T- 1R5MN Cynt ec DCR: 14~15mohmI sat =18Ar ms 68. 1R510. 10K
O/ P cap: 330U 2. 5V PSLV0E337M( 15) 15mOhm2. 886Ar ms NEC_TOKI N/ 77. C3371. 10L
H/ S: FDS8880 SO- 8/ 9. 6mohm/ 12mOhm@4. 5Vgs/ 84. 08880. 037
L/ S: FDS8672S SO- 8/ 5. 3mOhm/ 7. 0mohm@4. 5Vgs/ 84. 08672. A37
Swi t chi ng f r eq- - >400KHz
RT: Non_ASM
TI : ASM
SSID = PWR.Plane.Regulator_1p8v0p9v
4/14 modify.
Add RC circuit for power sequence.
1ST
TI
2ND
RT
PR7 Non_ASM ASM
A00.08/0903
A00.08/0903
SB
1 2 PR17
0R0402-PAD
PR17
0R0402-PAD
1 2
PG2
GAP-CLOSE-PWR
PG2
GAP-CLOSE-PWR
1 2
PG4
GAP-CLOSE-PWR
PG4
GAP-CLOSE-PWR 1 2 PR14 0R0402-PAD PR14 0R0402-PAD
1 2
PG1
GAP-CLOSE-PWR
PG1
GAP-CLOSE-PWR
1
2
P
G
1
8
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
P
G
1
8
G
A
P
-
C
L
O
S
E
-
P
W
R
-
3
-
G
P
1 2
PG12
GAP-CLOSE-PWR
PG12
GAP-CLOSE-PWR
1
2
P
T
C
1
S
T
3
3
0
U
2
D
5
V
D
M
-
1
3
G
P
DY
P
T
C
1
S
T
3
3
0
U
2
D
5
V
D
M
-
1
3
G
P
DY
1
2
P
C
2
0
S
C
4
D
7
U
2
5
V
5
K
X
-
G
P
P
C
2
0
S
C
4
D
7
U
2
5
V
5
K
X
-
G
P
1
2
PC10
SC1U10V3KX-3GP
DY
PC10
SC1U10V3KX-3GP
DY
1 2
PG16
GAP-CLOSE-PWR
PG16
GAP-CLOSE-PWR
1
2
P
C
4
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
P
C
4
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1 2
PC7
SC1KP50V2KX-1GP
PC7
SC1KP50V2KX-1GP
1
2
P
T
C
2
S
T
3
3
0
U
2
D
5
V
D
M
-
1
3
G
P
P
T
C
2
S
T
3
3
0
U
2
D
5
V
D
M
-
1
3
G
P
1
2
PR4
5D1R3J -GP
PR4
5D1R3J -GP
1
2
P
C
1
6
S
C
1
U
1
0
V
3
K
X
-
3
G
P
P
C
1
6
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1 2
PG5
GAP-CLOSE-PWR
PG5
GAP-CLOSE-PWR
1
2
P
C
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
P
C
3
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1 2
PG14
GAP-CLOSE-PWR
PG14
GAP-CLOSE-PWR
1
2
P
C
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
P
C
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1 2
PC1
SCD1U25V3KX-GP
PC1
SCD1U25V3KX-GP
1
2
PC13
SC330P50V3KX-GP
DY
PC13
SC330P50V3KX-GP
DY
1 2 PR3
0R0603-PAD
PR3
0R0603-PAD
1
2
PR10
2D2R5F-2-GP
DY
PR10
2D2R5F-2-GP
DY
1
2
P
C
1
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
P
C
1
5
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
PC17
SC1KP50V2KX-1GP
DY
PC17
SC1KP50V2KX-1GP
DY
1 2
PG13
GAP-CLOSE-PWR
PG13
GAP-CLOSE-PWR
1 2
PG6
GAP-CLOSE-PWR
PG6
GAP-CLOSE-PWR
1
2
P
C
1
8
S
C
D
1
U
5
0
V
3
K
X
-
G
P
P
C
1
8
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1
2
P
C
1
2
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
P
C
1
2
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
2
PR18
30KR2F-GP
DY
PR18
30KR2F-GP
DY
1 2
PG11
GAP-CLOSE-PWR
PG11
GAP-CLOSE-PWR
VTT
24
R
E
F
5
FB
9
VTTS
2
V
D
D
P
1
5
VTTIN
23
LX
20
DH
21
I
L
I
M
1
6
EN/PSV
11
PGND2
1
PGD
13
VDDQS
8
BST
22
DL
19
V
S
S
A
3
TON
4
PGND1
18
VCCA
6
VTTEN
10
PGND1
17
V
D
D
P
1
4
NC#12
12
NC#7
7
G
N
D
2
5
PU1
TPS51116RGER-GP-U
PU1
TPS51116RGER-GP-U
1
2
C89
SCD1U10V2KX-4GP
DY
C89
SCD1U10V2KX-4GP
DY
1 2
PR1
0R3J -0-U-GP
PR1
0R3J -0-U-GP
1 2
PG9
GAP-CLOSE-PWR
PG9
GAP-CLOSE-PWR
1 2
PG3
GAP-CLOSE-PWR
PG3
GAP-CLOSE-PWR
1
2
P
C
1
9
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
P
C
1
9
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1 2 PR9 0R0402-PAD PR9 0R0402-PAD
1
2
P
C
2
S
C
1
U
1
0
V
3
K
X
-
3
G
P
P
C
2
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
PR6
20KR2F-L-GP
DY
PR6
20KR2F-L-GP
DY
1 2 3 4
5678
S S S G
DDDD
PU2
FDS8880-NL-GP
S S S G
DDDD
PU2
FDS8880-NL-GP
1
2
PR5
42K2R2F-L-GP
DY
PR5
42K2R2F-L-GP
DY
1 2
PG15
GAP-CLOSE-PWR
PG15
GAP-CLOSE-PWR
1 2
PG17
GAP-CLOSE-PWR
PG17
GAP-CLOSE-PWR
1 2
PG8
GAP-CLOSE-PWR
PG8
GAP-CLOSE-PWR
1
2
P
C
5
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
P
C
5
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
P
C
1
4
S
C
4
D
7
U
6
D
3
V
5
K
X
-
3
G
P
P
C
1
4
S
C
4
D
7
U
6
D
3
V
5
K
X
-
3
G
P
1 2
PG7
GAP-CLOSE-PWR
PG7
GAP-CLOSE-PWR
1 2 PR16 1M1R2J -GP
DY
PR16 1M1R2J -GP
DY
1 2
PR2
9K31R2F-GP
PR2
9K31R2F-GP
1 2
PL1
IND-1D5UH-23-GP
PL1
IND-1D5UH-23-GP
1
2
PC8
SCD033U16V3KX-GP
PC8
SCD033U16V3KX-GP
2
1
PD1
CH551H-30PT-GP
DY
PD1
CH551H-30PT-GP
DY
1
2
PC11
SC18P50V2J N-1-GP
DY
PC11
SC18P50V2J N-1-GP
DY
1 2 3 4
5678
D D
G
D
S
D
S S
U14
FDS8672S-GP
D D
G
D
S
D
S S
U14
FDS8672S-GP
1 2 PR8 0R2J -2-GP
DY
PR8 0R2J -2-GP
DY
1
2
P
C
6
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
P
C
6
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1 2 PR7 619KR2F-GP
RT
PR7 619KR2F-GP
RT
1 2
PG10
GAP-CLOSE-PWR
PG10
GAP-CLOSE-PWR
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1D5V_EN
+1.8V_SUS +5V_ALW
+1.5V_RUN
PM_SLP_S3#
RUNPWROK
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DC to DC 1.5V
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DC to DC 1.5V
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
DC to DC 1.5V
Custom
<Core Design>
1D5V_SB
SO-8-P
Vo=0.8*(1+(R1/R2))
NEC_TOKIN
100uF, 6.3V, B2 Size
Iripple=1.374A, ESR=45mohm
+1.5V_RUN +/- 5%
Peak current 3.5A
SSID = PWR.Plane.Regulator_1p5v
Change from +5V_RUN to +5V_ALW,
please confrim it is okay.
1
2
C
2
1
2
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
C
2
1
2
S
C
D
0
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C205
SC10U6D3V5MX-3GP
C205
SC10U6D3V5MX-3GP
1
2
T
C
2
2
S
T
1
0
0
U
6
D
3
V
B
M
-
5
G
P
T
C
2
2
S
T
1
0
0
U
6
D
3
V
B
M
-
5
G
P
1 2
R189 2K2R2J -2-GP R189 2K2R2J -2-GP
1
2
C216
SC4700P50V2KX-1GP
DY
C216
SC4700P50V2KX-1GP
DY
G
N
D
1
FB
2
VOUT
3
VOUT
4
VIN
5
V
C
N
T
L
6
POK
7
EN
8
VIN
9
U21
APL5912-KAC-GP
U21
APL5912-KAC-GP
1
2
R
1
7
6
1
K
R
2
F
-
3
-
G
P
R
1
7
6
1
K
R
2
F
-
3
-
G
P
1
2
C206
SC10U6D3V5MX-3GP
DY
C206
SC10U6D3V5MX-3GP
DY
1
2
T
C
2
3
S
T
1
0
0
U
6
D
3
V
B
M
-
5
G
P
DY
T
C
2
3
S
T
1
0
0
U
6
D
3
V
B
M
-
5
G
P
DY
1
2
C208
SC1U10V3KX-3GP
C208
SC1U10V3KX-3GP
1
2
R184
1K13R2F-1-GP
R184
1K13R2F-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA Power
Custom
33 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA Power
Custom
33 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA Power
Custom
33 59 Monday, May 18, 2009
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Z_12V
Z_12V_G3
Z
_
1
2
V
_
D
3
H_PWRGD_R
+3.3V_RUN +3.3V_ALW
+PWR_SRC
+5V_RUN
+5V_ALW
RUN_POWER_ON
PM_SLP_S3#
S5_ENABLE
PURE_HW_SHUTDOWN#
H_THRMTRIP#
H_PWRGOOD
3V_5V_EN
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Power Plane Enable
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Power Plane Enable
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Power Plane Enable
Custom
<Core Design>
Run Power
SSID = Reset.Suspend
1 2
R458 330KR2F-L-GP R458 330KR2F-L-GP
C
B
E
Q8
CHT2222APT-GP
DY Q8
CHT2222APT-GP
DY
1
2
C198
SCD1U10V2KX-4GP
DY
C198
SCD1U10V2KX-4GP
DY
G
S
D
Q23
2N7002-7F-GP
Q23
2N7002-7F-GP
1
2
R459
100KR2J -1-GP
R459
100KR2J -1-GP
1
2
R281 1
0
0
K
R
2
J
-
1
-
G
P
R281 1
0
0
K
R
2
J
-
1
-
G
P
1 2 R275 10KR2J -3-GP R275 10KR2J -3-GP
G
S D
Q22
NDS0610-NL-GP
84.S0610.B31
Q22
NDS0610-NL-GP
84.S0610.B31
A
K
D16
BZX384-C9V1-GP
DY
D16
BZX384-C9V1-GP
DY
1 2
C534
SCD1U25V3KX-GP
DY
C534
SCD1U25V3KX-GP
DY
1 2
R460 10KR2J -3-GP R460 10KR2J -3-GP
1
2
3
4 5
6
7
8 S
S
S
G D
D
D
D
U31
AO4468-GP
S
S
S
G D
D
D
D
U31
AO4468-GP
G
S
D
Q21
2N7002-7F-GP
Q21
2N7002-7F-GP
1
2
C314
SC6800P25V2KX-1GP
C314
SC6800P25V2KX-1GP
1
2
3
4 5
6
7
8 S
S
S
G D
D
D
D
U30
AO4468-GP
S
S
S
G D
D
D
D
U30
AO4468-GP
1
2
R
1
6
0
2
0
0
K
R
2
J
-
L
1
-
G
P
DY
R
1
6
0
2
0
0
K
R
2
J
-
L
1
-
G
P
DY
1 2 R273 10KR2J -3-GP R273 10KR2J -3-GP
1 2
R161
1KR2J -1-GP
DY
R161
1KR2J -1-GP
DY
1
2
C316
SCD01U50V2KX-1GP
C316
SCD01U50V2KX-1GP
1 2
R168 1KR2J -1-GP R168 1KR2J -1-GP
1
2
3
D10
BAS16-1-GP
D10
BAS16-1-GP
VGA_TXBCLK-
VGA_TXBOUT1-
VGA_TXBOUT2+
VGA_TXACLK-
VGA_TXBOUT0+
VGA_TXAOUT1-
VGA_TXACLK+
VGA_TXAOUT1+
LDDC_CLK
VGA_TXBCLK+
VGA_TXBOUT1+
VGA_TXAOUT2-
LDDC_DATA
VGA_TXAOUT0-
VGA_TXBOUT2-
VGA_TXAOUT2+
VGA_TXAOUT0+
LCD_DET_G
ENVDD_D VGA_TXAOUT0+
VGA_TXAOUT2+
VGA_TXACLK+
VGA_TXAOUT0-
VGA_TXAOUT1-
VGA_TXACLK-
VGA_TXBCLK-
VGA_TXAOUT1+
VGA_TXBCLK+
VGA_TXAOUT2-
LCD_TST
LCD_BRIGHTNESS_R
VGA_TXBOUT0-
VGA_TXBOUT0-
VGA_TXBOUT1-
VGA_TXBOUT2+
VGA_TXBOUT0+
VGA_TXBOUT1+
VGA_TXBOUT2-
LCD_BRIGHTNESS_R
VGA_TXBOUT0-
VGA_TXBCLK-
VGA_TXBOUT1-
VGA_TXBOUT2+
VGA_TXBOUT0+
VGA_TXBCLK+
VGA_TXBOUT1+
VGA_TXBOUT2-
ENVDD
BLON_OUT_R
LCD_TST_R
LCD_CBL_DET#_D
GFX_PWR_SRC +LCDVDD
GFX_PWR_SRC +PWR_SRC
+3.3V_RUN +LCDVDD
+3.3V_RUN
+3.3V_RUN
LCD_TST
VGA_TXBOUT0-
VGA_TXBOUT0+
VGA_TXBOUT1-
VGA_TXBOUT1+
VGA_TXBOUT2-
VGA_TXBOUT2+
VGA_TXBCLK-
VGA_TXBCLK+
VGA_TXAOUT0-
VGA_TXAOUT0+
VGA_TXAOUT1-
VGA_TXAOUT1+
VGA_TXAOUT2-
VGA_TXAOUT2+
VGA_TXACLK-
VGA_TXACLK+
LDDC_CLK
LDDC_DATA
BLON_OUT
LBKLT_CTL
BRIGHTNESS
LCD_CBL_DET#
LCD_TST_EN
LCDVDD_EN
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
LCD/Inverter Connector
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
INVERTER POWER
LCD POWER
For EMI request
For EMI request
LVDS CONNECTOR
SSID = VIDEO
SSID = VIDEO
SSID = Inverter
20090309
-3
-3
-3
-3
2009/07/29
-3
place D25
R3502 R3503
cloce to LCD1
1
2
E
C
3
6
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
3
6
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
E
C
2
4
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
2
4
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
3
D20
BAT54CPT-GP
D20
BAT54CPT-GP
1 2
R508
49K9R2F-L-GP
R508
49K9R2F-L-GP
1
2
E
C
3
0
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
3
0
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
E
C
8
7
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY E
C
8
7
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY
1
2
E
C
2
5
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
2
5
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1 AFTP8 AFTP8
1
2
E
C
3
5
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
3
5
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1 2 R81
100R2J -2-GP
R81
100R2J -2-GP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
LCD1
IPEX-CONN40-2R-GP
20.F1093.040
LCD1
IPEX-CONN40-2R-GP
20.F1093.040
1 AFTP1 AFTP1
1
2
E
C
2
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
E
C
2
2
S
C
D
1
U
1
0
V
2
K
X
-
4
G
P
1
2
C
3
9
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
3
9
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1 AFTP5 AFTP5
1 2
R73
100R2J -2-GP
R73
100R2J -2-GP
1 AFTP6 AFTP6
1
2
E
C
2
0
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
2
0
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
E
C
2
6
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
2
6
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
E
C
2
9
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
2
9
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
E
C
4
0
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
4
0
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
C
7
3
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
7
3
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1 2
R3502
100R2J -2-GP
R3502
100R2J -2-GP
1
2
E
C
2
7
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
2
7
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
IN#1
1
IN#5
5
IN#6
6
IN#7
7
IN#8
8
OUT
2
EN
3
GND
4
GND
9
U48
G5281RC1U-GP
U48
G5281RC1U-GP
1
2
E
C
2
8
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
2
8
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
E
C
3
8
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
3
8
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
R75
10KR2J -3-GP
DY
R75
10KR2J -3-GP
DY
1
2
R
3
5
9
4
9
K
9
R
2
F
-
L
-
G
P
R
3
5
9
4
9
K
9
R
2
F
-
L
-
G
P
1
2
C68
SC1KP50V2KX-1GP
C68
SC1KP50V2KX-1GP
1
2
E
C
2
3
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
2
3
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1 AFTP9 AFTP9
1 2 R3503 100R2J -2-GP R3503 100R2J -2-GP
1 AFTP7 AFTP7
1 AFTP3 AFTP3
1
2
E
C
3
9
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
3
9
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
E
C
2
1
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
2
1
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
1
2
C
7
6
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
7
6
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
R3501
10KR2J -3-GP
R3501
10KR2J -3-GP
1 AFTP2 AFTP2
1 2
F1
FUSE-3A32V-7-GP
F1
FUSE-3A32V-7-GP
1 AFTP4 AFTP4
K A
D25
RB551V30-GP
D25
RB551V30-GP
K A
D7
RB551V30-GP
DY
D7
RB551V30-GP
DY
1
2
C69
SCD1U50V3KX-GP
C69
SCD1U50V3KX-GP
1
2
E
C
1
9
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY E
C
1
9
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY
1
2
E
C
3
7
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
E
C
3
7
S
C
5
D
6
P
5
0
V
2
C
N
-
1
G
P
DY
HDD_5V_EN_R
HDD_PWR_EN
ODD_5V_EN_R
ODD_PWR_EN
EMC2102_FAN_DRIVE
EMC2102_FAN_TACH_1
EMC2102_FAN_DRIVE
EMC2102_FAN_TACH_1
SATA_RXN0
SATA_RXP0
SATA_TXP0
SATA_TXN0
+5V_HDD
+3.3V_RUN
SATA_RX1-_C
SATA_RX1+_C
SATA_TXN1
SATA_TXP1
+5V_MOD
SATA_RX1-_C
SATA_RX1+_C
ODD_MD
SATA_RXN0
SATA_RXP0
RUN_POWER_ON
+5V_RUN
+5V_ALW
+5V_HDD +5V_RUN
RUN_POWER_ON
+5V_RUN
+5V_ALW
+5V_MOD +5V_RUN
+5V_MOD
+5V_HDD
+3.3V_RUN
HDD_5V_EN
HDD_5V_EN
EMC2102_FAN_DRIVE
EMC2102_FAN_TACH_1
SATA_TXN1
SATA_TXP1
SATA_RXN1_C
SATA_RXP1_C
SATA_RXN0_C
SATA_TXN0
SATA_TXP0
SATA_RXP0_C
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
HDD/ODD/FAN
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
HDD/ODD/FAN
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
HDD/ODD/FAN
Custom
<Core Design>
ODD Connector
SATA HDD Connector
SATA_RX- and SATA_RX+ Trace
Length match within 20 mil
3 1
*Layout* 15 mil
Fan Connector
SSID = SATA
SSID = SATA
SSID = Thermal
1 AFTP25 AFTP25
1
AFTP14 AFTP14
1 2
G81
GAP-CLOSE-PWR
G81
GAP-CLOSE-PWR
1
AFTP10 AFTP10
1
2
R462
100KR2J -1-GP
DY
R462
100KR2J -1-GP
DY
1
2
3 4
5
6
U28
2N7002SPT
DY
U28
2N7002SPT
DY
1
2
3
4
5
FAN1
MLX-CON3-6-GP-U
20.F0700.003
FAN1
MLX-CON3-6-GP-U
20.F0700.003
1
2
C289
SC10U6D3V5MX-3GP
C289
SC10U6D3V5MX-3GP
1
AFTP12 AFTP12
1
AFTP17 AFTP17
1
AFTP22 AFTP22
1
AFTP20 AFTP20
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
S14
S15
P1
P2
P3
P4
P5
P6
P7
NP1
NP2
17
16
HDD1
SKT-SATA7P+15P-23-GP
22.10300.431
HDD1
SKT-SATA7P+15P-23-GP
22.10300.431
1
2
R251
100KR2J -1-GP
DY
R251
100KR2J -1-GP
DY
1
2
3
4 5
6
7
8 S
S
S
G D
D
D
D
U58
SI4800BDY-T1
DY
S
S
S
G D
D
D
D
U58
SI4800BDY-T1
DY
S1
S2
S3
S4
S5
S6
S7
NP1
NP2
8
9
P1
P2
P3
P4
P5
P6
ODD1
SKT-SATA7P+6P-62-GP
22.10300.421
ODD1
SKT-SATA7P+6P-62-GP
22.10300.421
1
2
C527
SCD1U25V3KX-GP
DY
C527
SCD1U25V3KX-GP
DY
1
2
R252
100KR2J -1-GP
DY
R252
100KR2J -1-GP
DY
1 2 G85 GAP-CLOSE-PWR G85 GAP-CLOSE-PWR
1
2
R457
100KR2J -1-GP
DY
R457
100KR2J -1-GP
DY
1
AFTP18 AFTP18
1 2 C250 SC3900P50V2KX-2GP C250 SC3900P50V2KX-2GP
1
2
C295
SCD1U25V3KX-GP
DY
C295
SCD1U25V3KX-GP
DY
1
2
C277
SCD1U16V2KX-3GP
C277
SCD1U16V2KX-3GP
1
AFTP19 AFTP19
1 AFTP26 AFTP26
1
AFTP11 AFTP11
1
2
3 4
5
6
Q20
FDC655BN-GP
DY
Q20
FDC655BN-GP
DY
1
AFTP24 AFTP24
1 2 C254 SC3900P50V2KX-2GP C254 SC3900P50V2KX-2GP
1
AFTP13 AFTP13
1
2
C455
SC10U6D3V5MX-3GP
C455
SC10U6D3V5MX-3GP
1 2
G82
GAP-CLOSE-PWR
G82
GAP-CLOSE-PWR
1
2
R255
100KR2J -1-GP
DY
R255
100KR2J -1-GP
DY
1
2
3 4
5
6
U57
2N7002SPT
DY
U57
2N7002SPT
DY
1
2
C508
SC10U6D3V5MX-3GP
DY
C508
SC10U6D3V5MX-3GP
DY
1
2
C293
SC4700P50V2KX-1GP
DY
C293
SC4700P50V2KX-1GP
DY
1
2
C16
SC22U6D3V5MX-2GP
C16
SC22U6D3V5MX-2GP
1
AFTP21 AFTP21
1
AFTP15 AFTP15
1
2
C452
SCD1U10V2KX-4GP
C452
SCD1U10V2KX-4GP
1
AFTP23 AFTP23
K
A
D4
RB551V30-GP
D4
RB551V30-GP
1
AFTP16 AFTP16
1
2
C498
SCD1U16V2KX-3GP
DY
C498
SCD1U16V2KX-3GP
DY
1 AFTP27 AFTP27
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MINI_2_WAKE#
PLT_RST#
SMB_CLK
SMB_DATA
WLAN_ACT
+1.5V_RUN
WIFI_RF_EN
PCIE_TXP2
+3.3V_RUN
E51_RXD_R
PCIE_RXN2
CLK_PCIE_MINI1
E51_TXD_R
WLAN_ACT
CLK_PCIE_MINI1#
SMB_DATA
PLT_RST#
SMB_CLK
XD_D5/MS_BS
ITP_TRST#_1
ITP_BPM#3_1
XD_D7/MS_D3
XD_D3/MS_D1
SD_CMD
ITP_TDO_1 ITP_TDO
ITP_BPM#5
SD_DAT0/XD_D6/MS_D0
ITP_DBRESET#
ITP_TRST#
ITP_TDI
H_CPURST#_1
ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_TMS
CLK_CPU_ITP#
CLK_CPU_ITP
ITP_TCK_1
ITP_BPM#4
CLK_CPU_ITP#_1
SD_CLK/XD_D1/MS_CLK
ITP_BPM#2_1
SD_CLK
XD_RDY
XD_CLE
XD_D0
XD_CD#
XD_CE#
XD_ALE
XD_WP#
SD_CLK
CLK_CPU_ITP_1
ITP_BPM#1_1
SD_DAT3/XD_WE#
ITP_TDI_1
XD_D4/SD_DAT1
XD_D3/MS_D1
SD_CLK/XD_D1/MS_CLK
SD_WP
XD_RDY
XD_CLE
SD_DAT0/XD_D6/MS_D0
SD_DAT2/XD_RE#
XD_D2/MS_D2 SD_CD#
SD_DAT3/XD_WE#
MS_INS#
XD_D5/MS_BS
XD_CD#
XD_D0
XD_ALE
XD_D7/MS_D3
XD_WP#
XD_CE#
ITP_BPM#5_1
SD_DAT0/XD_D6/MS_D0
SD_DAT2/XD_RE#
ITP_BPM#0_1
XD_D2/MS_D2
SD_CMD
SD_WP
SD_CD#
MS_INS#
MS_CLK
ITP_TMS_1
MS_CLK
ITP_BPM#4_1
XD_D4/SD_DAT1
ITP_DBRESET#_1
ITP_TCK
USB_PN4
USB_PP4
SD_CLK
SD_WP
SD_CD#
SD_CMD
SD_DAT0/XD_D6/MS_D0
SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
XD_D4/SD_DAT1
E51_TXD_R
E51_RXD_R
LPC_LFRAME#_IN
LPC_LAD3_IN
LPC_LAD2_IN
LPC_LAD1_IN
LPC_LAD0_IN
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
+3.3V_RUN
+3.3V_RUN +1.5V_RUN
+5V_ALW
+1.5V_RUN
+5V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN_CARD
+3.3V_RUN
+1.05V_VCCP
+1.05V_VCCP
+3.3V_RUN_CARD
PLT_RST#
SMB_CLK
SMB_DATA
PCIE_TXN2
PCIE_TXP2
PCIE_RXP2
PCIE_RXN2
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
WIFI_RF_EN
WLAN_ACT
E51_RXD
E51_TXD
SD_CLK
SD_CMD
ITP_BPM#5
ITP_BPM#4
ITP_BPM#3
ITP_BPM#2
ITP_BPM#1
ITP_BPM#0
ITP_TDO
CLK_CPU_ITP#
CLK_CPU_ITP
ITP_DBRESET#
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK
H_CPURST#
XD_CD#
SD_WP
SD_CD#
XD_D4/SD_DAT1
XD_D5/MS_BS
XD_D3/MS_D1
SD_DAT0/XD_D6/MS_D0
XD_D2/MS_D2
MS_INS#
XD_D7/MS_D3
SD_CLK/XD_D1/MS_CLK
XD_D0
XD_WP#
XD_RDY
SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
XD_ALE
XD_CE#
XD_CLE
MS_CLK
ITP_DBRESET#_1
BT_ACT
MINI1_CLKREQ#
USB_PP4
USB_PN4
PCLK_FWH
PLT_RST#
LPC_LFRAME#
LPC_LAD[0..3]
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
MINICARD(WLAN)/SD/ITP CONN
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Mini Card Connector(802.11a/b/g)
SSID = Wireless
ITP Connector CPU
TCK( PI N AC5)
FBO( PI N 11)
TCK( PI N 5)
ITP Connector
SSID = SDIO
H_CPURST# use pull-up Resistor close
ITP connector 500 mil ( max ),
others place near CPU side.
+1.05V_VCCP use Decoupling Capacitor close
ITP connector 100 mil ( max )
SSID = User.Interface
SD/XD/MS Card Reader
For EMI
A00.08/0903
1 2 R499 0R2J -2-GP
DY
R499 0R2J -2-GP
DY
1
AFTP71 AFTP71
1
2
C468
SCD1U16V2KX-3GP
C468
SCD1U16V2KX-3GP
1
2
C
2
4
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
2
4
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1 2
R344
1K2R2F-1-GP
R344
1K2R2F-1-GP
1
2
R
1
7
5
4
D
9
R
2
F
-
L
1
-
G
P
R
1
7
5
4
D
9
R
2
F
-
L
1
-
G
P
1 2
R495
0R2J -2-GP
DY
R495
0R2J -2-GP
DY
1
AFTP34 AFTP34
1
2
C
2
7
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
2
7
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
C305
SCD1U16V2KX-3GP
DY
C305
SCD1U16V2KX-3GP
DY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
30
29
ITP1
MLX-CON28-3-GP
20.K0116.028
DY
ITP1
MLX-CON28-3-GP
20.K0116.028
DY
1 2
R10
0R2J -2-GP
DY
R10
0R2J -2-GP
DY
1 2
R6 0R2J -2-GP
DY
R6 0R2J -2-GP
DY
1
AFTP69 AFTP69
1 2 R210 0R2J -2-GP
DY
R210 0R2J -2-GP
DY
XD_R/B
1
XD_RE
2
XD_CE
3
XD_CLE
4
XD_ALE
5
XD_WE
6
XD_WP
7
XD_D0
8
XD_D1
9
SD_DAT2
10
SD_DAT3
11
SD_CMD
12
MS_VCC
14
MS_SCLK
15
MS_DATA3
16
MS_INS
17
MS_DATA2
18
MS_DATA0
19
MS_DATA1
20
MS_BS
21
SD_VCC
23
SD_CLK
24
SD_DAT0
25
XD_D2
26
XD_D3
27
XD_D4
28
SD_DAT1
29
XD_D5
30
XD_D6
31
XD_D7
32
XD_VCC
33
XD_CD_SW
34
SD_WP_SW
35
SD_CD_SW
36
4IN1_GND
37
4IN1_GND
38
4IN1_GND
13
4IN1_GND
22
NP2
NP2
NP1
NP1
CARD1
CARD-PUSH-36P-5-GP
20.I0081.011
CARD1
CARD-PUSH-36P-5-GP
20.I0081.011
1
AFTP55 AFTP55
1
AFTP41 AFTP41
1
AFTP53 AFTP53
1
AFTP33 AFTP33
1
AFTP72 AFTP72
1 2
R494
0R2J -2-GP
DY
R494
0R2J -2-GP
DY
1
2
R
9
5
1
R
2
F
-
2
-
G
P
DY
R
9
5
1
R
2
F
-
2
-
G
P
DY
1
AFTP52 AFTP52
1
2
C
4
7
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
7
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
AFTP32 AFTP32
1
2
E
C
1
4
6
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
4
6
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP47 AFTP47
1
2
R22
54D9R2F-L1-GP
R22
54D9R2F-L1-GP
1
AFTP45 AFTP45
1 2 R498 0R2J -2-GP
DY
R498 0R2J -2-GP
DY
1
2
C
2
9
4
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
C
2
9
4
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
1
2
E
C
1
4
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
4
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1 2
R493
0R2J -2-GP
DY
R493
0R2J -2-GP
DY
1
AFTP54 AFTP54
1
2
C
2
7
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
2
7
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
NP1
NP2
MINI1
SKT-MINI52P-21-GP
62.10043.581
MINI1
SKT-MINI52P-21-GP
62.10043.581
1
AFTP37 AFTP37
1
2
E
C
1
4
3
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
4
3
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1 2
R3 0R2J -2-GP
DY
R3 0R2J -2-GP
DY
1
AFTP75 AFTP75
1
AFTP61 AFTP61
1
2
E
C
1
4
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
4
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1 2
R12 0R2J -2-GP
DY
R12 0R2J -2-GP
DY
1
AFTP42 AFTP42
1 2
R497
0R2J -2-GP
DY
R497
0R2J -2-GP
DY
1 2
R8 1KR2J -1-GP
DY
R8 1KR2J -1-GP
DY
1
AFTP28 AFTP28
1
AFTP35 AFTP35
1
AFTP58 AFTP58
1
AFTP43 AFTP43
1
AFTP46 AFTP46
1
2
R
1
6
5
4
D
9
R
2
F
-
L
1
-
G
P
R
1
6
5
4
D
9
R
2
F
-
L
1
-
G
P
1
AFTP44 AFTP44
1
AFTP59 AFTP59
1
AFTP31 AFTP31
1 AFTP51 AFTP51
1
2
R
2
4
5
4
D
9
R
2
F
-
L
1
-
G
P
R
2
4
5
4
D
9
R
2
F
-
L
1
-
G
P
1
AFTP67 AFTP67
1
2
R
2
0
5
4
D
9
R
2
F
-
L
1
-
G
P
R
2
0
5
4
D
9
R
2
F
-
L
1
-
G
P
1
AFTP50 AFTP50
1 2
R171
0R3J -0-U-GP
DY
R171
0R3J -0-U-GP
DY
1 2
R343 0R2J -2-GP
DY
R343 0R2J -2-GP
DY
1 2
R4 0R2J -2-GP
DY
R4 0R2J -2-GP
DY
1
2
E
C
1
4
7
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
4
7
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
C
2
3
5
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
C
2
3
5
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
DY
1 2
R496
0R2J -2-GP
DY
R496
0R2J -2-GP
DY
1 2
R342 0R2J -2-GP
DY
R342 0R2J -2-GP
DY
1
AFTP56 AFTP56
1
AFTP73 AFTP73
1 2
R21 0R2J -2-GP
DY
R21 0R2J -2-GP
DY
1
AFTP74 AFTP74
1
2
C
2
8
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
2
8
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
AFTP49 AFTP49
1
2
EC65
SC220P50V2KX-3GP
EC65
SC220P50V2KX-3GP
1
AFTP29 AFTP29
1
AFTP48 AFTP48
1
2
C
2
7
4
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
2
7
4
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
AFTP30 AFTP30
1 2
R18 22D6R2F-L1-GP
DY
R18 22D6R2F-L1-GP
DY
1
2
R11
54D9R2F-L1-GP
R11
54D9R2F-L1-GP
1
AFTP64 AFTP64
1
AFTP65 AFTP65
1 2
R15 0R2J -2-GP
DY
R15 0R2J -2-GP
DY
1 2
R5 0R2J -2-GP
DY
R5 0R2J -2-GP
DY
1 2
R23 0R2J -2-GP
DY
R23 0R2J -2-GP
DY
1 2
R345 0R2J -2-GP
DY
R345 0R2J -2-GP
DY
1 2
R19 0R2J -2-GP
DY
R19 0R2J -2-GP
DY
1
AFTP40 AFTP40
1
2
E
C
7
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY E
C
7
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP38 AFTP38
1
2
E
C
1
4
2
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
4
2
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP36 AFTP36
1 2
R25
150R2F-1-GP
DY
R25
150R2F-1-GP
DY
1
AFTP39 AFTP39
1 2 R211 0R2J -2-GP
DY
R211 0R2J -2-GP
DY
1
2
E
C
7
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY E
C
7
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
MINICARD(WWAN)
Custom
38 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
MINICARD(WWAN)
Custom
38 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
MINICARD(WWAN)
Custom
38 59 Monday, May 18, 2009
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
MINICARD(WPAN)
Custom
39 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
MINICARD(WPAN)
Custom
39 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
MINICARD(WPAN)
Custom
39 59 Monday, May 18, 2009
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MIC_IN_R_C
AUD_EXT_MIC_L
AUD_EXT_MIC_R MIC_IN_R_2
MIC_IN_L_2 MIC_IN_L_C
AUD_SPK_L1_R
AUD_SPK_L2
AUD_SPK_R1
AUD_SPK_R2_R
AUD_SPK_L1
AUD_SPK_R2
AUD_SPK_L2_R
AUD_SPK_R1_R
AUD_HP1_J ACK_R1
AUD_HP1_J ACK_L
AUD_HP1_J ACK_R
AUD_HP1_J ACK_L1
AUD_HP1_J D#
AUD_SPK_L1_R
AUD_SPK_R2_R
AUD_SPK_L2_R
AUD_SPK_R1_R
MIC_IN_R_C
MIC_IN_L_C
AUD_HP1_J ACK_R1
AUD_HP1_J ACK_L1
AUD_HP1_J D#
EXT_MIC_J D#
INT_MIC_L_R
AUD_HP1_J ACK_L2
AUD_HP1_J ACK_R2
EXT_MIC_J D#
AUD_VREFOUT_B
AUD_EXT_MIC_L
AUD_EXT_MIC_R
INT_MIC_L_R
AUD_SPK_L2
AUD_SPK_L1
AUD_SPK_R2
AUD_SPK_R1
AUD_HP1_J ACK_L
AUD_HP1_J ACK_R
AUD_HP1_J D#
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Audio Jack
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Audio Jack
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Audio Jack
Custom
<Core Design>
MI C I N
I nt er nal
Mi c r ophone
Speak er
Connec t or
600ohm 100MHz
200mA 0.5ohm DC
LI NE1
OUT
SSID = AUDIO
SB
SB
1
AFTP85 AFTP85
1
AFTP81 AFTP81
1 AFTP84 AFTP84
1
AFTP78 AFTP78
1 2
R475
60D4R2F-GP
R475
60D4R2F-GP
5
1
2
3
4
6
SPK1
MLX-CON4-15-GP-U
20.F0693.004
SPK1
MLX-CON4-15-GP-U
20.F0693.004
1 2 R28
0R0603-PAD
R28
0R0603-PAD
1
AFTP82 AFTP82
1 2 R480
0R0603-PAD
R480
0R0603-PAD
1
2
CN6
MICROPHONE-40-GP-U1
23.42143.001
CN6
MICROPHONE-40-GP-U1
23.42143.001
1
2
E
C
4
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
DY
E
C
4
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
DY
1
AFTP87 AFTP87
1
2
E
C
1
5
7
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
E
C
1
5
7
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
1
2
E
C
1
5
8
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
E
C
1
5
8
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
1
2
EC160
SC1KP50V2KX-1GP
EC160
SC1KP50V2KX-1GP
1
2
E
C
1
5
6
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
DY
E
C
1
5
6
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
DY
1
2
E
C
1
5
5
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
DY
E
C
1
5
5
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
DY
1
2
C
5
5
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
5
5
9
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
E
C
3
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
DY
E
C
3
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
DY
1
2
E
C
6
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
DY
E
C
6
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
DY
1 2
L20
BLM18BD601SN1D-GP
L20
BLM18BD601SN1D-GP
1
AFTP86 AFTP86
1
AFTP79 AFTP79
1 2
L19
BLM18BD601SN1D-GP
L19
BLM18BD601SN1D-GP
1
2
R
4
7
1
4
K
7
R
2
J
-
2
-
G
P
R
4
7
1
4
K
7
R
2
J
-
2
-
G
P
1 2 R30
0R0603-PAD
R30
0R0603-PAD
1 2
R474
60D4R2F-GP
R474
60D4R2F-GP
1
AFTP76 AFTP76
1
AFTP83 AFTP83
1
AFTP77 AFTP77
1
5
4
6
7
8
2
3
9
10
LOUT1
PHONE-J K284-GP
22.10133.D01
LOUT1
PHONE-J K284-GP
22.10133.D01
1
AFTP80 AFTP80
1
5
4
6
7
8
2
3
9
10
MIC1
PHONE-J K284-GP
22.10133.D01
MIC1
PHONE-J K284-GP
22.10133.D01
1
2
E
C
8
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
DY
E
C
8
S
C
1
0
0
P
5
0
V
2
J
N
-
3
G
P
DY
1 2 R31
0R0603-PAD
R31
0R0603-PAD
1
2
R
4
7
0
4
K
7
R
2
J
-
2
-
G
P
R
4
7
0
4
K
7
R
2
J
-
2
-
G
P
1 2 R32
0R0603-PAD
R32
0R0603-PAD
1 2 R481
0R0603-PAD
R481
0R0603-PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_PN11
AUD_DMIC_CLK_G_R
AUD_DMIC_IN0_R
USB_PP11
AUD_DMIC_CLK_G_R
AUD_DMIC_IN0_R
CPUSB#
NEWCARD_CLKREQ#
CPPE#
CONN_TP2
PERST#
CONN_TP3
NEWCARD_OC#
NRST
PERST#
CPPE#
CPUSB#
LID_CLOSE#
PCIE_RXP5
WLAN_ACT
+3.3V_CARD
AUD_DMIC_IN0_R
CPUSB#
SMB_DATA
USB_PP7
USB_PP6
PCIE_RXN5
+3.3V_RUN
PERST#
+3.3V_CAMERA
SMB_CLK
USB_PN6
AUD_DMIC_CLK_G_R
CLK_PCIE_NEW
NEWCARD_CLKREQ#
+3.3V_CARDAUX
USB_PN11
+3.3V_ALW
PCIE_TXP5
CLK_PCIE_NEW#
PCIE_WAKE#
USB_PP11
PCIE_TXN5
BLUETOOTH_EN
CAMERA_DET#
LID_CLOSE#
USB_PN7
+1.5V_CARD
+3.3V_CAMERA
+3.3V_CAMERA +3.3V_RUN
+3.3V_CARD
+3.3V_CARDAUX
+1.5V_CARD
+3.3V_CARDAUX
+1.5V_RUN
+3.3V_CARD
+3.3V_CARD
+3.3V_RUN
+1.5V_RUN
+3.3V_ALW
+1.5V_CARD
+1.5V_CARD
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD +1.5V_RUN +3.3V_ALW
+3.3V_ALW
+3.3V_RUN
USB_PP11
USB_PN11
CAMERA_DET#
AUD_DMIC_IN0
AUD_DMIC_CLK_G
NEWCARD_CLKREQ#
CLK_PCIE_NEW
CLK_PCIE_NEW# PCIE_WAKE#
PCIE_TXP5
PCIE_TXN5
PCIE_RXP5
PCIE_RXN5
SMB_DATA
SMB_CLK
USB_PP7
USB_PN7
PLT_RST#
PM_SLP_S4#
PM_SLP_S3#
LID_CLOSE#
BLUETOOTH_EN
USB_PP6
USB_PN6
WLAN_ACT
BT_ACT
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Bluetooth/CAM/New Card
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Bluetooth Module conn.
Camera Connector
Digital Mic Power
+1.5V_CARD Max. 650mA, Average 500mA.
+3.3V_CARD Max. 1300mA, Average 1000mA
+3.3V_CARDAUX Max. 275mA
Pl ace t hemNear t o Chi p
New Card Connector
SSID = ExpressCard SSID = User.Interface
SB
1
AFTP96 AFTP96
1
2
C
4
9
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
9
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
AFTP99 AFTP99
1
2
EC69
SC5P50V2CN-2GP
DY
EC69
SC5P50V2CN-2GP
DY
1
AFTP92 AFTP92
1
AFTP115 AFTP115
1
2
E
C
1
7
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY E
C
1
7
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY
1 AFTP121 AFTP121
1
AFTP118 AFTP118
1 AFTP114 AFTP114
1
AFTP113 AFTP113
1
AFTP89 AFTP89
1
AFTP94 AFTP94
1 2 33R2J -2-GP R70 33R2J -2-GP R70
1
2 3
4
RN24
SRN100KJ -6-GP
DY
RN24
SRN100KJ -6-GP
DY
1
AFTP88 AFTP88
1
2
R
8
3
1
0
K
R
2
J
-
3
-
G
P
R
8
3
1
0
K
R
2
J
-
3
-
G
P
1
AFTP108 AFTP108
1
2
C
7
7
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
C
7
7
S
C
2
D
2
U
1
0
V
3
K
X
-
1
G
P
1
AFTP110 AFTP110
1
2
C
2
6
2
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
2
6
2
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C
5
0
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
5
0
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
AFTP109 AFTP109
1
2
E
C
3
3
S
C
2
2
P
5
0
V
2
J
N
-
4
G
P
DY E
C
3
3
S
C
2
2
P
5
0
V
2
J
N
-
4
G
P
DY
9
1
2
3
4
5
6
7
8
10
11
12
BT1
FOX-CON10-GP-U
20.F0711.010
BT1
FOX-CON10-GP-U
20.F0711.010
1
AFTP103 AFTP103
1
AFTP93 AFTP93
1
2
3
4
5
6
7
8
9
10
CAMERA1
ACES-CON8-3-GP-U
20.F0779.008
CAMERA1
ACES-CON8-3-GP-U
20.F0779.008
1
AFTP98 AFTP98
1
AFTP106 AFTP106
1
2
C
5
0
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
5
0
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
AFTP116 AFTP116
1
2
E
C
1
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP102 AFTP102
1
2
C65
SC4D7P50V2CN-1GP
DY
C65
SC4D7P50V2CN-1GP
DY
1
AFTP105 AFTP105
S
T
B
Y
#
1
3
_
3
V
I
N
2
3
_
3
V
O
U
T
3
3_3VIN
4
3_3VOUT
5
SYSRST#
6
G
N
D
7
PERST#
8
CPUSB#
9
CPPE#
10
1
_
5
V
O
U
T
1
1
1
_
5
V
I
N
1
2
1_5VOUT
13
1_5VIN
14
A
U
X
O
U
T
1
5
NC#16
16
A
U
X
I
N
1
7
R
C
L
K
E
N
1
8
O
C
#
1
9
SHDN#
20
G
N
D
2
1
U55
G577BR91U-GP
U55
G577BR91U-GP
1
2
EC70
SC5P50V2CN-2GP
DY
EC70
SC5P50V2CN-2GP
DY
1 2 C494 SC22P50V2J N-4GP
DY
C494 SC22P50V2J N-4GP
DY
1
AFTP90 AFTP90
1 AFTP120 AFTP120
1
2
C
4
8
4
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
C
4
8
4
S
C
1
0
U
6
D
3
V
5
M
X
-
3
G
P
1
2
C
2
5
6
S
C
4
D
7
U
6
D
3
V
5
K
X
-
3
G
P
C
2
5
6
S
C
4
D
7
U
6
D
3
V
5
K
X
-
3
G
P
1
2
C66
SC4D7U6D3V3KX-GP
C66
SC4D7U6D3V3KX-GP
1
AFTP101 AFTP101
1
2
E
C
1
8
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY E
C
1
8
S
C
3
3
P
5
0
V
2
J
N
-
3
G
P
DY
1
AFTP97 AFTP97
12
43
L2
DLW21SN900SQ2LUGP
DY
L2
DLW21SN900SQ2LUGP
DY
1 2 R69 33R2J -2-GP R69 33R2J -2-GP
1
2
EC16
SCD1U16V2KX-3GP
DY
EC16
SCD1U16V2KX-3GP
DY
1
AFTP104 AFTP104
1
AFTP119 AFTP119
1
AFTP122 AFTP122
31
NP1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
NP2
32
NEW1
FOX-CONN30A-9GP
20.F0908.030
NEW1
FOX-CONN30A-9GP
20.F0908.030
1
2
E
C
3
1
S
C
2
2
P
5
0
V
2
J
N
-
4
G
P
DY E
C
3
1
S
C
2
2
P
5
0
V
2
J
N
-
4
G
P
DY
1
2
E
C
1
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
R
7
4
1
0
0
K
R
2
J
-
1
-
G
P
DY
R
7
4
1
0
0
K
R
2
J
-
1
-
G
P
DY
1
2
C
5
0
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
C
5
0
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
AFTP111 AFTP111
1
2
C
4
8
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
8
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1 AFTP107 AFTP107
1
AFTP117 AFTP117
1
AFTP123 AFTP123
1 2 R77
0R0603-PAD
R77
0R0603-PAD
1
2
C
4
8
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
8
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
AFTP95 AFTP95
1
AFTP112 AFTP112
1
2
E
C
3
2
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY E
C
3
2
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1 2 R435
0R0402-PAD
R435
0R0402-PAD
1
AFTP100 AFTP100
1
AFTP91 AFTP91
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EC_SPI_CS#
EC_SPI_WP#
EC_SPI_HOLD#
EC_SPI_HOLD#
PWR_LED_B
BAT_LED_B
LED_PWR#
LED_BAT#
CAP_SDA
CAP_SCL
RTC_PWR
RTC_PWR_L
CAP_SCL
CAPA_INT#
+RTC_VCC
CAP_SDA
+5V_RUN
KBC_PWRBTN#_IN
+3.3V_RTC_LDO
+3.3V_RTC_LDO
+3.3V_RTC_LDO
+5V_ALW
+3.3V_RUN
+5V_RUN
+RTC_CELL
+3.3V_RTC_LDO
+RTC_VCC
EC_SPI_CS#
EC_SPI_CLK
BATLOW_LED
PWRLED
KBC_PWRBTN#
CAPA_INT#
CAP_SCL
CAP_SDA
EC_SPI_WP#_R
EC_SPI_DI
EC_SPI_DO
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
FWH/LED/Power Dash/RTC/Cap
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Power/Battery LED
Power Dash Board to Board CONN
EMI REQUEST
SPI FLASH ROM (16M bits)
BATT LED
POWER LED
Amber
White
Capacitive Button
Width=20mils
RTC Connector
SSID = Flash.ROM
SSID = RBATT
SB
-1
-3
2009/07/29
1
2
3
4
5
6
7
8
CN2
ACES-CON6-12-GP
20.K0358.006
DY
CN2
ACES-CON6-12-GP
20.K0358.006
DY
1
2
EC134
SC4D7P50V2CN-1GP
EC134
SC4D7P50V2CN-1GP
1 2 R34 FUSE-D5A32V-5-GP
DY
R34 FUSE-D5A32V-5-GP
DY
1
2
C519
SC1U10V3KX-3GP
C519
SC1U10V3KX-3GP
1 2
R500
100R2J -2-GP
R500
100R2J -2-GP
PWR
1
GND
2
NP1
NP1
NP2
NP2
RTC1
BAT-CON2-1-GP-U
62.70001.011
RTC1
BAT-CON2-1-GP-U
62.70001.011
E
B
C
R1
R2
Q12
PDTC124EU-1-GP
R1
R2
Q12
PDTC124EU-1-GP
1
2
R476
100KR2J -1-GP
R476
100KR2J -1-GP
1
2
EC133
SC4D7P50V2CN-1GP
EC133
SC4D7P50V2CN-1GP
1
2
E
C
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
B
C
R1
R2
Q11
PDTC124EU-1-GP
R1
R2
Q11
PDTC124EU-1-GP
1
AFTP128 AFTP128
1
2
C
4
7
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
7
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
AFTP126 AFTP126
1
2
C454
SC10U6D3V5MX-3GP
DY
C454
SC10U6D3V5MX-3GP
DY
1
AFTP132 AFTP132
1
AFTP125 AFTP125
1
2
EC61
SC220P50V2KX-3GP
DY
EC61
SC220P50V2KX-3GP
DY
1 2 R482 0R0402-PAD R482 0R0402-PAD
1
3
2
LED1
LED-OW-3-GP
LED1
LED-OW-3-GP
1 2 R414 33R2J -2-GP R414 33R2J -2-GP
1 2
R491
330R2J -3-GP
R491
330R2J -3-GP
1
2
3
4
5
6
CN1
ACES-CON4-10-GP-U
CN1
ACES-CON4-10-GP-U
1
AFTP129 AFTP129
1
AFTP130 AFTP130
1
AFTP131 AFTP131
1
2
3
U24
SDMG0340LC7F-GP-U
U24
SDMG0340LC7F-GP-U
1
2
EC62
SC220P50V2KX-3GP
DY
EC62
SC220P50V2KX-3GP
DY
1
2
EC161
SC220P50V2KX-3GP
DY
EC161
SC220P50V2KX-3GP
DY
1 2
R220
1KR2J -1-GP
R220
1KR2J -1-GP
1
2
E
C
7
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
7
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1 2 R419 0R2J -2-GP R419 0R2J -2-GP
1 2 R33 0R3J -0-U-GP
DY
R33 0R3J -0-U-GP
DY
1 2 R227
0R0402-PAD
R227
0R0402-PAD
1 2
R492
270R2J -L
R492
270R2J -L
1
2
EC135
SC4D7P50V2CN-1GP
EC135
SC4D7P50V2CN-1GP
1 2
34
RN50
SRN100KJ -6-GP
RN50
SRN100KJ -6-GP
1
2
C
4
7
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
4
7
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
CS#
1
DO
2
WP#
3
GND
4
DIO
5
CLK
6
HOLD#
7
VCC
8
U23
W25X16AVSSIG-GP
U23
W25X16AVSSIG-GP
1
AFTP124 AFTP124
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_PN2
+5V_USB2
USB_PN2
USB_PP2
USB_PP2
+5V_USB2
+5V_ALW
+5V_USB2
USB_PP2
USB_OC#2
USB_PWR_EN#
USB_PN2
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
USB
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
USB
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
USB
Custom
<Core Design>
Right USB Port CONN
at least 80 mil
at least 80 mil
SSID = USB
-1
1
AFTP134 AFTP134
1
2
T
C
1
1
S
T
1
0
0
U
6
D
3
V
B
M
-
7
G
P
T
C
1
1
S
T
1
0
0
U
6
D
3
V
B
M
-
7
G
P
GND
1
VIN
2
VIN
3
EN/EN#
4
FLG#
5
VOUT
6
VOUT
7
VOUT
8
U1
RT9711BPF-GP
U1
RT9711BPF-GP
1
AFTP135 AFTP135
12
43
L1
L-63UH-GP
DY
L1
L-63UH-GP
DY
5
1
2
3
4
6
CN3
MLX-CON4-15-GP-U
20.F0693.004
CN3
MLX-CON4-15-GP-U
20.F0693.004
1
AFTP133 AFTP133
1
2
R
2
9
6
1
0
0
K
R
2
J
-
1
-
G
P
DY
R
2
9
6
1
0
0
K
R
2
J
-
1
-
G
P
DY
1
2
E
C
7
8
S
C
1
U
6
D
3
V
2
K
X
-
G
P
E
C
7
8
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
TC12
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
DY
TC12
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
DY
1
2
C
3
2
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
3
2
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
C
3
2
7
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
3
2
7
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1 AFTP127 AFTP127
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KCOL10
KCOL14
KCOL3
KROW2
KCOL7
KROW6
KCOL11
KCOL15
KCOL4
KROW3
KCOL8
KROW7
KCOL12
KCOL1
KROW0
KCOL5
KROW4
KCOL9
KCOL0
KCOL13
KCOL2
KROW1
KCOL6
KROW5
KCOL16
KCOL0
KCOL1
KCOL2
KCOL3
KCOL8
KCOL6
KCOL13
KCOL15
KCOL16
KCOL12
KCOL9
KCOL14
KCOL11
KCOL10
KCOL7
KCOL4
KROW0
KROW1
KROW2
KCOL5
KROW5
KROW4
KROW6
KROW7
KROW3
TPDATA
+5V_RUN
TPCLK
+5V_RUN
+5V_RUN
KROW[0..7]
KCOL[0..16]
TPCLK
TPDATA
KB_DET#
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
KeyBoard/Touch Pad
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
KeyBoard/Touch Pad
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
KeyBoard/Touch Pad
Custom
<Core Design>
Internal KeyBoard Connector
TouchPad Connector
For EMS
SSID = Touch.Pad SSID = KBC
1
AFTP145 AFTP145
1
2
E
C
1
2
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
2
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
1
6
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
1
6
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
0
2
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
0
2
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
1
1
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
1
1
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP161 AFTP161
1
2
E
C
1
1
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
1
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP165 AFTP165
1
2
E
C
1
2
0
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
2
0
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP159 AFTP159
1
2
E
C
1
2
6
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
2
6
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP156 AFTP156
1
AFTP138 AFTP138
1
AFTP139 AFTP139
1
2
E
C
1
0
9
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
0
9
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
2
1
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
2
1
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
C163
SC33P50V2J N-3GP
C163
SC33P50V2J N-3GP
1
AFTP144 AFTP144
1
AFTP163 AFTP163
1
AFTP166 AFTP166
1
2
E
C
1
0
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
0
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP153 AFTP153
28
29
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
KB1
J AE-CON27-GP
20.K0291.027
KB1
J AE-CON27-GP
20.K0291.027
1
AFTP150 AFTP150
1
AFTP137 AFTP137
1
AFTP143 AFTP143
1
AFTP154 AFTP154
1
2
E
C
1
2
3
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
2
3
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
1
0
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
1
0
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP160 AFTP160
1
AFTP141 AFTP141
1
AFTP157 AFTP157
1 2
34
RN18
SRN10KJ -5-GP
RN18
SRN10KJ -5-GP
1
AFTP149 AFTP149
1
2
E
C
1
2
7
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
2
7
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
C
1
6
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
C
1
6
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
E
C
1
2
8
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
2
8
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
1
3
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
1
3
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP162 AFTP162
1
2
E
C
1
0
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
0
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
1
2
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
1
2
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP142 AFTP142
1
2
E
C
1
2
9
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
2
9
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
3
0
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
3
0
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP164 AFTP164
1
AFTP151 AFTP151
1
2
3
4
5
6
TPAD1
ACES-CON4-10-GP-U
20.K0320.004
TPAD1
ACES-CON4-10-GP-U
20.K0320.004
1
2
E
C
1
1
8
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
1
8
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP136 AFTP136
1
AFTP152 AFTP152
1
AFTP155 AFTP155
1
AFTP148 AFTP148
1
AFTP158 AFTP158
1
2
E
C
1
1
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
1
4
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
2
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
2
5
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
C
1
6
8
S
C
1
U
1
0
V
3
K
X
-
3
G
P
C
1
6
8
S
C
1
U
1
0
V
3
K
X
-
3
G
P
1
2
C174
SC33P50V2J N-3GP
C174
SC33P50V2J N-3GP
1
2
E
C
1
0
3
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
0
3
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP140 AFTP140
1
AFTP146 AFTP146
1
2
E
C
1
1
9
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
1
9
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
0
7
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
E
C
1
0
7
S
C
2
2
0
P
5
0
V
2
K
X
-
3
G
P
DY
1
AFTP147 AFTP147
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PSID_DISABLE#_R
BAT_SCL
BAT_SDA
BAT_IN#
PBAT_ALARM#
+DC_IN
PBAT_SMBCLK1
PBAT_PRES1#
PBAT_SMBDAT1
PBAT_ALARM#
USB_PN1
PBAT_SMBCLK1
PBAT_SMBDAT1
PBAT_PRES1#
+PBATT
USB_PN0
USB_PP0
+5V_USB1
USB_PP1
MDI1+
MDI1-
MDI0+
MDI0-
M_BLUE
M_RED
GMCH_VSYNC
DDC_DATA_CON
DDC_CLK_CON
M_GREEN
GMCH_HSYNC
+5V_RUN
+2.5V_LOM
DDC_CLK_CON
DDC_DATA_CON
PS_ID
M_RED
M_GREEN
M_BLUE
+DC_IN +DC_IN_SS
+5V_ALW
+5V_ALW +3.3V_ALW
+3.3V_RTC_LDO
+3.3V_RTC_LDO
+PBATT
+5V_USB1 +5V_ALW
+5V_RUN +2.5V_LOM
+5V_USB1
+2.5V_LOM
+5V_RUN
AD_OFF
PSID_DISABLE#
PS_ID_EC
BAT_SCL
BAT_SDA
BATT_SENSE
USB_PWR_EN#
USB_OC#0
USB_OC#1
BAT_IN#
USB_PN1
USB_PP1
MDI1+
MDI1-
MDI0+
MDI0-
USB_PP0
USB_PN0
DDC_DATA_CON
DDC_CLK_CON
M_RED
M_GREEN
M_BLUE GMCH_HSYNC
GMCH_VSYNC
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
LEFT IO/DCIN/BATT CONN
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
<Core Design>
I/O Board Connector
Batt Connecter
Thi s cap shoul d be used
onl y as l ast r esor t f or
EMI suppr essi on.
Id=17A
Qg=100~150nC
Rdson=5.4~6.5mohm
Reserved for EMI
Pl ace near DCI N1
at least 80 mil at least 80 mil
USB Power
SSID = PWR.Support
SB
-1
-3
2009/07/29
1
2
R336
47KR3J -L-GP
R336
47KR3J -L-GP
1
2
C326
SCD1U50V3KX-GP
C326
SCD1U50V3KX-GP
1
AFTP172 AFTP172
BATT1+
1
BATT2+
2
CLK_SMB
3
DAT_SMB
4
BATT_PRS#
5
SYS_PRES#
6
BAT_ALERT
7
GND1
8
GND2
9
GND
10
GND
11
BATT1
TYCO-CON9-1-GP
20.80959.009
BATT1
TYCO-CON9-1-GP
20.80959.009
1
AFTP191 AFTP191
1
2
C
3
7
9
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
C
3
7
9
S
C
1
0
U
2
5
V
6
K
X
-
1
G
P
1
AFTP185 AFTP185
1 AFTP193 AFTP193
1
2
3
D3
BAV99-4-GP
D3
BAV99-4-GP
1
2
R
3
3
7
2
4
0
K
R
3
-
G
P
R
3
3
7
2
4
0
K
R
3
-
G
P
1
2
C4502
S
C
1
U
6
D
3
V
2
K
X
-
G
P
C4502
S
C
1
U
6
D
3
V
2
K
X
-
G
P
1
2
C342
SCD01U16V2KX-3GP
C342
SCD01U16V2KX-3GP
1 AFTP168 AFTP168
1 2
3
D8
BAV99-4-GP
D8
BAV99-4-GP
1
2
R90
2K2R2J -2-GP
R90
2K2R2J -2-GP
1
AFTP170 AFTP170
1
2 3
4
RN1 SRN100J -3-GP RN1 SRN100J -3-GP
1
2
C4501
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
DY
C4501
S
C
4
D
7
U
6
D
3
V
3
K
X
-
G
P
DY
1
AFTP169 AFTP169
1
AFTP174 AFTP174
1 AFTP192 AFTP192
1
2
C
3
8
0
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
C
3
8
0
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
1
AFTP175 AFTP175
1
2
R93
10KR2J -3-GP
R93
10KR2J -3-GP
1
AFTP184 AFTP184
1
2
3
4 5
6
7
8 S
S
S
G D
D
D
D
U46
AO4407A-GP
S
S
S
G D
D
D
D
U46
AO4407A-GP
1
2
T
C
1
8
S
T
1
0
0
U
6
D
3
V
B
M
-
8
G
P
DY
T
C
1
8
S
T
1
0
0
U
6
D
3
V
B
M
-
8
G
P
DY
1
AFTP176 AFTP176
1
AFTP179 AFTP179
1
2
C325
SC2200P50V2KX-2GP
C325
SC2200P50V2KX-2GP
1 2 R2
0R0603-PAD
R2
0R0603-PAD
1
AFTP187 AFTP187
1
AFTP180 AFTP180
E
B
C
R 1
R 2
Q16
PDTA124EU-1-GP
DY
R 1
R 2
Q16
PDTA124EU-1-GP
DY
G
S D D
Q6
FDV301N-NL-GP
D
Q6
FDV301N-NL-GP
1
AFTP171 AFTP171
1
2
E
C
8
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY E
C
8
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
C
3
8
1
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
C
3
8
1
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
1 2
R92
33R2J -2-GP
DY
R92
33R2J -2-GP
DY
1
2
R98
15KR2J -1-GP
R98
15KR2J -1-GP
1 2
3
D9
BAV99-4-GP
DY
D9
BAV99-4-GP
DY
1
2
R95
100KR2J -1-GP
R95
100KR2J -1-GP
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
NP1
NP2
51
52
53
54
55
56
CN4
ACES-CONN50A-GP-U
CN4
ACES-CONN50A-GP-U
1
AFTP186 AFTP186
C
B
E
Q7
CH3904PT-GP
Q7
CH3904PT-GP
1
2
C33
SCD01U16V2KX-3GP
C33
SCD01U16V2KX-3GP
1
AFTP177 AFTP177
1
AFTP189 AFTP189
1 2 R1 100R2J -2-GP R1 100R2J -2-GP
1 2
R91
33R2J -2-GP
R91
33R2J -2-GP
1
AFTP178 AFTP178
GND
1
IN
2
EN1/EN1#
3
EN2/EN2#
4
OC2#
5
OUT2
6
OUT1
7
OC1#
8
U9
G546B2P1UF-GP
U9
G546B2P1UF-GP
1
2
C330
SCD01U50V2KX-1GP
C330
SCD01U50V2KX-1GP
1 2
R294
470KR2J -2-GP
R294
470KR2J -2-GP
1
2
3
D1
BAV99-4-GP
D1
BAV99-4-GP
1 AFTP167 AFTP167
1
2
C332
SCD1U50V3KX-GP
DY
C332
SCD1U50V3KX-GP
DY
1
2
3
D18
BAV99-4-GP
D18
BAV99-4-GP
1
AFTP190 AFTP190
1 2
R99
0R2J -2-GP
DY
R99
0R2J -2-GP
DY
1
AFTP182 AFTP182
2
1
3
I N
OUT
GND
R1
R2
Q5
DDTC124EUA-7F-GP
DY
I N
OUT
GND
R1
R2
Q5
DDTC124EUA-7F-GP
DY
1
AFTP183 AFTP183
1
2
C
3
7
5
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
C
3
7
5
S
C
D
0
1
U
5
0
V
2
K
X
-
1
G
P
1
AFTP181 AFTP181
1
2
C
3
7
3
S
C
1
U
2
5
V
5
K
X
-
1
G
P
C
3
7
3
S
C
1
U
2
5
V
5
K
X
-
1
G
P
1
AFTP173 AFTP173
1
2
3
D2
BAV99-4-GP
D2
BAV99-4-GP
1
AFTP188 AFTP188
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
LAN CONNECTOR / CRT
Custom
46 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
LAN CONNECTOR / CRT
Custom
46 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
LAN CONNECTOR / CRT
Custom
46 59 Monday, May 18, 2009
<Core Design>
SSID = LOM
SSID = VIDEO
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+DC_IN_SS
+3.3V_RUN
+PWR_SRC
+5V_RUN
+1.8V_SUS
+3.3V_RTC_LDO +3.3V_RUN
+3.3V_RUN
+5V_ALW +1.05V_VCCP
+5V_RUN
+3.3V_RUN +0.9V_DDR_VTT
+5V_MOD +5V_ALW +3.3V_ALW
+PWR_SRC
BLUETOOTH_EN
WLAN_ACT
BT_ACT
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
MISC
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
MISC
Custom
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
MISC
Custom
<Core Design>
34.4W001.001
NB Thermal BOSS
34.4W004.001
New Card BOSS
34.4W005.001
Mini Card BOSS
SSID = Mechanical
BOSS Placement
For TP button holder touch.
Spring
1
2
E
C
4
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
4
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
SPR3
SPRING-24-GP
34.45T31.001
SPR3
SPRING-24-GP
34.45T31.001
1
2
E
C
5
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
5
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
8
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
8
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
S
W
1
S
P
R
I
N
G
-
2
4
-
G
P
S
W
1
S
P
R
I
N
G
-
2
4
-
G
P
1 2
EC168 SCD1U16V2KX-3GP
DY
DY
1
2
E
C
6
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
6
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
3
S
C
D
1
U
5
0
V
3
K
X
-
G
P
DY
E
C
1
3
S
C
D
1
U
5
0
V
3
K
X
-
G
P
DY
1
2
E
C
4
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
4
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
4
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
4
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
9
3
S
C
4
7
P
5
0
V
2
J
N
-
3
G
P
E
C
9
3
S
C
4
7
P
5
0
V
2
J
N
-
3
G
P
1
2
E
C
8
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
8
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
7
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
E
C
7
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
H2
HOLE
H2
HOLE
1 2
DY
DY
1
2
E
C
9
4
S
C
D
1
U
5
0
V
3
K
X
-
G
P
DY
E
C
9
4
S
C
D
1
U
5
0
V
3
K
X
-
G
P
DY
1
2
E
C
1
7
0
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
E
C
1
7
0
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
1
2
E
C
3
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
3
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
4
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
4
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
C
3
2
4
S
C
D
1
U
5
0
V
3
K
X
-
G
P
C
3
2
4
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1
SPR2
SPRING-24-GP
34.45T31.001
SPR2
SPRING-24-GP
34.45T31.001
1
2
E
C
1
7
2
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
E
C
1
7
2
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
1
2
E
C
1
2
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
2
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
1
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
1
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H
1
0
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
H
1
0
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
1
2
E
C
1
6
4
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
E
C
1
6
4
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
1
2
E
C
5
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
5
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
9
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
9
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
0
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
0
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H
1
1
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
H
1
1
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
1
2
E
C
9
7
S
C
D
1
U
5
0
V
3
K
X
-
G
P
DY
E
C
9
7
S
C
D
1
U
5
0
V
3
K
X
-
G
P
DY
1
2
E
C
5
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
5
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
6
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
6
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H8
HOLE
H8
HOLE
1
2
E
C
9
2
S
C
D
1
U
5
0
V
3
K
X
-
G
P
DY
E
C
9
2
S
C
D
1
U
5
0
V
3
K
X
-
G
P
DY
1
2
E
C
1
7
4
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
E
C
1
7
4
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
1
2
E
C
1
4
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
4
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
4
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
4
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
S
C
D
1
U
5
0
V
3
K
X
-
G
P
E
C
1
S
C
D
1
U
5
0
V
3
K
X
-
G
P
1
H6
HOLE
H6
HOLE
1
2
E
C
9
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
E
C
9
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
2
E
C
1
4
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
4
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
5
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
5
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H14
HOLE
H14
HOLE
1
2
E
C
5
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
5
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
7
1
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
E
C
1
7
1
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
1
2
E
C
4
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
4
3
S
C
D
1
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1
6
V
2
K
X
-
3
G
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DY
1
2
E
C
1
4
1
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C
D
1
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1
6
V
2
K
X
-
3
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DY
E
C
1
4
1
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C
D
1
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1
6
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2
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X
-
3
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DY
1
2
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C
1
5
2
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C
D
1
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1
6
V
2
K
X
-
3
G
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DY
E
C
1
5
2
S
C
D
1
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1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
6
3
S
C
D
1
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2
5
V
2
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Y
-
1
G
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DY
E
C
1
6
3
S
C
D
1
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2
5
V
2
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Y
-
1
G
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DY
1
2
E
C
6
8
S
C
D
1
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1
6
V
2
K
X
-
3
G
P
DY
E
C
6
8
S
C
D
1
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1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
4
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
4
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H
1
7
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
H
1
7
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
1 2
DY
DY
1
2
E
C
1
0
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
0
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
6
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
6
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H
1
3
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
H
1
3
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
1
2
E
C
1
3
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
3
8
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H19
HOLE
H19
HOLE
1
2
E
C
9
9
S
C
4
7
P
5
0
V
2
J
N
-
3
G
P
E
C
9
9
S
C
4
7
P
5
0
V
2
J
N
-
3
G
P
1
2
E
C
4
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
4
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
3
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
3
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
5
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
5
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
6
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
6
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
7
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
7
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
0
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
0
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
8
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
8
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
5
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
5
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H
1
5
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
H
1
5
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
1
2
E
C
1
7
3
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
E
C
1
7
3
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
1
2
E
C
9
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
9
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H
9
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
H
9
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
1
SPR1
SPRING-24-GP
34.45T31.001
SPR1
SPRING-24-GP
34.45T31.001
1
H16
HOLE
H16
HOLE
1
2
E
C
9
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
9
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
6
2
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
E
C
1
6
2
S
C
D
1
U
2
5
V
2
Z
Y
-
1
G
P
DY
1
2
E
C
1
3
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
3
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
8
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
E
C
8
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
1
SPR4
SPRING-24-GP
34.45T31.001
SPR4
SPRING-24-GP
34.45T31.001
1
2
E
C
5
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
5
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H
5
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
H
5
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
1
H1
HOLE
H1
HOLE
1
2
E
C
1
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
0
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
5
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
5
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
8
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
8
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H7
HOLE
H7
HOLE
1
2
E
C
9
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
9
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H
1
8
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
H
1
8
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
1
2
E
C
6
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
6
4
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
2
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
0
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
0
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
3
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
3
7
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
6
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
6
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
SPR5
SPRING-58-GP
34.4B312.002
SPR5
SPRING-58-GP
34.4B312.002
1
2
E
C
8
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
8
5
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
5
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
5
9
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H
2
0
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
H
2
0
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
1
H
4
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
H
4
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
1
2
E
C
5
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
5
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
8
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
8
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H3
HOLE
H3
HOLE
1
2
E
C
7
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
7
1
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
2
E
C
1
5
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
1
5
3
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
1
H
1
2
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
H
1
2
H
O
L
E
3
5
5
X
3
5
5
R
1
1
1
-
S
1
-
G
P
1
2
E
C
6
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
E
C
6
6
S
C
D
1
U
1
6
V
2
K
X
-
3
G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Power Block Diagram
Custom
48 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Power Block Diagram
Custom
48 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Power Block Diagram
Custom
48 59 Monday, May 18, 2009
<Core Design>
Charger
MAX8731A
+PBATT
Adapter
Battery
MAX17020
+5V_ALW2
Regulator LDO Switch
+5V_ALW
G9091
+3. 3V_RTC_LDO
AO4468
+5V_RUN
G546B2P1UF
+5V_USB1
RT9711BPF
+5V_USB2
+3. 3V_ALW
AO3403
+3. 3V_LAN
AO4468
+3. 3V_RUN
G577BR91U
+3. 3V_CARDAUX
88E8040
+1. 2V_LOM +2. 5V_LOM
RTS5158E
+3. 3V_RUN_CARD
I SL6266AHRZ
+VCC_CORE
G577BR91U
+3. 3V_CARD
G5281RC1U
+LCDVDD
TPS5117
+1. 05V_VCCP
+PWR_SRC TPS51116
APL5912
+0. 9V_DDR_VTT +V_DDR_MCH_REF
+1. 5V_RUN
+1. 8V_SUS
LDO
G577BR91U
+1. 5V_CARD
Power Shape
SI 4800BDY
+5V_MOD
FDC655BN
+5V_HDD
MAX9789A
+VDDA
G9091
+3. 3V_CRT_LDO
P2003EVG
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
SMBUS Block Diagram
C
49 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
SMBUS Block Diagram
C
49 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
SMBUS Block Diagram
C
49 59 Monday, May 18, 2009
<Core Design>
LDDC_CLK
LDDC_DATA
+3. 3V_RUN
TPDATA
TPCLK
+5V_RUN
TouchPad Conn.
TPDATA
TPCLK
PSCLK1
PSDAT1
GMCH
LCD Conn.
ICH9M SMBus Block Diagram
ICH9M
SMBCLK
SMBDATA
GPI O62/ SDA2
GPI O61/ SCL2
KBC
WPC773L
CLK_SMB
Thermal
SCL
SDA
+3. 3V_RUN
SRN2K2J - 1- GP
+3. 3V_ALW
SRN2K2J - 1- GP
+3. 3V_RUN
2N7002SPT
DAT_SMB
KBC_SCL1
KBC_SDA1
LDDC_DATA
LDDC_CLK
Minicard
WLAN
SMB_DATA
SMB_CLK
SCL1
SDA1
BAT_SCL
Express
Card
SMB_CLK
BAT_SDA
SMB_DATA
SMBus address:D2
SMBus Address:A0
SMBus Address:A4
DIMM 1
SCL
SDA
+3. 3V_RTC_LDO
DIMM 2
SCL
SDA
SMBus address:16
SMB_CLK
SMB_DATA
I CH_SMBCLK
I CH_SMBDATA PBAT_SMBCLK1
PBAT_SMBDAT1
KBC SMBus Block Diagram
Battery Conn.
I CH_SMBCLK
I CH_SMBDATA
Clock
Generator
SCLK
SDATA
I CH_SMBCLK
I CH_SMBDATA
SMB_CLK
SMB_DATA
MAX8731
SCL
SDA
TPDATA
TPCLK
+3. 3V_RUN
2N7002DW- 1- GP
THERM_SCL
THERM_SDA
Capacity
Button
0R2J - 2- GP
0R2J - 2- GP
SMBus address:86
SMBus address:7A
I CH_SMBDATA
I CH_SMBCLK
SMBus address:12
+3. 3V_RUN
+3. 3V_RUN
2N7002DW- 1- GP
+3. 3V_RUN
SRN2K2J - 1- GP
+5V_CRT_RUN
SRN2K2J - 1- GP
CRT CONN
DDC_CLK_CON
DDC_DATA_CON
GMCH_DDCCLK
GMCH_DDCDATA
CTRL_DDC_CLK
CTRL_DDC_DATA
SRN10KJ - 5- GP
SRN4K7J - 8- GP
SRN100J - 3- GP
SRN4K7J - 8- GP
+3. 3V_RTC_LDO
SRN4K7J - 8- GP
SRN2K2J - 1- GP
C
h
a
r
g
e
r

B
o
a
r
d

C
O
N
N
.
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Thermal/Audio Block Diagram
Custom
50 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
50 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
50 59 Monday, May 18, 2009
<Core Design>
Thermal Block Diagram
Thermal
EMC2102
H_THERMDA
H_THERMDC
DP1
DN1
SC470P50V3J N- 2GP
EMC2102_DP2
EMC2102_DN2
SC470P50V3J N- 2GP
SC470P50V3J N- 2GP
DP2
DN2
DP3
DN3
MMBT3904- 3- GP
System sensor, put
between CPU and NB.
CPU
THRMDA
THRMDC
Audio Block Diagram
Codec
92HD71B7
HP
OUT
MIC
IN
SPEAKER
MAX9789A
PORTB_L
PORTB_R
VREFOUT_B
PORT_A_L
PORT_A_R
HP_I NL
HP_I NR
O
U
T
L
+
O
U
T
L
-
O
U
T
R
-
O
U
T
R
+
HPL
HPR
SPKR_I NL
SPKR_I NR
PORT_D_L
PORT_D_R
Digital
MIC
Array
DMI C_CLK
VOL_UP/ DMI C_0/ GPI O1
EMC2102_DP3
EMC2102_DN3
Place near the CPU
and GMCH.
MMBT3904- 3- GP
PORTC_L
PORTC_R
VREFOUT_C
Analog
MIC
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA-PCIE(1/4)
Custom
51 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA-PCIE(1/4)
Custom
51 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA-PCIE(1/4)
Custom
51 59 Monday, May 18, 2009
<Core Design>
(Blanking)
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3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA-VRAM(2/4)
Custom
52 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA-VRAM(2/4)
Custom
52 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA-VRAM(2/4)
Custom
52 59 Monday, May 18, 2009
<Core Design>
(Blanking)
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5
4
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3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA-HDMI/STRAP(3/4)
Custom
53 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA-HDMI/STRAP(3/4)
Custom
53 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA-HDMI/STRAP(3/4)
Custom
53 59 Monday, May 18, 2009
<Core Design>
(Blanking)
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2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VGA-LVDS/TV/CRT/(4/4)
Custom
54 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
54 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Custom
54 59 Monday, May 18, 2009
<Core Design>
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VRAM
Custom
55 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VRAM
Custom
55 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
VRAM
Custom
55 59 Monday, May 18, 2009
<Core Design>
(Blanking)
5
5
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4
3
3
2
2
1
1
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C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Change List - EE (1/3)
A3
56 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
A3
56 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
A3
56 59 Monday, May 18, 2009
<Core Design>
PAGE
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
OWNER DATE VERSON Issue Description Modified List NO
1
2
31
32
33
45 CN4 Pin.51 from +DC_IN change to GND. EE
24 Dummy R422 EE
41 CAMERA1 conn reduce from 10 to 8 pin. Follow camera design. EE
42
Reverse LED1. Correction. Amber for BAT_LED_B ; White for PWR_LED_B.
EE
46 Exchange H14 and H6 names. Correction. H14 for mini card boss ; H6 is hole. EE
42
RTC1 CONN change p/n: 22.70031.001 to 62.70001.011.
EE
37,41 Remove CN5 and related circuit in page.41.
Add dummy R: R493, R494, R495, R496, R497, R498, R499
37 Dummy R210, R211
EE
EE
24 Dummy R150. Staff R151. PCB Version for SB. EE
CN4 Pin.51 should be ground.
LID SW is push-pull type, no need pull high.
For debug mini card.
Set dummy res to avoid damaging MB or additional mini card.
Remove debug board connector.
For debug mini card, change LPC Bus to mini card base.
Set dummy res to avoid damaging MB or additional mini card.
42 CN1 Pin.2 set to NC. Add R500 and dummy EC161. Avoid shorting between KBC_PWRBTN# and GND.
New R and C are for EMC pre-location.
EE
24 Dummy R406.
Change R425, R422, R409, R406, R401, R404 to 100K ohm.
Dummy R406 for no keyboard detect function.
R change to 100k for save power.
EE
36 Update HDD symbol. Update symbol and footprint for only SATA HDD. (no co-layout) EE
35~45 Change All TP near connectors to AFTP (ZZ.AFT30.101). For AFTE test pad. EE
04 Change C461 and C462 from 15pF to 12pF. For X3 cap choice by report suggestion. EE
17 Change C520 and C522 from 15pF to 12pF. For X4 cap choice by report suggestion. EE
24,42 Add 0 ohm R482 on EC_SPI_WP# and link to KBC/GPIO30.
Change RN50 to 100k and Add R476 for EC_SPI_WP#.
KBC can control WP# of Flash ROM.
R change to 100k for save power.
EE
40 Change L19 and L20 to 68.00082.531. For EMI. EE
45 Change M_RED to CN4 Pin.17 ; M_GREEN to CN4 Pin.21 ; M_BLUE to CN4 Pin.25.
CN4 Pin.23 and Pin.27 to GND.
Avoiding noise to impact CRT signals. EE
47 Add H20. Add square GND for TP button holder touch. EE
42 Dummy CN2, R34. EE Cap. button function is disable.
47 Add dummy EC162, EC163, EC164.
Add dummy EC165, EC166.
Add dummy EC167, EC168, EC169.
For EMI.
Qty issue to change another.
EE
04 Change R216 to 22 ohm. The same clock dirve to U25 and U34. EE
44 Dummy EC110, EC104, EC107, EC102, EC105, EC103, EC109, EC112, EC127, EC125,
EC129, EC123, EC118, EC116, EC114, EC121, EC119, EC115, EC111, EC113, EC120,
EC130, EC128, EC126, EC124.
For EMI. EE
06/03
X01
18 Dummy R179, R423.
EE
SW check vender ID by SMBus.
43 EE No need 0 ohm R. Short R26, R27.
47 Add SW1. ME request. EE
35 LCD1.38 link to GFX_PWR_SRC ; LCD1.37 set NC ; LCD1.35 link to +LCDVDD ;
LCD1.34 link to +3.3V_RUN ; LCD1.33 link to LCD_BRIGHTNESS ; LCD1.32 to GND ;
LCD1.31 link to LCD_CBL_DET#.
For LED backlight panel. EE
24 Dummy R416, R418. Cap. button function is disable. EE
40 Change LOUT1 and MIC1 to 22.10133.D01. Change jack source. EE
17,18 Dummy U25.B10 link R506 to GND; U25.C18 link R501 to GND;
Dummy U25.C21 link R502 to GND; U25.C11 link R503 to GND;
Dummy U25.AE18 link R504 to GND; U25.AF21 link R505 to GND.
Dummy R421, R424.
Avoiding abnormal action in U25(ICH9-M). EE
25 Change R82 to 20K 1% ; Change R78 to 10K 1%. For T8 shutdown is set 88 deg-C. EE
47 Add dummy EC170, EC171, EC172, EC173, EC174. For EMI. EE
42 Change U23 to 72.25X16.A01. Better performance. EE
06/27
06/05
06/06
06/10
06/12
06/16
06/17
06/19
06/18
06/23
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
A3
57 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
A3
57 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
A3
57 59 Monday, May 18, 2009
<Core Design>
23 EE
19 EE
21 EE
08/07
20 EE
- EE
41 EE
08/11
24,32 EE
08/15
09/10
- EE
09/09
35 EE
37 EE
09 EE
10/02
23 EE
18 Staff R421, R424. (PT build cut-in) EE
11 EE
25 EE
37
EE
37 EE
07/30
X02
04 EE
04
24 EE
EE
05,17 EE
12,20,
24
EE
19 EE
04 EE
21 EE
09/02
24
23
EE
EE
32 EE
PAGE
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
OWNER
22,23
36
DATE VERSON Issue Description
EE
EE
Modified List NO
34
64
65
66
21 EE
47 EE
24 EE
35
36
37
38
39
40
41
42
Dummy R290 ; Staff R291. (PT build cut-in)
Add dummy R507.
Short R253, R254.
Staff R138, R150 ; Dummy R141, R151.
Add R508 ; Change R359 to 49.9k ohm.
Move C535 (Change 0.033uF), R472 to page.23.
Remove C536 (Change 0.033uF), C542.
Add R484 to gnd ; Add C566 for AUD_SET, C567 for AUD_BIAS.
C565 for 6040 only.
Avoiding always issue interrupt event.
Material change: HDD1
Material change: CARD1
Material change: SPR4
Add TP271 for U52/ SDVO_CTRLDATA.
Short R79, R80.
Symbol change: U54.
Change to close line:
R204, R200, R356, R139, R152, R408, R394, R390, R403, R402, R96, R120, R378,
R360, R140, R373, R97, R405, R155, R154, R262, R266, R439, R265, R226, R269,
R174, R175, R183, R432, R433, R434, R430, R431, R437, R191, R177, R270, R188,
R436, R452, R259, R282, R250, R249, R467, R153, R81, R77.
Move R182 to page.24.
Short R428, R426 ; Add DY L21.
Adjust audio amp. gain value.
Add RUN power for LAN.
No need 0 ohm R.
PCB Version for SC.
For LCD power sequence.
For PC beep.
ME request.
ME request.
ME request.
TP.
No need 0 ohm R.
08/06
For clock generator co-layout.
No need 0 ohm R.
Movement.
Pre-location for Minicard USB trace.
Short R139, R96 , R155, R154, R226, R174, R175, R432, R433.
Staff C488.
No need 0 ohm R.
For DMI.
Use 2.2uF C564 and C557 for Maxim U62 IC. For improving bobo sound.
Material change: TC23. (DY) Material issue.
Material change: TC19, TC21. Material issue.
USB_PP10 for U34.5 ; USB_PN10 for U34.4. (ST build cut-in) Schematic modification.
Staff R151 ; Dummy R150. PCB Version for -1(Xbuild).
Add dummy R509 to gnd for KBC GPIO24. (09/10 update) For GM45.
A00 09/03
Dummy R76 ; Staff R167 For H_THRMTRIP# to SB.
R115, R246, R182, R158, R159, R170.
No need 0 ohm R.
Remove L21. No need L21.
Staff R453, C511 ; DY C521. Follow Intel DG 2.0.
Short RN42, RN43, RN44, RN45, RN48, RN22, RN23, RN54, RN53, RN52, RN51. No need 0 ohm R.
Add dummy R510 and C568.
Staff R282 0 ohm.
For U34 power bounce issue.
09/22
Dummy R196. For debug. Normally, no need it.
R82 change to 10k ; R78 change to 2.37k. For T8 thermal shutdown setting.
Staff R288 ; Dummy R289. For Audio amp. gain.
67 21 Dummy R284, C318.
Staff R282 to Bead 68.00082.531.
Staff R510 to 2.2K ; Staff C568.
EE For U34 power bounce issue.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
A3
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
A3
<Core Design>
43 TC12 change to 4.7u EE
24 EE
45 add c4501 and c4502 EE
change R192 from short pad to 0ohm
43 EC78 change to 1u EE follow u1 spec design
05/18 -1
PAGE
3
4
5
1
2
42 change R419 from short pad to 0ohm EE
follow u1 spec design
follow u1 spec design
6 14/15 change R57 R54 R55 R56 from 0ohm to short pad EE
35 change R81 from short pad to 100ohm EE
35 EE
35 change R73 from 100R2F to 100R2J EE
add R3502 and R3503
35 add D25 EE
07/27 -3
PAGE
3
4
5
1
2
45/9 change R1 R94 from 100R2F to 100R2J EE
6 EE
For ESD
prevent GFX_PWR_SRC burn U20 by passing LCD_CBL_DET#
For ESD
change R500 from short pad to 100ohm For ESD 42
7 42 For MB VERSION ID add R141,R146,R150. dummy R138,R143,R151
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Change List - Power
A3
59 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Change List - Power
A3
59 59 Monday, May 18, 2009
<Core Design>
Title
Date: Sheet of
Wistron Corporation
Roberts
-3
Change List - Power
A3
59 59 Monday, May 18, 2009
<Core Design>
06/03
X01
Staff C314 and change from 4.7nF to 6.8nF. 34
No sniffer function, no control HDD & ODD power.
C316 change from 4.7nF to 0.01uF.
36
R189 change to 2.2K ohm, C216 dummy. 32 For +1.5V_RUN sequence.
C378 change to 0.01uF. 30 For +1.05V_VCCP sequence.
For +3.3V_RUN sequence and improve +3.3V_ALW voltage drop
due to SW(U31) turn on quickly (higher loading).
Dummy Q20, U57, R462, R457, C527 and U58, U28, R251, R252, C293, C295
Change R258, R256 to G81, G82
Change R278, R279, R277, R276 to G83, G84, G85, G86
34
PAGE
3
4
5
1
2
PR2 change to 9.31k ohm.
For 5V/3.3V OCP
R38 change to 12.1k
R323 change to 3.92k , C360 change to 0.047 uF 10V X7R
Add D23.
PR7.1 link to +5116_PWR_SRC.
Remove U60, R482, R476 and change trace name VRMPWRGD to VGATE_PWRGD.
Rename "+1.05V_SUSP" to "+1.05V_RUNP"
30
27
31 PC9 to GND otherwise DC-DC IC can not obtain power to
generate 1.8V/0.9V output.
31
28
8
9
10
6
7
For power sequence.
For power sequence.
Reserve for other source.
Correct naming.
11
12
13
For 1.8V OCP.
R38 for VCORE OCP
R323 and C360 for transient and load line.
18,24
R136 change to 270k and R108 change to 237k
31
30
14
31 Change PR7 value from 622k to 619k ohm. For 2nd source.
Material change: U37, U46, U47. NIKO-SEM P2003EVG component has some risk.
15
26,45
16 Power team request.
17
18
06/10
19
20
06/23
21
26,27,
28,31
No need 0 ohm R.
22
26 R61 change 4.7k to 10k. Power team request.
09/03
23 x x x
24 x x x
xx
25 x x x
xx
xx
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE For +5V_RUN sequence and improve +5V_ALW voltage drop
due to SW(U30) turn on quickly (higher loading).
06/06
06/05
PC9 to GND.
06/18
07/30
08/11
A00
26,45 Material change: U37, U46, U47.
X02
R46 ,R137 ,R127,R106 ,R384 ,R391 ,R35 ,R29 ,R307 ,R308 ,R309 ,R303 ,R304 ,
R298 ,R301 ,R310 ,R313 ,PR14.
xx

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