Code (text): ;****************************************************************** ; 2-Digit Up/Dn Counter, Isochronous Loop Example * ;****************************************************************** ; change the chip name and

configure list p=16f877A ; list directive to define processor #include <p16f877A.inc> ; processor specific variable definitions __CONFIG _CP_OFF & _WDT_OFF & _BODEN_OFF & _PWRTE_ON & _HS_OSC & _WRT_OFF & _LVP_ON & _CPD_OFF ones tens number swlatch DelayHi equ equ equ equ equ 0x20 0x21 0x22 0x23 0x24 3 ; ; ; ; ; 0..9 0..9 00..99 switch state latch variable DelayCy() subsystem variable

#define DnSw

; RA3

;****************************************************************** ; ; K8LH DelayCy() subsystem macro generates four instructions ; radix dec clock equ 8 ; clock frequency in Megahertz usecs equ clock/4 ; cycles/microsecond multiplier msecs equ usecs*1000 ; cycles/millisecond multiplier DelayCy macro movlw movwf movlw call endm delay ; 11..327690 cycle range high((delay-11)/5)+1 DelayHi low ((delay-11)/5) uDelay-((delay-11)%5)

;****************************************************************** ; ; init hardware and program variables ; org 0x000 Init ; change the ADC stuff bsf STATUS, RP0 ; Select Bank 1 movlw 0x06 ; Configure all pins movwf ADCON1 ; as digital inputs ; movlw b'00001100' ; |B1 movwf TRISA ; RA3-RA2 inputs, others outputs |B1 clrf TRISB ; portb all outputs |B1 bcf STATUS,RP0 ; bank 0 |B0 clrf PORTB ; clear portb output latches |B0 movlw b'00000001' ; digit select bits (RA1-RA0) |B0 movwf PORTA ; select the 'ones' display |B0 clrf swlatch ; clear switch state latch |B0 clrf ones ; clear 'ones' |B0 clrf tens ; clear 'tens' |B0 clrf number ; number = 00 |B0 ; ; isochronous 8 msec main program loop (62.5 Hz refresh rate)

; Main

TstSw

clrf PORTB movf PORTA,W xorlw b'00000011' movwf PORTA movf tens,W btfss PORTA,1 movf ones,W call segtbl movwf PORTB comf PORTA,W andlw b'00001100' xorwf swlatch,W xorwf swlatch,F andwf swlatch,W bnz Bump DelayCy(8*msecs-23) goto Main

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blank the display flip digit select bits WREG = tens, 0..9 display tens? yes, skip, else WREG = ones, 0..9 get segment data display new digit sample active low switches on RA3 and RA2 pins changes (press or release) update switch state latch filter out "new release" bits branch on a "new press", else precise 8 msec loop timing

|B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0

; ; bump 'number' up or down with limit checking ; Bump andlw 1<<DnSw ; the "Dn" switch? skpz ; no, skip (WREG=0), else movlw -2 ; WREG = -2 (dn) addlw 1 ; WREG = 1 (up) or -1 (dn) addwf number,F ; number++ or number-movf number,W ; WREG = number = -1..100 xorlw 100 ; test upper limit skpnz ; upper limit? no, skip, else decf number,F ; reset to 99 btfsc number,7 ; lower limit? no, skip, else incf number,F ; reset to 00 movf number,W ; WREG = number = 00..99 ; ; setup 'tens' and 'ones' for next loop ; clrf tens ; isochronous bin2bcd routine addlw -80 ; W = W - 80 rlf tens,F ; shift in 2^3*10 bit btfss tens,0 ; borrow? no, skip, else addlw 80 ; W = W + 80 addlw -40 ; W = W - 40 rlf tens,F ; shift in 2^2*10 bit btfss tens,0 ; borrow? no, skip, else addlw 40 ; W = W + 40 addlw -20 ; W = W - 20 rlf tens,F ; shift in 2^1*10 bit btfss tens,0 ; borrow? no, skip, else addlw 20 ; W = W + 20 addlw -10 ; W = W - 10, now W = "ones" rlf tens,F ; shift in 2^0*10 bit btfss tens,0 ; borrow? no, skip, else addlw 10 ; W = W + 10, now W = "ones" movwf ones ; save "ones" DelayCy(8*msecs-54) ; precise 8 msec loop timing goto Main ; ; ; segment data table (caveat, non-boundary tolerant) ; segtbl

|B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0

|B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0

addwf dt dt dt dt dt dt dt dt dt dt

PCL,F b'00111111' b'00000110' b'01011011' b'01001111' b'01100110' b'01101101' b'01111101' b'00000111' b'01111111' b'01101111'

; ; ; ; ; ; ; ; ; ; ;

"0" "1" "2" "3" "4" "5" "6" "7" "8" "9"

-|-|F|E|D|C|B|A -|-|-|-|-|C|B|-|G|-|E|D|-|B|A -|G|-|-|D|C|B|A -|G|F|-|-|C|B|-|G|F|-|D|C|-|A -|G|F|E|D|C|-|A -|-|-|-|-|C|B|A -|G|F|E|D|C|B|A -|G|F|-|D|C|B|A

|B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0

; ; K8LH DelayCy() subsystem 16-bit timing subroutine ; nop ; entry for (delay-11)%5 == 4 nop ; entry for (delay-11)%5 == 3 nop ; entry for (delay-11)%5 == 2 nop ; entry for (delay-11)%5 == 1 uDelay addlw -1 ; subtract "loop" cycle time skpc ; borrow? no, skip, else decfsz DelayHi,F ; done? yes, skip, else goto uDelay ; do another loop return ; end

|B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0 |B0