5

Berry AMD IO Board Schematics Document

2010-02-24

REV : A00

DY : Nopop Component
B

<Core Design>

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

Document Number

Cover Page

Rev

Berry IO Board
W ednesday, February 24, 2010

Sheet
1

X02
of

12

Berry IO Board
D

Project code:91.4HH01.001
PCB P/N
:09697-SC
REVISION
:SC

IOBD2

81
NP1
1

9 SATA_TXN1

ESATA

9 SATA_TXP1
9 SATA_RXN1_C
9 SATA_RXP1_C

ESATA

4 PCIE_TXP2
4 PCIE_TXN2

WLAN PCIE

4 PCIE_RXP2
4 PCIE_RXN2

WLAN PCIE
WLAN CLK
C

4 CLK_PCIE_W LAN
4 CLK_PCIE_W LAN#
6 CLK_PCIE_LAN
6 CLK_PCIE_LAN#

LAN CLK

5 CLK_PCIE_W W AN
5 CLK_PCIE_W W AN#

WWAN CLK
at least 80 mil

+5V_USB1
+5V_ALW

+3.3V_RUN
+3.3V_ALW
+1.5V_RUN

A00-0208

6 PM_LAN_ENABLE
4,5,6 PLT_RST#
4 W LAN_CLKREQ#
4,5,6 PCIE_W AKE#
4 BT_ACT
4 W LAN_ACT
3 PSID_EC

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
NP2
84

82
83
2

USB_PP9 9

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80

USB_PN9 9

USB 0

USB_PP11 5,10
USB_PN11 5,10

WWAN USB

USB_PN0 8
USB_PP0 8

USB 1
WLAN USB

USB_PP13 4
USB_PN13 4
E51_RXD 4
E51_TXD 4

WWAN PCIE

PCIE_RXP4 5
PCIE_RXN4 5
PCIE_TXP4 5
PCIE_TXN4 5

WWAN PCIE

PCH_SMBDATA 4,5
PCH_SMBCLK 4,5

+DC_IN_SS

WWAN SMBUS

W IFI_RF_EN 4
W W AN_CLKREQ# 5
W W AN_RADIO_DIS# 5
PSID_DISABLE# 3,10
8103_GPO 6
PCIE_RXP3 6
PCIE_RXN3 6

X02-1229
LAN PCIE

PCIE_TXP3 6
PCIE_TXN3 6

LAN PCIE

86
85
B

ACES-CONN80A-GP

20.F1671.080

PCIE_RX Decoupling Capacitor near LAN Chip

<Core Design>

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

A3
Date:
5

IO Board CONN

Document Number

Rev

X02

Berry IO Board
Monday, February 08, 2010

Sheet
1

of

12

SSID = PWR.Support

DCin CONN
D

PD302
BAV99-4-GP

PR304
100KR2J-1-GP

+3.3V_ALW

PR306
PSID_DISABLE#_R

DY

PSID_DISABLE#

+3.3V_ALW

DY
2

PR303
10KR2J-3-GP
PQ302
PMBS3904-1-GP

PR302
15KR2J-1-GP

+5V_ALW

2,10

PR307
2K2R2J-2-GP

PR308

PS_ID

PD303
BAV99-4-GP

PQ301
FDV301N-NL-GP

0R2J-2-GP

PSID_EC 2

33R2J-2-GP
C

PR309

This cap should be used

only as last resort for
EMI suppression.

PD304

1
2

DY B240A-13-GP

AO4407A-GP

Id=-9.6A
Qg=-25nC
Rdson=18~30mohm

8
7
6
5

PC306
SC10U25V6KX-1GP

PD301
1SMB22AT3G-GP-U

SKT-JACK-204-GP-U

PR310
240KR3-GP

DY
2

GND
GND
GND
GND

AFTP302

PC302
SCD1U50V3KX-GP

D
D
D
D

PC304
SCD01U50V2KX-1GP

DC_IN+#2
DC_IN+#3

1
9
8
7
6

PS_ID_R2

2
3
1

DATA

AFTP301

DC_IN-#4
DC_IN-#5

1 PR301 2
0R0603-PAD
K

4
5

PS_ID_R

PC301
SC1U25V5KX-1GP

DCIN1

PU301
S
S
S
G

PC303
SCD01U50V2KX-1GP

+DC_IN_SS

1
2
3
4

+DC_IN

X02-1216

33R2J-2-GP

PC305
SCD01U50V2KX-1GP

DY

PR311
47KR3J-L-GP

AFTP303

A00-0208

22.10037.D61

Remove PQ303, PQ304 and net AD_OFF.

<Core Design>

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

A3
Date:
5

DCIN

Document Number

Rev

X02

Berry IO Board
Monday, February 22, 2010

Sheet
1

of

12

SSID = Wireless

Mini Card Connector(802.11a/b/g)

+3.3V_RUN
R401

2,5,6 PCIE_W AKE#

DY

+1.5V_RUN
W LAN1

AFTP402

53

0R2J-2-GP

NP1
1

MINI_2_W AKE#

2
2 W LAN_ACT

2 BT_ACT

4
6
7

2 W LAN_CLKREQ#

8
9
10

2 CLK_PCIE_W LAN#

11

2 CLK_PCIE_W LAN

13

12
14
15
16

+5V_ALW

DY
2

C401
SCD1U10V2KX-4GP

C402
SCD1U10V2KX-4GP

+3.3V_RUN

2 E51_RXD

17

2 E51_TXD

19

18
20

W IFI_RF_EN

21
22

+3.3V_RUN

2 PCIE_RXN2

23

2 PCIE_RXP2

25

PLT_RST# 2,5,6

24
26

+1.5V_RUN

27

1
2

C405
SC10U6D3V5MX-3GP

DY
2

1
2

C404
SCD1U10V2KX-4GP

C403
SC10U6D3V5MX-3GP

28
29
C406
SCD1U10V2KX-4GP

2 PCIE_TXN2

31

2 PCIE_TXP2

33

PCH_SMBDATA

PCH_SMBCLK 2,5
PCH_SMBDATA 2,5

34
36

USB_PN13 2

38

USB_PP13 2

37
39

+3.3V_RUN

40
41

1
2

PCH_SMBCLK

32
35

W LAN_ACT

DY

30

42

EC401
SC220P50V2KX-3GP

AFTP5715_1

43

AFTP408

44
45
46

AFTP5717_1

47

AFTP409

48
49

R404
+5V_ALW

DY

50

+5V_MINICARD

51

52

0R3J-0-U-GP

NP2
54
SKT-MINI52P-21-GP

62.10043.581

<Core Design>

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:
5

BATT CONN
Document Number

Rev

Berry IO Board

W ednesday, December 30, 2009

Sheet
1

X02
4

of

12

R502

2,10 USB_PN11

DY2

USBP11-_R

0R3J-0-U-GP

Close WWAN1
D

R505

Layout note: Place caps C401~C407

close WWAN1 connector.

2,10 USB_PP11

DY2

USBP11+_R

0R3J-0-U-GP

A00-0222
C901 Please near WWAN1

MiniCard WWAN connector

+3.3V_RUN

DY
2

DY

C502
SCD047U10V2KX-2GP

C501
SC33P50V2JN-3GP

+1.5V_RUN

W W AN1

DY
X02-1216

2 W W AN_RADIO_DIS#
2,4,6 PLT_RST#

+3.3V_RUN

W W AN_RADIO_DIS#
W W AN_PCIE_RST#
2
R501
0R0402-PAD

2,4 PCH_SMBCLK
2,4 PCH_SMBDATA

DY

USBP11-_R
USBP11+_R

C507
SCD1U10V2KX-4GP

UIM_PW R
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

53
NP1
1

1
2

1
2

1
2

DY

C505
SCD047U10V2KX-2GP

DY

C506
SCD047U10V2KX-2GP

DY

C504
SC33P50V2JN-3GP

DY

C503
SC33P50V2JN-3GP

TC501
ST220U6D3VDM-20GP

4
6
8
10
12
14
16

3
5
7
9
11
13
15

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
NP2
54

DY

PCIE_W AKE# 2,4,6

W W AN_CLKREQ# 2
CLK_PCIE_W W AN# 2
CLK_PCIE_W W AN 2

PCIE_RXN4 2
PCIE_RXP4 2
PCIE_TXN4 2
PCIE_TXP4 2

+3.3V_RUN

SKT-MINI52P-9-GP-U
AFTP521
AFTP522
AFTP523
AFTP524
AFTP525

1
1
1
1
1

62.10043.411

UIM_PW R
UIM_VPP
UIM_RESET
UIM_CLK_L
UIM_DATA

Close to SIM1

ESD501
UIM_RESET

R506 1

2 33R2J-2-GP

DY

UIM_CLK_L
UIM_VPP
UIM_DATA

UIM_PW R

UIM_DATA

DY

20.I0046.001

DY
2

DY DY

DY DY
2

EC502

DY

SC33P50V2JN-3GP
EC504

EC501

SC33P50V2JN-3GP

EC507
SC100P50V2JN-3GP
SC100P50V2JN-3GP

CARD-PUSH-7P-GP-U3

UIM_VPP

IP4220CZ6-T-R-GP
EC506

DY

DATA and CLK need keep away about 12mil

UIM_CLK_L

UIM_PW R
UIM_RESET
UIM_CLK

DY

SC10P50V2JN-4GP
EC503

1
2
3
5
6
7
8
9
10
NP1
NP2

2 SC1U10V2KX-1GP

SC33P50V2JN-3GP

VCC
RST
CLK
GND
VPP
I/O
GND
GND
CD
NP1
NP2

EC505 1

SIM1

<Core Design>

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

A3

Place caps EC806 , EC807 closest to SIM1

Date:
4

WWAN/SIM Card

Document Number

Rev

X02

Berry IO Board
Monday, February 22, 2010

Sheet
1

of

12

+3.3V_RUN

+3.3V_LAN

R602

DY 2
0R3J-0-U-GP
R603

+3.3V_LAN

40 mils

DY

0R3J-0-U-GP

main: 84.00102.031
2nd: 84.03403.031

Q602

LAN_ENABLE_R_C

SCD1U16V2ZY-2GP

Q601

C614

2 PM_LAN_ENABLE

SCD1U16V2ZY-2GP

1
2

1
2

1
2

C609

DY

C610
SC1U10V2KX-1GP

C613

2
SCD1U16V2ZY-2GP

C612

SCD1U16V2ZY-2GP

C611

.
.
. .

40 mils

C608

DY

SC10U6D3V3MX-GP

+1.2V_LOM

2PM_LAN_ENABLE_R

1KR2J-1-GP

C607

SC4D7U6D3V3KX-GP

1 R604

C606

SCD1U10V2KX-4GP

C605

SC4D7U6D3V3KX-GP

PA102FMG-GP

SCD1U10V2KX-4GP

R601
10KR2J-3-GP

C604
SCD1U10V2KX-4GP

SCD1U16V2ZY-2GP

C603

SCD1U16V2ZY-2GP

C602

SCD1U16V2ZY-2GP

C601

+3.3V_ALW

S
2N7002E-1-GP

U601
+1.2V_LOM
+1.2V_LOM
+1.2V_LOM

9
23
28

+3.3V_LAN
+3.3V_LAN

22
30

+1.2V_LOM
CTRL12
+3.3V_LAN
VDDTX

1
3
4
14

LV_D
LV_A
HV33
VDDTX

24

EECS

27
26
25

LENPIN1/EESK
LEDPIN2/EEDI
LEDPIN3/EEDO

LAN_X1
LAN_X2

31
32

CKXTAL1
CKXTAL2

8103_GPO

29
2

GPO
IBREF

C616
SCD1U10V2KX-4GP

C619
SC1U10V2KX-1GP

C618
SC1U10V2KX-1GP

+3.3V_LAN

VDD3
VDD3

LANWAKE#
ISOLATE#

19
21

PCIE_W AKE#
ISOLATE#

REFCLK_P
REFCLK_M

12
13

CLK_PCIE_LAN
CLK_PCIE_LAN#

HSIP
HSIN
HSOP
HSON

10
11
15
16

PCIE_TXP3
PCIE_TXN3
PCIE_HSOP C615 1
PCIE_HSON C617 1

CLKREQB
PERST#

18
20

PLT_RST_LAN#

MDIP0
MDIN0
MDIP1
MDIN1

5
6
7
8

MDI0+
MDI0MDI1+
MDI1-

GNDTX
GND

17
33

1D2V

CTRL12

VDD1
VDD1
VDD1

R607 1
2LAN_EECS
1KR2J-1-GP
TP1
1 AMBER_LED#
GREEN_LED#
1
2
R609
3K6R2F-GP

X02-1216

CLK_PCIE_LAN 2
CLK_PCIE_LAN# 2

R608

2 SCD1U10V2KX-4GP
2 SCD1U10V2KX-4GP
2 PLT_RST#
0R0402-PAD

1
R605
1
R606

2
2

1KR2J-1-GP

+3.3V_RUN

15KR2J-1-GP

PCIE_TXP3
PCIE_TXN3
PCIE_RXP3
PCIE_RXN3

2
2
2
2

PLT_RST# 2,4,5

X02-1216

MDI0+
MDI0MDI1+
MDI1-

7
7
7
7

2 8103_GPO

PCIE_W AKE# 2,4,5

R610
2K49R2F-GP

RTL8103T-VB-GRT-GP

LAN_X1

2 SC18P50V2JN-1-GP

C620

X601
XTAL-25MHZ-102-GP

C621

LAN_X2

SC15P50V2JN-2-GP

Main: 82.30020.851
2nd : 82.30020.791

<Core Design>

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

LAN RTL8103T
Size

Document Number

Rev

Berry IO Board
Date:
A

W ednesday, February 24, 2010

Sheet
E

X02
of

12

XF701
1CT:1CT
6 MDI0+

16

RJ45-3

14

XFR_RXC

RJ45-6

1.route on bottom as differential pairs.

2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.

10/100M Lan Transformer

D

RJ45-7

RJ45 Connector

RJ45-4
6 MDI0-

15

RJ45

Tx Side

9
1

RJ45-3
1CT:1CT

RJ45-1

11

XFR_CMT

RJ45-2

RJ45-6
RJ45-1
RJ45-4

22.10277.591
LAN_TERMINAL
1
SC1KP3KV8KX-GP-U

RJ45-8P-7-GP-U

5
6
7
8

RN701
SRN75J-1-GP

XFORM-12P-36-GP

A00-0223
Change PCB footprint

2
3
4
5
6
7
8
10

RJ45-2
RJ45-7

Rx Side
C702
SCD01U16V2KX-3GP

C701
SCD01U16V2KX-3GP

6 MDI1-

10

4
3
2
1

6 MDI1+

2
C703

RJ45-1
RJ45-2
RJ45-3
RJ45-4
RJ45-6
RJ45-7

1
1
1
1
1
1

AFTP701
AFTP702
AFTP703
AFTP704
AFTP705
AFTP706

<Core Design>

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

A3
Date:
5

XFORM

Document Number

Rev

X02

Berry IO Board
Tuesday, February 23, 2010

Sheet
1

of

12

SSID = USB

+5V_USB1

R801
1
2
0R0603-PAD

R802
1
2
0R0603-PAD

USB_PP0

2 USB_PP0

C822

DY

A00-0222
C

USB1

5
1

USB_P0SC10U10V5KX-2GP
2
1

USB_PN0

2 USB_PN0

X01 1119
USB_P0USB_P0+
AFTP802

SKT-USB-333-GP-U

USB_P0+

AFTP801
AFTP803
AFTP804
D801

DY R803
100KR2J-1-GP

20091118

SC1U10V2KX-1GP

C801

22.10321.451

close to USB1

+5V_USB1
+5V_USB1

NP1
2
3
NP2
4
6

1
1
1

+5V_USB1
USB_P0USB_P0+

DY

TC801
ST100U6D3VBM-5GP
USB_P0-

USB_P0+

PRTR5V0U2X-GP

<Core Design>

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

A3
Date:
5

Document Number

USB Port
Berry IO Board

W ednesday, February 24, 2010

Sheet
1

Rev

X02
8

of

12

SSID = ESATA
Block A
+3.3V_RUN

2
2

DY

+3.3V_RUN

R912 4K7R2J-2-GP
1

DY

1
2

ESATA_TXP1_
ESATA_TXN1_

1
2
3
4
5

2 SATA_TXP1
2 SATA_TXN1

1 C907
1 C906

SATA_RXN1
SATA_RXP1

4
3

2
2

RN901
SRN0J-6-GP

6
7
8
9
10

DY

A_OUTP
A_OUTN
GND
B_INN
B_INP

15
14
13
12
11

ESATA_RXN1_

B_BST#

+3.3V_RUN
RN904

3
4

DY

2
1

ESATA_TXP1_C
ESATA_TXN1_C

2
2
C905
SCD01U50V2KX-1GP

PS8511BTQFN20GTR-GP

ESATA_RXP1_

ESATA_RXP1_
ESATA_RXN1_

ESATA_RXN1_CC
ESATA_RXP1_CC

1
1

+3.3V_RUN

1
2

C904
SCD01U50V2KX-1GP
ESATA_TXP1_CC
ESATA_TXN1_CC

RN903
SRN0J-6-GP

VDD
EN
B_PRE
A_PRE
B_BST#

SCD01U50V2KX-1GP
SCD01U50V2KX-1GP

2 SATA_RXN1_C
2 SATA_RXP1_C

A_INP
A_INN
GND
B_OUTN
B_OUTP

DY
1
2

U901

GND
A_BST#
A_EQ
B_EQ
AUTOPW_EN
VDD

RN902
SRN0J-6-GP

1
2

DY

21
20
19
18
17
16

4
3

ESATA_TXP1_

C901
SCD1U10V2KX-4GP

4
3

ESATA_TXN1_

C902

DY

1
R922 4K7R2J-2-GP

A_BST#
A_EQ
B_EQ
AUTOPW_SAV_EN

DY

SCD01U16V2KX-3GP

1
R914 4K7R2J-2-GP

R913 4K7R2J-2-GP

2
2

ESATA_RXP1_CC
ESATA_RXN1_CC

DY

R921
4K7R2J-2-GP

R923
4K7R2J-2-GP
B_PRE
1
A_PRE
1

DY
DY

R924
4K7R2J-2-GP

SRN0J-6-GP

ESATA_RXP1_CC

1
C908

ESATA_RXP1_C
2
SCD01U50V2KX-1GP

R906
1
2
0R0603-PAD

ESATA_RXP1
R907
1
2
0R0603-PAD

2 USB_PP9

ESATA CONN
ESATA1

USB_P9+
USB_P9-

A00-0222
R908

2 ESATA_RXN1_C
SCD01U50V2KX-1GP

1
2
0R0603-PAD

ESATA_RXN1
R910
1
2
0R0603-PAD

R909
1
2
0R0603-PAD

ESATA_TXP1

DY
2

C923
SC10U10V5KX-2GP
ESATA_TXP1_C

S6
S5

B+
B-

ESATA_TXP1
ESATA_TXN1

S2
S3
U1

+5V_USB1

2 USB_PN9

ESATA_RXP1
ESATA_RXN1

1
C909

D+
D-

A+
A-

GND
GND
GND
GND
GND
GND
GND
GND

15
14
13
12
U4
S7
S4
S1

VBUS

NP2
NP1

NP2
NP1

SKT-USB17-GP

DY

C910
SCD1U10V2KX-4GP

ESATA_RXN1_CC

U3
U2

X01 1119

A00-0222

close to ESATA1
AFTP901
AFTP902
AFTP903
AFTP904
AFTP905
AFTP906
AFTP907
AFTP908

ESATA_TXN1_C

R911
1
2
0R0603-PAD

1
1
1
1
1
1
1
1

USB_P9USB_P9+
ESATA_RXN1
ESATA_RXP1
ESATA_TXN1
ESATA_TXP1
+5V_USB1
GND

<Core Design>

Wistron Corporation

ESATA_TXN1

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3
Date:

ESATA
Document Number

Rev

Berry IO Board
W ednesday, February 24, 2010

Sheet
1

X02
of

12

+3.3V_RUN

AFTP1001

R1005
SCD1U10V2KX-4GP

DY

DY
2

X02-1230

R1004
SC10U6D3V5MX-3GP

TPNL1
9

R1001
1

2,3 PSID_DISABLE#

DY

0R2J-2-GP

2
3
4
5
6
7
8

TPNL_GPIO
USB_PN11_TPNL
USB_PP11_TPNL

DY

AFTP1005

10
ACES-CON8-4-GP-U

A00-0222
R1002
2,5 USB_PN11

USB_PN11

DY

USB_PN11_TPNL

0R3J-0-U-GP

AFTP1002
AFTP1003
AFTP1004

1
1
1

PSID_DISABLE#
USB_PN11_TPNL
USB_PP11_TPNL

Close TPNL1
R1003
B

2,5 USB_PP11

USB_PP11

DY

USB_PP11_TPNL

0R3J-0-U-GP

<Core Design>

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

Touch Panel Conn

Size
A4

Document Number

Date: Monday, February 22, 2010

5

Rev

Berry IO Board
2

X02
Sheet

10

of
1

12

H1
HOLE335R115-GP

H2
HOLE335R115-GP

H4
HOLE335R115-GP

H3
HOLE335R115-GP

20091116

HIO2
STF237R48H172-1-GP

20100203
HIO1
STF237R48H172-1-GP

HWW1
STF237R148H67-GP

HWL1
STF237R117H83-1-GP

SPR1
SPR2
SPRING-68-GP

DY

DY

SPRING-67-GP

<Core Design>

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title
Size

Document Number

A4

RESERVED

Date: Wednesday, February 03, 2010

5

Rev

Berry IO Board
Sheet

X02
11

of
1

12

<Core Design>

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

Change List
Size

A3
Date:
5

Document Number

Rev

Berry IO Board
Friday, December 25, 2009

Sheet
1

X02
12

of

12