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com

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Inputs Combinational Circuit Memory elements

Outputs

Block diagram of a Sequential Logic Circuit

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1 0 1 0
S
1 0 0 0 1

R (reset)

Q
(a) !o"ic #ia"ram

S (set)
R
0 0 1 0 1

2
Q
0 0 1 1 0

Q
1 1 0 0 0

(after S=1 R=0) (after S=0 R=1)

(b) $rut% $able

Basic flip-flop circuit with NOR gates (As nchronous Sequential Circuits!
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1 0

S (set)

Q
(a) !o"ic #ia"ram

1 0
S
1 1 0 1 0

R (reset)
R
0 1 1 1 0

Q
0 0 1 1 1

Q
1 1 0 0 1 (after S=0 R=1) (after S=1 R=0)

(b) $rut% $able

Basic flip-flop circuit with NAN" gates (As nchronous Sequential Circuits! www.jntuworld.com

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R C* S

Q S
1

R Q(t+1)
0 1 0 1 0 1 0 1 0 0 1

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0 0 0 0 1

0 0 1 1 0 0 1 1

Indeterminate 1 0 1 indeterminate

1 (a) !o"ic &ia"ram

1 1 1

Q R

Q S

Q 0 1

SR 00

(c) C%aracteristic table S 01 11 10

X 1
R

1 1
Q(t'1) = S'RQ SR = 0

C*
(b) (rap%ical Symbol

Clocked RS flip-flop www.jntuworld.com

(&) C%aracteristic e)uation

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# C*
-

S
+ 1

(a) !o"ic &ia"ram .it% /0/# "ates

Q Q #

Q D Q(t+1)
0 0 1 1 0 1 0 1 0 1 0 1

Q 0 1

1 1
Q(t'1) = #

C*
(b) (rap%ical Symbol

(c) C%aracteristic table

(&) C%aracteristic e)uation

Clocked D flip-flop www.jntuworld.com

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1 C* 2
(a) !o"ic &ia"ram Q 1 Q 2

Clocked JK flip-flop

Q J K Q(t+1)
0 0 0 0 0 1 0 1 1 0 1 0 0 1 0 1 0 1 0 1 0 0 1 1 1 0 1 0

Q 0 1

21 00

2 01 11 10

1 1
1

1 1

(b) (rap%ical Symbol

C*

1 1 1 1

Q(t'1) = 2Q'1Q

(c) C%aracteristic table

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(&) C%aracteristic e)uation

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$ C*

Clocked T flip-flop

Q
(a) !o"ic &ia"ram Q Q $

Q T Q(t+1)
0 0 1 1 0 1 0 1 0 1 1 0

Q
0 1

$ 0

1 1
Q(t'1) = $Q'$Q

(b) (rap%ical Symbol

C*

(c) C%aracteristic table

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(&) C%aracteristic e)uation

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#ositi$e #ulse

Negati$e #ulse

#ositi$eedge

Negati$eedge

Negati$eedge

#ositi$eedge

"efinition of clock pulse transition

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S Master

S Sla3e

C* M0S$4R5S!064 7!I*57!O*

!o"ic &ia"ram of master5sla3e flip5flop

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C* S S=1 R=0 S=0 R=1

8 Q

$imin" relations%ips in a master5sla3e flip5flop

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8
:

1 C*

<

Cloc=e& master5sla3e 21 flip5flop

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S R Q Q
1 0 1 1 1 0 0 1 0 1 1 0 1 0 1 1

1 0 1 0

(/C) (/C)

Q Q
> S=R=1 for stea&y state 3alues ?%en S=1 @ R=0 A Q=0 ?%en S=0 @ R=1 A Q=1

C*
+

> >

#5type positi3e5e&"e5tri""ere& flip5flop

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0 1 S C*=0

1 1 S

C*=0
+

R #=1

#=0

/o C%an"e at t%e outputs of t%e flip flop .%et%er # = 0 or 1

So Q = 0 @ Q = 1

(a) ?it% C* = 0

Operation of the D-type edge-triggered flip-flop

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0 1 S C*=1

1 0 S

C*=1
+

R #=1

#=0

So Q = 0 @ Q = 1

So Q = 1 @ Q = 0

(b) ?it% C* = 1

Operation of the D-type edge-triggered flip-flop

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#irect Inputs 0sync%ronous 7unction $able Inputs Outputs Clear Cloc= 2 1 Q Q 0 1 1 1 1 B B 0 0 1 1 B 0 1 0 1 0 1 /o C%an"e 0 1 1 0 $o""le

Clear

Q 1

Q 2

C*

21 flip5flop .it% &irect clear

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B 0 C

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B 0 B 0 B C B C

C*
R Q

Input = B (4Bternal) Output = y Cloc=e& RS flip5flop

C C

0 0

4Bample of cloc=e& se)uential circuit (0nalysis)

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State table for circuit *resent State 0C 00 01 10 11 /eBt State B=0 B=1 0C 0C 00 01 11 01 10 00 10 11 Output B=0 B=1 y y 0 0 0 0 0 1 0 0

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0D0 00 1D0 01 0D0 0D0 11 1D0 1D0 1D1 0D0 10

State &ia"ram for t%e circuit

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Q(t'1) = S' RQ SR=0

CB 0 0 0 1 00 01 11

C 10 0 0 0 1

CB 00 01 11

C 10

1 1
B 0(t'1) = CB'(C'B)0 (a! 0(t'1) % B&' ( (B'&!' A 0(t'1) = S' R0

1 1
B

C(t'1) = 0B'(0'B)C ()! C(t'1) % A'& ( (A&'!' B C(t'1) = S' RC

State e)uations for flip5flops 0 an& C

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0nalysis of cloc=e& se)uential circuit

S0 = C B RC = 0B 0CB R0 = CB SC = 0B y=

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B 0 C

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B 0 B 0 B C B C

C*
R Q

Input = B (4Bternal) Output = y Cloc=e& RS flip5flop

C C

0 0

Cloc=e& se)uential circuit

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C y C C B C C B

C*

0 0

20 = CCB ' CCB an& 10 = C'y Implementation of t%e flip5flop input functions
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$%e problem of state5 re&uction is to fin& .ays of re&ucin" t%e number of states in a se)uential circuit .it%out alterin" t%e input5 output relations%ipsE 0D0

0D0

0D0

minimiFes t%e cost of circuit by re&ucin" flip5 flops @ "atesE

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a
1D0

0D0 0D0 1D0 1D0

Consi&er t%e input se)uence 01010110100 startin" from present state aE

c
0D0

?e are intereste& only in output se)uences cause& by input se)uencesEE

& "
0D0 1D1 1D1

f
1D1

1D1

State &ia"ram
& 0 0 e 1 1 f 1 1 f 0 0 " 1 1 f 0 0 " 0 0 a

*resent State Input 6alue Output 6alue

a 0 0

a 1 0

b 0 0

c 1 0

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State *a)le *resent State a b c d e f g /eBt State B=0 B=1 a b c d a d e a g a f f f f

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Output B=0 B=1 0 0 0 0 0 0 0 0 0 0 1 1 1 1

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Reducing the State *a)le

Ne&t State Output &%, b d d f f &%+ + + + &%+ a c a e a g a

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#resent State a b c d e f g

&%, + + + , , , ,

d d

+ + + +

f f

State Input Output

a 0 0

a 1 0

b 0 0

c 1 0

& 0 0

e 1 1

& 1 1

& 0 0

e 1 1

& 0 0

e 0 0

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Reduced State *a)le *resent State a b c d e /eBt State B=0 B=1 a b c d a d e d a d Output B=0 B=1 0 0 0 0 0 0 0 1 0 1

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0D0 0D0
101 e

001 a

1D0
010 b

0D0 0D0 1D0

011 c

m flip5flops can represent up to 2m &istinct states (iEeE if m=+ ; states =G 0005 111) 7or fi3e states + flip5 flops are re)uire&E 7e.er states &o not "uarantee a sa3in" in t%e number of flip5flops or number of "atesE

1D1

1D0 0D0
100 &

1D1

Re&uce& State &ia"ram

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*hree possi)le )inar state assignments State a b c & e 0ssi"nment 1 001 010 011 100 101 0ssi"nment2 000 010 011 101 111 0ssi"nment+ 000 100 010 101 011

Reduced State *a)le with )inar assignment , /eBt State Output *resent State B=0 B=1 B=0 B=1 001 001 010 0 0 010 011 100 0 0 011 001 100 0 0 100 101 100 0 1 101 001 100 0 1
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-lip-flop characteristic ta)les

R 0 1 0 1 (a) RS Q(t'1) Q(t) /C 0 1 H 2 0 0 1 1 1 0 1 0 1 (b) 21 $ 0 1
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S 0 0 1 1

Q(t'1) Q(t) /C 0 1 Q(t)

# 0 1

Q(t'1) 0 1 (c) #

Q(t'1) Q(t) /C Q(t) (&) $

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-lip-flop e&citation ta)les

Q(t) 0 0 1 1 Q(t'1) 0 1 0 1 S 0 1 0 I R I 0 1 0 Q(t) 0 0 1 1 Q(t'1) 0 1 0 1 2 0 1 I I 1 I I 1 0

(a) RS
Q(t) 0 0 1 1 Q(t'1) 0 1 0 1 # 0 1 0 1 Q(t) 0 0 1 1

(b) 21
Q(t'1) 0 1 0 1 $ 0 1 1 0

(c) #

(&) $
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#esi"n *roce&ure for Se)uential !o"ic Circuits

1E 2E +E ,E -E 9E :E ;E <E $%e .or& &escription of t%e circuits be%a3ior is state&E $%is may be accompanie& by a state &ia"ram a timin" &ia"ram or ot%er pertinent informationE 7rom t%e "i3en information about t%e circuit obtain t%e state tableE $%e number of states may be re&uce& by state re&uction met%o&s if t%e se)uential circuit can be c%aracteriFe& by input5output relations%ips in&epen&ent of t%e number of statesE 0ssi"n binary 3alues to eac% state if t%e state table obtaine& in step 2 or + contains letter symbolsE #etermine t%e number of flip5flops nee&e& an& assi"n a letter symbol to eac%E C%oose t%e type of flip5flop to be use&E 7rom t%e state table &eri3e t%e circuit eBcitation an& output tablesE Jsin" t%e 15Map or any ot%er simplification met%o& &eri3e t%e circuit output functions an& t%e flip5flop input functionsE #ra. t%e lo"ic &ia"ramE

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"esign the clocked sequential circuit using ./ flip-flops from the gi$en state diagram0

0 00 1 1 10 0 1 11 0

01

State &ia"ram
/eBt State *resent State 0 0 0 1 1 C 0 1 0 1 0 0 1 1 1 B=0

State *a)le
Output B=1 C 0 0 0 1
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0 0 0 1 0

C 1 1 1 0

www.jntuworld.com 3(t! + + , , 3(t(,! + , + ,

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4&citation ta)le
1nputs of Com)inational Circuit #resent state A + + + + , , , , B + + , , + + , , 1nput & + , + , + , + , A + + , + , , , + B + , + , + , , + .A + + , + 2 2 2 2 Ne&t state /A 2 2 2 2 + + + ,

Outputs of Com)inational circuit -lip-flop inputs .B + , 2 2 + , 2 2 /B 2 2 , + 2 2 + ,

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0 Q 1

0 Q 2 Q 1

C Q 2 C*

10 0 0 C C

20

1C

2C 4Bternal outputs (none)

Combinational Circuit
B 4Bternal Inputs

Cloc= &ia"ram of se)uential circuit

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CB 0 0 0 1 00 01 11

C 10

CB

C 01 11 10

1 X X
B

0 0 1

00

X 1

20 = CB
CB 0 0 1 00 01 11 C 10 CB 0 0 1 00

10 = CB
C 01 11 10

1 1 2C = B

X X

X X

X X

X X 1

1C = 0 E I = 0B ' 0B

Maps for combinational circuit

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0 C
Q 1 20 = CB 10 = CB 2C = B 1C = 0 Q 2 Q 1 Q 2

C*
B

B !o"ic &ia"ram of Se)uential !o"ic Circuit

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35 "esign a sequential circuit using state ta)le with assignment , emplo ing RS flip-flops0

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4&citation ta)le
#resent state
A + + + + + + , , , , B + + , , , , + + + + C , , + + , , + + , ,

1nput
& + , + , + , + , + ,

Ne&t State
A + + + , + , , , + , B + , , + + + + + + + C , + , + , + , + , + SA + + + , + , 2 2 + 2

-lip-flop 1nputs
RA 2 2 2 + 2 + + + , + SB + , 2 + + + + + + + RB 2 + + , , , 2 2 2 2 SC 2 + , + 2 + , + 2 + RC + , + 2 + , + 2 + ,

Output
+ + + + + + + , + ,

3(t! 0 0 1 1

3(t(,! 0 1 0 1

S 0 1 0 I

R I 0 1 0

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CB 0C 00 00 x 01 0 11 10 01 11

C 10

CB 0C 00 00 x 01 01 11

x 1 1 x x x x x

x x

x x

CB 10 0C 00 x 00 x

01

11

10

x x

1 x x

x x

x x

01 11

x x

x x

11 10

1 10
R0=CB CB 10 0C 00 SC=0CB CB 10 0C 00 01 11 10

S0=CB

CB 0C 00 01 11 10 0C 00 01 11 00 x x x x x 01 1 1 1 1 11 x 10 x

01 11

x x x x

x x

x x x x

1 1 x 1 x

x x

x x 1
y=0B

x x

x x

x x

x 1

x
SC=B

x 1

RC=CC'CB

RC=B

Maps for simplifyin" t%e se)uential circuit

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Logic diagram

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y S B Q 0 0

R Q

Q C

R Q

R Q C* S0 = CB R0 = CB SC = 0CB RC = CC ' CB SC = B RC =B @ y = 0B
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4&ample5 Anal se the sequential circuit and determine the effect of unused states0
Jnuse& states
A B C X

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0D0
001

0D0 0D0 1D0 0D0 1D0 1D1 1D1 1D1

010 000

000 110 111

0 0 1 1 1 1

0 0 0 0 0 1 1 0 0 1 0 1 1 1 0 1 1 1

0D0 1D1

0D0
011

1D0

101

$%e circuit is self5startin" an& self5correctin" since it e3entually "oes to a 3ali& state from .%ic% it continues to operate as re)uire&E

1D0 0D0
100

110

0D0
111

State &ia"ram of t%e circuit

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000 001 111

010

110

011 100

101

State diagram of a 6 )it )inar counter

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4&citation ta)le for a 6-)it )inar counter

Count se)uence 02 0 0 0 0 1 1 1 1 A1A0 00 A2 0 A2 1 00 $02 = 0100 01 0 0 1 1 0 0 1 1 01 11
1 1

7lip5flop inputs $02 0 0 0 1 0 0 0 1 A1A0 00 A2 0 1 $01 0 1 0 1 0 1 0 1 $00 1 1 1 1 1 1 1 1 A1A0 00 A2 0 1 1 1

Q(t) 0 0 1 1 Q(t+1) 0 1 0 1 T 0 1 1 0

00 0 1 0 1 0 1 0 1 01 10

01
1 1

11
1 1

10

01
1 1

11
1 1

10
1 1

$01 = 00

$00 = 1

7aps forwww.jntuworld.com a 6-)it )inar counter

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!o"ic &ia"ram 0f a +5bit binary counter

02
Q $

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01
Q $

00
Q $

C#
1

$02 = 0100 $01 = 00 $00 = 1

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Q: Desi n a !"#nter t$at !"#nts a re%eated se&#en!e as s$"'n (e)"' #sin JK *)i%+*)"%
Countin" Se)uence A 0 1 2 , - an& 9

#ont care 011

Count sequence 0 C C 0 0 0 1 : 0 0 1 0 0 1 0 1 0 0 1 0 20 0 0 1 I I I 10 I I I 0 0 1 -lip-flop inputs 2C 0 1 I 0 1 I 1C I I 1 I I 1 2C 1 I 0 1 I 0 1C I 1 I I 1 I

111 4&citation ta)le Q(t)

0 0 1 1

Q(t'1)
0 1 0 1

2
0 1 I I

1
I I 1 0

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#ont careA 011 @ 111 01 11 10 0 0 1 CC 00 01 11

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0 0 1

CC 00

10

B B
CC 00

1 B
20 = C 10

B B

B 1
10 = C 10

B
01

B
11

0 0 1

1 1
CC 00 01

B B
11

B B
2C = C 10

0 0 1

CC 00

01

11

B B
CC 00

B B
01

B B
11

1 1
1C = 1 10

0 0 1

1 1

B B

B B
2C = C

0 0 1

B B

1 1

B B

B B
1C = 1

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0 C Q 1 Q 2 Q 1

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Q 2

Q 1

Q 2

(a! Logic "iagram of Counter

Count *ulses

000

111

Jnuse& states 011 111

001

110

Jsin" 15maps 20 = C 10 = C 2C = C 1C = 1 2C = C 1C = 1

010

101

()! Logic "iagram of Counter

011 Counter is self5startin"

100
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#esi"n .it% State 4)uation

?it% # 7lip 7lops C%aracteristic e)uation Q(t'1) = # 4&ample 8 ,5 State e)uations from t%e "i3en table areA 0(t'1) = #0(0 C B) = K (2 , - 9) C(t'1) = #C(0 C B) = K (1 + - 9) *resent State 0
0 0 0 0 1 1 1 1

Input B
0 1 0 1 0 1 0 1

/eBt State 0
0 0 1 0 1 1 1 0

C
0 0 1 1 0 0 1 1

C
0 1 0 1 0 1 1 0

#0 = 0C ' CB #C = 0B ' CB '0CB

Bx 00 0 1
1

01
1

11

10
1 1

A 0 1

Bx 00

01
1 1

11
1

10
1

Q 0 0 1 1

Qt 0 1 0 1

D 0 1 0 1

#0 = 0C ' CB

#C = 0B ' CB '0CB
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# B

0 0

C C

#0 = 0C ' CB #C = 0B ' CB '0CB

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C*

Logic diagram

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4&ample 8 9 A #esi"n a se)uential Circuit as per "i3en con&itions usin" # flip flopsA5 0(t'1) = C ' # C(t'1) = 0 C(t'1) = C #(t'1) = C So #0 = C ' # #C = 0 #C = C ## = C

Q #

Q #

Q #

Q #

C*

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Example # 3:- Desi n a Se&#entia) Cir!#it 'it$ JK *)i%+*)"%s t" satis*, t$e i-en e&#ati"ns:+
State Equations [Characteristic equation of JK flip-flops = Q(t !" = (J" Q# ($#" Q %

A(t+1) . ABCD + ABC + ACD + ACD B(t+1) . AC + CD + ABC C(t+1) . B D(t+1) . D A) e(rai! mani%#)ati"ns *"r mat!$in !$ara!teristi! e&#ati"n "* JK *)i%+ *)"%s: A(t+1) . (BCD + BC) A + (CD + CD)A . (J)A + (K) A J . BCD + BC . BC ++++++++++++(i) (K) . (CD +CD) . CD + CD++++++(ii) B(t+1) . (AC +CD) + (AC)B B(t+1) . (AC + CD)(B+B) + (AC)B . (AC + CD) B + (AC + CD + AC) B . (J)B + (K) B J . AC + CD +++++++++++++(iii) (K) . (AC + CD + AC) . AC + AD ++++++++++ (i-)
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C(t'1) = C = C(C ' C) = CC ' CC = (2) C ' (1) C 2 = C 5555555555(3) (1) = C 5555555(3i) #(t'1) = # = 1E# ' 0E# = (2) # ' (1) # 2 = 1 = 1 2 = 15555555555(3ii) (1) = (O) = (1) = 155555555555(3iii) 20 = CC 5555555555(i) 10 = C# ' C#55555555555(ii) 2C = 0C ' C# 55555555(iii) 1C = 0C ' 0# 5555555(i3) 2C = C 555555555(3) 1C = C 5555555555(3i) 2# = 1 5555555555(3ii) 1# = 1 555555555555(3iii)

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