HP Pavilion DV4000 Leopard2 0711 05202

A B C D E
SYSTEM DC/DC
CLK GEN
3 Leopard2 Block Diagram Project code: 91.4C701.001
PCB P/N : 48.4C701.011
42
INPUTS
TPS5130
OUTPUTS
ICS954206 4,5
REVISION : 05202 -1 1D8V_S3
Mobile CPU DCBATOUT 5V_S3

3V_AUX
4 Dothan 4
31 DDRII*2 11,12 SYSTEM DC/DC

1394 45 MAX8743
Conn
INPUTS OUTPUTS
Host BUS DDR-SDRAM16,17
27,28 400/533MHz HY5DS573222F-28 1D05V_S0
29 28 DCBATOUT
PCMCIA Power PCI 7411 1D2V_VGA_S0
6,7,8,9,10 19
1 SLOT Switch 13,14,15 LVDS LCD
TPS2220A CARDBUS
1394 Alviso VGA MAXIM CHARGER
SD/MS 29 SD/MS/MMC/SM
18
6 in 1 SVIDEO/COMP TVOUT 40 MAX8725
Card Slost
PEG ATI M26P
INPUTS OUTPUTS
RGB CRT CRT BT+
3
DMI I/F 18V 4.0A 3
34 100MHz DCBATOUT
Mini-PCI DAUGHTER BOARD 5V 100mA
802.11a/b/g BLUE THUMB
21,22,23,24
31 30,31 USB 2.0 USB x 2 CPU DC/DC

RJ45 USB x 2 35 41
10/100 RTL8100C PCI BUS
MAX1907
CONN
26 INPUTS OUTPUTS
P EIDE HDD
ICH6-M VCC_CORE
35
31 DCBATOUT
RJ11 MODEM AC97-LINK DVD/ 26 0.844~1.3V
MDC Card S EIDE 27A
CONN CD-RW
26
PCI EXPRESS/ USB2.0
2 MIC IN18 31
EXPRESSCARD
PCB LAYER 2
AC'97 CODEC
AD1981B LPC Bus
L1: Signal 1
L2: GND
LINE OUT L3: Signal 2

33 36 LPC 38 26
OP AMP 18 KBC Power
G1420B
Docking NS97551
Debug
Switch
L4: Signal 3
Conn TPS2231
L5: VCC
DAUGHTER BOARD
L6: Signal 4
L7: GND
35 37 37 25 38
Comsumer Touch Int. Thermal FlashRom
L8: Signal 5
IR Pad KB & Fan 4Mb
G768D (512kB)
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Block Diagram
Size Document Number Rev
A3 -1
Leopard2
Date: Monday, July 11, 2005 Sheet 1 of 47
A B C D E
A B C D E
ICH6-M Integrated Pull-up

and Pull-down Resistors ICH6-M EDS 14308 0.8V1
Power name description
5V_S0= 5 Voltage power up on system work(S0 state)
ACZ_BIT_CLK, DPRSLP#, EE_DIN,
5V_S3= 5 Voltage suspend to RAM(S3 state)
EE_DOUT, EE_CS, GNT[5]#/GPO[17],
ICH6 internal 20K pull-ups 5V_S5= 5 Voltage soft off(S5 state)
4 GNT[6]#/GPO[16], LDRQ[1]/GPI[41], 4
3D3V_S0= 3.3 Voltage power up on system work(S0 state)
LAD[3:0]#/FB[3:0]#, LDRQ[0],
3D3V_S3= 3.3 Voltage suspend to RAM(S3 state)
PME#, PWRBTN#, TP[3]
3D3V_S5= 3.3 Voltage soft off(S5 state)
LAN_RXD[2:0] ICH6 internal 10K pull-ups LVDDR_2D8V= 2.8 Voltage power up on system work(S0 state)
1D8V_S3= 1.8 Voltage suspend to RAM(S3 state)
ACZ_RST#, ACZ_SDIN[2:0], ACZ_SYNC, ICH6 internal 20K pull-downs
ACZ_SDOUT,ACZ_BITCLK, DPRSLPVR,
SPKR
VCC_CORE_S0= CPU VID Voltage power up on system work(S0 state)
USB[7:0][P,N] ICH6 internal 15K pull-downs 1D5V_VCCA_S0= 1.5 Voltage power up on system work(S0 state)
DD[7], SDDREQ ICH6 internal 11.5K pull-downs
1D5V_S5= 1.5 Voltage soft off(S5 state)
LAN_CLK ICH6 internal 100K pull-downs DDR_VREF= 0.9 Voltage power up on system work(S0 state)
1D2V_VGA_S0= 1.2 Voltage power up on system work(S0 state) for VGA
VRAM_VDDQ= 1.8 Voltage power up on system work(S0 state) for VRAM
3 3
ICH6-M IDE Integrated Series CORE_GMCH_S0= 1.05 Voltage power up on system work(S0 state) for ALVISO core power
Termination Resistors VCCP_GMCH_S0= 1.05 Voltage power up on system work(S0 state)for ALVISO BUSIO power
DD[15:0], DIOW#, DIOR#, DREQ,
approximately 33 ohm
DDACK#, IORDY, DA[2:0], DCS1#,
DCS3#, IDEIRQ
PCI RESOURCE TABLE

2 2
DEVICE IDSEL PCI IRQ REQ# / GNT#
Mini-PCI AD21 P_INTE# REQ0#/GNT0#
(CARBUS)P_INTG#
Cardbus Controller (1394)P_INTF#
AD22 (CARD READER)P_INTG# REQ1#/GNT1#
TI7411
LAN AD23 P_INTE# REQ2#/GNT2#
Blue Thumb AD24
1 <Core Design> 1
Wistron Corporation
Title
ITP
A3
Leopard2 -1
Date: Wednesday, July 06, 2005 Sheet 2 of 47
A B C D E
A B C D E
3D3V_S0 3D3V_S0
L17
1 2 3D3V_APWR_S0 1 2 3D3V_48MPWR_S0
MLB-201209-11 R196 4D7R3
1
3D3V_S0
C199 C524 C218 C219
SC4D7U10V5ZY SCD1U16V SC4D7U10V5ZY SCD1U16V
1
DY DY R200
10KR2
DummyR200(up side),Mounting R221(down side)
2
4
3D3V_S0 ITP_EN --SRC7 on 4
L38
1 2 3D3V_CLKGEN_S0
1
MLB-201209-11
1
R221 Mounting R200(up side),DummyR221(down side)
C519 C532 C523 C538 C543 C525 C518 C539 10KR2
SC10U10V6ZY-U SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
DY --CPU2_ITP on
2
2
DY DY DY
2
3D3V_S0
25,41 CLK_PWRGD#
3D3V_APWR_S0
1
3D3V_48MPWR_S0 R590
1 2 CLK_XOUT 10KR2
C544 SC22P 3D3V_CLKGEN_S0
2 X7 CLK_XIN
2
H/L: 100/96MHz
U72
X-14D31818M-17 SS_SEL
49
50
10
34
28
21
42
37
11
48
1
7
1
1 2
1
C545 SC22P RN22
VDDPCI
VDDPCI
VDDA
VDDREF
X2
X1
VTT_PWRGD#/PD
VDD48
VDDSRC
VDDSRC
VDDSRC
VDDCPU
CLK_CPUT1 1 4 R591
CLK_MCH_BCLK 6 10KR2
CLK_CPUC1 2 3 CLK_MCH_BCLK# 6
RN20 DY
4 1 CLK_SRCC1 SRN33-2-U2
26 CLK_PCIE_NEW# PM_STPCPU# 22,41
2
3 3 2 CLK_SRCT1 3
26 CLK_PCIE_NEW
20 54 RN24
SRN33-2-U2 SRCCLKC1 CPU_STOP# CLK_CPUC2
23 43 2 3 CLK_XDP_CPU# 4
RN18 25
SRCCLKC2 CPUCLKC0
40 CLK_CPUT2 1 DY 4
SRCCLKC3 CPUCLKC1 CLK_XDP_CPU 4
4 1 CLK_SRCC3 27 35
7 CLK_MCH_3GPLL# SRCCLKC4_SATA CPUCLKC2_ITP/SRCCLKC7
3 2 CLK_SRCT3 30 SRN33-2-U2
7 CLK_MCH_3GPLL SRCCLKC5
32 44 RN25
SRN33-2-U2 SRCCLKC6 CPUCLKT0 CLK_CPUT0 DREFCLK
CPUCLKT1 41 1 4 CLK_CPU_BCLK 4 1 2
RN19 19 36 CLK_CPUC0 2 3 R202 49D9R2F
SRCCLKT1 CPUCLKT2_ITP/SRCCLKT7 CLK_CPU_BCLK# 4
4 1 CLK_SRCC5 22 SRN33-2-U2 DREFCLK# 1 2
22 CLK_PCIE_ICH# SRCCLKT2 49D9R2F
3 2 CLK_SRCT5 24 12 FS_A R592 1 2 10R2 R198
22 CLK_PCIE_ICH SRCCLKT3 FSLA/USB_48MHZ CLK48_USB 22
26 16 R593 1 2 33R2 CLK_PCIE_NEW 1 2
SRCCLKT4_SATA FSLB/TEST_MODE CLK48_CARDBUS 27
SEL100_96MHZ#/PCICLK_F1
SB SRN33-2-U2 31 SC R582 49D9R2F
SRCCLKT5 CPU_SEL1 4,7
TPAD30 TP31 TP_SRCC6 2 DY 0R2-0
1 CLK_SRCT6 33 18 CLK_SRCC0 RN23 CLK_PCIE_NEW# 1 2
TPAD30 TP30 TP_SRCT6 R584 2 CLK_SRCC6 SRCCLKT6 96MHZ_SSC/SRCCLKC0 CLK_SRCT0 R580 49D9R2F
1 96MHZ_SST/SRCCLKT0 17 1 4 DREFSSCLK# 7
R568 DY 0R2-0 CLK_REF14 52 2 3 CLK_XDP_CPU 1 DY 49D9R2F
2
26 PREQ2# REF0 DREFSSCLK 7
ITP_EN/PCICLK_F0
1 2 53 15 DOT96C R603
22 CLK_ICH14 22R2 REF1/FSLC/TEST_SEL DOTC_96MHZ
R602 1 2 46
PCI/SRC_STOP#
14 DOT96T SRN33-2-U2 CLK_XDP_CPU# 1 DY 49D9R2F
2
32 CLK_CODEC 22R2 SCLK DOTT_96MHZ
R601 47 R199 2 133R2 R594
SDATA DREFCLK# 7
2 1 R201 2 133R2 CLK_CPU_BCLK 1 2
4,7 CPU_SEL0 2K2R2 DREFCLK 7 49D9R2F
R222 R596
PCICLK5
PCICLK4
PCICLK3
PCICLK2
CLK_CPU_BCLK# 1 2
11,24 SMBC_ICH
GNDA
R595 49D9R2F
IREF
GND
GND
GND
GND
GND
GND
11,24 SMBD_ICH
CLK_MCH_BCLK 1 2
RN21 R585 49D9R2F
4 1 CLK_SRCC2 CLK_MCH_BCLK# 1 2
13 CLK_PCIE_PEG#
51
45
29
13
6
2
38
9
55
8
5
4
3
56
39
3 2 CLK_SRCT2 ICS954206AG R586 49D9R2F

13 CLK_PCIE_PEG
SRN33-2-U2
2 CLK_IREF 2 2
1
475R2F R181
1 2 SS_SEL REQSEL
ICS954206AG Spread DREFSSCLK 1
R194
2
49D9R2F
36 PCLK_KBC 22R2
R589 CLK_PCI3 DREFSSCLK#
22 PM_STPPCI#
CLK_PCI4
CLK_PCI5
2
33R2
2
33R2
1
1R600
PCLK_PCM 27
PCLK_LAN 30
Spectrum Select 1
R195
2
49D9R2F
2 1R218 PCLK_MINI 34
CLK_MCH_3GPLL 1 2
1 2 ITP_EN 33R2 R219 R566 49D9R2F
22 CLK_ICHPCI 33R2
R220 SS3 SS2 SS1 SS0 Spread Amount% CLK_MCH_3GPLL# 1 2
R567 49D9R2F
0 0 0 0 -0.8 CLK_PCIE_PEG 1 2
R581 49D9R2F
0 0 0 1 -1.0 CLK_PCIE_PEG# 1 2
R583 49D9R2F
0 0 1 0 -1.25 CLK_PCIE_ICH 1 2
R569 49D9R2F
0 0 1 1 -1.5 CLK_PCIE_ICH# 1 2
3D3V_S0
NEAR CLKGEN R570 49D9R2F
0 1 0 0 -1.75
0 1 0 1 -2.0
CLK_CPU_BCLK TP33
TPAD30 0 1 1 0 -2.5
CLK_CPU_BCLK# TP32
1
3D3V_CLKGEN_S0 TPAD30 0 1 1 1 -3.0

R606 close to CPU
10KR2 1 2 FS_A 1 0 0 0 +-0.3
R197 10KR2
<Core Design>
1 1 0 0 1 +-0.4 1
2
REQSEL 1 0 1 0 +-0.5
FS_C FS_B FS_A CPU Wistron Corporation
1
1 0 1 1 +-0.6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

R605 0 0 0 266M Taipei Hsien 221, Taiwan, R.O.C.
DUMMY-R2 0 0 1 133M 1 1 0 0 +-0.8
0 1 0 200M Title
0 1 1 166M
1 0 0 333M
1 1 0 1 +-1.0 Clock Generator (ICS954206AG )
2
1 0 1 100M 1 1 1 0 +-1.25 Size Document Number Rev

1
1
1
1
0
1
400M
Reserved 1 1 1 1 +-1.5
A3
Leopard2 -1
A B C D E
A B C D E
ADDR GROUP 0
6 H_A#[31..3]
U53A 62.10055.011
PZ47903 VCCP_GMCH_S0
4 H_A#3 P4 N2 4
A3# ADS# H_ADS# 6
H_A#4 U4 L1
A4# BNR# H_BNR# 6
H_A#5 V3 J3
A5# BPRI# H_BPRI# 6
1
H_A#6 R3
H_A#7 A6# R396
V2 A7# DEFER# L4 H_DEFER# 6
H_A#8 W1 H2 56R2J
A8# DRDY# H_DRDY# 6
H_A#9 T4 M2
A9# DBSY# H_DBSY# 6
H_A#10 W2
2
H_A#11 A10# Place testpoint on
Y4 A11# BR0# N4 H_BREQ#0 6
H_A#12 Y1 H_IERR# with a GND
CONTROL
H_A#13 A12# H_IERR# 0.1" away
U1 A13# IERR# A4
H_A#14 AA3 B5
A14# INIT# H_INIT# 21
H_A#15 Y3
H_A#16 A15#
AA2 A16# LOCK# J2 H_LOCK# 6
6 H_ADSTB#0 U3 ADSTB#0 H_CPURST# 6
6 H_REQ#[4..0] RESET# B11 H_RS#[2..0] 6
H_REQ#0 R2 H1 H_RS#0
H_REQ#1 P3 REQ0# RS0# H_RS#1 U53B
REQ1# RS1# K1 H_D#[63..0] 6
H_REQ#2 T2 L2 H_RS#2 PZ47903
H_REQ#3 P1 REQ2# RS2# H_D#0 62.10055.011 H_D#32
REQ3# TRDY# M3 H_TRDY# 6 A19 D0# D32# Y26
H_REQ#4 T1 H_D#1 A25 AA24 H_D#33
REQ4# VCCP_GMCH_S0 H_D#2 D1# D33# H_D#34
K3 H_HIT# 6 A22 T25
XTP/ITP SIGNALS
H_A#17 HIT# H_D#3 D2# D34# H_D#35
AF4 K4 B21 U23
DATA GRP 0
DATA GRP 2
A17# HITM# H_HITM# 6 D3# D35#
H_A#18 AC4 H_D#4 A24 V23 H_D#36
A18# D4# D36#
1
H_A#19 AC7 C8 H_D#5 B26 R24 H_D#37
ADDR GROUP 1
H_A#20 A19# BPM#0 R393 H_D#6 D5# D37# H_D#38
AC3 A20# BPM#1 B8 A21 D6# D38# R26
H_A#21 AD3 A9 56R2J H_D#7 B20 R23 H_D#39
H_A#22 A21# BPM#2 VCC_CORE_S0 H_D#8 D7# D39# H_D#40
AE4 A22# BPM#3 C9 C20 D8# D40# AA23
H_A#23 AD2 A10 H_D#9 B24 U26 H_D#41
2
3 H_A#24 A23# PRDY# XDP_BPM#5 H_D#10 D9# D41# H_D#42 3
AB4 A24# PREQ# B10 D24 D10# D42# V24
1
H_A#25 AC6 A13 XDP_TCK H_D#11 E24 U25 H_D#43
H_A#26 A25# TCK XDP_TDI R27 H_D#12 D11# D43# H_D#44
AD5 A26# TDI C12 C26 D12# D44# V26
H_A#27 AE2 A12 XDP_TDO 150R2 H_D#13 B23 Y23 H_D#45
H_A#28 A27# TDO XDP_TMS H_D#14 D13# D45# H_D#46
AD6 A28# TMS C11 E23 D14# D46# AA26
H_A#29 AF3 B13 XDP_TRST# H_D#15 C25 Y25 H_D#47
2
H_A#30 A29# TRST# DBR# D15# D47#
AE1 A30# DBR# A7 6 H_DSTBN#0 C23 DSTBN0# DSTBN2# W25 H_DSTBN#2 6
H_A#31 AF1 C22 W24
A31# 6 H_DSTBP#0 DSTBP0# DSTBP2# H_DSTBP#2 6
AE5 B17 CPU_PROCHOT# D25 T24
6 H_ADSTB#1 ADSTB#1 PROCHOT# 6 H_DINV#0 DINV0# DINV2# H_DINV#2 6
B18
HCLK THERM
THERMDA THERMDP1 25
21 H_A20M# C2 A20M# THERMDC A18 THERMDN 25
D3 H_D#16 H23 AB25 H_D#48
21 H_FERR# FERR# PM_THRMTRIP-A# 7,21 D16# D48#
A3 C17 H_D#17 G25 AC23 H_D#49
21 H_IGNNE# IGNNE# THERMTRIP# D17# D49#
H_D#18 L23 AB24 H_D#50
PM_THRMTRIP-I# 7,21 D18# D50#
C6 A15 H_D#19 M26 AC20 H_D#51
DATA GRP 1
DATA GRP 3
21 H_STPCLK# STPCLK# ITP_CLK1 CLK_XDP_CPU# 3 D19# D51#
D1 A16 H_D#20 H24 AC22 H_D#52
21 H_INTR LINT0 ITP_CLK0 CLK_XDP_CPU 3 D20# D52#
D4 B14 H_D#21 F25 AC25 H_D#53
21 H_NMI LINT1 BCLK1 CLK_CPU_BCLK# 3 D21# D53#
B4 B15 H_D#22 G24 AD23 H_D#54
21 H_SMI# SMI# BCLK0 CLK_CPU_BCLK 3 PM_THRMTRIP# D22# D54#
H_D#23 J23 AE22 H_D#55
should connect to H_D#24 D23# D55# H_D#56
M23 D24# D56# AF23
ICH6 and Alviso H_D#25 J25 AD24 H_D#57 Layout Note:
without T-ing H_D#26 D25# D57# H_D#58 Comp0, 2 connect with Zo=27.4 ohm, make
L26 D26# D58# AF20
( No stub) H_D#27 N24 AE21 H_D#59 trace length shorter than 0.5" .
ITP Conn. H_D#28 M25
D27# D59#
AD21 H_D#60 Comp1, 3 connect with Zo=55 ohm, make
CPU H_D#29 H26
D28#
D29#
D60#
D61# AF25 H_D#61 trace length shorter than 0.5" .
H_D#30 N25 AF22 H_D#62
H_D#31 D30# D62# H_D#63
K25 D31# D63# AF26
6 H_DSTBN#1 K24 DSTBN1# DSTBN3# AE24 H_DSTBN#3 6
6 H_DSTBP#1 L24 DSTBP1# DSTBP3# AE25 H_DSTBP#3 6
2 2
6 H_DINV#1 J26 DINV1# DINV3# AD20 H_DINV#3 6
TCK(PIN 5) TP2 PSI# E1 P25 COMP0 R402 1 2 27D4R2F VCCP_GMCH_S0
0R0402-PAD PSI# COMP0 COMP1 R403 54D9R2F
COMP1 P26 1 2
R383 1 2 CPU_SEL0_CPU C16 AB2 COMP2 R35 1 2 27D4R2F
3,7 CPU_SEL0 BSEL0 COMP2
1
R385 1 2 CPU_SEL1_CPU C14 AB1 COMP3 R36 1 2 54D9R2F
3,7 CPU_SEL1 BSEL1 COMP3
0R0402-PAD R395
200R2J
TCK(PIN A13)
MISC G1
DPRSTP# H_DPRSLP# 21
C3 B7 H_DPSLP# 21
2
RSVD2 DPSLP#
AF7 RSVD3 DPWR# C19 H_DPWR# 6
FBO(PIN 11) AC1 RSVD4 PWRGOOD E4 H_PWRGD 21
VCCP_GMCH_S0 E26 A6
RSVD5 SLP# H_CPUSLP# 6,21
1 2 GTLREF AD26 C5 TEST1
R34 1KR2F GTLREF0 TEST1 TEST2
TEST2 F23
VCCP_GMCH_S0 1 Layout Note:
R33 0.5" max length.
2KR2F
1
R29 R392
2
H_CPURST# 2 1 1KR2 1KR2

R391 54D9R2F DY DY
XDP_TDO 2 1 BSEL[1:0] Freq.(MHz)
2
R386 54D9R2F LH 100
CPU_PROCHOT# 2 1 LL 133
R384 56R2J
XDP_TDI 1 2
R387 150R2
1 <Core Design> 1
XDP_TMS 1 2
R389 39D2R2F
XDP_TRST# 1 2
R388 680R2 Wistron Corporation
XDP_TCK 1 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R390 27D4R2F Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (1 of 2)
A3
All place within 2" to CPU Leopard2 -1
A B C D E
A B C D E
U53D PZ47903
62.10055.011
A2 VSS0 VSS97 D13
VCC_CORE_S0 VCC_CORE_S0 A5 D15
U53C VSS1 VSS98
A8 VSS2 VSS99 D17
PZ47903 A11 D19
62.10055.011 VSS3 VSS100
AA11 VCC0 VCC59 G5 A14 VSS4 VSS101 D21
AA13 VCC1 VCC60 H22 A17 VSS5 VSS102 D23
AA15 VCC2 VCC61 H6 A20 VSS6 VSS103 D26
AA17 VCC3 VCC62 J21 A23 VSS7 VSS104 E3
AA19 VCC4 VCC63 J5 A26 VSS8 VSS105 E6
AA21 VCC5 VCC64 K22 AA1 VSS9 VSS106 E8
AA5 VCC6 VCC65 U5 AA4 VSS10 VSS107 E10
4 AA7 V22 1D5V_VCCA_S0 AA6 E12 4
VCC7 VCC66 VSS11 VSS108
AA9 VCC8 VCC67 V6 AA8 VSS12 VSS109 E14
AB10 VCC9 VCC68 W21 AA10 VSS13 VSS110 E16
AB12 VCC10 VCC69 W5 AA12 VSS14 VSS111 E18
1
AB14 VCC11 VCC70 Y22 AA14 VSS15 VSS112 E20
AB16 Y6 C17 C15 AA16 E22
VCC12 VCC71 SCD01U16V2KX SC10U10V6ZY-U VSS16 VSS113
AB18 AA18 E25
2
VCC13 VSS17 VSS114 1D5V_VCCA_S0
AB20 VCC14 VCCA0 F26 AA20 VSS18 VSS115 F1
AB22 B1 TP_VCCA1 TP1 AA22 F4
VCC15 VCCA1 TP_VCCA2 TP3 VSS19 VSS116
AB6 VCC16 VCCA2 N1 AA25 VSS20 VSS117 F5
AB8 AC26 TP_VCCA3 TP20 VCCP_GMCH_S0 AB3 F7 1D5V_VCCA_S0 1D5V_S0
VCC17 VCCA3 VSS21 VSS118
1
AC11 VCC18 AB5 VSS22 VSS119 F9
1
AC13 VCC19 VCCP0 D10 CPU_D10 1 2 AB7 VSS23 VSS120 F11 I max = 120 mA R397
AC15 D12 R394 0R2-0 AB9 F13 3D3V_S0 BC84 12K7R3F
VCC20 VCCP1 VSS24 VSS121 SC22P
AC17 D14 AB11 F15 U52 DY
2
VCC21 VCCP2 VSS25 VSS122
AC19 D16 AB13 F17 DY 1 2
2
VCC22 VCCP3 VSS26 VSS123 1D5V_VCCA_SET R28 0R2-0
AC9 VCC23 VCCP4 E11 AB15 VSS27 VSS124 F19 1 SHDN# SET 5
AD10 VCC24 VCCP5 E13 AB17 VSS28 VSS125 F21 2 GND
AD12 VCC25 VCCP6 E15 AB19 VSS29 VSS126 F24 3 IN OUT 4
AD14 VCC26 VCCP7 F10 AB21 VSS30 VSS127 G2
1
AD16 VCC27 VCCP8 F12 AB23 VSS31 VSS128 G6
1
AD18 F14 AB26 G22 G913C-U DY R398
VCC28 VCCP9 VSS32 VSS129 BC85 BC2 49K9R2F
AD8 VCC29 VCCP10 F16 AC2 VSS33 VSS130 G23
SC1U10V3ZY SC1U10V3ZY
AE11 K6 AC5 G26 DY
2
AE13 L21 AC8 H3 DY DY
2
AE15 VCC32 VCCP13 L5 AC10 VSS36 VSS133 H5
AE17 VCC33 VCCP14 M22 AC12 VSS37 VSS134 H21
AE19 VCC34 VCCP15 M6 AC14 VSS38 VSS135 H25
AE9 VCC35 VCCP16 N21 AC16 VSS39 VSS136 J1 0.1u *10 150u *1
3 AF10 N5 AC18 J4 VCCP_GMCH_S0 3
AF12 VCC37 VCCP18 P22 AC21 VSS41 VSS138 J6
AF14 VCC38 VCCP19 P6 AC24 VSS42 VSS139 J22
AF16 VCC39 VCCP20 R21 AD1 VSS43 VSS140 J24
AF18 VCC40 VCCP21 R5 AD4 VSS44 VSS141 K2
AF8 VCC41 VCCP22 T22 AD7 VSS45 VSS142 K5
1
D18 VCC42 VCCP23 T6 AD9 VSS46 VSS143 K21
D20 U21 AD11 K23 C21 C20 C29 C30 C25 C16 C28 C31 C22 C32 TC1
VCC43 VCCP24 VSS47 VSS144 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
D22 AD13 K26
2
VCC44 VSS48 VSS145 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 ST100U6D3VM-U
D6 VCC45 VCCQ0 P23 AD15 VSS49 VSS146 L3
D8 VCC46 VCCQ1 W4 AD17 VSS50 VSS147 L6
E17 VCC47 AD19 VSS51 VSS148 L22
E19 VCC48 VID0 E2 H_VID0 41 AD22 VSS52 VSS149 L25
E21 VCC49 VID1 F2 H_VID1 41 AD25 VSS53 VSS150 M1
E5 VCC50 VID2 F3 H_VID2 41 AE3 VSS54 VSS151 M4
E7 VCC51 VID3 G3 H_VID3 41 AE6 VSS55 VSS152 M5
E9 VCC52 VID4 G4 H_VID4 41 AE8 VSS56 VSS153 M21
F18 VCC53 VID5 H4 H_VID5 41 AE10 VSS57 VSS154 M24
F20 VCC54 AE12 VSS58 VSS155 N3
F6 AE7 TP_VCCSENSE AE16 N22
VCC56 VCCSENSE VSS60 VSS157
G21 AF6 TP_VSSSENSE AE20 N26
VCC58 VSSSENSE VSS62 VSS159
AE23 VSS63 VSS160 P2
1
AE26 VSS64 VSS161 P5

R40 R39 AF2 P21
54D9R2F 54D9R2F VSS65 VSS162
AF5 VSS66 VSS163 P24
DY DY AF9 VSS67 VSS164 R1
VCC_CORE_S0
AF11 R4
2
2 VSS68 VSS165 2
AF13 VSS69 VSS166 R6
AF19 VSS72 VSS169 T3
AF21 VSS73 VSS170 T5
Layout Note: AF24 T21
VCCSENSE and VSSSENSE lines VSS74 VSS171
B3 VSS75 VSS172 T23
1
should be of equal length. B6 T26 C18 C19 C23 C24 C33 C35 C36 C42 C39 C40 C41 C50 C318 C319 C321 C322 C323 C325 C324 C326
VSS76 VSS173
B9 VSS77 VSS174 U2
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U10V5ZY-L
SC10U10V5ZY-L
SC10U10V5ZY-L
SC10U10V5ZY-L
SC10U10V5ZY-L
SC10U10V5ZY-L
SC10U10V5ZY-L
SC10U10V5ZY-L
SC10U10V5ZY-L
SC10U10V5ZY-L
B12 U6
2
Layout Note: VSS78 VSS175
B16 VSS79 VSS176 U22
Provide a test point (with B19 U24
no stub) to connect a VSS80 VSS177
B22 VSS81 VSS178 V1
differential probe B25 V4
between VCCSENSE and VSS82 VSS179
VSSSENSE at the location
C1 VSS83 VSS180 V5 DY DY DY DY DY DY DY DY DY DY
C4 VSS84 VSS181 V21
where the two 54.9ohm C7 V25
resistors terminate the VSS85 VSS182
C10 VSS86 VSS183 W3
55 ohm transmission line. C13 W6
VSS87 VSS184
C15 VSS88 VSS185 W22
C24 VSS91 VSS188 Y2
D2 VSS92 VSS189 Y5
D5 VSS93 VSS190 Y21
D7 VSS94 VSS191 Y24
D9 VSS95
D11 VSS96
1 <Core Design> 1
Wistron Corporation
Title
CPU (2 of 2)
A3
Leopard2 SC
Date: Sunday, July 03, 2005 Sheet 5 of 47
A B C D E
A B C D E
Trace 10 mil wide with 20 mil spacing

H_XRCOMP H_YRCOMP
1
1
R97 R118
24D9R2F 24D9R2F
2
2
4 4
VCCP_GMCH_S0 VCCP_GMCH_S0 Power On Sequencing

U19A
4 H_D#[63..0] H_A#[31..3] 4 VID
2
2
H_D#0 E4 G9 H_A#3 >3mS
R96 R109 H_D#1 HD0# HA3# H_A#4
E1 HD1# HA4# C9
54D9R2F 54D9R2F H_D#2 F4 E9 H_A#5
H_D#3 HD2# HA5# H_A#6
H7 HD3# HA6# B7 VR_ON
H_D#4 E2 A10 H_A#7
1
H_D#5 HD4# HA7# H_A#8

F1 HD5# HA8# F9
H_XSCOMP H_YSCOMP H_D#6 E3 D8 H_A#9 Vboot Vvid
H_D#7 HD6# HA9# H_A#10 Vboot
D3 HD7# HA10# B10
H_D#8 K7 E10 H_A#11 Vcc_core >100uS
H_D#9 HD8# HA11# H_A#12 <10uS
F2 HD9# HA12# G10
VCCP_GMCH_S0 VCCP_GMCH_S0 H_D#10 J7 D9 H_A#13
H_D#11 HD10# HA13# H_A#14
J8 HD11# HA14# E11
H_D#12 H6 F10 H_A#15 Vccp
HD12# HA15#
1
H_D#13 F3 G11 H_A#16

R105 R116 H_D#14 HD13# HA16# H_A#17
K8 HD14# HA17# G13
221R3F 221R3F H_D#15 H5 C10 H_A#18
H_D#16 HD15# HA18# H_A#19
H1 HD16# HA19# C11 Vcc_mch
H_D#17 H2 D11 H_A#20
2
H_XSWING H_YSWING H_D#18 HD17# HA20# H_A#21 10~30uS

K5 HD18# HA21# C12
H_D#19 K6 B13 H_A#22 MCH_PWERGD
HD19# HA22#
1
H_D#20 J4 A12 H_A#23

HD20# HA23#
2
R95 R117 H_D#21 G3 F12 H_A#24

3 100R2F C95 100R2F C128 H_D#22 HD21# HA24# H_A#25 3
H3 HD22# HA25# G12
SCD1U16V SCD1U16V H_D#23 J1 E12 H_A#26 CLK_ENABLE#
1
H_D#24 HD23# HA26# H_A#27 VCCP_GMCH_S0

L5 C13
2
H_D#25 HD24# HA27# H_A#28

K4 HD25# HA28# B11
H_D#26 J5 D13 H_A#29 3~10mS
HD26# HA29#
1
H_D#27 P7 A13 H_A#30 VGATE TO ICH6
H_D#28 HD27# HA30# H_A#31 R457
L7 HD28# HA31# F13
Trace 10 mil wide with 20 mil spacing H_D#29 J3 100R2F
H_D#30 HD29#
P5 HD30# HADS# F8 H_ADS# 4
H_D#31 L3 B9 H_ADSTB#0 4
2
H_D#32 HD31# HADSTB#0
U7 HD32# HADSTB#1 E13 H_ADSTB#1 4
H_D#33 V6 J11 H_VREF
Alviso Strapping Signals H_D#34
H_D#35
R6
R5
HD33#
HD34#
HVREF
HBNR# A5
D5
H_BNR# 4
HD35# HBPRI# H_BPRI# 4
1
H_D#36
and Configuration REV.NO. 1.0
REF. NO. 15577
page 183 H_D#37
H_D#38
P3
T8
HD36#
HD37#
HBREQ0#
HCPURST#
E7
H10
H_BREQ#0 4
H_CPURST# 4
C384 R458
200R2F
R7
2
H_D#39 HD38# SCD1U10V2KX
Pin Name Strap Description Configuration R8 HD39#
H_D#40 U8
HOST
2
H_D#41 HD40#
CFG[2:0] FSB Frequency Select 001 = FSB533 R4 HD41# HCLKINN AB1 CLK_MCH_BCLK# 3
101 = FSB400 H_D#42 T4 AB2
HD42# HCLKINP CLK_MCH_BCLK 3 CORE_GMCH_S0
others = Reversed H_D#43 T5
H_D#44 HD43#
R1 HD44# HDBSY# C6 H_DBSY# 4
H_D#45 T3 E6
HD45# HDEFER# H_DEFER# 4 H_DINV#[3..0] 4
1
H_D#46 V8 H8 H_DINV#0
H_D#47 HD46# HDINV#0 H_DINV#1 R519
CFG[4:3] Reserved U6 HD47# HDINV#1 K3
H_D#48 W6 T7 H_DINV#2 0R2-0
H_D#49 HD48# HDINV#2 H_DINV#3
CFG5 DMI x2 Select 0 = DMI x2 U3 HD49# HDINV#3 U5 DY
1 = DMI x4 (Default) H_D#50 V5 G6 H_DPWR# 4
2
2 H_D#51 HD50# HDPWR# H_DPWR# 2
W8 HD51# HDRDY# F7 H_DRDY# 4 H_DSTBN#[3..0] 4
CFG6 Reserved 0 = DDR2 H_D#52 W7 G4 H_DSTBN#0
H_D#53 HD52# HDSTBN#0 H_DSTBN#1
1 = DDR1 (Default) U2 HD53# HDSTBN#1 K1
H_D#54 U1 R3 H_DSTBN#2
H_D#55 HD54# HDSTBN#2 H_DSTBN#3
CFG7 CPU Strap 0 = Reserved Y5 HD55# HDSTBN#3 V3 H_DSTBP#[3..0] 4
1 = Dothan (Default) H_D#56 Y2 G5 H_DSTBP#0
H_D#57 HD56# HDSTBP#0 H_DSTBP#1
V4 HD57# HDSTBP#1 K2
CFG8 Reserved H_D#58 Y7 R2 H_DSTBP#2
H_D#59 HD58# HDSTBP#2 H_DSTBP#3
W1 HD59# HDSTBP#3 W4
CFG9 PCI Express Graphics 0 = Reserve Lanes H_D#60 W3 F6
H_D#61 HD60# HEDRDY#
Lane Reversal 1 = Normal (Default) Y3 HD61# HHIT# D4 H_HIT# 4
H_D#62 Y6 D6
HD62# HHITM# H_HITM# 4
CFG[11:10] Reserved H_D#63 W2 B3
HD63# HLOCK# H_LOCK# 4
HPCREQ# A11 H_REQ#[4..0] 4
CFG[13:12] XOR/ALL Z test 00 = Reserved H_XRCOMP C1 A7 H_REQ#0
H_XSCOMP HXRCOMP HREQ#0 H_REQ#1
straps 01 = XOR mode enabled C2 HXSCOMP HREQ#1 D7
10 = All Z mode enabled H_XSWING D1 B8 H_REQ#2
H_YRCOMP HXSWING HREQ#2 H_REQ#3
11 = Normal Operation (Default) T1 HYRCOMP HREQ#3 C7
H_YSCOMP L1 A8 H_REQ#4
HYSCOMP HREQ#4 H_RS#[2..0] 4
CFG[15:14] Reversed H_YSWING P1 A4 H_RS#0
HYSWING HRS0# H_RS#1
HRS1# C5
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled B4 H_RS#2
HRS2# H_CPUSLP#_GMCH
1 = Dynamic ODT Enabled (Default) HCPUSLP# G8 1 2 H_CPUSLP# 4,21
B5 R54 0R0402-PAD
HTRDY# H_TRDY# 4
CFG17 Reversed
ALVISO-GM
CFG18 GMCH core VCC 0 = 1.05V (Default)
1 Select 1 = 1.5V <Core Design> 1
CFG19 CPU VTT Select 0 = 1.05V (Default)

1 = 1.2V
Wistron Corporation
CFG20 Reversed 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SDVOCRTL SDVO Present 0 = No SDVO device present (Default)
ALVISO-GM:71.0GMCH.08U
_DATA
1= SDVO device present
ALVISO-PM:71.0GMCH.0BU Title
ALVISO-GML:71.0GMCH.0JU GMCH (1 of 5)
NOTE: All strap signals are sampled with respect to the leading Size Document Number Rev
edge of the Alviso GMCH PWORK In signal. A3
Leopard2 -1
A B C D E
A B C D E
Alviso will provide SDVO_CTRLCLK

and CTRLDATA pulldowns on-die
U19B
22 DMI_TXN[3..0] 1D5V_S0
4 DMI_TXN0 AA31 G16 CFG0 4
DMI_TXN1 DMIRXN0 CFG0 CFG1 U19G
AB35 DMIRXN1 CFG1 H13 Intel suggest NC Due to votusly DVO
DMI_TXN2 AC31 G14 1 2 CFG2
DMI_TXN3 DMIRXN2 CFG2 CFG3 R52 1KR2 TPAD30 TP22 SDVO_DAT PEG_COMP 2
AD35 DMIRXN3 CFG3 F16 H24 SDVOCTRL_DATA EXP_COMPI D36 1
CFG4 TPAD30 TP23 SDVO_CLK R473 24D9R2F
MISC
22 DMI_TXP[3..0] CFG4 F15 H25 SDVOCTRL_CLK EXP_ICOMPO D34
DMI_TXP0 Y31 G15 CFG5 AB29
DMIRXP0 CFG5 3 CLK_MCH_3GPLL# GCLKN PEG_RXN[15..0] 13
DMI_TXP1 AA35 E16 CFG6 AC29 E30 PEG_RXN0
DMIRXP1 CFG6 3 CLK_MCH_3GPLL GCLKP EXP_RXN0
DMI_TXP2 AB31 D17 CFG7 F34 PEG_RXN1
DMI_TXP3 DMIRXP2 CFG7 CFG8 EXP_RXN1 PEG_RXN2
AC35 DMIRXP3 CFG8 J16 A15 TVDAC_A EXP_RXN2 G30
D15 CFG9 C16 H34 PEG_RXN3
DMI
22 DMI_RXN[3..0] CFG9 TVDAC_B EXP_RXN3
CFG/RSVD
DMI_RXN0 AA33 E15 CFG10 A17 J30 PEG_RXN4
DMI_RXN1 DMITXN0 CFG10 CFG11 TVDAC_C EXP_RXN4 PEG_RXN5
AB37 DMITXN1 CFG11 D14 J18 TV_REFSET EXP_RXN5 K34
TV
DMI_RXN2 AC33 E14 CFG12 B15 L30 PEG_RXN6
DMI_RXN3 DMITXN2 CFG12 CFG13 TV_IRTNA EXP_RXN6 PEG_RXN7
AD37 DMITXN3 CFG13 H12 B16 TV_IRTNB EXP_RXN7 M34
C14 CFG14 B17 N30 PEG_RXN8
22 DMI_RXP[3..0] CFG14 TV_IRTNC EXP_RXN8
DMI_RXP0 Y33 H15 CFG15 P34 PEG_RXN9
DMI_RXP1 DMITXP0 CFG15 CFG16 EXP_RXN9 PEG_RXN10
AA37 DMITXP1 CFG16 J15 EXP_RXN10 R30
DMI_RXP2 AB33 H14 CFG17 CORE_GMCH_S0 T34 PEG_RXN11
DMI_RXP3 DMITXP2 CFG17 CFG18 EXP_RXN11 PEG_RXN12
AC37 DMITXP3 CFG18 G22 Note: EXP_RXN12 U30
G23 CFG19 CRT_RED, V34 PEG_RXN13
CFG19 CFG20 EXP_RXN13 PEG_RXN14
CFG20 D23 CRT_GREEN, EXP_RXN14 W30
AM33 G25 CRT_BLUE, are R494 1 2 0R2-0 E24 Y34 PEG_RXN15
11 M_CLK_DDR0 SM_CK0 RSVD21 DDCCLK EXP_RXN15
AL1 G24 ground R495 1 2 0R2-0 E23
11 M_CLK_DDR1 SM_CK1 RSVD22 DDCDATA PEG_RXP[15..0] 13
AE11 J17 referenced. E21 D30 PEG_RXP0
SM_CK2 RSVD23 BLUE EXP_RXP0 PEG_RXP1
11 M_CLK_DDR3 AJ34 SM_CK3 RSVD24 A31 Intel design guide suggest D21 BLUE# EXP_RXP1 E34
AF6 A30 Ref no.:14511 C20 F30 PEG_RXP2
VGA
11 M_CLK_DDR4 SM_CK4 RSVD25 GREEN EXP_RXP2
AC10 D26 page 210 B20 G34 PEG_RXP3
SM_CK5 RSVD26 GREEN# EXP_RXP3 PEG_RXP4
RSVD27 D25 A19 RED EXP_RXP4 H30
AN33 B19 J34 PEG_RXP5
11 M_CLK_DDR#0 SM_CK0# RED# EXP_RXP5
3 AK1 R493 1 20R2-0 H21 K30 PEG_RXP6 3
11 M_CLK_DDR#1 SM_CK1# VSYNC EXP_RXP6
AE10 R492 1 20R2-0 G21 L34 PEG_RXP7
SM_CK2# HSYNC EXP_RXP7 PEG_RXP8
AJ33 J20 M30
PCI-EXPRESS GRAPHICS
11 M_CLK_DDR#3 SM_CK3# Place 150 Ohm termination resistors close to GMCH REFSET EXP_RXP8
AF5 N34 PEG_RXP9
11 M_CLK_DDR#4 SM_CK4# EXP_RXP9
AD10 P30 PEG_RXP10
SM_CK5# EXP_RXP10 PEG_RXP11
EXP_RXP11 R34
AP21 T30 PEG_RXP12
11,12 M_CKE0 SM_CKE0 EXP_RXP12
MUXING
AM21 U34 PEG_RXP13

11,12 M_CKE1 SM_CKE1 EXP_RXP13
AH21 J23 E25 V30 PEG_RXP14
11,12 M_CKE2 SM_CKE2 BM_BUSY# PM_BMBUSY# 22 LBKLT_CRTL EXP_RXP14
11,12 M_CKE3 AK21 SM_CKE3 EXT_TS0# J21 PM_EXTTS#0 F25 LBKLT_EN EXP_RXP15 W34 PEG_RXP15
EXT_TS1# H22 PM_EXTTS#1 Note: Intel design guide C23 LCTLA_CLK
AN16 F5 suggest(page 203) C22 E32 TXN0 C372
1 2 PEG_TXN0
PM
11,12 M_CS#0 SM_CS0# THRMTRIP# PM_THRMTRIP-A# 4,21 LCTLB_DATA EXP_TXN0

11,12 M_CS#1 AM14 SM_CS1# PWROK AD30 PWROK 25 If the LVDS interface is F23 LDDC_CLK EXP_TXN1 F36 TXN1 C1071 2SCD1U16V
PEG_TXN1 PEG_TXN[15..0]
SCD1U16V
DDR
Layout Note: AH15 AE29 RST1# 1 2 F22 G32 TXN2 C387

1 2 PEG_TXN2 13
Route as short 11,12 M_CS#2 SM_CS2# RSTIN# 100R2 PLT_RST1# 13,24,26 not implementd, all LDDC_DATA EXP_TXN2 SCD1U16V
AG16 R536 F26 H36 TXN3 C1081 2 PEG_TXN3
as possible 11,12 M_CS#3 SM_CS3# signals associated with LVDD_EN EXP_TXN3 SCD1U16V
A24 C33 J32 TXN4 C386
1 2 PEG_TXN4
DREF_CLKN DREFCLK# 3 LIBG EXP_TXN4
M_OCDCOMP0 AF22 A23 the interface can be left C31 K36 TXN5 C1161 2SCD1U16V
PEG_TXN5
CLK
SM_OCDCOMP0 DREF_CLKP DREFCLK 3 LVBG EXP_TXN5 SCD1U16V

M_OCDCOMP1 AF16 C37 as no connects. F28 L32 TXN6 C409
1 2 PEG_TXN6
SM_OCDCOMP1 DREF_SSCLKN DREFSSCLK# 3 LVREFH EXP_TXN6
1
DREF_SSCLKP D37 DREFSSCLK 3 F27 LVREFL EXP_TXN7 M36 TXN7 C1181 2SCD1U16V
PEG_TXN7
R535 R534 TXN8 C410 SCD1U16V
PEG_TXN8
LVDS
11,12 M_ODT0 AP14 SM_ODT0 EXP_TXN8 N32 1 2
40D2R2F 40D2R2F
11,12 M_ODT1 AL15 SM_ODT1 NC1 AP37 B30 LACLKN EXP_TXN9 P36 TXN9 C1171 2SCD1U16V
PEG_TXN9
AM11 AN37 B29 R32 TXN10 C430
1 2 SCD1U16V
PEG_TXN10
11,12 M_ODT2 SM_ODT2 NC2 LACLKP EXP_TXN10
11,12 M_ODT3 AN10 AP36 C25 T36 TXN11 C1311 2SCD1U16V
PEG_TXN11
2
SM_ODT3 NC3 LBCLKN EXP_TXN11 TXN12 C429 SCD1U16V

PEG_TXN12
NC4 AP2 C24 LBCLKP EXP_TXN12 U32 1 2
DDR_VREF_S3 M_RCOMPN AK10 AP1 V36 TXN13 C1301 2SCD1U16V
PEG_TXN13
M_RCOMPP SMRCOMPN NC5 EXP_TXN13 TXN14 C452 SCD1U16V
PEG_TXN14
AK11 SMRCOMPP NC6 AN1 B34 LADATAN0 EXP_TXN14 W32 1 2
AF37 B1 B33 Y36 TXN15 C1421 2SCD1U16V
PEG_TXN15
NC
SMVREF0 NC7 LADATAN1 EXP_TXN15 SCD1U16V

AD1 SMVREF1 NC8 A2 B32 LADATAN2
SMXSLEW AE27 B37 D32 TXP0 C373
1 2 PEG_TXP0
SMXSLEWIN NC9 EXP_TXP0
1
2 TXP1 C97 1 SCD1U16V 2

AE28 SMXSLEWOUT NC10 A36 EXP_TXP1 E36 2 PEG_TXP1 PEG_TXP[15..0]
C154 SMYSLEW AF9 A37 A34 F32 TXP2 C389
1 2 SCD1U16V
PEG_TXP2 13
SCD1U10V2MX-1 SMYSLEWIN NC11 LADATAP0 EXP_TXP2
AF10 A33 G36 TXP3 C1061 2SCD1U16V
PEG_TXP3
2
SMYSLEWOUT LADATAP1 EXP_TXP3 TXP4 C388 SCD1U16V

PEG_TXP4
B31 LADATAP2 EXP_TXP4 H32 1 2
J36 TXP5 C1051 SCD1U16V
2 PEG_TXP5
EXP_TXP5 TXP6 C407 SCD1U16V
PEG_TXP6
ALVISO-GM C29 LBDATAN0 EXP_TXP6 K32 1 2
2D5V_S0 D28 L36 TXP7 C1191 2SCD1U16V
PEG_TXP7
LBDATAN1 EXP_TXP7 TXP8 C408 SCD1U16V
PEG_TXP8
When Low 2.2K Ohm C27 LBDATAN2 EXP_TXP8 M32 1 2
N36 TXP9 C1151 SCD1U16V
2 PEG_TXP9
PM_EXTTS#0 CFG3 EXP_TXP9 TXP10 C431 SCD1U16V
PEG_TXP10
1 2 1 2 C28 LBDATAP0 EXP_TXP10 P32 1 2
R498 10KR2 R441 DUMMY-R2 D27 R36 TXP11 C1291 2SCD1U16V
PEG_TXP11
CFG4 LBDATAP1 EXP_TXP11 TXP12 C432 SCD1U16V
PEG_TXP12
1 2 C26 LBDATAP2 EXP_TXP12 T32 1 2
VCCP_GMCH_S0 Ref ALVISO EDS-1 Page 115 R440 DUMMY-R2 U36 TXP13 C1321 SCD1U16V
2 PEG_TXP13
PM_EXTTS#1 CFG5 EXP_TXP13 TXP14 C453 SCD1U16V
PEG_TXP14
1 2 1 2 EXP_TXP14 V32 1 2
R471 10KR2 R464 DUMMY-R2 W36 TXP15 C1431 2SCD1U16V
PEG_TXP15
CFG6 EXP_TXP15 SCD1U16V
1 2
R469 2K2R2
1D8V_S3
FOR DDR2 R442
1 2
DUMMY-R2
CFG7 ALVISO-GM
For Dothan-B
1
1 2 CFG8
1
R465 R437 R420 R461 DUMMY-R2 2D5V_S0 When High 1K Ohm

10KR2 10KR2 1KR2 1 2 CFG9
1
R439 DUMMY-R2
R533 1 2 CFG10 1 2 CFG18
2
80D6R2F R468 DUMMY-R2 R470 DUMMY-R2

2
CFG2 1 2 CFG11 1 2 CFG19

CPU_SEL0 3,4
CFG1 R69 DUMMY-R2 R497 DUMMY-R2
CPU_SEL1 3,4
2
M_RCOMPN CFG0 1 2 CFG12 1 2 CFG20

M_RCOMPP R466 DUMMY-R2 R496 DUMMY-R2
1 <Core Design> 1
1 2 CFG13
1
R459 DUMMY-R2
R543 R438 R419 CFG(2..1) FREQ.(MHz) 1 2 CFG14
80D6R2F 4K7R2 4K7R2 10
00
400
533
R467 DUMMY-R2 Wistron Corporation
DY DY 1 2 CFG15 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
11 Reserved R463 DUMMY-R2
Strapping Taipei Hsien 221, Taiwan, R.O.C.
2
1 2 CFG16
R460 DUMMY-R2 Title
CFG2=0(R419):133MHZ CFG17
R462
1 2
DUMMY-R2 GMCH (2 of 5)
CFG2=1(R420):100MHZ CFG[17:3] have internal pullup resistors. Size Document Number Rev
A3
CFG[19:18] have internal pulldown Leopard2 -1
Date: Thursday, July 07, 2005 Sheet 7 of 47
A B resistors C D E
A B C D E
4 4
U19C
U19D
11 M_A_DQ[63..0]
M_A_DQ0 AG35 AK15
SADQ0 SA_BS0# M_A_BS#0 11,12 11 M_B_DQ[63..0]
M_A_DQ1 AH35 AK16 M_B_DQ0 AE31 AJ15
SADQ1 SA_BS1# M_A_BS#1 11,12 SBDQ0 SB_BS0# M_B_BS#0 11,12
M_A_DQ2 AL35 AL21 M_B_DQ1 AE32 AG17
SADQ2 SA_BS2# M_A_BS#2 11,12 SBDQ1 SB_BS1# M_B_BS#1 11,12
M_A_DQ3 AL37 M_B_DQ2 AG32 AG21
SADQ3 M_A_DM[7..0] 11 SBDQ2 SB_BS2# M_B_BS#2 11,12
M_A_DQ4 AH36 AJ37 M_A_DM0 M_B_DQ3 AG36
SADQ4 SA_DM0 SBDQ3 M_B_DM[7..0] 11
M_A_DQ5 AJ35 AP35 M_A_DM1 M_B_DQ4 AE34 AF32 M_B_DM0
M_A_DQ6 SADQ5 SA_DM1 M_A_DM2 M_B_DQ5 SBDQ4 SB_DM0 M_B_DM1
AK37 SADQ6 SA_DM2 AL29 AE33 SBDQ5 SB_DM1 AK34
M_A_DQ7 AL34 AP24 M_A_DM3 M_B_DQ6 AF31 AK27 M_B_DM2
AM36 SADQ8 SA_DM4 AP9 AF30 SBDQ7 SB_DM3 AK24
M_A_DQ9 AN35 AP4 M_A_DM5 M_B_DQ8 AH33 AJ10 M_B_DM4
AP32 SADQ10 SA_DM6 AJ2 AH32 SBDQ9 SB_DM5 AK5
M_A_DQ11 AM31 AD3 M_A_DM7 M_B_DQ10 AK31 AE7 M_B_DM6
M_A_DQ12 SADQ11 SA_DM7 M_B_DQ11 SBDQ10 SB_DM6 M_B_DM7
AM34 SADQ12 M_A_DQS[7..0] 11 AG30 SBDQ11 SB_DM7 AB7
M_A_DQ13 AM35 AK36 M_A_DQS0 M_B_DQ12 AG34
SADQ13 SA_DQS0 SBDQ12 M_B_DQS[7..0] 11
M_A_DQ14 AL32 AP33 M_A_DQS1 M_B_DQ13 AG33 AF34 M_B_DQS0
M_A_DQ15 SADQ14 SA_DQS1 M_A_DQS2 M_B_DQ14 SBDQ13 SB_DQS0 M_B_DQS1
AM32 SADQ15 SA_DQS2 AN29 AH31 SBDQ14 SB_DQS1 AK32
M_A_DQ16 AN31 AP23 M_A_DQS3 M_B_DQ15 AJ31 AJ28 M_B_DQS2
AP31 SADQ17 SA_DQS4 AM8 AK30 SBDQ16 SB_DQS3 AK23
M_A_DQ18 AN28 AM4 M_A_DQS5 M_B_DQ17 AJ30 AM10 M_B_DQS4
AP28 SADQ19 SA_DQS6 AJ1 AH29 SBDQ18 SB_DQS5 AH6
M_A_DQ20 AL30 AE5 M_A_DQS7 M_B_DQ19 AH28 AF8 M_B_DQS6
M_A_DQ21 SADQ20 SA_DQS7 M_B_DQ20 SBDQ19 SB_DQS6 M_B_DQS7
AM30 SADQ21 M_A_DQS#[7..0] 11 AK29 SBDQ20 SB_DQS7 AB4
M_A_DQ22 AM28 AK35 M_A_DQS#0 M_B_DQ21 AH30
SADQ22 SA_DQS0# SBDQ21 M_B_DQS#[7..0] 11
3 M_A_DQ23 AL28 AP34 M_A_DQS#1 M_B_DQ22 AH27 AF35 M_B_DQS#0 3
SADQ23 SA_DQS1# SBDQ22 SB_DQS0#
DDR SYSTEM MEMORY A
M_A_DQ24 AP27 AN30 M_A_DQS#2 M_B_DQ23 AG28 AK33 M_B_DQS#1

M_A_DQ25 SADQ24 SA_DQS2# M_A_DQS#3 M_B_DQ24 SBDQ23 SB_DQS1# M_B_DQS#2
AM27 SADQ25 SA_DQS3# AN23 AF24 SBDQ24 SB_DQS2# AK28
M_A_DQ26 AM23 AN8 M_A_DQS#4 M_B_DQ25 AG23 AJ23 M_B_DQS#3
DDR SYSTEM MEMORY B

AM22 SADQ27 SA_DQS5# AM5 AJ22 SBDQ26 SB_DQS4# AL10
M_A_DQ28 AL23 AH1 M_A_DQS#6 M_B_DQ27 AK22 AH7 M_B_DQS#5
AM24 SADQ29 SA_DQS7# AE4 AH24 SBDQ28 SB_DQS6# AF7
M_A_DQ30 AN22 M_B_DQ29 AH23 AB5 M_B_DQS#7
SADQ30 M_A_A[13..0] 11,12 SBDQ29 SB_DQS7#
M_A_DQ31 AP22 AL17 M_A_A0 M_B_DQ30 AG22
SADQ31 SA_MA0 SBDQ30 M_B_A[13..0] 11,12
M_A_DQ32 AM9 AP17 M_A_A1 M_B_DQ31 AJ21 AH17 M_B_A0
M_A_DQ33 SADQ32 SA_MA1 M_A_A2 M_B_DQ32 SBDQ31 SB_MA0 M_B_A1
AL9 SADQ33 SA_MA2 AP18 AG10 SBDQ32 SB_MA1 AK17
M_A_DQ34 AL6 AM17 M_A_A3 M_B_DQ33 AG9 AH18 M_B_A2
AP7 SADQ35 SA_MA4 AN18 AG8 SBDQ34 SB_MA3 AJ18
M_A_DQ36 AP11 AM18 M_A_A5 M_B_DQ35 AH8 AK18 M_B_A4
AP10 SADQ37 SA_MA6 AL19 AH11 SBDQ36 SB_MA5 AJ19
M_A_DQ38 AL7 AP20 M_A_A7 M_B_DQ37 AH10 AK19 M_B_A6
AM7 SADQ39 SA_MA8 AM19 AJ9 SBDQ38 SB_MA7 AH19
M_A_DQ40 AN5 AL20 M_A_A9 M_B_DQ39 AK9 AJ20 M_B_A8
AN6 SADQ41 SA_MA10 AM16 AJ7 SBDQ40 SB_MA9 AH20
M_A_DQ42 AN3 AN20 M_A_A11 M_B_DQ41 AK6 AJ16 M_B_A10
AP3 SADQ43 SA_MA12 AM20 AJ4 SBDQ42 SB_MA11 AG18
M_A_DQ44 AP6 AM15 M_A_A13 M_B_DQ43 AH5 AG20 M_B_A12
M_A_DQ45 SADQ44 SA_MA13 M_B_DQ44 SBDQ43 SB_MA12 M_B_A13
AM6 SADQ45 AK8 SBDQ44 SB_MA13 AG15
M_A_DQ46 AL4 AN15 M_B_DQ45 AJ8
SADQ46 SA_CAS# M_A_CAS# 11,12 SBDQ45
M_A_DQ47 AM3 AP16 M_B_DQ46 AJ5
SADQ47 SA_RAS# M_A_RAS# 11,12 SBDQ46
M_A_DQ48 AK2 AF29 GMCH_TP48 TP29 TPAD30 M_B_DQ47 AK4 AH14
SADQ48 SA_RCVENIN# SBDQ47 SB_CAS# M_B_CAS# 11,12
M_A_DQ49 AK3 AF28 GMCH_TP49 TP28 TPAD30 M_B_DQ48 AG5 AK14
SADQ49 SA_RCVENOUT# SBDQ48 SB_RAS# M_B_RAS# 11,12
M_A_DQ50 AG2 AP15 M_B_DQ49 AG4 AF15 GMCH_TP50 TP27 TPAD30
SADQ50 SA_WE# M_A_WE# 11,12 SBDQ49 SB_RCVENIN#
M_A_DQ51 AG1 M_B_DQ50 AD8 AF14 GMCH_TP51 TP26 TPAD30
2 M_A_DQ52 SADQ51 M_B_DQ51 SBDQ50 SB_RCVENOUT# 2
AL3 SADQ52 AD9 SBDQ51 SB_WE# AH16 M_B_WE# 11,12
M_A_DQ53 AM2 M_B_DQ52 AH4
M_A_DQ54 SADQ53 M_B_DQ53 SBDQ52
AH3 SADQ54 AG6 SBDQ53
M_A_DQ55 AG3 M_B_DQ54 AE8
AF3 SADQ56 AD7 SBDQ55
M_A_DQ57 AE3 M_B_DQ56 AC5
AD6 SADQ58 AB8 SBDQ57
M_A_DQ59 AC4 M_B_DQ58 AB6
AF2 SADQ60 AA8 SBDQ59
M_A_DQ61 AF1 M_B_DQ60 AC8
AD4 SADQ62 AC7 SBDQ61
M_A_DQ63 AD5 M_B_DQ62 AA4
SADQ63 M_B_DQ63 SBDQ62
AA5 SBDQ63
ALVISO-GM
ALVISO-GM
1 <Core Design> 1
Wistron Corporation
Title
GMCH (3 of 5)
A3
Leopard2 -1
A B C D E
1
2
3
4
2 1 2 1
3D3V_S0
C359
3
C448
CORE_GMCH_S0
VIN
U59
2 1
SCD1U10V2MX-1
VOUT
GND
SC10U10V5ZY-L
1
2
A
A
C403
APL5308-25AC-TR
2 1
SC10U10V5ZY-L
C404
2 1
2D5V_S0
SC4D7U6D3V5KX
C63
2 1
U19E
SC10U10V5ZY-L
T29 VCC0 VCCA_TVDACA0 F17
R29 VCC1 VCCA_TVDACA1 E17
C406
N29 VCC2 VCCA_TVDACB0 D18
M29 VCC3 VCCA_TVDACB1 C18
K29 VCC4 VCCA_TVDACC0 F18
2 1 J29 VCC5 VCCA_TVDACC1 E18
V28 VCC6
SCD1U10V2MX-1
U28 VCC7 VCCA_TVBG H18
T28 VCC8 VSSA_TVBG G18
C405
R28 VCC9
P28 VCC10 VCCD_TVDAC D19
N28 VCC11 VCCDQ_TVDAC H17
2 1 M28 VCC12
L28 VCC13 VCCD_LVDS0 B26
2 1 K28 B25
SCD1U10V2MX-1
VCC14 VCCD_LVDS1
J28 A25
G53
GMCH_CORE_VCC
VCC15 VCCD_LVDS2
C428
H28 VCC16
1D5V_S0
G28 VCC17 VCCA_LVDS A35
V27 VCC18
U27 B22
1D5V_DLVDS_S0
VCC19 VCCHV0
T27 B21
B
B
VCC20 VCCHV1
GAP-CLOSE-PWR
SCD1U10V2MX-1
R27 A21
2D5V_ALVDS_S0
1
1
1
1
VCC21 VCCHV2
P27 VCC22
N27 VCC23 VCCSM0 AM37 V1.8_DDR_CAP1 2 1
L2
M27 AH37 V1.8_DDR_CAP2 2 1
L13
L11
L31
VCC24 VCCSM1
L27 VCC25 VCCSM2 AP29 V1.8_DDR_CAP5
K27 VCC26 VCCSM3 AD28
C160
J27 AD27
2
2
2
2
VCC27 VCCSM4
C161
H27 VCC28 VCCSM5 AC27
IND-D1UH
IND-D1UH
IND-D1UH
IND-D1UH
2 1 2 1 2 1 2 1 K26 AP26
1
VCC29 VCCSM6
H26 VCC30 VCCSM7 AN26
K25 VCC31 VCCSM8 AM26
SCD1U10V2MX-1
J25 AL26
C78
VCC32 VCCSM9
DY
DY
DY
DY
C153
C139
C370
SCD1U10V2MX-1
K24 VCC33 VCCSM10 AK26

K23 VCC34 VCCSM11 AJ26 2 1
internally
2 C165
K22 VCC35 VCCSM12 AH26

pins shorted
K21 VCC36 VCCSM13 AG26

C76
W20 AF26
Note: All VCCSM
VCC37 VCCSM14
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
SC10U6D3V5MX
2D5V_TVDAC_S0
U20 VCC38 VCCSM15 AE26

2 1 2 1 2 1 2 1 T20 VCC39 VCCSM16 AP25
SCD1U10V2MX-1
K20 VCC40 VCCSM17 AN25

V19 VCC41 VCCSM18 AM25 2 1
U19 AL25
SCD1U10V2MX-1
C77
VCC42 VCCSM19
C140
C141
C371
K19 VCC43 VCCSM20 AK25
W18 AJ25
1
POWER
C75
VCC44 VCCSM21
V18 VCC45 VCCSM22 AH25
T18 VCC46 VCCSM23 AG25
1D5V_HPLL_S0
K18 AF25
G10
1D5V_HMPLL_S0
VCC47 VCCSM24
SCD1U10V2MX-1
SCD1U10V2MX-1
SCD1U10V2MX-1
SCD1U10V2MX-1
K17 AE25
2
VCC48 VCCSM25
1D5V_MPLL_S0
AE24
1D5V_DPLLB_S0
1D5V_DPLLA_S0
VCCSM26
SC10U10V5ZY-L
AC2 VCCH_MPLL1 VCCSM27 AE23

AC1 VCCH_MPLL0 VCCSM28 AE22 2 1
B23 VCCA_DPLLA VCCSM29 AE21
GAP-CLOSE-PWR
C
C
C35 AE20
2D5V_S0
VCCA_DPLLB VCCSM30
C449
AA1 VCCA_HPLL VCCSM31 AE19

AA2 VCCA_MPLL VCCSM32 AE18 2 1
VCCSM33 AE17
F19 VCCA_CRTDAC0 VCCSM34 AE16
E19 VCCA_CRTDAC1 VCCSM35 AE15
SC10U10V5ZY-L
C447
G19 VSSA_CRTDAC VCCSM36 AE14

AP13
2D5V_S0
2D5V_S0
1D5V_S0
VCCSM37
AN13
1
1
1
VCCSM38
H20 VCC_SYNC VCCSM39 AM13
VCCSM40 AL13
SC10U10V5ZY-L
AK13
G12
G13
G11
K13 VTT0 VCCSM41

AJ13 2 1
2
2
2
J13 VTT1 VCCSM42

2 1 K12 VTT2 VCCSM43 AH13
W11 VTT3 VCCSM44 AG13
AF13 2 1 2 1 2 1
TC9
V11 VTT4 VCCSM45

DY
C103
AE13
VCCP_GMCH_S0
U11 VTT5 VCCSM46

GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
2 1 AP12
VCCP_GMCH_S0
T11 VTT6 VCCSM47
C81
C84
C79
R11 VTT7 VCCSM48 AN12

P11 VTT8 VCCSM49 AM12 2 1 2 1 2 1
2D5V_S0
AL12
SCD1U10V2MX-1
ST100U4VBM-U
N11 VTT9 VCCSM50
C102
AK12
1
M11 VTT10 VCCSM51

R55
AJ12
C82
C83
C80
L11 VTT11 VCCSM52

1D8V_S3
2D5V_ALVDS_S0
2 1 AH12
SCD1U10V2MX-1
SCD1U10V2MX-1
SCD1U10V2MX-1
2D5V_TXLVDS_S0
K11 VTT12 VCCSM53

W10 VTT13 VCCSM54 AG12
AF12
1D5V_DLVDS_S0
V10 VTT14 VCCSM55
ST100U6D3VM-U
AE12
2
FOR DDR2
U10 VTT15 VCCSM56

C114
10R2
T10 VTT16 VCCSM57 AD11

SC4D7U10V5ZY
SCD01U16V3KX
SC10U10V5ZY-L
AC11
1
R10 VTT17 VCCSM58

internally
P10 VTT18 VCCSM59 AB11

pins shorted
AB10
Note: All VCCSM
N10 VTT19 VCCSM60

D6
2 C164
AB9
SCD1U10V2MX-1
M10 VTT20 VCCSM61

SC10U10V6ZY-U
K10 VTT21 VCCSM62 AP8 V1.8_DDR_CAP6

D
D
AM1 V1.8_DDR_CAP4 2 1
2
J10 VTT22 VCCSM63 V1.8_DDR_CAP3

SSM5818SL
Y9 VTT23 VCCSM64 AE1 2 1

W9 VTT24
U9 VTT25 VCCTX_LVDS0 B28
C159
R9 VTT26 VCCTX_LVDS1 A28

C158
P9 VTT27 VCCTX_LVDS2 A27

N9 VTT28
AF20
VCCP_GMCH_S0
M9 VTT29 VCCA_SM0
L9 VTT30 VCCA_SM1 AP19
SCD1U10V2MX-1
J9 VTT31 VCCA_SM2 AF19

2D5V_TXLVDS_S0
SCD1U10V2MX-1
N8 VTT32 VCCA_SM3 AF18

M8 VTT33
A3
N7 VTT34 VCC3G0 AE37

Title
Size
M7 VTT35 VCC3G1 W37

N6 VTT36 VCC3G2 U37
M6 VTT37 VCC3G3 R37 2 1
2 1VCCP_GMCH_CAP1
A6 VTT38 VCC3G4 N37 2 1
<Core Design>
N5 VTT39 VCC3G5 L37

C385
M5 VTT40 VCC3G6 J37

C74
C472
N4 VTT41 2 1
2 1 Y29 2 1
1D5V_DDRDLL_S0
M4 VTT42 VCCA_3GPLL0
N3 VTT43 VCCA_3GPLL1 Y28
1D5V_PCIE_S0
Y27
Document Number
M3 VTT44 VCCA_3GPLL2
SC10U10V5ZY-L
C451
2 1
Date: Thursday, July 07, 2005
C73
N2 VTT45
SCD47U16V3ZY
C166
F37 2 1
SCD1U10V2MX-1
VCCP_GMCH_S0
M2 VTT46 VCCA_3GBG
VCCP_GMCH_CAP2 G37
1
B2 VTT47 VSSA_3GBG
VCCP_GMCH_CAP3
C427
2 1 V1 VTT48
C450
N1 VTT49 2 1 2 1
SC10U10V5ZY-L
2 1
G15
M1 VTT50
SCD47U16V3ZY
VCCP_GMCH_CAP4
ST100U6D3VM-U
2 1
2
G1 VTT51
C127
1
SC4D7U10V5ZY
DY
C473
1D5V_3GPLL_S0
TC22
2 1
C426
G54
SCD1U10V2MX-1
E
E
C96
Leopard2
2D5V_3GBG_S0
G55
Sheet
GAP-CLOSE-PWR
GMCH (4 of 5)
2
SCD22U16V3ZY
C104
1D5V_S0
9
SC10U10V5ZY-L
ST100U6D3VM-U
G14
SC4D7U10V5ZY
2
1D5V_S0
GAP-CLOSE-PWR
SCD1U10V2MX-1
1D5V_S0
GAP-CLOSE-PWR
SCD22U16V3ZY
of
2D5V_S0
GAP-CLOSE-PWR
47
Rev
-1
Wistron Corporation
1
2
3
4
1
2
3
4
U19F
ALVISO-GM
B36 VSSALVDS
VSS267 AL24
VSS266 AN24
A
A
Y1 VSS271 VSS265 A26

D2 VSS270 VSS264 E26
G2 VSS269 VSS263 G26
J2 J26
U19H
VSS268 VSS262
L2 VSS260 VSS261 B27
ALVISO-GM
P2 VSS259 VSS129 E27
T2 VSS258 VSS128 G27
VCCSM_NCTF31 AB12 V2 VSS257 VSS127 W27
VCCSM_NCTF30 AC12 AD2 VSS256 VSS126 AA27
VCCSM_NCTF29 AD12 AE2 VSS255 VSS125 AB27
1D8V_S3
VCCSM_NCTF28 AB13 AH2 VSS254 VSS124 AF27
VCCSM_NCTF27 AC13 AL2 VSS253 VSS123 AG27
VCCSM_NCTF26 AD13 AN2 VSS252 VSS122 AJ27
VCCSM_NCTF25 AC14 A3 VSS251 VSS121 AL27
VCCSM_NCTF24 AD14 C3 VSS250 VSS120 AN27
VCCSM_NCTF23 AC15 AA3 VSS249 VSS119 E28
VCCSM_NCTF22 AD15 AB3 VSS248 VSS118 W28
VCCSM_NCTF21 AC16 AC3 VSS247 VSS117 AA28
VCCSM_NCTF20 AD16 AJ3 VSS246 VSS116 AB28
VCCSM_NCTF19 AC17 C4 VSS245 VSS115 AC28
VCCSM_NCTF18 AD17 H4 VSS244 VSS114 A29
AC18 L4 D29
VCCP_GMCH_S0
VCCSM_NCTF17 VSS243 VSS113
VCCSM_NCTF16 AD18 P4 VSS242 VSS112 E29
VCCSM_NCTF15 AC19 U4 VSS241 VSS111 F29
VCCSM_NCTF14 AD19 Y4 VSS240 VSS110 G29
VCCSM_NCTF13 AC20 AF4 VSS239 VSS109 H29
VCCSM_NCTF12 AD20 AN4 VSS238 VSS108 L29
L12 AC21 E5 P29
FOR DDR2
VTT_NCTF17 VCCSM_NCTF11 VSS237 VSS107
M12 VTT_NCTF16 VCCSM_NCTF10 AD21 W5 VSS236 VSS106 U29
N12 VTT_NCTF15 VCCSM_NCTF9 AC22 AL5 VSS235 VSS105 V29
P12 VTT_NCTF14 VCCSM_NCTF8 AD22 AP5 VSS234 VSS104 W29
R12 VTT_NCTF13 VCCSM_NCTF7 AC23 B6 VSS233 VSS103 AA29
T12 AD23 J6 AD29
B
B
VTT_NCTF12 VCCSM_NCTF6 VSS232 VSS102

U12 VTT_NCTF11 VCCSM_NCTF5 AC24 L6 VSS231 VSS101 AG29
V12 VTT_NCTF10 VCCSM_NCTF4 AD24 P6 VSS230 VSS100 AJ29
W12 VTT_NCTF9 VCCSM_NCTF3 AC25 T6 VSS229 VSS99 AM29
L13 VTT_NCTF8 VCCSM_NCTF2 AD25 AA6 VSS228 VSS98 C30
M13 VTT_NCTF7 VCCSM_NCTF1 AC26 AC6 VSS227 VSS97 Y30
N13 VTT_NCTF6 VCCSM_NCTF0 AD26 AE6 VSS226 VSS96 AA30
P13 VTT_NCTF5 AJ6 VSS225 VSS95 AB30
R13 VTT_NCTF4 VCC_NCTF78 L17 G7 VSS224 VSS94 AC30
T13 VTT_NCTF3 VCC_NCTF77 M17 V7 VSS223 VSS93 AE30
U13 VTT_NCTF2 VCC_NCTF76 N17 AA7 VSS222 VSS92 AP30
V13 VTT_NCTF1 VCC_NCTF75 P17 AG7 VSS221 VSS91 D31
W13 VTT_NCTF0 VCC_NCTF74 T17 AK7 VSS220 VSS90 E31
VCC_NCTF73 U17 AN7 VSS219 VSS89 F31
VCC_NCTF72 V17 C8 VSS218 VSS88 G31
VCC_NCTF71 W17 E8 VSS217 VSS87 H31
VCC_NCTF70 L18 L8 VSS216 VSS86 J31
VCC_NTTF69 M18 P8 VSS215 VSS85 K31
Y12 VSS_NCTF68 VCC_NCTF68 N18 Y8 VSS214 VSS84 L31
AA12 VSS_NCTF67 VCC_NCTF67 P18 AL8 VSS213 VSS83 M31
Y13 VSS_NCTF66 VCC_NCTF66 R18 A9 VSS212 VSS82 N31
AA13 VSS_NCTF65 VCC_NCTF65 Y18 H9 VSS211 VSS81 P31
L14 VSS_NCTF64 VCC_NCTF64 L19 K9 VSS210 VSS80 R31
M14 VSS_NCTF63 VCC_NCTF63 M19 T9 VSS209 VSS79 T31
N14 VSS_NCTF62 VCC_NCTF62 N19 V9 VSS208 VSS78 U31
P14 VSS_NCTF61 VCC_NCTF61 P19 AA9 VSS207 VSS77 V31
R14 VSS_NCTF60 VCC_NCTF60 R19 AC9 VSS206 VSS76 W31
T14 VSS_NCTF59 VCC_NCTF59 Y19 AE9 VSS205 VSS75 AD31
U14 VSS_NCTF58 VCC_NCTF58 L20 AH9 VSS204 VSS74 AG31
V14 VSS_NCTF57 VCC_NCTF57 M20 AN9 VSS203 VSS73 AL31
W14 N20 D10 A32
VSS
VSS_NCTF56 VCC_NCTF56 VSS202 VSS72

Y14 VSS_NCTF55 VCC_NCTF55 P20 L10 VSS201 VSS71 C32
AA14 VSS_NCTF54 VCC_NCTF54 R20 Y10 VSS200 VSS70 Y32
C
C
AB14 Y20 AA10 AA32

NCTF
VSS_NCTF53 VCC_NCTF53 VSS199 VSS69

L15 VSS_NCTF52 VCC_NCTF52 L21 F11 VSS198 VSS68 AB32
M15 VSS_NCTF51 VCC_NCTF51 M21 H11 VSS197 VSS67 AC32
N15 VSS_NCTF50 VCC_NCTF50 N21 Y11 VSS196 VSS66 AD32
P15 VSS_NCTF49 VCC_NCTF49 P21 AA11 VSS195 VSS65 AJ32
R15 VSS_NCTF48 VCC_NCTF48 T21 AF11 VSS194 VSS64 AN32
T15 VSS_NCTF47 VCC_NCTF47 U21 AG11 VSS193 VSS63 D33
U15 VSS_NCTF46 VCC_NCTF46 V21 AJ11 VSS192 VSS62 E33
V15 VSS_NCTF45 VCC_NCTF45 W21 AL11 VSS191 VSS61 F33
W15 VSS_NCTF44 VCC_NCTF44 L22 AN11 VSS190 VSS60 G33
Y15 VSS_NCTF43 VCC_NCTF43 M22 B12 VSS189 VSS59 H33
AA15 VSS_NCTF42 VCC_NCTF42 N22 D12 VSS188 VSS58 J33
AB15 VSS_NCTF41 VCC_NCTF41 P22 J12 VSS187 VSS57 K33
L16 VSS_NCTF40 VCC_NCTF40 R22 A14 VSS186 VSS56 L33
M16 VSS_NCTF39 VCC_NCTF39 T22 B14 VSS185 VSS55 M33
N16 VSS_NCTF38 VCC_NCTF38 U22 F14 VSS184 VSS54 N33
P16 VSS_NCTF37 VCC_NCTF37 V22 J14 VSS183 VSS53 P33
R16 VSS_NCTF36 VCC_NCTF36 W22 K14 VSS182 VSS52 R33
T16 VSS_NCTF35 VCC_NCTF35 L23 AG14 VSS181 VSS51 T33
U16 VSS_NCTF34 VCC_NCTF34 M23 AJ14 VSS180 VSS50 U33
V16 VSS_NCTF33 VCC_NCTF33 N23 AL14 VSS179 VSS49 V33
W16 VSS_NCTF32 VCC_NCTF32 P23 AN14 VSS178 VSS48 W33
Y16 VSS_NCTF31 VCC_NCTF31 R23 C15 VSS177 VSS47 AD33
AA16 VSS_NCTF30 VCC_NCTF30 T23 K15 VSS176 VSS46 AF33
AB16 VSS_NCTF29 VCC_NCTF29 U23 A16 VSS175 VSS45 AL33
R17 VSS_NCTF28 VCC_NCTF28 V23 D16 VSS174 VSS44 C34
Y17 VSS_NCTF27 VCC_NCTF27 W23 H16 VSS173 VSS43 AA34
AA17 VSS_NCTF26 VCC_NCTF26 L24 K16 VSS172 VSS42 AB34
AB17 VSS_NCTF25 VCC_NCTF25 M24 AL16 VSS171 VSS41 AC34
AA18 VSS_NCTF24 VCC_NCTF24 N24 C17 VSS170 VSS40 AD34
AB18 VSS_NCTF23 VCC_NCTF23 P24 G17 VSS169 VSS39 AH34
AA19 VSS_NCTF22 VCC_NCTF22 R24 AF17 VSS168 VSS38 AN34
AB19 VSS_NCTF21 VCC_NCTF21 T24 AJ17 VSS167 VSS37 B35
D
D
AA20 VSS_NCTF20 VCC_NCTF20 U24 AN17 VSS166 VSS36 D35

AB20 VSS_NCTF19 VCC_NCTF19 V24 A18 VSS165 VSS35 E35
R21 VSS_NCTF18 VCC_NCTF18 W24 B18 VSS164 VSS34 F35
Y21 VSS_NCTF17 VCC_NCTF17 L25 U18 VSS163 VSS33 G35
AA21 VSS_NCTF16 VCC_NCTF16 M25 AL18 VSS162 VSS32 H35
AB21 VSS_NCTF15 VCC_NCTF15 N25 C19 VSS161 VSS31 J35
Y22 VSS_NCTF14 VCC_NCTF14 P25 H19 VSS160 VSS30 K35
AA22 VSS_NCTF13 VCC_NCTF13 R25 J19 VSS159 VSS29 L35
AB22 VSS_NCTF12 VCC_NCTF12 T25 T19 VSS158 VSS28 M35
Y23 VSS_NCTF11 VCC_NCTF11 U25 W19 VSS157 VSS27 N35
AA23 VSS_NCTF10 VCC_NCTF10 V25 AG19 VSS156 VSS26 P35
AB23 VSS_NCTF9 VCC_NCTF9 W25 AN19 VSS155 VSS25 R35
A3
Y24 VSS_NCTF8 VCC_NCTF8 L26 A20 VSS154 VSS24 T35

Title
Size
AA24 VSS_NCTF7 VCC_NCTF7 M26 D20 VSS153 VSS23 U35

AB24 VSS_NCTF6 VCC_NCTF6 N26 E20 VSS152 VSS22 V35
Y25 VSS_NCTF5 VCC_NCTF5 P26 F20 VSS151 VSS21 W35
AA25 VSS_NCTF4 VCC_NCTF4 R26 G20 VSS150 VSS20 Y35
<Core Design>
AB25 VSS_NCTF3 VCC_NCTF3 T26 V20 VSS149 VSS19 AE35

Y26 VSS_NCTF2 VCC_NCTF2 U26 AK20 VSS148 VSS18 C36
AA26 VSS_NCTF1 VCC_NCTF1 V26 C21 VSS147 VSS17 AA36
AB26 VSS_NCTF0 VCC_NCTF0 W26 F21 VSS146 VSS16 AB36
AF21 VSS145 VSS15 AC36
AN21 AD36
Document Number
VSS144 VSS14
A22 AE36
Date: Thursday, July 07, 2005
VSS143 VSS13
D22 VSS142 VSS12 AF36
E22 VSS141 VSS11 AJ36
J22 VSS140 VSS10 AL36
AH22 AN36
CORE_GMCH_S0
VSS139 VSS9
AL22 VSS138 VSS8 E37
H23 VSS137 VSS7 H37
AF23 VSS136 VSS6 K37
B24 VSS135 VSS5 M37
Leopard2
D24 P37
E
E
VSS134 VSS4
F24 T37
Sheet
VSS133 VSS3
GMCH (5 of 5)
J24 VSS132 VSS2 V37

AG24 VSS131 VSS1 Y37
10
AJ24 VSS130 VSS0 AG37

of
47
Rev
-1
Wistron Corporation
1
2
3
4
A B C D E
8,12 M_B_A[13..0] DM2 8,12 M_A_A[13..0] DM1

M_B_A0 102 108 M_A_A0 102 108
A0 /RAS M_B_RAS# 8,12 A0 /RAS M_A_RAS# 8,12
M_B_A1 101 109 M_A_A1 101 109
A1 /WE M_B_WE# 8,12 A1 /WE M_A_WE# 8,12
M_B_A2 100 113 M_A_A2 100 113
A2 /CAS M_B_CAS# 8,12 A2 /CAS M_A_CAS# 8,12
M_B_A3 99 M_A_A3 99
M_B_A4 A3 M_A_A4 A3
98 A4 /CS0 110 M_CS#2 7,12 98 A4 /CS0 110 M_CS#0 7,12
M_B_A5 97 115 M_A_A5 97 115
A5 /CS1 M_CS#3 7,12 A5 /CS1 M_CS#1 7,12
M_B_A6 94 M_A_A6 94
M_B_A7 A6 M_A_A7 A6
92 A7 CKE0 79 M_CKE2 7,12 92 A7 CKE0 79 M_CKE0 7,12
M_B_A8 93 80 M_A_A8 93 80
A8 CKE1 M_CKE3 7,12 A8 CKE1 M_CKE1 7,12
M_B_A9 91 M_A_A9 91
4
M_B_A10 A9 M_A_A10 A9 4
105 A10/AP CK0 30 M_CLK_DDR3 7 105 A10/AP CK0 30 M_CLK_DDR0 7
M_B_A11 90 32 M_A_A11 90 32
A11 /CK0 M_CLK_DDR#3 7 A11 /CK0 M_CLK_DDR#0 7
M_B_A12 89 M_A_A12 89
M_B_A13 A12 M_A_A13 A12
116 A13 CK1 164 M_CLK_DDR4 7 116 A13 CK1 164 M_CLK_DDR1 7
86 A14 /CK1 166 M_CLK_DDR#4 7 86 A14 /CK1 166 M_CLK_DDR#1 7
84 A15 M_B_DM[7..0] 8 84 A15 M_A_DM[7..0] 8
85 10 M_B_DM0 85 10 M_A_DM0
8,12 M_B_BS#2 A16/BA2 DM0 8,12 M_A_BS#2 A16/BA2 DM0
26 M_B_DM1 26 M_A_DM1
DM1 M_B_DM2 DM1 M_A_DM2
8,12 M_B_BS#0 107 BA0 DM2 52 8,12 M_A_BS#0 107 BA0 DM2 52
106 67 M_B_DM3 106 67 M_A_DM3
8,12 M_B_BS#1 BA1 DM3 8,12 M_A_BS#1 BA1 DM3
130 M_B_DM4 130 M_A_DM4
M_B_DQ0 DM4 M_B_DM5 M_A_DQ0 DM4 M_A_DM5
5 DQ0 DM5 147 5 DQ0 DM5 147
M_B_DQ1 7 170 M_B_DM6 M_A_DQ1 7 170 M_A_DM6
8 M_B_DQ[63..0] DQ1 DM6 8 M_A_DQ[63..0] DQ1 DM6
M_B_DQ2 17 185 M_B_DM7 M_A_DQ2 17 185 M_A_DM7
M_B_DQ3 DQ2 DM7 M_A_DQ3 DQ2 DM7
19 DQ3 19 DQ3
M_B_DQ4 4 195 M_A_DQ4 4 195 SMBD_ICH
DQ4 SDA SMBD_ICH 3,24 DQ4 SDA
M_B_DQ5 6 197 M_A_DQ5 6 197 SMBC_ICH
DQ5 SCL SMBC_ICH 3,24 DQ5 SCL
M_B_DQ6 14 M_A_DQ6 14
M_B_DQ7 DQ6 M_A_DQ7 DQ6
16 DQ7 VDDSPD 199 3D3V_S0 16 DQ7 VDDSPD 199 3D3V_S0
M_B_DQ8 23 M_A_DQ8 23
DQ8 DQ8
1
M_B_DQ9 25 198 M_A_DQ9 25 198
M_B_DQ10 DQ9 SA0 BC122 C547 M_A_DQ10 DQ9 SA0 BC44 C220
35 200 1 2 35 200
M_B_DQ11 37
DQ10 SA1 R229 10KR2 3D3V_S0 SCD1U16V SC2D2U6D3V3MX-1 M_A_DQ11 37
DQ10 SA1 SCD1U16V SC2D2U6D3V3MX-1
2
DQ11 DQ11
1
M_B_DQ12 20 50 DY M_A_DQ12 20 50 DY
M_B_DQ13 DQ12 NC#50 R230 M_A_DQ13 DQ12 NC#50 R175 R176
22 DQ13 NC#69 69 22 DQ13 NC#69 69
M_B_DQ14 36 83 10KR2 M_A_DQ14 36 83 10KR2 10KR2
M_B_DQ15 DQ14 NC#83 M_A_DQ15 DQ14 NC#83
38 DQ15 NC#120 120 38 DQ15 NC#120 120
M_B_DQ16 43 163 M_A_DQ16 43 163
2
M_B_DQ17 DQ16 NC#163/TEST M_A_DQ17 DQ16 NC#163/TEST
45 DQ17 45 DQ17
M_B_DQ18 55 M_A_DQ18 55
57 DQ19 VDD 81 57 DQ19 VDD 81
3 M_B_DQ20 44 82 M_A_DQ20 44 82 3
M_B_DQ21 DQ20 VDD M_A_DQ21 DQ20 VDD
46 DQ21 VDD 87 46 DQ21 VDD 87
M_B_DQ22 56 88 M_A_DQ22 56 88
58 95 58 95
NORMAL TYPE
61 DQ24 VDD 96 61 DQ24 VDD 96
M_B_DQ25 63 103 M_A_DQ25 63 103
73 DQ26 VDD 104 73 DQ26 VDD 104
M_B_DQ27 75 111 M_A_DQ27 75 111
62 112 62 112
NORMAL TYPE

64 DQ29 VDD 117 64 DQ29 VDD 117
M_B_DQ30 74 118 M_A_DQ30 74 118
DQ30 VDD 1D8V_S3 DQ30 VDD 1D8V_S3
M_B_DQ31 76 M_A_DQ31 76
123 DQ32 VSS 3 123 DQ32 VSS 3
M_B_DQ33 125 8 M_A_DQ33 125 8
M_B_DQ34 DQ33 VSS M_A_DQ34 DQ33 VSS
135 DQ34 VSS 9 135 DQ34 VSS 9
M_B_DQ35 137 12 M_A_DQ35 137 12
M_B_DQ37
124 DQ36 VSS 15
M_A_DQ37
124 DQ36 VSS 15 Place near DM2
126 DQ37 VSS 18 126 DQ37 VSS 18
M_B_DQ38 134 21 M_A_DQ38 134 21
M_B_DQ39 DQ38 VSS M_A_DQ39 DQ38 VSS M_CLK_DDR0
M_B_DQ40
136 DQ39 VSS 24 Place near DM1 M_A_DQ40
136 DQ39 VSS 24
141 DQ40 VSS 27 141 DQ40 VSS 27
1
M_B_DQ41 143 28 M_A_DQ41 143 28
M_B_DQ42 DQ41 VSS M_CLK_DDR4 M_A_DQ42 DQ41 VSS C511
151 DQ42 VSS 33 151 DQ42 VSS 33
M_B_DQ43 M_A_DQ43 SC10P50V2JN-1
153 34 153 34 DY
2
M_B_DQ44 DQ43 VSS 1
M_A_DQ44 DQ43 VSS M_CLK_DDR#0
140 DQ44 VSS 39 140 DQ44 VSS 39
M_B_DQ45 142 40 C231 M_A_DQ45 142 40
M_B_DQ46 DQ45 VSS SC10P50V2JN-1 M_A_DQ46 DQ45 VSS M_CLK_DDR1
152 41 DY 152 41
2
M_B_DQ47 DQ46 VSS M_CLK_DDR#4 M_A_DQ47 DQ46 VSS

154 DQ47 VSS 42 154 DQ47 VSS 42
1
M_B_DQ48 157 47 M_A_DQ48 157 47
M_B_DQ49 DQ48 VSS M_CLK_DDR3 M_A_DQ49 DQ48 VSS C510
159 DQ49 VSS 48 159 DQ49 VSS 48
M_B_DQ50 M_A_DQ50 SC10P50V2JN-1
173 53 173 53 DY
2
DQ50 VSS DQ50 VSS
1
M_B_DQ51 175 54 M_A_DQ51 175 54 M_CLK_DDR#1

2
M_B_DQ52 DQ51 VSS C244 M_A_DQ52 DQ51 VSS 2
158 DQ52 VSS 59 158 DQ52 VSS 59
M_B_DQ53 SC10P50V2JN-1 M_A_DQ53
160 60 DY 160 60
2
M_B_DQ54 DQ53 VSS M_CLK_DDR#3 M_A_DQ54 DQ53 VSS

174 DQ54 VSS 65 174 DQ54 VSS 65
M_B_DQ55 176 66 M_A_DQ55 176 66
179 DQ56 VSS 71 179 DQ56 VSS 71
M_B_DQ57 181 72 M_A_DQ57 181 72
189 DQ58 VSS 77 189 DQ58 VSS 77
M_B_DQ59 191 78 M_A_DQ59 191 78
180 DQ60 VSS 121 180 DQ60 VSS 121
M_B_DQ61 182 122 M_A_DQ61 182 122
192 DQ62 VSS 127 192 DQ62 VSS 127
M_B_DQ63 194 128 M_A_DQ63 194 128
DQ63 VSS DQ63 VSS
VSS 132 VSS 132
M_B_DQS#0 11 133 M_A_DQS#0 11 133
M_B_DQS#1 /DQS0 VSS M_A_DQS#1 /DQS0 VSS
8 M_B_DQS#[7..0] 29 /DQS1 VSS 138 8 M_A_DQS#[7..0] 29 /DQS1 VSS 138
M_B_DQS#2 49 139 M_A_DQS#2 49 139
68 /DQS3 VSS 144 68 /DQS3 VSS 144
M_B_DQS#4 129 145 M_A_DQS#4 129 145
146 /DQS5 VSS 149 146 /DQS5 VSS 149
M_B_DQS#6 167 150 M_A_DQS#6 167 150
186 /DQS7 VSS 155 186 /DQS7 VSS 155
VSS 156 VSS 156
M_B_DQS0 13 161 M_A_DQS0 13 161
M_B_DQS1 DQS0 VSS M_A_DQS1 DQS0 VSS
8 M_B_DQS[7..0] 31 DQS1 VSS 162 8 M_A_DQS[7..0] 31 DQS1 VSS 162
M_B_DQS2 51 165 M_A_DQS2 51 165
70 DQS3 VSS 168 70 DQS3 VSS 168
M_B_DQS4 131 171 M_A_DQS4 131 171
148 DQS5 VSS 172 148 DQS5 VSS 172
M_B_DQS6 169 177 M_A_DQS6 169 177
188 DQS7 VSS 178 188 DQS7 VSS 178
VSS 183 VSS 183
1 114 184 114 184 1
7,12 M_ODT2 ODT0 VSS 7,12 M_ODT0 ODT0 VSS <Core Design>
7,12 M_ODT3 119 ODT1 VSS 187 7,12 M_ODT1 119 ODT1 VSS 187
VSS 190 VSS 190
1 193 1 193
DDR_VREF_S3
2
VREF
VSS
VSS
VSS 196
DDR_VREF_S3
2
VREF
VSS
VSS
VSS 196 Wistron Corporation
1
SB SB 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

BC123 202 201 BC43 202 201 Taipei Hsien 221, Taiwan, R.O.C.
C548 SCD1U16V GND GND C205 SCD1U16V GND GND
2
SC2D2U6D3V3MX-1 DDR2-200P-4 High 9.2mm SC2D2U6D3V3MX-1 DDR2-200P-5 Title
DDR2 Socket
Low5.2 mm Size Document Number Rev
Hi 9.2 mm Custom
Leopard2 -1
A B C D E
A B C D E
PARALLEL TERMINATION Decoupling Capacitor

Put decap near power(0.9V) and pull-up resistor
Put decap near power(0.9V)
DDR_VREF
and pull-up resistor
4 M_A_A[13..0] 8,11 4
DDR_VREF
1
RN28
M_B_A[13..0] 8,11
8 1 M_B_A10 C499 C554 C500 C501 C502 C551 C503 C555 C493 C497 C498 C494 C562
7 2 M_B_A11 SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
2
6 3 M_B_BS#1 8,11
5 4 M_B_A1 DY DY DY DY DY DY
R561 1SRN56-1 2 56R2J
M_CS#1 7,11
R608 1 2 56R2J
M_CS#3 7,11
R562 1 56R2J 2 M_A_A12
1
R609 1 56R2J 2 M_B_A3
C553 C550 C556 C492 C557 C558 C552 C495 C496 C504 C559 C560 C561
RN30 8 1 SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
M_B_BS#2 8,11
2
7 2 M_B_A0
6 3 M_B_A2 DY DY
5 4 M_B_A7
RN26 SRN56-1
8 1 M_ODT2 7,11
7 2 M_B_A13
6 3 M_ODT3 7,11
5 4 M_CS#2 7,11 1D8V_S3
SRN56-1 Place these Caps near DM1
RN27
8 1 M_B_RAS# 8,11
1
7 2 M_B_CAS# 8,11
3 6 3 C193 C204 C203 C200 C190 3
M_B_WE# 8,11 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1
5 4 M_B_BS#0 8,11
2
SRN56-1
RN31
8 1 M_CKE2 7,11
7 2 M_B_A4
1
6 3 M_B_A6
5 4 C201 C191 C192 C202
M_CKE3 7,11 SCD1U16V SCD1U16V SCD1U16V SCD1U16V
2
SRN56-1
RN29
DY DY DY DY
8 1 M_B_A5
7 2 M_B_A8
6 3 M_B_A9
5 4 M_B_A12
SRN56-1 1D8V_S3
Place these Caps near DM2
RN15
8 1 M_A_A8
7 2 M_A_A1
1
6 3 M_A_A4
5 4 M_A_A2 C236 C240 C243 C232 C234
SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1 SC2D2U6D3V3MX-1
2
SRN56-1
2 RN13 2
8 1 M_CS#0 7,11
7 2 M_ODT0 7,11
6 3 M_A_A13 1
1
5 4 M_A_A10
C233 C235 C241 C242
SRN56-1 SCD1U16V SCD1U16V SCD1U16V SCD1U16V
2
2
RN14 DY DY DY DY
8 1 M_A_A0
7 2 M_A_A3
6 3 M_A_BS#1 8,11
5 4 M_A_RAS# 8,11
SRN56-1
RN16
8 1 M_A_A5
7 2 M_A_A11
6 3 M_A_A7
5 4 M_A_A6
SRN56-1
RN17
8 1 M_CKE0 7,11
7 2 M_A_BS#2 8,11
6 3 M_CKE1 7,11 <Core Design>
1 5 4 M_A_A9 1
SRN56-1
Wistron Corporation
RN12 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
8 1 Taipei Hsien 221, Taiwan, R.O.C.
M_A_WE# 8,11
7 2 M_A_BS#0 8,11
6 3 Title
M_A_CAS# 8,11
5 4 M_ODT1 7,11
DDR2 Termination Resistor
SRN56-1 Size Document Number Rev
A3
Leopard2 -1
A B C D E
A B C D E
U20A SB
1 OF 6
3D3V_S0 VGA_GPIO14
DY
1 2 VGA_ALERT# 25
PEG_TXP0 AH30 AJ5 VGA_GPIO0 R654 0R2-0
PEG_TXN0 PCIE_RX0P GPIO_0 VGA_GPIO1
AG30 PCIE_RX0N GPIO_1 AH5
2
PEG_TXP1 AG29 AJ4 VGA_GPIO2
R472 PEG_TXN1 PCIE_RX1P GPIO_2 VGA_GPIO3 R653
AF29 PCIE_RX1N GPIO_3 AK4 DVOMODE=VSS 3.3V MODE
0R5J-1 PEG_TXP2 AE29 AH4 VGA_GPIO4 0R2-0
P2779A_XIN PEG_TXN2 PCIE_RX2P GPIO_4 VGA_GPIO5
U57 PEG_TXP3
AE30 PCIE_RX2N GPIO_5 AF4
VGA_GPIO6
DVOMODE=VDDC to 1.8V 1.8V MODE
AD30 AJ3
1
PCIE_RX3P GPIO_6
1
2
X5 PEG_TXN3 AD29 AK3 VGA_GPIO7 ATI_MODE_0 DVOMODE=GND NO USE DVPDATA
PCIE_RX3N GPIO_7
1
R443 1 8 3D3V_SS_S0 PEG_TXP4 AC29 AH3 VGA_GPIO8

BC95 1MR2 XIN/CLKIN VDD P2779A_REF PEG_TXN4 PCIE_RX4P GPIO_8 VGA_GPIO9
2 XOUT REF 7 AB29 PCIE_RX4N GPIO_9 AJ2
1
SC22P XTAL-27MHZ-3-U1 3 6 VGA_GPIO16 PEG_TXP5 AB30 AH2 VGA_GPIO10 STRAPS PIN DEFAULT
2
1 PD# MODOUT PCIE_RX5P GPIO_10

4 P2779A_XOUT 4 5 C360 PEG_TXN5 AA30 AH1 VGA_GPIO11 4
2
LF VSS SCD1U16V PEG_TXP6 PCIE_RX5N GPIO_11 VGA_GPIO12

AA29 AG3
2
PCIE_RX6P GPIO_12
1
PEG_TXN6 Y29 AG1 VGA_GPIO13 CAL_BG_BACKUP GPIO0 0
BC90 P2779A-08ST PEG_TXP7 PCIE_RX6N GPIO_13 VGA_GPIO14
W29 AG2
DVO / EXT TMDS / GPIO

SC6P50V3DN R444 PEG_TXN7 PCIE_RX7P GPIO_14
W30 PCIE_RX7N GPIO_17 C6 ATI_MODE_0 15 PLL_CAL_FORCE_EN GPIO1 0
182R3F PEG_TXP8 V30
PEG_TXN8 PCIE_RX8P
V29 AF3 VGA_PWRCNTL 45 PCIE_MODE(1:0) GPIO(3:2) 00
2
PCIE_RX8N GPIO_PWRCNTL
1 2 P2779A_LF XTALIN_M24 PEG_TXP9 U29 PCIE_RX9P GPIO_MEMSSIN AF2 VGA_GPIO16
R56 620R3F PEG_TXN9 T29 CAL_OFF GPIO4 0
PCIE_RX9N
1
1
C65 PEG_TXP10 T30 AE10 DVOMODE 1 2
C64 R474 PEG_TXN10 PCIE_RX10P DVOVMODE R515 0R2-0
R30 PCIE_RX10N BYPASS_PLL GPIO5 0
SCD1U16V3KX SC270P50V 105R3F PEG_TXP11 R29 AH6 DVPDATA_0 15
2
2
PEG_TXN11 PCIE_RX11P DVPDATA_0
P29 PCIE_RX11N DVPDATA_1 AJ6 DVPDATA_1 15 ICOMP GPIO6 0
PEG_TXP12
adjust SWING at 1.2v N29 AK6 DVPDATA_2 15
2
N30 PCIE_RX12N DVPDATA_3 AH7 DEBUG_ACCESS GPIO8 0
PEG_TXP13 M30 AK7
PEG_TXN13 PCIE_RX13P DVPDATA_4 GPIO(9,13:11)
M29 PCIE_RX13N DVPDATA_5 AJ7 ROMIDCFG(3:0) 0000
PEG_TXP14 L29 AH8
K29 PCIE_RX14N DVPDATA_7 AJ8
PEG_TXP15 K30 AH9 MULTIFUNC(1:0) LCDDATA(17:16) 00
J30 PCIE_RX15N DVPDATA_9 AJ9
SCD1U16V AK9 VIP_DEVICE LCDDATA(20) 0
PEG_RXP0 C110 1 RXP0 DVPDATA_10
2 AF26 PCIE_TX0P DVPDATA_11 AH10
PEG_RXN0 C109 1 2 RXN0 AE26 AE6 DWNGR0 LCDDATA(21) 0
PCIE_TX0N DVPDATA_12
PCI EXPRESS
PEG_RXP1 C391 1 2 RXP1 AC25 AG6 (internal pull-down)
7 PEG_TXP[15..0] PCIE_TX1P DVPDATA_13
PEG_RXN1 C392 1 2 RXN1 AB25 AF6
PEG_RXP2 C111 1 RXP2 PCIE_TX1N DVPDATA_14
7 PEG_TXN[15..0] 2 AC27 PCIE_TX2P DVPDATA_15 AE7 ATI Ref. Datasheets(page 3-32)
PEG_RXN2 C112 1 2 RXN2 AB27 AF7 SB
PEG_RXP3 C393 1 2 RXP3 AC26
PCIE_TX2N DVPDATA_16
AE8 DY DOC.NO.:CHS-216M24-03
PEG_RXN3 C390 1 RXN3 PCIE_TX3P DVPDATA_17 R4351
3
7 PEG_RXP[15..0] 2 AB26 PCIE_TX3N DVPDATA_18 AG8 20R2-0 EDID_DAT GPIO[0..13] are internal 3
PEG_RXP4 C120 1 2 RXP4 Y25 AF8 R4341 20R2-0 EDID_CLK
PEG_RXN4 C121 1 2 RXN4 W25
PCIE_TX4P DVPDATA_19
AE9 DY pull-down.
7 PEG_RXN[15..0] PCIE_TX4N DVPDATA_20 3D3V_S0
PEG_RXP5 C412 1 2 RXP5 Y27 AF9 3D3V_S0
PEG_RXN5 C414 1 RXN5 PCIE_TX5P DVPDATA_21
2 W27 PCIE_TX5N DVPDATA_22 AG10
PEG_RXP6 C123 1 2 RXP6 Y26 AF10 3D3V_S0 VGA_GPIO0 1 2
EDID_CLK 19,25 PCIE_TX6P DVPDATA_23
1
3D3V_S0 PEG_RXN6 C122 1 2 RXN6 W26 R82 10KR2
3D3V_S0 EDID_DAT 19,25 PCIE_TX6N
PEG_RXP7 C413 1 2 RXP7 U25 AJ10 DVPCNTL_0 1 2R78 0R2-0 R508
PEG_RXN7 C411 1 RXN7 PCIE_TX7P DVPCNTL_0
2 T25 PCIE_TX7N DVPCNTL_1 AK10 DVPCNTL_1 1 2R77 0R2-0 100R2F 3D3V_S0
1
PEG_RXP8 C137 1 2 RXP8 U27 AJ11 DVPCNTL_2 1 2R75 0R2-0

PCIE_TX8P DVPCNTL_2
1
R481 PEG_RXN8 C134 1 2 RXN8 T27 AH11 DVPCNTL_3 1 2R76 0R2-0
2
PCIE_TX8N DVPCNTL_3
1
R504 DUMMY-R2 3D3V_S0 PEG_RXP9 C435 1 2 RXP9 U26
10KR2 PEG_RXN9 C436 1 RXN9 PCIE_TX9P ATI_VREFG R509
2 T26 PCIE_TX9N VREFG AG4
PEG_RXP10C135 1 2 RXP10 P25 DUMMY-R2
PCIE_TX10P
1
PEG_RXN10 C133 1 2 RXN10 N25 AH15 TXAOUT0- 19
2
PCIE_TX10N TXOUT_L0N
1
1
STERE0SYNC PWRGD_MASK PEG_RXP11C433 1 2 RXP11 P27 AH16 C381 R507
PCIE_TX11P TXOUT_L0P TXAOUT0+ 19
PEG_RXN11 C434 1 2 RXN11 N27 AJ16 100R2F
TXAOUT1- 19
2
PCIE_TX11N TXOUT_L1N
1
R505 R506 PEG_RXP12C136 1 2 RXP12 P26 AJ17 SCD1U16V VGA_GPIO2 1 DY 2

TXAOUT1+ 19
2
R503 R480 4K7R2 4K7R2 PEG_RXN12 C146 1 RXN12 PCIE_TX12P TXOUT_L1P R85 10KR2
2 N26 AJ18 TXAOUT2- 19
2
DUMMY-R2 0R2-0 PEG_RXP13C455 1 RXP13 PCIE_TX12N TXOUT_L2N VGA_GPIO4
2 L25 AK18 TXAOUT2+ 19 1 DY 2
2
PEG_RXN13 C456 1 RXN13 PCIE_TX13P TXOUT_L2P R516 10KR2

2 K25 PCIE_TX13N TXOUT_L3N AJ20
PEG_RXP14C145 1 2 RXP14 L27 AJ21 VGA_GPIO1 1 DY 2
DDC3_CLK 19,25
1
PEG_RXN14 C147 1 RXN14 PCIE_TX14P TXOUT_L3P R83 10KR2

2 K27 AK19
LVDS
DDC3_DATA 19,25 TXACLK- 19
2
PEG_RXP15C454 1 RXP15 PCIE_TX14N TXCLK_LN VGA_GPIO11

2 L26 PCIE_TX15P TXCLK_LP AJ19 TXACLK+ 19 1 DY 2
ATI suggest 0 ohm PEG_RXN15 C457 1 2 RXN15 K26 AG16 R100 10KR2
PCIE_TX15N TXOUT_U0N TXBOUT0- 19
AG17 VGA_GPIO13 1 DY 2
TXOUT_U0P TXBOUT0+ 19 10KR2
AF27 AF16 R107
3 CLK_PCIE_PEG PCIE_REFCLKP TXOUT_U1N TXBOUT1- 19
AE27 AF17 VGA_GPIO12 1 DY 2
3 CLK_PCIE_PEG# PCIE_REFCLKN TXOUT_U1P TXBOUT1+ 19 10KR2
1D2V_VDDR_S0 AE18 R510
2 TXOUT_U2N TXBOUT2- 19 2
1 2R447 150R2F PEG_CALRP AC23 PCIE_CALRP TXOUT_U2P AE19 TXBOUT2+ 19
VGA_GPIO10 1 DY 2
3D3V_S0 2R520 100R2F PEG_CALRN R106 10KR2
DY 1 AB24 PCIE_CALRN TXOUT_U3N AF19
U62 1 2R448 10KR2F-U PEG_CALI AB23 PCIE_CALI TXOUT_U3P AF20 VGA_GPIO6 1 DY 2
1 R525 2 1 5 AG19 R87 10KR2
22 M24_RST# A VCC TXCLK_UN TXBCLK- 19
0R2-0 1 2 PEG_TESTIN AE25 AG20 VGA_GPIO9 1 DY 2
PCIE_TEST TXCLK_UP TXBCLK+ 19 10KR2
7,24,26 PLT_RST1# 1 R524 2 2 B
R98 10KR2 R101
0R2-0 PERSTB AD25 AE12 VGA_GPIO5 1 DY 2
PERSTB DIGON LCDVDD_ON 19 10KR2
3 4 PERSTB PWRGD_MASK AD24 AG12 R517
GND Y PERSTB_MASK BLON BL_ON 36
VGA_GPIO7 1 DY 2
1
NC7S08-U 1 2 ATI_R2SET AH21 AK13 R86 10KR2
R502 715R3 R2SET TX0M R513 VGA_GPIO8
TX0P AJ13 1 DY 2
AK21 AJ14 10KR2 R511 10KR2
18 LUMA_VGA Y_G TX1M
AJ22 AJ15 VGA_GPIO3 1 DY 2
18 CRMA_VGA C_R_PR TX1P 10KR2
AK22 AK15 R84
18 COMP_VGA
2
COMP_B_PB TX2M
TX2P AK16
2
DDC_CLK & DATA level shift AJ24 AJ12
DAC2
H2SYNC TXCM
TMDS
AK24 AK12 R478 R477 R479
V2SYNC TXCP
1
150R2 150R2 150R2

R71 R73 R74 DDC3_CLK AG22 AE13
3D3V_S0 3D3V_S0 3D3V_S0 150R2 150R2 150R2 DDC3_DATA DDC3CLK DDC2CLK
AG23 AE14
1
DDC3DATA DDC2DATA
0703 -1
AF12 HPD 1 2
2
HPD1
1
1 2 ATI_SSIN AJ23 R514 100KR2

R445 R446 R57 R70 SSIN
1 210KR2 ATI_SSOUT AH24 AK27
SS
0R2-0 10KR2 SSOUT R VGA_RED 20

4K7R2 4K7R2 R501 AJ27
G VGA_GREEN 20
B AJ26 VGA_BLUE 20
XTALIN_M24 AH28
2
XTALIN
HSYNC AJ25 VGA_HSYNC <Core
20 Design>
1 AJ29 XTALOUT VSYNC AK25 VGA_VSYNC 20 1
DAC1
1
G
Q37 AH26 ATI_RSET 1 2

VGA_DDCDATA 2 3 2N7002 DDC_DATA DDC_DATA 20 1 2R99 1KR2 TESTEN AH27 TESTEN
RSET R499 499R3F Wistron Corporation
1 2R537 1KR2 TEST_YCLK E8 AG25 VGA_DDCDATA 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
CLK
TEST_YCLK DDC1DATA
S
1 2R138 1KR2 TEST_MCLK B6 TEST_MCLK DDC1CLK AF24 VGA_DDCCLK Taipei Hsien 221, Taiwan, R.O.C.
AF25 PLLTEST
AG24 GPIO_AUXWIN 1 2 Title
THERM
GPIO_AUXWIN
1
STERE0SYNC R500 4K7R2

G
Q38 2N7002
AH25 STEREOSYNC
AF11
ATI(1 of 3)
DPLUS THERMDP_M24 25
VGA_DDCCLK 2 3 DDC_CLK AE11 Size Document Number Rev
DDC_CLK 20 DMINUS THERMDN_M24 25
A3
Leopard2 -1
S
M26-P-1 Date: Monday, July 11, 2005 Sheet 13 of 47
A B C D E
A B C D E
VRAM_VDDQ
1.8V 1D2V_VGA_S0
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
U20D 4 OF 6
SC10U10V6ZY-U
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
1.2V
1
1
A15 VDDR1 VDDC AC13
1
A21 VDDR1 VDDC AC15
C458
C424
C400
C479
C468
C475
C469
C464
A28 AC17 3D3V_S0
2
2
VDDR1 VDDC
C444
C421
C445
C441
C442
C465
C446
C459
C462
A3 AD13
2
VDDR1 VDDC
1
A9 AD15 D7
VDDR1 VDDC SSM5818SL
DY AA1 VDDR1 DY DY DY DY
AA4 VDDR1 VDD15 AC11
4 AA7 AC20 3D3V_S0 1D2V_VGA_S0 4
VRAM_VDDQ VRAM_VDDQ VDDR1 VDD15
AA8 H11
2
VDDR1 VDD15 SSM5818SL 1D5V_1_S0 DIODE SUPPLIES POWER
AD4 VDDR1 VDD15 H20
SCD1U16V3KX
SCD01U16V3KX
SCD01U16V3KX
SCD01U16V3KX
B1 M23 SC TO VDDC RAIL
VDDR1 VDD15
SCD1U16V3KX
B30 P8 WHILE VDDC REGULATOR
VDDR1 VDD15 1.5V
1
D11 Y23 D9 DY 1D5V_VGA_S0C67 C68 STABALIZES DURING POWER ON
VDDR1 VDD15
1
1
C467 C422 C461 C486 D14 Y8 1 2 TC21
VDDR1 VDD15
C443
C463
C382
C470 D17 R669 0R2-0
SC10U10V6ZY-U
2
SC10U10V6ZY-U VDDR1
SE220U2VDM-6
SC1U10V3ZY
SC1U10V3ZY
SC1U10V3ZY
D20 AC19
2
2
VDDR1 VDDR3
D23 VDDR1 VDDR3 AC21 1 2 1D5V_S0
DY DY DY D26 AC22 R668 0R2-0
VDDR1 VDDR3
D5 AC8
DY LVDDR_2D8V D8
VDDR1
VDDR1
VDDR3
VDDR3 AD19 3.3V R60 1D2V_VGA_S0
E27 AD21 3D3V_VDDR3 1 2
VDDR1 VDDR3 3D3V_S0
SC 1D5V_VGA_S0
SC1U10V3ZY
SC1U10V3ZY
F4 VDDR1 VDDR3 AD7
1
G10 GAP-CLOSE-PWR
VDDR1
1
R417 G13 AC10 U83
VDDR1 VDDR4 3D3V_S0
C399
C418
C343 124KR2F C349 G15 AC9 C419 C98
2
3D3V_S0 SC22P SC1U10V3ZY VDDR1 VDDR4 SC47U6D3V0ZY
2 G19 AD10 2
2
VDDR1 VDDR4 SC22U10V6ZY-L1 VOUT
SC2D2U10V3ZY
G22 AD9 3
2
VDDR1 VDDR4 VIN
1
U55 2D8V_SET G27 AG7 3D3V_S0 1
G7
VDDR1
VDDR1
VDDR4 3.3V R58 DY
GND C619
1 5 LVDDR_2D8V 1 H10 AG26 3D3V_VDDR4 1 2
2
SHDN# SET R418 VDDR1 PCIE_VDDR_12 APL5308-15AC-TR
2 GND H13 VDDR1 PCIE_VDDR_12 AG27
1
1
100KR2F C66 C423 GAP-CLOSE-PWR 1D5V_1_S0
3 IN OUT 4 H15 VDDR1 PCIE_VDDR_12 AG28
1.2V SC
C344 H17 AJ30
SC1U10V3ZY VDDR1 PCIE_VDDR_12 SC10U10V6ZY-U SC1U10V3ZY
H19 AK29
2
2
VDDR1 PCIE_VDDR_12
G913C-U
SC1U10V3ZY
SC1U10V3ZY
SC1U10V3ZY
SC1U10V3ZY
H22 VDDR1 1.2V
1
J1 N23
3 J4
VDDR1 PCIE_PVDD_12
N24
DY 3
VDDR1 PCIE_PVDD_12
C466
C420
C417
C460
J7 P23
2
VDDR1 PCIE_PVDD_12
J8
K23
VDDR1
VDDR1 PCIE_PVDD_18 T23 1.8V
LVDDR_2D8V K24 U23
L4 VDDR1 PCIE_PVDD_18
L23 VDDR1 PCIE_PVDD_18 V23
1 2 LVDDR_2D8V_S0 L8 W23
MLB-201209-11 M4
VDDR1 PCIE_PVDD_18 1D2V_VDDR_S0 M26 Power UP Squence
VDDR1
1
C90 C397 N4 D9 R475

VDDR1 NC#D9 PCIE_VDDR 3D3_VDDR3 T1 < 1mS
N7 VDDR1 NC#D13 D13 1 2
C375
C362
C394
SCD01U16V3KX
SC10U10V6ZY-U SCD1U16V2KX-1
SC1U10V3ZY
SC1U10V3ZY
N8 D19
2
VDDR1 NC#D19
1
SCD1U10V2MX-1
EC119
GAP-CLOSE-PWR 3D3_VDDR4 T2 < 1mS
SC22U10V6ZY-L1
R1 VDDR1 NC#D25 D25
C361
1D8V_VGA_S0 R4 E4 PCIE_PVDD
L33 VDDR1 NC#E4 2D5_VDDR1 T3 < 1mS
T7 T4
2
LPVDD_1D8V VDDR1 NC#T4
1 2 T8 AB4
SC10U10V6ZY-U
MLB-201209-11 VDDR1 NC#AB4 PCIE_PVDD_1D8V 1D2_VDDC T4 < 1mS

DY
SC1U10V3ZY
SC1U10V3ZY
V4 VDDR1
1
1D2V_VDDR_S0
SC100P
V7 VDDR1
V8 AD22 VDD_15
VDDR1 AVSSQ
C365
C376
C377
C378
R126 T5 --
POWER
2
AF18 1 2
2.8V LVSSR PCIE_PVDD_18 T6 --
SC1U10V3ZY
SC1U10V3ZY
LVSSR AG15
1
C437
C440
GAP-CLOSE-PWR
SC22U10V6ZY-L1
AE16 LVDDR_25 LVSSR AG18
C144
1D8V_VGA_S0 PCIE_VDDR_12
AE17
AE15
LVDDR_25 I/O LVSSR AH17
/PCIE_PVDD_12
2
LVDDR_1D8V LVDDR_18
1 2 AF15
SC10U10V6ZY-U
R449 0R5J-1 LVDDR_18

SC1U10V3ZY
1
SC100P
AH18 T5 time delay between full PCIE_PVDD_18 and

1.8V AH19 LPVDD
LPVSS
TPVSS AH12 1D8V_VGA_S0 90% of PCIE_VDDR_12
C355
C354
C398
2D5V_S0 AH13 L28 T6 time delay between full PCIE_VDDR_12 and

2
2 TPVDD 90% of 1D2_VDDC 2
SCD01U16V3KX
SCD01U16V3KX
AG13 1 2
L32 1.8V TXVSSR MLB-201209-11
SC1U10V3ZY
SC1U10V3ZY
AF13 TXVDDR TXVSSR AG14
1
1 2 A2VDD_2D5V AF14 AH14
MLB-201209-11 TXVDDR TXVSSR
1
C415
C438
C416
C439
C364 C363 F19
1.8VF18
2
SC1U10V3ZY 1D8V_VGA_S0 VSSRH0
VDDRH0 VSSRH1 M6
SC10U10V6ZY-U L25 VDDRH N6
2
VDDRH1
1 2
MLB-201209-11 A2VDDQ_1D8V AH20
A2VSSN
AF21 AG21
2.5V A2VDD A2VSSN ADD ASIC DECOUPLING FOR ALL POWER AS REQUIRED
1
C347 C396 1D8V_VGA_S0 AE20 A2VDD

SC1U10V3ZY
L26 AF22 PLACED CLOSE TO THE POWER/GND PINS

1.8V A2VSSQ
SC10U10V6ZY-U
1 2 AF23
WITH AS MANY AS POSSIBLE PLACED UNDER THE ASIC
2
MLB-201209-11 A2VDDQ
AH22
AVDD_1D8V 1.8V AH23 AVDD
AVSSN
1D8V_VGA_S0
1.8V
1
C348 C353 L34 AE24 1D8V_VGA_S0

SC1U10V3ZY VDD1DI_1D8VAE23 VSS1DI
1 2 AE21 U14
SC10U10V6ZY-U MLB-201209-11 VDD1DI VSS2DI
AE22 1
2
VDD2DI ADJ/GND
1
C374 C395 2
VOUT
APL1085_ADJ
3D3V_S0
SC1U10V3ZY
AK28 PVDD PVSS AJ28 VIN 3
1
SC10U10V6ZY-U C350
2
A7 A6 APL1087 R48 TC19

1D8V_VGA_S0 MPVDD MPVSS 110R3 ST100U6D3VM-U
SC10U10V5ZY-L
2
2
L3
1 2 PVDD_1D8V 1.8V M26-P-1
2
1
MLB-201209-11
1
C85 C86 1D8V_VGA_S0 C69
1
L36 SC1U10V3ZY
1
1.8V <Core Design> 1
2
SC10U10V6ZY-U
SC1U10V3ZY
1 2 MPVDD_1D8V DY R45
2
MLB-201209-11 48D7R3F
1
VRAM_VDDQ C477 C478 Imax=1A

L37 SC1U10V3ZY Wistron Corporation
2
1 2 VDDRH SC10U10V6ZY-U 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
MLB-201209-11 Vo=1.25/110*(110+48.7)=1.803V Taipei Hsien 221, Taiwan, R.O.C.

1
C481 C476
SC1U10V3ZY Title
SC10U10V6ZY-U
ATI(2 of 3)
2

A3
Leopard2 -1
A B C D E
A B C D E
U20B 2 OF 6 U20C3 OF 6
16 MDA[63..0] 17 MDB[63..0]
MAA[13..0] 16 MAB[13..0] 17
MDA0 H28 E22 MAA0 MDB0 D7 N5 MAB0
MDA1 DQA_0 MAA_0 MAA1 MDB1 DQB_0 MAB_0 MAB1
H29 DQA_1 MAA_1 B22 F7 DQB_1 MAB_1 M1
MDA2 J28 B23 MAA2 MDB2 E7 M3 MAB2
J29 DQA_3 MAA_3 B24 G6 DQB_3 MAB_3 L3
MDA4 J26 C23 MAA4 MDB4 G5 L2 MAB4
H25 DQA_5 MAA_5 C22 F5 DQB_5 MAB_5 M2
MDA6 H26 F22 MAA6 MDB6 E5 M5 MAB6
G26 DQA_7 MAA_7 F21 C4 DQB_7 MAB_7 P6
MDA8 G30 C21 MAA8 MDB8 B5 N3 MAB8
D29 DQA_9 MAA_9 A24 C5 DQB_9 MAB_9 K2
4 MDA10 D28 C24 MAA10 MDB10 A4 K3 MAB10 1D2V_VGA_S0 4
MDA11 DQA_10 MAA_10 MAA11 MDB11 DQB_10 MAB_10 MAB11 U20F6 OF 6
E28 DQA_11 MAA_11 A25 B4 DQB_11 MAB_11 J2
MDA12 E29 E21 MAA12 MDB12 C2 P5 MAB12
G29 DQA_13 MAA_13 B20 D3 DQB_13 MAB_13 P3 P17 VDDC VSS M16
MDA14 G28 C19 MDB14 D1 P2 P18 N16
DQA_14 MAA_14 DQMA#[7..0] 16 DQB_14 MAB_14 DQMB#[7..0] 17 VDDC VSS
MDA15 F28 MDB15 D2 P19 N15
MDA16 DQA_15 DQMA#0 MDB16 DQB_15 DQMB#0 VDDC VSS
G25 DQA_16 DQMA_0# J25 G4 DQB_16 DQMB_0# E6 U12 VDDC VSS P15
MDA17 F26 F29 DQMA#1 MDB17 H6 B2 DQMB#1 U13 P16
MEMORY INTERFACE
MDA18 DQA_17 DQMA_1# DQMA#2 MDB18 DQB_17 DQMB_1# DQMB#2 VDDC VSS
E26 DQA_18 DQMA_2# E25 H5 DQB_18 DQMB_2# J5 U14 VDDC VSS R18
MDA19 F25 A27 DQMA#3 MDB19 J6 G3 DQMB#3 U17 R17
E24 DQA_20 DQMA_4# F15 K5 DQB_20 DQMB_4# W6 U18 VDDC VSS R16
MDA21 F23 C15 DQMA#5 MDB21 K4 W2 DQMB#5 U19 R15
E23 DQA_22 DQMA_6# C11 L6 DQB_22 DQMB_6# AC6 V19 VDDC VSS R14
MDA23 D22 E11 DQMA#7 MDB23 L5 AD2 DQMB#7 V18 R13
MEMORY INTERFACE
QSA[7..0] 16 QSB[7..0] 17
ARRAY
MDA24 DQA_23 DQMA_7# MDB24 DQB_23 DQMB_7# VDDC VSS
B29 DQA_24 G2 DQB_24 V17 VDDC VSS R12
MDA25 C29 J27 QSA0 MDB25 F3 F6 QSB0 V14 T13
MDA26 DQA_25 QSA_0 QSA1 MDB26 DQB_25 QSB_0 QSB1 VDDC VSS
C25 DQA_26 QSA_1 F30 H2 DQB_26 QSB_1 B3 V13 VDDC VSS T14
MDA27 C27 F24 QSA2 MDB27 E2 K6 QSB2 V12 T15
B28 DQA_28 QSA_3 B27 F2 DQB_28 QSB_3 G1 N18 VDDC VSS W15
MDA29 B25 E16 QSA4 MDB29 J3 V5 QSB4 N17 V16
C26 DQA_30 QSA_5 B16 F1 DQB_30 QSB_5 W1 N14 VDDC VSS V15
MDA31 B26 B11 QSA6 MDB31 H3 AC5 QSB6 W17 U15
MDA32 DQA_31 QSA_6 QSA7 CKEA MDB32 DQB_31 QSB_6 QSB7 VDDC VSS
F17 F10 1 2 U6 AD1 W18 U16
CENTER
MDA33 DQA_32 QSA_7 R130 10KR2 MDB33 DQB_32 QSB_7 VDDC VSS
E17 DQA_33 U5 DQB_33 W12 VDDC VSS T19
B
MDA34 D16 A19 MDB34 U3 R2 W13 T18
DQA_34 RASA# RASA# 16 DQB_34 RASB# RASB# 17 VDDC VSS
MDA35 F16 CKEB 1 2 MDB35 V6 W14 T17
MDA36 DQA_35 R526 10KR2 MDB36 DQB_35 VDDC VSS
E15 DQA_36 CASA# E18 CASA# 16 W5 DQB_36 CASB# T5 CASB# 17 N13 VDDC VSS T16
MDA37 F14 MDB37 W4 N19
MDA38 DQA_37 MDB38 DQB_37 VDDC
E14 DQA_38 WEA# E19 WEA# 16 Y6 DQB_38 WEB# T6 WEB# 17 M19 VDDC
3 MDA39 F13 MDB39 Y5 M18 3
A

C17 DQA_40 CSA_0# E20 CSA#0 16 U2 DQB_40 CSB_0# R5 CSB#0 17 M12 VDDC
MDA41 B18 MDB41 V2 N12
B17 DQA_42 CSA_1# F20 CSA#1 16 V1 DQB_42 CSB_1# R6 CSB#1 17 M13 VDDC
MDA43 B15 MDB43 V3 M14 W16
MDA44 DQA_43 MDB44 DQB_43 VDDC VDDCI
C13 DQA_44 CKEA B19 CKEA 16 W3 DQB_44 CKEB R3 CKEB 17 P12 VDDC VDDCI M15
MDA45 B14 MDB45 Y2 P13 R19
MDA46 DQA_45 DQB_45 VDDC VDDCI
C14 DQA_46 CLKA0 B21 CLKA0_R 1 2 CLKA0 16
MDB46 Y3 DQB_46 CLKB0 N1 CLKB0_R 1 2 CLKB0 17 P14 VDDC VDDCI T12
MDA47 C16 C20 CLKA#0_R
R128
1 10R2
2 VRAM_VDDQ MDB47 AA2 N2 CLKB#0_R R120
1 10R2
2 M17
DQA_47 CLKA0# CLKA#0 16 DQB_47 CLKB0# CLKB#0 17 VDDC
MDA48 A13 R129 10R2 MDB48 AA6 R121 10R2 W19
MDA49 DQA_48 DQB_48 VDDC
A12 DQA_49 CLKA1 C18 CLKA1_R 1 2 CLKA1 16
MDB49 AA5 DQB_49 CLKB1 T2 CLKB1_R 1 2 CLKB1 17
1
MDA50 C12 A18 CLKA#1_R
R131
1 10R2
2 MDB50 AB6 T3 CLKB#1_R R122
1 10R2
2 M26-P-1
DQA_50 CLKA1# CLKA#1 16 DQB_50 CLKB1# CLKB#1 17
MDA51 B12 R132 10R2 R137 MDB51 AB5 R119 10R2
MDA52 DQA_51 100R2 MDB52 DQB_51 VDDCI
C10 DQA_52 AD6 DQB_52 1 2
MDA53 C9 MDB53 AD5 E3 DIMB_0 TP4 L35
DQA_53 DQB_53 NC_DIMB_0
1
MDA54 B9 MDB54 AE5 AA3 DIMB_1 TP25 MLB-201209-11 C380 C379
2
MDA55 DQA_54 ATI_MVREFD MDB55 DQB_54 NC_DIMB_1 SC1U10V3ZY
B10 DQA_55 MVREFD B7 AE4 DQB_55
MDA56 E13 VRAM_VDDQ MDB56 AB2 1D8V_VGA_S0 SC10U10V6ZY-U
2
DQA_56 DQB_56
1
MDA57 E12 B8 ATI_MVREFS MDB57 AB3 AF5 ROMCS# TP24

DQA_57 MVREFS DQB_57 ROMCS# ATI_MODE_0 13
1
MDA58 E10 R136 MDB58 AC2
MDA59 DQA_58 100R2 C163 MDB59 DQB_58 ATI_MODE_0
F12 DQA_59 AC3 DQB_59 1 2
MDA60 F11 D30 DIMA_0 TP5 SCD1U16V MDB60 AD3 C7 R544 DUMMY-R2
MDA61 E9
DQA_60 NC_DIMA_0
B13 DIMA_1 TP6 2 MDB61 AE1
DQB_60 NC_MEMVMODE_1 ATI suggest
2
DQA_61 NC_DIMA_1 DQB_61
1
MDA62 F9 MDB62 AE2 C8 MEMTEST
MDA63 DQA_62 R133 MDB63 DQB_62 MEMTEST ATI_MODE_1
F8 DQA_63 AE3 DQB_63 1 2
100R2 R539 DUMMY-R2
1
M26-P-1 M26-P-1 R538
2
2 R135 DUMMY-R2 R545
2
240R2J 10KR2
1
As close to
MEMORY CHANNEL A MEMORY CHANNEL B
2
1
R134 CHIP as
2
100R2 C162 possible VDDR1 MEMVMODE_0 MEMVMODE_1
SCD1U16V
2
2
1.8V GND +VDDC_CT
VRAM Selection Hynix : 72.55732.B0U 2.5V +VDDC_CT GND

AC12
AC14
AD16
AC16
AC18
AD18
AC28
AD28
AD26
AD27
AH29
AA26
AA27
AA23
AA24
AA25
AA28
AB28
AE28
AF28
SETTING
W24
W28
AC4
M27
M26
M24
M25
M28
AB8
AB7
AB1
AK2
N28
R25
R23
R24
R26
R27
R28
U28
K28
P28
V24
V26
V27
V25
V28
Y28
AJ1
T28
T24
L28
W7
W8
U4
U8
DVPDATA_[2:0] VRAM_VDDQ
Y4
Vendor/Size Samsng : 72.45532.M0U

U20E
2.8V +VDDC_CT +VDDC_CT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
HYNIX/128M 000
SAMSUNG/128M 001 1 2 DVPDATA_0 13
5 OF 6
R79 DUMMY-R2
RESERVED 010
1 2 DVPDATA_1 13
CORE GND RESERVED 011 R81 DUMMY-R2
RESERVED 100 1 2 DVPDATA_2 13

R80 DUMMY-R2
1
RESERVED 101
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R482 R484 R483

RESERVED 110 10KR2 10KR2 10KR2
1 <Core Design> 1
A2
A10
A16
A22
A29
C1
C3
C28
C30
D27
D24
D21
D18
D15
D12
D10
D6
D4
F27
G9
G12
G16
G18
G21
G24
H27
H23
H21
H18
H16
H14
H12
H9
H8
H4
J23
J24
AD12
AG5
AG9
AG11
R7
P4
M7
M8
L4
K1
K7
K8
R8
T1
RESERVED 111
2
Wistron Corporation
Hynix : HY5DS573222F(P)-28 (8Mx32) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Samsung : K4D553235F-VC2A (8Mx32)
Title
ATI(3 of 3)
A3
Leopard2 -1
A B C D E
5 4 3 2 1
VRAM_VDDQ
VRAM_VDDQ U65A 1 of 5
All dampings in this page must near the VRAM.

15 MDA[0..63]
RASA# M2 D7
RAS# VDD
1
1
CASA# L2 D8
15 MAA[0..13] CAS# VDD
C488 C484 C168 C172 C489 C487 C490 C485 BC110 BC103 BC35 WEA# L3 E4
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD01U16V2KX SCD1U16V SCD1U16V CSA#0 WE# VDD
15 DQMA#[0..7] N2 E11
2
2
CSA#1 CS# VDD
M4 NC#M4 VDD L4
15 QSA[0..7] VDD L7
MAA0 N5 L8 VRAM_VDDQ
MAA1 A0 VDD
N6 A1 VDD L11
MAA2 M6
MAA3 A2
D N7 A3 VDDQ C3 D
MAA4 N8 C5
A4 VDDQ
1
1
MAA5 M9 C7
BC113 BC36 BC34 BC38 BC41 BC33 BC39 BC111 BC40 BC120 BC121 MAA6 A5 VDDQ
N9 A6 VDDQ C8
1
SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SCD01U16V2KX SC330P50V2KX SCD01U16V2KX MAA7 N10 C10 BC37 BC106
2
2
MAA8 A7 VDDQ
N11 A8/AP VDDQ C12
MAA9
SC10U10V5ZY-L
SC10U10V5ZY-L
M8 E3
2
MAA10 A9 VDDQ
L6 A10 VDDQ E12
MAA11 M7 F4
A11 VDDQ
L9 NC#L9 VDDQ F11
U21B 2 of 5 U65B 2 of 5 G4
MAA12 VDDQ
N4 BA0 VDDQ G11
U21A 1 of 5 MDA12 B5 MDA45 B5 MAA13 M5 J4
MDA11 DQ3 MDA46 DQ3 BA1 VDDQ
C6 DQ1 C6 DQ1 M10 NC#M10 VDDQ J11
MDA9 B6 MDA43 B6 K4
MDA10 DQ2 MDA44 DQ2 VDDQ
15 RASA# M2 RAS# VDD D7 B7 DQ0 B7 DQ0 VDDQ K11
L2 D8 MDA13 D2 MDA42 D2 CKEA N12
15 CASA# CAS# VDD DQ6 DQ6 CKE
L3 E4 MDA8 D3 MDA40 D3 M11
15 WEA# WE# VDD DQ5 DQ5 15 CLKA1 CLK
N2 E11 MDA15 C2 MDA47 C2 M12 B4
15 CSA#0 CS# VDD DQ4 DQ4 15 CLKA#1 CLK# VSSQ
M4 L4 MDA14 E2 MDA41 E2 B11
15 CSA#1 NC#M4 VDD DQ7 DQ7 VSSQ
VDD L7 VSSQ D4
MAA0 N5 L8 VRAM_VDDQ D5
CLOSE TO MEM !!
A0 VDD VSSQ
2
2
MAA1 N6 L11 DQMA#1 B3 DQMA#5 B3 D6
MAA2 A1 VDD QSA1 DM0 QSA5 DM0 R145 R146 VSSQ
M6 A2 B2 DQS0 B2 DQS0 VSSQ D9
MAA3 N7 C3 D10
MAA4 A3 VDDQ VSSQ
60D4R2F
60D4R2F
N8 A4 VDDQ C5 VSSQ D11
MAA5 M9 C7 HY5DS573222F-28 HY5DS573222F-28 E6
1
1
MAA6 A5 VDDQ VSSQ
N9 A6 VDDQ C8 VSSQ E9
1
MAA7 N10 C10 BC28 BC42 U65C 3 of 5 F5
C MAA8 N11 A7 VDDQ U21C 3 of 5 VSSQ C
A8/AP VDDQ C12 VSSQ F10
MAA9 MDA49
BC108_1
SC10U10V5ZY-L
SC10U10V5ZY-L
M8 E3 K13 G5
2
MAA10 L6 A9 VDDQ MDA21 MDA53 DQ8 VSSQ
A10 VDDQ E12 K13 DQ8 G13 DQ12 VSSQ G10
MAA11 M7 F4 MDA18 G13 MDA54 G12 H5
A11 VDDQ DQ12 DQ13 VSSQ
1
L9 F11 MDA17 G12 MDA50 J13 F6 H10
NC#L9 VDDQ MDA22 DQ13 MDA52 DQ10 BC32 VSS_THERMAL VSSQ
VDDQ G4 J13 DQ10 F13 DQ14 F7 VSS_THERMAL VSSQ J5
MAA12 N4 G11 MDA19 F13 MDA48 K12 SCD1U16V F8 J10
2
MAA13 BA0 VDDQ MDA23 DQ14 MDA55 DQ9 VSS_THERMAL VSSQ
M5 BA1 VDDQ J4 K12 DQ9 F12 DQ15 F9 VSS_THERMAL VSSQ K5
M10 J11 MDA16 F12 MDA51 J12 G6 K10
NC#M10 VDDQ MDA20 DQ15 DQ11 VSS_THERMAL VSSQ
VDDQ K4 J12 DQ11 G7 VSS_THERMAL
15 CKEA VDDQ K11 G8 VSS_THERMAL VSS E5
N12 DQMA#6 H12 G9 E7
CKE DQMA#2 QSA6 DM1 VSS_THERMAL VSS
15 CLKA0 M11 CLK H12 DM1 H13 DQS1 H6 VSS_THERMAL VSS E8
M12 B4 QSA2 H13 H7 E10
15 CLKA#0 CLK# VSSQ DQS1 VSS_THERMAL VSS
VSSQ B11 H8 VSS_THERMAL VSS K6
VSSQ D4 HY5DS573222F-28 H9 VSS_THERMAL VSS K7
D5 HY5DS573222F-28 J6 K8
CLOSE TO MEM !!
VSSQ VSS_THERMAL VSS

2
2
VSSQ D6 J7 VSS_THERMAL VSS K9

R554 R553 D9 U21D 4 of 5 U65D 4 of 5 J8 L5
VSSQ VSS_THERMAL VSS
VSSQ D10 J9 VSS_THERMAL VSS L10
MDA6 MDA37
60D4R2F
60D4R2F
VSSQ D11 G3 DQ18 G3 DQ18

E6 MDA2 K3 MDA35 K3 M13 N13 VRAM_VDDQ
1
1
VSSQ DQ23 DQ23 MCL/DSF VREF
NC#C11
NC#H11
NC#L12
NC#L13
E9 MDA0 J3 MDA34 J3
NC#M3
NC#C4
NC#H4
NC#N3
VSSQ MDA7 DQ20 MDA39 DQ20
VSSQ F5 F3 DQ16 F3 DQ16
1
F10 MDA1 J2 MDA33 J2
VSSQ DQ21 DQ21
1
MDA4 MDA36 R549
BC107_1
VSSQ G5 G2 DQ19 G2 DQ19

G10 MDA5 F2 MDA38 F2 HY5DS573222F-28 BC105 1KR2F
C4
C11
H4
H11
L12
L13
M3
N3
VSSQ MDA3 DQ17 MDA32 DQ17 SCD1U16V
H5 K2 K2
2
VSSQ DQ22 DQ22
1
F6 H10
2
B BC112 VSS_THERMAL VSSQ B
F7 VSS_THERMAL VSSQ J5
SCD1U16V F8 J10 DQMA#0 H3 DQMA#4 H3 VDDR_VREF2
2
VSS_THERMAL VSSQ QSA0 DM2 QSA4 DM2

F9 VSS_THERMAL VSSQ K5 H2 DQS2 H2 DQS2
G6 VSS_THERMAL VSSQ K10
1
G7 VSS_THERMAL
G8 E5 HY5DS573222F-28 HY5DS573222F-28 BC104 R550
VSS_THERMAL VSS SCD1U16V 1KR2F
G9 E7
2
VSS_THERMAL VSS
H6 VSS_THERMAL VSS E8 U65E 5 of 5
H7 E10 U21E 5 of 5
2
VSS_THERMAL VSS
H8 VSS_THERMAL VSS K6
H9 K7 MDA26 D12 MDA58 D12
VSS_THERMAL VSS MDA31 DQ26 MDA63 DQ26
J6 VSS_THERMAL VSS K8 D13 DQ25 D13 DQ25
J7 K9 MDA30 E13 MDA61 E13
J8 VSS_THERMAL VSS L5 C9 DQ30 C9 DQ30
J9 L10 MDA27 B10 MDA59 B10
VRAM_VDDQ
B8 DQ31 B8 DQ31 Layout trace 20 mil
M13 N13 MDA29 C13 MDA62 C13
MCL/DSF VREF DQ27 DQ27
NC#C11
NC#H11
NC#L12
NC#L13
MDA28 B9 MDA60 B9
NC#M3
NC#C4
NC#H4
NC#N3
DQ29 DQ29
1
1
R141 DQMA#3 B12 DQMA#7 B12

HY5DS573222F-28 BC29 1KR2F QSA3 DM3 QSA7 DM3
B13 B13
C4
C11
H4
H11
L12
L13
M3
N3
SCD1U16V DQS3 DQS3

2
HY5DS573222F-28 HY5DS573222F-28
VDDR_VREF1
<Core Design>
1
A A
BC31 R144
CLOSE TO MEM SCD1U16V 1KR2F
Wistron Corporation
2

2
Title
Layout trace 20 mil ATI VRAM (1/2)

A3 -1
Leopard2
5 4 3 2 1
5 4 3 2 1
VRAM_VDDQ
U61A 1 of 5
All dampings in this page must near the VRAM.

VRAM_VDDQ M2 D7
15 RASB# RAS# VDD
1
15 CASB# L2 CAS# VDD D8
BC21 BC19 L3 E4
SCD1U16V SCD1U16V 15 WEB# WE# VDD
15 CSB#0 N2 E11
2
CS# VDD
1
1
15 CSB#1 M4 NC#M4 VDD L4
C401 C148 C155 C99 C124 C156 C157 C474 BC26 L7
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD01U16V2KX MAB0 VDD
15 MDB[0..63] N5 L8 VRAM_VDDQ
2
2
MAB1 A0 VDD
N6 A1 VDD L11
MAB2 M6
15 MAB[0..13] A2
D MAB3 N7 C3 D
MAB4 A3 VDDQ
15 DQMB#[0..7] N8 A4 VDDQ C5
1
MAB5 M9 C7
BC25 BC107 MAB6 A5 VDDQ
15 QSB[0..7] N9 A6 VDDQ C8
1
SC330P50V2KX SCD01U16V2KX MAB7 N10 C10 BC97 BC96
2
A7 VDDQ
1
1
MAB8 N11 C12
BC13 BC16 BC14 BC100 BC23 BC12 BC15 BC24 BC22 MAB9 A8/AP VDDQ
SC10U10V5ZY-L
SC10U10V5ZY-L
M8 E3
2
SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SC330P50V2KX SCD01U16V2KX MAB10 A9 VDDQ
L6 E12
2
2
U64B 2 of 5 U61B 2 of 5 MAB11 A10 VDDQ
M7 A11 VDDQ F4
L9 NC#L9 VDDQ F11
MDB7 B5 MDB32 B5 G4
MDB6 DQ3 MDB33 DQ3 MAB12 VDDQ
C6 DQ1 C6 DQ1 N4 BA0 VDDQ G11
MDB5 B6 MDB34 B6 MAB13 M5 J4
MDB4 DQ2 MDB35 DQ2 BA1 VDDQ
B7 DQ0 B7 DQ0 M10 NC#M10 VDDQ J11
MDB1 D2 MDB36 D2 K4
DQ6 DQ6 15 CKEB VDDQ
MDB0 D3 MDB38 D3 K11
U64A 1 of 5 MDB2 DQ5 MDB37 DQ5 VDDQ
C2 DQ4 C2 DQ4 N12 CKE
MDB3 E2 MDB39 E2 M11
DQ7 DQ7 15 CLKB1 CLK
15 CLKB#1 M12 CLK# VSSQ B4
RASB# M2 D7 B11
CASB# RAS# VDD DQMB#0 DQMB#4 VSSQ
L2 CAS# VDD D8 B3 DM0 B3 DM0 VSSQ D4
WEB# L3 E4 QSB0 B2 QSB4 B2 D5
WE# VDD DQS0 DQS0 VSSQ
2
2
CSB#0 N2 E11 D6
CLOSE TO MEM !!
CSB#1 CS# VDD R110 R111 VSSQ
M4 NC#M4 VDD L4 VSSQ D9
VDD L7 HY5DS573222F-28 HY5DS573222F-28 VSSQ D10
MAB0
60D4R2F
60D4R2F
N5 A0 VDD L8 VRAM_VDDQ VSSQ D11
MAB1 N6 L11 U64C 3 of 5 U61C 3 of 5 E6
1
1
MAB2 A1 VDD VSSQ
M6 A2 VSSQ E9
MAB3 N7 C3 MDB28 K13 MDB63 K13 F5
C MAB4 A3 VDDQ MDB29 DQ8 MDB59 DQ8 VSSQ C
N8 A4 VDDQ C5 G13 DQ12 G13 DQ12 VSSQ F10
MAB5 MDB31 MDB58
BC140_1
M9 A5 VDDQ C7 G12 DQ13 G12 DQ13 VSSQ G5
MAB6 N9 C8 MDB25 J13 MDB60 J13 G10
1
MAB7 N10 C10 BC101 BC102 MDB26 F13 MDB56 F13 H5
1
MAB8 N11 C12 MDB27 K12 MDB62 K12 F6 H10
MAB9 A8/AP VDDQ MDB24 DQ9 MDB57 DQ9 BC17 VSS_THERMAL VSSQ
SC10U10V5ZY-L
SC10U10V5ZY-L
M8 E3 F12 F12 F7 J5
2
MAB10 A9 VDDQ MDB30 DQ15 MDB61 DQ15 VSS_THERMAL VSSQ
L6 E12 J12 J12 F8 J10
2
MAB11 A10 VDDQ DQ11 DQ11 VSS_THERMAL VSSQ
SCD1U16V
M7 A11 VDDQ F4 F9 VSS_THERMAL VSSQ K5
L9 NC#L9 VDDQ F11 G6 VSS_THERMAL VSSQ K10
G4 DQMB#3 H12 DQMB#7 H12 G7
MAB12 VDDQ QSB3 DM1 QSB7 DM1 VSS_THERMAL
N4 BA0 VDDQ G11 H13 DQS1 H13 DQS1 G8 VSS_THERMAL VSS E5
MAB13 M5 J4 G9 E7
BA1 VDDQ VSS_THERMAL VSS
M10 NC#M10 VDDQ J11 H6 VSS_THERMAL VSS E8
VDDQ K4 HY5DS573222F-28 HY5DS573222F-28 H7 VSS_THERMAL VSS E10
VDDQ K11 H8 VSS_THERMAL VSS K6
CKEB N12 U64D 4 of 5 U61D 4 of 5 H9 K7
CKE VSS_THERMAL VSS
15 CLKB0 M11 CLK J6 VSS_THERMAL VSS K8
M12 B4 MDB14 G3 MDB43 G3 J7 K9
15 CLKB#0 CLK# VSSQ DQ18 DQ18 VSS_THERMAL VSS
B11 MDB9 K3 MDB47 K3 J8 L5
VSSQ MDB11 DQ23 MDB45 DQ23 VSS_THERMAL VSS
VSSQ D4 J3 DQ20 J3 DQ20 J9 VSS_THERMAL VSS L10
D5 MDB13 F3 MDB42 F3
CLOSE TO MEM !!
VSSQ DQ16 DQ16

2
2
D6 MDB10 J2 MDB44 J2 M13 N13 VRAM_VDDQ

VSSQ DQ21 DQ21 MCL/DSF VREF
NC#C11
NC#H11
NC#L12
NC#L13
R139 R140 D9 MDB15 G2 MDB40 G2
NC#M3
NC#C4
NC#H4
NC#N3
VSSQ MDB12 DQ19 MDB41 DQ19
VSSQ D10 F2 DQ17 F2 DQ17
1
MDB8 MDB46
60D4R2F
60D4R2F
VSSQ D11 K2 DQ22 K2 DQ22
1
E6 R522
1
1
VSSQ BC98 1KR2F

E9 HY5DS573222F-28
C4
C11
H4
H11
L12
L13
M3
N3
VSSQ DQMB#1 DQMB#5 SCD1U16V
F5 H3 H3
2
VSSQ QSB1 DM2 QSB5 DM2
F10 H2 H2
2
B VSSQ DQS2 DQS2 B
BC139_1
VSSQ G5
G10 VDDR_VREF4
VSSQ
VSSQ H5 HY5DS573222F-28 HY5DS573222F-28
1
F6 VSS_THERMAL VSSQ H10
1
BC27 F7 J5
SCD1U16V VSS_THERMAL VSSQ U64E 5 of 5 U61E 5 of 5 BC99 R521
F8 J10
2
VSS_THERMAL VSSQ SCD1U16V 1KR2F

F9 K5 CLOSE TO MEM
2
VSS_THERMAL VSSQ MDB20 MDB53
G6 VSS_THERMAL VSSQ K10 D12 DQ26 D12 DQ26
G7 MDB23 D13 MDB54 D13
2
VSS_THERMAL MDB22 DQ25 MDB52 DQ25
G8 VSS_THERMAL VSS E5 E13 DQ24 E13 DQ24
G9 E7 MDB16 C9 MDB51 C9 Layout trace 20 mil
VSS_THERMAL VSS MDB19 DQ30 MDB50 DQ30
H6 VSS_THERMAL VSS E8 B10 DQ28 B10 DQ28
H7 E10 MDB17 B8 MDB49 B8
VSS_THERMAL VSS MDB21 DQ31 MDB55 DQ31
H8 VSS_THERMAL VSS K6 C13 DQ27 C13 DQ27
H9 K7 MDB18 B9 MDB48 B9
VSS_THERMAL VSS DQ29 DQ29
J6 VSS_THERMAL VSS K8
J7 VSS_THERMAL VSS K9
J8 L5 DQMB#2 B12 DQMB#6 B12
VSS_THERMAL VSS QSB2 DM3 QSB6 DM3
J9 VSS_THERMAL VSS L10 B13 DQS3 B13 DQS3
M13 N13 VRAM_VDDQ
MCL/DSF VREF
NC#C11
NC#H11
NC#L12
NC#L13
NC#M3
NC#C4
NC#H4
NC#N3
HY5DS573222F-28 HY5DS573222F-28
1
1
R552
HY5DS573222F-28 BC108 1KR2F
C4
C11
H4
H11
L12
L13
M3
N3
SCD1U16V
2
A <Core Design> A
VDDR_VREF3
Wistron Corporation
1
BC109 R551 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

CLOSE TO MEM SCD1U16V 1KR2F Taipei Hsien 221, Taiwan, R.O.C.
2
Title
2
Layout trace 20 mil

ATI VRAM (2/2)
A3
Leopard2 -1
5 4 3 2 1
A B C D E
Digital Signal CONN 5V_S0 5V_S0

CN5
21 D5 D30
1
2
3
USB_P_CON0
USB_N_CON0
5V_S3 LUMA_CN5 1 L8 2 LUMA
VOL_UP_DK# 3
2
VOL_DWN_DK# 3
2
Docking Connector
USB_P_CON1 BLM11B750S CN12
4 1 1
5 USB_N_CON1 60
6 CRMA_CN5 1 L12 2 CRMA BAV99LT1 BAV99LT1 MH1
CRMA_CN5 5V_S3 BLM11B750S
7 DY DY
1
4 8 LUMA_CN5 56 55 4
1
9 R124 R123
10 DDC_DATA_CON 20 BC18 BC20 C138 C149 150R2F 150R2F
11 DDC_CLK_CON 20 SC3P50V2CN SC3P50V2CN PR_PRESENT# 2 1 RJ45-7 31
2
12 SC3P50V2CN SC3P50V2CN
JVGA_HS 20
2
13 JVGA_VS 20 31 RJ45-4 4 3 RJ45-8 31
14
5V_S0
DY 31 RJ45-5 6 5 RJ45-3 31
15 31 RJ45-1 8 7 RJ45-6 31
16 CRT_R 20 DY 31 RJ45-2 10 9
SPDIF
JACK_DETECT# 33
17 12 11
18 MIC_PR 14 13 5V_Dock_S0
1 2
CRT_G 20 0R2-0 5V_S0
19 16 15 R51
AUD_AGND MUTE_LED 19,36
20 18 17
22
CRT_B 20
Close to Docking CN 33 DK_SPKR_R+
33 DK_SPKR_L+ 20 19 1394_TPA1P_PR
1394_TPA1N_PR
31
31
36 VOL_UP_DK# 22 21
USB_N_CON6 24 23 1394_TPB1P_PR 31
JST-CON20 LINE-OUT USB_P_CON6 26 25 1394_TPB1N_PR 31
28 27
TPAD30 IR_OUT 30 29 JACK_DETECT# 1 2 EC14
Analog Signal CONN TP21 32 31 SCD1U16V
USB_N_CON6 34 33 MUTE_LED 1 2 EC19
22 USB_PN7 SCD1U16V
CN6 R455 0R2-0 36 35
11 USB_P_CON6 1 2 38 37 1 2 EC104
22 USB_PP7 AUD_AGND SCD1U16V
1 MIC_PR COMP_PR 40 39
2 LUMA_PR 42 41 MIC_PR 1 2 EC106
EXT_MIC_1 32 SC1000P16V2KX
3 CRMA_PR 44 43
EXT_MIC_2 32
4 USB_N_CON0 46 45 DK_SPKR_R+ 1 2 EC105
22 USB_PN1 36 VOL_DWN_DK# SC1000P16V2KX
5 CIR_PR 48 47
HP_OUT_R 32
6 USB_P_CON0 50 49 DK_SPKR_L+ 1 2 EC110
3
HP_OUT_L 32 22 USB_PP1 5V_DOCK 5V_DOCK SC1000P16V2KX 3
7 52 51
8 MIC-IN 54 53 DOCK_PRESENT COMP_PR 1 2 EC109
1
9 DCBATOUT SC1000P16V2KX
EARPHONE 33
10 R94 58 57 VOL_UP_DK# 1 2 EC111
LID_SW 19 AD+ AD+ SC1000P16V2KX
12 1KR2
MH2 VOL_DWN_DK# 1 2 EC118
MOLEX-CON10-1 3D3V_S0 USB_N_CON1 59 SC1000P16V2KX
USB_PN3 22
2
DOCK_PRESENT 1 2 EC30
AUD_AGND USB_P_CON1 SC1000P16V2KX
USB_PP3 22 FOX-CONN58D-U3
PR_PRESENT# 1 2 EC103
1
SC1000P16V2KX
R548 3D3V_S3 BT_LED 1 2 EC28
47KR2 SC1000P16V2KX
63.47334.1D1 BT_LED 19,31
D31
2
2
EARPHONE
LID_SW 3
INPUT FUNCTION Place near the GMCH
1
BAV99LT1 LOW B0
5V_S0
31 BC0EX1 1 2 HIGH B1
ICH_PME# 22,30,34
R624 DUMMY-R2 U16
31 BC0EX2 1 2 LUMA 1 6 PR_INSERT#

PCI_AD24 22,27,30,34 5V_S3 AD+ 5V_S0 B1 S
R310 DUMMY-R2 5V_S0 DCBATOUT L30 2 5
LUMA_PR 1 LUMA_PR_1 GND VCC
2 3 B0 A 4 LUMA_VGA 13
2 IND-1D2UH 2
Please close to ICH6
1
1
1
5V_S0 C357 C358 R456 NC7SB3157P6X-U
C471 C101 C617 C94 C425 SC47P50V2JN SC47P50V2JN
150R2F
2
SCD1U16V SCD1U25V3KXSCD1U16V SCD1U25V3KX SCD1U16V
2
2
1
2
R408
10KR2 U15
HP suggest CRMA 1 6 PR_INSERT#

2
L29 B1 S
2 GND VCC 5
PR_INSERT# CRMA_PR
1 2 CRMA_PR_1 3 4
PR_INSERT# 36 IND-1D2UH B0 A CRMA_VGA 13
1
3
L19 C356 C369 NC7SB3157P6X-U

DOCK_PRESENT 1 2 1 Q31 SPDIF_OUT 1 2 SPDIF SC47P50V2JN SC47P50V2JN
32 SPDIF_OUT
2
R103 47R2 S2N3904-U3 BLM18PG600SN1 L27
1
COMP_PR 1 2 1 2 COMP_VGA 13
2
1
C62 IND-1D2UH R72 0R2-0
1
R104 PR_PRESENT# C315 SC470P25V2KN
1
2K2R2 SC470P25V2KN C352
2
C351 SC47P50V2JN R491
2
SC47P50V2JN R436 150R2F
2
2
1 2 EC131 150R2F
SCD1U16V
2
DY
AUD_AGND
Place near the DOCK
1 <Core Design> 1
5V_S3 5V_DOCK
20 CIR 1 2 Wistron Corporation
F1 R361 0R2-0 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
100 mil CIR_PR Taipei Hsien 221, Taiwan, R.O.C.
1 2 1 2
R512 0R2-0 CIR_KBC 36
1
FUSE-2A6V Title
C368 C367 TC6
SCD1U16V ST47U6D3V-U1 Board to board conn/ Docking
2
SC4D7U10V5ZY DY CIR,CIR_PR,CIR_KBC are connect togather. default setting 12/12 Size Document Number Rev
A3 -1
Leopard2
A B C D E
A B C D E
INVERTER/LCD 3D3V_S0 3D3V_LCD_S0

SC
3D3V_LCD_S0 SI3865_R1C1 1 2 BC89
SC4700P50V3KX
U58
CN3
1
1 2 6 1 SI3865_R2
BC8 BC94 LCDVDD_ON_1 R433 270KR2F R1/C1 R2
4 41 43 13 LCDVDD_ON 1 2 5 ON/OFF D2 2 4
SCD1U16V SC10U10V6ZY-U R431 1KR2 4 3
2
S2 D2
1 MH1
1
2 BC92 BC93 SI3865DV-U R476 3D3V_S3
3 45 SCD1U16V 47KR2
13 TXAOUT0-
2
4 SC1U10V3ZY
13 TXAOUT0+
1
5
2
6 R546
13 TXAOUT1- 4K7R2
13 TXAOUT1+ 7
8 3D3V_LCD_S0
9 5V_S5
13 TXAOUT2-
2
10 1 2 LID_SW
13 TXAOUT2+ 36 KBC_LID# LID_SW 18
1
11 R547 100KR2
1
12 R432
13 TXACLK-
1
13 150R2 C482
13 TXACLK+ SC1000P50V
14 R430
2
15 10KR2
13 TXBOUT0-
2
13 TXBOUT0+ 16
17 D26
3
18 Q35 D Q33 2
13 TXBOUT1- 802_ACT_LED 34
13 TXBOUT1+ 19 3 OUT 1 Q36 37 802_BT_LED# OUT 3
20 LCDVDD_ON 2 R1 G 2N7002 R1 2 802_BT_LED 3
13 TXBOUT2- 21 IN 1 GND S GND 1 IN
2
22 R2 R2 1
13 TXBOUT2+ BT_LED 18,31
23 DTC114EUA-U1 DTC114EUA-U1
13 TXBCLK- 24
13 TXBCLK+ 25
26 CH715F
3 27 Q12 3
13,25 EDID_CLK
13,25 EDID_DAT 28 3 OUT 7421_LED#
29 2 R1
3D3V_S0 27 7421_LED
30 IN 1 GND 5V_S3 5V_S0
31 R2
36 BRIGHTNESS 32 DTC114EUA-U1
36 FPBACK 33
DCBATOUT 34 Q10
35 3 OUT CAPS_LED# 5V_S3_PA 5V_S0_PA
5V_S0 36 2 R1
36 CAPS_LED
2
37 IN 1 GND
38 46 R2 ID_DET 1 2 1 2N3906-2-U ID_DET 1 2 1 2N3906-2-U
39 DTC114EUA-U1 R353 47KR2 Q25 R354 47KR2 Q26
40 MH2
3
Q34
1
C345 BC88 42 44 3 OUT NUM_LED# 37

C346 BC87 BC91 2 R1
36 NUM_LED
SC1000P16V2KX
SC1000P16V2KX
SCD1U 1 GND
SCD1U16V
SCD1U16V
IN
2
R2
IPEX-CON40-1-U1
5V_AUX DTC114EUA-U1
5V_S3_PR 5V_S0_PR
5V_AUX
2
ID_DET# 1 2 1 2N3906-2-U ID_DET# 1 2 1 2N3906-2-U
5V_AUX_PA R352 47KR2 Q24 R346 47KR2 Q22
1
3
2
R350
1
PWR CHR HDD IR CAPS 7421 10KR2 1 2N3906-2-U

R345 1 Q20
2 100KR2 2
2
3
R344
PR Amber Amber Amber U42 Amber Amber 47KR2
2
Botton
LED4 LED5 LED6 LED1 LED2
HDD_LED# 26
2
ID_DET
Blue Blue 36,37 ID_DET
PA Blue U64 Blue Blue IDE_LED#
CDROM_LED# 26
Top 5V_AUX_PR
3
LED8 LED7 LED9 LED1 LED2 D
2
1 Q21 Q32
G 2N7002 ID_DET#1 2 1 2N3906-2-U 3 OUT MUTE_LED# 37
S R351 47KR2 Q23 2 R1
change R from 100 to 200 ohm 18,36 MUTE_LED
2
IN 1 GND
5V_S0_PR 3 R2 Q28
LED2 DTC114EUA-U1 3 OUT CHG_LED#
1 2 1 2 CAPS_LED# 5V_S0_PA 2 R1
36 CHG_LED
R125 1K2R2J-1 IN 1 GND
LED-O-10 LED1 R2
5V_S0_PR 1 2 1 2 CAPS_LED# DTC114EUA-U1
LED4 5V_S0_PA R127 100R2
1 2 1 2 7421_LED# LED-B-53 Q27
R180 1K2R2J-1 LED3 3 OUT PWR_LED# 37
LED-O-10 1 2 1 2 7421_LED# 2 R1
36 PWR_LED
NC
5V_S0_PR R192 200R2J IN 1 GND

LED7 LED-B-53 R2
1 2 2 1IDE_LED# DTC114EUA-U1
NC
R360 1K2R2J-1 5V_S0_PA

LED10
LED-O-11-U
1 2 2 1 IDE_LED#
1
200R2J <Core Design> 1
R359
5V_AUX_PR LED-B-54-U
NC
NC
5V_AUX_PA
LED6 LED9 Wistron Corporation
1 2 2 1 CHG_LED# 1 2 2 1 CHG_LED# 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R357 1K2R2J-1 R358 200R2J Taipei Hsien 221, Taiwan, R.O.C.
LED-O-11-U LED-B-54-U
5V_S3_PR Title
NC
NC
5V_S3_PA
LED5 LED8 Inverter/LCD
1 2 2 1 PWR_LED# 1 2 2 1 PWR_LED# Size Document Number Rev
R356 1K2R2J-1 R355 200R2J A3
Leopard2 -1
LED-O-11-U LED-B-54-U
A B C D E
A B C D E
4 4
CRT
L9
13 DDC_CLK 1 2 DDC_CLK_CON DDC_CLK_CON 18
BLM11B750S
13 DDC_DATA 1 2 DDC_DATA_CON DDC_DATA_CON 18
L10 BLM11B750S
18 JVGA_HS JVGA_HS 1 2 VGA_HSYNC 13

R115 33R2
18 JVGA_VS JVGA_VS 1 2 VGA_VSYNC 13
R114 33R2
L5
1 2 CRT_B
13 VGA_BLUE BLM11B750S
L6 CRT_B 18
1 2 CRT_G
13 VGA_GREEN BLM11B750S CRT_G 18
3 L7 3
1 2 CRT_R
13 VGA_RED BLM11B750S CRT_R 18
1
C126 C125 C113
1
SC3P50V2CN
SC3P50V2CN
SC3P50V2CN
2
2
1
1
R113 R112 R108
150R2F 150R2F 150R2F C88 C87 C89
SC15P50V2JN-1
SC15P50V2JN-1
SC15P50V2JN-1
2
2
2
2
Close to CN5
Close to U19 (N/B)
010804 Modified on Astro ID request
CIR FOR FF 5V_AUX

2 2
1
1
R362 R363
10KR2 100R2
2
2
U81
GND 1
GND 2
VS 3 1 2 C316
4 CIR SC4D7U10V5ZY
OUT CIR 18
IR-TSOP6236-U
U50
GND 1
GND 2
VS 3
OUT 4
1 <Core Design> 1
IR-TSOP6236-U
DY
Wistron Corporation
Title
CRT/ CIR
A3
Leopard2 -1
A B C D E
A B C D E
3D3V_AUX RTC_AUX_S5
D21
1 2 1 2
C299 SC4D7P50V3CN
1
CH751H-40-U
RTC_VCC C300
4
SC1U10V3ZY
1
X4
R319
10MR2J
D22
RTC circuitry
4 1 2 1 2 4
2
R632 20KR2 XTAL-32D768K-4P U42A
1
2
CH751H-40-U G70 LPC_LAD[3..0] 36
1
1
R334 C614 1 2
1KR2 R633 C298 SC3D9P50V3CN RCT_X1 LPC_LAD0
SC1U10V3ZY
Y1 RTCX1 LAD[0]/FWH[0] P2
1MR2 GAP-OPEN RCT_X2 Y2 N3 LPC_LAD1
2
RTCX2 LAD[1]/FWH[1] LPC_LAD2
N5
BAT2
1
RCT_RST# LAD[2]/FWH[2] LPC_LAD3 3D3V_S0
LPC
AA2 N4
RTC
2
RTCRST# LAD[3]/FWH[3]
INTRUDER# AA3 N6
INTRUDER# LDRQ[0]# LPC_LDRQ0# 36
AA5 P4 LPC_LDRQ1# RCIN# 1 2
INTVRMEN LDRQ[1]#/GPI[41]
4
1
2
3
5
3D3V_S0 R617 10KR2

RTC1 P3 LPC_LDRQ1# 1 2
LFRAME#/FWH[4] LPC_LFRAME# 36 10KR2
D12 R629
EE_CS
1
B12 VCCP_GMCH_S0
ETY-CON3-S1 R333 EE_SHCLK
D11 EE_DOUT A20GATE AF22 ICH_A20GATE 36
10KR2 F13 AF23 SB
EE_DIN A20M# H_A20M# 4
1
DY
The symbol use 2nd source TP42 ICH_TP5 F12 AE27 H_CPUSLP#_ICH 1 DY 0R2-0
2 R256
LAN
H_CPUSLP# 4,6
2
LAN_CLK CPUSLP#
3
The P/N is the main source D R53 56R2J

Main source:20.D0152.103 1 Q17 1 2 LAN_RSTSYNC B11 AE24 H_DPRSLP#_R R250 1 20R2-0
2N7002 10KR2 LAN_RSTSYNC DPRSLP# H_DPRSLP# 4
G R270 AD27 H_DPSLP#_R R245 1 20R2-0 H_DPSLP# 4
2
2nd source:20.D0012.103 S DPSLP#
DY E12
2
LANRXD[0] H_FERR_R
E11 AF24 1 2
CPU
LANRXD[1] FERR# 56R2J H_FERR# 4
C13 R252
LANRXD[2]
25,36,43 RSMRST# CPUPWRGD/GPO[49] AG25 H_PWRGD 4
C12 LANTXD[0]
C11 LANTXD[1] IGNNE# AG26 H_IGNNE# 4
E13 LANTXD[2] INIT3_3V# AE22
3 AF27 3
INIT# H_INIT# 4
32,35 AC97_BITCLK C10 ACZ_BIT_CLK INTR AG24 H_INTR 4
1 2 AC97_SYNC_ICH B9 VCCP_GMCH_S0
AC-97/AZALIA
32,35 AC97_SYNC 33R2 ACZ_SYNC
R269 AD23
RCIN# RCIN# 36
1 2 AC97_RST#_ICH A10
32,35 AC97_RST# ACZ_RST#
1
R271 33R2 AF25
NMI H_NMI 4
F11 AG27 R257
32 AC97_DIN0 ACZ_SDIN[0] SMI# H_SMI# 4 R6V9 75R2
35 AC97_DIN1 F10 ACZ_SDIN[1]
B10 ACZ_SDIN[2] STPCLK# AE26 H_STPCLK# 4
2
1 2 AC97_DOUT_ICH C9 AE23 H_THERMTRIP_R 1 2
32,35 AC97_DOUT 33R2 ACZ_SDO THRMTRIP# 56R2J PM_THRMTRIP-I# 4,7
R623 R258
R6V7
AC19 AC16 Layout Note: R6V7 needs to placed
SATALED# DA[0] IDE_A0 26 within 2" of ICH6, R6V9 must be placed
DA[1] AB17 IDE_A1 26
AE3 AC17 within 2" of R6V7 w/o stub.
SATA[0]RXN DA[2] IDE_A2 26
AD3 SATA[0]RXP
AG2 SATA[0]TXN DCS1# AD16 IDE_CS#0 26
1 2 AF2 SATA[0]TXP DCS3# AE17 IDE_CS#1 26
R627 0R2-0
AD7 SATA[2]RXN DD[0] AD14 IDE_D0 26
AC7 AF15
SATA
SATA[2]RXP DD[1] IDE_D1 26
AF6 SATA[2]TXN DD[2] AF14 IDE_D2 26
AG6 SATA[2]TXP DD[3] AD12 IDE_D3 26
IDE
DD[4] AE14 IDE_D4 26
AC2 SATA_CLKN DD[5] AC11 IDE_D5 26
AC1 SATA_CLKP DD[6] AD11 IDE_D6 26
DD[7] AB11 IDE_D7 26
SATA_RBIAS_PN AG11 AE13
2 SATARBIAS# DD[8] IDE_D8 26 2
AF11 SATARBIAS DD[9] AF13 IDE_D9 26
AB12 VCCP_GMCH_S0
DD[10] IDE_D10 26
2
DD[11] AB13 IDE_D11 26

R272 AC13
DD[12] IDE_D12 26
1
0R2-0 AF16 AE15
26 IDE_IORDY IORDY DD[13] IDE_D13 26
AB16 AG15 R246 VCCP_GMCH_S0
Place within 500 mils 26 IDE_IRQ14 IDEIRQ DD[14] IDE_D14 26
AB15 AD13 56R2J
26 IDE_DACK# IDE_D15 26
1
of ICH6 ball DDACK# DD[15]

26 IDE_IOW# AC14 DIOW# DY
1
26 IDE_IOR# AE16 AB14 IDE_DREQ 26
2
DIOR# DDREQ H_DPSLP# R251
56R2J
ICH6M DY
2
H_DPRSLP#
1 <Core Design> 1
Wistron Corporation
Title
ICH6-M (1 of 4)
A3
Leopard2 -1
A B C D E
A B C D E
U42C
U42B PCIE AC coupling caps
3D3V_S0 need to be within 250 mils of the driver.
18,27,30,34 PCI_AD[31..0]
PM_RI# T2 H25
RI# PERn[1] PCIE_RXN0 26
PCI_AD0 E2 L5 PCI_REQ#0 RN8 H24 C250
AD[0] REQ[0]# PCI_REQ#0 34 PERp[1] PCIE_RXP0 26
PCI_AD1 E5 PCI C1 1 8 SATA0_R0 AF17 G27 PCIE_TXN0_R 1 2 SCD1U16V
AD[1] GNT[0]# PCI_GNT#0 34 SATA[0]GP/GPI[26] PETn[1] PCIE_TXN0 26
PCI_AD2 C2 B5 PCI_REQ#1 2 7 SATA0_R1 AE18 G26 PCIE_TXP0_R 1 2 C251
AD[2] REQ[1]# PCI_REQ#1 27 SATA[1]GP/GPI[29] PETp[1] SCD1U16V PCIE_TXP0 26
PCI_AD3 F5 B6 3 6 SATA0_R2 AF18
AD[3] GNT[1]# PCI_GNT#1 27 SATA[2]GP/GPI[30]
PCI_AD4 F3 M5 PCI_REQ#2 4 5 SATA0_R3 AG18 K25
AD[4] REQ[2]# PCI_REQ#2 30 SATA[3]GP/GPI[31] PERn[2]
PCI_AD5 E9 F1 K24
PCI-EXPRESS
AD[5] GNT[2]# PCI_GNT#2 30 PERp[2]
PCI_AD6 F2 B8 PCI_REQ#3 SRN100K Y4 J27
AD[6] REQ[3]# 24,26 SMB_CLK SMBCLK PETn[2]
PCI_AD7 D6 C8 ICH_GNT3 TP47 W5 J26
AD[7] GNT[3]# 24,26 SMB_DATA SMBDATA PETp[2]
PCI_AD8 E6 F7 PCB_VER2 SMB_LINK_ALERT# Y5
PCI_AD9 AD[8] REQ[4]#/GPI[40] ICH_GPO48 TP49 3D3V_S0 3D3V_S5 SMLINK0 LINKALERT#
D3 E7 W4 M25
GPIO
4 4
PCI_AD10 AD[9] GNT[4]#/GPO[48] PCI_REQ#5 SMLINK1 SMLINK[0] PERn[3]
A2 AD[10] REQ[5]#/GPI[1] E8 U6 SMLINK[1] PERp[3] M24
1
PCI_AD11 D2 F6 ICH_GPO17 TP48 MCH_SYNC# AG21 L27
PCI_AD12 AD[11] GNT[5]#/GPO[17] ICH_GPI0_R R318 MCH_SYNC# PETn[3]
D5 AD[12] REQ[6]#/GPI[0] B7 1 2 32 ICH_SPKR F8 SPKR PETp[3] L26
PCI_AD13 H3 D8 ICH_GPO16 R287 10KR2 10KR2
PCI_AD14 AD[13] GNT[6]#/GPO[16] TP46 PM_SUS_STAT#
B4 AD[14] W3 SUS_STAT#/LPCPD# PERn[4] P24
PCI_AD15 J5 J6 P23
PCI_C/BE#0 27,30,34
2
PCI_AD16 AD[15] C/BE[0]# SYS_RESET# PERp[4]
K2 AD[16] C/BE[1]# H6 PCI_C/BE#1 27,30,34 U2 SYS_RESET# PETn[4] N27
PCI_AD17 K5 G4 N26
AD[17] C/BE[2]# PCI_C/BE#2 27,30,34 PETp[4]
PCI_AD18 D4 G2 AD19
AD[18] C/BE[3]# PCI_C/BE#3 27,30,34 7 PM_BMBUSY# BMBUSY#
PCI_AD19 L6 D15 T25
AD[19] DMI[0]RXN DMI_RXN0 7
PCI_AD20 G3 A3 3 1 ICH_GPI7 AE19 T24
AD[20] IRDY# PCI_IRDY# 27,30,34 26 CPPE# GPI[7] DMI[0]RXP DMI_RXP0 7 Layout Note:
PCI_AD21 H4 E1 ECSMI# R1 R27
Direct Media Interface

AD[21] PAR PCI_PAR 27,30,34 GPI[8] DMI[0]TXN DMI_TXN0 7 PCIE AC coupling caps
PCI_AD22 H2 R2 DY S1N4148-U2 R26
AD[22] PCIRST# ICH_PCIRST# 24 DMI[0]TXP DMI_TXP0 7 need to be within 250 mils of the driver.
PCI_AD23 H5 C3 ECSCI# W6
AD[23] DEVSEL# PCI_DEVSEL# 27,30,34 SMBALERT#/GPI[11]
PCI_AD24 B3 E3 V25
AD[24] PERR# PCI_PERR# 27,30,34 DMI[1]RXN DMI_RXN1 7
PCI_AD25 M6 C5 PCI_LOCK# GPI12 M2 V24
AD[25] PLOCK# GPI[12] DMI[1]RXP DMI_RXP1 7
PCI_AD26 B2 G5 ECSWI# R6 U27
AD[26] SERR# PCI_SERR# 27,30,34 GPI[13] DMI[1]TXN DMI_TXN1 7
PCI_AD27 K6 J1 U26
AD[27] STOP# PCI_STOP# 27,30,34 DMI[1]TXP DMI_TXP1 7
PCI_AD28 K3 J2 AC21
AD[28] TRDY# PCI_TRDY# 27,30,34 3 PM_STPPCI# STP_PCI#
PCI_AD29 A5 Y25
AD[29] DMI[2]RXN DMI_RXN2 7
PCI_AD30 L1 TP39 ICH6_GPO19 AB21 Y24
AD[30] GPO[19] DMI[2]RXP DMI_RXP2 7
PCI_AD31 K4 R5 TPAD30 W27
AD[31] PLTRST# PLT_RST# 24 DMI[2]TXN DMI_TXN2 7
PCICLK G6 CLK_ICHPCI 3 3,41 PM_STPCPU# AD22 STP_CPU# DMI[2]TXP W26 DMI_TXP2 7
27,30,34 PCI_FRAME# J3 FRAME# PME# P6 ICH_PME# 18,30,34
TP40 ICH6_GPO21 AD20 AB24
GPO[21] DMI[3]RXN DMI_RXN3 7 1D5V_S0
Interrupt I/F TP14 TPAD30 ICH_GPO27 AD21 AB23
GPO[23] DMI[3]RXP DMI_RXP3 7
INT_PIRQA# N2 D9 INT_PIRQE# TPAD30 AA27
PIRQ[A]# PIRQ[E]#/GPI[2] INT_PIRQE# 30,34 DMI[3]TXN DMI_TXN3 7 Place within 500 mils of ICH
INT_PIRQB# L2 C7 INT_PIRQF# V3 AA26
PIRQ[B]# PIRQ[F]#/GPI[3] INT_PIRQF# 27 13 M24_RST# GPIO[24] DMI[3]TXP DMI_TXP3 7
1
3 INT_PIRQC# M1 C6 INT_PIRQG# 3
PIRQ[C]# PIRQ[G]#/GPI[4] INT_PIRQG# 27
INT_PIRQD# L3 M3 INT_PIRQH# P5 AD25 R615
PIRQ[D]# PIRQ[H]#/GPI[5] 26 NEWCARD_RST# GPIO[25] DMI_CLKN CLK_PCIE_ICH# 3 24D9R2F
31 BT_EN R3 GPIO[27] DMI_CLKP AC25 CLK_PCIE_ICH 3
RESERVED 34 WIRELESS_EN# T3 GPIO[28]
AC5 AD9 27,30,34,36 PM_CLKRUN# AF19 F24
2
RSVD[1] RSVD[6] PCB_VER0 CLKRUN# DMI_ZCOMP
AD5 RSVD[2] RSVD[7] AF8 AF20 GPIO[33]
AF4 AG8 PCB_VER1 AC18 F23 DMI_IRCOMP_R
RSVD[3] RSVD[8] GPIO[34] DMI_IRCOMP
AG4 RSVD[4] TP[3] U3
AC9 U5 C23 USB_OC#4
RSVD[5] 26 PCIE_WAKE# WAKE# OC[4]#/GPI[9]
D23 USB_OC#5
OC[5]#/GPI[10] USB_OC#6
27,34,36 PCI_SERIRQ AB20 C25 RP3 3D3V_S5
SERIRQ OC[6]#/GPI[14] USB_OC#7 USB_OC#0
OC[7]#/GPI[15] C24 1 10
ICH6M AC20 USB_OC#1 2 9 USB_OC#5
25 PM_THRM# THRM#
C27 USB_OC#0 USB_OC#3 3 8 USB_OC#4
ICH6 Pullups 3D3V_S5
25 VRM_PWRGD AF21 VRMPWRGD
OC[0]#
OC[1]# B27 USB_OC#1
USB_OC#2
USB_OC#2 4 7 USB_OC#7
USB_OC#6
RP4 3D3V_S0 B26 3D3V_S5 5 6
PCI_FRAME# OC[2]# USB_OC#3
1 10 E10 C26
CLOCKS
3 CLK_ICH14 CLK14 OC[3]#
PCI_IRDY# 2 9 INT_PIRQD# SRP10K
PCI_TRDY# 3 8 INT_PIRQG# RN10 A27 C21 USB_PN0 TP12
3 CLK48_USB CLK48 USBP[0]N
PCI_STOP# 4 7 INT_PIRQF# PM_RI# 1 8 D21 USB_PP0 TP13
INT_PIRQE# SMB_LINK_ALERT# TP51 PM_SUS_CLK USBP[0]P
3D3V_S0 5 6 2 7 V6 SUSCLK USBP[1]N A20 USB_PN1 18
SMLINK0 3 6 TPAD30 B20
USBP[1]P USB_PP1 18
SRP10K SMLINK1 4 5 T4 D19
26,33,36,42,44,45,46 PM_SLP_S3# SLP_S3# USBP[2]N USB_PN2 31
RP1 3D3V_S0 26,36,42 PM_SLP_S4# T5 C19 USB_PP2 31
PCI_SERR# TP50 ICH_SLP_S5# SLP_S4# USBP[2]P
1 10 SRN10K T6 A18 USB_PN3 18
PCI_DEVSEL# INT_PIRQH# PCIE_WAKE# TPAD30 SLP_S5# USBP[3]N
2 9 1 2 USBP[3]P B18 USB_PP3 18
PCI_PERR# 3 8 PCI_REQ#2 R639 5K6R2 AA1 E17
25 ICH6_PWROK PWROK USBP[4]N USB_PN4 35
POWER MGT
PCI_LOCK# 4 7 PCI_REQ#3 PM_BATLOW#_R 1 2 D17
8K2R2 USBP[4]P USB_PP4 35
5 6 PM_CLKRUN# R630 1 2 PM_DPRSLPVR_R AE20 B16
2 3D3V_S0 41 PM_DPRSLPVR 100R2 DPRSLPVR USBP[5]N USB_PN5 35 2
PM_SUS_STAT# 1 2 R618 A16
USB
USBP[5]P USB_PP5 35
SRP10K 36 PM_SUS_STAT# R631DY 10KR2 PM_BATLOW#_R V2 C15
BATLOW# USBP[6]N USB_PN6 26
RP2 3D3V_S0 D15 USB_PP6 26
PCI_REQ#5 3D3V_S0 USBP[6]P
1 10 36 PM_PWRBTN# U1 PWRBTN# USBP[7]N A14 USB_PN7 18
INT_PIRQA# 2 9 PCI_SERIRQ B14
USBP[7]P USB_PP7 18
1
INT_PIRQC# 3 8 MCH_SYNC# PCI_REQ#1 1 2 PLT_RST# V5

INT_PIRQB# PCI_REQ#0 R286 10KR2 R616 LAN_RST#
4 7 USBRBIAS# A22
5 6 PM_THRM# ICH_GPI7 1 2 100KR2 Y3 B22 USB_RBIAS_PN 1 2 Intel 22.6 ohm 1%
3D3V_S0 10KR2 36 RSMRST#_KBC RSMRST# USBRBIAS 22D6R2F
R264 R255
SRP10K GPI12 1 2
2
R628 10KR2 ICH6M Place within 500 mils of ICH
3D3V_S0 0706 -1 3D3V_S5

1
1
R330 R332 R625 R317 R637 R638
10KR2 10KR2 DUMMY-R2 100KR2 100KR2 100KR2
PUMA Board Version Setting

2
2
2
PCB_VER0
PCB_VER1 PCB_VER0 PCB_VER1 PCB_VER2
PCB_VER2 Ver.
1
SA 0 0 0 <Core Design> 1
1
D20
1
R329 R331 ECSMI# 6 1

DUMMY-R2 DUMMY-R2 R626 SB 0 1 0 ECSMI#_KBC 36
10KR2
SC 1 0 0 Wistron Corporation
ECSCI# 5 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
ECSCI#_KBC 36
-1 1 1 0
2
ECSWI# 4 3 Title
-2 0 0 1 ECSWI#_KBC 36
ICH6-M (2 of 4)
CH731U-U
To avoide leakage current Size Document Number Rev
A3
Leopard2 -1
A B C D E
A B C D E
1D5V_S0
Layout Note:
Place above caps within
1
100 mils of ICH near F27, P27, AB27
U42E C573 C575 C584 C577 C585
SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
2
Layout Note:
1D5V_S0 Place near pin AA19
AA22 VCC1_5_B VCC1_5_A F9

AA23 VCC1_5_B VCC1_5_A U17
1
C252 AA24 U16
VCC1_5_B VCC1_5_A
1
4 TC12 C568 C576 AA25 U14 4
VCC1_5_B VCC1_5_A
SCD1U10V2MX-1
ST220U10V-U SCD1U10V2MX-1 SCD1U10V2MX-1 C592 C593 C583 C582 C590 C282
DY AB25 U12 DY DY DY DY DY
2
VCC1_5_B VCC1_5_A
SCD1U10V2MX-1
SCD1U10V2MX-1
SCD1U10V2MX-1
SCD1U10V2MX-1
SCD1U10V2MX-1
AB26 U11 SCD1U10V2MX-1
2
VCC1_5_B VCC1_5_A
AB27 VCC1_5_B VCC1_5_A T17 DY
F25 VCC1_5_B VCC1_5_A T11
F26 P17
CORE
VCC1_5_B VCC1_5_A
F27 VCC1_5_B VCC1_5_A P11
G22 VCC1_5_B VCC1_5_A M17
G23 VCC1_5_B VCC1_5_A M11
G24 VCC1_5_B VCC1_5_A L17
Layout Note: G25 L16
IDE decoupling VCC1_5_B VCC1_5_A
H21 VCC1_5_B VCC1_5_A L14
3D3V_S0 H22 L12
VCC1_5_B VCC1_5_A
J21 VCC1_5_B VCC1_5_A L11 ALL NO_STUFF Caps do
1
J22 VCC1_5_B VCC1_5_A AA21 not have layout

C295 K21 AA20 Place within 100 requirements but if
SC10U10V5ZY-L VCC1_5_B VCC1_5_A mils of ICH pin 3D3V_S0
K22 AA19 layout allows then place *Within a given well, 5VREF needs to be up before the
2
VCC1_5_B VCC1_5_A AG13, AG16

L21 VCC1_5_B
next to ICH6 corresponding 3.3V rail
L22 AA10
PCIE
VCC1_5_B VCC3_3
M21 VCC1_5_B VCC3_3 AG19
1
M22 AG16 5V_S0
VCC1_5_B VCC3_3 C267 C264
N21 VCC1_5_B VCC3_3 AG13
N22 AD17 SCD1U10V2MX-1
2
VCC1_5_B VCC3_3
1
Layout Note: N23 AC15 SCD1U10V2MX-1 D19
VCC1_5_B VCC3_3
IDE
PCI decoupling N24 AA17
3D3V_S0 VCC1_5_B VCC3_3
N25 VCC1_5_B VCC3_3 AA15
P21 AA14 Layout Note: 3D3V_S0 CH751H-40-U
VCC1_5_B VCC3_3
1
P25 AA12 Distribute in PCI section 3D3V_S0 1D5V_ICH_S5 1D5V_S5
12
C268 VCC1_5_B VCC3_3 near pin A2-A6 near D1-H1
P26 VCC1_5_B
1
3 SC10U10V5ZY-L P27 P1 D16 R285 3
2
VCC1_5_B VCC3_3
1
R21 M7 100R2
VCC1_5_B VCC3_3 C589 C296 C297
R22 VCC1_5_B VCC3_3 L7
T21 L4 SCD1U10V2MX-1 SCD1U10V2MX-1 CH751H-40-U Intel 10 ohm
2
VCC1_5_B VCC3_3 SCD1U10V2MX-1
T22 J7
2
VCC1_5_B VCC3_3 1D5V_ICH_S5 V5REF_S0
PCI
U21 VCC1_5_B VCC3_3 H7
U22 VCC1_5_B VCC3_3 H1
1
V21 VCC1_5_B VCC3_3 E4
V22 B1 C271 C280
VCC1_5_B VCC3_3
1
W21 A6 SCD1U16V SC1U10V3ZY
2
VCC1_5_B VCC3_3 C591 C594
W22 VCC1_5_B
Y21 U7 SCD1U10V2MX-1
2
1D5V_S0 VCC1_5_B VCCSUS1_5 SCD1U10V2MX-1
Y22 VCC1_5_B VCCSUS1_5 R7
1D5V_ICH_S5 Layout Note: 3D3V_S5 5V_S5
AA6 Place near U7
VCC1_5_A 1D5V_S0
USB
AB4 VCC1_5_A VCCSUS1_5 G19
1
1
Place within 100 C281 AB5 VCC1_5_A
1
mils of ICH C596 C598 AB6 G20 ICH_VCC1_5 D35 R611
VCC1_5_A VCC1_5_A
SCD1U10V2MX-1
near pin AG5 SCD1U10V2MX-1 SCD1U10V2MX-1 AC4 F20 C574 10R2

2
VCC1_5_A VCC1_5_A
1
SCD1U10V2MX-1 Intel 10 ohm
DY DY DY AD4 E24
2
VCC1_5_A VCC1_5_A C565 C567
AE4 E23 CH751H-40-U
USB CORE
2
VCC1_5_A VCC1_5_A
SCD1U10V2MX-1
AE5 E22 SCD1U10V2MX-1 V5REF_S5
1 2
VCC1_5_A VCC1_5_A Place both
AF5 VCC1_5_A VCC1_5_A E21
1
1D5V_S0 AG5 E20 within 100 mils
SATA
VCC1_5_A VCC1_5_A of ICH near D27 C566 C549

VCC1_5_A D27
Place within 100 AA7 D26 SCD1U16V SC1U10V3ZY
2
mils of ICH VCC1_5_A VCC1_5_A
AA8 VCC1_5_A VCC1_5_A D25
1
near pin AG9 C604 AA9 D24

C597 C273 VCC1_5_A VCC1_5_A
AB8 VCC1_5_A
2 1D5V_S0 V2D5S_PCI_IDE 2
SCD1U10V2MX-1
1D5V_GPLL_ICH_S0 SCD1U10V2MX-1 SCD1U10V2MX-1 AC8 G8 2D5V_S0

2
VCC1_5_A VCC1_5_A 1D5V_S5

G26 DY DY DY AD8 G69
VCC1_5_A
1 2 AE8 AB18 1 2
PCI/IDE
VCC1_5_A VCC2_5
1
AE9 P7 1D5V_ICH_S0
VCC1_5_A VCC2_5
1
Place within 100 GAP-CLOSE-PWR AF9 C587 GAP-CLOSE-PWR

VCC1_5_A
1
SCD1U10V2MX-1
REF
mils of ICH C253 C254 AG9 SC
2
SCD01U16V3KX VCC1_5_A Layout Note: Place within 100 R660
AA18
2
V5REF
1
3D3V_S0 SC10U10V5ZY-L Place near AB18 mils of ICH 0R2-0
AC27 VCCDMIPLL V5REF A8
V5REF_S0 C258
DY
E26 VCC3_3
F21 V5REF_S5 SCD01U16V3KX
R659
2
1D5V_S0 1D5V_ICH_S0 V5REF_SUS 3D3V_S5
AE1 VCCSATAPLL
1
G29 AG10 A25 ICH6_VCCLAN1D5V 1 2

Place within 100 VCC3_3 VCCUSBPLL 1D5V_S0
C586 1 2 A24
mils of ICH SCD1U10V2MX-1 VCCSUS3_3 Place within 100
A13
2
VCCLAN3_3/VCCSUS3_3 0R2-0
1
1
near E26, E27 GAP-CLOSE-PWR F14 AB3 mils of ICH
C610 VCCLAN3_3/VCCSUS3_3 VCCRTC C259
G13 VCCLAN3_3/VCCSUS3_3
Place within 100 SCD1U10V2MX-1 G14 SCD1U10V2MX-1
ICH6_VCCLAN3D3V
2
2
mils of ICH VCCLAN3_3/VCCSUS3_3 ICH6_VCCLAN1D5V
3D3V_S0 pin AE1
DY VCCLAN1_5/VCCSUS1_5 G11
A11 VCCSUS3_3 VCCLAN1_5/VCCSUS1_5 G10
U4 Place within 100 RTC_AUX_S5
VCCSUS3_3 mils of ICH
V1 VCCSUS3_3 V_CPU_IO AG23
Place within 100 V7 AD26 pin G10 Layout Note:
VCCSUS3_3 V_CPU_IO
1
mils of ICH W2 AB22 Place near AB3

VCCSUS3_3 V_CPU_IO VCCP_GMCH_S0
1
pin AG10 C272 Y7 VCCSUS3_3
1
SCD1U10V2MX-1 G16 C609 C615

3D3V_S0
2
VCCSUS3_3 C569 SCD1U10V2MX-1

A17 G15
2
VCCSUS3_3 VCCSUS3_3 SCD1U10V2MX-1 SCD1U10V2MX-1
B17 F16
2
VCCSUS3_3 VCCSUS3_3
C17 VCCSUS3_3 VCCSUS3_3 F15
Layout Note:
DY
1 Intel dummy F18 VCCSUS3_3 VCCSUS3_3 E16 <Core Design> 1
G17 D16 Place near AG23
Place within 100 VCCSUS3_3 VCCSUS3_3
G18 VCCSUS3_3 VCCSUS3_3 C16
mils of ICH
pin A13 Place within 100 3D3V_S5 Wistron Corporation
3D3V_S5 mils of ICH ICH6M 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
pin V7 Taipei Hsien 221, Taiwan, R.O.C.
1
1
Title
1
C572 C581 C571 C263

C595 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 ICH6-M (3 of 4)
2
SCD1U10V2MX-1 Place within 100 Size Document Number Rev

DY DY
2
mils of ICH A3
pin A17 Leopard2 -1
A B C D E
A B C D E
U42D
E27 VSS VSS F4

Y6 VSS VSS F22
Y27 VSS VSS F19
Y26 VSS VSS F17
Y23 VSS VSS E25
W7 VSS VSS E19
W25 VSS VSS E18
W24 VSS VSS E15
W23 VSS VSS E14
4 W1 VSS VSS D7 4
V4 VSS VSS D22
V27 VSS VSS D20
V26 VSS VSS D18
V23 VSS VSS D14
U25 VSS VSS D13
U24 VSS VSS D10
U23 VSS VSS D1
U15 VSS VSS C4
U13 VSS VSS C22
T7 VSS VSS C20
T27 VSS VSS C18
T26 VSS VSS C14
T23 VSS VSS B25
T16 VSS VSS B24
T15 VSS VSS B23
T14 VSS VSS B21
T13 VSS VSS B19
T12 VSS VSS B15
T1 VSS VSS B13
R4 AG7
VSS
VSS VSS
R25 VSS VSS AG3
R24 VSS VSS AG22
R23 VSS VSS AG20
R17 VSS VSS AG17
R16 VSS VSS AG14
R15 VSS VSS AG12
R14 VSS VSS AG1
R13 VSS VSS AF7
3 R12 AF3 3
VSS VSS
R11 VSS VSS AF26
P22 VSS VSS AF12
P16 VSS VSS AF10
P15 VSS VSS AF1
P14 VSS VSS AE7
P13 VSS VSS AE6
P12 VSS VSS AE25
N7 VSS VSS AE21
N17 VSS VSS AE2
N16 VSS VSS AE12
N15 VSS VSS AE11
5V_S0 N14 AE10
VSS VSS
N13 VSS VSS AD6
N12 VSS VSS AD24
U78A
14
N11 VSS VSS AD2
N1 VSS VSS AD18
PLT_RST# 1 M4 AD15
RSTDRV#_R VSS VSS
3 1 2 RSTDRV#_5 26 M27 VSS VSS AD10
2 R644 33R2 M26 AD1
VSS VSS
M23 VSS VSS AC6
TSAHCT32 M16 AC3
7
VSS VSS
M15 VSS VSS AC26
M14 VSS VSS AC24
M13 VSS VSS AC23
M12 VSS VSS AC22
L25 VSS VSS AC12
L24 VSS VSS AC10
2 PCIRST# 3V to 5V level shift for HDD & CDROM L23 VSS VSS AB9
2
L15 VSS VSS AB7
L13 VSS VSS AB2
K7 VSS VSS AB19
K27 VSS VSS AB10
K26 VSS VSS AB1
K23 VSS VSS AA4
K1 AA16
SMBUS(ICH6 ---> SODIMM,CLKGEN) 3D3V_S0
J4
VSS
VSS
VSS
VSS AA13
J25 VSS VSS AA11
J24 VSS VSS A9
J23 VSS VSS A7
3D3V_S0 U44B
14
H27 VSS VSS A4
H26 VSS VSS A26
4 H23 VSS VSS A23
6 PLT_RST#_R 1 2 G9 A21
33R2 PLT_RST1# 7,13,26 VSS VSS
5 R268 G7 A19
3D3V_S0 22 PLT_RST# VSS VSS
G21 VSS VSS A15
TSLCX08-U ICH6 asserts PLTRST# to reset G12 A12
7
VSS VSS
1
2
G1 A1
RN4 devices on the platform. VSS VSS
3D3V_S5 SRN4D7KJ
ICH6M
3D3V_S0
4
3
U44C
14
1
2
RN5 SMB_ICH_CTL 9
8 ICH_PCIRST#_R 1 2
1 SMBD_ICH 3,11 33R2 PCIRST1# 27,28,30,34,36 <Core Design> 1
SRN10KJ U37 10 R284
22 ICH_PCIRST#
4 3 TSLCX08-U Secondary PCI Bus reset signal.
Wistron Corporation
7
4
3
5 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

22,26 SMB_CLK 6 1 SMBC_ICH 3,11
Title
2N7002DW
PCIRST# Buffer to enhance the driving strength ICH6-M (4 of 4)
22,26 SMB_DATA
A3
Leopard2 -1
A B C D E
A B C D E
Reserve for G768B

works at High
Speed
5V_S0 5V_G768_S0 Close to G768D
4 G9 5V_G768_S0 4
1 2
GAP-CLOSE-PWR 1
1
U12
EC20 BC6 BC5
SCD1U16V SC10U10V6ZY-U VCC_FAN
DY 1 16
2
2
SC1000P50V FANVCC TH_SHUT
2 VCC VCC 15
3 14 SMBC_G768D
4 THERMDP1 DXP1 SMBCLK
4 THERMDN 4 DXN NC 13
THERMDP2 5 12 SMBD_G768D
RUNPWROK DXP2 SMBDATA
1 2 G768_RST# 6 RESET# ALERT# 11 PM_THRM# 22
R46 4K7R2 7 10 FAN_FB
GND FG
1
8 AGND CLK 9
R38 CLK32_G768 36
10KR2
G768D
2
R30:5K SET TO 120°C
Must close to MAX6509
U4
3D3V_S0
M6509_SET 1 5
SET VCC 5V_S5
2 GND
1
U63 3 4
R30 OUT# HYST C34
Put these two Caps near the thermal diode. 1 NC VCC 5
2 22KR3F SCD1U25V3KX
3,41 CLK_PWRGD#
2
3 A VRM_PWRGD 3D3V_AUX 3
3 4 MAX6509HAUK-T-U
GND Y
2
NC7S14-U
THERMDP2 THERMDP1
DY Put under CPU Socket
3
3
1
Q9 D8
BC11 1 BC1 R68
SC470P50V3JN SC470P50V3JN 10KR2 RSMRST# 21,36,43
DY 3D3V_AUX
DY S2N3904-U3 DY
2
THERMDN R529 U18
2
41 VGATE 1 2 PWROK 7 BAT54-1 1 5
0R0402-PAD A VCC
SYSTEM SENSOR
1
R530 2
36,42 S5_ENABLE B
1 2 BC10
VRM_PWRGD 22 SCD1U16V
0R0402-PAD 3 4 S5PWR_ENABLE 46
2
GND Y
THERMDP1 THERMDP2
DY
NC7S08-U
1
BC7 BC4
SC2K2P SC2K2P
2
THERMDN THERMDN 3D3V_S0
THERMDP1/DP2/THERMDN ON THE SAME LAYER U44D

14
2 W/S = 10/5 MIL, 12 MIL AWAY FROM OTHERS RUNPWROK THERMDP_M24 2

12 G781 Close to VGA chip
CAPS CLOSE TO G768B 11 ICH6_PWROK 22
2
42,44,45 VCCP_PWRGD 13
BC9
TSLCX08-U SC2K2P 3D3V_S0
7
1
180 ms after VCC_G768 > 4.38v, p2, 7 THERMDN_M24
3D3V_S0
1
5V_S0
R59
2K2R2
5V_S0 U13
2
1 VCC SMBCLK 8 DDC3_CLK 13,19
1
1
2
RN1 13 THERMDP_M24 2 7 DDC3_DATA 13,19
R557 DXP SMBDATA
13 THERMDN_M24 3 DXN ALERT# 6 VGA_ALERT# 13
10KR2 4 5
THERM# GND
FAN1
5 SRN10KJ
2
1
3 FAN_FB G781 74.00781.0BD
4
3
2 C57
SCD1U16V
2
1 VCC_FAN
4
3
SMBD_G768D
1
ETY-CON3-S1 D33 BC119 36 SMBD_KBC

S1N4148-U2 BC117 BC118 SCD1U16V
2
SC10U10V6ZY-U SCD1U16V
<Core Design>
2
1 1
1
SMBC_G768D Wistron Corporation

The symbol use 2nd source 36 SMBC_KBC 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
The P/N is the main source Taipei Hsien 221, Taiwan, R.O.C.
Main source:20.D0152.103
Title
2nd source:20.D0012.103
G768D
A3 -1
Leopard2
A B C D E
A B C D E
HDD Connector HDD1

47
21 IDE_D[15..0]
2
45
1 RSTDRV#_5 24 CDROM
IDE_D8 4 3 IDE_D7 CN16
IDE_D9 6 5 IDE_D6 5V_S0 51
IDE_D10 8 7 IDE_D5 3D3V_S0 53
4 IDE_D11 10 9 IDE_D4 3D3V_S0 2 1 4
32 CD_AUDR CD_AUDL 32
IDE_D12 12 11 IDE_D3
1
IDE_D13 14 13 IDE_D2 4 3 CD_AGND 32
1
IDE_D14 16 15 IDE_D1 R541 R527 IDE_D8 6 5 RSTDRV#_5
IDE_D15 18 17 IDE_D0 R531 4K7R2 4K7R2 IDE_D9 8 7 IDE_D7
20 19 4K7R2 IDE_D10 10 9 IDE_D6
22 21 DY IDE_D11 12 11 IDE_D5
2
IDE_DREQ 21 IDE_D12 IDE_D4
24 23 IDE_IOW# 21 14 13
2
26 25 5V_S0 IDE_D13 16 15 IDE_D3
IDE_IOR# 21
HDDCSEL1 28 27 IDE_D14 18 17 IDE_D2
IDE_IORDY 21
30 29 PBIDDACK# 1 2 IDE_D15 20 19 IDE_D1
IDE_DACK# 21
1
2
32 31 R532 0R0402-PAD IDE_DREQ 22 21 IDE_D0
R528 DIAG IDE_IRQ14 21 R542 IDE_IOR#
34 33 IDE_A1 21 24 23
470R2 36 35 10KR2 26 25 IDE_IOW#
21 IDE_A2 IDE_A0 21
38 37 IDE_DACK# 28 27 IDE_IORDY
21 IDE_CS#1 IDE_CS#0 21
40 39 HDD_LED# TP18 BAY_ID0 30 29 IDE_IRQ14
HDD_LED# 19
2
1
42 41 DIAG 32 31 IDE_A1 5V_S0
44 43 IDE_A2 34 33 IDE_A0
1
46 IDE_CS#1 36 35 IDE_CS#0
2
48 R540 38 37
5V_S0 CDROM_LED# 19
5V_S0 2K7R2J 40 39 R311
SYN-CONN44D-5 10KR2
DY 42 41 5V_S0
44 43
2
46 45
1
48 47 CSEL CDROM_CSEL
1
C292 50 49
1
5V_S0 54
1
2
SCD1U16V 52 R288
2
C483 C480 D32 DUMMY-R2
SYN-CONN50-4R3GP
SC10U10V5ZY-L
3 3
2
1
SCD1U16V
SSM24L-U
DY BC69 PIN 49,50 DON'T USE
1
2
SC10U10V6ZY-U
2
The symbol use 2nd source
The P/N is the main source
Main source:20.10150.050
2nd source:20.B0040.050
3D3V_S0
NEWCARD Connector SKT3

IDE_IRQ14 1
R320
2
8K2R2
1 2
Place them Near to Chip Place them Near to Connector
3D3V_S5 1D5V_S0 3D3V_NEW_S0 1D5V_NEW_S0 3D3V_NEW_LAN_S5 3 4
CARD-SKT21-U2
1
For Newcard socket

C256 C257 C270 C269 C260 C261 C265
DY SCD1U16VDY SCD1U16V SC10U10V5ZY-L SCD1U16V SC10U10V5ZY-L SCD1U16V SCD1U16V
2
2 2
CN14
26
3D3V_S5 25
22 PCIE_TXP0
RN7 22 PCIE_TXN0 24
2 3 CPPE# MH2
1 4 CPUSB# 23
U41 PCIE_RXP0_R 22
22 PCIE_RXP0
SRN100KJ PCIE_RXN0_R 21
22 PCIE_RXN0
19 14 CPUSB# 20
1D5V_S0 1.5VIN CPUTSB#
18 15 CPPE# 19
1.5VIN CPPE# 3 CLK_PCIE_NEW
STBY# 4 PM_SLP_S3# 22,33,36,42,44,45,46 3 CLK_PCIE_NEW# 18
1D5V_NEW_S0 17 1.5VOUT SHDN# 3 PM_SLP_S4# 22,36,42 3D3V_S0 22 CPPE# 17
16 2 TPS2231_RST# TP45 CONN_CLKREQ# 16
1.5VOUT SYSRST#
RCLKEN 22 3D3V_NEW_S0 15
3D3V_S0 5 3.3VIN 1 2 PLT_RST1# 7,13,24 14
1
6 R267 0R2-0 SC PERST# 13

3.3VIN R488
NC#1 1 3D3V_NEW_LAN_S5 12
7 10 10KR2 CONN_WAKE# 11
3D3V_NEW_S0 3.3VOUT NC#10 22 PCIE_WAKE#
SMBUS(ICH6--NEWCARD,LAN)
3
8 12 D Q16 10
3.3VOUT NC#12 1D5V_NEW_S0
13 1CONN_CLKREQ# 9
2
NC#13
TP15 NEWCARD_OC# 23 OC# NC#24 24 G 2N7002 22,24 SMB_DATA
SMB_DATA_C 8
TP-2 21 S SMB_CLK_C 7
1 22,24 SMB_CLK <Core Design> 1
2
3D3V_S5 PERST# 3.3VAUX_IN TP38 CONN_TP2

9 PERST# GND 11 6
20 25 TP35 CONN_TP3 5
3D3V_NEW_LAN_S5 AUX_OUT GND PREQ2# 3
CPUSB# 4
3D3V_S5
MH1 Wistron Corporation
TPS2231 DY 3 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
22 USB_PP6
U43 2 Taipei Hsien 221, Taiwan, R.O.C.
22 USB_PN6
PLT_RST1# 1 5
A VCC Title
1
22 NEWCARD_RST# 2 B
JAE-CON26-U HDD / CDROM/NEWCARD
3 4 TPS2231_RST# Size Document Number Rev
GND Y A3
NC7SZ08-U Leopard2 -1
A B C D E
A B C D E
INTA# CARBUS 1
INTB# NONE
3D3V_S0 U47A 1 of 4 INTC# 1394
INTD# CARD READER
W3 N3 3D3V_S0
VCCP U1-1 MFUNC0 INT_PIRQG# 22
W10 M5 PCM_INTB# 1 2
VCCP MFUNC1 R324 0R2-0
18,22,30,34 PCI_AD[31..0] MFUNC2 P1 INT_PIRQF# 22
MFUNC3 P2 PCI_SERIRQ 22,34,36
PCI_AD31 U2 P3 INT_PIRQG#
PCI_AD30 AD31 MFUNC4 CB_MFUNC5
V1 AD30 MFUNC5 N5 7421_LED 19 Bypass/Decupoling Capacitors
PCI_AD29 V2 R1
AD29 MFUNC6 PM_CLKRUN# 22,30,34,36
4 PCI_AD28 U3 Should be places as close to 4
PCI_AD27 AD28
W2 AD27
PCI_AD26 V3 M1 PCI7421 as possible
AD26 CLK_48 CLK48_CARDBUS 3
PCI_AD25 U4
PCI_AD24 AD25 3D3V_PLL_S0
V4 AD24
PCI_AD23 V5
PCI_AD22 AD23 3D3V_S0
U5 AD22 AVDD R13
PCI_AD21 R6 U1-7 R14
PCI_AD20 AD21 AVDD
P6 AD20 AVDD V17
PCI_AD19 W6 AD19
1
PCI_AD18 V6 V19 VDPLL_33
PCI_AD17 AD18 VDPLL_33 C312 C287 C288 C289
U6 AD17 VSSPLL P14
PCI_AD16 R7 SC1000P50V SCD1U16V SCD1U16V SCD1U16V
2
PCI_AD15 AD16 VDPLL_15
V9 AD15 VDPLL_15 T18 1 2 C293 DY DY
PCI_AD14 U9 T17 SCD1U16V
PCI_AD13 AD14 VSSPLL
R9 AD13
PCI_AD12 N9 * All 1394 signals must be routed on top side only
PCI_AD11 AD12 * Differential pairs of each ports should have equal trace length 3D3V_S0
V10 U18 1394_R0 1 2
CARD BUS
PCI_AD10 AD11 R0 6K34R3F * Stubs must be keep as short as possible
U10 AD10 R1 U19 1394_R1 R289
PCI_AD9 R10
PCI_AD8 AD9
N10 AD8 TPBIAS0 U15 1394_TPBIAS0 31
1
PCI_AD7 V11
PCI_AD6 AD7 C313 C314 C310 C311
U11 AD6 TPA0P V15 1394_TPA0P 31
PCI_AD5 R11 W15 SC1000P50V SCD1U16V SCD1U16V SCD1U16V
1394_TPA0N 31
2
PCI_AD4 AD5 TPA0N
PCI_AD3
W12 AD4 DY DY
V12 V14
1394
AD3 TPB0P 1394_TPB0P 31
PCI_AD2 U12 W14
AD2 TPB0N 1394_TPB0N 31
PCI_AD1 N11
PCI_AD0 AD1
W13 AD0 PHY_TEST_MA R17 1394_PHYTEST
1 R322
2 3D3V_PLL_S0
3 M11 1394_CPS 4K7R2 3
CPS 3D3V_S0 3D3V_S0 3D3V_PLL_S0
22,30,34 PCI_C/BE#0 W11 C/BE0# CNA P15 1394_CNA
1 R335
2
W9 4K7R2 G28
22,30,34 PCI_C/BE#1 C/BE1#
W7 R19 1394_XO 1 2 C294 1 2
22,30,34 PCI_C/BE#2 C/BE2# XO SC12P
W4 R18 1394_XI
22,30,34 PCI_C/BE#3 C/BE3# XI
1
X2 GAP-CLOSE-PWR
R12 PC[2:0]=000 C275 C276 C274
PC0(TEST1) SC10U10V5ZY-L SC1000P50V SC1U10V3KX
22,30,34 PCI_PAR P9 U13
2
PAR PC1(TEST2)
22,30,34 PCI_FRAME# V7 V13 X-24D576M-2
1
FRAME# PC2(TEST3)
22,30,34 PCI_TRDY# R8 TRDY# 1 2 C301
U7 SC15P
22,30,34 PCI_IRDY# IRDY#
22,30,34 PCI_STOP# W8 STOP# AGND N12
22,30,34 PCI_DEVSEL# N8 DEVSEL# AGND U14
PCI_AD22 1 2 CS_IDSEL W5 U16
R300 100R2 IDSEL AGND
22,30,34 PCI_PERR# V8 PERR#
U8 U17 1394_TPBIAS1 3D3V_S0
22,30,34 PCI_SERR# SERR# TPBIAS1 1394_TPBIAS1 31
22 PCI_REQ#1 U1 REQ#
1
22 PCI_GNT#1 T2 GNT# TPA1P V18 1394_TPA1P 31
1
P5 W18 C283
3 PCLK_PCM PCLK TPA1N 1394_TPA1N 31 SCD1U16V
R3 R282
24,28,30,34,36 PCIRST1#
2
PRST# 1394_TPB1P 10KR2
T1 GRST# TPB1P V16
TPAD30 TP52 7421_PME# T3 W16 1394_TPB1N 1394_TPB1P
RI_OUT#/PME# TPB1N 1394_TPB1P 31
1394_TPB1N
1394_TPB1N 31
2
3D3V_S0
1 2 CS_SUSPEND# R2 SUSPEND#
R312 10KR2 F1 MC_PWR_CTRL# MC_PWR_CTRL#
U1-8 MC_PWR_CTRL_0 MC_PWR_CTRL-1 TP19
28 CB_DATA N1 DATA MC_PWR_CTRL_1 F2
L6 TPAD30
28 CB_CLOCK CLOCK
28 CB_LATCH N2 LATCH
2 2
32 PCI_SPKR L7 SPKROUT SD_CD# E3 SD_CD# 29 SD
1
SD/SDIO
F5 MS/MS_pro 3D3V_S0
MS_CD# MS_CD# 29
F6 U45 3D3V_S0
SM_CD# SM_CD# 29 2N7002DW
MS_CLK/SD_CLK/SM_EL_WP# G5 1 2 MS_CLK 29
2
1 2 B_USB_EN E1 F3 R338 0R2-0
3D3V_S0 B_USB_EN# MS_BS/SD_CMD/SM_WE# MS_BS 29
1
R336 1 210KR2 A_USB_EN E2 U1-10 R281
R337 10KR2 A_USB_EN# 100KR2 R280
1
H5 10KR2
MS_D3 29
6
R323 MS_DATA3/SD_DAT3/SM_D3
M2 G3 MS_D2 29 MS/MS_pro D17
1
150R2 SDA U1-5 MS_DATA2/SD_DAT2/SM_D2 SD_CD#
M3 G2 MS_D1 29 XD 1
2
SCL MS_DATA1/SD_DAT1/SM_D1
UNUSED TERMINALS
MC_PWR_CTRL 29
G1 MS_SDIO 29 3
2
MS_SDIO(DATA0)/SD_DAT0/SM_D0 SM_CD# 7421_LED

W17 NC#W17 SD_CLK/SM_RE# J5 SM_RE# 29 2
T19 U1-6 J3
RSVD SD_CMD/SM_ALE SM_ALE 29
P12 BAW56-1
3D3V_S0 TEST0
SD_DAT0/SM_D4 H3 SM_D4 29
SD_DAT1/SM_D5 J6 SM_D5 29 SM
L5 RSVD SD_DAT2/SM_D6 J1 SM_D6 29
L2 RSVD SD_DAT3/SM_D7 J2 SM_D7 29
K5 U1-9
RSVD
K3 RSVD SD_WP/SM_CE H7 SD_WP 29
K7 RSVD SM_CLE J7 SM_CLE 29
L1 RSVD SM_R/B# K1 SM_R/B# 29
L3 RSVD SM_PHYS_WP# K2
PCI7411-1
1 <Core Design> 1
Wistron Corporation
Title
TI SNC1Q21 (1 of 2)
A3
Leopard2 -1
A B C D E
A B C D E
VCC_ASKT_S0 U47C 3 of 4
2 of 4
U47B 1 2 C606
4
VCCA
VCCA
A5
A11
SCD01U16V2KX
RSVD
RSVD
D19
K19
B15
Power switch 4
RSVD VPP_ASKT_S0 VCC_ASKT_S0

RSVD A16
A_CAD31/A_D10 D1 CBB_D10 29 B16
RSVD
A_CAD30/A_D9 C1 CBB_D9 29 A17
RSVD
A_CAD29/A_D1 D3 CBB_D1 29 C16
1
RSVD
A_CAD28/A_D8 C2 CBB_D8 29 D17
1
RSVD R634 C605 C602
A_CAD27/A_D0 B1 CBB_D0 29 C19
RSVD C613 100KR2 SCD1U16V SC4D7U10V5ZY
B4 CBB_A0 29 D18
2
A_CAD26/A_A0 RSVD SCD1U16V
A4 CBB_A1 29 E17
2
A_CAD25/A_A1 RSVD
E6 CBB_A2 29 E19
2
A_CAD24/A_A2 RSVD
A_CAD23/A_A3 B5 CBB_A3 29 G15
RSVD
A_CAD22/A_A4 C6 CBB_A4 29 F18
RSVD PCIRST1#
A_CAD21/A_A5 B6 CBB_A5 29 H14
RSVD
A_CAD20/A_A6 G9 CBB_A6 29 H15
1
U1-3 RSVD
A_CAD19/A_A25 C7 CBB_A25 29 G17
RSVD C607
A_CAD18/A_A7 B7 CBB_A7 29 K17
RSVD SC150P50V2JN
A7 CBB_A24 29 L13
2
A_CAD17/A_A24 RSVD VCC_ASKT_S0
A10 CBB_A17 29 K18 U77
A_CAD16/A_A17 RSVD
A_CAD15/A_IOWR# E11 CBB_IOWR# 29 L15
RSVD
A_CAD14/A_A9 G11 CBB_A9 29 L17 27 CB_DATA 3 DATA AVCC 9
RSVD 5V_S0
C11 L18 4 10
CARDBUS B
A_CAD13/A_IORD# CBB_IORD# 29 RSVD 27 CB_CLOCK CLOCK AVCC
A_CAD12/A_A11 B11 CBB_A11 29 L19 27 CB_LATCH 5 LATCH
U1-2 RSVD
A_CAD11/A_OE# C12 CBB_OE# 29 M17 24,27,30,34,36 PCIRST1# 12 RESET#
RSVD PS_SHDN#
A_CAD10/A_CE2# B12 CBB_CE2# 29 M14 1 2 21 SHDN# AVPP 8 VPP_ASKT_S0
RSVD 3D3V_S0 R635 10KR2
A_CAD9/A_A10 A12 CBB_A10 29 M15
RSVD
A_CAD8/A_D15 E12 CBB_D15 29 N19
3 RSVD 3
A_CAD7/A_D7 C13 CBB_D7 29 N18 13 3.3V OC# 15
RSVD
A_CAD6/A_D13 F12 CBB_D13 29 N15
RSVD 5V_S0
A_CAD5/A_D6 A13 CBB_D6 29 M13
1
RSVD
A_CAD4/A_D12 C14 CBB_D12 29 P18 1 5V
RSVD C608 C603
CARDBUS A
A_CAD3/A_D5 E13 CBB_D5 29 P17 2 5V NC 24

RSVD SCD1U16V SC4D7U10V5ZY
A14 CBB_D11 29 P19 23
2
A_CAD2/A_D11 RSVD NC
A_CAD1/A_D4 B14 CBB_D4 29 DY NC 22
1
A_CAD0/A_D3 E14 CBB_D3 29 7 12V NC 19
F15 C612 C611 20 18
RSVD SCD1U16V SC1U10V3ZY 12V NC
G18 17
2
RSVD NC
A_CC/BE3#/A_REG# C5 CBB_REG# 29 K14 NC 16
RSVD
A_CC/BE2#/A_A12 F9 CBB_A12 29 M18 11 GND NC 14
RSVD
A_CC/BE1#/A_A8 B10 CBB_A8 29 25 GND NC 6
A_CC/BE0#/A_CE1# G12 CBB_CE1# 29 K13
RSVD
G10 G19 TSP2220A
A_CPAR/A_A13 CBB_A13 29 RSVD
RSVD H17
A_CFRAME#/A_A23 C8 CBB_A23 29 J13
RSVD
A_CTRDY#/A_A22 A8 CBB_A22 29 J17
RSVD
A_CIRDY#/A_A15 B8 CBB_A15 29 H19
RSVD 3D3V_S0
A_CSTOP#/A_A20 A9 CBB_A20 29 J19
RSVD
A_CDEVSEL#/A_A21 C9 CBB_A21 29
E10 J18 U47D 4 of 4
A_CBLOCK#/A_A19 CBB_A19 29 RSVD
RSVD B18
A_CPERR#/A_A14 F10 CBB_A14 29 H8 VCC
A_CSERR#/A_WAIT# B3 CBB_WAIT# 29 E18 H9 VCC
RSVD
J15 H10 VCC
RSVD
A_CREQ#/A_INPACK# E7 CBB_INPACK# 29 H11 VCC VR_PORT M19 PT_PORT
A_CGNT#/A_WE# B9 CBB_WE# 29 F14 H12 VCC VR_PORT H1 VR_PORT
2 RSVD 2
A18 J8 VCC
RSVD
A_CSTSCHG/A_BVD1(STSCHG#/RI#) B2 CBB_BVD1# 29 H18 M7 VCC
RSVD
A_CCLKRUN#/A_WP(IOIS16#) C3 CBB_WP 29 J12 VCC VR_EN# H2
A_CCLK/A_A16 E9 CBB_A16 29 B19 M9 VCC
RSVD
F17 M10 VCC
RSVD
C4 C17 M12
POWER TERMINALS
A_CINT#/A_READY(IREQ#) CBB_RDY 29 VCC
1
RSVD
A_CRST#/A_RESET A6 CBB_RESET 29 K8 VCC
N13 K12 C302 C309
RSVD VCC SCD1U16V SCD1U16V
A2 CBB_BVD2# 29 B17 N7
2
A_CAUDIO/A_BVD2(SPKR#) RSVD VCC
RSVD C18
A_CCD1#/A_CD1# C15 CBB_CD1# 29 F19
RSVD
A_CCD2#/A_CD2# E5 CBB_CD2# 29 G7 GND
A_CVS1/A_VS1# A3 CBB_VS1# 29 N17 G8 GND
RSVD
A_CVS2/A_VS2# E8 CBB_VS2# 29 A15 G13 GND
RSVD
K15 H13 GND
RSVD
A_RSVD/A_D14 B13 CBB_D14 29 J9 GND
A_RSVD/A_D2 D2 CBB_D2 29 J10 GND
C10 CBB_A18 29 PCI7411-1 J11
A_RSVD/A_A18 GND
K9 GND
K10 U1-4
GND
K11 GND
PCI7411-1 L8 GND
L9 GND
L10 GND
L11 GND
L12 GND
M8 GND
1 <Core Design> 1
PCI7411-1
Wistron Corporation
Title
TI PCI7411 GHK (2 of 2)
A3
Leopard2 -1
A B C D E
A B C D E
Cardbus I/F
PCMCIA Socket CBB_D[0..15] 28
CBB_A[0..25] 28
CBUS1 CBB_IORD# 28
CBB_IOWR# 28
CBB_OE# 28
69 CBB_WE# 28
CBB_REG# 28
4 1 CBB_RDY 28 4
CBB_WP 28
35 CBB_RESET 28
CBB_D3 2 CBB_WAIT# 28
CBB_CD1# 36 CBB_INPACK# 28
CBB_D4 3
CBB_D11
CBB_D5
CBB_D12
37
4
38
CBB_CE1# 28
CBB_CE2# 28
6 in 1 Connector
CBB_D6 5 3D3V_CR_S0
CBB_BVD1# 28
CBB_D13 39 CBB_BVD2# 28
CBB_D7 6 CBB_CD1# 28
CBB_D14 40 CBB_CD2# 28
1
CBB_CE1# 7 CBB_VS1# 28
CBB_D15 41 C509 C537 C517 C531
CBB_VS2# 28 SCD01U16V2KX SCD01U16V2KX
CBB_A10 8
2
CBB_CE2# 42 SCD01U16V2KX SCD01U16V2KX
VCC_ASKT_S0 CBB_OE# 9 SKT2
CBB_VS1# 43
CBB_A11 10 40 2
CBB_IORD# XD-VCC SM-CD-COM SM_CD#
44 29 S.M-VCC SM-CD-SW 3
CBB_A9 11 3D3V_CR_S0 3D3V_CR_S0 20 43 MS_CLK_R0
CBB_IOWR# MS-VCC SM-WP-SW
45 9 SD-VCC
CBB_A8 12 VCC_ASKT_S0 13 MS_BS_1
MS-BS
1
CBB_A17 46 17 MS_CD# MS_CD# 27

MS-INS
1
C588 C601 C599 CBB_A13 13 MS_SDIO 1 2 7 19 MS_CLK_R1 2 MS_CLK
SD-DAT0 MS-SCLK MS_CLK 27
1
SC22U10V6ZY-U SC1000P50VSCD1U16V CBB_A18 47 R577 R216 MS_D1 R214
1 33R2
2 6 R604 33R2
2
CBB_A14 R301 2K2R2 2K2R2 MS_D2 R217 33R2 SD-DAT1

14 1 2 12 SD-DAT2 RSV#4 4
CBB_A19 48 DUMMY-R2 MS_D3 R213
1 33R2
2 11 39 SM_CD#
3 CBB_WE# R193 33R2 SD-DAT3 XD-CD 3
15
2
CBB_A20 49 47K 41
CBB_RDY 27 MS_SDIO MS_SDIO SD-CD-COM SD_CD#
16 15 42 SD_CD# 27
2
CBB_A21 CBB_RESET 27 MS_D1 MS_D1 MS-DATA0 SD-CD-SW SD_WP
50 14 MS-DATA1 SD-WP-SW 5 SD_WP 27
17 SM_RE# MS_BS 27 MS_D2 MS_D2 16 8 MS_CLK
MS-DATA2 SD-CLK
1
VPP_ASKT_S0 51 27 MS_D3 MS_D3 18 10 1 2 MS_BS
C290 MS-DATA3 SD-CMD R599 33R2
18
52 SCD01U16V3KX 3D3V_CR_S0 3D3V_CR_S0 38 SM_CLE
SM_CLE 27
2
CBB_A16 MS_D1 S.M#/XD-CLE SM_ALE
19 33 S.M/XD-D1 S.M#/XD-ALE 37 SM_ALE 27
1
CBB_A22 53 MS_D2 32 36 MS_BS_1 1 2

S.M/XD-D2 S.M#/XD-WE MS_BS 27
C600 CBB_A15 20 MS_D3 31 28 SD_WP R215 22R2
S.M/XD-D3 S.M#/XD-CE
1
SCD1U16V CBB_A23 54 27 SM_D4 SM_D4 21 27 SM_RE#
SM_RE# 27
2
CBB_A12 R558 R560 27 SM_D5 SM_D5 S.M/XD-D4 S.M#/XD-RE SM_R/B#

21 22 S.M/XD-D5 S.M#/XD-R/B 26 SM_R/B# 27
CBB_A24 55 2K2R2 2K2R2 27 SM_D6 SM_D6 23 35 MS_CLK_R0
CBB_A7 27 SM_D7 SM_D7 S.M/XD-D6 S.M/XD-WP-IN
CBB_A25
22 DY DY 24 S.M/XD-D7
56 MS_CLK_R
2
CBB_A6 1 2
23 GND 46 330R2
CBB_VS2# 57 DY 25 45 R588
CBB_A16 CBB_A5 27 SM_CD# SM_CD# S.M-LVD GND
24 1 2 30 S.M-CD# GND 44
CBB_RESET 58 SM_ALE SM_CLE R559 MS_SDIO
0R2-0 34 1
S.M-D0 GND
1
CBB_A4 25
R283 CBB_WAIT# 59
DUMMY-R2 CBB_A3 26 3D3V_CR_S0 3D3V_CR_S0
CBB_INPACK# 60 SKT-MEMO-9-U1
CBB_A2 27
CBB_REG# 61
1 2
1
Place close to pin 19. CBB_A1 28
CBB_BVD2# 62 R579 R578
C279 CBB_A0 29 2K2R2 4K7R2
2 DUMMY-C2 CBB_BVD1# 2
63
CBB_D0 30 3D3V_S0
2
2
CBB_D8 64 3D3V_CR_S0
CBB_D1 31
2
CBB_D9 65 U34
CBB_D2 32 SM_R/B# SD_WP
CBB_D10 66 1 5
CBB_WP OUT IN
Clock AC termination 33 2 GND
1
CBB_CD2# 67 3 4
SET ON# MC_PWR_CTRL 27
1
34 R228
33MHz clock for 32-bit 68 4K7R2 C230
1
SCD1U16V
Cardbus card I/F AAT46101GV-1
1
70 R239
2
15KR2 C239
SC1U10V3ZY
2
2
CARDBUS68P-9
62.10024.491
SKT1 3D3V_S0
1 2
3 4
U75
CARDBUS-SKT45-U1 MS_CLK 1 5
A VCC
MS_CLK_R 2 B
1 <Core Design> 1
3 4 SD_CD#
GND SE
NC7SZ66P5X
DY Wistron Corporation
Title
PCMCIA SLOT/ CARDBUS SKT
A3
Leopard2 -1
A B C D E
A B C D E
3D3V_LAN_S5
Close to RTL8100C AVDD25
PCI_C/BE#[0..3] 22,27,34
1 2 VDD25
Pin121,Pin122 R174 3K6R3
PCI_AD[0..31] 18,22,27,34
1
U27
LAN_X1 EECS_3 1 CS 8 C225 1 2
EESK VCC SCD1U16V R152 0R3-U
2 SK 7
2
EEDI DC
3 DI ORG 6
R166 EEDO 4 DO 5
GND
1
LAN_X2 1 2
DUMMY-R2 M93C46-W-3 C176
SCD1U16V
2
X6
4 1 2 4
XTAL-25MHZ-43
1
C186 C185 2 1 3D3V_LAN_S5

SC12P50V2JN SC12P50V2JN R157 5K6R3F
2
3D3V_LAN_S5
TP7 TP8 TP9
1
TX+ TX- RX- RX+ C189 C213 C215 C184 C216 C198 C174
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
LAN_X2
LAN_X1
2
1
1
1
1
LAN_LED0
LAN_LED1
LAN_LED2
EESK
EEDI
EEDO
EECS_3
PCI_AD0
PCI_AD1
Close R156 R155 R153 R154
49D9R2F 49D9R2F 49D9R2F 49D9R2F
to LAN
chip
2
2
2
2
3D3V_LAN_S5
1
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
U24
C171 C169 3D3V_LAN_S5
SCD1U16V SCD1U16V
3
2
VSS
VSS
VSS
EESK
EEDI
EECS
LANWAKE
RSET
VSSPST
AVDD18
CTRL18
XTAL2
XTAL1
LED0
VDD18
LED1
LED2
LED3
VDD18
EEDO
VDD33
PCIAD0
PCIAD1
AVDDH
GND
GND
CTRL25 1 2 LAN_PWR_CTRL
1 CHP69
3 R151 0R2-0 Q11 3
G19 VDD25
2
1 2
GND
NC
NC
GND
GND
NC
GND
NC
NC
NC
NC
NC
1 TX+ 102 PCI_AD2 GAP-CLOSE-PWR
31 TX+ MDI0+ PCIAD2
1
2 TX- GND 101 C214
31 TX- MDI0- VSSPST
1
AVDD33 3 AVDD33 100 C173 C188 C217
AVDDL GND VDD25 C167
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
4 GND VDD25 VDD18 99
2
VSS PCI_AD3 SC22U10V6ZY-U
31 RX+ 5 RX+ 98
2
MDI1+ PCIAD3 PCI_AD4
31 RX- 6 MDI1- RX- PCIAD4 97
AVDD33 7 AVDD33 96 PCI_AD5
CTRL25 AVDDL PCIAD5 PCI_AD6
8 CTRL25 PCIAD6 95
9 VSS NC VDD33 94
PCI_AD7
10 AVDDH NC PCIAD7 93
PCI_C/BE#0
AVDD25
11 HSDAC+ NC CBEB0 92
3D3V_LAN_S5
12 HSDAC- AVDD25 GND VSSPST 91
PCI_AD8
13 VSS NC PCIAD8 90
14 NC 89 PCI_AD9
MDI2+ PCIAD9
1
15 MDI2- NC NC M66EN 88
16 NC 87 PCI_AD10 L14
AVDDL PCIAD10 PCI_AD11 BLM11A601S
17 VSS GND PCIAD11 86
18 NC 85 PCI_AD12
MDI3+ PCIAD12 AVDD33
19 MDI3- NC VDD33 84
AVDD33 20 AVDD33 83 PCI_AD13
2
AVDDL PCIAD13 PCI_AD14
21 VSSPST GND PCIAD14 82
22 GND NC GND VSSPST 81
ISOLATE 23 ISOLATE# ISOLATEB GND 80
1
24 NC 79 PCI_AD15
VDD18 PCIAD15 VDD25 C178 C170 C177 C175
2 22,34 INT_PIRQE# 25 INTA# INTAB VDD25 VDD18 78
2
PCI_C/BE#1
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
3D3V_LAN_S5 26 77
2
VDD33 CBEB1 PCI_PAR
24,27,28,34,36 PCIRST1# 27 PCIRST# PCIRSTB PAR 76
PCI_SERR#
PCI_PAR 22,27,34
3 PCLK_LAN 28 PCICLK SERRB SERR# 75 PCI_SERR# 22,27,34
22 PCI_GNT#2 29 GNT# GNTB NC 74 DY
22 PCI_REQ#2 30 REQ# REQB NC GND 73
18,22,34 ICH_PME# 31 PME# PMEB NC 72
VDD25 32 VDD25 71
PCI_AD31 VDD18 VDD33 PCI_PERR#
33 PCIAD31 PERRB PERR# 70 PCI_PERR# 22,27,34
PCI_AD30 34 STOPB STOP# 69 PCI_STOP#
PCIAD30 PCI_STOP# 22,27,34
35 DEVSELBDEVSEL# 68 PCI_DEVSEL#
FRAME#FRAMEB
GND PCI_DEVSEL# 22,27,34

PCI_AD29 36 TRDYB TRDY# 67 PCI_TRDY#
VDD18 VDD25
IRDY# IRDYB
PCIAD29 PCI_TRDY# 22,27,34 3D3V_S5 3D3V_LAN_S5

PCI_AD28 37 GND VSSPST 66
PCIAD28
38 VSSPST GND CLKRUNBCLKRUN# 65
VDD18 NC
NC
GND
NC
VDD18 NC
PM_CLKRUN# 22,27,34,36
G23
PCIAD27
PCIAD26
PCIAD25
PCIAD24
PCIAD23
PCIAD22
PCIAD21
PCIAD20
PCIAD19
PCIAD18
PCIAD17
PCIAD16
VSSPST
1 2
CBEB3
CBEB2
VDD33
VDD33
IDSEL
GND
GND
GND
GAP-CLOSE-PWR
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
3D3V_S0 RTL8100CL-U
1
R150
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_C/BE#3
LAN_IDSEL
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
VDD25
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_C/BE#2
1KR2
2
1 <Core Design> 1
ISOLATE
3D3V_LAN_S5
Wistron Corporation
1
R149 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

15KR2 R165 Taipei Hsien 221, Taiwan, R.O.C.
100R2
Title
2
PCI_IRDY# 22,27,34
LAN RTL8100C
1
PCI_FRAME# 22,27,34
PCI_AD23 Size Document Number Rev
A3 -1
Leopard2
A B C D E
A B C D E
Place on bottom side

Blue thumb From NEW!
1004-1 1394 Connector
R453 CN4
34 BT_PRIOR 1 2100R2 10
34 WLAN_ACT 1 2 8
R621 100R2 7
18 BC0EX2
18 BC0EX1 6
USB_N_CON2 5 1 2 TPA0+
22 USB_PN2 18,19 BT_LED 27 1394_TPA0P
USB_N_CON2 4 R142 0R0402-PAD 1394_1
USB_P_CON2 USB_P_CON2 3 6
22 USB_PP2
4 2 1 2 TPA0- 3 4 4
27 1394_TPA0N
R143 0R0402-PAD
1 TPB0- 1 2
3D3V_BT_S0
9 1 2 TPB0+ 5
27 1394_TPB0P
R147 0R0402-PAD
JST-CON8-7 SKT-1394-4P-6-U1
27 1394_TPB0N 1 2
R148 0R0402-PAD
1
BC0EX2 connect to PCI_AD22 on main board.
BC0EX1 connect to ICH_PME# on main board. R296 R295 R297 R298
56R2F 56R2F 56R2F 56R2F
2
1394_TPB0_T
27 1394_TPBIAS0
1
1
R299
C277 C286 5K1R2
BC0EX2 SC220P
2
MAX 150mA BC0EX1 3D3V_BT_S0 SC1U10V3KX
2
BT_LED
POWER SWITCH 5V_S3 3D3V_BT_S0
1
EC116 EC27 EC29 EC117
SCD1U SCD1U SCD1U SCD1U
2
1
1
C402 C366 R490
DY DY DY DY 27 1394_TPA1P 1
R65
2
0R0402-PAD
I max = 150 mA
SC1U10V3ZY SC20P 18KR3F
1394_TPA1P_PR 18
2
U60 1 2
3 Close to CN20 27 1394_TPA1N
R50 0R0402-PAD
1394_TPA1N_PR 18
1394_TPB1P_PR 18
3
2
BT_EN# 1 5 3D3V_BT_SET
SHDN# SET
2 GND 27 1394_TPB1P 1 2 1394_TPB1N_PR 18
1
3 4 R67 0R0402-PAD
IN OUT 3D3V_BT_S0
R454
1
C383 11KR3F 1 2
27 1394_TPB1N
G913C-U C100 R66 0R0402-PAD
1
SCD1U16V
SC4D7U10V5ZY
2
5V_S3 2 R291 R290 R294 R292

56R2F 56R2F 56R2F 56R2F
1
R518
2
10KR2 1394_TPB1_T
27 1394_TPBIAS1
1
2
1
BT_EN# 10/100 LAN Transformer RJ45 PIN R293
C284 C285 5K1R2
3
D
3
D SC220P
QB2
2
22 BT_EN 1
2N7002 QB3 1 TPS5130_1D8V_EN# 31 TD+ --> TX+ RJ45-1 SC1U10V3KX
2
G 2N7002
S G
2
S TD- --> TX- RJ45-2

2
RD+ --> RX+ RJ45-3 These components near to chip side.

RD- --> RX- RJ45-6
2 2
10/100M Lan Transformer
U3
XFR_RDC 3 15 RX- RJ45-8

CT RX- RJ45-8 18
XFR_CMT 11 16 RX+ RJ45-7
CT RX+ RJ45-7 18
XFR_RXC 14 RJ45-6
CT RJ45-6 18
XFR_TDC 6 2 RJ45-5
CT RD- RX- 30 RJ45-5 18
1 RJ45-4
RD+ RX+ 30 RJ45-4 18
RJ45-3
RJ45-3 18
8 9 TX- RJ45-2
30 TX- TD- TX- RJ45-2 18
7 10 TX+ RJ45-1
30 TX+ TD+ TX+ RJ45-1 18
JK1
9
1
XFORM-187-U RJ45_END1
C27 C26 RJ45_END2
SCD1U16V SCD1U16V
2
DY RJ45-1 RJ45_1
R401 R404
75R2F 75R2F RJ45-2 RJ45_2
XFR_RXC 1 2 RJ45-3 RJ45_3
R400 75R2F RJ45-4 RJ45_4
2
XFR_CMT 1 2 RJ45_END RJ45-5 RJ45_5

R399 75R2F RJ45-6 RJ45_6
LAN_TERMINAL 1 2 C320 RJ45-7 RJ45_7
SC1500P2KV8KX RJ45-8 RJ45_8
1.route on bottom as differential pairs.
1
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs. <Core Design> 1
4
3.No vias, No 90 degree bends. TIP RJ11_1

CN1 L21 RING RJ11_2
4.pairs must be equal lengths. ETY-CON2-R1 1 TIP_MDC 1 2 TIP 10 Wistron Corporation
5.6mil trace width,12mil separation. 2 RING_MDC 1 MLB160808
2 RING 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
L20 MLB160808 RJ45-74-U1 Taipei Hsien 221, Taiwan, R.O.C.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except Title
3
RJ-45 moat. 20.D0151.102 LAN / 1394 Connector

A3
Leopard2 -1
A B C D E
A B C D E
3D3V_S0
1
BC135 BC137 BC134 BC133
SCD1U16V SCD1U16V SC1U10V3ZY SCD1U16V
2
4 4
AUD_AGND
5V_AUDIO_S0
1 2 C307 3D3V_S0
SC270P50V3JN
1 2 C305
1
SC270P50V3JN
CODECVREF
2
BC128 BC74 BC77 BC76 1 2 C308
VREFOUT
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SC270P50V3JN R302
ADAF1
ADAF2
ADAF3
ADAF4
1 2 C306 10KR2
SC270P50V3JN
1
AUD_AGND AUD_AGND D18
U48
25
38
43
34
27
28
29
30
31
32
1 3 HPSENSE_1 33
1
9
S1N4148-U2
VREF
VREFOUT
AVDD1
AVDD2
AVDD3
AVDD4
DVDD1
DVDD2
AFILT1
AFILT2
AFILT3
AFILT4
AD1981_JS0 1 2
BC58 SC1U10V3ZY R636 2K2R2
EXT_MIC_1 2 AUD_MICIN1
DY
1 21 MIC1 JS0 17
EXT_MIC_2 2 1 AUD_MICIN2 22 16
MIC2 JS1 HPSENSE 33
EAPD 47 EAPD 33,36
BC66 SC1U10V3ZY 23 1 2 BC78
LINE_IN_L SC22P
33 AUD_LOL 35 LINE_OUT_L DY
1
24 1 2 CLK_CODEC 3 X3
LINE_IN_R R343 0R2-0
33 AUD_LOR 36 LINE_OUT_R XTL_IN 2
XTALOUT_CODEC
DY
XTL_OUT 3
BC75 1 2 SCD1U16V AUD_MDC_CODEC 37 2 1 X-24D576MHZ-3-U1
35 AUD_MDC_OUT
2
BC67 1 MONO_OUT
3
35 AUD_PHONE 2 SCD1U16V AUD_PHONE_CODEC13
PHONE_IN SDATA_IN 8 AC97_DIN0_CODEC
1 2 BC68 DUMMY-C2
AC97_DIN0 21 1 2 BC71 3
R315 22R2 SC22P
CDAUDL CDAUD_L 18 SDATA_OUT 5 AC97_DOUT 21,35 DY
26 CD_AUDL 1 2 1 2 CD_L
R308 22R2 BC61 SC1U25V5ZYCDAUD_R 20 6 AC97_CBITCLK 1 2 1 2XTALOUT_CODEC_R1 2 5V_AUDIO_S0
CD_R BIT_CLK 33R2 AC97_BITCLK 21,35
CDAUD_GND
19 10 R316 R327 DUMMY-R2 BC72 DUMMY-C2
CD_GND_REF SYNC AC97_SYNC 21,35
1 2 CDAUDR 1 2 11
26 CD_AUDR RESET# AC97_RST# 21,35
1
R305 22R2 BC59 SC1U25V5ZY 39 48 SPDIF_OUT
HP_OUT_L SPDIF SPDIF_OUT 18
1
41 HP_OUT_R
1
1 2 CDAGND 1 2 SC1U25V5ZY 5V_S0 BC139 R646 EC160
26 CD_AGND 22R2
R306 BC60 AUD_PC_BEEP 14 R342 SC22P 28K7R3F
2
AUX_L
1
4K7R2
SCD1U16V
15 U80
2
R307 R304 R309 AUX_R 5VA_SET
1 5
DVSS1
DVSS2
AVSS1
AVSS2
AVSS3
AVSS4
150KR2J 150KR2J 150KR2J SHDN# SET
ID1#
ID0#
1
5V_AUDIO_S0
NC
NC
2 GND
BC140 R647
2
AD1981B-AS SC1U10V3ZY 3 4 10KR3F

26
40
44
33
4
7
46
45
12
42
2
IN OUT
1
MAX8863-S
2
AUD_AGND BC138
SC10U10V6ZY-U
2
For High limit --> H45
AUD_AGND AUD_AGND
18 HP_OUT_L
AUD_AGND
18 HP_OUT_R
G32
1 2
VREFOUT GAP-CLOSE
2 2
1
DY BC64 G31 AUD_AGND
SC1U10V3ZY R313 1 2
2
3KR2F
GAP-CLOSE
AUD_AGND
2
18 EXT_MIC_2
AUD_AGND
CLOSE TO CODEC
5V_AUDIO_S0 BC63 UNDER CODEC
SC1000P50V3KX CUT MOAT
U49A G72 G30
14
27 PCI_SPKR 1
3 AUD_BEEP1
AUD_AGND MIC2 PREAMP 1
GAP-CLOSE
2 1
GAP-CLOSE
2
22 ICH_SPKR 2 SB-27-02
TSAHCT86 AUD_AGND AUD_AGND
7
5V_AUDIO_S0 G33 G73

1 2 1 2
AUD_AGND U49B
14
GAP-CLOSE GAP-CLOSE
5V_AUDIO_S0 4 VREFOUT
6 AUD_SYS_BEEP 1 2 AUD_BEEP 1 2 C304
AUD_PC_BEEP
1
U49C R326 10KR2 SCD1U16V AUD_AGND AUD_AGND

14
1
DY BC65
9 TSAHCT86 SC1U10V3ZY R314
36 KBC_BEEP
7
2
1
8 AUD_BEEP2 3KR2F
1 <Core Design> 1
U39_PL 10 C303 R325
AUD_AGND 1KR2 AUD_AGND
2
2
2
TSAHCT86 SCD1U16V
18 EXT_MIC_1
Wistron Corporation
7
R347
2
10KR2 CLOSE TO CODEC 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
BC62 Taipei Hsien 221, Taiwan, R.O.C.
AUD_AGND SC1000P50V3KX
1
AUD_AGND Title
AUD_AGND AUD_AGND MIC1 PREAMP Size

AUDIO CODEC AD1981B
Document Number Rev
A3
Leopard2 -1
A B C D E
A B C D E
1 2 BC143 5V_S0
SC10P50V2JN-1
4 BC136 R650 4
AUD_LOL 1 2 CSOUTL2 1 2 1 2 SPKR_L+
SC4D7U10V5ZY 15KR2 R649 20KR2
1
R339
SC BC80 100KR2
SC220P
BC81 R349
2
1 2 CSOUTL1 1 2 L_LINE_IN 1 2 SPKR_L+ 1 2 TC15 G1420_SHUTDOWN#
32 AUD_LOL DK_SPKR_L+ 18
SE100U16VGM-2
SCD1U16V3KX R348 18KR2J
3
15KR2 SC D
U79 1 Q19
22,26,36,42,44,45,46 PM_SLP_S3# 2N7002
G
4 3 SPKR_L+ S
2
5VA_OP_S0 HP_L LLINEIN LOUT+ SPKR_L-
5 LHPIN LOUT- 10
L_BYPASS 6 LBYPASS HPSENSE_1
7 LVDD SE/BTL# 14
16 AUD_AGND
G1420_SHUTDOWN# HP/LINE# AUD_MUTE R648
8 SHUTDOWN MUTEIN 11
1
2 9 G1420_SHUTDOWN# 1 2
TJ MUTEOUT
BC142
SC10U10V6ZY-U
BC129 BC141 17 HP-IN GND/HS 1 DY 10KR2
SCD1U16V3KX 23 12
2
SCD1U16V3KX VOL GND/HS
GND/HS 13
AUD_AGND 18 24
R_BYPASS RVDD GND/HS AUD_AGND
19 RBYPASS
AUD_AGND HP_R 20 15 SPKR_R-
RHPIN ROUT- SPKR_R+ AUD_AGND
21 22
GND
RLINEIN ROUT+
AUD_AGND
3 G1421BF3U SC 3
25
AUD_AGND
BC73 R340
1 2 CSOUTR1 1 2 R_LINE_IN 1 2 SPKR_R+ 1 2 TC14 DK_SPKR_R+ 18
32 AUD_LOR SE100U16VGM-2
SCD1U16V3KX R341 18KR2J
15KR2
BC70
SC220P
5VA_OP_S0
5V_S0
BC132 R642 G71
AUD_LOR 1 2 CSOUTR2 1 2 1 2 SPKR_R+ 1 2
SC4D7U10V5ZY R643 20KR2
15KR2 SC GAP-CLOSE-PWR
1 2 BC131
SC10P50V2JN-1
5V_S0
R_BYPASS
1
L_BYPASS
R641
1
100KR2
2 5V_S0 2
BC79 BC130
SC4D7U10V5ZY SC4D7U10V5ZY
2
2
HPSENSE_1
HPSENSE_1 32
1
R640 AUD_AGND AUD_AGND

100KR2
2
D 1 2 EARPHONE_R
18 EARPHONE 22KR2J HPSENSE 32
1 Q41 R303
18 JACK_DETECT# 2N7002
G
1
S
2
C616 C291
SC1U10V3ZY SC1U10V3ZY
2
5V_S0
5V_S0 SPK1
U78B SPKR_R+
Speaker 6
14
4
U78C
14
3
4 SPKR_R- 2
36 KBC_MUTE
6 AUD_MUTE_1 9 SPKR_L+
1 <Core Design> 1
5 8 AUD_MUTE SPKR_L- 1
32,36 EAPD
HPSENSE 10
1
TSAHCT32 5
Wistron Corporation
7
R645 TSAHCT32
7
10KR2 ETY-CON4-11-U 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

EC155 EC158 EC161 EC159 Taipei Hsien 221, Taiwan, R.O.C.
SC220P SC220P SC220P SC220P 20.D0151.104
2
Title
AUDIO
A3
Leopard2 -1
A B C D E
A B C D E
MINI-PCI
4 4
3D3V_S0
1
BC126 BC124 BC127 BC125
PCI_AD[31..0] 18,22,27,30 SC4D7U10V5ZY SCD1U16V SCD1U16V SCD1U16V
2
PCI_C/BE#[3..0] 22,27,30
3D3V_S5
3D3V_S0
CN13
2
TIP 125 RING

1
R612 1 2
R328 DUMMY-R2
10KR2 3 4
5 6
7 8
2
9 10
19 802_ACT_LED 11 12
WIRELESS_EN 13 14
WIRELESS_EN 15 16
3
D INT_PIRQE# 17 18 5V_S0
1 Q18 19 20
22 WIRELESS_EN# 2N7002 3D3V_S0 INT_PIRQE# 22,30
G MINI_PIN21 21 22
3 S TP11 23 24 3
3D3V_S5
2
3 PCLK_MINI 25 26 PCIRST1# 24,27,28,30,36

27 28 3D3V_S0
22 PCI_REQ#0 29 30 PCI_GNT#0 22
31 32
PCI_AD31 33 34 MINI_PME# 1 DY 0R2-0
2 ICH_PME# 18,22,30
PCI_AD29 35 36 R619
BT_PRIOR 31
37 38 PCI_AD30
PCI_AD27 39 40
PCI_AD25 41 42 PCI_AD28
43 44 PCI_AD26
31 WLAN_ACT
PCI_C/BE#3 45 46 PCI_AD24
PCI_AD23 47 48 MOD_IDSEL 1 2 PCI_AD21
49 50 R620 10R2
3D3V_S0 PCI_AD21 51 52 PCI_AD22
55 56 PCI_PAR 22,27,30
1
PCI_C/BE#2 59 60 PCI_AD16
R613 61 62
10KR2 22,27,30 PCI_IRDY#
63 64 PCI_FRAME# 22,27,30
22,27,30,36 PM_CLKRUN# 65 66 PCI_TRDY# 22,27,30
22,27,30 PCI_SERR# 67 68 PCI_STOP# 22,27,30
2
69 70
22,27,30 PCI_PERR# 71 72 PCI_DEVSEL# 22,27,30
PCI_C/BE#1 73 74
77 78 PCI_AD13
2 PCI_AD10 2
81 82
83 84 PCI_AD9
PCI_AD8 85 86 PCI_C/BE#0
PCI_AD7 87 88
89 90 PCI_AD6
93 94 PCI_AD2
5V_S0 97 98
PCI_AD1 99 100 PCI_SERIRQ 22,27,36
101 102
103 104
105 106
107 108
109 110
111 112
113 114
115 116
117 118
119 120
121 122
123 124 3D3V_S5

126
PCIMODEM124A1U1
62.10032.001
1 <Core Design> 1
The symbol use 2nd source

The P/N is the main source Wistron Corporation
Main source:62.10032.001 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2nd source:62.10032.031
Title
MINI-PCI
A3
Leopard2 -1
A B C D E
A B C D E
USB POWER
5V_S3 5V_USB1_S3
F2 100 mil
1 2 SC
1
MINISMDC110-U
4 C152 C150 C151 TC7 4
SCD1U16V SC1000P50V ST100U6D3VBM
2
SC4D7U10V5ZY
USB_P_CON3
22 USB_PP4
USB_N_CON3 5V_USB1_S3
22 USB_PN4
USB1
11
9
1 5
USB_N_CON3 2 6 USB_N_CON4
3 USB_P_CON3 3 7 USB_P_CON4 3
4 8
10
12
SKT-USB-76-U
USB_P_CON4
22 USB_PP5
USB_N_CON4
22 USB_PN5
2 2
MDC Connector
32 AUD_MDC_OUT 1 2 AUD_MDCIN
R254 DUMMY-R2
CN9
35
3D3V_S3
3D3V_S0 31 32
1 2
3 4 AUD_PHONE 32
1
5 6
1
R622 G68 7 8
DUMMY-R2 9 10
11 12
GAP-CLOSE-PWR 13 14
2
15 16
2
MDC_S3_1 17 18 Check with Ambit

19 20
21 22 AC97_SYNC 21,32
23 24 ACSDATAIN1_A 1 DY 22R2
2
21,32 AC97_DOUT AC97_DIN1 21
25 26 ACSDATAIN1_B 1 2 R263
1 21,32 AC97_RST# 22R2 <Core Design> 1
27 28 R266
29 30 AC97_BITCLK 21,32
33 34 Wistron Corporation
1

1
C580 AMP-CONN30A-1 C266 Taipei Hsien 221, Taiwan, R.O.C.

36
SCD1U16V C579 C578 20.F0099.030 SC22P

2
SCD1U16V Title
DY DY
2
SC4D7U10V5ZY
USB / MDC CONN.
A3
Leopard2 -1
A B C D E
A B C D E
KBC_3D3V_AUX RTC_AUX_S5
L18 KBC_3D3V_AUX
3D3V_AUX KBC_3D3V_AUX 1 2 KBC_RTC_VCC1 2
KBC_AVCC
BLM11P600S R235 1KR2
1
D13
G27 3D3V_S0 BC45 BC56 BC47
1
1 2 SSM5818SL SCD1U16V SCD1U16V
2
DY SCD1U16V BC51 BC46 BC49 BC54 BC55 BC57
2
GAP-CLOSE-PWR SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
2
1
123
136
157
166
161
U40
16
34
45
95
21 LPC_LAD[0..3]
BC53
4 SCD1U16V 4
VDD
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
VBAT
2
BT+
7 81 BT_SENSE 3D3V_S0
22,27,34 PCI_SERIRQ SERIRQ AD0
1
21 LPC_LDRQ0# 8 IOPQ0/LDRQ# AD1 82 BT_TH 39,40
9 83 R274 RN9
21 LPC_LFRAME# LFRAME# AD2 AIRLINE_VOLT 40 560KR3F
LPC_LAD0 15 84 VOL_UP_BTN# 1 8
LAD0 AD3 AD_IA 40
LPC_LAD1 14 87 VOL_DWN_BTN# 2 7
LAD1 AD input IOPE0 PM_SUS_STAT# 22
LPC_LAD2 13 88 VOL_UP_DK# 3 6
KBC_MATRIX1 37
2
LPC_LAD3 LAD2 IOPE1 VOL_DWN_DK#
10 LAD3 IOPE2 89 KBC_MATRIX2 37 4 5
3 PCLK_KBC 18 LCLK IOPE3 90 EAPD 32,33
19 Host Interface 93 THERMAL_DP BT_SENSE 1 2 SRN10K
21,25,43 RSMRST# RESET1# NC#93 100KR3F
22 94 THERMAL_DN TP17 R275
22 ECSMI#_KBC IOPQ1/SMI# NC#94
ECSWI#_KBC 1 2 KBC_PWUREQ# 23 R262 TP16
R273 DUMMY-R2 IOPQ2/PWUREQ# DA_BRI
KBC_3D3V_AUX DA0 99 1
CHG_ICTL
DY 0R2-0
2
BRIGHTNESS 19 AD_IA
DA1 100 1 2 C278
CN15 31 DA Output 101 CHG_VCTL TP41 SCD1U16V3KX
22 ECSCI#_KBC IOPD3/ECSCI DA2
9 102 TP37
DA3
1 21 ICH_A20GATE 5 IOPB5/(GA20) IOPA0/PWM0 32 KBC_BEEP 32
2 KBC_D0 6 33
21 RCIN# IOPB6/KBRST# IOPA1/PWM1 PWR_LED 19
3 TINT# 36 KBC_3D3V_AUX
IOPA2/PWM2 CHG_LED 19
4 TCK 37 RN2
37 KROW[1..8] PWM or PortA IOPA3/PWM3 VOL_UP_BTN# 37
5 TDO KROW1 71 38 SMBC_KBC 2 DY 3
KBSIN0 IOPA4/PWM4 VOL_DWN_BTN# 37
6 TDI KROW2 72 39 SMBD_KBC 1 4
TMS KROW3 KBSIN1 IOPA5/PWM5 MUTE_BTN# 37 SRN10KJ
7 73 KBSIN2 IOPA6/PWM6 40
8 KROW4 74 Key Matrix Scan 43 PWM_BRI
1 2 802_BT_BTN# 37 BT_SCL 1 2
KROW5 KBSIN3 IOPA7/PWM7 R265 0R2-0 BRIGHTNESS R232 6K8R2F
77 KBSIN4
10 KROW6 78 153 BT_SDA 1 2
KBSIN5 IOPB0/URXD1 CAPS_LED 19 6K8R2F
KROW7 79 154 R231
3 KBSIN6 IOPB1/UTXD1 NUM_LED 19 3
MOLEX-CON8-2 KROW8 80 162 KBC_PME# 1 2
KBSIN7 PortB IOPB2/USCLK1 MUTE_LED 18,19 10KR2
163 BT_SCL R259
37 KCOL[1..16] IOPB3/SCL1 BT_SCL 39
DY KCOL1 49 164 BT_SDA
KBSOUT0 IOPB4/SDA1 BT_SDA 39
KCOL2 50 165 PM_PWRBTN# 2 1
KBSOUT1 IOPB7/RING#/PFAIL#/RESET2# PCIRST1# 24,27,28,30,34
KCOL3 51 R234 DUMMY-R2
3D3V_S0 KCOL4 KBSOUT2
52 KBSOUT3 IOPC0 168 PM_PWRBTN# 22
KCOL5 53 169
KBSOUT4 IOPC1/SCL2 SMBC_KBC 25
KCOL6 56 170 RSMRST#_KBC 1 2
KBSOUT5 IOPC2/SDA2 SMBD_KBC 25 KBC_3D3V_AUX 100KR2
KCOL7 57 171 R247
KCOL8 KBSOUT6 PortC IOPC3/TA1
58 KBSOUT7 IOPC4/TB1/EXWINT22 172 DVD_BT# 37
KCOL9 59 175 S5_ENABLE 1 2
KBSOUT8 IOPC5/TA2 PM_SLP_S4# 22,26,42
4
3
2
1
KCOL10 60 176 R238 10KR2

KBSOUT9 IOPC6/TB2/EXWINT23 PM_SLP_S3# 22,26,33,42,44,45,46
RN6 KCOL11 61 1
KBSOUT10 IOPC7/CLKOUT CLK32_G768 25
SRN10K-2 KCOL12 64 DVD_BT# 1 2
KCOL13 KBSOUT11 R233 10KR2
65 KBSOUT12 IOPD0/RI1#/EXWINT20 26 CDROM_BT# 37
KCOL14 66 PortD-1 29 CDROM_BT# 1 2
KBSOUT13 IOPD1/RI2/EXWINT21 CIR_KBC 18 10KR2
KCOL15 67 30 R261
AC_IN# 40
5
6
7
8
KCOL16 KBSOUT14 IOPD2/EXWINT24/RESET2# AC_IN#

68 KBSOUT15/XOR_OUT 1 2
2 R651 10KR2
PortE IOPE4/SWIN KBC_PWRBTN# 37
TINT# 105 44 SB
TINT# IOPE5/A20//EXWINT40 KBC_LID# 19
TCK 106 24 KBC_PME#
TDO TCK JTAG Debug Port IOPE6/LPCPD#/EXWINT45
107 TDO IOPE7/CLKRUN#/EXWINT46 25 1 2 PM_CLKRUN# 22,27,30,34
TDI 108 R260 0R2-0
TMS 109
TDI
TMS A0/ENV0 124 A0/ENV0 38
KBC HARDWARE SETTING
A1/ENV1 125 A1/ENV1 38
PSCLK1 110 126 KBC_3D3V_AUX
IOPF0/PSCLK1 A2/BADDR0 A2/BADDR0 38
PSDAT1 111 127
IOPF1/PSDAT1 PortH A3/BADDR1 A3/BADDR1 38
PSCLK2 114 128
IOPF2/PSCLK2 A4/TRIS A4/TRIS 38
1
PSDAT2 115 131

IOPF3/PSDAT2 A5/SHBM A5/SHBM 38
1
BC50 R237 116 PS2 Interface 132 A0/ENV0 1 2

2 SC3P50V2CN 37 TCLK_5 IOPF4/PSCLK3 A6 A6 38 2
X1 3D3V_S0 117 133 R249 DUMMY-R2
37 TDATA_5 A7 38
2
X-32D768KHZ-12-U20MR3 IOPF5/PSDAT3 A7
118 KBC_D[0..7] 38 RN3
PSDAT4 IOPF6/PSCLK4 KBC_D0 A1/ENV1
1 2 119 138 2 3
4
R253 10KR2 IOPF7/PSDAT4 D0 KBC_D1 A2/BADDR0

D1 139 1 4
140 KBC_D2
KBC_32KX1 D2 KBC_D3
158 141 SRN10KJ
KBC_32KX2_1 1 KBC_32KX2 32KX1/32KCLKIN PortP D3 KBC_D4
2 160 32KX2 D4 144 SB-31-02
R236 0R2-0 145 KBC_D5
D5
1
146 KBC_D6 A3/BADDR1 1 2

BC48 D6 KBC_D7 R248 DUMMY-R2
18 VOL_UP_DK# 62 IOPJ2/BST0 D7 147
SC3P50V2CN 63 PortJ-2
18 VOL_DWN_DK#
2
CHG_I_SEL IOPJ3/BST1 A4/TRIS

40 CHG_I_SEL 69 IOPJ4/BST2 RD# 150 KBCBIOS_RD# 38 1 2
CHG_I_PRE_SEL 70 PortJ-1 151 R243 DUMMY-R2
40 CHG_I_PRE_SEL IOPJ5/PFS WR0# KBCBIOS_WE# 38
75 IOPJ6/PLI
CHG_ON# 76 152 KBC_SEIO# TP10 TPAD30 ENV0 ENV1 TRIS
40 CHG_ON# IOPJ7/BRKL_RSTO# SELIO# IRE 0 0 0
41 OBD 0 1 0
IOPD4 PR_INSERT# 18 DEV 1 0 0
13 BL_ON 148 IOPM0/D8 IOPD5 42 KBC_MUTE 33
149 PortD-2 54 PROG 1 1 0
19,37 ID_DET IOPM1/D9 PortM IOPD6 ECSWI#_KBC 22
3D3V_S5 155 55
19 FPBACK IOPM2/D10 IOPD7
25,42 S5_ENABLE 156 IOPM3/D11
1 2 VCC_+3VSB 3 143 SHBM=1: Enable shared memory with host BIOS
100KR2 IOPM4/D12 A8 A8 38 TRIS=1: While in IRE and OBD, float all the
R242 4 142
22 RSMRST#_KBC IOPM5/D13 A9 A9 38 signals for clip-on ISE use
27 IOPM6/D14 A10 135 A10 38
1
39 AD_OFF 28 IOPM7/D15 A11 134 A11 38

BC52 PortK 130 I/O Address
SC1U10V3ZY A12 A12 38 BADDR1-0 Index Data
129 A13 38
2
A13_BE0 0 0 2E 2F
38 KBCBIOS_CS# 173 SEL0# A14_BE1 121 A14 38
KBC_SEL1 174 120 0 1 4E 4F
SEL12_SEL2# A15_CBRD A15 38 1 0 (HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
TPAD30 TP34 KBC_CLK 47
1 TPAD30 TP43 IOPQ3/CLK 1 1 Reserved 1
A16 113 A16 38 <Core Design>
A17 112 A17 38
A18 104 A18 38
PortL 103
KBC_3D3V_AUX IOPL3/A19
IOPL4/WR1# 48 WR1# TP36 Wistron Corporation
TP44 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
10KR2 Taipei Hsien 221, Taiwan, R.O.C.
VCORF
NC#11
NC#12
NC#20
NC#85
NC#86
NC#91
NC#92
NC#97
NC#98
AGND
1 2
GND
GND
GND
GND
GND
GND
GND
R244 Title
1
PC97551-VPC-U C255 KBC NS97551

17
35
46
122
137
159
167
96
11
12
20
21
85
86
91
92
97
98
SCD1U16V Size Document Number Rev

2
For NS97551 use only Custom

A5/SHBM KBC_PIN21 Leopard2 -1
A B C D E
A B C D E
3D3V_S0
3D3V_S0
INTERNAL KEYBOARD CONNECTOR
1
R406 R415
10KR2 10KR2
KROW[1..8] 36 KCOL[1..16] 36
4 5V_S3 CN2 4
LAUNCH Board
2
802_BT_BTN# MUTE_BTN# 21
CN8 1 2 1
C335 SCD1U10V2MX-1
25 19 PWR_LED# 2
1 KROW2 3D3V_AUX 3
19 MUTE_LED#
19 802_BT_LED# 4
2 KROW8 5
36 VOL_UP_BTN#
3 KROW7 6
36 VOL_DWN_BTN#
1
4 KCOL10 7
36 802_BT_BTN#
5 KROW5 R407 8
6 KROW6 POWER 10KR2
19,36 ID_DET 9
7 KCOL1 10
8 KROW3 BUTTON 19 NUM_LED#
36 MUTE_BTN# 11
2
9 KROW4 2 1 12
10 KCOL6 1 2 PWRBTN# C336 SCD1U10V2MX-1 13
36 KBC_PWRBTN# 470R2
11 KCOL2 R416 5V_S0 14
12 KROW1 15
1
13 KCOL3 BC86 16
14 KCOL5 SCD1U16V 17
15 KCOL8 DVD_BT# 18
36 DVD_BT#
2
16 KCOL9 CDROM_BT# 19
KBC_3D3V_AUX 36 CDROM_BT#
17 KCOL7 20
18 KCOL4 22
1
19 KCOL13
20 KCOL14 the matrix table for PCB EC101 EC100
21 KCOL15 SC1000P16V2KX JST-CON20
2
22 KCOL12 KBC_MATRIX2,KBC_MATRIX1 SC1000P16V2KX
2
2
3 23 KCOL11 PA PR 3
24 KCOL16 R278 R277
10KR2 10KR2 3D3V_S0
26
DY DY Discrete 00 01
1
ETY-CON24-1 1 D28
20.K0170.001 UMA 10 11 2
R279 10KR2 VOL_DWN_BTN#
2 1 VOL_UP_BTN# 3 VOL_UP_BTN#
KBC_MATRIX2 36
2 1 802_BT_LED#
10KR2 KBC_MATRIX1 36
R276 1 MUTE_LED#
PWR_LED#
1
BAV99LT1 NUM_LED#
1
DY EC97 EC98
SC1000P16V2KX
SC1000P16V2KX
EC94 EC95 EC96
2
SC1000P16V2KX
SC1000P16V2KX
SC1000P16V2KX
EC99
2
SC1000P16V2KX
2
3D3V_S0
D29
2
VOL_DWN_BTN#
3
BAV99LT1 TouchPad Connector 5V_S3

2 DY 2
1
R555 R556
KCOL9 KROW1 KCOL14 KCOL16 10KR2 10KR2 CN7
KCOL8 KCOL2 KCOL13 KCOL11 9
KCOL5 KCOL6 KCOL4 KCOL12 8
2
KCOL3 KROW4 KCOL7 KCOL15 7
36 TDATA_5 6
36 TCLK_5 5
4
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
3
RC2 RC4 RC3 RC1 2
SRC100P50V-U SRC100P50V-U SRC100P50V-U SRC100P50V-U
1
BC115 BC116 BC30 BC114 1
10
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
SCD1U16V
SC47P50V2JN
SC47P50V2JN
SC1U10V3ZY
2
2
DY DY DY DY
ETY-CON8-5
for EMI for EMI
KROW3 KCOL10
KCOL1 KROW7
KROW6 KROW8
KROW5 KROW2
1 <Core Design> 1
8
7
6
5
8
7
6
5
RC5 RC6 Wistron Corporation

SRC100P50V-U SRC100P50V-U 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
2
3
4
1
2
3
4
Title
KEYBOARD/TOUCH PAD/Launch key
A3
for EMI Leopard2 -1
A B C D E
A B C D E
4 4
3 3
KBC_D[0..7] 36
FLASH ROM
2 2
512KB Flash
U46
A0/ENV0 20 21 KBC_D0
36 A0/ENV0 A0 DQ0
A1/ENV1 19 22 KBC_D1
36 A1/ENV1 A1 DQ1
A2/BADDR0 18 23 KBC_D2
36 A2/BADDR0 A2 DQ2
A3/BADDR1 17 25 KBC_D3
36 A3/BADDR1 A3 DQ3
A4/TRIS 16 26 KBC_D4
36 A4/TRIS A4 DQ4
A5/SHBM 15 27 KBC_D5
36 A5/SHBM A5 DQ5
A6 14 28 KBC_D6
36 A6 A6 DQ6
A7 13 29 KBC_D7
36 A7 A7 DQ7
A8 3
36 A8 A8
A9 2
36 A9 A9
A10 31 30
36 A10 A10 CE# KBCBIOS_CS# 36
A11 1
36 A11 A11
A12 12
36 A12 A12
A13 4 7
36 A13 A13 WE# KBCBIOS_WE# 36
A14 5
36 A14 A14
A15 11
36 A15 A15
A16 10 32
36 A16 A16 OE# KBCBIOS_RD# 36
KBC_3D3V_AUX A17 6
36 A17 A17
A18 9
36 A18 A18
8 VDD VSS 24
1 PM39LV040-70VC <Core Design> 1
Wistron Corporation
Title
BIOS/GF
A3
Leopard2 -1
A B C D E
A B C D E
Adaptor in to generate DCBATOUT

D23
3 1
AD+
Layout 200mil MMBZ5252B
DCIN1
4 U2 4
1 AD_JK 1 S D 8
2 S D 7
3 3 S D 6
AD+_2 4 G D 5
2 EC2
1
AO4407
SCD1U50V3ZY
1
BC82
SCD1U50V3ZY
4
1
SC1000P50V
EC1
2
5 R25 BC83
200KR2J SCD1U50V3ZY
2
2
SKT-JACK-134-GP
2
1 2 C317
SCD1U50V5KX
2
E Q5
1
PDTA124EU
B R26
AD_OFF# 1 100KR2
2
C
Q3
3 OUT
3
2 R1
36 AD_OFF
IN 1 GND
R2
DTC114EUA-U1
3 3
3D3V_AUX 3D3V_AUX
3D3V_AUX
D24 D25
2 D3
2
2
BT_SCL 3 BT_SDA 3 BT_TH 3
1 1
1
BAV99LT1 BAV99LT1
BAV99LT1
BATTERY CONNECTOR
2 BT+ 2
CN11
7
2
1
F3
FUSE-10A125V 2
3
36 BT_SCL 4
1
SB 36 BT_SDA 5
G6 36,40 BT_TH 6
40 BT+SENSE 1 2 8
GAP-CLOSE SYN-CON6-2-U2
1
BCC1 BC3
SCD1U SC1000P50V
2
1 <Core Design> 1
Wistron Corporation
Title
Adaptor/ Bettery conn.
A3
Leopard2 -1
A B C D E
1 2 C4 D1
SCD1U 2 3D3V_S5
ISOURCE_MAX = (0.075/R364)*(VCLS/VREF)
1 R18 2 AIRLINE_VOLT 36 3
1 R17 2
TOTAL_POWER :
15K4R2F-GP 100KR2F 1 Adapter=90W,Total_Power=81W BT+
AD+ DCBATOUT
0707 -1 BAV99LT1
HM1-SB U51 U54
8 D S 1 AD+_TO_SYS 1 2 1 S D 8
AD<=17V, disable 7 D S 2 R364 D01R2512F-1-GP 2 S D 7
charger function 6 D S 3 3 S D 6
1
5 D G 4 4 G D 5
1
R424 R37
1
100KR2F AO4407 DUMMY-R3 AO4407 C44
C338 SCD1U25V3KX
2
SC1U50V5ZY
DY
2
AC_IN Threshold 2.089V Max. G35 G34
2
MAX8725_ACIN
AC_IN > 2.089V --> AC DETECT
1
Close to GAP-CLOSE-PWR GAP-CLOSE-PWR
1
R425
19K1R2F MAX1909 pin 24
SC
2
D27 1 2 DCBATOUT
1 2 AD+_TO_SYS R405 DUMMY-R3
AD+
1
CH521S-30
C340 C339
SCD1U25V3KX SCD1U25V3KX MAX8725_LDO
2
1
Near MAX8725
1
C54
SCD1U C341 Pin 2
2
1
MAX8725_GND MAX8725_GND SCD1U
C55
2
C38 C331 C330
4
3
2
1
SCD1U SC10U25V6KX SC10U25V6KX
MAX8725_DHIV
1 2
2
MAX8725_LDO U5
G
S
S
S
MAX8725_GND U7
26
25
SC1U10V3ZY SI4431BDY
1
R410
CSSP
CSSN
33R2 MAX8725_GND
D
D
D
D
1
MAX8725_PDS27 22
5
6
7
8
AD+_TO_SYS 24 PDS DHIV
1
R411 28 Near MAX8725

R429 100KR2 MAX18725_DC_IN SRC PDL
1 DCIN LDO 2 Pin 21
100KR2F BT+
1
2
4.2V/cell 21 MAX8725_DLOV C342 L22

2
MAX8725_VCTL DLOV SC1U10V3ZY CHG_PWR-2

11 1 2 CHG_PWR-3 1 2
2
MAX8725_ICTL 10 VCTL IND-10UH-28 R409 D015R2512F-1
MAX8725_LDO MAX8725_MODE ICTL
7 MODE
23 MAX8725_DHI
DHI
1
1
R428 3 ACIN
5
6
7
8
R423 49K9R2F
G36
G37
68KR3F MAX8725_IINP U6
D
D
D
D
8 IINP
1
20 MAX8725_DLO SI4800BDY
2
DLO
2
AC_IN MAX8725_CLS 9 C334 C332 C333
2
CLS SC10U25V6KX SC10U25V0KX
GAP-CLOSE-PWR
GAP-CLOSE-PWR
2
2 1 PKPRES# SC10U25V0KX
36,39 BT_TH 0R2-0
R421 MAX8725_LDO 1 2 6 19
1
G
S
S
S
ACOK PGND
1
R426 31K6R3F G5
4
3
2
1
1
R422 29 1 2
100KR2 R427 PGND
MAX8725_GND 49K9R2F 18 GAP-CLOSE-PWR
PKPRES# CSIP MAX8725_GND
5
2
PKPRES
2
MAX8725_GND MAX8725_GND MAX8725_CCV 13 17

MAX8725_CCI CCV CSIN
12 CCI BATT 16 BT+SENSE 39
MAX8725_CCS 14 15
CCS GND
1
G7 From Battery Connector

REF
1 2 R41
36 AD_IA 10KR2
1
GAP-CLOSE-PWR MAX8725_GND
4
1
C43 MAX8725ETI
2
0707 -1 C52 SCD01U50V3KX V_REF :4.2235V (<500uA)

2
1
SCD01U50V3KX
2
1
R42
20KR2F C51 C53
MAX8725_REF
parallel to KBC
1
SCD1U SCD1U25V3KX
GND is KBC's GND
2
R412
2
49K9R2F
G8 AC_IN# 36
1 2
2
MAX8725_CLS
GAP-CLOSE-PWR
1
3
MAX8725_GND MAX8725_REF
1
C56 AC_IN 1 Q43

3D3V_AUX SC1U10V3ZY R414 S2N3904-U3
2
1
68KR3F
2
R413
1
39KR2F SC
2
R47
100KR2 SB
2
MAX8725_ICTL
2
MAX8725_GND
3
D R44 R205
1 Q8 2K2R2F 20KR2F
36 CHG_ON# 2N7002
G DY
1
S
<Core Design>
2
R43
29K4R2F
CHG_PBATT is H: Charge OFF ICTL :
Wistron Corporation
3
MAX8725_GND D Q7 Q44 D SB
2
CHG_PBATT is L: Charge ON36 1 1 CHG_ON# CHG_I_SEL CHG_I_PRE_SEL 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
CHG_I_PRE_SEL 36 CHG_I_SEL
G G 0A H L L Taipei Hsien 221, Taiwan, R.O.C.
S 2N7002 S
0.3A L L H
2
2N7002 Title
DY 1.5A L H L CHARGER MAX8725
MAX8725_GND MAX8725_GND MAX8725_GND 2.5A L L L Size Document Number Rev
Custom
Leopard2 -1
If Charger is MAX1909,dummy them. Date: Thursday, July 07, 2005 Sheet 40 of 47
A B C D E
5V_S5 5V_S0 5V_S5
CPU_CORE-MAX1907
1
MAX1907_VCC DCBATOUT
R3 R4 R2
10R3 0R3-0-U 0R3-0-U DCBATOUT
3D3V_S0 1 2 C7 DY
2
SCD1U25V3KX
2
DCBATOUT
1 2 C2
2 SC4D7U10V5ZY
2
4 4
1
R8 R15 R9 C12 D D
2
2K2R2F 100KR2 100KR2 U1 D2 C14 C329 C327 C13 C11 C328 TC16
10
34
SC4D7U10V5ZY
4
SE100U25VM-L1-GP
SC4D7U25V6KX-L
SC4D7U25V6KX-L
SC4D7U25V6KX-L
SC4D7U25V6KX-L
SCD1U
SCD1U
2
2
Q29 Q6
V+
VCC
1
1
30 SSM5818SL IRFR3707Z IRFR3707Z
VDD
1 1
1
3,25 CLK_PWRGD# 38 CLKEN# G G
SYSPOK 36 31 1 2 1 2 C10
3
SYSPOK BST R24 0R3-0-U SCD1U25V3KX
25 VGATE 37 IMVPOK S S
MAX1907_S0 MAX1907_DH
MAX1907_S1
4
5
S0 DH 33 HS/IRFR3707Z/12.5mOhm/@4.5V VCC_CORE_S0
MAX1907_S2 S1 MAX1907_LX
6 S2 LX 32
29 MAX1907_DL L1
H_VID0 DL
5 H_VID0 26 D0 1 2
H_VID1 25 IND-D68UH-10
5 H_VID1 D1
H_VID2 24 28 1 2
5 H_VID2 D2 PGND 200R2F
H_VID3 23 R23
5 H_VID3 D3
1
H_VID4 22
5 H_VID4 D4
H_VID5 21 R32 TC17 TC2 TC4 TC3
5 H_VID5 D5
1
18 1907_CSP1 1 2 C9 698R2F G2
2
CSP
1
SC1000P50V 1
SE220U2VDM-6
SE220U2VDM-6
SE220U2VDM-6
SE220U2VDM-6
MAX1907_B0 1 19 1907_CSN1 2 D D
R6 MAX1907_B1 B0 CSN R22 200R2F
2
2
B1
4
100KR2 MAX1907_B2 3 GAP-CLOSE-PWR
2
B2 MAX1907_OAIN+ Q30 Q4
1907_CSP_G
OAIN+ 17 1 2
16 MAX1907_OAIN- 1 2 C6 R11 110R2F IRFR3709Z IRFR3709Z 1 2
2
42 CPU_SHDN# OAIN- SC470P50V2KX R31 DUMMY-R3

1 2 7 SHDN# 1 1
1KR2
VCC_CORE_S0_G92
3 R5 G G 3
1 2
3
R12 698R2F
Ton=NC, Freq.=300KHz 40 TON FB 15 S S
1
1 2 C5 1 2 C37
R372 SC100P50V2JN-U SCD47U10VKX
DUMMY-R2
1 2 C1
MAX1907_CC 12
CC
1
SC270P50V2JN 14 G4
NEG
1
1 2 G3
R13 130R3F
2
MAX1907_NEG GAP-CLOSE-PWR
MAX1907_REF 8 13 LS/IRFR3709Z/8.2mOhm/@4.5V
2
REF POS
GAP-CLOSE-PWR
2
MAX1907_ILIM 9 MAX1907_POS 1907_CSP 1 2
ILIM
1
1
DPSLP#
C3 R373 GND 11 R10 DY 130R3F

TIME
27 41
SUS
SC1U10V3KX 150KR2F DDO# NC R382

2
1K18R3F 1 2
MAX1907AETL-U R381 698R2F
2
20
35
39
2
1 2 G1
PM_STPCPU# R371 100KR2F 1 2
3,22 PM_STPCPU#
1
offset 1.2%
2
1 2 R7 GAP-CLOSE
22 PM_DPRSLPVR 0R2-0
R374 R16 47KR3
100KR2
1
R14 3D3V_S0
1
DUMMY-R2
3D3V_AUX
2 2
2
1
VCCP_GMCH_S0
R1
1
100KR2
R19 DY
OCP=30A, Vally current = 27.5A, 10KR2
2
1
Vilim=550mV(55mVp-p*10) R21 SYSPOK
2
4K7R2
3
D
2
1 Q1
VID Vcore 2N7002
Boot-up Voltage : 1.2V G
S
Deeper Sleep Voltage : 0.748V
2
, B0=L, B1=L, B2=Open VID5 VID4 VID3 VID2 VID1 VID0 V
3
, S0=L, S1=H, S2=Open, Q2
0 1 0 1 1 1 1.340 1
S2N3904-U3
5V_S0 5V_S0 5V_S0 5V_S0 5V_S0 5V_S0 0 1 1 0 0 0 1.324
2
1
1
0 1 1 0 1 0 1.292
1
C8 R20
R367 R366 R365 R370 R369 R368 0 1 1 1 0 0 1.260 22KR2J
SCD1U10V2MX-1
DUMMY-R2 DUMMY-R2 DUMMY-R2 DUMMY-R2 DUMMY-R2 DUMMY-R2
0 1 1 1 0 1 1.244
2
0 1 1 1 1 1 1.212
2
MAX1907_S0 MAX1907_S1 MAX1907_S2 MAX1907_B0 MAX1907_B1 MAX1907_B2

1 1 0 0 0 0 1 1.180 <Core Design> 1
1
1
1
R375 R378 1 0 0 0 1 1 1.148

R377 R376 DUMMY-R2 R380 R379 DUMMY-R2
20KR2 20KR2 20KR2 20KR2 1 0 0 1 1 0 1.100 Wistron Corporation
1 0 1 0 0 1 1.052 Taipei Hsien 221, Taiwan, R.O.C.
2
1 0 1 0 1 1 1.020 Title
1 0 1 1 1 0 0.972 IMVP IV-CPU POWER-MAX1907

1 1 0 0 0 0 0.940 A3 -1
Leopard2
A B C D E
5 4 3 2 1
For 3.3V 3D3V_PWR

TI TPS5130 for 1D8V, 3D3V, 5V
SETTING=3.349V 1D8V_OCP
1 2 1 2 C212
R187 150R2F SC5600P25V2KX (1D8V=>CH1 , 3D3V=>CH2 , 5V =>CH3) SC DCBATOUT
1 2 For 5V 1 R186 2
R188 10KR2F-U 5V_PWR 13KR3F
1 2 SETTING=5.0915V C210 5130_TRIP1
1
R190 29K4R2F 1 2 1 2 C209 OCP
R189 R210 330R2F 1 2
2K7R2J 1 2 SC4700P50V2KX 8.2A=>R186=13K
D close to IC R211 1KR2F
1 2
SCD1U16V2KX-2 D
close to IC
1 2
R208 4K99R2F
1
C211 5130_INV2 R209 5130_5V_LDO
SC3300P50V2KX 1K8R2 3D3V_OCP
close to IC
2
5130_FB2 D11 SC DCBATOUT
3
1 R183 2
1 2
10KR3F
For 1.8V 5130_TRIP2
1D8V_PWR C228 5130_INV3 BAW56-1 C208
SETTING=1.82V SC4700P50V2KX 1 2 OCP
2
1 2 1 2 C522 5130_FB3
R576 680R3F SC6800P25V2KX-N2 SCD1U16V2KX-2 5.82A=>R182=10K
1 2 5130_LH1
R574 10KR2F-U SC close to IC
1 2 1 2 C520 5130_LL1 5130_LL1 43
1
SCD1U16V2KX-2
R587 R575 11K5R2F
5V_OCP
3K24R2F Vo=(R1*0.85)/R2+0.85 5130_OUT1U
5130_OUT1U 43 SC DCBATOUT
5130_OUT1D 1 R207 2
close to IC 5130_OUT1D 43
15KR3F
1 2
5130_TRIP3
5130_TRIP1 C223
C528 5130_INV1 DCBATOUT SB 1 2
SC8200P25V2KX 5130_TRIP2
2
5130_FB1 SCD1U16V2KX-2
0703 -1 5130_FLT
close to IC
1
C C530
C521
5130_FLT
5130_INV1
5130_OUT2D
5130_OUT2D 43 OCP C
SCD01U16V2KX 8.88A=>R207=15K 5130_5V_LDO 5V_AUX
G59
2
U73
48
47
46
45
44
43
42
41
40
39
38
37
1 2
T(soft)=1.736ms 2 1
SC1000P50V2KX C527
FLT
TRIP1
TRIP2
INV1
LH1
OUTGND1
OUT1_U
LL1
OUT1_D
VIN_SENSE12
OUTGND2
OUT2_D
U71 5130_LH2 1 2 5130_LL2 GAP-CLOSE-PWR
5V_AUX 5130_LL2 43
5130_3D3V_LDO
4 3 5130_SS_STBY1 SCD1U16V2KX-2
DCBATOUT
1 2 TPS5130_1D8V_EN# 5 2 PM_SLP_S4# SB 1
R191 100KR2 R185 5130_FB1 1 36
close to IC
150KR2J 5130_SS_STBY1 FB1 LL2 5130_OUT2U
31 TPS5130_1D8V_EN# 6 1 2 SS_STBY1 OUT2_U 35 5130_OUT2U 43 1 2 C207 5130_5V_LDO 5130_3D3V_LDO
5130_INV2 3 34 SCD1U25V2ZY-U
2N7002DW 5130_FB2 INV2 LH2
4 33
2
84.27002.03F 5130_SS_STBY2 FB2 VIN

SC 5 SS_STBY2 VREF3.3 32
Q42 5130_PWMSEL 6 31
PWM_SEL VREF5
3 OUT 5130_CT 7 30 5130_REGIN 2 1
22,26,33,36,44,45,46 PM_SLP_S3# 2 R1 8
CT
GND TPS5130 REG5V_IN
LDO_IN 29 G67 GAP-CLOSE-PWR 5V_S3
1
IN 1 GND 5130_REF 9 REF LDO_CUR 28
R2 10 27 SC4D7U10V5ZY C533 C526
STBY_REF STBY_VREF5 LDO_GATE 78.47593.411 SCD1U25V2ZY-U
DTC115EE-U DCBATOUT 1 2 11 26
2
R184 100KR2 5130_STBY_LDO STBY_VREF3.3 LDO_OUT
12 STBY_LDO INV_LDO 25
CH521S-30
VIN_SENSE3
43 BL3# 2 1
PG_DELAY
SS_STBY3
OUTGND3
OUT3_U
OUT3_D
PGOUT
SB
B D36
B
TRIP3
INV3
LH3
FB3
LL3
PM_SLP_S4# 5130_CT
22,26,36 PM_SLP_S4#
1
TPS5130PT-U G60
13
14
15
16
15130_PG_DELAY 17
18
19
20
21
22
23
24
C535 1 2
SC SC47P50V2JN
2
78.47034.1F1 5130_SS_STBY3 GAP-CLOSE

5V_AUX 5130_FB3 ZZ.CON2C.XX1
U74 1 2 5130_INV3
S5PWR_ENABLE 25
0R2-0 R663 5130_OUT3D
5130_OUT3D 43
1 2 TPS5130_5V_EN# 3 4 5130_LL3
R598 100KR2 5130_REF 5130_OUT3U
5130_OUT3U 43
2 5 1 2 PM_SLP_S4#
1
0R2-0 R662 5130_LH3 1 2 Condition Voltage

5130_LL3 43
1 6 5130_SS_STBY3 C536 C542
DY SCD1U16V2KX-2 SC1000P25V C541 SCD1U16V2KX-2
2
5130_5V_LDO PWM_SEL H : Auto PWM/SKIP 2.2V(Min)~

2N7002DW 1
84.27002.03F 3 * L : PWM fixed (300KHz) ~0.3V(Max)
2
1
D34
C534 BAT54-1 DCBATOUT
SC4700P50V2KX 83.00054.L03
2
78.47224.2F1
3D3V_S0 5130_TRIP3
1
3D3V_S0
<Core Design>
A 5130_STBY_LDO 5130_SS_STBY2 R523 A
10KR2
U44A
14
Wistron Corporation
1
2
1
R597 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

0R2-0 25,44,45 VCCP_PWRGD Taipei Hsien 221, Taiwan, R.O.C.
C529 3 CPU_SHDN# 41
SC4700P50V2KX PM_SLP_S3# 2
2
Title
2
TSLCX08-U
TPS5130 (3D3V/5V/1D8V)
7

A3
HW Thermal Throttling Leopard2 -1
5 4 3 2 1
TI TPS5130 for 1D2V, 5V, 3D3V 1D8V_PWR

G57
1D8V_S3
2 1
(1D2V=>CH1 , 5V=>CH2 , 3D3V =>CH3) GAP-CLOSE-PWR
1.5V_S5 (For ICH6) 2
G56
1
GAP-CLOSE-PWR
G58
DCBATOUT SC
1D5V_S5 2 1
D U39 GAP-CLOSE-PWR
D
1
3D3V_S5
C206 C540 2
VOUT
5
6
7
8
SCD1U25V2ZY-U SC10U35V0ZY-U 3
2
U28 VIN 5V_PWR 5V_S3
D
D
D
D
GND 1 G65
1
AO4422
Imax=9.3A C262 2 1
G9131-15T73UF-GP SC2D2U10V3ZY
2
Rdson=19.6~24mohm GAP-CLOSE-PWR
G64
G
S
S
S
1D8V 2 1
4
3
2
1
1D8V_PWR
42 5130_OUT1U
5130_OUT1U
5130_LL1
L39 Iomax=5A GAP-CLOSE-PWR
G66
42 5130_LL1 1 2 Imax=300mA
IND-4D7UH-66-GP OCP>10A 2 1
Imax=A GAP-CLOSE-PWR
5
6
7
8
U26
DCR=mOhm
1
D
D
D
D
AO4422 TC23
SE220U2VDM-7 3D3V_PWR 3D3V_AUX
G61
2
Imax=9.3A KEMET, NTD:7.6 (Q1) 2 1
G
S
S
S
Rdson=19.6~24mohm ESR=25mohm GAP-CLOSE-PWR

G62
4
3
2
1
Iripple=2.2A
2 1
5130_OUT1D 7.3*4.3*1.9
42 5130_OUT1D
C Trace Length=1cm (500mils)
GAP-CLOSE-PWR
G63 C
DCBATOUT 2 1
Trace Width=8mils
1D8V_S3 Trace Resistance>25mohm GAP-CLOSE-PWR
1
1
C227 C238
5
6
7
8
1
SCD1U25V2ZY-U SC10U35V0ZY-U C246 DY 5V_S0
2
2
U32 C245
D
D
D
D
AO4422 SC10U10V5ZY-L SC10U10V5ZY
2
78.10693.411
0D9V_S0
1
Imax=9.3A 1D8V_S3 C247
SCD1U
G25
Iomax=2A
2
G
S
S
S
Rdson=19.6~24mohm Vo(cal.)=0.90V
4
3
2
1
1
5V_PWR
5V R610 0D9V_LDO
2 1
DDR_VREF
U38
42 5130_OUT3U
5130_OUT3U
5130_LL3
L41 Iomax=5.4A 1KR2F GAP-CLOSE-PWR
G24
42 5130_LL3 1 2
IND-4D7UH-66-GP OCP>10A 1 4 2 1
2
APL5331_0D9V_VREF VIN VOUT
3 VREF
Imax=4.5A 6 8 GAP-CLOSE-PWR
VCNTL NC
5
6
7
8
1
DCR=60mOhm SB NC 7
1
1
U33 R614 TC13 C563
D
D
D
D
2 GND NC 5
AO4422 7*7*3.0 TC25 1KR2F C564 9 ST100U4VBM-1 SC22U10V6ZY-U
2
ST220U6D3VDM-12 SCD1U16V2KX-2 GND
DY
2
2
Imax=9.3A
2
Rdson=19.6~24mohm KEMET, NTD:8.0 (Q1) APL5331KAC-TR
B B
G
S
S
S
ESR=25mohm KEMET
4
3
2
1
Iripple=1.65A SO-8-P 100uF / 4V / B2 Size / NTD:5.615

5130_OUT3D 7.3*4.3*2.8 Iripple=1.1A / ESR=70mohm
42 5130_OUT3D
DCBATOUT L3# circuit

5V_AUX
1
C229 C226 DCBATOUT

5
6
7
8
1
SCD1U25V2ZY-U SC10U35V0ZY-U
2
U31 C224
D
D
D
D
AO4422 SCD1U10V2MX-1
2
U29
1
Imax=9.3A R227 HTH 1 5

1MR2F HTH VCC D12
2 2
G
S
S
S
Rdson=19.6~24mohm 3
GND
4 3
4
3
2
1
3D3V_PWR LTH RESET#/RESET

3D3V 1 RSMRST# 21,25,36
2
5130_OUT2U L40
42 5130_OUT2U
42 5130_LL2
5130_LL2 1 2
IND-6D8UH-31-GP
Iomax=4A L3# at 8.13V G680LT1
BAT54-1
1
OCP>8A 42 BL3# DY
R226
5
6
7
8
Imax=4.5A 6K04R2F <Core Design>

A A
1
U30
D
D
D
D
AO4422 DCR=60mOhm TC24

2
ST220U6D3VDM-6 HTH
7*7*3.0 Wistron Corporation
2
Imax=9.3A NEC, NTD:8.75 (Q1) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

G
S
S
S
Rdson=19.6~24mohm ESR=55mohm R212

4
3
2
1
Iripple=1.65A 174KR2F Title
5130_OUT2D 7.3*4.3*2.8 TPS5130 (3D3V/5V/1D8V/0D9V)

42 5130_OUT2D
2

A3
Leopard2 -1
Iocp=7.8 * 1.7 = 13.3A Iocp=4.3 * 1.7 = 7.3A
Rds,on=5.5*1.375=7.563m ohm Rds,on=20*1.375=27.5m ohm
Vcs1=Iocp*Rds,on=100mV DCBATOUT Vcs2=Iocp*Rds,on=201mV
VILIM=Vcs1/0.1=1V VILIM2=Vcs2/0.1=2.01V
5V_S3
1
1
C508
C513 SC1U25V5ZY
2
SC1U10V3KX
2
1
1
C514 C507
SCD01U50V3KX SCD01U50V3KX
2
5V_S3
Close to pin21 Close to pin4
D10
2
R573
10R3
SB
1
MAX8743_BST2
BAW56-1
MAX8743_BST1
1
R169 R571 C512
C505 100KR2F 402KR2F SCD1U25V3KX C506
1
1
SCD1U25V3KX SC10U25VMX-2-U
2
C491 C515 SC
2
SC10U25VMX-2-U SC1U10V3KX
2
2
1D5V / 4D3A
2
8
7
6
5
1D8V / 5.5A U67 1 2 R163 R572 R167
5
6
7
8
0R3-U 0R3-U
D
D
D
D
R161 86K6R2F 100KR2F U68 1D5V_S0
VRAM_VDDQ
22
21
D
D
D
D
1
1
U69
1
AO4422 C181 C197
V+
VCC
VDD
SCD1U25V3KX 9 13 SCD1U25V3KX
G22
2
UVP ILIM2
S
S
S
G
0703 -1 3 19 MAX8743_BST2R AO4422 2 1

1
2
3
4
G
S
S
S
ILIM1 BST2
4
3
2
1
MAX8743_BST1R 25 GAP-CLOSE-PWR
BST1
G20
G16 L15 MAX8743_DH1 26 18 MAX8743_DH2 L16
1D8V_VRAM_PWR MAX8743_LX1 DH1 DH2 MAX8743_LX2 1D5V_PWR
1 2 1 2 27 LX1 LX2 17 1 2 2 1
IND-4D7UH-16-GP MAX8743_DL1 24 20 MAX8743_DL2 IND-6D8UH-31-GP
DL1 DL2 GAP-CLOSE-PWR
GAP-CLOSE-PWR
8
7
6
5
5
6
7
8
G18 Rds-on,max = 5.5m ohm 28 16 U70
CS1 CS2 G21
D
D
D
D
D
D
D
D
1 2 U66
10A@70 degree C
1
2 1
1
GAP-CLOSE-PWR TC8 1 15
AO4422 OUT1 OUT2 TC11 GAP-CLOSE-PWR
G17
2
1
IRF7807Z
G
S
S
S
1 2 2 14
2
FB1 FB2
SE220U2VDM-6
SE220U2VDM-7
1D05V ON/OFF control R178
S
S
S
G
4
3
2
1
GAP-CLOSE-PWR MAX8743_ON# 2 1 11 12 5K1R2F
1
2
3
4
R170 2 0R2-0 ON1 ON2

1
R171 0R2-0 5 7
2
MAX8743_VREF TON PGOOD
10
DY REF
1
GND
OVP
1
R164 6
8K06R2F SKIP# 3D3V_S5 R179
1
MAX8743EEI MAX8743_VREF 10KR2F-U

0703 -1
23
C516 MAX8743_FB2
2
SC1U10V3KX SC
2
2
2
Rds-on,max = 20m ohm
1
R658
7A@70 degree C
1
MAX8743_FB1 R607 DY 100KR2

R162 30K1R2F
10KR2F-U 5V_S3 MAX8743_ON#
1
2
R661
2
1 2
5V_AUX
SC
R563 3D3V_S0 1 2
DUMMY-R2 R172 100KR2 100KR2F
U82
R657 DY
1
R565 DUMMY-R2 C618
DY
1 2 3 4
2
1 2 SCD1U10V2MX-1
MAX8743_VREF
2
100KR2 2 5 1 2 PM_SLP_S3# 22,26,33,36,42,45,46
1
R656 10KR2
VCCP_PWRGD 25,42,45
R564 1 6 1 2
DUMMY-R2
DY R667 0R2-0
2N7002DW MAX8743_ON# 44,45
Ton Setting Side 1 Side 2
2
Frequency(kHz) Frequency(kHz)
VCC 235 170 DY
Float 345 255
VREF 485 355 <Core Design>
AGND 620 460
Wistron Corporation
Title
MAX8743 (1D8V_S0/1D5V_S0)
A3
Leopard2 -1
Iocp=7.8 * 1.7 = 13.3A Iocp=4.3 * 1.7 = 7.3A
Rds,on=5.5*1.375=7.563m ohm Rds,on=20*1.375=27.5m ohm
Vcs1=Iocp*Rds,on=100mV DCBATOUT Vcs2=Iocp*Rds,on=201mV
VILIM=Vcs1/0.1=1V VILIM2=Vcs2/0.1=2.01V
5V_S3
1
1
C91
C61 SC1U25V5ZY
2
SC1U10V3KX
2
1
1
C60 C92
SCD01U50V3KX SCD01U50V3KX
2
5V_S3
Close to pin21 Close to pin4
D4
2
R102
10R3
SB
1
MAX8743A_BST2
BAW56-1
MAX8743A_BST1
1
R89 R91 C45
C47 243KR2F 220KR2F SCD1U25V3KX C46 C337
1
1
SCD1U25V3KX SC10U25VMX-2-U
2
C49 C48 SC C59 SC SC10U25VMX-2-U
2
SC10U25VMX-2-U SC10U25VMX-2-U SC1U10V3KX
2
2
1D05V / 6.8A
2
8
7
6
5
1D2V / 13A U9 1 2 R88 R92 R64
5
6
7
8
0R3-U 0R3-U
D
D
D
D
R49 100KR2F 100KR2F U11 1D05V_S0
1D2V_VGA_S0
22
21
D
D
D
D
1
1
U17
1
C58 C72
V+
VCC
VDD
SCD1U25V3KX 9 13 SCD1U25V3KX
G41
2
AO4422 UVP ILIM2
S
S
S
G
3 19 MAX8743A_BST2R AO4422 2 1
1
2
3
4
G
S
S
S
ILIM1 BST2
4
3
2
1
MAX8743A_BST1R 25 GAP-CLOSE-PWR
BST1
G50 G43
L23 MAX8743A_DH1 26 18 MAX8743A_DH2 L24
1D2V_PWR MAX8743A_LX1 DH1 DH2 MAX8743A_LX2 1D05V_PWR
2 1 1 2 27 LX1 LX2 17 1 2 2 1
IND-D82UH-3-GP MAX8743A_DL1 24 20 MAX8743A_DL2 IND-3D3UH-44-GP
GAP-CLOSE-PWR DL1 DL2 GAP-CLOSE-PWR
G51
8
7
6
5
8
7
6
5
5
6
7
8
U56 U8 Rds-on,max = 5.5m ohm 28 16 U10
CS1 CS2 G42
D
D
D
D
D
D
D
D
D
D
D
D
2 1 10A@70 degree C
1
TC5
IRF7807Z
SB 2 1
1
GAP-CLOSE-PWR TC20
IRF7807Z
G52 1 OUT1 OUT2 15

1
TC18 GAP-CLOSE-PWR
2
1
SE220U2VDM-6
SE220U2VDM-6
C70 IRF7807Z
G
S
S
S
2 1 2 14
1 S
2 S
3 S
4 G
S
S
S
G
2
FB1 FB2
SE220U2VDM-7
1D2V ON/OFF control R63
2
1
2
3
4
4
3
2
1
SCD1U25V3KX
GAP-CLOSE-PWR MAX8743_ON# 2 1 11 12 510R2F

R652 0R2-0 ON1 ON2
G49
1
5 7
2
R61 MAX8743A_VREF TON PGOOD
2 1 10 REF
10KR2F-U 8
GND
OVP
1
GAP-CLOSE-PWR 6
G47 SKIP# R93
2
2 1 MAX8743EEI 10KR2F-U
23
C93 MAX8743A_FB2
GAP-CLOSE-PWR SC1U10V3KX MAX8743A_VREF
G48
2
2
Rds-on,max = 20m ohm
2 1 7A@70 degree C
MAX8743A_FB1
1
GAP-CLOSE-PWR
1D2V_PWR R487 2 1 MAX8743_ON# 44
1
30K1R2F R452 0R2-0

1
DY R655
1
R62 3K3R2
2
49K9R2F C71 0706 -1 3D3V_S0 1 2 R489
R90 100KR2 1 2
2
3 2
SC1000P25V
Q39
2
D 2N7002 100KR2F
1 5V_S3
VGA_PWRCNTL 13
G SB
1
S
2
R451
10KR2 R450
0R2-0 VCCP_PWRGD 25,42,44
Vo=Vref*(1+R1/R2)
2
R486
1
=1.0V*(1+2K/10K)
1 2 MAX8743A_VREF
=1.2V
1
Vo=1.0V*(1+0/10K) DUMMY-R2
<Core Design>
R485
=1*1=1.0V DUMMY-R2 Ton Setting Side 1 Side 2
High(3.3V)=>Vo=1.0V
Frequency(kHz) Frequency(kHz) Wistron Corporation
2
VCC 235 170 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Low(0V)=>Vo=1.2V Float 345 255 Taipei Hsien 221, Taiwan, R.O.C.
VREF 485 355 Title
M24/M26 POWER PLAY (VGA_PWRCNTL) AGND 620 460 MAX8743 (1D2V_VGA_S0/1D05V)
high (3.3V) = set lower core voltage (VDDC = 1.0V) Size Document Number Rev
A3
low (0V) = set higher core voltage (VDDC = 1.2V) Leopard2 -1
A B C D E
FOR GMCH Power 1D8V_S3
5V_S3
G46 G40
1
1 2 1 2
C196 R182 1 2 C222
DDR_VREF_S3 need 10 mil and
SCD1U16V3KX 220R3F SCD1U16V
GAP-CLOSE-PWR GAP-CLOSE-PWR must neat NB and DIMM
2
G45 G38 U25
2
1 2 1 2 1 5 DDR_VREF_S3
CORE_GMCH_S0 1D05V_S0 VCCP_GMCH_S0 1D05V_S0 IN+ VDD
2 VSS
1
4 GAP-CLOSE-PWR GAP-CLOSE-PWR 3 4 4
C195 R177 IN- OUT
1
G44 G39 SCD1U16V3KX 220R3F G1214 VREFOUT = 0.9V
DY
2
1 2 1 2 C221
SCD1U16V
2
GAP-CLOSE-PWR GAP-CLOSE-PWR 1 2
R204 0R3-U
1D5V_S0 FOR DDR2 Power
1
1D2V_VDDR_S0 / 3A R160
0R5J-1
Suspend Power
2
1
C187 C180
DY 5V_S0 3D3V_AUX
SC10U10V5ZY-L
1D5V_S0
SC1U6D3V2KX
2
3D3V_S5
3 1D2V_VDDR_S0 3
1
1
C194 R159
249R2F
U23 SCD1U10V2MX-1 U35
2
1V:R159=470R
4 1 2 2 5
VOUT VIN
3 APL533_VREF2 1.2V:R159=250R 3
GND IN 3D3V_S3 3D3V_S5
VREF NC
8 NC VCNTL 6 25 S5PWR_ENABLE 4 ON/OFF# OUT 1
1
7 NC 2 1
1
TC10 5 2 R241 0R3-U

NC GND
1
1
ST220U4VDM-1 9 C179 R158 AAT4250-U
2
GND 1KR2F C249 C248

SC1U6D3V2KX SCD1U16V
2
2
SCD1U16V
2
APL5331KAC-TR
Run Power 5V_S0
U36
5V_S3
5V_AUX
DCBATOUT 1 8 5V_S5
S D
2 S D 7
2
3 S D 6 0703 -1 2
1 2 2 3 PWR_S0_CTL 4 5
D
G D
R223 10KR2
S
Q14 AO4422 U22

C546 D14 5V_S3 5V_S5
TP0610K-U MMGZ5242B 3D3V_S0 3D3V_AUX 2 5
2
GND IN
SCD22U50V5KX
G
U76 3 2 1
1
S5PWR_ENABLE NC R321 0R3-U

1 8 4 1
1
S D ON/OFF# OUT
1 2 2 S D 7
R225 330KR2 3 6
1
S D
4 5 AAT4250-U
1
G D
C182 C183
RB1 AO4422 SCD1U16V
DY
2
100R2 0703 -1 SCD1U16V
1
VRAM_VDDQ Q40 1D8V_S3

2
R224 SI3456DV-U1
1KR2 6
4 5
3
D
S
D 2
2
1 QB1 1
G 2N7002
G
S
2
3
3
D DY
1 Q13
22,26,33,36,42,44,45 PM_SLP_S3# 2N7002
G
S
2
2
R203
1
100KR2 <Core Design> 1
3D3V_S3 5V_S3
Wistron Corporation
1
1
C237 C570
SCD1U16V SCD1U16V 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DY DY Taipei Hsien 221, Taiwan, R.O.C.
2
2
Title
PWRPLANE&RESETLOGIC
A3
Leopard2 -1
A B C D E
A B C D E
AD+
SC DCBATOUT DCBATOUT DCBATOUT
1
EC6 EC92 EC13 EC114 EC130 EC102 EC33 EC88 EC16 EC18 EC32 EC4 EC89 EC7 EC10
EC165 EC164 EC85
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SC1000P50V
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
EC137 EC157 EC42 EC132 EC139 EC147 EC162 EC153
2
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
2
2
DY DY DY DY DY DY DY DY VCCP_GMCH_S0
4 4
AUD_AGND AUD_AGND BT+
AUD_AGND AUD_AGND AUD_AGND
1
EC68 EC112 EC26 EC113 EC51 EC9 EC123 EC107 EC31
1
5V_S0 EC12 EC47 EC134 EC5 EC86 EC90 EC64 EC11
SCD1U25V3KX
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
2
2
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
SCD1U25V3KX
2
2
1
1
EC15 EC87 EC135 EC84 EC93 EC3 EC8 EC21 EC24 EC17 EC91
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
2
2
5V_S0 5V_AUDIO_S0
1D8V_S3 3D3V_LAN_S5
U78D U49D
14
14
12 12 1D05V_S0 1D05V_S0 1D05V_S0 1D05V_S0 1D2V_VGA_S0
1
11 11 SC EC43 EC124 EC36 EC48 EC38 EC35 EC34 EC122 EC127
13 13 EC126 EC39
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
2
2
1
1
TSAHCT32 TSAHCT86 SC
7
EC108 EC173 EC174 EC175 EC178 EC172 EC176 EC177

SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V
2
AUD_AGND AUD_AGND
3D3V_S0 3D3V_S0 3D3V_S0

3 3D3V_S0 3
1
EC49 EC67 EC140 EC154 EC143 EC82 EC145 EC133 EC44 EC146 EC76 EC25 EC148
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SPR9 SPR5 SPR2 SPR8 SPR6 SPR4 SPR10 SPR1 SPR7 SPR3 EC142 EC156 EC61
2
SCD1U16V SCD1U16V SCD1U16V
2
SPRING-18-U SPRING-18-U SPRING-18-U SPRING-18-U SPRING-18-U SPRING-18-U SPRING-18-U SPRING-18-U SPRING-18-U SPRING-9
1
1
AUD_AGND AUD_AGND DY DY DY DY DY DY DY DY DY DY DY DY DY
DY
5V_S3 3D3V_S0
1
EC62 EC40 EC115 EC70 EC59 EC79 EC71 EC57 EC52
EC56
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SPR11 SPR13 SPR12 SPR16 SPR14 SPR15 SCD1U16V
2
1
1
K2 K1 K3 K4
SPRING-4 SPRING-4 SPRING-4 SPRING-4 SPRING-4SPRING-4 GNDPAD GNDPAD GNDPAD GNDPAD
1
DY DY DY DY DY DY DY DY
5V_S3 5V_S3 5V_S3
1
K5 K7 K6
GNDPAD GNDPAD GNDPAD
1
EC74 EC150 EC65 EC72 EC80 EC83 EC78 EC41 EC63 EC45
2 EC55 EC53 2
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V SCD1U16V
2
H23 H21 H18 H8 H14 H12 H15 H19 H17 H13
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
34.40E37.001 34.40E37.001 DY DY DY DY DY DY DY DY DY DY
CORE_GMCH_S0
1
5V_S0 5V_S0 5V_S0

1
1
EC22 EC120 EC121 EC125 EC54 EC81 EC75
EC69 EC73 EC58 EC66 EC144 EC46 EC77
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U25V3KX
SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V SCD1U16V

SCD1U16V
SCD1U16V
H5 H16 H10 H11 H4 H20 H24 H6 H27 SCD1U16V

2
2
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
DY DY DY DY DY DY DY DY DY DY
1
1D5V_S0
1
1
EC138 EC129 EC23 EC37 EC163 EC151 EC50 EC60 EC149 EC152 EC128 EC141 EC136
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
SCD1U16V
1 <Core Design> 1
H1 H9 H2 H3 H26 H25 H22 H7
2
2
HOLE HOLE HOLE HOLE HOLE HOLE
34.40E37.001 34.40E37.001
Wistron Corporation
1
Title
MISC & EMI

A3 -1
Leopard2
A B C D E

HP Pavilion DV4000 Leopard2 0711 05202

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HP Pavilion DV4000 Leopard2 0711 05202

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A B C D E

Mobile CPU DCBATOUT 5V_S3

31 DDRII*2 11,12 SYSTEM DC/DC

31 30,31 USB 2.0 USB x 2 CPU DC/DC

LINE OUT L3: Signal 2

ICH6-M Integrated Pull-up

PCI RESOURCE TABLE

Mini-PCI AD21 P_INTE# REQ0#/GNT0#

LAN AD23 P_INTE# REQ2#/GNT2#

Blue Thumb AD24

3 2 CLK_SRCT2 ICS954206AG R586 49D9R2F

3D3V_CLKGEN_S0 TPAD30 0 1 1 1 -3.0

1 0 1 1 +-0.6 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

1 0 1 100M 1 1 1 0 +-1.25 Size Document Number Rev

H_CPURST# 2 1 1KR2 1KR2

AE26 VSS64 VSS161 P5

Trace 10 mil wide with 20 mil spacing

VCCP_GMCH_S0 VCCP_GMCH_S0 Power On Sequencing

H_D#5 HD4# HA7# H_A#8

H_D#13 F3 G11 H_A#16

H_XSWING H_YSWING H_D#18 HD17# HA20# H_A#21 10~30uS

H_D#20 J4 A12 H_A#23

R95 R117 H_D#21 G3 F12 H_A#24

H_D#24 HD23# HA26# H_A#27 VCCP_GMCH_S0

H_D#25 HD24# HA27# H_A#28

CFG19 CPU VTT Select 0 = 1.05V (Default)

Alviso will provide SDVO_CTRLCLK

AM21 U34 PEG_RXP13

11,12 M_CS#0 SM_CS0# THRMTRIP# PM_THRMTRIP-A# 4,21 LCTLB_DATA EXP_TXN0

Layout Note: AH15 AE29 RST1# 1 2 F22 G32 TXN2 C387

SM_OCDCOMP0 DREF_CLKP DREFCLK 3 LVBG EXP_TXN5 SCD1U16V

SM_ODT3 NC3 LBCLKN EXP_TXN11 TXN12 C429 SCD1U16V

SMVREF0 NC7 LADATAN1 EXP_TXN15 SCD1U16V

2 TXP1 C97 1 SCD1U16V 2

SMYSLEWOUT LADATAP1 EXP_TXP3 TXP4 C388 SCD1U16V

R465 R437 R420 R461 DUMMY-R2 2D5V_S0 When High 1K Ohm

80D6R2F R468 DUMMY-R2 R470 DUMMY-R2

CFG2 1 2 CFG11 1 2 CFG19

M_RCOMPN CFG0 1 2 CFG12 1 2 CFG20

M_A_DQ24 AP27 AN30 M_A_DQS#2 M_B_DQ23 AG28 AK33 M_B_DQS#1

DDR SYSTEM MEMORY B

H27 VCC28 VCCSM5 AC27

K24 VCC33 VCCSM10 AK26

K22 VCC35 VCCSM12 AH26

K21 VCC36 VCCSM13 AG26

U20 VCC38 VCCSM15 AE26

K20 VCC40 VCCSM17 AN25

AC2 VCCH_MPLL1 VCCSM27 AE23

AA1 VCCA_HPLL VCCSM31 AE19

G19 VSSA_CRTDAC VCCSM36 AE14

K13 VTT0 VCCSM41

J13 VTT1 VCCSM42

V11 VTT4 VCCSM45

U11 VTT5 VCCSM46

R11 VTT7 VCCSM48 AN12

N11 VTT9 VCCSM50

M11 VTT10 VCCSM51

L11 VTT11 VCCSM52

K11 VTT12 VCCSM53

V10 VTT14 VCCSM55

U10 VTT15 VCCSM56

T10 VTT16 VCCSM57 AD11