Acer Aspire 4535 - La-4921p Kblg0 Nblg0 - Rev 1.0

A
Compal Confidential
2
KBLG0/NBLG0 Schematics Document

AMD Puma (JV40-PU) : Griffin Processor with RS780MN/SB700/M92-M2 XT
Tigris (JV40-TR) : Caspian Processor with RS880M/SB710/M92-M2 XT
2009-03-11
REV:1.0
2008/10/06
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2009/10/06
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet
Thursday, March 26, 2009

E
of
57
Tigris
Compal Confidential
VRAM 512MB
64M16 x 4
Model Name : KBLG0
LCD (LED BL)

CRT
Memory BUS(DDRII)
uPGA-638 Package
Griffin page 4,5,6,7
page 44
ATI M92-M2 XT
uFCBGA-962
MUX
(1:2)
page 26
AMD S1G2 Processor
Page 14,15,16,17,18,21,22
BANK 0, 1, 2, 3
5 in 1 socket
page 33
ATI RS880M
uFCBGA-528
Thermal Sensor
ADM1032
ATI RS780MN
Clock Generator
SLG8SP626VTR
page 6
HDMI Conn.
Card Reader
page 23
RTS5159
uFCBGA-528
page 25
PCI-Express 1x
page 33
page 36,37
page 10,11,12,13
option2
MINI Card x1
WLAN
LAN(GbE)
Card Reader
Atheros AR8131
JMB385
page 36
port 2
page 8,9
1.8V DDRII 667/800

1
Hyper Transport Link

16 x 16
PCI-Express 16x
Gen2
200pin DDRII-SO-DIMM X2
Dual Channel
DDR2 500MHz
MUX
(1:2)
page 24
Puma
Fan Control
page 19, 20
PowerXpress (MUX)
1
AMD S1G3 Processor

uPGA-638 Package
Caspian
page 34
port 3
A link Express2
ATI SB710
uFCBGA-528
page 33
port 4
RJ45
page 35
ATI SB700
page 33
page 36
page 36
CMOS
Camera
Bluetooth
Conn
Finger
printer
AES1610
Mini
card
(WL)X1
USB port 0,6
USB port 3
USB port 12
USB port 13
USB port 8
option1
USB port 4
2
USB
3.3V 24.576MHz/48Mhz
uFCBGA-528
page 37
USB
conn
X2
3.3V 48MHz
5 in 1 socket
page 27
HD Audio
USB port 1
S-ATA
page 27,28,29,30,31
MDC 1.5
Conn
page 41
LPC BUS
LED
page 40
SATA HDD
Conn. page 32
CDROM
Conn.
page 32
ESATA
Conn.
page 37
port 0
port 1
port 2
HDA Codec
ALC888
page 42
Digital MIC
page 42
Audio AMP
page 43
RTC CKT.
ENE KB926
page 26
page 38
Phone Jack x3
page 43
LID SW / MEDIA/B
Int.KBD
Touch Pad
page 39
page 39
Power On/Off CKT.
page 39
EC I/O Buffer
page 41
BIOS
page 38
page 39
DC/DC Interface CKT.

page 45
Power Circuit
4
page 46,47,48,49,50,51
52,53,54
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
Size
B
Date:
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet

E
of
57
SIGNAL
STATE
Voltage Rails
SLP_S1# SLP_S3# SLP_S4# SLP_S5#
+VALW
+V
+VS
Clock
HIGH
HIGH
HIGH
HIGH
ON
ON
ON
ON
Power Plane
Description
S1
S3
S5
S1(Power On Suspend)
LOW
HIGH
HIGH
HIGH
ON
ON
ON
LOW
VIN
Adapter power supply (19V)
N/A
N/A
N/A
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
B+
AC or battery power rail for power circuit.
N/A
N/A
N/A
+CPU_CORE_0
Core voltage for CPU (0.7-1.2V)
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
+CPU_CORE_1
Core voltage for CPU (0.7-1.2V)
ON
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
+CPU_CORE_NB
Voltage for On-die Northbridge of CPU(0.8-1.1V)ON
OFF
OFF
+0.9V
0.9V switched power rail for DDR terminator
ON
ON
OFF
+1.1VS
1.1V switched power rail for NB VDDC & VGA
ON
OFF
OFF
+1.2V_HT
1.2V switched power rail
ON
OFF
OFF
+VGA_CORE
0.95-1.2V switched power rail
ON
OFF
OFF
Vcc
Ra/Rc/Re
+1.5VS
1.5V power rail for PCIE Card
ON
OFF
OFF
Board ID
+1.8V
1.8V power rail for CPU VDDIO and DDR
ON
ON
OFF
+1.8VS
ON
OFF
OFF
+2.5VS
2.5V for CPU_VDDA
ON
OFF
OFF
ON*
0
1
2
3
4
5
6
7
Full ON
+3VALW
3.3V always on power rail
ON
ON
+3V_LAN
3.3V power rail for LAN
ON
ON
ON
+3VS
ON
OFF
OFF
+5VALW
5V always on power rail
ON
ON
ON*
+5VS
5V switched power rail
ON
OFF
OFF
+VSB
VSB always on power rail
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
Board ID / SKU ID Table for AD channel
REQ#/GNT#
EC SM Bus1 address
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
BOARD ID Table
Board ID
0
1
2
3
4
5
6
7
External PCI Devices

IDSEL#
3.3V +/- 5%
100K +/- 5%
Rb / Rd / Rf
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
Interrupts
BTO Option Table

PCB Revision
0.1
0.2
0.3
0.4
1.0
BTO Item
Discrete
UMA
M92-M2 XT
VRAM STRAP
LAN 8121
LAN 8131
HDT debug
JMB385 CR
RTS5159 CR
FOR PUMA
FOR TIGRIS
FOR TEST
EC SM Bus2 address
Device
Address
HEX
Smart Battery
0001 011X b
16H
Device
Address
HEX
ADI ADM1032 (CPU)
1001 100X b
98H
SB700
SB700
RS780MN
GMT G781-1 (GPU)
1001 101X b
9AH
PX_GPIO0
PX_GPIO1
PX_GPIO2
SB-Temp Sensor
SB700
SM Bus 0 address
Function Description
9CH
dGPU_Reset
dGPU_PWR_Enable
IGP only mode
PowerXpress mode
H : Enable
H : Enable
SB700
SM Bus 1 address
Device
Address
HEX
Clock Generator
(SILEGO SLG8SP626)
1101 001Xb
D2
DDR DIMM1
1001 000Xb
90
DDR DIMM2
1001 010Xb
94
Device
Address
New card
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Device
BOM Structure
VGA@
UMA@
M92@
VRAM@
8121@
8131@
HDT@
JMB385@
RTS5159@
PUMA@
TIGRIS@
UB@
DISPLAY OUTPUT
PX Mode Switch
X
LVDS / CRT
L : iGPU(DC) / H : dGPU(AC)
KB926
PX_GPIO1
PX_GPIO2
Enable +1.1VS_PX
PX MODE SWITCH
PX_+1.8VS
PX_+3VS
Enable +3VS_DELAY
Enable +1.8VS_PX
PX_+VGA_CORE
PX_GPIO2_NB
Enable +VGA_CORE
Trigger from SB
IGP only mode
PowerXpress mode
H : Enable
Reserved
H : Enable
H : Enable
H : Enable
Reserved
KB926
PX_GPIO1_SB
Mini card
4
Trigger from SB to Enable (PX_GPIO1/PX_+3VS/PX_+1.8VS/PX_+VGA_CORE)
IGP only mode
PowerXpress mode
H : Enable
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
Size
B
Date:
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet

E
of
57
VLDT CAP.
+1.2V_HT
250 mil
1
H_CADIP[0..15]
10 H_CADIP[0..15]
H_CADOP[0..15]
H_CADIN[0..15]
10 H_CADIN[0..15]
H_CADON[0..15]
H_CADOP[0..15]
H_CADON[0..15]
10
C727
4.7U_0805_10V4Z
10
+1.2V_HT
JCPU1A
VLDT=1.5A
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
HT LINK
D1
D2
D3
D4
VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3
E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5
L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
AE2
AE3
AE4
AE5
1
C664
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
C726
0.22U_0603_16V4Z
C722
180P_0402_50V8J
C668
180P_0402_50V8J
Near CPU Socket
PUMA@
2
4.7U_0805_10V4Z
10
10
10
10
H_CLKIP0
H_CLKIN0
H_CLKIP1
H_CLKIN1
J3
J2
J5
K5
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
Y1
W1
Y4
Y3
H_CLKOP0
H_CLKON0
H_CLKOP1
H_CLKON1
10
10
10
10
10
10
10
10
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
N1
P1
P3
P4
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
R2
R3
T5
R5
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
10
10
10
10
6090022100G_B
C725
0.22U_0603_16V4Z
PUMA@
Change as 10U
for Tigris
Change as 10U
for Tigris
C666
4.7U_0805_10V4Z
PUMA@
+1.2V_HT
conn@
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Size Document Number
Custom
Date:
Rev
C
401679
Sheet

E
of
57
Processor DDR2 Memory Interface
PLACE CLOSE TO PROCESSOR

WITHIN 1.5 INCH
JCPU1C
9 DDRB_SDQ[63..0]
DDRA_CLK0
+1.8V
R78
1K_0402_1%
DDRA_CLK0#
C379
1.5P_0402_50V9C
DDRA_CLK1
1
R79
1K_0402_1%
1
C177
1000P_0402_25V8J
C178
0.1U_0402_16V4Z
+MCH_REF
DDRA_CLK1#
C111
1.5P_0402_50V9C
DDRB_CLK0
1
DDRB_CLK0#
C380
1.5P_0402_50V9C
DDRB_CLK1
1
DDRB_CLK1#
+0.9V
2
VTT=0.75A
Place them close to CPU within 1"
+1.8V
8
8
R77
1
1
R76
DDRA_ODT0
DDRA_ODT1
8 DDRA_SCS0#
8 DDRA_SCS1#
8 DDRA_CKE0
8 DDRA_CKE1
8 DDRA_CLK0
8 DDRA_CLK0#
8 DDRA_CLK1
8 DDRA_CLK1#
3
8 DDRA_SMA[15..0]
8 DDRA_SBS0#
8 DDRA_SBS1#
8 DDRA_SBS2#
8 DDRA_SRAS#
8 DDRA_SCAS#
8 DDRA_SWE#
39.2_0402_1%
2
2
39.2_0402_1%
DDRA_ODT0
DDRA_ODT1
DDRA_SCS0#
DDRA_SCS1#
DDRA_CKE0
DDRA_CKE1
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_SMA14
DDRA_SMA15
C112
1.5P_0402_50V9C
+0.9V
JCPU1B
D10
C10
B10
AD10
VTT1
VTT2
VTT3
VTT4
AF10
AE10
MEMZP
MEMZN
MEM:CMD/CTRL/CLK VTT5
VTT6
VTT7
VTT8
VTT9
H16
RSVD_M1
T19
V22
U21
V19
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
T20
U19
U20
V20
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
J22
J20
MA_CKE0
MA_CKE1
W10
AC10
AB10
AA10
A10
VTT_SENSE
Y10
MEMVREF
W17
VTT_SENSE
RSVD_M2
B18
W26
W23
Y26
DDRB_ODT0
DDRB_ODT1
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
V26
W25
U22
DDRB_SCS0#
DDRB_SCS1#
MB_CKE0
MB_CKE1
J25
H26
DDRB_CKE0
DDRB_CKE1
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
DDRB_SMA14
DDRB_SMA15
MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CLK_H2
MA_CLK_L2
MA_CLK_H3
MA_CLK_L3
MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1
MB_CLK_H2
MB_CLK_L2
MB_CLK_H3
MB_CLK_L3
P22
R22
A17
A18
AF18
AF17
R26
R25
N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
PAD
T4
+MCH_REF
MB0_ODT0
MB0_ODT1
MB1_ODT0
N19
N20
E16
F16
Y16
AA16
P19
P20
DDRB_ODT0 9
DDRB_ODT1 9
DDRB_SCS0# 9
DDRB_SCS1# 9
DDRB_CKE0 9
DDRB_CKE1 9
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
9
9
9
9
9 DDRB_SDM[7..0]
DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#
R20
R23
J21
MA_BANK0
MA_BANK1
MA_BANK2
MB_BANK0
MB_BANK1
MB_BANK2
R24
U26
J26
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#
R19
T22
T24
MA_RAS_L
MA_CAS_L
MA_WE_L
MB_RAS_L
MB_CAS_L
MB_WE_L
U25
U24
U23
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
DDRB_SMA[15..0]
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
DDRB_SBS0# 9
DDRB_SBS1# 9
DDRB_SBS2# 9
DDRB_SRAS# 9
DDRB_SCAS# 9
DDRB_SWE# 9
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
6090022100G_B
conn@
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
A12
B16
A22
E25
AB26
AE22
AC16
AD12
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
MEM:DATA
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
E12
C15
E19
F24
AC24
Y19
AB16
Y13
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
DDRA_SDQ[63..0]
8
1
DDRA_SDM[7..0]
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
8
8
8
8
8
8
8
8
8
8
8
8
8
8
6090022100G_B
conn@
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

E
of
57
+2.5VDDA
L35
3300P_0402_50V7K
1
2
FBM_L11_201209_300L_0805
1
1
1
+2.5VS
1
+
C391
150U_B2_6.3VM
4.7U_0805_10V4Z
C385
C319
VDDA=0.25A
+1.8V
R66
1
R67
C384
0.22U_0603_16V4Z
2
10K_0402_5%
2
300_0402_5%
B
2
JCPU1D
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
2 3900P_0402_50V7K
1
1
C723
LDT_RST#
H_PWRGD
LDT_STOP#
R325
169_0402_1%
23 CLK_CPU_BCLK#
11 CPU_LDT_REQ#
1
C724
2
3900P_0402_50V7K
+1.8V
+1.8V
+1.8VS
R70 2
2
R71
+1.2V_HT
R339
300_0402_5%
27
R82
R89
LDT_RST#
LDT_RST#
1 2.2K_0402_5%
1
2.2K_0402_5%
2 44.2_0402_1% CPU_HTREF0
2 44.2_0402_1% CPU_HTREF1
1
1
W9
Y9
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
DBREQ_L
E10
CPU_DBREQ#
TDO
AE9
2
1
G10
AA9
AC9
AD9
AF9
CPU_TEST23
AD7
TEST23
T25 PAD
T26 PAD
CPU_TEST18
CPU_TEST19
H10
G9
TEST18
TEST19
T37 PAD
T33 PAD
CPU_TEST25H
CPU_TEST25L
T42 PAD
T3 PAD
T41 PAD
T2
CPU_TEST21
CPU_TEST20
CPU_TEST24
CPU_TEST22
CPU_TEST12
CPU_TEST27
R330 2 0_0402_5%
1
PAD
CPU_TEST6
CPU internal thermal sensor

2
E9
E8
AB8
AF7
AE7
AE8
AC8
AF8
TEST9
TEST6
A3
A5
B3
B5
C1
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
R52
C719
0.01U_0402_25V4Z
@
+3VS
D7
E7
F7
C7
TEST7
TEST10
C3
K8
CPU_TEST7
CPU_TEST10
TEST8
C4
CPU_TEST8
TEST29_H
TEST29_L
C9
C8
PAD
PAD
34.8K_0402_1%
@
20K_0402_5%
@
PAD
PAD
PAD
PAD
T34
T36
T32
T38
PAD
PAD
T31
T18
PAD
T67
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
PAD
PAD
+1.8V
CPU_SVC
CPU_SVD
G
CPU_SID 3
EC_SMB_DA
1
R328 1
R329
Q7 @ FDV301N_NL_SOT23-3
1
R479
@
1
R484
H18
H19
AA7
D5
C5
+1.8V
CPU_TEST25H
For Tigris
6090022100G_B
CPU_TEST25L
conn@
CPU_DBREQ#
CPU_TEST24
CPU_TEST20
CPU_TEST23
CPU_TEST25H
2
0_0402_5%
2
0_0402_5%
EC_SMB_DA2
2
0_0402_5%
2
0_0402_5%
EC_SMB_CK2
EC_SMB_DA1
2
1K_0402_5%
2
1K_0402_5%
T39
T35
2.09V for Gate

@
H_PROCHOT_R# 27
FDV301N, the Vgs is:

min = 0.65V
Typ = 0.85V
Max = 1.5V
2
0_0402_5%
T24
T21
CPU_TEST21
R53
R68
CPU_TDO
TEST17
TEST16
TEST15
TEST14
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
CPU_VDDNB_FB_H 53
CPU_VDDNB_FB_L 53
CPU_TEST17
CPU_TEST16
CPU_TEST15
CPU_TEST14
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
H_THERMTRIP# 28
T6
T5
CPU_TEST28_H_PLLCHRZ_P
CPU_TEST28_L_PLLCHRZ_N
TEST25_H
TEST25_L
C2
AA6
PAD
PAD
J7
H8
TEST28_H
TEST28_L
2
0_0402_5%
2
300_0402_5%
H_PROCHOT#
C92 @ 0.1U_0402_16V4Z
LDT_STOP#
DBRDY
TMS
TCK
TRST_L
TDI
R65
THERMDC_CPU
THERMDA_CPU
W7
W8
H6
G6
T43 PAD
2
1
1
HT_REF0
HT_REF1
THERMDC
THERMDA
VDDIO_FB_H
VDDIO_FB_L
+1.8VS
R6
P6
THERMTRIP_L
PROCHOT_L
MEMHOT_L
VDDNB_FB_H
VDDNB_FB_L
C720
0.01U_0402_25V4Z
@
11,27 LDT_STOP#
SIC
SID
ALERT_L
1
R69
+1.8V
CPU_THERMTRIP#_R
H_PROCHOT#
AF6
AC7
AA8
VDD1_FB_H
VDD1_FB_L
H_PWRGD
AF4
AF5
AE6
CPU_SVC 53
CPU_SVD 53
VDD0_FB_H
VDD0_FB_L
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
R337
300_0402_5%
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
CPU_VDD1_FB_H
Y6
CPU_VDD1_FB_L AB6
C721
0.01U_0402_25V4Z
@
DVT2
B7
A7
F10
C6
CPU_SVC
CPU_SVD
A6
A4
53 CPU_VDD1_FB_H
53 CPU_VDD1_FB_L
R338
300_0402_5%
SVC
SVD
F6
E6
+1.8VS
KEY1
KEY2
53 CPU_VDD0_FB_H
53 CPU_VDD0_FB_L
T44 PAD
H_PWRGD
CLKIN_H
CLKIN_L
Q9
1
MMBT3904_NL_SOT23-3
M11
W18
CPU_VDD0_FB_H
CPU_VDD0_FB_L
27
CPU_SIC
CPU_SID
VDDA1
VDDA2
A9
A8
CPU_THERMTRIP#_R
23 CLK_CPU_BCLK
F8
F9
CPU_TEST25L
For Tigris
EC_SMB_DA1 38,47
TIGRIS@
1
2
R144
300_0402_5%
1
2
R143
300_0402_5%
1
2
R327
300_0402_5%
1
2
R75
300_0402_5%
1
2
R74
300_0402_5%
1
2
R73
300_0402_5%
1
2
R72
300_0402_5%
1
2
R136
300_0402_5%
1
2
R135
300_0402_5%
TIGRIS@
+1.8V
EC_SMB_CK1 38,47
0.1U_0402_16V4Z
1
3
5
7
9
11
13
15
17
19
21
23
CPU_DBREQ#
HDT@ HDT@
CPU_DBRDY HDT@
HDT@
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
+3VS
JP1
1
C206
2
MP(Remove)
U11
1
VDD
THERMDA_CPU
D+
THERMDC_CPU
C194
1
2
2200P_0402_50V7K
PUMA@
D-
THERM#
Change as 3300pF
For Tigris
SCLK
EC_SMB_CK2
SDATA
EC_SMB_DA2
ALERT#
GND
EC_SMB_CK2 22,38
2
4
6
8
10
12
14
16
18
20
22
24
26
+3VS
MP(Remove)
U15
HDT_RST#
CONN@ SAMTEC_ASP-68200-07
EC_SMB_DA2 22,38
LDT_RST#
SB_PWRGD 11,28,41 4
NC7SZ08P5X_NL_SC70-5
HDT@
MP(mask)
ADM1032ARMZ_MSOP8
2008/10/06
Issued Date
Compal Secret Data
Address 1001 100X b
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
R140 2
@
0_0402_5%
EC_SMB_CK1
+1.8V
Q8 @ FDV301N_NL_SOT23-3
@
1
R480
@
1
R485
EC_SMB_CK
CPU_SIC 3
2
1
220_0402_5%R117
2
1
220_0402_5%R118
2
1
220_0402_5%R119
2
1
220_0402_5%R120
DVT
Rev
C
401679
Sheet

E
of
57
VDD0 = 18A
VDD(+CPU_CORE) decoupling.
+CPU_CORE_0
1
C106
330U_X_2VM_R6M
+
1
1
C661
330U_X_2VM_R6M
1
C96
330U_X_2VM_R6M
C643
330U_X_2VM_R6M
+
2
Near CPU Socket

VDDNB=4A
(For Tigris)
+CPU_CORE_0
VDDNB=3A
+CPU_CORE_1
+CPU_CORE_NB
1
C280
22U_0805_6.3V6M
C281
22U_0805_6.3V6M
C273
22U_0805_6.3V6M
C257
22U_0805_6.3V6M
C214
22U_0805_6.3V6M
C238
22U_0805_6.3V6M
+CPU_CORE_0
C227
22U_0805_6.3V6M
C215
22U_0805_6.3V6M
+1.8V
+CPU_CORE_1
VDDIO=3A
1
C253
0.22U_0603_16V4Z
C276
0.01U_0402_25V4Z
VDD1 =18A
JCPU1E
+CPU_CORE_0
+CPU_CORE_1
C290
180P_0402_50V8J
C244
0.22U_0603_16V4Z
C184
0.01U_0402_25V4Z
C230
180P_0402_50V8J
Under CPU Socket

2
G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11
VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23
K16
M16
P16
T16
V16
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
JCPU1F
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4
+CPU_CORE_1
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
+1.8V
6090022100G_B
Athlon 64 S1
Processor Socket
VDDIO decoupling.
conn@
+CPU_CORE_NB
decoupling.
+1.8V
+CPU_CORE_NB
1
C195
22U_0805_6.3V6M
C228
22U_0805_6.3V6M
C222
0.22U_0603_16V4Z
2
C294
0.22U_0603_16V4Z
2
C295
C274
180P_0402_50V8J 180P_0402_50V8J
2
2
C207
22U_0805_6.3V6M
C186
22U_0805_6.3V6M
C249
22U_0805_6.3V6M
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
6090022100G_B
Under CPU Socket
Athlon 64 S1
Processor Socket
conn@
Between CPU Socket and DIMM

3
+1.8V
+0.9V
C301
0.22U_0603_16V4Z
C302
0.22U_0603_16V4Z
C303
0.22U_0603_16V4Z
+1.8V
C309
0.01U_0402_25V4Z
C307
0.01U_0402_25V4Z
C107
C300
0.22U_0603_16V4Z
C218
180P_0402_50V8J
C308
180P_0402_50V8J
C310
180P_0402_50V8J
+0.9V
C219
1
180P_0402_50V8J C163
4.7U_0805_10V4Z
A: Add C165 and C176

to follow AMD Layout
review recommand for
EMI
+1.8V
C113
22U_0805_6.3V6M
C: Change to NBO CAP

1
220U_D2_4VM_R15
180PF Qt'y follow the distance between

CPU socket and DIMM0. <2.5inch>
Near Power Supply

1
+
+1.8V
VTT decoupling.
C164
4.7U_0805_10V4Z
C109
0.22U_0603_16V4Z
C110
0.22U_0603_16V4Z
C190
1000P_0402_25V8J
C191
1000P_0402_25V8J
C189
180P_0402_50V8J
C173
180P_0402_50V8J
Near CPU Socket Right side.

+0.9V
1
C211
4.7U_0805_10V4Z
1
C209
4.7U_0805_10V4Z
1
C208
4.7U_0805_10V4Z
C210
4.7U_0805_10V4Z
C: Change to NBO CAP
+ C226
330U_X_2VM_R6M
2
2
C387
4.7U_0805_10V4Z
C386
4.7U_0805_10V4Z
C383
0.22U_0603_16V4Z
C382
0.22U_0603_16V4Z
C718
1000P_0402_25V8J
C717
1000P_0402_25V8J
C716
180P_0402_50V8J
C715
180P_0402_50V8J
Near CPU Socket Left side.
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

E
of
57
+1.8V
+1.8V
JDIMM1
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQS2#
DDRA_SDQS2
5 DDRA_SDQS2#
5 DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDM3
DDRA_SDQ26
DDRA_SDQ27
DDRA_CKE0
DDRA_CKE0
DDRA_SBS2#
DDRA_SBS2#
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
5
5
DDRA_SBS0#
DDRA_SWE#
5
5
DDRA_SCAS#
DDRA_SCS1#
DDRA_ODT1
DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#
DDRA_SCAS#
DDRA_SCS1#
DDRA_ODT1
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQS4#
DDRA_SDQS4
5 DDRA_SDQS4#
5 DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQS6#
DDRA_SDQS6
5 DDRA_SDQS6#
5 DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
ICH_SMBDATA0
ICH_SMBCLK0
9,23,28,36 ICH_SMBDATA0
9,23,28,36 ICH_SMBCLK0
+3VS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
DDRA_SDQ[0..63]
DDRA_SDM0
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDM[0..7]
DDRA_SMA[0..15]
DDRA_SMA[0..15]
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDM1
+1.8V
+0.9V
DDRA_CLK0 5
DDRA_CLK0# 5
DDRA_SDQ14
DDRA_SDQ15
1
C182
1
C198
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C225
1
C223
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C159
1
C167
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
1
C179
1
C185
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
DDRA_SBS0#
DDRA_SMA10
DDRA_SMA1
DDRA_SMA3
47_0804_8P4R_5%
RP7
8
1
7
2
6
3
5
4
1
C169
1
C161
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
DDRA_SCS1#
DDRA_ODT1
DDRA_SWE#
DDRA_SCAS#
47_0804_8P4R_5%
RP4
8
1
7
2
6
3
5
4
1
C157
1
C142
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
DDRA_SMA13
DDRA_ODT0
DDRA_SCS0#
DDRA_SRAS#
47_0804_8P4R_5%
RP3
1
8
2
7
3
6
4
5
1
C145
1
C135
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
+1.8V
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
204
DDRA_SDQ20
DDRA_SDQ21
+V_DDR_MCH_REF
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ28
DDRA_SDQ29
2
DDRA_SDQS3# 5
DDRA_SDQS3 5
DDRA_SDQ30
DDRA_SDQ31
DDRA_CKE1
DDRA_CKE0
DDRA_SBS2#
DDRA_SMA14
DDRA_CKE1
R147
1K_0402_1%
DDRA_SDM2
DDRA_SDQS3#
DDRA_SDQS3
+V_DDR_MCH_REF
DDRA_SBS1#
DDRA_SMA0
DDRA_SMA2
DDRA_SMA4
R148
1K_0402_1%
DDRA_SMA5
DDRA_SMA8
DDRA_SMA9
DDRA_SMA12
DDRA_CKE1 5
DDRA_SMA15
DDRA_SMA14
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_SMA13
RP10
DDRA_SMA6
DDRA_SMA7
DDRA_SMA11
DDRA_SMA15
DDRA_SBS1# 5
DDRA_SRAS# 5
DDRA_SCS0# 5
DDRA_ODT0 5
1
2
3
4
8
7
6
5
47_0804_8P4R_5%
RP13
8
1
7
2
6
3
5
4
47_0804_8P4R_5%
RP8
1
8
2
7
3
6
4
5
47_0804_8P4R_5%
RP9
8
1
7
2
6
3
5
4
C63
47_0804_8P4R_5%
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDM4
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
DDRA_SDQS5# 5
DDRA_SDQS5 5
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DVT(EMI)
+1.8V
DDRA_CLK1 5
DDRA_CLK1# 5
DDRA_SDM6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
1
C174
2
0.1U_0402_16V4Z
1
C175
2
0.1U_0402_16V4Z
1
C176
2
0.1U_0402_16V4Z
DDRA_SDQS7# 5
DDRA_SDQS7 5
DDRA_SDQ62
DDRA_SDQ63
R39
R36
1
1
DIMM1 REV H:5.2mm (BOT)
0.1U_0402_16V4Z
2
2
2.2U_0805_10V6K
2 10K_0402_5%
2 10K_0402_5%
4
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
FOX_AS0A426-M2RN-7F
CONN@
+3VS
C67
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
203
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQS1#
DDRA_SDQS1
5 DDRA_SDQS1#
5 DDRA_SDQS1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDRA_SDQ8
DDRA_SDQ9
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
DDRA_SDQ2
DDRA_SDQ3
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
DDRA_SDQS0#
DDRA_SDQS0
5 DDRA_SDQS0#
5 DDRA_SDQS0
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
C394
1U_0402_6.3V4Z
DDRA_SDQ0
DDRA_SDQ1
C392
1000P_0402_25V8J
+V_DDR_MCH_REF
Rev
C
401679
Sheet

E
of
57
+V_DDR_MCH_REF
+1.8V
+1.8V
2.2U_0603_6.3V4Z
1
C390
DDRB_SDQ[0..63]
JDIMM2
DDRB_SDQ0
DDRB_SDQ1
5 DDRB_SDQS0#
5 DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ9
5 DDRB_SDQS1#
5 DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
5 DDRB_SDQS2#
5 DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26
DDRB_SDQ27
5
DDRB_CKE0
DDRB_SBS2#
DDRB_CKE0
DDRB_SBS2#
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
5
5
DDRB_SBS0#
DDRB_SWE#
5
5
DDRB_SCAS#
DDRB_SCS1#
DDRB_ODT1
DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#
DDRB_SCAS#
DDRB_SCS1#
DDRB_ODT1
DDRB_SDQ32
DDRB_SDQ33
5 DDRB_SDQS4#
5 DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
5 DDRB_SDQS6#
5 DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
4
ICH_SMBDATA0
ICH_SMBCLK0
+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
DDRB_SDM[0..7]
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDM0
DDRB_SMA[0..15]
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
5
5
DDRB_SMA[0..15]
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDM1
DDRB_CLK0 5
DDRB_CLK0# 5
DDRB_SDQ14
DDRB_SDQ15
1
2
3
4
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
2
C171
1
C201
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C180
1
C224
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C200
1
C231
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C183
1
C197
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C146
1
C170
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C122
1
C117
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C147
1
C118
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
RP12
1
2
3
4
8
7
6
5
47_0804_8P4R_5%
DDRB_SDQ28
DDRB_SDQ29
RP14
DDRB_CKE0
DDRB_SBS2#
DDRB_SMA15
DDRB_CKE1
DDRB_SDQS3# 5
DDRB_SDQS3 5
DDRB_SDQ30
DDRB_SDQ31
DDRB_CKE1
8
7
6
5
47_0804_8P4R_5%
DDRB_SMA6
DDRB_SMA7
DDRB_SMA11
DDRB_SMA14
DDRB_SDM2
DDRB_SDQS3#
DDRB_SDQS3
+1.8V
+0.9V
RP6
DDRB_SRAS#
DDRB_SMA0
DDRB_SMA2
DDRB_SMA4
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDRB_CKE1 5
RP11
DDRB_SMA8
DDRB_SMA5
DDRB_SMA12
DDRB_SMA9
DDRB_SMA15
DDRB_SMA14
DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
RP5
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_SBS0#
DDRB_SMA10
DDRB_SMA3
DDRB_SMA1
DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_SMA13
DDRB_SBS1# 5
DDRB_SRAS# 5
DDRB_SCS0# 5
8
7
6
5
47_0804_8P4R_5%
RP1
DDRB_ODT1
DDRB_SCS1#
DDRB_SWE#
DDRB_SCAS#
DDRB_ODT0 5
DDRB_SDQ36
DDRB_SDQ37
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDRB_SDM4
DDRB_SMA13
DDRB_ODT0
DDRB_SCS0#
DDRB_SBS1#
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5
1
2
3
4
RP2
1
2
3
4
8
7
6
5
47_0804_8P4R_5%
DDRB_SDQS5# 5
DDRB_SDQS5 5
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_CLK1 5
DDRB_CLK1# 5
DDRB_SDM6
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
DDRB_SDQS7# 5
DDRB_SDQS7 5
DDRB_SDQ62
DDRB_SDQ63
R37
R35
1
1
2 10K_0402_5%
2 10K_0402_5%
+3VS
4
FOX_AS0A426-MARG-7F
CONN@
DIMM2 REV H:9.2mm (BOT)
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

E
of
57
14 PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
36
36
34
34
33
33
PCIE_PTX_C_IRX_P2
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P3
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P4
PCIE_PTX_C_IRX_N4
27
27
27
27
27
27
27
27
PCIE_GTX_C_MRX_P[0..15]
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
U3B
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
AC8
AB8
PART 2 OF 6
PCIE I/F GFX
14 PCIE_GTX_C_MRX_P[0..15]
PCIE I/F GPP
PCIE I/F SB
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_N15
C646 1
C648 1
C650 1
C652 1
C655 1
C657 1
C659 1
C641 1
C636 1
C635 1
C632 1
C630 1
C627 1
C623 1
C624 1
C619 1
PCIE_MTX_GRX_N[0..3]
PCIE_MTX_C_GRX_P[0..15] 14
PCIE_MTX_GRX_P[0..3]
PCIE_MTX_C_GRX_N[0..15] 14
C647 1
2 VGA@ 0.1U_0402_16V7K
C649 1
2 VGA@ 0.1U_0402_16V7K
C651 1
2 VGA@ 0.1U_0402_16V7K
C653 1
2 VGA@ 0.1U_0402_16V7K
C654 1
VGA@
0.1U_0402_16V7K
2
C656 1
2 VGA@ 0.1U_0402_16V7K
C658 1
2 VGA@ 0.1U_0402_16V7K
C642 1
2 VGA@ 0.1U_0402_16V7K
C638 1
VGA@
0.1U_0402_16V7K
2
C637 1
2 VGA@ 0.1U_0402_16V7K
C634 1
2 VGA@ 0.1U_0402_16V7K
C631 1
2 VGA@ 0.1U_0402_16V7K
C629 1
2 VGA@ 0.1U_0402_16V7K
C625 1
2 VGA@ 0.1U_0402_16V7K
C620 1
2 VGA@ 0.1U_0402_16V7K
C621 1
VGA@
0.1U_0402_16V7K
2
2 VGA@ 0.1U_0402_16V7K PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P8
VGA@
0.1U_0402_16V7K
2
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
VGA@
0.1U_0402_16V7K
2
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15
New Card
2
PCIE_ITX_PRX_P2
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P3
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P4
PCIE_ITX_PRX_N4
SB_TX0P_C
SB_TX0N_C
SB_TX1P_C
SB_TX1N_C
SB_TX2P_C
SB_TX2N_C
SB_TX3P_C
SB_TX3N_C
C615
C609
C38
C33
C37
C32
C610
C616
R32 1
R267 1
C617 1
2
C618
1
2
C614 1
2
C613
1
2
C46 1
2
C42
1
2
@
@
MP
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_ITX_C_PRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P4
PCIE_ITX_C_PRX_N4
36
36
34
34
33
33
WLAN
GLAN
Card Reader
4 H_CADOP[0..15]
4 H_CADON[0..15]
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1.27K_0402_1%
2K_0402_1%
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
27
27
27
27
27
27
27
27
+1.1VS
GFX_TX0,TX1,TX2 and TX3

AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7
DP1
PCIE_MTX_GRX_P[0..3] 25
RS780M Display Port Support (muxed on GFX)
PCIE_MTX_GRX_N[0..3] 25
DVT
RS780M_FCBGA528
DP0
AUX1 and HPD1
4
4
4
4
H_CLKOP0
H_CLKON0
H_CLKOP1
H_CLKON1
4
4
4
4
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
1
H_CADIP[0..15]
H_CADIN[0..15]
Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
T22
T23
AB23
AA22
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
M22
M23
R21
R20
301_0402_1%~D
C23
A24
4
4
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
H24
H25
L21
L20
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
M24
M25
P19
R18
HT_RXCALP
HT_RXCALN
HT_TXCALP
HT_TXCALN
B24
B25
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
PART 1 OF 6
RS780M_FCBGA528
0718 Place within 1"

layout 1:2
4
H_CADIP[0..15]
H_CADIN[0..15]
U3A
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
R56
H_CADOP[0..15]
H_CADON[0..15]
HYPER TRANSPORT CPU I/F
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
H_CLKIP0
H_CLKIN0
H_CLKIP1
H_CLKIN1
4
4
4
4
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
4
4
4
4
R51
301_0402_1%~D
0718 Place within 1"

layout 1:2
4
SA00002DR30 S IC 216-0674026 A13 RS780MN FCBGA 0FA
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

E
10
of
57
For RS780M A13

RED: Connected to GND through two separate 140ohm 1% resistor
GMCH_CRT_R
2
140_0402_1%
GMCH_CRT_G
2
150_0402_1%
GMCH_CRT_B
2
150_0402_1%
UMA@ 1
R45
UMA@ 1
R49
UMA@ 1
R50
1
PVT
C875
1U_0402_6.3V4Z
GMCH_CRT_R
26 GMCH_CRT_R
VDDA18HTPLL=20mA
+1.8VS
L9
1
2
MBK2012221YZF 0805 1
C86
1U_0402_6.3V4Z
2
R283
1
300_0402_5%
23
23
H17
VDDA18HTPLL
+VDDA18PCIEPLL
D7
E7
VDDA18PCIEPLL1
VDDA18PCIEPLL2
D8
A10
C10
C12
SYSRESETb
POWERGOOD
LDTSTOPb
ALLOW_LDTSTOP
C25
C24
HT_REFCLKP
HT_REFCLKN
E11
F11
REFCLK_P/OSCIN(OSCIN)
REFCLK_N(PWM_GPIO3)
CLK_NBHT
CLK_NBHT#
CLK_NB_14.318M
23 CLK_NB_14.318M
+1.1VS
1
2
R290
4.7K_0402_5%
23 CLK_NBGFX
23 CLK_NBGFX#
R477
100_0402_5%
@
1
2
R293
4.7K_0402_5%
+3VS
1
C854
100P_0402_25V8K
@
R483
1.5K_0402_5%
@
24,26,38 PX_GPIO2
38 PX_GPIO2_NB
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_HDMI_DATA_R2
GMCH_HDMI_CLK_R2
GMCH_HDMI_CLK_R1
DVT GMCH_HDMI_DATA_R1
24 GMCH_LCD_CLK
24 GMCH_LCD_DATA
2
23 CLK_SBLINK_BCLK
23 CLK_SBLINK_BCLK#
DVT
@
1
2
R486 0_0402_5%
1
2
R490 0_0402_5%
@
@
2
1
R288
10K_0402_5%
POWER_SEL
+3VS
50 POWER_SEL
13
R295 1
R289 1
UMA@
GFX_REFCLKP
GFX_REFCLKN
U1
U2
GPP_REFCLKP
GPP_REFCLKN
V4
V3
GPPSB_REFCLKP(SB_REFCLKP)
GPPSB_REFCLKN(SB_REFCLKN)
I2C_CLK
I2C_DATA
DDC_DATA0/AUX0N(NC)
DDC_CLK0/AUX0P(NC)
DDC_CLK1/AUX1P(NC)
DDC_DATA1/AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL
HIGH
VDDLTP18(NC)
VSSLTP18(NC)
A13
B13
+VDDLTP18
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
A15
B15
A14
B14
+VDDLT18
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
C14
D15
C16
C18
C20
E20
C22
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
E9
F7
G12
1.1V
+VDDLTP18
1
C665
1U_0402_6.3V4Z
25 GMCH_HDMI_CLK
25 GMCH_HDMI_DATA
GMCH_HDMI_CLK
GMCH_HDMI_DATA
+1.8VS
1
C90
0.1U_0402_16V4Z
R469
1.27K_0402_1%
@
MIS.
UMA@
TMDS_HPD(NC)
HPD(NC)
D9
D10
SUS_STAT#(PWM_GPIO5)
D12
27 ALLOW_LDTSTOP
0_0402_5%
2
PUMA@
R60
300_0402_5%
PUMA@
R59
1
0_0402_5%
2
NB_ALLOW_LDTSTOP
THERMALDIODE_P
THERMALDIODE_N
AE8
AD8
TESTMODE
D13
UMA@
3
SUS_STAT# 28
SUS_STAT_R# 13
Strap pin
UMA@
R744
0_0402_5%
1
2
1
2
R279
1.8K_0402_5%
UMA_ENVDD
2
1
PVT
Y
UMA_ENBKL
NB_LDTSTOP#
PVT
Y
ENBKL
38
U49
@ NC7SZ08P5X_NL_SC70-5
Compal Secret Data

2009/10/06
Deciphered Date
Title
Date:
UMA_ENVDD_R 24
U48
@
NB_PWRGD
2GMCH_HDMI_DATA_R2
0_0402_5%
2008/10/06
SCHEMATIC A4921P
Custom
A
DVT2
C857 0.1U_0402_16V4Z
@
R488 UMA@ 0_0402_5%

1
2 GMCH_HDMI_CLK_R1
1
2 GMCH_HDMI_DATA_R1
R489 UMA@ 0_0402_5%
Issued Date
UMA_ENVDD
UMA_ENBKL 38
UMA_DPST 24
R61
1
6 CPU_LDT_REQ#
+1.8VS
C95
4.7U_0805_10V4Z
HDMI_DET 15,25
1
2
R297 0_0402_5%
0_0402_5%
2GMCH_HDMI_CLK_R2
0_0402_5%
1
2
R280
6,27 LDT_STOP#
L12
1
2
MBC1608121YZF_0603
+3VS
1
R492 @
Change as 1K_5% ohm

for Tigris
+1.8VS
C644
2.2U_0603_6.3V4Z
+VDDLT18
Un-stuff for Tigris
L56
1
2
1 MBC1608121YZF_0603
VDDLT18=0.3A
1.0V
LOW
VDDLTP18=15mA
GMCH_TXCLK+ 24
GMCH_TXCLK- 24
DVT
R491 @
1
DVT
UMA@
B16
A16
D16
D17
AUX_CAL(NC)
POWER_SEL
2 4.7K_0402_5% GMCH_LCD_CLK
2 4.7K_0402_5% GMCH_LCD_DATA
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
RS780M_FCBGA528
Strap pin
+3VS
T2
T1
B9
A9
B8
A8
B7
A7
B18
A18
A17
B17
D20
D21
D18
D19
DAC_RSET(PWM_GPIO1)
+VDDA18HTPLL
NB_RESET#
NB_PWRGD_R
NB_LDTSTOP#
NB_ALLOW_LDTSTOP
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3P(PCIE_RESET_GPIO5)
TXOUT_U3N(NC)
DAC_HSYNC(PWM_GPIO4)
DAC_VSYNC(PWM_GPIO6)
DAC_SCL(PCE_RCALRN)
DAC_SDA(PCE_TCALRN)
PLLVDD(NC)
PLLVDD18(NC)
PLLVSS(NC)
PVT
CLK_NB_14.318M
RED(DFT_GPIO0)
REDb(NC)
GREEN(DFT_GPIO1)
GREENb(NC)
BLUE(DFT_GPIO3)
BLUEb(NC)
A12
D14
B12
R296
0_0402_5%
1
2
1
2
R511 @
0_0402_5%
13,14,24,27,33,34,36,38 PLT_RST#
28 NB_PWRGD
+1.8VS
+NB_PLLVDD
+NB_HTPVDD
C87
2.2U_0603_6.3V4Z
NB_PWRGD
6,28,41 SB_PWRGD
28
1
G18
G17
E18
F18
E19
F19
2 715_0402_1% G14
+NB_PLLVDD
+NB_HTPVDD
+VDDA18PCIEPLL
L14
1
2
MBK2012221YZF 0805 1
R42
+1.8VS
U50
PVT
VDDA18PCIEPLL=0.12A
+1.8VS
C_Pr(DFT_GPIO5)
Y(DFT_GPIO2)
COMP_Pb(DFT_GPIO4)
GMCH_CRT_HSYNC A11
GMCH_CRT_VSYNC B11
GMCH_CRT_CLK
F8
GMCH_CRT_DATA E8
13,26 GMCH_CRT_HSYNC
13,26 GMCH_CRT_VSYNC
26 GMCH_CRT_CLK
26 GMCH_CRT_DATA
C72
1U_0402_6.3V4Z
C66
2.2U_0603_6.3V4Z
GMCH_CRT_B
26 GMCH_CRT_B
GMCH_CRT_G
26 GMCH_CRT_G
+VDDA18HTPLL
E17
F17
F15
24
24
24
24
24
24
GMCH_TXOUT0+
GMCH_TXOUT0GMCH_TXOUT1+
GMCH_TXOUT1GMCH_TXOUT2+
GMCH_TXOUT2-
C84
1U_0402_6.3V4Z
A22
B22
A21
B21
B20
A20
A19
B19
C61
2.2U_0603_6.3V4Z
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
PART 3 OF 6
C93
2.2U_0603_6.3V4Z
+AVDDQ
1
2
FBM-L11-201209-300LMA30T_0805
1
AVDD1(NC)
AVDD2(NC)
AVDDDI(NC)
AVSSDI(NC)
AVDDQ(NC)
AVSSQ(NC)
L13
1
2
MBK2012221YZF 0805 1
AVDDQ=4mA
L8
F12
E12
F14
G15
H15
H14
1 R29
2
1.27K_0402_1%
+NB_HTPVDD
U3C
1 R294
2
1.27K_0402_1%
+1.8VS
C74
0.1U_0402_16V4Z
+1.8VS
PLLVDD18=20mA
C94
2.2U_0603_6.3V4Z
1
2
FBM-L11-201209-300LMA30T_0805 1
C663
1U_0402_6.3V4Z
C874
1U_0402_6.3V4Z
2
+AVDD2
CRT/TVOUT
L10
PLL PWR
LVTM
C645
2.2U_0603_6.3V4Z
AVDDDI=20mA
+1.8VS
PM
L59
1
2
MBK2012221YZF 0805 1
PVT
L15
+AVDD1
1
2
FBM-L11-201209-300LMA30T_0805
1
+NB_PLLVDD
CLOCKs
+3VS
PLLVDD=65mA
+1.1VS
AVDD=0.11A
Rev
C
401679
Sheet

E
11
of
57
U3F
+1.8VS
C45
4.7U_0805_10V4Z
C47
2
0.1U_0402_16V4Z 0.1U_0402_16V4Z +VDDA18PCIE

1
1
C40
1
C51
1
C48
2
2
2
2
4.7U_0805_10V4Z 0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
VDD18=10mA
+1.8VS
C89
1U_0402_6.3V4Z
1
C73
J10
P10
K10
M10
L10
W9
H9
T10
R10
Y9
AA9
AB9
AD9
AE9
U10
F9
G9
AE11
AD11
VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15
VDD18_1
VDD18_2
VDD18_MEM1(NC)
VDD18_MEM2(NC)
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDD33_1(NC)
VDD33_2(NC)
DVT
1
+
2
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
RS780M_FCBGA528
AE10
AA11
Y11
AD10
AB10
AC10
VDD33=60mA
H11
H12
+3VS
RS780M_FCBGA528
+NB_CORE
330U_D2E_2.5VM
2
1
FBMA-L11-201209-221LMA30T_0805
1
1
L6
1
L7
+1.1VS
C27
FOR Version A11 pop 1.35VS A12

use 1.2V_HT
VDDA18PCIE=0.7A
L5
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
PART 6/6
C80
0.1U_0402_16V4Z
1
C78
U3D
0.1U_0402_16V4Z
2
3
PAR 4 OF 6
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
AD16
AE17
AD17
MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)
W12
Y12
AD18
AB13
AB18
V14
MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)
V15
W14
MEM_CKP(NC)
MEM_CKN(NC)
AE12
AD12
SBD_MEM/DVO_I/F
2
2
2
2
2
4.7U_0805_10V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
C44
1
C52
C36
1
C54
10U_0805_10V4Z
1
C50
VGA@
2
0_1206_5%
2
0_1206_5%
VGA@
C68
1
C49
VDDC=7.6A
10U_0805_10V4Z
1
C31
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13
2
2 0.1U_0402_16V4Z
0.1U_0402_16V4Z
C88
C57
C81
FBMA-L11-201209-221LMA30T_0805
AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17
2 1U_0402_6.3V4Z
2 1U_0402_6.3V4Z
1
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z +VDDHTTX
2 4.7U_0805_10V4Z
1
1
C64
C53
C79
0.1U_0402_16V4Z
VDDHTTX=0.68A
L4
+1.2V_HT
VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
C29
C76
2
2
2
2
4.7U_0805_10V4Z 0.1U_0402_16V4Z
H18
G19
F20
E21
D22
B23
A23
2 10U_0805_10V4Z
2 10U_0805_10V4Z
0.1U_0402_16V4Z
C91
1
1
C43
C85
+1.1VS
C30
C28
0.1U_0402_16V4Z
C82
+VDDA11PCIE
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
C69
C83
PART 5/6
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
0.1U_0402_16V4Z
VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7
C34
+VDDHTRX
J17
K16
L16
M16
P16
R16
T16
C60
1U_0402_6.3V4Z
0.1U_0402_16V4Z
FBMA-L11-201209-221LMA30T_0805
VDDPCIE=1.1A
U3E
2
2
2
0.1U_0402_16V4Z
L11
L3
1
2
FBMA-L11-201209-221LMA30T_0805
C62
0.1U_0402_16V4Z
2
4.7U_0805_10V4Z
1
C71
C35
1
C75
0.1U_0402_16V4Z
C612
+VDDHT
0.1U_0402_16V4Z
FBMA-L11-201209-221LMA30T_0805
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
POWER
L49
2
+1.1VS
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
GROUND
VDDHTRX+VDDHT=0.68A
1
A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
MEM_COMPP(NC)
MEM_COMPN(NC)
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
Y17
W18
AD20
AE21
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
W17
AE19
IOPLLVDD18(NC)
IOPLLVDD(NC)
AE23
AE24
IOPLLVSS(NC)
AD23
MEM_VREF(NC)
AE18
15mA
+1.8VS
+1.1VS
26mA
RS780M_FCBGA528
+1.8VS=W/S=20/10mil For Memory PLL power

+1.1VS=W/S=20/10mil For Memory PLL power
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

E
12
of
57
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
2
R286
2
R287 @
1
1
3K_0402_5%
1
3K_0402_5%
Enables the Test Debug Bus using GPIO. (VSYNC)

1 : Disable (RS780)
0 : Enable (Rs780)
+3VS
DFT_GPIO1: LOAD_EEPROM_STRAPS
1
2
@R284
@
R284
150_0402_1%
D29
@ CH751H-40_SC76
2
1
11 AUX_CAL
RS780 DFT_GPIO1
11 SUS_STAT_R#
Selects Loading of STRAPS from EPROM

1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
default values if not connected
RS740/RX780: DFT_GPIO1 RS780:SUS_STAT
PLT_RST# 11,14,24,27,33,34,36,38
RS780 use HSYNC to enable SIDE PORT

RS780 use HSYNC to enable SIDE PORT
2
R281
@
2
R282
1
3K_0402_5%
1
3K_0402_5%
+3VS
RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)

0.
Enable (RS780)
1 : Disable(RS780)
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

E
13
of
57
10 PCIE_GTX_C_MRX_P[0..15]
10 PCIE_GTX_C_MRX_N[0..15]
10 PCIE_MTX_C_GRX_P[0..15]
10 PCIE_MTX_C_GRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE LANE REVERSAL

PCIE_MTX_C_GRX_P15 AA38
PCIE_MTX_C_GRX_N15
Y37
PCIE_RX0P
PCIE_RX0N
PCIE_TX0P
PCIE_TX0N
Y33
Y32
PCIE_GTX_MRX_P15
PCIE_GTX_MRX_N15
C172 1
C181
2
1
VGA@
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
Y35
W36
PCIE_RX1P
PCIE_RX1N
PCIE_TX1P
PCIE_TX1N
W33
W32
PCIE_GTX_MRX_P14
PCIE_GTX_MRX_N14
C160 1
C162
2
1
VGA@
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
W38
V37
PCIE_RX2P
PCIE_RX2N
PCIE_TX2P
PCIE_TX2N
U33
U32
PCIE_GTX_MRX_P13
PCIE_GTX_MRX_N13
C139 1
C143
2
1
VGA@
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
V35
U36
PCIE_RX3P
PCIE_RX3N
PCIE_TX3P
PCIE_TX3N
U30
U29
PCIE_GTX_MRX_P12
PCIE_GTX_MRX_N12
C141 1
C148
2
1
VGA@
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
U38
T37
PCIE_RX4P
PCIE_RX4N
PCIE_TX4P
PCIE_TX4N
T33
T32
PCIE_GTX_MRX_P11
PCIE_GTX_MRX_N11
C134 1
C138
2
1
VGA@
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
T35
R36
PCIE_RX5P
PCIE_RX5N
PCIE_TX5P
PCIE_TX5N
T30
T29
PCIE_GTX_MRX_P10
PCIE_GTX_MRX_N10
C128 1
C137
2
1
VGA@
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
R38
P37
PCIE_RX6P
PCIE_RX6N
PCIE_TX6P
PCIE_TX6N
P33
P32
PCIE_GTX_MRX_P9
PCIE_GTX_MRX_N9
C126 1
C133
2
1
VGA@
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
P35
N36
PCIE_RX7P
PCIE_RX7N
PCIE_TX7P
PCIE_TX7N
P30
P29
PCIE_GTX_MRX_P8
PCIE_GTX_MRX_N8
C156 1
C158
2
1
VGA@
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
N38
M37
PCIE_RX8P
PCIE_RX8N
PCIE_TX8P
PCIE_TX8N
N33
N32
PCIE_GTX_MRX_P7
PCIE_GTX_MRX_N7
C136 1
C127
2
1
VGA@
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
M35
L36
PCIE_RX9P
PCIE_RX9N
PCIE_TX9P
PCIE_TX9N
N30
N29
PCIE_GTX_MRX_P6
PCIE_GTX_MRX_N6
C144 1
C140
2
1
VGA@
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
L38
K37
PCIE_RX10P
PCIE_RX10N
PCIE_TX10P
PCIE_TX10N
L33
L32
PCIE_GTX_MRX_P5
PCIE_GTX_MRX_N5
C116 1
C114
2
1
VGA@
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
K35
J36
PCIE_RX11P
PCIE_RX11N
PCIE_TX11P
PCIE_TX11N
L30
L29
PCIE_GTX_MRX_P4
PCIE_GTX_MRX_N4
C154 1
C155
2
1
VGA@
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
J38
H37
PCIE_RX12P
PCIE_RX12N
PCIE_TX12P
PCIE_TX12N
K33
K32
PCIE_GTX_MRX_P3
PCIE_GTX_MRX_N3
C129 1
C130
2
1
VGA@
PCI EXPRESS INTERFACE
PCIE LANE REVERSAL
U4A
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
H35
G36
PCIE_RX13P
PCIE_RX13N
PCIE_TX13P
PCIE_TX13N
J33
J32
PCIE_GTX_MRX_P2
PCIE_GTX_MRX_N2
C120 1
C115
2
1
VGA@
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
G38
F37
PCIE_RX14P
PCIE_RX14N
PCIE_TX14P
PCIE_TX14N
K30
K29
PCIE_GTX_MRX_P1
PCIE_GTX_MRX_N1
C152 1
C153
2
1
VGA@
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
F35
E37
PCIE_RX15P
PCIE_RX15N
PCIE_TX15P
PCIE_TX15N
H33
H32
PCIE_GTX_MRX_P0
PCIE_GTX_MRX_N0
C131 1
C132
2
1
VGA@
2
VGA@
2
VGA@
2
VGA@
2
VGA@
2
VGA@
2
VGA@
2
VGA@
2
VGA@
2
VGA@
2
VGA@
2
VGA@
2
VGA@
2
VGA@
2
VGA@
2
VGA@
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
VGA@
CLOCK
CLK_PCIE_VGA
CLK_PCIE_VGA#
23 CLK_PCIE_VGA
23 CLK_PCIE_VGA#
AB35
AA36
PCIE_REFCLKP
PCIE_REFCLKN
AJ21
AK21
AH16
NC#1
NC#2
NC_PWRGOOD
VGA@
CALIBRATION
+3VS_DELAY
GPU_RST#
1
A
27
PX_GPIO0
2
R481 @
PCIE_CALRN
Y29
R90
2 1.27K_0402_1%
2
2K_0402_1%
+1.1VS_PX
VGA@
PERSTB
M92@
216-0729002 A12 M96_BGA962
GPU_RST#
Compal Secret Data
2008/10/06
Issued Date
1
R83
PLT_RST#
Y30
R474
10K_0402_5%
VGA@
D4
11,13,24,27,33,34,36,38
AA30
PCIE_CALRP
CHP202UPT_SOT323-3
Deciphered Date
2009/10/06
Title
Date:
SCHEMATIC A4921P
Custom
VGA@
2.2K_0402_5%
4
Rev
C
401679
Sheet
1
14
of
57
U4B
MUTI GFX
DPA
T64
T45
T27
T51
T55
T65
T66
T30
T60
T29
T61
T56
T63
T57
T62
T58
T50
T28
T46
T59
T52
T53
T47
T48
T49
T54
+3VS_DELAY
R92
R88
VGA_LCD_CLK
2
4.7K_0402_5%
1
1
VGA@
VGA_LCD_DATA
2
4.7K_0402_5%
VGA@
R97
VGA_PWRSEL
1
10K_0402_5%
22
22
22
22
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
VRAM_ID0
VRAM_ID1
VRAM_ID2
VRAM_ID3
AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12
DVPCNTL_MVP_0
DVPCNTL_MVP_1
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
DPB
DPC
DPD
I2C
24 VGA_LCD_CLK
24 VGA_LCD_DATA
GPIO_5_AC_BATT
AC (Performance mode) = 3.3 V
Battery saving mode = 0.0 V
VGA_PWRSEL
High:VGA_CORE 0.95V
Low :VGA_CORE 1.2V
+3VS_DELAY
R104
10K_0402_5%
@
2
ACIN
GPIO23_CLKREQB
23
27M_SSC
19
27M_SSC_R
27M_SSC
@
27M_SSC_R
@
22
22
22
38
22
22
22
22
22
GPIO_5_AC_BATT#
R101 1
VGA_ENBKL
GPU_GPIO8
GPU_GPIO9
GPU_GPIO8
GPU_GPIO9
2 10K_0402_5%
VGA@
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
VGA_PWRSEL
27M_SSC_M92
54 VGA_PWRSEL
1
2
R334
0_0402_5%
1
2
R335
0_0402_5%
22
THM_ALERT#
@
1 R100
2 10K_0402_5% GPU_CTF
BB_EN
R334 & R335 be place close
+3VS_DELAY
CTF (High active)
GPIO23_CLKREQB
GPIO24_TRSTB
T16 PAD
T17 PAD
T14 PAD
T12 PAD
T23 PAD
T22 PAD
T20 PAD
T19 PAD
R98
10K_0402_5%
@
BB_EN
SCL
SDA
AH20
AH18
AN16
AH23
AJ23
AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17
AL13
AJ14
AK13
AN13
AM23
AN23
AK23
AL24
AM24
AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24
GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
GENERICF
GENERICG
Back bias (BB) control

Back Bias Disabled :
GPIO_21_BB_EN = 0V
BBP connect directly to VDDC
T13 PAD
T15 PAD
+1.8VS_PX
AK24
HDMI_DET
DAC1
+3VS_DELAY
HPD1
AU26
AV25
HDMI_TX1+_VGA 25
HDMI_TX1-_VGA 25
TX2P_DPA0P
TX2M_DPA0N
AT27
AR26
HDMI_TX2+_VGA 25
HDMI_TX2-_VGA 25
AH13
DDC/AUX
AM32
AN32
DPLL_PVDD
DPLL_PVSS
Internal 2% downspread (disable)

+DPLL_VDDC
AN31
DPLL_VDDC
R306
1
27MCLK
AV33
AU34
XTALIN
XTALOUT
VGA@
DPLL_PVDD=0.12A
L66
MCK1608471YZF 0603
1
C688
VGA@
10U_0603_6.3V6M
VGA@
2
VGA@
100_0402_5%
75 ohm
1
C689
VGA@
Voltage Swing: 1.8 V
R305
+DPLL_PVDD
1U_0402_6.3V4Z
+1.8VS_PX
61.9 ohm
75_0402_1%
2
C690
0.1U_0402_16V7K
VGA@
TSVDD=20mA
L65
+1.1VS_PX
DPLL_VDDC=0.3A
L24
2
1U_0402_6.3V4Z
MCK1608471YZF 0603
1
C254
VGA@
10U_0603_6.3V6M
VGA@
2
C256
VGA@
+DPLL_VDDC
1
AF29
AG29
22 GPU_THERMAL_D+
22 GPU_THERMAL_D-
+1.8VS_PX
1U_0402_6.3V4Z
BLM18PG121SN1D_0603
VGA@
C685
VGA@
2
10U_0805_10V4Z
C255
0.1U_0402_16V7K
VGA@
C687
VGA@
VARY_BL
DIGON
AK27
AJ27
T7
PAD
+TSVDD
AK32
AJ32
AJ33
DPLUS
DMINUS
THERMAL
TS_FDO
TSVDD
TSVSS
24
AR30
AT29
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
AK35
AL36
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
AJ38
AK37
TX4P_DPB1P
TX4M_DPB1N
AR32
AT31
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
AH35
AJ36
TX5P_DPB0P
TX5M_DPB0N
AT33
AU32
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
AG38
AH37
TXCCP_DPC3P
TXCCM_DPC3N
AU14
AV13
TXOUT_U3P
TXOUT_U3N
AF35
AG36
TX0P_DPC2P
TX0M_DPC2N
AT15
AR14
TX1P_DPC1P
TX1M_DPC1N
AU16
AV15
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
AP34
AR34
VGA_TXCLK+ 24
VGA_TXCLK- 24
TX2P_DPC0P
TX2M_DPC0N
AT17
AR16
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
AW37
AU35
VGA_TXOUT0+ 24
VGA_TXOUT0- 24
TXCDP_DPD3P
TXCDM_DPD3N
AU20
AT19
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
AR37
AU39
VGA_TXOUT1+ 24
VGA_TXOUT1- 24
TX3P_DPD2P
TX3M_DPD2N
AT21
AR20
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
AP35
AR35
VGA_TXOUT2+ 24
VGA_TXOUT2- 24
TX4P_DPD1P
TX4M_DPD1N
AU22
AV21
TXOUT_L3P
TXOUT_L3N
AN36
AP37
TX5P_DPD0P
TX5M_DPD0N
AT23
AR22
R
RB
AD39
AD37
VGA_CRT_R 26
G
GB
AE36
AD35
VGA_CRT_G 26
VGA_CRT_B 26
LVTMDP
VGA_CRT_R
1 VGA@ 2
R303
150_0402_1%
1 VGA@ 2
R302
150_0402_1%
VGA_CRT_B
1 VGA@ 2
R301
150_0402_1%
VGA_CRT_G
B
BB
AF37
AE38
HSYNC
VSYNC
AC36
AC38
VGA_CRT_HSYNC
VGA_CRT_VSYNC
RSET
AVDD
AVSSQ
AD34
AE34
+AVDD
VDD1DI
VSS1DI
AC33
AC34
+VDD1DI
AC30
AC31
G2
G2B
AD30
AD31
B2
B2B
AF30
AF31
22,26
22,26
VGA@
1 R80
2
499_0402_1%
AB34
R2
R2B
M92@
+1.8VS_PX
+AVDD
AVDD=70mA
L61
2
1
BLM18PG121SN1D_0603
1U_0402_6.3V4Z
1
C680
VGA@
C
Y
COMP
AC32
AD32
AF32
H2SYNC
V2SYNC
AD29
AC29
C684
VGA@
VGA@
2
0.1U_0402_16V7K
1U_0402_6.3V4Z
1
C676
VGA@
C681
VGA@
VGA@
2
0.1U_0402_16V7K
L63
2
1
BLM18PG121SN1D_0603
AG31
AG32
A2VDD
AG33
A2VDDQ
AD33
A2VSSQ
AF33
R2SET
AA29
22
22
1U_0402_6.3V4Z
1
C682
VGA@
+VDD1DI
2
+3VS_DELAY
C673
10U_0805_10V4Z
VGA@
+A2VDDQ
A2VDDQ=1mA
HSYNC_DAC2
VSYNC_DAC2
C671
10U_0805_10V4Z
VGA@
+VDD1DI
VDD1DI=45mA
L62
2
1
BLM18PG121SN1D_0603
C677
VGA@
2
0.1U_0402_16V7K
VGA@
C672
10U_0805_10V4Z
VGA@
+A2VDDQ
1 R86
C686
VGA@
DDC1CLK
DDC1DATA
AM26
AN26
AUX1P
AUX1N
AM27
AL27
DDC2CLK
DDC2DATA
AM19
AL19
AUX2P
AUX2N
AN20
AM20
DDCCLK_AUX3P
DDCDATA_AUX3N
AL30
AM30
DDCCLK_AUX4P
DDCDATA_AUX4N
AL29
AM29
DDCCLK_AUX5P
DDCDATA_AUX5N
AN21
AM21
DDC6CLK
DDC6DATA
AJ30
AJ31
NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N
AK30
AK29
VGA@
VGA_CRT_CLK 26
VGA_CRT_DATA 26
VGA_HDMI_SCLK 25
VGA_HDMI_SDATA 25
2
0.1U_0402_16V7K
216-0729002 A12 M96_BGA962
Compal Secret Data
M92@
Issued Date
2008/10/06
Deciphered Date
2009/10/06
Title
Date:
VGA_ENVDD
AV31
AU30
Size
C
5
T11 PAD
715_0402_1%
PLL/CLOCK
27M_NSSC
LVDS CONTROL
TX3P_DPB2P
TX3M_DPB2N
VREFG
C354
0.1U_0402_16V7K
VGA@
+DPLL_PVDD
19,23
U4G
TXCBP_DPB3P
TXCBM_DPB3N
VDD2DI
VSS2DI
@
R96
1K_0402_5%
R107
249_0402_1%
VGA@
GPIO24_TRSTB
TX1P_DPA1P
TX1M_DPA1N
+VGA_VREF
R95
10K_0402_5%
@
HDMI_TX0+_VGA 25
HDMI_TX0-_VGA 25
DAC2
R110
499_0402_1%
VGA@
HDMI_CLK+_VGA 25
HDMI_CLK-_VGA 25
TX0P_DPA2P
TX0M_DPA2N
11,25
AU24
AV23
AT25
AR24
216-0729002 A12 M96_BGA962
GENERAL PURPOSE I/O

GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
1
2
R99
VGA@ 100K_0402_5%
1
2
D13 VGA@
RB751V_SOD323
+3VS_DELAY
29,38,40,46,49
AK26
AJ26
TXCAP_DPA3P
TXCAM_DPA3N
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet

1
15
of
57
MAA[12..0]
MAA[12..0] 20,21
BA[2..0]
21
MDA[63..32]
20
MDA[31..0]
BA[2..0]
20,21
MDA[63..32]
MDA[31..0]
+3VS_DELAY
B
+VDD_MEM18_REFD Y12
+VDD_MEM18_REFS AA12
R87
5.11K_0402_1%
@
TESTEN
MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_12
MAB_13/BA2
MAB_14/BA0
MAB_15/BA1
P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
BA2
BA0
BA1
DQMB_0
DQMB_1
DQMB_2
DQMB_3
DQMB_4
DQMB_5
DQMB_6
DQMB_7
H3
H1
T3
T5
AE4
AF5
AK6
AK5
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
QSB_0/RDQSB_0
QSB_1/RDQSB_1
QSB_2/RDQSB_2
QSB_3/RDQSB_3
QSB_4/RDQSB_4
QSB_5/RDQSB_5
QSB_6/RDQSB_6
QSB_7/RDQSB_7
F6
K3
P3
V5
AB5
AH1
AJ9
AM5
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
QSB_0B/WDQSB_0
QSB_1B/WDQSB_1
QSB_2B/WDQSB_2
QSB_3B/WDQSB_3
QSB_4B/WDQSB_4
QSB_5B/WDQSB_5
QSB_6B/WDQSB_6
QSB_7B/WDQSB_7
G7
K1
P1
W4
AC4
AH3
AJ8
AM3
QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7
T7
W7
ODTA0
ODTA1
CLKB0
CLKB0B
L9
L8
CLKA0
CLKA0#
CLKB1
CLKB1B
AD8
AD7
CLKA1
CLKA1#
RASB0B
RASB1B
T10
Y10
RASA#0
RASA#1
CASB0B
CASB1B
W10
AA10
CASA#0
CASA#1
CSB0B_0
CSB0B_1
P10
L10
CSA0#
CSB1B_0
CSB1B_1
AD10
AC10
CSA1#
CKEB0
CKEB1
U10
AA11
CKEA0
CKEA1
WEB0B
WEB1B
N10
AB11
WEA#0
WEA#1
ODTB0
ODTB1
MVREFDB
MVREFSB
AD28
TESTEN
AK10
AL10
CLKTESTA
CLKTESTB
DRAM_RST
DQMA#[7..0] 20,21
QSA[7..0] 20,21
QSA#[7..0] 20,21
ODTA0
ODTA1
20
21
CLKA0
CLKA0#
20
20
CLKA1
CLKA1#
21
21
RASA#0
RASA#1
20
21
CASA#0
CASA#1
20
21
CSA0#
20
CSA1#
21
CKEA0
CKEA1
20
21
WEA#0
WEA#1
20
21
+1.8VS_PX
L18
L20
AH11
QSA_0/RDQSA_0
QSA_1/RDQSA_1
QSA_2/RDQSA_2
QSA_3/RDQSA_3
QSA_4/RDQSA_4
QSA_5/RDQSA_5
QSA_6/RDQSA_6
QSA_7/RDQSA_7
C34
D29
D25
E20
E16
E12
J10
D7
QSA_0B/WDQSA_0
QSA_1B/WDQSA_1
QSA_2B/WDQSA_2
QSA_3B/WDQSA_3
QSA_4B/WDQSA_4
QSA_5B/WDQSA_5
QSA_6B/WDQSA_6
QSA_7B/WDQSA_7
A34
E30
E26
C20
C16
C12
J11
F8
ODTA0
ODTA1
J21
G19
CLKA0
CLKA0B
H27
G27
CLKA1
CLKA1B
J14
H14
RASA0B
RASA1B
K23
K19
CASA0B
CASA1B
K20
K17
CSA0B_0
CSA0B_1
K24
K27
CSA1B_0
CSA1B_1
M13
K16
MVREFDA
MVREFSA
CKEA0
CKEA1
L27
N12
AG12
NC_MEM_CALRN0
NC_MEM_CALRN1
NC_MEM_CALRN2
WEA0B
WEA1B
K26
L15
243_0402_1% 1 R106
243_0402_1% 1 R93
243_0402_1% 1 R122
2
2 @
2 @
M12
M27
AH12
MEM_CALRP1
NC_MEM_CALRP0
NC_MEM_CALRP2
RSVD#1
RSVD#2
RSVD#3
AF28
AG28
AL31
RSVD#5
RSVD#6
H23
J19
RSVD#9
RSVD#11
T8
W8
PAD T10
PAD T9
PAD T8
216-0729002 A12 M96_BGA962

M92@
Close to pin AA12
M92-S2 and M92-M use memory group A only

while M92-M2 uses memory group B only.
C388
0.1U_0402_16V4Z
VGA@
+VDD_MEM18_REFS
R127
100_0402_1%
VGA@
2
2
A32
C32
D23
E22
C14
A14
E10
D9
VGA@
2
2
DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6
DQMA_7
2 @
2 @
2 @
R138
100_0402_1%
+VDD_MEM18_REFD
VGA@
G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17
+1.8VS_PX
Close to pin Y12
R139
100_0402_1%
R131
100_0402_1%
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13/BA2
MAA_14/BA0
MAA_15/BA1
243_0402_1% 1 R94
243_0402_1% 1 R105
243_0402_1% 1 R108
R109
4.7K_0402_5%
VGA@
216-0729002 A12 M96_BGA962
+1.8VS_PX
VGA@
DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63
K21
J20
M92@
C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5
1
2
R111
4.7K_0402_5%
VGA@
MP
R91
1K_0402_1%
VGA@
DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63
MEMORY INTERFACE A
C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5
MEMORY INTERFACE B
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
U4C
U4D
C381
0.1U_0402_16V4Z
VGA@
Issued Date
Compal Secret Data
2008/10/06
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

1
16
of
57
U4H
DP C/D POWER
+1.1VS_PX
AP20
AP21
NC_DPC_VDD18#1
NC_DPC_VDD18#2
DP A/B POWER
NC_DPA_VDD18#1
NC_DPA_VDD18#2
AN24
AP24
DPA_VDD10: Transmitter Power 1.1V +/-3%

+1.1VS_PX
DPA_VDD10=0.2A
AP13
AT13
DPC_VDD10#1
DPC_VDD10#2
DPA_VDD10#1
DPA_VDD10#2
AN17
AP16
AP17
AW14
AW16
DPC_VSSR#1
DPC_VSSR#2
DPC_VSSR#3
DPC_VSSR#4
DPC_VSSR#5
DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5
AP22
AP23
NC_DPD_VDD18#1
NC_DPD_VDD18#2
AP14
AP15
AN19
AP18
AP19
AW20
AW22
+DPA_VDD10 1U_0402_6.3V4Z
AP31
AP32
1
1
10U_0603_6.3V6M
C241
C235
AN27
AP27
2
2
AP28
AW24
AW26
VGA@ VGA@
NC_DPB_VDD18#1
NC_DPB_VDD18#2
AP25
AP26
DPD_VDD10#1
DPD_VDD10#2
DPB_VDD10#1
DPB_VDD10#2
AN33
AP33
DPD_VSSR#1
DPD_VSSR#2
DPD_VSSR#3
DPD_VSSR#4
DPD_VSSR#5
DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5
AN29
AP29
AP30
AW30
AW32
R316
150_0402_1%
1
2 AW18
DPCD_CALR
DPAB_CALR
AW28
DP PLL POWER
DPA_PVDD
DPA_PVSS
AU28
AV27
VGA@
AH34
AJ34
10U_0805_10V4Z
VGA@
VGA@
+DPE_VDD10
AL33
AM33
DPE_VDD10#1
DPE_VDD10#2
DPB_PVDD
DPB_PVSS
AV29
AR28
AN34
AP39
AR39
AU37
AW35
DPE_VSSR#1
DPE_VSSR#2
DPE_VSSR#3
DPE_VSSR#4
DPE_VSSR#5
DPC_PVDD
DPC_PVSS
AU18
AV17
DPD_PVDD
DPD_PVSS
AV19
AR18
DPE_PVDD
DPE_PVSS
AM37
AN38
+DPE_VDD18
L20
DPE_VDD10=0.27A
1U_0402_6.3V4Z
2
1
BLM18PG121SN1D_0603
VGA@
1
1
C192
C188
10U_0805_10V4Z
VGA@
VGA@
+DPE_VDD10
+DPE_VDD10
1
R308
150_0402_1%
1
2
DPA_PVDD: DP PLL Power 1.8V +/-3%
DPA_PVDD=20mA
+DPA_PVDD
C150
2 VGA@
0.1U_0402_16V7K
AF34
AG34
DPE_VDD10: Output Driver Analog Power Supply.

+1.1VS_PX
VGA@
+1.8VS_PX
+DPE_VDD18
1
0.1U_0402_16V7K
+DPA_PVDD
DPE_VDD18=0.31A
L17
1U_0402_6.3V4Z
2
1
BLM18PG121SN1D_0603
VGA@
1
1
C149
C151
BLM18PG121SN1D_0603
VGA@
VGA@
DP E/F POWER
DPE_VDD18#1
DPE_VDD18#2
+DPE_VDD18
DPE_VDD18: Output Driver Analog Power Supply.

+1.8VS_PX
C234
+1.1VS_PX
+1.1VS_PX
2
1
L23
AK33
AK34
DPF_VDD18#1
DPF_VDD18#2
VGA@
2 0.1U_0402_16V7K
R304
150_0402_1%
1
2
VGA@
AM39
C695
2
VGA@
2
VGA@
NC_DPF_PVDD
NC_DPF_PVSS
AL38
AM35
+1.8VS_PX
L68
2
1
BLM18PG121SN1D_0603
VGA@
C694
0.1U_0402_16V7K
VGA@
+DPE_PVDD
DPE_PVDD: DP PLL Power 1.8V +/-3%
DPE_PVDD=20mA
DPF_VDD10#1
DPF_VDD10#2
C187
AF39
AH39
AK39
AL34
AM34
C696
10U_0603_6.3V6M
1U_0402_6.3V4Z
1
1
1
+DPE_PVDD
+DPE_PVDD
1
C165
10U_0603_6.3V6M
DPF_VSSR#1
DPF_VSSR#2
DPF_VSSR#3
DPF_VSSR#4
DPF_VSSR#5
VGA@
1U_0402_6.3V4Z
1
1
C168
2
VGA@
+1.8VS_PX
L18
2
1
BLM18PG121SN1D_0603
VGA@
C166
0.1U_0402_16V7K
VGA@
DPEF_CALR
216-0729002 A12 M96_BGA962
M92@
Compal Secret Data
2008/10/06
Issued Date
Deciphered Date
2009/10/06
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet
1
17
of
57
U4E
+1.8VS_PX
+PCIE_VDDR_M92
+1.8VS_PX
MEM I/O
PCIE
VDDR1+VDDRHA+VDDRHB=TBD(2.9A/M96)
1
C331
1
C239
1
C314
1
C376
1
C389
1
+
C355
2
330U_V_2.5VM_R9M
VGA@
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
1
C339
1
C373
1
C370
1
C357
1
C361
1
C371
1
C326
1
C283
1
C338
1
C342
VGA@
VGA@
VGA@
VGA@
VGA@
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
1
C378
1
C363
1
C362
1
C369
1
C426
1
C372
1
C293
1
C282
1
C292
1
C350
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VDD_CT:Level translation between core and I/O

+1.8VS_PX
VGA@
2
L69
VDDR3:ROM+Sync+DDC
+3VS_DELAY
VDDR5 for DVPDATA[0..11]
C364
VGA@
1
10U_0603_6.3V6M
C366
VGA@
1
C266
1
C259
1
C258
1
C260
C365
VGA@
0.1U_0402_16V7K
+1.8VS_PX
VDDR4=0.17A
L34 BLM18PG121SN1D_0603
+VDDR4
1U_0402_6.3V4Z
2
1
VGA@
2
2
2
C377
VGA@
1
10U_0603_6.3V6M
C374
VGA@
2
10U_0603_6.3V6M
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4
I/O
VDDR3=50mA
+1.8VS_PX
VDDR5=0.17A
L32 BLM18PG121SN1D_0603
+VDDR5
1U_0402_6.3V4Z
2
1
VGA@
2
2
2
AF26
AF27
AG26
AG27
VGA@
VGA@
VGA@
VGA@
+VDDR5
AF23
AF24
AG23
AG24
VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4
AF13
AF15
AG13
AG15
VDDR5#1
VDDR5#2
VDDR5#3
VDDR5#4
AD12
AF11
AF12
AG11
VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#4
VDDRHA:MCLK PAD Power

+1.8VS_PX
+VDDR4
VDDRHA=20mA
VDDRHA for M96 ONLY
C375
VGA@
L26 @ BLM18PG121SN1D_0603
+VDDARHA
2
1
1
2
C304 @
1U_0402_6.3V4Z
0.1U_0402_16V7K
+1.8VS_PX
MEM CLK
VDDRHB=20mA
VGA@
L33
BLM18PG121SN1D_0603
+VDDARHB
2
1
1
2
C349
1U_0402_6.3V4Z
VGA@
VDDR4 for DVPDATA[12..23]

B
M20
M21
VDDRHA
VSSRHA
V12
U12
VDDRHB
VSSRHB
VDDRHB:MCLK PAD Power
+1.8VS_PX
L60 BLM18PG121SN1D_0603
1U_0402_6.3V4Z
2
1
VGA@
2
2
2
C669
C679
VGA@ VGA@
1
1
1
+VGA_CORE 10U_0603_6.3V6M
2
1
L30 BLM18PG121SN1D_0603 2
VGA@
PCIE_PVDD=40mA
AB37
H7
H8
C675
VGA@
0.1U_0402_16V7K
SPV10=414mA
C348
VGA@
SPV10: Dedicated power pin for memory

and engine PLLs.
C360
VGA@
AM10
+SPV10
1U_0402_6.3V4Z
2
2
1
1
10U_0603_6.3V6M
C359
VGA@
PCIE_PVDD
NC_MPV18#1
NC_MPV18#2
NC_SPV18
AN9
SPV10
AN10
SPVSS
AA13
Y13
BBP#1
BBP#2
0.1U_0402_16V7K
BACK BIAS
+VGA_CORE
BBP=0.12A
2
C327
VGA@
A
PLL
+PCIE_PVDD
PCIE_PVDD:PCI-E PLL power.
1U_0402_6.3V4Z
AA31
AA32
AA33
AA34
V28
W29
W30
Y31
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28
CORE
LEVEL
TRANSLATION
+VDD_CT
PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
C318
VGA@
VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58
VDDC#59
VDDC#60
VDDC#61
VDDC#62
VDDC#63
VDDC#64
VDDC#65
VDDC#66
VDDC#67
VDDC#68
VDDC#69
VDDC#70
VDDC#71
VDDC#72
VDDC#73
VDDC#74
ISOLATED VDDCI#1
CORE I/O VDDCI#2
VDDCI#3
VDDCI#4
0.1U_0402_16V7K
PCIE_VDDC: PCI-E Digital Power Supply
AA15
AA17
AA20
AA22
AA24
AA27
AB13
AB16
AB18
AB21
AB23
AB26
AB28
AC12
AC15
AC17
AC20
AC22
AC24
AC27
AD13
AD16
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
M16
M18
M23
M26
N15
N17
N20
N22
N24
N27
R13
R16
R18
R21
R23
R26
T15
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V15
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
AH27
AH28
M15
N13
R12
T12
PCIE_VDDC=2A
1
C196
1
C233
1
C229
1
C242
1
C220
1
C216
1
C217
1
C202
1
C311
1
C312
1
C313
1
C263
1
C264
1
C265
1
C262
1
C252
1
C289
1
C351
2
10U_0603_6.3V6M
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
216-0729002 A12 M96_BGA962
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VDDC+VDDCI=16A
+VDDCI
1U_0402_6.3V4Z
2
2
C347
VGA@
VGA@
VGA@
VGA@
1
C352
1
C343
1
C279
1
C291
1
C299
1
C336
1
C298
1
C328
1
C270
1
C269
1
C284
1
C335
1
C320
1
C286
1
C247
1
C287
1
C275
1
C332
1
C288
1
C330
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
C344
1
C333
330U_V_2.5VM_R9M
VGA@
+
2
1
VGA@ C337
1
VGA@ C329
1
VGA@ C353
1
VGA@ C240
1
VGA@ C322
1
VGA@ C285
1
VGA@ C321
1
VGA@ C316
1
VGA@ C251
1
VGA@ C248
1
VGA@ C296
1
VGA@ C334
1
VGA@ C297
1
VGA@ C267
1
VGA@ C268
1
VGA@ C250
1
VGA@ C261
1
VGA@ C323
1
VGA@ C315
1
VGA@ C346
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
VGA@
VGA@
VGA@
VGA@
C
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
VGA@
B
VGA@
+VGA_CORE
VGA@
2
L31
1
BLM18PG121SN1D_0603
A
C358
1
VGA@
VGA@
1U_0402_6.3V4Z
VGA@
10U_0603_6.3V6M

2009/10/06
Title
Date:
1
C243
330U_V_2.5VM_R9M
VGA@
VGA@
SCHEMATIC A4921P
Custom
5
+VGA_CORE
VGA@
C356
1
VGA@
M92@
Deciphered Date
VGA@
1U_0402_6.3V4Z
2
2
Compal Secret Data

2008/10/06
Issued Date
VGA@
1
BLM18PG121SN1D_0603
2
10U_0603_6.3V6M VGA@
2
1U_0402_6.3V4Z VGA@
2
1U_0402_6.3V4Z VGA@
2
1U_0402_6.3V4Z VGA@
2
1U_0402_6.3V4Z VGA@
2
1U_0402_6.3V4Z VGA@
2
0.1U_0402_16V7K VGA@
2
0.1U_0402_16V7K VGA@
VDDCI: Isolated (clean) core power for the l/O logic
2
L22
1
C221
1
C237
1
C193
1
C199
1
C236
1
C213
1
C212
1
C232
PCIE_VDDR:PCI-E I/O power.
+1.1VS_PX
POWER
VDD_CT=0.11A
+VDD_CT
1
BLM18PG121SN1D_0603
1
2
C706
10U_0603_6.3V6M VGA@
1
2
C271
1U_0402_6.3V4Z VGA@
1
2
C703
1U_0402_6.3V4Z VGA@
1
2
C702
1U_0402_6.3V4Z VGA@
1
2
C245
0.1U_0402_16V7K VGA@
VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34
VGA@
PCIE_VDDR=0.5A
Rev
C
401679
Sheet
1
18
of
57
U4F
Spread spectrum
+3VS_DELAY
C742 1
U27
27M_NSSC
15,23 27M_NSSC
1
R331
2
0_0402_5%
2 0.1U_0402_16V4Z
@
VDD
REF
XIN MODOUT
XOUT
NC
PD#
Place close to R306

2
VSS
@
1
R336
27M_SSC_R
2
22_0402_5%
27M_SSC_R 15
ASM3P1819N-SR_SO8
@
+3VS_DELAY
Q15
3
+3VS
R142
100K_0402_5%
VGA@
SI2301BDS_SOT23
VGA@
38
PX_+3VS
@
1
R467
2 PX_+3VS_R
0_0402_5%
+3VS
1
2
R151 4.7K_0402_5%
2
G
VGA@
Q16
2N7002_SOT23
VGA@
1
@
2
C405
0.01U_0402_25V7K
Use Delay 3.3V BUS (VDDR3) for GPIO/DDC Pull up to reduce Leakage to VDDR3 Bus.
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
A39
AW1
AW39
Compal Secret Data
2008/10/06
Issued Date
Deciphered Date
2009/10/06
Title
SCHEMATIC A4921P
Custom
216-0729002 A12 M96_BGA962

M92@
5
2
G
GND
GND#101
GND#102
GND#103
GND#104
GND#105
GND#106
GND#107
GND#108
GND#109
GND#110
GND#111
GND#112
GND#113
GND#114
GND#115
GND#116
GND#117
GND#118
GND#119
GND#120
GND#121
GND#122
GND#123
GND#124
GND#125
GND#126
GND#127
GND#128
GND#129
GND#130
GND#131
GND#132
GND#133
GND#134
GND#135
GND#136
GND#137
GND#138
GND#139
GND#140
GND#141
GND#142
GND#143
GND#144
GND#145
GND#146
GND#147
GND#148
GND#149
GND#150
GND#151
GND#152
GND#153
GND#154
GND#155
GND#156
GND#157
GND#158
GND#159
GND#160
GND#161
GND#162
GND#163
GND#164
GND#165
GND#166
GND#167
GND#168
GND#169
GND#170
GND#171
GND#172
GND#173
GND#174
GND#175
GND#176
A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AH29
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
AW34
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13
F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13
GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
GND#99
GND#100
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35
AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39
Date:
Rev
C
401679
Sheet
1
19
of
57
CK
CK
CKE
CSA0#
L8
CS
WEA#0
K3
WE
RASA#0
K7
RAS
CASA#0
L7
CAS
DQMA#1
DQMA#2
F3
B3
LDM
UDM
ODTA0
K9
ODT
QSA1
QSA#1
F7
E8
LDQS
LDQS
R349
4.99K_0402_1%
QSA2
QSA#2
VGA@
R353
4.99K_0402_1%
BA2
2
VGA@
+VRAM_REF1
C748
0.1U_0402_16V4Z
VGA@
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
VDD1
VDD2
VDD3
VDD4
VDD5
A1
E1
J9
M9
R1
VDDL
VSSDL
J1
J7
B7
A8
UDQS
UDQS
J2
VREF
A2
E2
L1
R3
R7
R8
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSS1
VSS2
VSS3
VSS4
VSS5
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0
Group1
+1.8VS_PX
0.1U_0402_16V4Z
1
C745
VGA@
L2
L3
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
+1.8VS_PX
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CLKA0#
CLKA0
K8
J8
CK
CK
CKEA0
K2
CKE
CSA0#
L8
CS
WEA#0
K3
WE
RASA#0
K7
RAS
CASA#0
L7
CAS
DQMA#3
DQMA#0
F3
B3
LDM
UDM
+1.8VS_PX
C734
VGA@
2 1U_0402_6.3V4Z
BA0
BA1
ODTA0
K9
ODT
QSA3
QSA#3
F7
E8
LDQS
LDQS
R160
4.99K_0402_1%
QSA0
QSA#0
VGA@
B7
A8
UDQS
UDQS
J2
VREF
A2
E2
L1
R3
R7
R8
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
R162
4.99K_0402_1%
A3
E3
J3
N1
P9
VGA@
+VRAM_REF2
BA2
2
C418
0.1U_0402_16V4Z
VGA@
HYB18T256161BF-25
VRAM@
MDA3
MDA5
MDA1
MDA6
MDA4
MDA0
MDA7
MDA2
MDA27
MDA31
MDA24
MDA28
MDA29
MDA25
MDA30
MDA26
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
VDD1
VDD2
VDD3
VDD4
VDD5
A1
E1
J9
M9
R1
VDDL
VSSDL
J1
J7
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
BA[2..0]
16,21
QSA[7..0]
BA[2..0]
QSA[7..0]
16,21
QSA#[7..0]
16,21 QSA#[7..0]
16,21 DQMA#[7..0]
DQMA#[7..0]
MAA[12..0]
MAA[12..0]
MDA[63..0]
16,21 MDA[63..0]
Group3
+1.8VS_PX
ODTA0
16
ODTA0
16
CKEA0
16
RASA#0
16
CASA#0
16
WEA#0
16
CSA0#
CKEA0
RASA#0
CASA#0
WEA#0
CSA0#
0.1U_0402_16V4Z
1
VSS1
VSS2
VSS3
VSS4
VSS5
Group0
16,21
+1.8VS_PX
C412
VGA@
C399
VGA@
2 1U_0402_6.3V4Z
CLKA0
16
CLKA0
16
CLKA0#
CLKA0#
1
K2
U5
BA0
BA1
Group2
K8
J8
CKEA0
+1.8VS_PX
CLKA0#
CLKA0
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
MDA21
MDA19
MDA20
MDA16
MDA17
MDA22
MDA18
MDA23
MDA12
MDA10
MDA15
MDA8
MDA11
MDA14
MDA9
MDA13
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0
BA0
BA1
L2
L3
R164
56_0402_5%
A3
E3
J3
N1
P9
VGA@
R161
56_0402_5%
VGA@
U6
BA0
BA1
HYB18T256161BF-25
VRAM@
SA00002UH00 HYNIX S IC D2 64M16/500 H5PS1G63EFR-20L FBGA84
C419
470P_0402_50V7K
VGA@
SA00002MF00 Qimonda S IC D2 64M16/500 HYB18T1G161C2F-20
SA00002MD00 Samsung S IC D2 64M16/500 K4N1G164QQ-HC20 FBGA84

SA000031O00 Samsung S IC D2 64M16/500 K4N1G164QE-HC20 FBGA 84P
+1.8VS_PX
+1.8VS_PX
10U_0603_6.3V6M
1 VGA@
C753
1 VGA@
C752
2
10U_0603_6.3V6M
0.1U_0402_16V4Z
1 VGA@
C730
2
1 VGA@
C741
2
1U_0402_6.3V4Z
0.1U_0402_16V4Z
1 VGA@
C740
2
C736
2
0.1U_0402_16V4Z
0.01U_0402_16V7K
1 VGA@
1 VGA@
C732
10U_0603_6.3V6M
1 VGA@
1 VGA@
C728
C424
1 VGA@
C423
2
0.1U_0402_16V4Z
1 VGA@
C415
2
1 VGA@
C409
2
0.1U_0402_16V4Z
1 VGA@
C396
2
1 VGA@
C416
2
0.01U_0402_16V7K
1 VGA@
C410
2
1 VGA@
C400
2
10U_0603_6.3V6M
0.1U_0402_16V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Issued Date
Compal Secret Data
2008/10/06
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

1
20
of
57
U7
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CLKA1#
CLKA1
K8
J8
CKEA1
K2
CSA1#
L8
CK
CK
CKE
CS
WEA#1
K3
WE
RASA#1
K7
RAS
CASA#1
L7
CAS
F3
B3
LDM
UDM
K9
ODT
QSA4
QSA#4
F7
E8
LDQS
LDQS
QSA6
QSA#6
B7
A8
UDQS
UDQS
DQMA#4
DQMA#6
ODTA1
R347
4.99K_0402_1%
2
VGA@
+VRAM_REF3
1
R348
4.99K_0402_1%
VREF
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
VDD1
VDD2
VDD3
VDD4
VDD5
A1
E1
J9
M9
R1
VDDL
VSSDL
J1
J7
MDA48
MDA52
MDA49
MDA54
MDA53
MDA50
MDA55
MDA51
MDA34
MDA37
MDA33
MDA35
MDA39
MDA32
MDA38
MDA36
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
VSS1
VSS2
VSS3
VSS4
VSS5
A3
E3
J3
N1
P9
Group6
Group4
L2
L3
BA0
BA1
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
K8
J8
CKEA1
K2
CSA1#
L8
VGA@
C739
CKE
CS
K3
WE
RASA#1
K7
RAS
CASA#1
L7
CAS
F3
B3
LDM
UDM
K9
ODT
QSA7
QSA#7
F7
E8
LDQS
LDQS
QSA5
QSA#5
B7
A8
UDQS
UDQS
J2
VREF
A2
E2
L1
R3
R7
R8
NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8
+1.8VS_PX
ODTA1
C744 VGA@
2 1U_0402_6.3V4Z
CK
CK
WEA#1
DQMA#7
DQMA#5
0.1U_0402_16V4Z
1
U8
BA0
BA1
CLKA1#
CLKA1
+1.8VS_PX
+1.8VS_PX
R163
4.99K_0402_1%
VGA@
R165
4.99K_0402_1%
VGA@
+VRAM_REF4
1
BA2
2
C420
0.1U_0402_16V4Z
VGA@
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
VDD1
VDD2
VDD3
VDD4
VDD5
A1
E1
J9
M9
R1
VDDL
VSSDL
J1
J7
MDA45
MDA43
MDA47
MDA41
MDA42
MDA46
MDA40
MDA44
MDA60
MDA58
MDA63
MDA56
MDA59
MDA61
MDA57
MDA62
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
VSS1
VSS2
VSS3
VSS4
VSS5
A3
E3
J3
N1
P9
16,20
DQMA#[7..0]
MAA[12..0]
16,20 MAA[12..0]
QSA#[7..0]
16,20 QSA#[7..0]
Group7
QSA[7..0]
16,20 QSA[7..0]
MDA[63..0]
16,20 MDA[63..0]
16
ODTA1
16
CKEA1
16
RASA#1
16
CASA#1
16
WEA#1
16
CSA1#
ODTA1
CKEA1
RASA#1
CASA#1
WEA#1
CSA1#
0.1U_0402_16V4Z
1
+1.8VS_PX
C414
VGA@
C417
VGA@
2 1U_0402_6.3V4Z
16
CLKA1
16
CLKA1#
CLKA1
CLKA1#
R351
56_0402_5%
HYB18T256161BF-25
VRAM@
VGA@
R350
56_0402_5%
2
HYB18T256161BF-25
VRAM@
BA[2..0]
BA[2..0]
16,20 DQMA#[7..0]
+1.8VS_PX
2
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
Group5
VGA@
BA2
C747
0.1U_0402_16V4Z
VGA@
J2
A2
E2
L1
R3
R7
R8
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
+1.8VS_PX
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
BA0
BA1
L2
L3
BA0
BA1
VGA@
2
+1.8VS_PX
VGA@
+1.8VS_PX
10U_0603_6.3V6M
1 VGA@
C750
C746
470P_0402_50V7K
1 VGA@
C754
0.1U_0402_16V4Z
1 VGA@
C735
10U_0603_6.3V6M
1 VGA@
C731
2
1U_0402_6.3V4Z
0.1U_0402_16V4Z
1 VGA@
C729
2
1 VGA@
C738
2
0.1U_0402_16V4Z
0.01U_0402_16V7K
1 VGA@
C737
2
10U_0603_6.3V6M
1 VGA@
1 VGA@
C733
C425
C422
2
10U_0603_6.3V6M
0.1U_0402_16V4Z
1 VGA@
0.1U_0402_16V4Z
1 VGA@
C408
2
1 VGA@
C413
2
1U_0402_6.3V4Z
0.1U_0402_16V4Z
1 VGA@
C411
2
C401
2
0.01U_0402_16V7K
1 VGA@
1 VGA@
C395
2
0.1U_0402_16V4Z
1 VGA@
C398
2
0.1U_0402_16V4Z
Issued Date
Compal Secret Data
2008/10/06
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

1
21
of
57
CONFIGURATION STRAPS
STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
+3VS_DELAY
STRAPS
15
15
15
15
15
15
15
15
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
VGA@ R123
VGA@ R133
VGA@ R125
GPU_GPIO8
GPU_GPIO9
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
GPU_GPIO8
GPU_GPIO9
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
15,26 VGA_CRT_VSYNC
15,26 VGA_CRT_HSYNC
15 VSYNC_DAC2
15 HSYNC_DAC2
1 10K_0402_5%
1 10K_0402_5%
1 10K_0402_5%
2
2
2
@ R463
@ R134
VGA@ R130
@ R129
@ R126
2
2
2
2
2
1
1
1
1
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
VGA@ R300
VGA@ R299
@ R81
@ R84
2
2
2
2
1
1
1
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
1
15 GPU_THERMAL_D-
GPIO1
PCI Express Transmitter De-emphasis Enable
BIF_GEN2_EN_A
GPIO2
PCIE GNE2 ENABLED

0 = Advertises the PCIe device as 2.5 GT/s capable at power-on.
1 = Advertises the PCIe device as 5.0 GT/s capable at power-on.
VGA_DIS
GPIO9
VGA Disable determines whether or not the card will

be recognized as the system's VGA controller
CONFIG(2:0)
GPIO[13:11]
Size of the primary memory apertures
VIP_DEVICE_STRAP_EN
V2SYNC
RESERVED
H2SYNC
AUD[1]
HSYNC
AUD[0]
VSYNC
0 : Tx de-emphasis disabled
0 (5.0 GT/s capability will be controlled by software)
1 : The device will not be recognized as the systems

VGA controller
0 0 1
AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI
11
GPIO21
0
0: Disable external BIOS ROM device
GPIO_22_ROMCSB
1: Enable external BIOS ROM device
2
1
TX_DEEMPH_EN
CCBYPASS
GENERICC
IGNORE VIP DEVICE STRAPS
BIF_CLK_PM_EN
GPIO8
BIF_CLK_PM_EN
EC_SMB_CK2 6,38
EC_SMB_DA2 6,38
Q48B
2N7002DW-T/R7_SOT363-6
VGA@
AMD RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
1
U12
15 GPU_THERMAL_D+
Transmitter Power Savings Enable
RESERVED
2
VGA@ C305
GPIO0
BIOS_ROM_EN
Q48A
2N7002DW-T/R7_SOT363-6
VGA@ 3
+3VS_DELAY
0.1U_0402_16V4Z
TX_PWRS_ENB
0 : VGA Controller capacity enabled
VSYNC_DAC1 and HSYNC_DAC1

pull up for HDMI & DISPLAYPORT
Audio codec enable
+3VS
R146
10K_0402_5%
VGA@
EC_SMB_CK2_PX
EC_SMB_DA2_PX
RECOMMENDED SETTINGS
0 : PCIe bus 50% Tx output swing

1 : Tx de-emphasis enabled
R150
10K_0402_5%
VGA@
External VGA Thermal Sensor
DESCRIPTION OF DEFAULT SETTINGS
1 : PCIe bus Full Tx output swing
+3VS_DELAY
PIN
C306 VGA@
2
2200P_0402_50V7K
EC_SMB_CK2_PX
SMBDATA
EC_SMB_DA2_PX
ALERT
GND
VCC
SMBCLK
DXP
DXN
THERM
GENERICC
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THM_ALERT# 15
+3VS_DELAY
VGA@
1
R85
G781-1_SOP8
VGA@
H2SYNC
GPIO_28_TDO
GPIO21_BB_EN
2
4.7K_0402_5%
Address 1001 101X b
VRAM@
R323
10K_0402_5%
2
1
+1.8VS_PX
VRAM@
R319
10K_0402_5%
2
1
+1.8VS_PX
VRAM_ID0 15
1
2
R324
10K_0402_5%
VRAM@
STRAPS
PIN
VRAM_ID1 15
M92-M2 XT
1
2
R320
10K_0402_5%
VRAM@
Vendor Part Number#
VRAM size
Compal Part Number#
VRAM_ID 3,2,1,0
512M(x4)
Samsung 64Mx16 1.8V (Q-die)
SA00002MD00
0000
JV40-PU_KBLG0
512M(x4)
Hynix 64Mx16 1.8V
SA00002UH20
0001
JV40-PU_KBLG0
512M(x4)
Qimonda 64Mx16 1.8V
SA00002MF00PVT
0010
JV40-PU_KBLG0
512M(x4)
Samsung 64Mx16 1.8V (E-die)
SA000031O10
0100
VRAM@
R317
10K_0402_5%
2
1
+1.8VS_PX
VRAM_ID2 15
1
2
R322
10K_0402_5%
VRAM@
Project
JV40-PU_KBLG0
DVPDATA
(23,22,21,20)
VRAM_ID[3:0]
VRAM@
R321
10K_0402_5%
2
1
+1.8VS_PX
GPU
VRAM_ID3 15
1
2
R318
10K_0402_5%
VRAM@
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

1
22
of
57
+3VS_CLK
L41
1
+3VS
FBMA-L11-201209-221LMA30T_0805
+VDDCLK_IO
2
2
1
FBMA-L11-201209-221LMA30T_0805
D
0.1U_0402_16V4Z
1
C471
2
2
22U_0805_10V4Z
0.1U_0402_16V4Z
1
C516
C432
C475
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
L40
1
+3VS
0.1U_0402_16V4Z
1
C529
C530
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C479
C526
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C511
C498
2
0.1U_0402_16V4Z
C477
0.1U_0402_16V4Z
1
C508
2
0.1U_0402_16V4Z
C528
2
0.1U_0402_16V4Z
C474
1U_0402_6.3V4Z
1U CLOSE PIN 69
D
+3VS_CLKVDDA
2
1
+3VS_CLK
C463
U18
22U_0805_10V4Z
CLK_XTAL_IN
22U_0805_10V4Z
0.1U_0402_16V4Z
1
C527
FBMA-L11-201209-221LMA30T_0805
CLK_XTAL_OUT
0.1U_0402_16V4Z
1
C480
C473
0.1U_0402_16V4Z
L39
C476
ICS 9LPRS488
R178
8.2K_0402_5%
49
48
VDDA
GNDA
62
66
VDDREF
GNDREF
SB_SRC_SLOW#
41
12
18
28
37
53
VDDSRC_IO
VDDSRC_IO
VDDATIG_IO
VDDSB_SRC_IO
VDDCPU_IO
CPUKG0T_LPRS
CPUKG0C_LPRS
56
55
CLK_CPU_BCLK 6
CLK_CPU_BCLK# 6
HTT0T_LPRS / 66 M
HTT0C_LPRS / 66 M
60
59
CLK_NBHT 11
CLK_NBHT# 11
3
17
29
38
44
54
61
69
VDDDOT
VDDSRC
VDDATIG
VDDSB_SRC
VDDSATA
VDDCPU
VDDHTT
VDD48
SB_SRC0T_LPRS
SB_SRC0C_LPRS
40
39
SB_SRC1T_LPRS
SB_SRC1C_LPRS
35
34
ATIG0T_LPRS
ATIG0C_LPRS
33
32
CLK_NBGFX 11
CLK_NBGFX# 11
ATIG1T_LPRS
ATIG1C_LPRS
31
30
CLK_PCIE_VGA 14
CLK_PCIE_VGA# 14
VGA
ATIG2T_LPRS
ATIG2C_LPRS
26
25
SRC0T_LPRS
SRC0C_LPRS
23
22
CLK_PCIE_LAN 34
CLK_PCIE_LAN# 34
GLAN
SRC1T_LPRS
SRC1C_LPRS
21
20
REF0/SEL_HTT66
SRC2T_LPRS
SRC2C_LPRS
16
15
71
48MHz_0
70
14
13
48MHz_1
SRC3T_LPRS
SRC3C_LPRS
SRC4T_LPRS
SRC4C_LPRS
10
9
CLK_SBLINK_BCLK 11
CLK_SBLINK_BCLK# 11
NB A LINK
SRC5T_LPRS
SRC5C_LPRS
8
7
CLK_PCIE_READER 33
CLK_PCIE_READER# 33
Card Reader
46
45
CLK_SBSRC_BCLK 27
CLK_SBSRC_BCLK# 27
SMBCLK
SMBDAT
1
2
ICH_SMBCLK0 8,9,28,36
ICH_SMBDATA0 8,9,28,36
+1.2V_HT
C483
SRC_SLOW
2
1
C518
22P_0402_50V8J
2
1
0.1U_0402_16V4Z
+VDDCLK_IO
22P_0402_50V8J
+3VS_CLK
R176 8.2K_0402_5%
1
2
Routing the trace at least 10mil
R175 8.2K_0402_5%
1
2
+3VS_CLK
L45
1
24
34 LAN_CLKREQ#
Mini Card1
36 MINI1_CLKREQ#
CLK_NB_14.318M
RS780
For Tigris
27M_SEL
TIGRIS@
SEL_SATA
2
1
R185 33_0402_5%
CLK_14.318M
1
2
R201
158_0402_1%
1.1V 158R/90.0R
27 SB710_CLK_14M
11 CLK_NB_14.318M
1
R187
DVT2
2
90.9_0402_1%
33 CLK_48M_SD
28 CLK_48M_USB
DVT2
34 CLK_48M_LAN
RTS5159@
2
1 CLK_48MHZ
R676
22_0402_5%
2
1 CLK_48M
R209
33_0402_5%
2
1
R715
33_0402_5%
@ CLK_XTAL_IN
CLK_XTAL_OUT
CLKREQ0 #
51
CLKREQ1#
50
CLKREQ2#
43
CLKREQ3#
42
CLKREQ4#
63
REF2/SEL_27
64
REF1/SEL_SATA
65
67
X1
68
X2
+3VS_CLK
R198
8.2K_0402_5%
1
R200
8.2K_0402_5%
@
1
6
11
19
27
36
47
52
58
72
73
SEL_SATA
GNDDOT
GNDSRC
GNDSRC
GNDATIG
GNDSB_SRC
GNDSATA
GNDCPU
GNDHTT
GND48
GNDPAD
R177
8.2K_0402_5%
CPU
FBMA-L11-160808-601LMT 0603
PVT
LAN
2
C500
1
14.31818MHZ_20P_6X14300202
1
C517
SRC_SLOW
+3VS_CLK
Y1
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
SRC7T_LPRS/27MHz_SS
SRC7C_LPRS/27MHz_NS
PD#
5
4
NB GFX
New Card
CLK_PCIE_MINI1 36
CLK_PCIE_MINI1# 36
MiniCard_1
NB CLOCK INPUT TABLE

NB CLOCKS
HT_REFCLKP
CLK_SRC7T
CLK_SRC7C
57
R210 1 @
2 0_0402_5%
R461 1
2 0_0402_5%
VGA@
2
R184
1
8.2K_0402_5%
VGA
27M_SSC 15
27M_NSSC 15,19
RX780
RS780
NC
100M DIFF
100M DIFF
100M DIFF
100M DIFF
REFCLK_N
14M SE (3.3V)
NC
14M SE (1.8V)
NC
14M SE (1.1V)
vref
GFX_REFCLK
100M DIFF
100M DIFF
100M DIFF(IN/OUT)*
GPP_REFCLK
NC
100M DIFF
NC
100M DIFF
100M DIFF
HT_REFCLKN
SB RCLK
RS740
66M SE(SINGLE END)
REFCLK_P
GPPSB_REFCLK 100M DIFF
(Spread spectrum)
VGA (Non spread spectrum)
+3VS_CLK
27M_SEL
SLG8SP626VTR_QFN72_10x10
R186
8.2K_0402_5%
1
1st (SILEGO) : SA00001Z310 S IC SLG8SP626VTR QFN 72P CLK GEN

2nd (ICS) : SA000023H10 S IC ICS9LPRS488CKLFT MLF 72P CLK GEN
single-ended 66MHz HTT output
0*
differential 100MHz HTT output
1*
NON SPREAD 100M SATA SRC6 output
SPREAD 100M SATA SRC6 output
2008/10/06
Issued Date
27M_SEL
1 * NON SPREAD 27M and SPREAD 27M output

0
differential spread SRC_7 output
* default
Compal Secret Data
SEL_HTT66
SEL_SATA
2009/10/06
Deciphered Date
Title
Date:
SCHEMATIC A4921P
Custom
3
Rev
C
401679
Sheet

1
23
of
57
U35
SLE0
C582
C583
0.1U_0402_16V4Z
4.7U_0805_10V4Z
2
D
2
G
VGA_ENVDD
15
MP
49
48
4B1
5B1
VGA_TXOUT2+
VGA_TXOUT2-
47
46
4B2
5B2
GMCH_TXOUT1+
GMCH_TXOUT1-
45
44
6B1
7B1
VGA_TXOUT1+
VGA_TXOUT1-
43
42
6B2
7B2
GMCH_TXOUT0+
GMCH_TXOUT0-
39
38
Q49
2N7002_SOT23
VGA@
8B1
9B1
VGA_TXOUT0+
VGA_TXOUT0-
37
36
8B2
9B2
1
3
4
5
9
14
17
23
29
30
32
34
35
41
50
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
+3VS
DVT
1
R500 0_0402_5%
1
2
R256
4.7K_0402_5%
@
2
DISPOFF#
2
1
25
A4
A5
18
19
TXOUT2+
TXOUT2-
A6
A7
21
22
TXOUT1+
TXOUT1-
A8
A9
27
28
TXOUT0+
TXOUT0-
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
2
8
11
15
16
20
24
26
31
33
40
56
64
GND16
GND17
GND18
GND19
51
57
62
63
PX_GPIO2 11,26,38
@
R465
10K_0402_5%
@
+1.8VS
2N7002DW-T/R7_SOT363-6
Q52B
DVT
TXOUT0+
TXOUT0-
R502 0_0402_5%
Not for VariBright
LVDS_SEL
SEL1
@
5
2N7002DW-T/R7_SOT363-6
Q52A
11 UMA_DPST
R464 6.8K_0402_5%
1
2
PI2LVD512AEX_TSSOP64
@
MP(mask)
R255
4.7K_0402_5%
1.8v level
@
D24
RB751V_SOD323
BKOFF#
R504 0_0402_5%
1
2
1
DAC_BRIG
INVT_PWM
DISPOFF#
LCD/PANEL BD. Conn.

B
1
C587
1
C586
1
C588
2
2
2
2
1
RP21
2
1
RP22
1
2
RP23
2
1
RP20
TXOUT1+
TXOUT1-
220P_0402_50V7K
220P_0402_50V7K
TXOUT2TXOUT2+
220P_0402_50V7K
TXCLK+
TXCLK-
3
4
VGA@ 0_0404_4P2R_5%
3
4
VGA@ 0_0404_4P2R_5%
4
3
VGA@ 0_0404_4P2R_5%
3
4
VGA@ 0_0404_4P2R_5%
VGA_TXOUT0+
VGA_TXOUT0VGA_TXOUT1+
VGA_TXOUT1VGA_TXOUT2VGA_TXOUT2+
VGA_TXCLK+
VGA_TXCLK-
VGA_TXOUT0+ 15
VGA_TXOUT0- 15
VGA_TXOUT1+ 15
VGA_TXOUT1- 15
VGA_TXOUT2- 15
VGA_TXOUT2+ 15
VGA_TXCLK+ 15
VGA_TXCLK- 15
B
JLVDS1
28
28
Camera
USB20_N3
USB20_P3
GND
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
DAC_BRIG
INVT_PWM
DISPOFF#
DAC_BRIG 38
INVT_PWM 38
VGA_LCD_CLK 15
VGA_LCD_DATA 15
+3VS
+LCDVDD
Q50A
2N7002DW-T/R7_SOT363-6
VGA@
W=60mils
TXOUT0TXOUT0+
I2CC_SCL
I2CC_SDA
GND
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
TXOUT1TXOUT1+
TXOUT2+
TXOUT2-
DVT
TXCLKTXCLK+
I2CC_SCL
I2CC_SDA
TXOUT0TXOUT0+
+3VS
TXOUT1TXOUT1+
ACES_88242-4001
CONN@
TXOUT2+
TXOUT2-
+INVPWR_B+
TXCLKTXCLK+
+LCDVDD
L47 2
1
KC FBM-L11-201209-221LMAT_0805
W=40mils
1
1
2
RP15
2
1
RP19
2
1
RP18
1
2
RP17
2
1
RP16
GMCH_LCD_CLK
4
GMCH_LCD_DATA
3
UMA@ 0_0404_4P2R_5%
GMCH_TXOUT03
GMCH_TXOUT0+
4
UMA@ 0_0404_4P2R_5%
GMCH_TXOUT13
GMCH_TXOUT1+
4
UMA@ 0_0404_4P2R_5%
GMCH_TXOUT2+
4
GMCH_TXOUT23
UMA@ 0_0404_4P2R_5%
GMCH_TXCLK3
GMCH_TXCLK+
4
UMA@ 0_0404_4P2R_5%
C580
680P_0402_50V7K 68P_0402_50V8J
2
2
C585
10U_0805_10V4Z
GMCH_TXOUT0- 11
GMCH_TXOUT0+ 11
GMCH_TXOUT1- 11
GMCH_TXOUT1+ 11
GMCH_TXOUT2+ 11
GMCH_TXOUT2- 11
GMCH_TXCLK- 11
GMCH_TXCLK+ 11
A
C584
0.1U_0402_16V4Z
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
Size
B
Date:
GMCH_LCD_CLK 11
GMCH_LCD_DATA 11
B+
L46 2
1
KC FBM-L11-201209-221LMAT_0805
C581
Q50B
2N7002DW-T/R7_SOT363-6
VGA@
+3VS
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
+INVPWR_B+
36,38
PLT_RST#
R501
4.7K_0402_5%
13,14,27,33,34,36,38
@
R503 0_0402_5%
1
2
L : A-->B1 (INTERNAL GRAPHIC)

H: A-->B2 (EXTERNAL GRAPHIC)
GMCH_TXOUT2+
GMCH_TXOUT2-
R251
10K_0402_5%
VGA@
2B2
3B2
12
13
0.1U_0402_16V4Z
R508
2.7K_0402_5%
53
52
A2
A3
TXCLK+
TXCLK-
C849
W=60mils
11 UMA_ENVDD_R
+LCDVDD
0.047U_0402_16V7K
2
2N7002DW-T/R7_SOT363-6
Q32B
2B1
3B1
4.7U_0805_10V4Z
AO3413_SOT23-3
Q33
1
1K_0402_5%
1
C578
2
R253
2N7002DW-T/R7_SOT363-6
Q32A
0B2
1B2
55
54
C579
59
58
6
7
2
D
VGA_TXCLK+
VGA_TXCLK-
A0
A1
0.1U_0402_16V4Z
R252
100K_0402_5%
0B1
1B1
LVDS_SEL
C848
W=60mils
R254
300_0603_5%
61
60
10
0.1U_0402_16V4Z
+3VS
+3VALW
GMCH_TXCLK+
GMCH_TXCLK-
0.1U_0402_16V4Z
+LCDVDD
C847
DVT
LCD POWER CIRCUIT
C846
0.1U_0402_16V4Z
C845
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet

1
24
of
57
DDC to HDMI CONN

+3VS_DELAY
+3VS
+3VS
JHDMI1
HDMI_HPD
VGA_HDMI_SDATA
2K_0402_5%
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+HDMI_5V_OUT
HDMI_SDATA
HDMI_SCLK
HDMI_R_CK-
HDMI_SCLK
HDMI_R_CK+
HDMI_R_D0-
BSH111 1N_SOT23-3
Q13
HDMI_SDATA
1
HDMI_R_D0+
HDMI_R_D1-
15 VGA_HDMI_SDATA
R332
1
2
2
0_0402_5%
2K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
2
1
10K_0402_5%
VGA_HDMI_SCLK
UMA@ UMA@
G
1
R121
11 GMCH_HDMI_DATA
VGA@ VGA@
UMA@
R326
15 VGA_HDMI_SCLK
R128
UMA@
1
2
R124
0_0402_5%
11 GMCH_HDMI_CLK
R132 R116
1
D
10K_0402_5%
2
1
R114
BSH111 1N_SOT23-3
Q10
DVT
DIP
+HDMI_5V_OUT
HDMI_R_D1+
HDMI_R_D2-
Place closed to JHDMI1
HDMI_R_D2+
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
20
21
22
23
TAITW_PDVBR5-19FLBS4NN4N_19P-T
CONN@
+HDMI_5V_OUT
+HDMI_5V_OUT
HDMI_HPD
5
1
HDMI_DET
+3VS
R354
100K_0402_5%
HDMI_DET 11,15
U28
SN74AHCT1G125GW_SOT353-5
1+HDMI_5V_OUT_1 1
RB491D_SC59-3
F2
W=40mils
2
1
1.1A_6VDC_FUSE
C749
0.1U_0402_16V4Z
C743
0.1U_0402_16V4Z
P
OE#
D17
+5VS
2
1
R352
2.2K_0402_5%
C751
0.1U_0402_16V4Z
HDMI_CLK+
Close to NB
Close to GPU
C708 1
C707 1
15 HDMI_CLK-_VGA
15 HDMI_CLK+_VGA
10 PCIE_MTX_GRX_N3
10 PCIE_MTX_GRX_P3
C98
C97
UMA@
2 0.1U_0402_16V7K
UMA@
1
2
R315
0_0402_5%
1
2
R314
0_0402_5%
UMA@
HDMICLKHDMICLK+
2 0.1U_0402_16V7K
UMA@
15 HDMI_TX0-_VGA
15 HDMI_TX0+_VGA
UMA@
2 0.1U_0402_16V7K
C100 1
10 PCIE_MTX_GRX_N2
C99
10 PCIE_MTX_GRX_P2
UMA@
1
2
R313
0_0402_5%
1
2
R312
0_0402_5%
UMA@
HDMITX0-
2 0.1U_0402_16V7K
UMA@
HDMITX0+
15 HDMI_TX1-_VGA
15 HDMI_TX1+_VGA
10 PCIE_MTX_GRX_N1
C102 1
10 PCIE_MTX_GRX_P1
C101 1
UMA@
2 0.1U_0402_16V7K
UMA@
1
2
R311
0_0402_5%
1
2
R310
0_0402_5%
UMA@
HDMITX1-
2 0.1U_0402_16V7K
UMA@
HDMITX1+
15 HDMI_TX2-_VGA
15 HDMI_TX2+_VGA
10 PCIE_MTX_GRX_N0
C104 1
10 PCIE_MTX_GRX_P0
C103 1
UMA@
2 0.1U_0402_16V7K
HDMI_TX1HDMI_TX1+
@
+5VS
R155
715_0402_1%
UMA@
R145
715_0402_1%
UMA@
HDMI_TX0HDMI_TX0+
WCM-2012-900T_0805
HDMI_CLK-
1
R333
2
0_0402_5%
HDMI_R_CK-
HDMI_TX0+
1
R342
2
0_0402_5%
HDMI_R_D0+
VGA@
L73
4
VGA@
C701 1
2 0.1U_0402_16V7K
C700 1
2 0.1U_0402_16V7K
HDMI_TX1HDMI_TX1+
1
@
VGA@
VGA@
C699 1
2 0.1U_0402_16V7K
C698 1
2 0.1U_0402_16V7K
WCM-2012-900T_0805
HDMI_TX0-
1
R341
2
0_0402_5%
HDMI_R_D0-
HDMI_TX1+
1
R344
2
0_0402_5%
HDMI_R_D1+
HDMI_TX2HDMI_TX2+
4
VGA@
1
@
WCM-2012-900T_0805
HDMI_TX1-
1
R343
2
0_0402_5%
HDMI_R_D1-
HDMI_TX2+
1
R346
2
0_0402_5%
HDMI_R_D2+
R157
715_0402_1%
UMA@
1
@
UMA use 715 ohm

VGA use 499 ohm
HDMI_TX2-
WCM-2012-900T_0805
1
R345
2
0_0402_5%
HDMI_R_D2-
5
4
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
Q53A
Q54A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
Q53B
Q54B
2008/10/06
Issued Date
Compal Secret Data
DVT
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
L74
2
2
2
2
6
3
5
VGA@
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
HDMI_R_CK+
L75
R152
715_0402_1%
UMA@
R158
715_0402_1%
UMA@
1
2
R506 0_0402_5%
R505 0_0402_5%
1
2
Update (For Puma / Tigris default value)
2
2
2
2
6
+3VS
A
1
1
R137
715_0402_1%
UMA@
R149
715_0402_1%
UMA@
1
1
R141
715_0402_1%
UMA@
C705 1
C704 1
2
0_0402_5%
L72
4
HDMI_CLKHDMI_CLK+
HDMI_TX2HDMI_TX2+
1
1
HDMI_TX0HDMI_TX0+
HDMITX2+
VGA@
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
VGA@
UMA@
1
2
R309
0_0402_5%
1
2
R307
0_0402_5%
UMA@
HDMITX2-
2 0.1U_0402_16V7K
UMA@
1
1
HDMI_CLKHDMI_CLK+
1
R340
Rev
C
401679
Sheet

1
25
of
57
CRT CONNECTOR
+5VS
+R_CRT_VCC
D25
+CRT_VCC
W=40mils
F1
D28
D27
D26
DAN217_SC59 DAN217_SC59 DAN217_SC59
2
1
RB491D_SC59-3 1.1A_6VDC_FUSE
C622
0.1U_0402_16V4Z
+5VS
JCRT1
CRT_R
11 GMCH_CRT_G
2 UMA@ 1
R277
0_0402_5%
CRT_G
2 UMA@ 1
R274
0_0402_5%
CRT_B
15 VGA_CRT_G
2 VGA@ 1
R495
0_0402_5%
15 VGA_CRT_B
2 VGA@ 1
R494
0_0402_5%
UMA@
C640
UMA@
C662
UMA@
FCM2012C-800_0805
1
2
5P_0402_50V8C
2 VGA@ 1
R493
0_0402_5%
C633
5P_0402_50V8C
15 VGA_CRT_R
R273
5P_0402_50V8C
DVT
R276
2
1
150_0402_1%
R285
2
1
150_0402_1%
L52
2
1
140_0402_1%
11 GMCH_CRT_B
FCM2012C-800_0805
2
L54
1
C667
2
UMA@
1
C660
2
UMA@
CRT_R_1
FCM2012C-800_0805
CRT_R_2
2
L55
1
FCM2012C-800_0805
CRT_G_2
2
DDCDATA
CRT_G_1
FCM2012C-800_0805
CRT_B_2
2
+CRT_VCC
HSYNC
CRT_B_1
L53
1
1
C639
2
UMA@
6P_0402_50V8K
2 UMA@ 1
R291
0_0402_5%
L58
1
6P_0402_50V8K
11 GMCH_CRT_R
FCM2012C-800_0805
1
2
6P_0402_50V8K
L57
VSYNC
DDCCLK
UMA@
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
RGND
ID0
Red
GGND
SDA
Green
BGND
Hsync
Blue
+5V
Vsync
res
SGND
SCL
GND
16
17
GND
GND
SUYIN_070546FR015S263ZR
CONN@
CRT_DET# 28
2
R269
100K_0402_5%
+CRT_VCC
1
1
PX_GPIO2_R
2
G
Q43
2N7002_SOT23
@
R507
10K_0402_5%
VGA@
R475
10K_0402_5%
UMA@
Place closed to chipset

+CRT_VCC
+3VS_DELAY
DVT
U25
UMA@
DDCDATA
R57
DDCDATA_R
5
1
R44
DDCCLK_R
VSYNC_L
U26
UMA@
R48
10K_0402_5%
VGA@
2
6
VGA_CRT_DATA 15
VGA_CRT_CLK 15
Q6B
2N7002DW-T/R7_SOT363-6
VGA@
33_0402_5%
L51
1
R55
10K_0402_5%
VGA@
Q6A
2N7002DW-T/R7_SOT363-6
VGA@
3
33_0402_5%
2
1
2
FCM1608C-121T_0603
HSYNC
2
DDCCLK
P
OE#
R46
4.7K_0402_5%
UMA@
2
5
1
P
OE#
L50
1
HSYNC_L
1
2
C628
0.1U_0402_16V4Z
UMA@
2
R54
4.7K_0402_5%
UMA@
PX_GPIO2_R
DVT
1
2
C626
0.1U_0402_16V4Z
UMA@
2
+CRT_VCC
+3VS
DVT
R487 0_0402_5%
PX_GPIO2#
11,24,38 PX_GPIO2
U34
VGA@
5
1
P
OE#
VSYNC_L
+CRT_VCC
R268
10K_0402_5%
@
R471
10K_0402_5%
@
@
15,22 VGA_CRT_VSYNC
+3VS
U33
VGA@
5
1
P
OE#
1
2
C678
0.1U_0402_16V4Z
VGA@
2
+3VS
HSYNC_L
15,22 VGA_CRT_HSYNC
PX_GPIO2#
1
2
C674
0.1U_0402_16V4Z
VGA@
2
FCM1608C-121T_0603
VSYNC
2
1
R58
2
0_0402_5%
GMCH_CRT_DATA 11
2
0_0402_5%
GMCH_CRT_CLK 11
UMA@
1
R47
UMA@
DVT
DVT
U36
PX_GPIO2_R
4
GMCH_CRT_R
VGA_CRT_R
GMCH_CRT_G
VGA_CRT_G
GMCH_CRT_B
VGA_CRT_B
L : D-->S1 (INTERNAL GRAPHIC)

H: D-->S2 (EXTERNAL GRAPHIC)
15
1
EN
IN
2
3
5
6
11
10
14
13
S1A
S2A
S1B
S2B
S1C
S2C
S1D
S2D
+5VS
VCC
16
DA
DB
DC
DD
4
7
9
12
GND
1
CRT_R
CRT_G
CRT_B
C850
0.1U_0402_16V4Z
@
2008/10/06
Issued Date
Compal Secret Data
IDTQS3257QG_QSOP16
@
2009/10/06
Deciphered Date
Title
Size
B
MP(mask)
Date:
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet

E
26
of
57
U14A
PCIE_CALRN=W/S=4/8(55ohm impedance), <1"
+PCIE_VDDR
+1.2V_HT
R356
R173
L78
1
2
MBC1608121YZF_0603
+SB_PCIEVDD
C762
1U_0402_6.3V4Z
SB700
A_RST#
V23
V22
V24
V25
U25
U24
T23
T22
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
U22
U21
U19
V19
R20
R21
R18
R17
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
562_0402_1% T25
2.05K_0402_1% T24
1
1
C757
2.2U_0603_6.3V4Z
Part 1 of 5
PCIE_CALRP
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
+3VALW
C798
U30
Y
PLT_RST#
PLT_RST# 11,13,14,24,33,34,36,38
23 CLK_SBSRC_BCLK
23 CLK_SBSRC_BCLK#
R426
8.2K_0402_5%
@
C853 @ 100P_0402_25V8K @
2
1
2
R470
1
100_0402_5%
23 SB710_CLK_14M
3
For Tigris
N25
N24
PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN
K23
K22
NB_DISP_CLKP
NB_DISP_CLKN
M24
M25
NB_HT_CLKP
NB_HT_CLKN
P17
M18
CPU_HT_CLKP
CPU_HT_CLKN
M23
M22
SLT_GFX_CLKP
SLT_GFX_CLKN
J19
J18
GPP_CLK0P
GPP_CLK0N
L20
L19
GPP_CLK1P
GPP_CLK1N
M19
M20
GPP_CLK2P
GPP_CLK2N
N22
P22
GPP_CLK3P
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
Close to SB
@ R380 20M_0402_5%
@R380
1
2
PCI INTERFACE
J20
CLOCK GENERATOR
0.1U_0402_16V4Z
2
A_RST#
2
2
PCIE_PVDD=43mA
SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
SB_RX2P_C
SB_RX2N_C
SB_RX3P_C
SB_RX3N_C
25M_X2
C779
SB_32KHI
X1
OUT
NC
IN
NC
SB_32KHO
B3
X2
32.768KHZ_12.5P_1TJS125BJ4A421P
LPC
SB_32KHO
11 ALLOW_LDTSTOP
6 H_PROCHOT_R#
6
H_PWRGD
6,11 LDT_STOP#
6
LDT_RST#
H_PROCHOT_R#
ALLOW_LDTSTP
PROCHOT#
LDT_PG
LDT_STP#
LDT_RST#
PCIRST#
N1
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
AD3
AC4
AE2
AE3
RTCCLK
INTRUDER_ALERT#
VBAT
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
DVT
PX_GPIO1_SB_R
PX_GPIO1_SB 38
GPU_POWER ENABLE (SB->EC)
R476 1 @
2 0_0402_5%
PX_GPIO1 38,45
GPU_1.1VS (SB->MOS)
DVT
PX_GPIO0_SB
1 @
R482
CLK_LPC_EC
G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15
1
R357
H_PWRGD_L 53
C3
C2
B2
1
R403
2
1M_0402_5%
FDV301N_NL_SOT23-3
2008/10/06
Issued Date
RTC_CLK 31
+RTCVCC
R237
1K_0402_5%
STRAP PIN
+RTCVCC
1 C794
2
510_0402_5%
W=20mils
R397
@
for Clear CMOS
C566
0_0603_5%
BAS40-04_SOT23-3
+CHGRTC

2009/10/06
Deciphered Date
Title
Date:
SCHEMATIC A4921P
Custom
level shift to ISL6265

A
Compal Secret Data
Q35
STRAP PIN
+RTCBATT
1U_0402_6.3V4Z
1
1
CLK_PCI_EC 31,38
LPCCLK1 31
GPU_RST#
SERIRQ 38
C795 1
PX_GPIO0 14
CLK_PCI_EC
2
22_0402_5%
D22
H_PWRGD
2
0_0402_5%
LPC_AD0 38
LPC_AD1 38
LPC_AD2 38
LPC_AD3 38
LPC_FRAME# 38
SA00001S570 S IC 218S7EBLA12FG SB700 BGA 528P SB 0FA
R355
4.7K_0402_5%
31
31
31
31
31
31
0.1U_0402_16V4Z
+3VS
2 0_0402_5%
1
R400
218S7EALA11FG_BGA528_SB700
+1.8VS
4
31
31
31
31
R496 1 @
RTC
18P_0402_50V8J
F23
F24
F22
G25
G24
P4
P3
P1
P2
T4
T3
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
SERIRQ
CPU
A3
Y4
R382
20M_0603_5%
C787
SB_32KHI
RTC XTAL
18P_0402_50V8J
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/GPIO41
PCIE_CALRP=W/S=4/8(55ohm impedance), <1"
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2
2
2
2
2
2
2
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
1
1
1
1
1
1
1
1
0.1U_0402_16V4Z
10
10
10
10
10
10
10
10
C468
C465
C459
C431
C429
C430
C460
C464
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
10
10
10
10
10
10
10
10
PCI CLKS
N2
PCI EXPRESS INTERFACE
A_RST#
Rev
C
401679
Sheet

E
27
of
57
+3VALW
R368
100K_0402_5%
EC_RSMRST#
D3
CRT_DET
1
R405
38
38
38
6,11,41
11
SUS_STAT#
2
4.7K_0402_5%
38
38
38
38
SUS_STAT#
EC_GA20
EC_KBRST#
EC_SCI#
EC_SMI#
36 SB_PCIE_WAKE#
33
CR_PE#
6 H_THERMTRIP#
11 NB_PWRGD
EC_RSMRST#
2
2.2K_0402_5%
1
R404
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD
SUS_STAT#
38 EC_RSMRST#
PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S2/GPM9#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
TEST2
TEST1
TEST0
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#
NB_PWRGD
USBCLK/14M_25M_48M_OSC
C8
USB_RCOMP
G8
USB_FSD13P
USB_FSD13N
E6
E7
USB20_P13
USB20_N13
USB_FSD12P
USB_FSD12N
F7
E8
USB20_P12
USB20_N12
USB_HSD11P
USB_HSD11N
H11
J10
USB_HSD10P
USB_HSD10N
E11
F11
USB_HSD9P
USB_HSD9N
A11
B11
USB_HSD8P
USB_HSD8N
C10
D10
USB_HSD7P
USB_HSD7N
G11
H12
USB_HSD6P
USB_HSD6N
E12
E14
USB_HSD5P
USB_HSD5N
C12
D12
USB MISC
CR_PE#
H_THERMTRIP#
NB_PWRGD
E1
E2
H7
F5
G1
H2
H1
K3
H5
H4
H3
Y15
W15
K4
K24
F1
J2
H6
F2
J6
W14
EC_SWI#
RSMRST#
SB700 has internal PD
2 10K_0402_5%
CR_WAKE#
R183 1
2 2.2K_0402_5% ICH_SMBCLK0
R179 1
2 2.2K_0402_5% ICH_SMBDATA0
33
+3VS
SATA_IS0#/GPIO10
CLK_REQ3#/SATA_IS1#/GPIO6
SMARTVOLT1/SATA_IS2#/GPIO4
CLK_REQ0#/SATA_IS3#/GPIO0
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
SCL1/GPOC2#
SDA1/GPOC3#
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
LLB#/GPIO66
SMARTVOLT2/SHUTDOWN#/GPIO5
DDR3_RST#/GEVENT7#
USB 2.0
DVT
R182 1
AE18
CR_WAKE#
AD18
CR_WAKE#
AA19
R509 1 VGA@ 2 2.2K_0402_5%
SKU_ID
W17
V17
R510 1 UMA@ 2 2.2K_0402_5%
W20
W21
42
SB_SPKR
ICH_SMBCLK0
AA18
ICH_SMBDATA0 W18
K1
SB_SPKR=W/S=4/4(55ohm impedance)
K2
AA20
Y18
C1
Y19
G5
R414
R413
42 HDA_BITCLK_AUDIO
41 HDA_BITCLK_MDC
41
42
42
41
R415
R416
HDA_SDOUT_MDC
HDA_SDOUT_AUDIO
HDA_SDIN0
HDA_SDIN1
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
41 HDA_SYNC_MDC
42 HDA_SYNC_AUDIO
42 HDA_RST_AUDIO#
41 HDA_RST_MDC#
31
EC_LID_OUT#
38 EC_LID_OUT#
1
1
2
2
1
1
2
2
R391
R412
R408
R409
36
37
37
HDA_BITCLK
USB_OC#2
USB_OC#1
USB_OC#0
USB_OC#2
USB_OC#1
USB_OC#0
HDA_SDIN0
HDA_SDIN1
33_0402_5%
33_0402_5%
1
1
HDA_SYNC
2
2
1
1
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GPM5#
USB_OC4#/IR_RX0/GPM4#
USB_OC3#/IR_RX1/GPM3#
USB_OC2#/GPM2#
USB_OC1#/GPM1#
USB_OC0#/GPM0#
M1
M2
J7
J8
L8
M3
L6
M4
L5
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO42
AZ_SDIN1/GPIO43
AZ_SDIN2/GPIO44
AZ_SDIN3/GPIO46
AZ_SYNC
AZ_RST#
AZ_DOCK_RST#/GPM8#
AMD (un-used)
HDA_SDOUT
33_0402_5%
33_0402_5%
B9
B8
A8
A9
E5
F8
E4
HDA_RST#
2
2
INTEGRATED uC
SB_PCIE_WAKE#
2
10K_0402_5%
EC_LID_OUT#
2
100K_0402_5%
HD AUDIO
1
R388
@
1
R379
USB OC
+3VALW
HDA_RST#
H19
H20
H21
F25
IMC_GPIO0
IMC_GPIO1
SPI_CS2#/IMC_GPIO2
IDE_RST#/F_RST#/IMC_GPO3
D22
E24
E25
D23
IMC_GPIO4
IMC_GPIO5
IMC_GPIO6
IMC_GPIO7
INTEGRATED uC
STRAP PIN
C775 1
2
100_0402_5%
2 100P_0402_25V8K
1
CLK_48M_USB 23
USB_RCOMP 1
11.8K_0402_1%
USB20_P8
USB20_N8
USB20_P6
USB20_N6
USB_HSD4P
USB_HSD4N
B12
A12
USB20_P4
USB20_N4
USB_HSD3P
USB_HSD3N
G12
G14
USB20_P3
USB20_N3
USB_HSD2P
USB_HSD2N
H14
H15
USB_HSD1P
USB_HSD1N
A13
B13
USB20_P1
USB20_N1
USB_HSD0P
USB_HSD0N
B14
A14
USB20_P0
USB20_N0
IMC_GPIO8
IMC_GPIO9
IMC_PWM0/IMC_GPIO10
SCL2/IMC_GPIO11
SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13
SDA3_LV/IMC_GPIO14
IMC_PWM1/IMC_GPIO15
IMC_PWM2/IMC_GPO16
IMC_PWM3/IMC_GPO17
A18
B18
F21
D21
F19
E20
E21
E19
D19
E18
IMC_GPIO18
IMC_GPIO19
IMC_GPIO20
IMC_GPIO21
IMC_GPIO22
IMC_GPIO23
IMC_GPIO24
IMC_GPIO25
G20
G21
D25
D24
C25
C24
B25
C23
IMC_GPIO26
IMC_GPIO27
IMC_GPIO28
IMC_GPIO29
IMC_GPIO30
IMC_GPIO31
IMC_GPIO32
IMC_GPIO33
IMC_GPIO34
IMC_GPIO35
IMC_GPIO36
IMC_GPIO37
IMC_GPIO38
IMC_GPIO39
IMC_GPIO40
IMC_GPIO41
B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18
GPIO
+3VS
1
R376
Part 4 of 5
SB700
USB 1.1
38
+3VS
U14D
demo circuit LID use RI#
ACPI / WAKE UP EVENTS
CRT_DET#
CRT_DET
D
26
2
Q37G
2N7002_SOT23
2
R370
USB20_P13 36
USB20_N13 36
USB-13 Fingerprint
USB20_P12 37
USB20_N12 37
USB-12 Bluetooth
USB20_P8 36
USB20_N8 36
USB-8 MiniCard(WLAN)
USB20_P6 37
USB20_N6 37
USB-6 Int USB 1st

(Dedicated HS USB port / lower-left)
DVT2
USB20_P4 33
USB20_N4 33
USB-4 USB Card reader
USB20_P3 24
USB20_N3 24
USB-3 USB Camera
USB20_P1 37
USB20_N1 37
USB-1 Int USB 2nd (W/eSATA) --> Reserved
USB20_P0 36
USB20_N0 36
USB-0 Ext USB 3rd
DVT
GPIO16 31
GPIO17 31
STRAP PIN
STRAP PIN
3
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

E
28
of
57
U14B
Close chip
DVT
R371
10M_0402_5%
Y3
2
25MHZ_20P
SATA_STX_DRX_P2
SATA_STX_DRX_N2
SATA_X1
1 C770
10P_0402_50V8J
@
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
@
37 SATA_DTX_C_SRX_N2
37 SATA_DTX_C_SRX_P2
DVT
C862 1
C863 1
37 SATA_STX_C_DRX_P2
37 SATA_STX_C_DRX_N2
SATA_STX_DRX_P1
SATA_STX_DRX_N1
1 C772
SATA_CAL=W/S=9/20(35ohm impedance), <1"

SATA_CAL
1
1K_0402_1%
SATA_X1
1
@ 1K_0402_1%
SATA_X2
10K_0402_5%
2
2
R375
2
R466
SATA_X2
10P_0402_50V8J
+3VS R377 1
40 SATA_LED#
+1.2V_HT
L82
PLLVDD_SATA=93mA
C784
2.2U_0603_6.3V4Z
C783
0.1U_0402_16V4Z
+3VS
L81
2
1
BLM18PG121SN1D_0603
XTLVDD_SATA=6mA
C777
1U_0402_6.3V4Z
SATA_TX1P
SATA_TX1N
AD11
AE11
SATA_RX1N
SATA_RX1P
AB12
AC12
SATA_TX2P
SATA_TX2N
AE12
AD12
SATA_RX2N
SATA_RX2P
AD13
AE13
SATA_TX3P
SATA_TX3N
AB14
AC14
SATA_RX3N
SATA_RX3P
AE14
AD14
SATA_TX4P
SATA_TX4N
AD15
AE15
SATA_RX4N
SATA_RX4P
AB16
AC16
SATA_TX5P
SATA_TX5N
AE16
AD16
SATA_CAL
Y12
SATA_X1
AA12
SATA_X2
+XTLVDD_SATA
2
1
C776
0.1U_0402_16V4Z
SATA_ACT#/GPIO67
AA11
PLLVDD_SATA
W12
XTLVDD_SATA
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
AD24
AD23
AE22
AC22
AD21
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23
2
SATA_RX5N
SATA_RX5P
V12
W11
+PLLVDD_SATA
2
1
BLM18PG121SN1D_0603
AE10
AD10
IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#
AA24
AA25
Y22
AB23
Y23
AB24
AD25
AC25
AC24
Y25
Y24
Part 2 of 5
ATA 66/100/133
eSATA
(Reserved)
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_RX0N
SATA_RX0P
SPI ROM
C522 1
C519 1
ODD
SATA_TX0P
SATA_TX0N
AB10
AC10
SB700
HW MONITOR
AD9
AE9
SERIAL ATA
SATA_STX_DRX_P0
SATA_STX_DRX_N0
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA PWR
C504 1
C507 1
HDD
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS1#/GPIO32
G6
D2
D1
F4
F3
LAN_RST#/GPIO13
ROM_RST#/GPIO14
U15
J1
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
M8
M5
M7
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
P5
P8
R8
TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
C6
B6
A6
A5
B5
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
A4
B4
C4
D4
D5
D6
A7
B7
AVDD
F6
AVSS
G7
EC_THERM# 38
2
D30
1
RB751V_SOD323
R369 2
R374 2
+3VALW
ACIN
1 100K_0402_5%
+3VALW
1 100K_0402_5%
+3VS
15,38,40,46,49
AVDD=5mA
Pri/SEC,Mas/Slave assignment
SATA drive controlled by
Port 0
Primary master
SATA controler
Port 1
Secondary master
SATA controler
Port 2
Primary slave
SATA controler
Port 3
Secondary slave
SATA controler
Port 4
Primary (Secondary) master
PATA controler
Port 5
Primary (Secondary) slave
PATA controler
Port Number
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

E
29
of
57
U14C
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Y20
AA21
AA22
AE25
VDD33_18_1
VDD33_18_2
VDD33_18_3
VDD33_18_4
PCIE_VDDR=0.6A
+1.2V_HT
+PCIE_VDDR
L37
2
1
FBMA-L11-201209-221LMA30T_0805
C466 1
C763 1
2 4.7U_0805_10V4Z
2 1U_0402_6.3V4Z
C759 1
C497 1
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
1
1
1
1
1
2
2
2
2
2
L21
L22
L24
L25
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
22U_0805_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AA14
AB18
AA15
AA17
AC18
AD17
AE17
AVDD_SATA_1
AVDD_SATA_4
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
S5_3.3V_7
A17
A24
B17
J4
J5
L1
L2
S5_1.2V_1
S5_1.2V_2
G2
G4
C481 1
2
2
2
2
A16
B16
C16
D16
D17
E17
F15
F17
F18
G15
G17
G18
10U_0805_10V4Z
10U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2 0.1U_0402_16V4Z
AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDTX_5
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4
AVDDRX_5
PLL
1
1
1
1
C478
C487
C494
C482
1
1
1
1
+1.2V_HT
T10
U10
U11
U12
V11
V14
W9
Y9
Y11
Y14
Y17
AA9
AB9
AB11
AB13
AB15
AB17
AC8
AD8
AE8
AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
A15
B15
C14
D8
D9
D11
D13
D14
D15
E15
F12
F14
G9
H9
H17
J9
J11
J12
J14
J15
K10
K12
K14
K15
S5_3.3V=32mA
AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
+S5_3V
2.2U_0603_6.3V4Z
C769
2.2U_0603_6.3V4Z
C486
S5_1.2V=113mA
+S5_1.2V
+1.2VALW
USB_PHY_1.2V=197mA
+1.2_USB
A10
B10
C797 2
C796 2
2
1
L80 FBMA-L11-160808-221LMT 0603
C771 1
2 10U_0805_10V4Z
1 1U_0402_6.3V4Z
1 1U_0402_6.3V4Z
1 0.1U_0402_16V4Z
1 0.1U_0402_16V4Z
+AVDD_USB
L38
2
1
FBMA-L11-201209-221LMA30T_0805
C461
C469
C495
C485
2
2
2
2
SB700
+1.2VALW
USB_PHY_1.2V_1
USB_PHY_1.2V_2
USB I/O
+3VALW
+1.2V_CKVDD
C773 2
C774 2
AVDDTX/RX=658mA
2
+1.2V_HT
0_0805_5%
C467
2
+3VALW
SATA I/O
+1.2V_SATA
L79
2
1
FBMA-L11-201209-221LMA30T_0805
C764
C766
C765
C767
C768
CKVDD_1.2V_1
CKVDD_1.2V_2
CKVDD_1.2V_3
CKVDD_1.2V_4
1
R171
10U_0805_10V4Z
POWER
P18
P19
P20
P21
R22
R24
R25
AVDD_SATA=567mA
+1.2V_HT
U14E
+1.2V_SB_CORE
VDD=138mA
VDD33=71mA
+3VS
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
Part 3 of 5
CLKGEN I/O
2
2
2
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
CORE S0
22U_0805_6.3V6M
3.3V_S5 I/O
1
1
1
L15
M12
M14
N13
P12
P14
R11
R15
T16
CORE S5
C489
C499
C493
IDE/FLSH I/O
C472
VDD=0.51A
SB700
A-LINK I/O
+3VS
L9
M9
T15
U9
U16
U17
V8
W7
Y6
AA4
AB5
AB21
PCI/GPIO I/O
VDDQ=131mA
V5_VREF=1mA
V5_VREF
AE7
+V5_VREF
AVDDCK_3.3V
J16
+AVDDCK_3.3V
K17
+AVDDCK_1.2V
E9
+AVDDC
AVDDCK_1.2V
AVDDC
1K_0402_5% 2
1 R386
+5VS
D31
1
2
+3VS
C786
1U_0402_6.3V4Z CH751H-40PT_SOD323-2
AVDDC=17mA
L42
2
1
BLM18PG121SN1D_0603
F9
+3VALW
2.2U_0603_6.3V4Z
C484
0.1U_0402_16V4Z
C496
H18
J17
J22
K25
M16
M17
M21
P16
PCIE_CK_VSS_1
PCIE_CK_VSS_2
PCIE_CK_VSS_3
PCIE_CK_VSS_4
PCIE_CK_VSS_5
PCIE_CK_VSS_6
PCIE_CK_VSS_7
PCIE_CK_VSS_8
AVSSC
GROUND
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
PCIE_CK_VSS_9
PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
PCIE_CK_VSS_15
PCIE_CK_VSS_16
PCIE_CK_VSS_17
PCIE_CK_VSS_18
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_21
Part 5 of 5
AVSSCK
A2
A25
B1
D7
F20
G19
H8
K9
K11
K16
L4
L7
L10
L11
L12
L14
L16
M6
M10
M11
M13
M15
N4
N12
N14
P6
P9
P10
P11
P13
P15
R1
R2
R4
R9
R10
R12
R14
T11
T12
T14
U4
U14
V6
Y21
AB1
AB19
AB25
AE1
AE24
P23
R16
R19
T17
U18
U20
V18
V20
V21
W19
W22
W24
W25
L17
AVDDCK_1.2V=62mA
+AVDDCK_1.2V
L77
2
1
BLM18PG121SN1D_0603
+1.2V_HT
2.2U_0603_6.3V4Z
C758
0.1U_0402_16V4Z
C761
AVDDCK_3.3V=47mA
+AVDDCK_3.3V
L76
2
1
BLM18PG121SN1D_0603
2.2U_0603_6.3V4Z
1 C756
0.1U_0402_16V4Z
1 C760
+3VS
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

E
30
of
57
REQUIRED STRAPS
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
PCI_CLK2
PCI_CLK3
PCI_CLK4
LPC_CLK0
PCI_CLK5 CLK_PCI_EC LPC_CLK1
BOOTFAIL
TIMER
ENABLED
USE
DEBUG
STRAPS
RESERVED
RESERVED
ENABLE PCI
MEM BOOT
CLKGEN
ENABLED
RTC_CLK AZ_RST_CD#
EC
ENABLED
INTERNAL
RTC
DEFAULT
PULL
LOW
BOOTFAIL
TIMER
DISABLED
IGNORE
DEBUG
STRAPS
DISABLE PCI CLKGEN

MEM BOOT
DISABLED
DEFAULT
DEFAULT
DEFAULT
R411
10K_0402_5%
2
1
+3VALW
R401
10K_0402_5%
2
1
+3VALW
R361
10K_0402_5%
2
1
+3VALW
R359
10K_0402_5%
2
1
+3VALW
R421
10K_0402_5%
2
1
+3VS
DEFAULT
R423
10K_0402_5%
2
1
+3VS
EC
DISABLED
R425
10K_0402_5%
2
1
+3VS
DEFAULT
GP17
GP16
Internal pull up
H,H = Reserved
1
H,L = SPI ROM
EXT. RTC
(PD on X1,
apply
32KHz to
RTC_CLK)
R427
10K_0402_5%
2
1
+3VS
L,H = LPC ROM (Default L,NC)

L,L = FWH ROM
+3VALW
+3VALW
R367
2.2K_0402_5%
2
1
PULL
HIGH
R363
2.2K_0402_5%
2
1
27
PCI_CLK2
27
PCI_CLK3
27
PCI_CLK4
27
PCI_CLK5
27,38 CLK_PCI_EC
27
LPCCLK1
27
RTC_CLK
28
HDA_RST#
28
GPIO17
28
GPIO16
R366
2.2K_0402_5%
2
1
R362
2.2K_0402_5%
2
1
R410
10K_0402_5%
2
1
R402
2.2K_0402_5%
2
1
R360
10K_0402_5%
2
1
R398
10K_0402_5%
2
1
R358
10K_0402_5%
2
1
R420
10K_0402_5%
2
1
R422
10K_0402_5%
2
1
R424
10K_0402_5%
2
1
DEBUG STRAPS
PULL
LOW
PCI_AD24
PCI_AD23
USE IDE
PLL
USE DEFAULT
PCIE STRAPS
RESERVED
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
USE
SHORT
RESET
BYPASS
PCI PLL
BYPASS
ACPI
BCLK
BYPASS IDE
PLL
USE EEPROM
PCIE STRAPS
R399
2.2K_0402_5%
2
1
R396
2.2K_0402_5%
2
1
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
R392
2.2K_0402_5%
2
1
27
27
27
27
27
27
PCI_AD25
USE ACPI
BCLK
R389
2.2K_0402_5%
2
1
PCI_AD26
USE PCI
PLL
R395
2.2K_0402_5%
2
1
PCI_AD28
PULL
HIGH
PCI_AD27
USE
LONG
RESET
R393
2.2K_0402_5%
2
1
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

E
31
of
57
SATA ODD Conn.
JSATA1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SATA_STX_C_DRX_P1
SATA_STX_C_DRX_N1
C513
C510
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
1
1
Close conn
R199 1
SATA_DTX_SRX_N1
SATA_DTX_SRX_P1
@
2 1K_0402_1%
+5VS
0.1U_0402_16V4Z
1
2
C491
C490
1000P_0402_50V7K
GND
GND
16
17
OCTEK_SLS-13DB1G_NR
CONN@
Placea caps. near ODD CONN.
+5VS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
10U_0805_10V4Z
C492
C505
2
1U_0402_6.3V4Z
SATA HDD Conn.

JSATA2
SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0
C515
C521
1
2
3
4
5
6
7
1
1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_DTX_SRX_N0
SATA_DTX_SRX_P0
Close conn
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
+3VS
+5VS
10U_0805_10V4Z
0.1U_0402_16V4Z
+3VS
1
C556
C554
C557
C792
2
0.1U_0402_16V4Z
1000P_0402_50V7K
+5VS
1
C551
C555
C552
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
GND
HTX+
HTXGND
HRXHRX+
GND
VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
VCC12
GND
VCC12
GND
24
23
SUYIN_127043FB022GX78ZR_NR
CONN@
JALA0 (CL 9.2mm)

for ESD issue
Issued Date
Compal Secret Data
2008/10/06
2009/10/06
Deciphered Date
Title
Size
B
SCHEMATIC A4921P
Document Number
Date:

G
Rev
C
401679
Sheet
32
H
of
57
+3VS
+1.8VS_APVDD
1
C550
+3V_MCVCC
1
C540
1
C531
C558
0.1U_0402_16V4Z
1
C559
1
C536
XDCD0#_SDCD#
1
C542
XDCD1#_MSCD#
JMB385@ JMB385@ JMB385@ JMB385@ JMB385@

2
2
2
2
2
10U_0805_10V4Z
0.1U_0402_16V4Z
1000P_0402_50V7K
JMB385@ JMB385@ JMB385@ JMB385@

2
2
2
2
0.1U_0402_16V4Z
C562
0.1U_0402_16V4Z
D20
2
R226
10K_0402_5%
JMB385@
XD_CD#
3
28
C553
270P_0402_50V7K
JMB385@
DAN202UT106_SC70-3
JMB385@
XD_CLE
R217
XDCD0#_SDCD#
R224
XDCD1#_MSCD#
R225
XD_RE
R212
XD_ALE
R216
CR_PE#
D
XDWP_SDWP
1
2
R218
JMB385@ 10K_0402_5%
XD_RB
1
2
R214
JMB385@ 10K_0402_5%
0.1U_0402_16V4Z
1
C538
+3VALW
40mil
0.1U_0402_16V4Z
40mil
0.1U_0402_16V4Z
JMB385@
CR_PE
2
G
Q24
2N7002_SOT23
JMB385@
U21
APCLKN
APCLKP
PCIE_ITX_C_PRX_N4
PCIE_ITX_C_PRX_P4
9
8
APRXN
APRXP
11
12
APTXN
APTXP
JMB385@
C560 1
PCIE_PTX_IRX_N4
2 0.1U_0402_16V7K
PCIE_PTX_IRX_P4
C561 1
2 0.1U_0402_16V7K
JMB385@
R227 1
2 8.2K_0402_5% APREXT
10 PCIE_PTX_C_IRX_N4
10 PCIE_PTX_C_IRX_P4
38
39
+3VS
28
CR_WAKE#
PCIES_EN
PCIES
1
2
PLT_RST#
D19
CH751H-40PT_SOD323-2
1
2
APREXT
APREXT 15 mil
JMB385@
11,13,14,24,27,34,36,38
CR_PE
13
14
XDCD1#_MSCD#
XDCD0#_SDCD#
15
16
XRSTN
XTEST
SEEDAT
SEECLK
DV33
DV33
DV33
DV18
DV18
19
20
44
18
37
MDIO0
MDIO1
MDIO2
MDIO3
MDIO4
MDIO5
MDIO6
MDIO7
MDIO8
MDIO9
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
48
47
46
45
43
42
41
40
29
28
27
26
25
23
22
NC
NC
NC
34
35
36
APGND
17
CR1_PCTLN
21
5IN1_LED#
5
10
30
CR1_CD1N
CR1_CD0N
+3V_MCVCC
JMB385@
40
JMB385
APVDD
APV18
TAV33
GND
GND
GND
GND
CR1_LEDN
+1.8VS_APVDD
RTS5159@
2
1
R672
0_0402_5%
2
1
R675
0_0402_5%
XDCE#
+3VS
XDCE_SDCLK_MSCLK
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
SDCMD_MSBS_XDWE#
XDCE_SDCLK_MSCLK
XDWP_SDWP
XD_CLE
XD_D4
XD_D5
XD_D6
XD_D7
XD_RE
XD_RB
XD_ALE
JMB385@
2
1
R678
0_0402_5%
RTS5159@
SDDAT2_XDRE#
2
1
R679
0_0402_5%
2
1
R681
0_0402_5%
RTS5159@
JMB385@
XD_SD_MS_D3
2
1
R684
0_0402_5%
SDDAT3_XDWE#
2
1
R685
0_0402_5%
RTS5159@
2
1
R687
0_0402_5%
RTS5159@
SDCMD_MSBS_XDWE# 2
1
R686
0_0402_5%
JMB385@
XD_SD_MS_D2
JMB385@
JMB385@
JMB385@
XDWP_SDWP
2
1
R688
0_0402_5%
SDDAT4_XDWP#_MSD7 2
1
R689
0_0402_5%
RTS5159@
2
1
R690
0_0402_5%
RTS5159@
XD_D4
2
1
R729
0_0402_5%
JMB385@
6
24
31
32
33
JMB385-LGEZ0A_LQFP48_7X7
JMB385@
RTS5159@
+CARDPWR
RTS5159@
C869
4.7U_0603_6.3V6K
@
C870
0.1U_0402_16V4Z
RTS5159@
CLK_48M_SD
28
28
USB20_N4
USB20_P4
USB20_N4
USB20_P4
5IN1_LED#
4
5
14
C871
47P_0402_50V8J
@
1
2
R724
10_0402_5%
RTS5159@
C873
R717
100K_0402_5%
10P_0402_50V8J
2 RTS5159@
C867
0.1U_0402_16V4Z
RTS5159@
RTS5159@
+3V_MCVCC
RTS5159@
1
2
R727
0_0603_5%
+CARDPWR
CLK_48M_SD
RREF
12
32
DGND
DGND
6
46
AGND
AGND
R726
0_0402_5%
C872
1U_0402_6.3V4Z
RTS5159@
R722
0_0402_5%
RTS5159@
2
2
RTS5159@
R725
1
MODE_SEL
RST#
2
0_0402_5%
1
R728
DM
DP
GPIO0
CLK_48M_SD
R722 stuff for RTS5159
R721
100K_0402_5%
3V3_IN
RST#
MODE_SEL
XTLO
XTLI
Internal 200K PU
AV_PLL
NC
NC
CARD_3V3
D3V3
D3V3
23
RST#
MODE_SEL
T68 PAD
+3VS
1
3
7
9
11
33
8
44
45
47
48
6.19K_0402_1%
2
+3VS
XDCE#_R
SD_D2
XD_D0
SD_D3
XDWP
SD_D4
+3VS
10K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
1
200K_0402_5%
200K_0402_5%
JMB385@
2
1
R704
0_0402_5%
2
1
R705
0_0402_5%
2 RTS5159@
1
R707
0_0402_5%
RTS5159@
DVT2
XD_D2
SD_D7
RTS5159@
XD_SD_MS_D0
2
1
R708
0_0402_5%
XD_D6
2
1
R709
0_0402_5%
RTS5159@
RTS5159@
2
1
R732
0_0402_5%
RTS5159@
XDD4_SDDAT1
2
1
R714
0_0402_5%
JMB385@
MS_D1
2
1
R711
0_0402_5%
2
1
R710
0_0402_5%
RTS5159@
XD_SD_MS_D3
2
1
R730
0_0402_5%
RTS5159@
JMB385@
MSBS
2
1
R712
0_0402_5%
2
1
R713
0_0402_5%
RTS5159@
XD_D5
2
1
R731
0_0402_5%
RTS5159@
XD_D4
JMB385@
SD_D7
2
1
R698
0_0402_5%
SDDAT6_XDD7_MSD3
2
1
R699
0_0402_5%
RTS5159@
RTS5159@
SDDAT6_XDD7_MSD3 2
MS_D3
1
R700
0_0402_5%
XD_SD_MS_D3
2
1
R701
0_0402_5%
JMB385@
JMB385@
XD_D6
SD_D6
2
1
R702
0_0402_5%
SDDAT6_XDD7_MSD3 2
1
R703
0_0402_5%
RTS5159@
XD_SD_MS_D1
SDDAT1_XDD3_MSD1
SDCMD_MSBS_XDWE#
XDD5_MSBS
JREAD1
3
+3V_MCVCC
VREG
MS_D4
NC
10
22
30
VREG 1
2
C868
1U_0402_6.3V4Z
RTS5159@
XD_CLE_SP19
XD_CE#_SP18
XD_ALE_SP17
SD_DAT2/XD_RE#_SP16
SD_DAT3/XD_WE#_SP15
XD_RDY_SP14
SD_DAT4/XD_WP#/MS_D7_SP13
SD_DAT5/XD_D0/MS_D6_SP12
SD_CLK/XD_D1/MS_CLK_SP11
MS_INS#_SP9
XD_D5_SP5
XD_D4/SD_DAT1_SP4
SD_CD#_SP3
SD_WP_SP2
XD_CD#_SP1
EEDI
43
42
41
40
39
38
37
35
34
31
29
28
27
26
25
23
21
20
19
18
XD_CLE
XDCE#
XD_ALE
SDDAT2_XDRE#
SDDAT3_XDWE#
XD_RB
SDDAT4_XDWP#_MSD7
SDDAT5_XDD0_MSD6
SDCLK_XDD1_MSCLK_L
SDDAT6_XDD7_MSD3
XDCD1#_MSCD#
SDDAT7_XDD2_MSD2
SDDAT0_XDD6_MSD0
SDDAT1_XDD3_MSD1
XDD5_MSBS
XDD4_SDDAT1
XDCD0#_SDCD#
XDWP_SDWP
XD_CD#
XTAL_CTR
MS_D5
13
24
EEDO
EECS
EESK
SD_CMD
15
16
17
36
XTAL_CTR
RTS5159@
SDCLK_XDD1_MSCLK
2
1
R720
0_0402_5%
RTS5159@
2
1
R723
0_0603_5%
SDCMD_MSBS_XDWE#
XD-VCC
XD_D0
XD_D1
XD_D2
XD_SD_MS_D3
XD_D4
XD_D5
XD_D6
XD_D7
32
10
9
8
7
6
5
4
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
XDWE#
XDWP
XD_ALE
XD_CD#
XD_RB
XD_RE
XDCE#_R
XD_CLE
34
33
35
40
39
38
37
36
XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
11
31
7IN1 GND
7IN1 GND
41
42
7 IN 1 CONN
7IN1 GND
7IN1 GND
SD-VCC
MS-VCC
21
28
SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7
SD-CMD
SD-CD-SW
20
14
12
30
29
27
23
18
16
25
1
XDCE_SDCLK_MSCLK
XD_SD_MS_D0
XD_SD_MS_D1
SD_D2
SD_D3
SD_D4
SD_D5
SD_D6
SD_D7
SDCMD_MSBS_XDWE#
XDCD0#_SDCD#
SD-WP-SW
XDWP_SDWP
MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
26
17
15
19
24
22
13
XDCE_SDCLK_MSCLK
XD_SD_MS_D0
MS_D1
XD_SD_MS_D2
MS_D3
XDCD1#_MSCD#
MSBS
+3V_MCVCC
TAITW_R015-B10-LM
CONN@
+3VS
+3V_MCVCC
XTAL_CTR
Open --> 12MHz. X'tal
PU --> CLKGEN 48MHz
C541 1
C544 1
C545 1
RTS5158E,RTS5159
add C541(10U) for power drop
issue when card insertion
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
Close conn
RTS5159@
10U(RTS5159)
2008/10/06
Issued Date
Compal Secret Data
reserved Close chip
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
4 IN 1 Socket Push Type(New)
RTS5159-GR_LQFP48_7X7
RTS5159@
EMI
SDDAT0_XDD6_MSD0
RTS5159@
SDCLK_XDD1_MSCLK 2
1 XDCE_SDCLK_MSCLK
R695
0_0402_5%
2
1
R697
0_0402_5%
RTS5159@
JMB385@
XD_SD_MS_D1
XD_D1
2
1
R696
0_0402_5%
DVT2
SD_D5
XD_D7
XDWE#
2
JMB385@
2
JMB385@
2
JMB385@
2
JMB385@
2
JMB385@
RTS5159@
XD_SD_MS_D2
2
1
R706
0_0402_5%
SDDAT7_XDD2_MSD2
JMB385@
XD_RE
U41
RTS5159@
VREG
2
1
C864
0.1U_0402_16V4Z
+3V_CARD
@
1
2
R718
0_0805_5%
1
2
R719
0_0805_5%
+3VALW
JMB385@
2
1
R691
0_0402_5%
SDDAT5_XDD0_MSD6 2
1
R692
0_0402_5%
RTS5159@
2
1
R693
0_0402_5%
RTS5159@
XD_D5
2
1
R694
0_0402_5%
XD_SD_MS_D0
JMB385@
+1.8VS_APVDD
10 PCIE_ITX_C_PRX_N4
10 PCIE_ITX_C_PRX_P4
3
4
C543
R223
33P_0402_50V8K 22_0402_5%
40mil
23 CLK_PCIE_READER#
23 CLK_PCIE_READER
Rev
C
401679
Sheet

E
33
of
57
+3V_LAN
+3V_LAN
C594
0.1U_0402_16V4Z
8121@
C596
C8
C12
C4
10U_0805_10V4Z
0.1U_0402_16V4Z
2
2
2
2
10U_0805_10V4Z
1U_0402_6.3V4Z
8131@
1
2 +2.5V_VDDH
R259
0_0402_5%
R260
10K_0402_1%
8121@
Q34
1
60mil
2
0_1206_5%
1
R262
+3VALW
CTR12
1
NJT4030PT1G_SOT223
8121@
+1.2_AVDDL
1
1
C5
C6
10U_0805_10V4Z
0.1U_0402_16V4Z
8121@
8121@
2
2
C589
0.1U_0402_16V4Z
2 8131@
4
2
Place Close to Pin 2
+3V_LAN
C9
0.1U_0402_16V4Z
8131@
8131@
S INDUC_ 4.7UH +-20% SIA4012-4R7M
1 R257
2
8131@ 0_0603_5%
+2.5V_VDDH/VDD17
C591
10U_0805_10V4Z
8131@
0.1U_0402_16V4Z
@ 2
D2
10/100_LINK_LED
+2.5V_VDDH
1
2
R258 8121@ 0_0603_5%
1000_LINK_LED
1
C26
R28
4.7K_0402_1%
R25
4.7K_0402_1%
U2
1
2
3
4
LAN_LINK# 35
CHP202UPT_SOT323-3
A0
A1
A2
GND
8
7
6
5
VCC
WP
SCL
SDA
+AVDD_CEN
1
+AVDD_CEN
DVT
1
L48
+3V_LAN
+1.8_VDD/LX
2
8121@ 0_0603_5%
1
R7
TWSI_SCL
TWSI_SDA
AT24C02BN-SH-T_SO8
@
Place Close to LAN chip

U1
60mil
+1.8_VDD/LX
1
C13
1U_0402_6.3V4Z
8121@
2
+3V_LAN
C7
C11
2
2
DVT
8121@
1
1
8131@
+2.5V_VDDH/VDD17
1U_0402_6.3V4Z
CTR12
0.1U_0402_16V4Z
11,13,14,24,27,33,36,38
C24
C23
1
1
23 CLK_48M_LAN
REFCLKN
REFCLKP
40
41
TXN0/TXN0/TRXN0
TXP0/TXP0/TRXP0
RXN1/RXN1/TRXN1
RXP1/RXP1/TRXP1
NC/NC/TRXN2
NC/NC/TRXP2
NC/NC/TRXN3
NC/NC/TRXP3
14
13
18
17
21
20
24
23
AVDDL0
AVDDL1
AVDDL2
DVDDL/AVDDL/AVDDL
AVDDL3
AVDDL4
AVDDL5
42
39
36
22
16
11
8
+AVDDVCO2
+1.2_AVDDL
DVDDL0
AVDDL/DVDDL/DVDDL
DVDDL1
SPI_CLK/DVDDL/DVDDL
46
45
32
28
+1.2_DVDDL
SPI_DO/AVDDH/AVDDH
AVDDH0
AVDDH1
25
19
15
+2.5V_VDDH
PERSTn
4
37
38
44
43
WAKEn
TX_N
TX_P
RX_N
RX_P
9
10
XTLO
XTLI
34
35
TESTMODE
NC
31
33
SMCLK
SMDATA
49
GND
Close R261
SPI_DI/NC/LED_Link1000n
1000P_0402_50V7K
PCIE_PTX_IRX_N3
2 0.1U_0402_16V7K
PCIE_PTX_IRX_P3
2 0.1U_0402_16V7K
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3
@
XTALO
2
1
LAN_XTALI
R716
0_0402_5%
VAUX_AVL/VBG1P18/VBG1P18
AR8121/8131
R653
4.7K_0402_5%
2
27
26
LAN_SMBCLK
LAN_SMBDATA
R652
4.7K_0402_5%
SPI_CS/LED_DUPLEXn/LED_DUPLEXn
VDD3V/VDDHO/VDDHO
+3V_LAN
VDDLO/CTR12/CTR12
LAN_SMBDATA
R9
2 2.37K_0402_1% 12
RBIAS
LAN_MIDI0+
TWSI_SDA
TWSI_SCL
10/100_LINK_LED
30
29
48
47
VDD3V
VAUX/VREF
DVT2
TWSI_DATA
TWSI_CLK
LED_LINK10_100n
LED_ACTn
s
o
r
e
h
t
A
38
EC_PME#
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3
VDDHO/VDD18O/VDD18O
PLT_RST#
8121@
2
1 C10
10
10
10
10
LAN_MIDI0LAN_MIDI1+
LAN_ACTIVITY# 35
1
R462
2
0_0402_5%
LAN_MIDI1-
LAN_CLKREQ# 23
LAN_MIDI2+
1000_LINK_LED
LAN_MIDI2CLK_PCIE_LAN# 23
CLK_PCIE_LAN 23
LAN_MIDI0LAN_MIDI0+
LAN_MIDI1LAN_MIDI1+
LAN_MIDI2LAN_MIDI2+
LAN_MIDI3LAN_MIDI3+
LAN_MIDI0LAN_MIDI0+
LAN_MIDI1LAN_MIDI1+
LAN_MIDI2LAN_MIDI2+
LAN_MIDI3LAN_MIDI3+
LAN_MIDI3+
LAN_MIDI3-
35
35
35
35
35
35
35
35
R14
1
R15
1
R20
1
R21
1
R22
1
R24
1
R26
1
R30
1
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
PVT (SD034499A80)
1
2 C14
0.1U_0402_16V4Z
2 C18
0.1U_0402_16V4Z
2 C21
0.1U_0402_16V4Z
2 C25
0.1U_0402_16V4Z
Place Close to Pin151925

C608 close to Pin15
C601
0.1U_0402_16V4Z
+2.5V_VDDH
C608
1U_0402_6.3V4Z
+AVDDVCO1
+1.2_AVDDL
C598
0.1U_0402_16V4Z
+1.2_AVDDL
L1
FBMA-L11-201209-221LMA30T_0805
1
2
8121@
LAN_SMBCLK
+1.2_DVDDL
AR8131L-AL1E_QFN48_6X6
SA000038N00 S IC AR8131L-AL1E QFN 48P E-LAN CTRL PVT

1
SA000025M00 S IC AR8121-AL1E QFN 48P E-LAN CTRL
Place Close to Pin 28324546

C15 and C607 close to Pin46
C16 close to Pin45
LAN_XTALI
XTALO
R261
200_0402_1%
Y2
1
1
+1.2_DVDDL
1
8121@
8131@
C15
1U_0402_6.3V4Z
C16
C17
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
1
1
2
2
C607
0.1U_0402_16V4Z
C606
0.1U_0402_16V4Z
Place Close to Pin816223639

C590 and C595 close to Pin8
1
8121@
2
2
C595
0.1U_0402_16V4Z
25MHZ_20P
C599
1000P_0402_50V7K
2
2
C605
0.1U_0402_16V4Z
C602
0.1U_0402_16V4Z
L2
+AVDDVCO1
1
C600
1U_0402_6.3V4Z
+AVDDVCO2
2
0_0603_5%
1
C20
0.1U_0402_16V4Z
If overclocking, R264 , L2 stuffed and R263 removed.
2 LAN_XTALO
C593
27P_0402_50V8J
0_0603_5%
2
C597
C604
0.1U_0402_16V4Z 0.1U_0402_16V4Z
+1.2_AVDDL
8131@
C590
1U_0402_6.3V4Z
R264
1
@
R263
0_0603_5%
If not overclocking, R263 , L2 suffed and R264 removed.

AR8131:L2=0ohm (more power saving mode)
1
C592
27P_0402_50V8J
Compal Secret Data
Issued Date
2008/04/16
Deciphered Date
2009/04/16

Title
Custom
Date:
SCHEMATIC A4921P
Rev
C
401679

D
Sheet
34
of
57
1
R23
pull down circuit :

more power saving in
no-overclocking mode
34 LAN_ACTIVITY#
+AVDD_CEN
2
5.1K_0402_5%
JRJ45
R27
1
T1
34
34
34
34
LAN_MIDI0+
LAN_MIDI0-
LAN_MIDI0+
LAN_MIDI0-
1
2
3
4
5
6
7
8
LAN_MIDI1+
LAN_MIDI1-
LAN_MIDI1+
LAN_MIDI1-
TD+
TDCT
NC
NC
CT
RD+
RD-
TX+
TXCT
NC
NC
CT
RX+
RX-
RJ45_MIDI0+
RJ45_MIDI0-
16
15
14
13
12
11
10
9
RJ45_MIDI1+
RJ45_MIDI1-
34
34
LAN_MIDI3+
LAN_MIDI3-
1
2
3
4
5
6
7
8
LAN_MIDI2+
LAN_MIDI2-
LAN_MIDI2+
LAN_MIDI2-
TD+
TDCT
NC
NC
CT
RD+
RD-
34
Yellow LED+
RJ45_MIDI3-
PR4-
RJ45_MIDI3+
PR4+
RJ45_MIDI1-
PR2-
RJ45_MIDI2-
PR3-
RJ45_MIDI2+
PR3+
RJ45_MIDI1+
PR2+
RJ45_MIDI0-
PR1-
PR1+
LAN_LINK#
LAN_LINK#
+3V_LAN
TX+
TXCT
NC
NC
CT
RX+
RX-
Yellow LED-
11
RJ45_MIDI0+
T40
LAN_MIDI3+
LAN_MIDI3-
C22
220P_0402_50V7K
BOTHHAND_NS0013LF
34
34
LAN_ACTIVITY#_R
1
510_0402_5%
12
R34
10
1
510_0402_5%
RJ45_MIDI3+
RJ45_MIDI3-
16
15
14
13
12
11
10
9
Green LED-
C39
R31
75_0402_1%
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
40mil
C55
4.7U_0805_10V4Z
C58
0.1U_0402_16V4Z
R33
75_0402_1%
LAN_ACTIVITY#
1
2
C19
68P_0402_50V8J
@
LAN_LINK#
1
2
C56
68P_0402_50V8J
@
C41
1
C603
LANGND
1
R265
75_0402_1%
2
2
RJ45_MIDI2+
RJ45_MIDI2-
R266
75_0402_1%
0.1U_0402_16V4Z
2
2
13
Green LED+
C59
1000P_1206_2KV7K
C611
SHLD1
C65
220P_0402_50V7K
RJ45_GND
SHLD2
SUYIN_100073FR012G101ZL
CONN@
BOTHHAND_NS0013LF
Guide Pin
14
RJ45_GND
0.1U_0402_16V4Z
40mil
Place close to TCT pin
For EMI
Compal Secret Data
2008/10/06
Issued Date
Deciphered Date
2009/10/06
Title
Size
B
Date:
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet
1
35
of
57
To USB/B Connector
+3VALW
0.1U_0402_16V4Z
10 PCIE_ITX_C_PRX_N2
10 PCIE_ITX_C_PRX_P2
+3VS
0.1U_0402_16V4Z
C811
0.1U_0402_16V4Z
0.1U_0402_16V4Z
E51TXD_P80DATA_R
E51RXD_P80CLK
ACES_85201-08051
2
4
6
8
10
12
14
16
2
4
6
8
10
12
14
16
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
+3VS
+1.5VS
2
+3V_WLAN
WL_OFF#
PLT_RST#
R458 1
R459 1
2 0_0603_5%
2 0_0603_5%
ICH_SMBCLK0
ICH_SMBDATA0
WL_OFF# 38
PLT_RST# 11,13,14,24,27,33,34,38
+3VS
+3VALW
PVT
53
54
55
56
Q55 SI2301BDS_SOT23
UB@
1
3
R745
+3VS_FP
MP(Remove)
2
@
ICH_SMBCLK0 8,9,23,28
ICH_SMBDATA0 8,9,23,28
1
3
5
7
9
11
13
15
0_0603_5%
+3VS
1
3
5
7
9
11
13
15
R746
100K_0402_5%
UB@
USB20_N8 28
USB20_P8 28
(MINI1_LED#)
MINI1_LED# 39
(9~16mA)
24,38
R747 4.7K_0402_5%
1
2
BKOFF#
FOX_AS0B226-S99N-7F
CONN@
2
G
UB@
G1
G2
G3
G3
0_0402_5%
2
WLAN_BT_CLK
10 PCIE_PTX_C_IRX_N2
10 PCIE_PTX_C_IRX_P2
R432 1
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
C823
DVT
JMINI1
R457 1
@
2 0_0402_5%
WLAN_BT_DATA
23 CLK_PCIE_MINI1#
23 CLK_PCIE_MINI1
38 E51TXD_P80DATA
38 E51RXD_P80CLK
C808
37,45,51
USB_OC#2 28
2
G
SB_PCIE_WAKE#
37 WLAN_BT_DATA
37 WLAN_BT_CLK
23 MINI1_CLKREQ#
0.1U_0402_16V4Z
C825
SYSON#
USB20_N0 28
USB20_P0 28
C813
USB_OC#2
+5VALW
28 SB_PCIE_WAKE#
4.7U_0805_10V4Z
C841
1
2
3
4
5
6
7
8
9
10
C842
R435
100K_0402_5%
2
+1.5VS
C819
1
2
3
4
5
6
7
8
GND
GND
For Wireless LAN

+3VS
+5VALW
80mil
JP2
Q56
2N7002_SOT23
UB@
5.2 mm
C876 @
0.01U_0402_25V7K
+3VALW
+3VS
Peak
Normal
1000
750
Normal
2
R156
0_0603_5%
Auxiliary Power (mA)
+3VS
Primary Power (mA)
R159
Mini Card Power Rating

Power
0_0603_5%
Fingerprint Conn
USB20_N13
+3VS
PVT
+3V
330
250
250 (wake enable)
+1.5VS
500
375
5 (Not wake enable)
28
28
USB20_N13
USB20_P13
USB20_N13
USB20_P13
C406
0.1U_0402_16V4Z
+3VS_FP
2
1
D16
6
CH3
Vp
CH2
Vn
CH1
JP3
6
5
4
3
2
1
G2
G1
4
3
2
1
CH4
USB20_P13
CM1293-04SO_SOT23-6
ACES_85201-04051
CONN@
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
Size
B
Date:
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet

E
36
of
57
Bluetooth Conn.
+USB_VCCA
+3VALW
+3VS
+USB_VCCA
1
C755
C839
3
G
1
R451
2
10K_0402_5%
BT_ON#
C832
220U_6.3*5.9_6.3VM
2
AO3413_SOT23-3
Q41
C840
R172
DVT
+BT_VCC
470P_0402_50V7K
DVT
D18
C831
R450
300_0603_5%
28
USB20_N6
28
USB20_P6
4.7U_0805_10V4Z
2
0.1U_0402_16V4Z
USB20_P6
USB20_N6_R
USB20_P6_R
2
1
R170
0_0402_5%
Q42
2N7002_SOT23
3
CH3
Vp
CH2
Vn
CH1
USB20_P6_R
JUSB1
USB20_N6
WCM2012F2S-900T04_0805
2
G
6
0_0402_5%
L36
0.1U_0402_16V4Z
1
+USB_VCCA
W=40mils
C830
W=80mils
C427
1U_0402_6.3V4Z
38
0.1U_0402_16V4Z
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
USB20_N6_R
CH4
CM1293-04SO_SOT23-6
SUYIN_020173MR004G565ZR
CONN@
+3VALW
+5VALW
28
28
USB20_P12
USB20_N12
36 WLAN_BT_DATA
36 WLAN_BT_CLK
R453
0_0402_5%
@ 2
1
1
2
R455 @ 0_0402_5%
1
2
3
4
5
6
7
8
+USB_VCCA
U16
1 GND
2
3
4
5
6
7
8 GND
C428
1
2
3
4
GND
IN
IN
EN#
R167 1
USB_OC#1 28
2 10K_0402_5%
USB_OC#0 28
TPS2061DRG4_SO8
4.7U_0805_10V4Z
2
10
R166
0_0402_5%
1
2
R168
100K_0402_5%
80mil
8
7
6
5
OUT
OUT
OUT
FLG
JP4
+BT_VCC
C421
0.1U_0402_16V4Z
ACES_87213-0800G
CONN@
36,45,51 SYSON#
+USB_VCCA
+USB_VCCA
W=80mils
1
C697
220U_6.3*5.9_6.3VM
C246
470P_0402_50V7K
eSATA CONN
(Reserved)
R102
DVT
28
USB20_N1
28
USB20_P1
0_0402_5%
L29
JUSB2
USB20_N1
USB20_P1
USB20_N1_R
USB20_P1_R
+USB_VCCA
W=60mils
USB20_N1_R
USB20_P1_R
Close chip
SATA_STX_C_DRX_P2
SATA_STX_C_DRX_N2
@
C855
C856
1
1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
@
SATA_DTX_SRX_N2
SATA_DTX_SRX_P2
Close conn
JSAT1
1
2
3
4
VBUS
DD+
GND
5
6
7
8
9
10
11
GND
A+
AGND
BB+
GND
WCM2012F2S-900T04_0805
USB
R103
0_0402_5%
SHIELD
SHIELD
SHIELD
SHIELD
D14
TYCO_1759594-1
@
+USB_VCCA
USB20_N1_R
DVT2
(PCB footprint : TYCO_1909574-1_11P-T)
CH3
Vp
CH4
5
6
7
8
GND1
GND2
GND3
GND4
CH2
Vn
CH1
USB20_P1_R
CM1293-04SO_SOT23-6
Compal Secret Data
2008/10/06
Issued Date
VCC
DD+
GND
SUYIN_020173MR004G565ZR
CONN@
ESATA
12
13
14
15
1
2
3
4
2009/10/06
Deciphered Date
Title
Size
B
Date:
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet

E
37
of
57
For EC Tools
+3VALW
L43
R220 2
1 @ 33_0402_5%
27,31 CLK_PCI_EC
11,13,14,24,27,33,34,36
+3VALW
28
2
1
R215
47K_0402_5%
2
1
C533
0.1U_0402_16V4Z
PLT_RST#
EC_SCI#
+5VS
2 TP_CLK
4.7K_0402_5%
2 TP_DATA
4.7K_0402_5%
+3VS
1
R191
1
R190
EC_SMB_CK2
2
2.2K_0402_5%
EC_SMB_DA2
2
2.2K_0402_5%
+3VALW
1
R193
1
R192
2 EC_SMB_CK1
2.2K_0402_5%
2 EC_SMB_DA1
2.2K_0402_5%
EC_SCI#
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
1
R189
1
R188
CLK_PCI_EC
PLT_RST#
6,47
6,47
6,22
6,22
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
1
2
3
4
5
7
8
10
12
13
37
20
38
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
77
78
79
80
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
R205
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
63
64
65
66
75
76
BATT_TEMP
BATT_OVP
ADP_I
AD_BID0
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
68
70
71
72
DAC_BRIG
EN_DFAN1
IREF
CALIBRATE#
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
83
84
85
86
87
88
EC_MUTE
PX_+VGA_CORE
TP_LOCK _LED#
BT_LED#
TP_CLK
TP_DATA
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
97
98
99
109
3S/4S#
65W/90W#
EC_VLDT_EN
LID_SW#
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
119
120
126
128
PWM Output
ACOFF
ACOFF
R203
INVT_PWM 24
BEEP#
42
1
100K_0402_5%
1
100K_0402_5%
2
4.7K_0402_5%
R213
3S/4S#
21
23
26
27
PS2 Interface
SPI Device Interface

SPI Flash ROM
GPIO
SM Bus
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
49
ECAGND
2
1
C520 0.01U_0402_16V7K
Analog Project ID definition
BATT_TEMP 47
BATT_OVP 49
ADP_I
49
+3VALW
AD_PID0
R181
100K_0402_5%
@
Ra
DAC_BRIG 24
EN_DFAN1 44
IREF
49
CALIBRATE# 49
AD_PID0
EC_MUTE 43
PX_+VGA_CORE 41
TP_LOCK _LED# 39
BT_LED# 39
DVT
TP_CLK 39
TP_DATA 39
GPU_CORE (EC->PWM)
R180
Rb
Analog Board ID definition
3S/4S# 49
65W/90W# 49
EC_VLDT_EN 41
LID_SW# 39
+3VALW
EC_SI_SPI_SO 39
EC_SO_SPI_SI 39
EC_SPICLK 39
EC_SPICS#/FSEL# 39
R473
@ 0_0402_5%
1
2
73
1
2
74
R472
@ 0_0402_5%
89
BATT_BLUE_LED#
90
CAPS_LED#
91
BATT_AMB_LED#
92
PWR_LED
93
SYSON
95
VR_ON
121
ACIN
127
R195
Ra
100K_0402_5%
GPU_1.1VS (EC->MOS)
PX_GPIO1 27,45
PX MODE SWITCH (EC->MUX)
PX_GPIO2 11,24,26
Rb
FSTCHG 49
BATT_BLUE_LED# 40
CAPS_LED# 40
BATT_AMB_LED# 40
PWR_LED 40
MP
SYSON
45,50
VR_ON
53
ACIN
15,29,40,46,49
AD_BID0
R194
56K_0402_5%
41
ON/OFF
40 PWR_SUSP_LED
40
NUM_LED#
122
123
69
11
24
35
94
113
A
KB926QFB1_LQFP128_14X14
PVT
D42
1
1
D41
R211
10K_0402_5%
C534
BATT_TEMP
1U_0402_6.3V4Z
ACIN
C523
2
C514
2
C539
2
100P_0402_50V8J
1
100P_0402_50V8J
1
100P_0402_50V8J
1
KB926 Rev:D3(SA00001J580)
Deciphered Date
2009/10/06

Title
Date:
X1
32.768KHZ_12.5P_MC-306
VGA_ENBKL 15
Compal Secret Data

2008/10/06
C535
15P_0402_50V8J
RB751V_SOD323
VGA@ DVT
Size
B
4
DVT2
RB751V_SOD323
2
UMA_ENBKL 11
UMA@
BATT_OVP
IN
GPU_1.8VS (EC->MOS)
GPU_3VS (EC->MOS)
20mil
L44
ECAGND 2
1
FBM-L11-160808-800LMT_0603
Issued Date
OUT
15P_0402_50V8J
53
EAPD
42
EC_THERM# 29
SUSP#
41,45,52
PBTN_OUT# 28
EC_PME# 34
NC
124
XCLK1
XCLK0
2
C532
NC
V18R
GPI
VGATE
0.1U_0402_16V4Z
VGATE
ENBKL
EAPD
EC_THERM#
SUSP#
PBTN_OUT#
EC_PME#
C503
EC_CRY2
110
112
114
115
116
117
118
GND
GND
GND
GND
GND
EC_CRY1
EC_CRY2
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
EC_RSMRST# 28
EC_LID_OUT# 28
EC_ON
41
EC_SWI# 28
EC_PWROK 41
BKOFF# 24,36
WL_OFF# 36
PX_+1.8VS 45
PX_+3VS 19
EC_PME#
2
10K_0402_5%
FAN_SPEED1
BT_ON#
E51TXD_P80DATA
E51RXD_P80CLK
ON/OFF
PWR_SUSP_LED
NUM_LED#
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
EC_RSMRST#
EC_LID_OUT#
EC_ON
EC_SWI#
EC_PWROK
BKOFF#
WL_OFF#
PX_+1.8VS
PX_+3VS
44 FAN_SPEED1
37
BT_ON#
+3VALW
1
R222
27 PX_GPIO1_SB
11 PX_GPIO2_NB
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
100
101
102
103
104
105
106
107
108
AGND
GPU_POWER ENABLE (SB->EC)

PX MODE SWITCH (NB->EC)
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
C488
100K_0402_5%
0.1U_0402_16V4Z
2
@
@
EC_CRY1
28
28
28
+3VALW
VR_ON
INVT_PWM
BEEP#
DA Output
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
ACES_85205-0400
@
65W/90W#
AD Input
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
11
DVT2
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
39
ENBKL
E51RXD_P80CLK 36
E51TXD_P80DATA 36
C547
@ 22P_0402_50V8J
2
1
28
EC_GA20
28 EC_KBRST#
27
SERIRQ
27 LPC_FRAME#
27
LPC_AD3
27
LPC_AD2
27
LPC_AD1
27
LPC_AD0
EC_GA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
Place on RAM door
E51RXD_P80CLK
E51TXD_P80DATA
2
R221
LID_SW#
1
100K_0402_5%
KSI[0..7]
1
2
3
4
+3VALW
ENBKL
AVCC
VCC
VCC
VCC
VCC
VCC
VCC
U20
KSI[0..7]
0.1U_0402_16V4Z
1
2
3
4
KSO[0..17] 39
67
9
22
33
96
111
125
KSO[0..17]
C502
39
2
2
0.1U_0402_16V4Z
KSI[0..7]
C546
JP6
KSI[0..7]
C525
2
2
0.1U_0402_16V4Z
+3VALW
1
2+EC_VCCA
2 FBM-L11-160808-800LMT_0603
1
C548
C549
1000P_0402_50V7K
1000P_0402_50V7K
1
1
2
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1 C501
1
C537
ECAGND
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet
1
38
of
57
BIOS(SYS / EC / VGA)
To TP/B Conn.
2 0.1U_0402_16V4Z
JP7
+SPI_VCC
U19
CE#
WP#
HOLD#
VSS
VDD
SCK
SI
SO
R208
1
8
6
5
2
MX25L8005M2C-15G_SOP8
0_0402_5%
2
+5VS
TP_CLK
TP_DATA
C403
MP
100P_0402_50V8J
R250
620_0402_5%
C404
100P_0402_50V8J
8
7
8
7
RIGHT_BTN#
KSI4
D15
@
PSOT24C_SOT23
0.1U_0402_16V4Z
5
6
C402
KSO3
LEFT_BTN#
2
SW4
EVQPLHA15_4P
(AMBER)
LED11
HT-191UD_Amber_0603
6
5
4
3
2
1
ACES_85201-0605
CONN@
+5VS
2
C524
33P_0402_50V8K
6
5
4
3
2
1
TP_CLK
TP_DATA
LEFT_BTN#
RIGHT_BTN#
1
PVT
R206
22_0402_5%
@
38
38
+3VS
EC_SPICLK 38
EC_SO_SPI_SI 38
EC_SI_SPI_SO 38
EC_SPICS#/FSEL#
1
3
2 4.7K_0402_5% SPI_WP#
2 4.7K_0402_5% SPI_HOLD# 7
4
R207 1
R204 1
+3VALW
38 EC_SPICS#/FSEL#
DVT
C512 1
+3VALW
2
5
6
KSI[0..7]
KSI[0..7]
KSO[0..17]
SW3
SMT1-05-A_4P
1
38
KSO[0..17] 38
To FUN/B Conn (10PIN)

JP9
CONN@
BT_LED# 38
MINI1_LED# 36
Lid Switch
(Hall Effect Switch)
ACES_85201-1005N
27
28
ACES_85201-26051
BT_LED#
MINI1_LED#
+5VS
CONN@
KSO16 C449 1
100P_0402_50V8J
KSO17 C450 1
100P_0402_50V8J
KSO4
KSO15
C448 1
100P_0402_50V8J
KSO7
C440 1
100P_0402_50V8J
KSO14
C447 1
100P_0402_50V8J
KSO6
C439 1
100P_0402_50V8J
KSO13
C446 1
100P_0402_50V8J
KSO5
C438 1
100P_0402_50V8J
KSO12
C445 1
100P_0402_50V8J
KSO4
C437 1
100P_0402_50V8J
KSI0
C451 1
100P_0402_50V8J
KSO3
C436 1
100P_0402_50V8J
KSO11
C444 1
100P_0402_50V8J
KSI4
C455 1
100P_0402_50V8J
KSO10
C443 1
100P_0402_50V8J
KSO2
C435 1
100P_0402_50V8J
KSI1
C452 1
100P_0402_50V8J
KSO1
C434 1
100P_0402_50V8J
KSI2
C453 1
100P_0402_50V8J
KSO0
C433 1
100P_0402_50V8J
KSO9
C442 1
100P_0402_50V8J
KSI5
C456 1
100P_0402_50V8J
KSI3
C454 1
100P_0402_50V8J
KSI6
C457 1
100P_0402_50V8J
KSO8
C441 1
100P_0402_50V8J
KSI7
C458 1
100P_0402_50V8J
+3VALW
MP
KSO2
C70
KSO3
0.1U_0402_16V4Z
KSI5
WL_BTN#
Volume Down
Back Up
G1
G2
KSO4
KSO2
KSO3
KSI5
KSI6
R38
47K_0402_5%
OUTPUT
KSI6
BT_BTN#
Volume Up
KSI4
Battery (KALG0)
U9
A3212ELHLT-T_SOT23W-3
T/P lock
2008/10/06
Deciphered Date
1
D10
2 LID_SW#
RB751V_SOD323
LID_SW# 38
C77
10P_0402_50V8J
Compal Secret Data
Issued Date
Program (KBLG0)
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
GND
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
RIGHT_BTN#
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
SW2
SMT1-05-A_4P
1
GND
(Right)
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
LEFT_BTN#
T/P lock button
(Left)
JP8
TP_LOCK _LED# 38
5
6
TP_LOCK _LED#
T/P lock button LED
INT_KBD Conn.
2009/10/06
Title
Size
B
Date:
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet
39
of
57
Enlightener LED
+5VALW
+5VALW
(BLUE)
ACIN#
D
PVT
Q3
2
LED6
HT-191NBQA_BLUE_0603
LED7
ACIN#
2
G
ACIN
LED5
+5VALW
R12
392_0402_1%
1
2
(BLUE)
PVT
LED1
PWR_LED#
1
MP
ON/OFF LED DOWN
(BLUE)
ACIN#
PWR_LED#
1
ON/OFF LED LEFT
15,29,38,46,49
2N7002_SOT23 S
PVT
R13
620_0402_5%
1
2
+5VALW
MP
MP
MP
R10
1.5K_0402_5%
R16
499_0402_1%
ON/OFF LED RIGHT
(BLUE)
PVT
R17
392_0402_1%
1
2
+5VALW
LED8
PWR_LED#
1
MP
(BLUE)
NUM_LED
+5VS
(BLUE)
PWR_SUSP_LED#
PVT
PVT
R240
10K_0402_5%
CAPS_LED#
NUM_LED# 38
2N7002DW-T/R7_SOT363-6
Q31B
38 PWR_SUSP_LED
2N7002DW-T/R7_SOT363-6
Q31A
PWR_LED
R249
10K_0402_5%
CAPS_LED# 38
NUM_LED#
38
MEDIA_LED#
LED4
LED3
2
LED2
PWR_LED#
3
PVT
R3
866_0402_1%
R2
866_0402_1%
R1
866_0402_1%
(BLUE)
(BLUE)
CAPS_LED
+5VS
+5VS
MEDIA_LED
PVT
PWR_LED#
MEDIA_LED#
CAPS_LED#
D6
ACIN#
D7
NUM_LED#
PJMBZ6V8_3P_C/A_SOT-23
Compal Footprint
Footpint : LED_HT-297DQ-GQ_4P
PVT
DVT2
+5VALW
R245
330_0402_5%
1
2
+5VALW
R244
1
LED9
2
PWR_LED#
PWR_SUSP_LED#
MP
2
866_0402_1%
HT-297UD/CB _BLUE/AMB_0603
MP
+3VS
MEDIA_LED#
5IN1_LED# 33
SATA_LED# 29
Q2B
2N7002DW-T/R7_SOT363-6
BATT_BLUE_LED#
+5VALW
R246
1
BATT_AMB_LED#
Q2A
2N7002DW-T/R7_SOT363-6
+5VALW
R247
330_0402_5%
1
2
LED10
BATT_BLUE_LED# 38
BATT_AMB_LED# 38
866_0402_1%
HT-297UD/CB _BLUE/AMB_0603
BLUE/AMBER
D5
PWR_SUSP_LED#
+3VS
Issued Date
Compal Secret Data
2008/10/06
Deciphered Date
2009/10/06
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet
40
of
57
Power Button
ON/OFF switch
+3VALW
R5
R4
2
@ 10K_0603_5%
2
@ 10K_0603_5%
HDA MDC Conn.
TOP Side
1
+3VALW
R8
C844
100K_0402_5%
ON/OFFBTN#
ON/OFF
38
51ON#
46
28 HDA_SDOUT_MDC
28 HDA_SYNC_MDC
28 HDA_SDIN1
28 HDA_RST_MDC#
DAN202UT106_SC70-3
R456
HDA_SDIN1_MDC
33_0402_5%
6
5
D3
1
3
5
7
9
11
1
3
5
7
9
11
2
4
6
8
10
12
2
4
6
8
10
12
20mil
2
+3VALW
HDA_BITCLK_MDC 28
ACES_88018-124N
CONN@
R460
0_0402_5%
D1
RLZ20A_LL34
2
1000P_0402_50V7K
1
C3
1
EC_ON
S 2N7002_SOT23
C843
22P_0402_50V8J
For EMI
Q1
2
G
EC_ON
38
R6
1U_0402_6.3V4Z
SW1
SMT1-05-A_4P
1
3
JMDC1
Bottom Side
10K_0402_5%
Power ON Circuit
+3VS
MP(Remove)
+3VALW
+3VALW
C568
1U_0805_25V4Z
UB@
14
For South Bridge
1
R234
U22B
SN74LVC14APWLE_TSSOP14
UB@
2
@ 0_0402_5%
SB_PWRGD 6,11,28
U22A
UB@
2
G
Q25
2N7002_SOT23
UB@
1
45 SUSP
14
R235
180K_0402_5%
UB@
38
EC_PWROK
1
R233
0_0402_5%
+3VS
+3VALW
+3VALW
For +1.2HT
14
P
U22D
UB@
1
O 8
R232
2
2
C567
RB751V_SOD323
UB@
0.1U_0402_16V4Z
UB@ 1
U22C
UB@
9 I
O 6
SUSP# 1
SUSP#
10K_0402_1%
UB@
D23
38,45,52
14
R236
38 EC_VLDT_EN
+3VALW
1
R228
2
0_0402_5%
VLDT_EN 45,50,51
2
0_0402_5%
+3VALW
C565
D21
14
P
U22F
UB@
@
1
O 12
R231
2
RB751V_SOD323
UB@
For +VGA_CORE
2
0_0402_5%
VGA_ON
2
P
I
U22E UB@
UB@
13 I
O 10
SUSP#
14
1
UB@
R230
200K_0402_5%
11
1
2
2 0.1U_0402_16V4Z
C564
0.22U_0603_16V7K
UB@
38 PX_+VGA_CORE
VGA@
SUSP#
1
2
R229 0_0402_5%
1
2
R468 0_0402_5%
@
54
C563
0.1U_0402_16V4Z
@
Compal Secret Data
2008/10/06
Issued Date
2009/10/06
Deciphered Date
Title
Size
B
Date:
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet

E
41
of
57
+VDDA
1
R446
+5VAMP
2
1U_0402_6.3V4Z
2
1
1
1U_0402_6.3V4Z
1
R448
Q40
2
B
560_0402_5%
C834 1
1U_0402_6.3V4Z
R447
1
R438
10mil
D34
CH751H-40PT_SOD323-2
43
LINE_L
U31
43
LINE_R
43
MIC1_L
43
MIC1_R
LINE_R
C828
C824
MIC1_L
MIC1_R
C822
C826
R439 2
1 39.2K_0402_1%
R443 1
R442 2
2 10K_0402_1%
1 20K_0402_1%
43
EAPD
SPDIF
SENSE A
SENSE B
PORT-B (PIN 21, 22)
10K
PORT-C (PIN 23, 24)
5.1K
PORT-D (PIN 35, 36)
39.2K
PORT-E (PIN 14, 15)
20K
PORT-F (PIN 16, 17)
10K
PORT-G (PIN 43, 44)
5.1K
PORT-H (PIN 45, 46)
AMP_LEFT
36
AMP_RIGHT
16
MIC2_L
SURR_L
39
HP_LEFT
17
MIC2_R
SURR_R
41
HP_RIGHT
LINE1_L
SIDE_L
45
SIDE_R
46
LINE1_R
CD_L
CENTER
43
20
CD_R
LFE
44
19
CD_GND
BITCLK
L88
MBK1608121YZF_0603
1
2
+3VS
SDATA_IN
AMP_LEFT 43
AMP_RIGHT 43
HP_LEFT 43
HP_RIGHT 43
For EMI
1
R436
2 C812
22P_0402_50V8J
2
1
10_0402_5%
HDA_BITCLK_AUDIO
28
MIC1_L
MIC1_R
PIN37_VREFO
37
LINE1_VREFO
29
LINE2_VREFO
31
MIC1_VREFO_L
28
2
3
13
34
MIC1_VREFO_R
SPDIFO2
GPIO0/DMIC_CLK MIC2_VREFO
SENSE A
SENSE B
VREF
30
47
SPDIFI/EAPD
40
48
SPDIFO
4
7
PCBEEP
RESET#
SYNC
SDATA_OUT
GPIO1/DMIC_DATA
DVSS
JDREF
HDA_SDIN0_AUDIO
10mil
32
33
AVSS1
AVSS2
26
42
DGND
2
33_0402_5%
HDA_SDIN0 28
Close Codec U31

(For EMI)
L94
FBMA-11-100505-301T_0402
DMIC_CLK
DMIC_CLK_R
1
2
DMIC_DATA
CODEC_VREF
10mil
C814
0.1U_0402_16V4Z
2
2
R429
20K_0402_1%
C815
10U_0805_10V4Z
C1
220P_0402_50V8J
R428 close to U31.48

1
R373
2
0_0805_5%
1
R372
2
0_0805_5%
1
R428
2
0_0805_5%
1
R378
2
0_0805_5%
1
R454
2
0_0805_5%
1
R452
2
0_0805_5%
GNDA
2008/10/06
GND
GNDA
Compal Secret Data
5
6
G1
G2
C2
220P_0402_50V8J
GND
1
1
2009/10/06
Deciphered Date
Title
SCHEMATIC A4921P
Document Number
Date:
1
2
3
4
ACES_88266-04001
CONN@
Size
B
A
JP11
1
2
3
4
MIC1_VREFO_L
AGND
Issued Date
Digital MIC
+3VS
MIC1_VREFO_R
27
SENSE C
1
R437
PVT
ALC888S-VC_LQFP48_7x7
Codec Signals
20K
35
FRONT_R
DMIC_DATA
PORT-A (PIN 39, 41)
FRONT_L
LINE2-R
10
DMIC_CLK
SENSE_A
38
LINE2-L
11
28 HDA_SDOUT_AUDIO
Place close to Codec
39.2K
+3VS
C816
15
MIC1_C_L
21
4.7U_0805_6.3V6K
MIC1_C_R
22
4.7U_0805_6.3V6K
MONO_IN
12
28 HDA_SYNC_AUDIO
C817
14
LINE_C_L
23
4.7U_0805_6.3V6K
LINE_C_R
24
4.7U_0805_6.3V6K
18
28 HDA_RST_AUDIO#
Impedance
L85
MBK1608121YZF_0603
1
2
0.1U_0402_16V4Z
10U_0805_10V4Z
2
2
1
LINE_L
Sense Pin
0.01U_0402_16V7K
C809
+1.5VS_DVDD
1
AVDD1
40mil
DVDD
0.1U_0402_16V4Z
1
C807
38
C818
10U_0805_10V4Z
25
L89 1
2
FBM-L11-160808-800LMT_0603
HP_PLUG#
C810
10mil
AVDD2
+VDDA
43
C838
4.75V
4.7U_0805_10V4Z
0.1U_0402_16V4Z
2
2
10U_0805_10V4Z
+AVDD_HDA
43 LINEIN_PLUG#
43 MIC_PLUG#
+3VS_DVDD
1
R449
10K_0402_5%
C836
2
1.3K_0402_1%
560_0402_5%
+VDDA
1
2SC2411K_SOT23
SB_SPKR
28
MONO_IN
BYP
G9191-475T1U_SOT23-5
@
C835 1
1U_0402_6.3V4Z
(output = 300 mA)
40mil
BEEP#
DVT
DVDD_IO
38
SHDN
OUT
C820
GND
R440
10K_0402_5%
IN
1
1
L93 1
C833
C837
2
KC FBM-L11-201209-221LMAT_0805
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
2
1
C821
60mil
L92 1
2
KC FBM-L11-201209-221LMAT_0805
+5VS
2
0_0805_5%
U32
1
R441
10K_0402_5%

G
Rev
C
401679
Sheet
42
H
of
57
+5VAMP
W=40mil
+3VS
1
1
42
HP_LEFT
C785
2
0.01U_0402_16V7K
1
R385
100K_0402_1%
2 EC_MUTE
G
Q39
2N7002_SOT23
25
VDD
2 100K_0402_5%
21
5
6
HP_EN
LOUT+
LOUT-
SPKL+
SPKL-
R381 1
28
2
INR_H
INL_H
HP_R
HP_L
13
16
HPOUT_R
HPOUT_L
NC
NC
3
14
VSS
12
GND
PGND
PGND
CGND
GND
26
4
20
10
29
HP_RIGHT_R
39K_0402_5% HP_LEFT_R
2
2
VOL_AMP
39K_0402_5%
1U_0402_6.3V4Z
15
/AMP EN
C791
VOL_AMP
24
HP_RIGHT_C 1
4.7U_0805_6.3V6K R417
HP_LEFT_C
1
4.7U_0805_6.3V6K R419
R387
43K_0402_1%
ROUT+
ROUT-
2 100K_0402_5%
23
SET
9
11
CP+
CP-
22
BIAS
EC_MUTE 38
C778
2.2U_0805_10V6K
HP_RIGHT
1
C803
HP_LEFT
1
C804
HP_RIGHT
INR_A
INL_A
R390 1
C780
1U_0402_6.3V4Z
C790
APA2051QBI-TRG_TQFN28_4X4
2
HPOUT_L
HPOUT_R
1
L84
1
L83
HPOUT_R_1
S/PDIF Out JACK

LINE Out/Headphone Out
HPOUT_L_2
2
FBM-11-160808-700T_0603
HPOUT_R_2
2
FBM-11-160808-700T_0603
R384
56.2_0603_1%
Gain= 10dB
D32
PJDLC05_SOT23-3
C789
330P_0402_50V7K 330P_0402_50V7K
1
1
R383
56.2_0603_1%
HPOUT_L_1
2
2
JHP1
1
2
6
3
42
+5VAMP
27
1
SPKR+
SPKR-
19
18
HPF Fc = 154Hz
+5VAMP
U29
2.2K_0402_5%
2.2K_0402_5%
AMP_RIGHT_C
1U_0402_6.3V4Z
AMP_LEFT_C
1U_0402_6.3V4Z
7
17
PVDD
PVDD
AMP_RIGHT_C-1
1
C793
AMP_LEFT_C-1
1
2
1
C802
C800
0.47U_0603_16V4Z
R418
R394
HVDD
AMP_LEFT
CVDD
42
C799
0.47U_0603_16V4Z
1
2
AMP_RIGHT
42
C788
C801
0.1U_0402_16V4Z
2
2
4.7U_0805_10V4Z
C781
0.1U_0402_16V4Z
2
SPDIF_PLUG#
42
5
4
7
8
10
SPDIF
SPDIF
+5VSPDIF
C782
100P_0402_50V8J
9
2
SINGA_2SJ-E373-T01
CONN@
+5VAMP
+5VAMP
LINEIN_PLUG#
20mil
LINE_R
42
LINE_L
2
R445
75_0603_1%
LINE_L_1 1
2
L91
FBM-11-160808-700T_06031
C829
220P_0402_50V7K
42
MIC1_R
R430
2.2K_0402_5%
R434
L87
FBM-11-160808-700T_0603
75_0603_1%
1
2 MIC1_R_1 1
2
42
MIC1_L
5
6
MIC1_L_1
R433
75_0603_1%
1
2
L86
FBM-11-160808-700T_06031
C805
220P_0402_50V7K
SINGA_2SJ-E351-S03
CONN@
C827
220P_0402_50V7K
(HDA Jack)
MIC JACK
MIC_PLUG#
JMIC1
MIC1_VREFO_R
8
7
1
G1
G2
ACES_88266-04001
CONN@
1
2
3
4
D9
SM05T1G_SOT23-3
3
6
2
1
LINE_L_R
JP12
1
2
3
4
D8
SM05T1G_SOT23-3
42
MIC1_VREFO_L
20mil
For ESD
I/O status:
a. input/output mount 75 ohm
b. input only mount 1K ohm
Int. Speaker Conn.

SPKL+
SPKLSPKR+
SPKR-
LINE_R_R
R431
2.2K_0402_5%
5
4
42
+5VSPDIF
L90
FBM-11-160808-700T_0603
LINE_R_1 1
2
MIC1_R_R
3
6
2
1
MIC1_L_R
1
42 LINEIN_PLUG#
R444
75_0603_1%
1
2
Q36A
2N7002DW-T/R7_SOT363-6
JLINE1
8
7
2
1
SPDIF_PLUG#
LINE-IN JACK
D35
PJDLC05_SOT23-3
@
6 1
1
Q36B
2N7002DW-T/R7_SOT363-6
2
R365
100K_0402_5%
Q38
AO3413_SOT23-3
HP_PLUG# 42
HP_PLUG#
R364
100K_0402_5%
SINGA_2SJ-E351-S01
CONN@
C806
220P_0402_50V7K
(HDA Jack)
D33
PJDLC05_SOT23-3
@
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
Size
B
Date:
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet

E
43
of
57
FAN1 Conn
+5VS
+5VS
10U_0805_10V4Z
2
C108
1
U10
BAS16_SOT23-3
C121
10U_0805_10V4Z
1
2
C105
0.1U_0402_16V4Z
+3VS
C119
1000P_0402_50V7K
1
2
R298
10K_0402_5%
H6
H_3P7N
H9
H_4P2
H5
H_3P2
@
H13
H_4P2
H27
H_3P2
@
H14
H_4P2
H23
H_3P2
@
H7
H_4P2
H26
H_3P2
ACES_85205-03001
CONN@
H22
H_3P2
H10
H_3P2
H25
H_3P2
H17
H_3P2
H16
H_3P2
H1
H_3P2
@
H15
H_3P2
H2
H_3P2
H3
H_3P2
FIDUCIAL_C40M80
FIDUCIAL_C40M80
@
FD1
FIDUCIAL_C40M80
@
FD4
FD3
H19
H_15P0X10P0N
@
FD2
H18
H_5P5X4P3N
H8
H_10P0X6P0N
H11
H24
H_4P7X3P7N H_5P1X4P1N
H4
H_3P2
H12
H_3P2
H20
H_3P2
C670
1000P_0402_50V7K
H21
H_3P2
1
2
3
JP13
38 FAN_SPEED1
40mil
+VCC_FAN1
FIDUCIAL_C40M80
@
H28
H_1P6N
DVT2
H29
H_6P0x5P0N
D12
1
APL5605KI-TRL SOP 8P
+VCC_FAN1
1
300_0402_5%
D11
1SS355_SOD323-2
8
7
6
5
R62
GND
GND
GND
GND
EN_DFAN1
VEN
VIN
VO
VSET
38
1
2
3
4
Issued Date
Compal Secret Data
2008/10/06
Deciphered Date
DVT2
2009/10/06
Title
Size
B
Date:
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet
44
of
57
+5VALW
2
1
R242
100K_0402_5%
0.1U_0603_25V7K
SUSP
SUSP
Q30
2N7002_SOT23
1
R278
2
0_0402_5%
2
2
PX_+1.8VS# 1
@
R499
PX_+1.8VS 1
@
R406
SUSP
1
R407
2
0_0402_5%
2 PX_+1.8VS_R
0_0402_5%
C368
10U_0805_10V4Z
2
VGA@ 2
1U_0402_6.3V4Z
VGA@
R115
470_0603_5%
VGA@
1.8VS_PX_GATE
S
1
R64
10K_0402_5%
UB@
2 PX_+1.8VS_R
G
Q14
2N7002_SOT23
VGA@
C393
0.1U_0603_25V7K
2 VGA@
MP(Remove)
PX_+1.8VS#
Q51
2N7002_SOT23
UB@
1
D
2 SYSON#
G
Q12
2N7002_SOT23
2 VLDT_EN#
G
Q5
2N7002_SOT23
2008/10/06
Issued Date
Compal Secret Data
2009/10/06
Deciphered Date
Title
Size
B
Date:
1
1
D
2 SYSON#
G
Q11
2N7002_SOT23
R498
10K_0402_5%
UB@
R41
470_0603_5%
2
G
PX_+1.8VS
2
1
D
2 SUSP
G
Q18
2N7002_SOT23
R113
470_0603_5%
R497
100K_0402_5%
UB@
C852
0.1U_0402_16V4Z
@ 2
+1.1VS
D
2 SUSP
G
Q26
2N7002_SOT23
R112
470_0603_5%
+1.8V
R153
470_0603_5%
R241
470_0603_5%
+0.9V
+2.5VS
Q19
2N7002_SOT23
UB@
+5VALW
DVT
Q17
2N7002_SOT23
VGA@
2
G
27,38 PX_GPIO1
38
+1.5VS
1
2
C367
2
G
PX_GPIO1#
1
2
3
4
S
S
S
G
SI4800BDY_SO8
VGA@
2
10U_0805_10V4Z
VGA@
2
1
R154
200K_0402_5%
D
D
D
D
VGA@
2
0_0402_5%
VGA@
8
7
6
5
DVT
R63
100K_0402_5%
UB@
4.556A
C711
+5VALW
MP(Remove)
+1.8VS_PX
10U_0805_10V4Z
+VSB
Q47
0.1U_0603_25V7K
2N7002_SOT23 2
VGA@
2 SUSP
G
Q46
2N7002_SOT23
C397
Q4
2N7002_SOT23
2
G
R40
10K_0402_5%
C407
2
G
41,50,51 VLDT_EN
C851
0.1U_0402_16V4Z
@ 2
U13
VLDT_EN#
R292
470_0603_5%
1
1.8VS_GATE
2
1
R271
200K_0402_5%
SUSP
C709
10U_0805_10V4Z
2
2
1U_0402_6.3V4Z
2
10U_0805_10V4Z
+VSB
C712
SI4800BDY_SO8
2 PX_+1.1VS_R
G
Q44
2N7002_SOT23
VGA@
C692
0.1U_0603_25V7K
Q45
2N7002_SOT23 2 VGA@
VGA@
+1.8V
1
2
3
4
2
10U_0805_10V4Z
S
1
R43
100K_0402_5%
+1.8V to +1.8VS_PX
C710
S
S
S
G
C683
10U_0805_10V4Z
2
VGA@ 2
1U_0402_6.3V4Z
VGA@
2
G
+1.8VS
D
D
D
D
+5VALW
R272
470_0603_5%
VGA@
@
1
R275
2
0_0402_5%
2 PX_+1.1VS_R
0_0402_5%
6.988A
U40
PX_GPIO1# 1
@
R478
VGA@
8
7
6
5
SI4800BDY_SO8
VGA@
1.1VS_PX_GATE
2
1
R270
200K_0402_5%
+VSB
+1.8V to +1.8VS
2
10U_0805_10V4Z
C693
VGA@
2 SUSP
G
Q27
2N7002_SOT23
SUSP
C714
VGA@
10U_0805_10V4Z
PX_GPIO1
+1.8V
5VS_GATE
VGA@
C691
2
R243
470_0603_5%
C569
10U_0805_10V4Z
2
2
1U_0402_6.3V4Z
10U_0805_10V4Z
2
2
10U_0805_10V4Z
C713
R248
10K_0402_5%
1
2
3
4
S
S
S
G
C572
SI4800BDY_SO8
C574
1
2
3
4
D
D
D
D
C575
S
S
S
G
+1.1VS_PX
8
7
6
5
D
D
D
D
2
G
SUSP#
1
38,41,52
3.64A
U39
1 1
U23
8
7
6
5
+NB_CORE
+3VS
4.121A
+5VALW
C506
+NB_CORE TO +1.1VS_PX
+3VALW
2
2 VLDT_EN#
G
Q22
2N7002_SOT23
41
+3VALW TO +3VS
Q21
2N7002_SOT23
VLDT_EN# 2
Q23G
2N7002_SOT23
0.1U_0603_25V7K
2
G
R174
100K_0402_5%
1.2VS_GATE
SYSON
SYSON
C577
38,50
SYSON#
36,37,51 SYSON#
R197
470_0603_5%
C462
10U_0805_10V4Z
2
2
1U_0402_6.3V4Z
2
10U_0805_10V4Z
SUSP
2
Q29G
2N7002_SOT23
SI4800BDY_SO8
2
1
R196
200K_0402_5%
+VSB
C470
2 SUSP
G
Q28
2N7002_SOT23
1
2
3
4
S
S
S
G
5VS_GATE
2
1
R239
200K_0402_5%
C509
D
D
D
D
R202
1K_0402_5%
+VSB
8
7
6
5
DVT
R238
470_0603_5%
C573
10U_0805_10V4Z
2
2
1U_0402_6.3V4Z
10U_0805_10V4Z
2
2
10U_0805_10V4Z
SI4800BDY_SO8
C576
R169
100K_0402_5%
+1.2V_HT
3.265A
U17
1
2
3
4
S
S
S
G
C570
D
D
D
D
8
7
6
5
C571
+1.2VALW
+5VS
4.305A
U24
+5VALW
+1.2VALW TO +1.2V_HT
+5VALW TO +5VS
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet

E
45
of
57
VIN
1
PR3
84.5K_0402_1%
PR8
10K_0402_1%
1
2
1
2
PD3
GLZ4.3B_LL34-2
2
PR7
10K_0402_1%
2 1
PU1A
LM358DT_SO8
PR5
22K_0402_5%
1
2
PC6
0.1U_0603_25V7K
2
1
PR209
10K_0402_1%
15,29,38,40,49 ACIN
PC1
1000P_0402_50V7K
PR4
0_0402_5%
1
2
1
2
1
PC4
100P_0402_50V8J
PC2
100P_0402_50V8J
PC3
1000P_0402_50V7K
PJP3
@PR2
@
PR2
10K_0402_5%
G
G
VIN
VS
PR6
20K_0402_1%
VIN
2DC_IN_S2
PL1
SMB3025500YA_2P
1
DC_IN_S1
<BOM Structure>
SINGA_2DC-G756I200
PR1
1M_0402_1%
1
2
DC231000500
PC5
1000P_0402_50V7K
RTCVREF
Vin Dectector
Min.
H-->L 16.976V
L-->H 17.430V
PBJ1
2
+RTCBATT
+RTCBATT
Typ
17.525V
17.901V
Max.
17.728V
18.384V
ML1220T13RE
<BOM Structure>
PJ2
2
+3VALWP
PJ5
1
+3VALW
+0.9VP
JUMP_43X118
+0.9V
JUMP_43X79
VIN
PJ4
2
+5VALWP
PD4
LL4148_LL34-2
N1
PR11
200_0603_5%
1
2
+VSBP
PR10
68_1206_5%
VS
1
PC7
0.22U_0603_25V7K
PJ17
1
+VSB
+1.8VP
PC8
0.1U_0603_25V7K
+1.8V
JUMP_43X118
PJ18
1
+1.2VALW
+1.5VSP
JUMP_43X118
+1.5VS
JUMP_43X79
PJ20
1
+NB_CORE +VGA_COREP
+VGA_CORE
JUMP_43X79
IN
GND
PC9
10U_0805_10V4Z
PJ21
2
+2.5VS
+VGA_COREP
N2
@
1
OUT
+2.5VSP
JUMP_43X79
+VGA_CORE
JUMP_43X79
PJ23
PC10
1U_0805_25V4Z
PJ9
2
+1.1VSP
PJ22
PR14
200_0603_5%
PU2
G920AT24U_SOT89-3
3.3V
PJ16
RTCVREF
+CHGRTC
+1.8V
PR13
22K_0402_1%
1
2
PR12
100K_0402_1%
PJ8
2
+NB_COREP
PR16
560_0603_5%
1
2
JUMP_43X118
JUMP_43X118
PR15
560_0603_5%
1
2
JUMP_43X39
+1.2VALWP
51ON#
+1.8VP
PQ1
TP0610K-T1-E3_SOT23-3
41
+5VALW
JUMP_43X118
CHGRTCP
PJ6
PR9
68_1206_5%
2
BATT+
PJ7
1
PD5
LL4148_LL34-2
2
1
+1.1VS
+NB_COREP
@ JUMP_43X118
Compal Secret Data
Issued Date
2007/09/20
Deciphered Date
+NB_CORE
JUMP_43X79

2008/09/20
Title
Custom
SCHEMATIC A4921P
Rev
C
401679
Date:

D
Sheet
46
of
57
PH1 under CPU botten side :

CPU thermal protection at 93 degree C
Recovery at 57 degree C
VL
VL
VL
VMB
PR17
47K_0402_1%
PR18
47K_0402_1%
1
2
TM_REF1
PU3A
LM393DG_SO8
LL4148_LL34-2
PR23
100K_0402_1%
2
1
VL
1
2
PR25
100K_0402_1%
PR26
1K_0402_1%
PC15
1000P_0402_50V7K
+3VALWP
PR22
15.4K_0402_1%
PR24
6.49K_0402_1%
2
1
PC14
0.22U_0603_16V7K
PR21
100_0402_1%
1
PR20
100_0402_1%
PD6
O
SUYIN_250133MR007G115ZL
PQ2
DTC115EUA_SC70-3
PR19
13.7K_0402_1%
1
2
PC13
0.01U_0402_25V7K
PC12
1000P_0402_50V7K
MAINPWON 48
1
PC11
0.1U_0603_25V7K
PH1
100K_0603_1%_TH11-4H104FT
BATT+
EC_SMCA
EC_SMDA
PL2
SMB3025500YA_2P
1
2
BATT_S1
1
2
3
4
5
6
7
1
2
3
4
5
6
7
PJP2
BATT_TEMP 38
PH2 near main Battery CONN :

BAT. thermal protection at 79 degree C
Recovery at 47 degree C
EC_SMB_CK1 6,38
EC_SMB_DA1 6,38
VL
@ PR27
@PR27
47K_0402_1%
1
@PH2
@
PH2
100K_0603_1%_TH11-4H104FT
2
5
TM_REF1
@PR30
@
PR30
13.7K_0402_1%
1
2
@ PR32
@PR32
15.4K_0402_1%
@PD7
@
PD7
LL4148_LL34-2
2
1
PU3B
LM393DG_SO8
@ PC18
@PC18
0.22U_0603_16V7K
1
2
VL
+VSBP
1
PC17
0.1U_0603_25V7K
VL
1
2
1
PR31
22K_0402_1%
1
2
PR29
100K_0402_1%
PC16
0.22U_1206_25V7K
PQ3
TP0610K-T1-E3_SOT23-3
B+
@PR28
@
PR28
47K_0402_1%
1
2
VL
PQ4
2
G
PR34
0_0402_5%
2
48,51 SPOK
PC19
0.1U_0402_16V7K
PR33
100K_0402_1%
2N7002W-T/R7_SOT323-3
Compal Secret Data
Issued Date
2007/09/20
Deciphered Date

2008/09/20
Title
SCHEMATIC A4921P
Custom
Rev
C
401679
Date:

D
Sheet
47
of
57
TPS51427_B+
TPS51427_B+
16
DRVL1
18
DL5
LL2
DRVL2
23
30
VOUT2
32
REFIN2
PGND
22
VOUT1
10
FB1
11
VSW
2VREF_ISL6237
1
PC36
LDOREFIN
TRIP2
31
21
2
1
2VREF_ISL6237 1
EN2
GND
12
TONSE
TRIP1
VREF3
13
1
2
1
2
3
PGOOD1
0_0402_5%
1
VL
0_0402_5%
2
SPOK
47,51
PR48
330K_0402_1%
2
1
ILIM2
SN0806081RHBR_QFN32_5X5
PR49
330K_0402_1%
+5VALWP Ipeak=8.07A ; Imax=5.65A

Choke DCRmax=60m ohm, DCRtyp=54m ohm
Rds(on)=18m ohm(max) ; Rds(on)=15m
ohm(typical)
Vlimit=(5E-06 * 330K)/10=165mV
Ilimit=165mV/18m ~ 165mV/15m
=9.167A ~ 11A
PR53
0_0402_5%
@ PC39
0.047U_0402_16V7K
Delta I=1.123A (Freq=400KHz)

Iocp=Ilimit+Delta I/2
=9.729A ~ 11.562A
PQ35
@ TP0610K-T1-E3_SOT23-3
EN_LDO
27
@ PR44
2
PR45
1
2VREF_ISL6237 2
2
1
1
PC38
0.047U_0402_16V7-K
47 MAINPWON
28
EN1
@ PR50
0_0402_5%
@ PR55
47K_0402_5%
1
2
PGOOD2
14
2
PR51
0_0402_5%
2
PC37
0.22U_0603_25V7K
PR52
806K_0603_1%
PR54
0_0402_5%
2
FB5
29
NC
PC143
1U_0603_10V6K
1
2
2
1
PR47
200K_0402_5%
1
2
VL
20
PR46
100K_0402_1%
1
2
PD12
1SS355_SOD323-2
+ PC35
C
150U_D2E_6.3VM_R18
VREF2
SKIPSEL
PD8
GLZ5.1B_LL34-2
1
2
0.22U_0603_10V7K
Delta I=1.085A (Freq=300KHz)

Iocp=Ilimit+Delta I/2
=9.71A ~ 11.543A
LL1
LX5
PQ8
AO4712_SO8
3
2
1
25
DL3
VL
VS
DH5
PR40 0_0603_5%
BST5A 2
1
PR41
63.4K_0402_1%
17
PR43
10K_0402_1%
1
2
15
VBST1
PR39
4.7_1206_5%
2
1
DRVH1
VBST2
PL4
8.2UH +-20% FDV0630-8R2M=P3 3.7A
2
1
PC34
680P_0402_50V7K
2
1
DRVH2
PC29
1U_0603_10V6K
1
2
PC32
0.1U_0603_25V7K
LX3
FB3
3
2
1
19
5
6
7
8
V5DRV
PC31
0.1U_0603_25V7K
@ PR42
10K_0402_1%
+3.3VALWP Ipeak=5.92A ; Imax=4.18A

Choke DCRmax=60m ohm, DCRtyp=54m ohm
Rds(on)=18m ohm(max) ; Rds(on)=15m
ohm(typical)
Vlimit=(5E-06 * 330K)/10=165mV
Ilimit=165mV/18m ~ 165mV/15m
=9.167A ~ 11A
+5VALWP
7
LDO
V5FILT
24
VIN
26
PC25
2200P_0402_50V7K
2
1
PC28
4.7U_0603_6.3V6M
2
1
PC27
1U_0603_10V6K
1
2
DH3
BST3A
1
2
3
PC33
680P_0402_50V7K
TP
PQ6
AO4466_SO8
4
2
C
PR37
2
1
0_0603_5%
PQ7
AO4712_SO8
PR38
0_0402_5%
PC30
330U_D2E_6.3VM_R25M
33
8
7
6
5
PU4
PR36
4.7_1206_5%
VL
1
2
3
PL3
8.2UH +-20% FDV0630-8R2M=P3 3.7A
1
2
+3VALWP
PC26
0.1U_0603_25V7K
PQ5
AO4466_SO8
4
PC24
4.7U_1206_25V6K
2
1
8
7
6
5
5
6
7
8
PC22
2200P_0402_50V7K
2
1
PC20
4.7U_1206_25V6K
2
1
2
1
PC114
2200P_0402_25V7K
2
1
PC116
PC21
4.7U_1206_25V6K
2
1
JUMP_43X118
2200P_0402_25V7K
PC23
4.7U_1206_25V6K
2
1
PR35
0_0805_5%
1
2
PJ10
B+
Compal Secret Data
2007/09/20
Issued Date
Deciphered Date

2008/09/20
Title
SCHEMATIC A4921P
Custom
Rev
C
401679
Date:
Sheet
1
48
of
57
24
LODRV
23
PGND
22
ACOFF
AGND
VREF
11
VDAC
SE_CHG+
SE_CHG-
BAT
17
SRSET
3
2
1
2
1
CP setting
PR82
100K_0402_1%
1
2
G
VADJ
@PR177
@
PR177
4.3K_0402_5%
PQ19
2
G
@ PQ16
2N7002W-T/R7_SOT323-3
24751_VREF
2
15,29,38,40,46
PC144
1000P_0402_50V7K
PR81
100K_0402_1%
1
2N7002W-T/R7_SOT323-3
PR80
0_0402_5%
1
CHGEN#
D
2N7002W-T/R7_SOT323-3
38
PQ18
2
G
FSTCHG
2N7002W-T/R7_SOT323-3
4
Vbatt= Cell count + 4V + ( 0.5*( Vadj/ Vdac) )

PR78
PR84
4.0V
4.1V
887K
221K
4.2V(1.32)
Charger ADJ
Calibrate#
Compal Secret Data
Issued Date
2007/09/20
Deciphered Date

2008/09/20
Title
Custom
SCHEMATIC A4921P
Rev
C
401679
Date:
ACIN
ACGOOD#
PQ17
SI2301BDS-T1-E3_SOT23-3
2N7002W-T/R7_SOT323-3
REGN
3
2N7002W-T/R7_SOT323-3
PR78
887K_0402_1%
1
S
PR86
100K_0402_1%
2
PQ20
2
G
PQ36
2
G
1
1
65W/90W#
38
@ PR75
@PR75
100K_0402_1%
24751_VREF
PQ15_GATE
38 CALIBRATE#
PR85
100K_0402_1%
PC44
2200P_0402_25V7K
@PR176
@
PR176
0_0402_5%
1
38
PR180
200K_0402_1%
2
1
1
ADP_I
ACSET
24751_VREF
PQ37
2
G
PR181
340K_0402_1%
2
1
2
2
PR83
64.9K_0402_1%
24751_VREF 1
2
PC163
0.1U_0402_16V7K
ACOFF 1
2
PR79
105K_0402_1%
6
PC66
0.01U_0402_25V7K
24751_VREF
10_0603_5%
IREF=0.7748*Icharge
2
PR76
499K_0402_1%
IREF 38
PC63
100P_0402_25V8K
38 BATT_OVP
PU1B
LM358DT_SO8
7 0
PR77
10K_0402_1%
1
2
24751_VREF
PR73
100K_0402_1%
PC64
100P_0402_50V8J
Per cell=4.5V
15
IADAPT
BATT-OVP=0.1112*VMB
BQ24751ARHDR_QFN28_5X5
LI-3S :13.5V----BATT-OVP=1.5012V
PC65
0.01U_0402_25V7K
BATT-OVP=0.1112*VMB
BATDRV
PR74
340K_0402_1%
VS
LI-4S :18.0V----BATT-OVP=2.001V
14
PR179
100K_0402_1%
2
1
Input OVP : 22.3V
Fsw : 300KHz
/BATDRV
CP POINT=(1.436V/3.3V)*(0.1/0.015)=2.901A
PR72
Vacset=3.3*(50K/(50K+64.9K))=1.436V
For 2200mA, Icharge=0.8C=0.8*2*2.2=3.52A

For 2400mA, Icharge=0.8C=0.8*2.4*2=3.84A
Icharge=(Vsrset/Vdac)*(0.1/PR62)
IREF=((100k/(100K+17.4K))/3.3)*(0.1/0.02)=Icharge
16
PR71
17.4K_0402_1%
2
1
SRSET
ACGOOD
Icharge Setting
ICHG setting
PR84
221K_0402_1%
2
1
29
VMB
TP
13
65W adapter R=(100K*100K)/(100K+100K)=50K
Input UVP : 17.26V
PC61
0.1U_0603_25V7K
VADJ
ACGOOD#
12
19
18
VADJ
SRP
SRN
1
1
ACSET
PC43
4.7U_1206_25V6K
24751_VREF
10
PC60
1U_0603_10V6K
PR70
100K_0402_1%
2
CP Point=(Vacset/Vvdac)*(0.1/PR56)=4.04A
PC62
0.1U_0603_25V7K
@PC59
@PC59
0.1U_0603_25V7K
RTCVREF
CP point=Iadapter*85%
90W adapter
Vacset=3.3*(100K/(64.9K+100K))=2.001V
PC58
0.1U_0603_25V7K
CELLS
20
CELLS
PR69
100K_0402_1%
1
2PQ15_GATE
2
CP Point Setting
21
LEARN
38
1
PQ15
SI2301BDS-T1-E3_SOT23-3
PC57
0.1U_0402_16V7K
1
2
1
OVPSET
DL_CHG
24751_VREF
Cells selector
PR68
54.9K_0402_1%
PQ13
AO4466_SO8
PC55
680P_0402_50V7K
BATT+
2
ACOP
OVPSET
3
2
1
38
PC54
1U_0603_10V6K
@ PQ14
2N7002W-T/R7_SOT323-3
2
3S/4S#
G
REGN
PR62 0.02_1206_1%
4
PC53
10U_1206_25V6M
ACSET
PC56
0.47U_0603_16V7K
1
2
@ PR64
@PR64
4.7_1206_5%
1
1
ACSET
PR67
340K_0402_1%
CELLS
PR63
54.9K_0402_1%
PR66
0_0402_5%
1
2
4 Cell
1REGN
3 Cell
VREF
@ PR65
@PR65
47K_0402_1%
GND
PL5
10UH_PCMB104T-100MS_6A_20%
1
2
LX_CHG
PD10
2
CELLS
5
6
7
8
DH_CHG
PC51
LL4148_LL34-2
0.1U_0603_25V7K
24751_VREF
BTST
25
PC52
10U_1206_25V6M
PH
PQ12
SI4835DDY-T1-E3_SO8
/BATDRV
PC92
1
ACDRV
ACDET
26
PR57
100K_0402_1%
4
5
HIDRV
PC40
0.01U_0402_25V7K
PQ11
AO4466_SO8
10U_1206_25V6M
ACDRV
27
PR61
0_0603_5%
1
2
Place close to back to back

MOS
ACDET
BTST
PVCC
ACN
ACP
28
PVCC
2
3
PC42
4.7U_1206_25V6K
1 CHGEN
@PC49
@PC49
0.1U_0603_25V7K
5
6
7
8
PC48
0.1U_0603_25V7K
1
2
PU5
ACN
ACP
PC50
2.2U_0805_25V6K
CHG_B+
3
2
1
1
PC47
0.1U_0603_25V7K
JUMP_43X118
0.015_2512_1%
3
CHGEN#
5
6
7
8
2
2
PR56
4
PR60
340K_0402_1%
1
2
PJ11
PC46
0.1U_0402_16V7K
1
2
PR174
3.3_1210_5%
8
7
6
5
PR58
3.3_1210_5%
1
2
3
1
2
3
PR59
100K_0402_1%
8
7
6
5
PC45
0.01U_0402_25V7K
VIN
B+
PQ10
AO4407A_SO8
PQ9
AO4407A_SO8

D
Sheet
49
of
57
FB1_NB_COREP
POWER_SEL
+5VALW
1
2
1
2
VIN2
FB1
1
GND_T
29
PGOOD2
28
PR98
3.3K_0402_5%
2
1
3
VCC2
4
VCC1
PR92
18.2K_0402_1%
PR97
22.6K_0402_1%
8
7
6
5
OCSET_1.1V
10
OCSET1
1.1V_EN
11
EN1
FB2
VO2
26
OCSET2
25
EN2
24
UGATE1
PHASE2
23
BOOT1
UGATE2
22
PQ21
AO4466_SO8
6228_1.8VO2
OCSET_1.8V
PC79
4.7U_1206_25V6K
+1.8VP
PL12
1UH_FDV0630-1R0M-P3_10.3A_20%
<BOM Structure>
1
+
2
1
2
D
D
D
D
5
6
7
8
1
PR108
4.7_1206_5%
<BOM Structure>
PC88
330U_D2E_2.5VM
PC89
680P_0402_50V7K
<BOM Structure>
1.8VP Ipeak=15.51A, Imax=10.86A

Fsw=1/1.5E-10*18.2k =366K
Vo=Vref*((PR97+PR99)/PR97)
Ipeak=15.51A, Imax=10.86A
Iocp=15.51*1.2=18.61A
Delta I=5.565A
Iocp*DCR=(Rocset*9.5uA)=(18.61+2.7825)*10m; Roset=22.5K
now chose Roset=22.6K
Csen=L/(DCR*Roset)=0.8uH/(10m*22.5k); Csen=3.56nF
now chose Csen=3300pF
Iocp_min=(22.6K*9.5uA)/(10m ohm*1.3) =16.52A
Iocp_max=(22.6*10.5uA/(10m ohm )=23.73A
1
2
PR105
25.5K_0402_1%
<BOM Structure>
DCR 10m ohm(max)

Cout ESR=15m ohm
L=1uH(L=0.8uH_12A )
1.1V_EN
@PC94
@PC94
0.1U_0402_16V7K
Compal Secret Data
Issued Date
G
S
S
S
PC86
1U_0402_6.3V6K
Cout ESR=15m ohm
41,45,51 VLDT_EN
3
2
1
2
1
+5VALW
LG_1.8V
PR112
0_0402_5%
1
2
1
2
BOOT2
LX_1.8V
LG_1.1V
NB_CORE (1.1VSP)
OCP Seting
Fsw=1/1.5E-10*22k =303K
Vo=Vref*((PR95+PR94)/PR94)
Iocp=17.53*1.2=21.04A
Delta I=3.838A
Iocp*DCR=(Rocset*9.5uA)=(21.04+1.92)*3.5m; Roset=8.44K
now chose Roset=8.66K
Csen=L/(DCR*Roset)=0.9uH/(3.5m*8.44k); Csen=0.031uF
now chose Csen=0.033uF
Iocp_min=(8.66K*9.5uA)/(3.5m ohm*1.3) =18.08A
Iocp_max=(8.66*10.5uA/(3m ohm *1.3)=23.32A
PQ23
PC82
4700P_0402_25V7K
1
2
UG_1.8V
PR109
PC87
0_0603_5% 0.1U_0402_16V7K
BST_1.8V 1
2
1
2
PC85
1U_0402_6.3V6K
ISL6228_B+
<BOM Structure>
21
20
PVCC2
LGATE2
19
PGND2
18
PGND1
17
15
PVCC1
PC84
0.1U_0402_16V7K
+5VALW
DCR3.5m ohm(max)
38,45
LGATE1
PR106
0_0603_5%
1 2
1BST_1.1V14
16
13
SYSON
@ PC78
@PC78
0.01U_0402_25V7K
1
2
PQ22
FDS6670AS_NL_SO8
S
S
S
1
2
3
1
2
PHASE1
PC81
4.7U_1206_25V6K
PR103
0_0402_5%
1
2
PQ24
FDS6670AS_NL_SO8
1
2
3
G
PC83
680P_0402_50V7K
<BOM Structure>
12
5
6
7
8
PU6
8
7
6
5
LX_1.1V
UG_1.1V
PL6
1.0UH_PCMC104T-1R0MN_20A_20%
PR104
1 <BOM Structure>
4.7_1206_5%
+
<BOM Structure>
D
D
D
D
FB_1.8V
<BOM Structure>
Structure>PR100
PR100
25.5K_0402_1%
1
2
Vref=0.6V
FB_1.8V-1
27
ISL6228HRTZ-T_QFN28_4X4
+NB_COREP
PC80
330U_D2E_2.5VM
VO1
3
2
1
PR101
10.5K_0402_1%
9
PC77
4.7U_1206_25V6K
PC76
4.7U_1206_25V6K
2
1
PC75
0.033U_0402_16V7K
1
2
ISL6228_B+
PC74
1000P_0402_50V7K
1
2
PR99
45.3K_0402_1%
1
2
6228_1.1VO1
ISL6228_B+
PC73
1000P_0402_50V7K
2
1
2
7
PR96
10.5K_0402_1%
1
2
PGOOD1
FB1_NB_COREP
PC69
0.1U_0603_25V7K
1
PC71
1000P_0402_50V7K
PR94
59K_0402_1%
PR95
51K_0402_1%
2
1
+NB_COREP
PR93
3.3K_0402_5%
1
2
PR90
10_0603_1%
2
1
PC72
1000P_0402_50V7K
2
1
+5VALW
FSET2
ISL6228_B+
PR89
10_0603_1%
2
1
1
+
PC70
0.1U_0603_25V7K
PJ12
JUMP_43X118
2 2
1 1
PR88
2.2_0603_1%
1
2
3
1
PC105
@ 0.01U_0402_16V7K
PR87
2.2_0603_1%
2
1
PQ28
@ SSM3K7002F_SC59-3
ISL6228_B+
PC218
100U_25V_M
<BOM Structure>
B+
+5VALW
PC68
1U_0402_6.3V6K
PR91
22K_0402_1%
2
PC107
0.01U_0402_25V7K
2
G
PC67
1U_0402_6.3V6K
11 POWER_SEL
PQ25
@ SSM3K7002F_SC59-3
1
2
2
PR121
G
@ 0_0402_5%
PR123
@ 0_0402_5%
1
2
PR102
@ 10K_0402_1%
VIN1
1.1V
PR122
12K_0402_1%
LOW
FSET1
1.0V
1
HIGH
2007/09/20
Deciphered Date

2008/09/20
Title
Custom
SCHEMATIC A4921P
Rev
C
401679
Date:

D
Sheet
50
of
57
DL_1.2V
PGOOD
14
13
DH_1.2V
LL
12
LX_1.2V
TRIP
11
V5DRV
10
DRVL
2
1
PC95
330U_D2E_2.5VM
+5VALW
2
DL_1.2V
TPS51117RGYR_QFN14_3.5x3.5
DRVH
VFB
VBST
VFB=0.75V
PGND
V5FILT
TP
1
EN_PSV
VOUT
+1.2VALWP
PC97
4.7U_0805_10V6K
PC98
1U_0603_10V6K
TON
BST_1.2V
1
2
3
4
2.2UH +-20% FDV0630-2R2M=P3 7.2A

PL8
1
2
PR113
PC93
0_0603_1%
0.1U_0603_25V7K
1
2BST_1.2V-1 1
2
@ PC96
@PC96
47P_0402_50V8J
1
2
GND
PR114
300_0603_5%
1
2
PU7
@ PC90
@PC90
0.01U_0402_25V7K
15
1
2
+5VALW
D2
D2
G1
S1
AO4932_SO8
SPOK
G2
S2/D1
S2/D1
S2/D1
B+
PC118
2200P_0402_25V7K
PR110
0_0402_5%
2
1
PR115
10K_0402_1%
47,48
8
7
6
5
PQ26
DH_1.2V
PR111
300K_0402_5%
1
2
51117_B+
PJ13
JUMP_43X118
2 2
1 1
PC120
2200P_0402_25V7K
PC91
4.7U_1206_25V6K
PR116
6.34K_0402_1%
1
2
1
+1.2VALW
PR117
10K_0402_1%
+5VALW
1
2
1
2
9
PR129
1.15K_0402_1%
APL5912-KAC-TRL_SO8
PC108
0.01U_0402_25V7K
22U_0805_6.3V6M
FB
VIN
+1.1VSP
1
VOUT
PC113
2
1
GND
EN
@
PR194
47K_0402_5%
@ PC109
@PC109
1U_0603_10V6K
Cout ESR=15m ohm

Delta I=((19-1.2)*(1.2/19))/(L*Fsw)=2.59A
=>1/2DeltaI=1.295A
Vtrip=Rtrip*10uA=10K*10uA=0.1V
Iocp_min=Vtrip/Rdsonmax*1.4+1.295A
=0.1/(0.0196*1.4)+1.295=3.644A+1.295A=4.939A
Iocpmax=(0.1/(0.016*1.2))+1.1.295A=5.208A+1.295A
=6.503A
Iocp=6.503A~4.939A
VLDT_EN
0_0402_5%
1
2
VIN
VOUT
POK
PR128
41,45,50 VLDT_EN
PR127
3K_0402_1%
2
+1.8V
PJ14
JUMP_43X79
VCNTL
VFB=0.75V
Vo=VFB*(1+PR116/PR117)=0.75*(1+10K/10K)=1.5V
Ton=19E-12*Ron*(((2/3)*Vo+100mV)/vin)+50ns=3.2E-7
Fsw=200KHz
PC111
4.7U_0805_6.3V6K
PU9
PC110
1U_0402_6.3V6K
PJ15
JUMP_43X79
@
VCNTL
GND
NC
REFEN
NC
VOUT
NC
GND
+3VALW
1
VIN
PR118
1K_0402_1%
PC99
4.7U_0603_6.3V6M
PU8
1
PC100
1U_0402_6.3V6K
1K_0402_1%
+0.9VP
2
PC101
0.1U_0402_16V7K
2
1
PR120
2N7002W-T/R7_SOT323-3
2007/09/20
Deciphered Date
PC104
10U_0805_6.3V6M
A
Compal Secret Data
Issued Date
PC103
0.1U_0402_16V7K
PQ27
2
G
PR119
0_0402_5%
1
2
1
36,37,45 SYSON#
RT9173DPSP_SO8

2008/09/20
Title
SCHEMATIC A4921P
Custom
Rev
C
401679
Date:
Sheet
1
51
of
57
+1.8V
2
2
PC112
1U_0402_6.3V6K
PJ24
@ JUMP_43X79
APL5915KAI-TRL_SO8
1
PC117
0.01U_0402_25V7K
PR132
1.54K_0402_1%
PC119
22U_0805_6.3V6M
+1.5VSP
1
VIN
VCNTL
FB
PC115
4.7U_0805_6.3V6K
@
PR188
47K_0402_5%
VOUT
PC121
0.1U_0402_16V7K
EN
VIN
VOUT
10K_0402_1%
1
2
SUSP#
38,41,45
GND
POK
PR130
PU11
7
+5VALW
PR133
1.74K_0402_1%
PU15
APL5508-25DC-TRL_SOT89-3
3
1
2
PC106
4.7U_0805_6.3V6K
PC102
1U_0402_6.3V6K
+2.5VSP
1
OUT
GND
<BOM Structure>
@ PR124
@PR124
150_1206_5%
2
IN
+3VS
B
Compal Secret Data
2007/09/20
Issued Date
Deciphered Date

2008/09/20
Title
SCHEMATIC A4921P
Custom
Rev
C
401679
Date:
Sheet
1
52
of
57
CPU_B+
PR219
2_0603_5%
PR215
0_0603_5%
BOOT_NB 1
2 1
CPU_VDDNB_FB_H
PR221
11.3K_0402_1%
2
1
LGATE1
UGATE1
26
UGATE1
VW0
BOOT1
25
BOOT1
24
ISN1
2
4
PL18
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2
PC211
180P_0402_50V8J
A
PR255
1K_0402_5%
2
1
PR256
2
PC216
2
1
DIFF_1
VW1
PR254
PC213
255_0402_1% 4700P_0402_25V7K
FB_1
2
1 2
1
PC212
1000P_0402_50V7K
PR258
1K_0402_5%
2
1
54.9K_0402_1% 1200P_0402_50V7K
PR259
2
PC208
680P_0603_50V7K
1 PR249 2
4.02K_0402_1%
PC209
2
1
0.1U_0402_16V7K
LGATE1
COMP1
PC214
180P_0402_50V8J
PR257
6.81K_0402_1%
2
1
3
2
1
PR251
10_0402_5%
1
PR247
16.2K_0402_1%
+CPU_CORE_1
Design Current: 12.6A
Max current: 18A
OCP_min:24A
PC215
1000P_0402_50V7K
PR260
6.81K_0402_1%
2
1
PC217
2
1
ISN1
COMP0
PR248
4.7_1206_5%
PQ50
AO4456_SO8
VSEN1
VW0
PR253
PC210
255_0402_1% 4700P_0402_25V7K
FB_0
2
1 2
1
PQ49
AO4456_SO8
4
1 2
RTN1
PR246 10_0402_5%
2
1
+CPU_CORE_1
ISP1
DIFF_0
PR243
2.2_0603_1%
BOOT1 1
2 1
PC207
0.22U_0603_10V7K
+CPU_CORE_1
+CPU_CORE_0
Max current: 18A
OCP_min:24A
PHASE1
3
2
1
6 CPU_VDD1_FB_H
PC198
2200P_0402_50V7K
2
1
3
2
1
PQ48
SI7686DP-T1-E3_SO8
UGATE1
PR246 change as 10K for EVT2 Tigris

6 CPU_VDD1_FB_L
PC196
10U_1206_25V6M
2
1
3
2
1
5
TP
49
23
ISP1
VW1
22
FB1
CPU_B+
10_0402_5%
1
21
14
RTN0
LGATE0
5
6
7
8
6 CPU_VDD0_FB_L
ISN1
COMP0
12
ISP1
11
COMP1
PHASE1
PC202
1U_0603_16V6K
PC201
2
1
0.1U_0402_16V7K
ISN0
28
PC200
680P_0603_50V7K
1 PR235 2
4.02K_0402_1%
ISP0
29
PGND1
PC203
10U_1206_25V6M
2
1
LGATE1
LGATE0
3
2
1
30
1
31
PVCC
PQ47
AO4456_SO8
4
LGATE0
PQ46
AO4456_SO8
4
+5VS
PHASE0
32
PR233
4.7_1206_5%
PC206
2200P_0402_50V7K
2
1
33
PGND0
+CPU_CORE_0
PR232
16.2K_0402_1%
PHASE0
PC199
0.22U_0603_10V7K
1 2
UGATE0
PC204
10U_1206_25V6M
2
1
BOOT0
PL17
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2
2
5
6
7
8
35
34
PR229
2.2_0603_1%
BOOT0 1
2 1
5
6
7
8
BOOT0
UGATE0
BOOT_NB
27
PR241
+CPU_CORE_0 2
1
10_0402_5%
PC195
10U_1206_25V6M
2
1
5
2
BOOT_NB
PHASE1
0_0402_5%
PR240
1
2
PQ45
SI7686DP-T1-E3_SO8
UGATE0
37
UGATE_NB
39
40
38
PHASE_NB
LGATE_NB
42
43
44
46
45
41
PGND_NB
OCSET_NB
36
FB0
VSEN0
PR245
2
CPU_VDDNB_FB_L 6
10
13
6 CPU_VDD0_FB_H
PC187
2200P_0402_50V7K
2
1
CPU_B+
PHASE0
ISL6265IRZ-T_QFN48_6X6~D
ISP0
ISN0
PC192
220U_D2_4VM
PC197
0.01U_0402_25V7K
2
1
VDIFF0
RTN_NB
OCSET
FSET_NB
VSEN_NB
RBIAS
FB_NB
ENABLE
COMP_NB
20
PR239
1
82.5K_0402_1%
SVC
VDIFF1
SVD
ISP0
PR238
2
1
34.8K_0402_1%
19
VR_ON
PWROK
VSEN1
1
0_0402_5%
RTN1
38
2
PR236
CPU_SVC
1
0_0402_5%
PGOOD
RTN0
2
PR234
CPU_SVD
OFS/VFIXEN
VSEN0
47
2
1
PR230 0_0402_5%
1
2
1
2
PR231 0_0402_5% @
27 H_PWRGD_L
15
PR242 0_0402_5%
2
1
16
0_0402_5%
2 PR244 1
17
0_0402_5%
2 PR250 1
18
VGATE
VCC
VIN
PU14
ISN0
38
+
PC193
680P_0603_50V7K
UGATE_NB
LGATE_NB
PR226
10_0402_5%
PR228
@ 105K_0402_1%
+VDDNB
Max current: 3A
OCP_min:5A
PHASE_NB
1
PR224
0_0402_5%
48
1
2
PR227
105K_0402_1%
PC185
10U_1206_25V6M
2
1
2
PR225
@ 10K_0402_1%
PR217
4.7_1206_5%
+CPU_CORE_NB
PHASE_NB
PR220
0_0402_5%
PR223
@ 105K_0402_1%
PL16
3.3UH_SIQB74B-3R3PF_5.9A_20%
1
2
PC191
0.22U_0603_10V7K
+CPU_CORE_NB
3
2
1
PR222
0_0402_5%
1
2
3
4
AO4932_SO8
PC194
0.1U_0603_16V7K
D2
D2
G1
S1
5
6
7
8
+3VS
G2
S2/D1
S2/D1
S2/D1
PHASE_NB
PR218
10_0402_5%
1
2
+5VS
8
7
6
5
B+
1
PR216
22K_0402_1%
2
1
2
1
PQ43
UGATE_NB
PC184
1200P_0402_50V7K
PC189
1000P_0402_50V7K
2
1
PC190
0.1U_0603_16V7K
CPU_B+
1 2
PR214
2_0603_5%
1
2
+5VS
PR213
44.2K_0402_1%
PL15
HCB4532KF-800T90_1812
1
2
PC186
0.01U_0402_25V7K
2
1
LGATE_NB
PC183
33P_0402_50V8K
2
1
PC188
100U_25V_M
<BOM Structure>
PC205
0.01U_0402_25V7K
2
1
54.9K_0402_1% 1200P_0402_50V7K
Compal Secret Data
2008/04/16
Issued Date
2009/04/16
Deciphered Date
Title

SCHEMATIC A4921P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
Date:
Rev
C
401679
Sheet
1
53
of
57
PL13
B+_core
DH_VCORE
1 PR183 2
PR184 0_0603_5%
BST_VCORE
1
2
DH_VCORE-1
1
0_0603_5%
+5VS
PC166 0.1U_0603_25V7K
DCR=3m OHM
ISEN
11
SI7636DP-T1-E3_SO8
4
3
2
1
@680P_0603_50V7K
<BOM Structure>
PR193
3.48K_0402_1%
2N7002W-T/R7_SOT323-3
PR198
40.2K_0402_1%
5.9K_0402_1%
+3VS
PR197
8.25K_0402_1%
Rds=4.8mOHM
1
VFB=0.6V
PC173
0.01U_0402_25V7K
+
2
PR196
2
1
2
1
PC174
2200P_0402_25V7K
1
2
22P_0402_50V8J
PC172
PR195
33K_0402_1%
1 PC169
ISL6268CAZ-T_SSOP16
PC171
10
0.1U_0402_16V7K
S
S
S
+VGA_COREP
PR191
@4.7_1206_5%
1 2
VO
5
SI7636DP-T1-E3_SO8
7.5K_0402_1%
FSET
FB
COMP
PR190
ISEN_VCORE
1
2
PQ40
EN
PQ39
330U_V_2.5VM_R9M
12
0.56UH_ETQP4LR56WFC_21A_20%
1
2
PQ41
<BOM Structure>
PR211
10K_0402_5%
PR199
10K_0402_1%
1
2
@ PR200
PC175
10K_0402_1%
0.022U_0402_25V7K
1
2
G
S
PGND
PL14
DL_VCORE
13
LG
VCC
PC170
C
PR192
1
BOOT
14
2
100K_0402_1%
6269_VCORE
VGA_ON
PR1862
4.7_0603_5%
1
2 PC167
2.2U_0603_6.3V6K
PC168
2.2U_0603_6.3V6K
PR187
10K_0402_5%
PR189
41
3
2
1
16
UG
PVCC
6269_VCORE
PQ38
SI7686DP-T1-E3_SO8
15
VIN
PHASE
+3VS
PGOOD
GND
PU12
PR185
0_0603_5%
10_0402_1%
1
2
VGA_CORE
Imax=11.37A
Ipeak=16.24A
Iocp=19.49A
Cesr=9 mOHM
Rds(on)=4.8 mOHM
LX_VCORE
PC165
10U_1206_25V6M
1
2
D
PC164
10U_1206_25V6M
FBMA-L11-322513-201LMA40T_1210
S
S
S
3
2
1
B+
+3VS
<BOM Structure>
PR212
10K_0402_5%
1
10K_0402_1%
21
2
G
VGA_PWRSEL 15
PR202
PQ42
2N7002W-T/R7_SOT323-3
PR201
10K_0402_1%
VGA_PWRSEL
Core Voltage Level
1.2 V
0.95 V
M92-M2 XT
Compal Secret Data
Issued Date
2007/12/18
2008/12/18
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Rev
C
401679
Date:
Sheet

1
54
of
57
Version change list (P.I.R. List)

Item
D
Reason for change
PG#
0.1
50
Switch NB_core voltage
0.1
51
EMI requestmrnt
0.1
50
Add PR104 4.7 ohm and PC83 680p
2009/01/04
EMI requestmrnt
0.1
50
Add PR108 4.7 ohm and PC89 680p
2009/01/04
EMI requestmrnt
0.1
53
Add PR229 2.2 ohm
2009/01/04
DVT
EMI requestmrnt
0.1
53
Add PR243 2.2 ohm
2009/01/04
DVT
Change resistance value
0.1
50
Change PR95 from 51 Kohm to 39.2 Kohm
2009/01/04
DVT
0.1
50
Change PR122 from 12 Kohm to 226 Kohm
2009/01/04
DVT
ADD circuit
ADD circuit
ADD snubber
ADD snubber
ADD CPU boot
ADD CPU boot
8
9
10
11
Modify List
Page 1 of 2
for PWR
Rev.
7
C
Fixed Issue
ADD PC107, PC105, PR121, PR123, PR122, PR102, PQ25,

PQ28 at UMA Sku
ADD PC110, PC111, PC108, PC109, PC1113, PR1128,
PR194, PR129, PR127 at UMA Sku
Date
2009/01/04
Phase
DVT
D
2009/01/04
DVT
DVT
DVT
soft start of Switch NB_core voltage
0.1
50
Change PR123 from 0 ohm to 10 Kohm
2009/01/04
DVT
Change capacitor value
soft start of Switch NB_core voltage
0.1
50
Change PC105 from 0.01 uF to o.1 uF
2009/01/04
DVT
0.1
48
Change PU4 part number to SA00002V400
2009/01/04
DVT
Change IC part number
Change IC part number
12
13
14
15
B
16
17
18
19
20
21
22
A
23
Compal Secret Data
Issued Date
2007/09/20

2008/09/20
Deciphered Date
Title
SCHEMATIC A4921P
Custom
Date:
Rev
C
401679
Sheet

1
55
of
57
PHASE
DVT
PAGE
MODIFICATION LIST
PURPOSE
P.6
Reserve R484/R485(0ohm_0402) for CPU SB temp sensor
Reserved EC SMBUS1 due to +3VS leakege when S3 entry with SMBUS2
P.8
Add C174/C175/C176 (0.1u_0402)
EMI request
P.10
C646/C647/C648/C649/C650/C651/C652/C653 with VGA@
BOM error
P.11
Add R488/R489 (0ohm_0402) & reserve R491/R492 (0ohm_0402)
UMA HDMI I2C bus mainly to RS780MN DDC port1 & reserve to port0
P.11
Reserve R490(0ohm_0402)
NA
P.12
Change L6/L7 from 0ohm_0805 as 0ohm_1206 & with VGA@
For DIS +1.1VS power source from fixed +NB_CORE
P.22
Remove VRAM Samsung(Q-die) & Qimonda type
Customer request
P.24
U35/R464/R465/C845/C846/C847/C848/C849 with @ & RP15 with UMA@
Separately as DIS sku only & UMA sku only
P.24
Add RP20/RP21/RP22/RP23(0ohm_0404_4P2R) with VGA@
For DIS sku only
P.24
Reserve Q52/R501/R502/R503
Reserve for UMA sku white screen flash when boot issue check
P.25
Change JHDMI1 from SMD type as DIP type(DC232000800)
DFX request
P.25
Change single MOS as 2 dual N-ch MOS(Q53/Q54) & reserve R506
NA (Just no need to modify)
P.26
R47/R58/U25/U26/C626/C628/R475 with UMA@ & R507 with VGA@ ,

U36/C850 with @ & delete R466 , add R493/R494/R495 with VGA@
P.27
Add R496 with @ & R476/R482 with @
NA
P.28
Add R509 with VGA@ & R510 with UMA@
Reserve SKU ID for SW even SW check device ID instead currently
P.29
Reserve C862/C863/C855/C856
Reserve eSATA function for future request
P.37
Change JUSB1 as SB700 USB port6
Dedicated HS port on lower-left position
P.38
Change U20 as KB926 D3 version (SA00001J580)
NA
P.38
D41 with VGA@ & D42 with UMA@
P.38
U20.85 defined as TP_LOCK _LED# feature
LED control simultaneously with Tutch-Pad locked function
P.38
Change R194 as 8.2kohm_0402
Change board ID as 1 (PCB revision : 0.2)
Issued Date
Compal Secret Data
2008/10/06
Deciphered Date
2009/10/06
Title
Size
B
Date:
SCHEMATIC A4921P
Document Number
Rev
C
401679
Sheet
1
56
of
57
PHASE
PAGE
MODIFICATION LIST
PURPOSE
P.39
Add R250/LED11/SW4
Add T/P lock button & T/P lock button LED
P.45
Reserve R499 , R497/R498/Q51
NA
P.45
Stuff R202
+1.2VALW leakege 640mv pulse when AC insertion & then might cause OVP
P.34
C26 with @ & C11 as SE070104Z80
NA
P.42
Stuff R446(0ohm_0805) & un-stuff U32(Audio LDO)
NA
P.6
Remove CPU side-band(internal) temp sensor function
NA
P.11/38
Add U49/C857/R744 (Reserve U48) & D42 with @, remove D42
NA
P.23/34
Add R676 for CLK_48M_SD , reserve R715 / R716 for CLK_48M_LAN
NA
P.24
Add R508(2.7K_0402) for ENVDD of UMA sku
NA
P.28
SB700 USB port 4 for Realtek RTS5159 card reader
NA
P.33
Add(co-layout) Realtek RTS5159 card reader
NA
P.37
Change JSAT1 PCB footprint as TYCO_1909574-1_11P-T
NA
P.38
R194 change as 18K_0402
Change board ID as 2 (PCB revision : 0.3)
P.40
LED1 / 5 / 8 / 9 /10 PCB footprint change as LED_HT-297DQ-GQ_4P
For DFX
P.44
Add H28 & H29
For thermal
DVT2
For TIGRIS
PVT
P.11
Add R511 with @ & U50
For LCD white screen flash when coldboot issue
P.11
Add C874 / C875 (1u_0402)
For CRT(acer lab) flicker
P.11/38
C857 / U49 with @ , R744 / D42 with UMA@
NA
P.42
Add L94(SM010027780) close to audio codec
For EMI
P.40
Modify LED 1 / 5 / 8 from dual Blue/Amber LED as single Blue LED
Follow acer spec
U3
U14
TIGRIS@
TIGRIS@
RS880M
R60
TIGRIS@
1K_0402_5%
2
R285 VGA@
For LED brightness test
P.23
Change LAN_CLKREQ# from U18.51 to U18.24 output
NA
NA
Change test pad (execpt T8/T13/T15/T17/T18/T24/T28

/T29/T33/T45/T46/T48/T50/T56/T57/T12) from TPC12 to TPC24
P.36
Reserve Q55 / Q56 / R745 / R746 / R747 / C876 to turn

off power of finger printer
P.38
R194 change as 18K_0402 for change board ID as 3

(PCB revision : 0.4)
R54
R46
LA4921MB Rev0: DA80000DP00

LA4921MB Rev1: DA80000DP10
LA4921MB with Sub/B Rev1: DAZ07R00100
2
VGA@
2
VGA@
1
150_0402_1%
1
2.2K_0402_5%
1
2.2K_0402_5%
2
R155 VGA@
2
R152 VGA@
1
499_0402_1%
1
499_0402_1%
2
R149 VGA@
2
R145 VGA@
1
499_0402_1%
1
499_0402_1%
2
R158 VGA@
2
R157 VGA@
1
499_0402_1%
1
499_0402_1%
Deciphered Date
2009/10/06

Title
Date:
1
1
C640
C662
VGA@
2
2
VGA@
3.3P_0402_50V8J
3.3P_0402_50V8J
3.3P_0402_50V8J
1
1
1
C667
C660
C639
VGA@
VGA@
2
2
2
VGA@
8P_0402_50V8J
8P_0402_50V8J
8P_0402_50V8J
1
499_0402_1%
1
499_0402_1%
SCHEMATIC A4921P
Custom
5
1
C633
VGA@
2
2
R141 VGA@
2
R137 VGA@
Compal Secret Data

2008/10/06
Issued Date
Search for MP font
For Discrete(HDMI)
PCB
MP
1
1
C664
C666
C727
C194
TIGRIS@ 2 TIGRIS@ 2 TIGRIS@ 2
TIGRIS@ 2
10U_0805_10V4Z
3300P_0402_50V7K
10U_0805_10V4Z
10U_0805_10V4Z
ZZZ
PCB 047 LA-4921P REV1 M/B
For Discrete(CRT)
Modify R12/R13/R17/R16 (300->220ohm) , modify R1/R2/R3 (1.2K->

866ohm) , modify R10 (300->715ohm) , modify R245/R247 (4.99K->
750ohm) , modify R244/R246 (4.99K->866ohm) , modify R250 (1.2K->5.1K)
P.39/40
SB710
1
Rev
C
401679
Sheet
1
57
of
57

Acer Aspire 4535 - La-4921p Kblg0 Nblg0 - Rev 1.0

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A

KBLG0/NBLG0 Schematics Document

Compal Electronics, Inc.

Compal Secret Data

Thursday, March 26, 2009

Model Name : KBLG0

LCD (LED BL)

AMD S1G2 Processor

1.8V DDRII 667/800

Hyper Transport Link

AMD S1G3 Processor

USB port 0,6

Power On/Off CKT.

DC/DC Interface CKT.

Compal Electronics, Inc.

Compal Secret Data

Thursday, March 26, 2009

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU (0.7-1.2V)

Core voltage for CPU (0.7-1.2V)

Voltage for On-die Northbridge of CPU(0.8-1.1V)ON

0.9V switched power rail for DDR terminator

1.1V switched power rail for NB VDDC & VGA

1.2V switched power rail

0.95-1.2V switched power rail

1.5V power rail for PCIE Card

1.8V power rail for CPU VDDIO and DDR

1.8V switched power rail

2.5V for CPU_VDDA

3.3V always on power rail

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail

5V switched power rail

VSB always on power rail

Board ID / SKU ID Table for AD channel

External PCI Devices

BTO Option Table

ADI ADM1032 (CPU)

GMT G781-1 (GPU)

IGP only mode

IGP only mode

Trigger from SB to Enable (PX_GPIO1/PX_+3VS/PX_+1.8VS/PX_+VGA_CORE)

IGP only mode

Compal Electronics, Inc.

Compal Secret Data

Thursday, March 26, 2009

Near CPU Socket

Compal Electronics, Inc.

Compal Secret Data

Thursday, March 26, 2009

Processor DDR2 Memory Interface

PLACE CLOSE TO PROCESSOR

Compal Electronics, Inc.

Compal Secret Data

Thursday, March 26, 2009

CPU internal thermal sensor

2.09V for Gate

FDV301N, the Vgs is:

Compal Electronics, Inc.

Compal Secret Data