10 watt, MBE GaAs FET Power Amplifier The authors describe a compact, 32% added efficiency, 10 watt, Class AB power amplifier module using GaAs FETs. The devices are made using molecular beam epitaxy technology. Raymond Basset Bernard Kraemer Ding Day Microwave Power Products Avantek, Inc. Santa Clara, California 62 APPiiED MICROWAVE Summer 1992 ‘compact, X-band, high efficiency power An capable of delivering 10 watts of power has been designed for use in solid state transmitters, electronic warfare systems and active phased-array applications. The performance in the 9.0-10.0 GHz band measured in CW oper- ation combines +40 dBm of output power (Po), 19 Bf associated gain (GLS) and 32% power-added efficiency (Eadd). This module also can be operat- ed in a pulsed mode. Hybrid and MMIC technology are combined to realize the efficient, 10 watt, X-Band amplifier module. ‘The amplifier uses hybrid technology and what we believe to be state-of-the-art molecular beam epitaxial (MBE) processing to realize its microwave monolithic integrated circuits (MMICs) and dis- crete GaAs FETS. The driver stage is a 2.5 watt, two-stage, single-ended power MMIC consisting of 2.2mm driver FET and a 5.76mm power FET. The power stage uses a pair of 6 watt, 12mm discretepower FETs combined in a balanced configuration with Lange couplers. The off-chip matching circuits and couplers are thin-film microstrip lines printed on alumina or barium titanate substrates. MMIC and discrete FET chips, capacitors and substrates are eutectically bonded onto a multi-lev- el gold-plated copper-molybdenum composite met- al carrier. This module contains on-board gate and drain bias circuits including decoupling and DC blocking capacitors. Overall module dimensions are 208mm x 7.6mm, The goal was to meet the requirements for an airborne system in which space and power are limited. The goal for the module is to meet the require- ments for X-band airborne systems in which both space and prime power are limited. The use of high- efficiency active devices also minimizes device channel temperature tise, to help increase the reli- ability of the system. Applications for this module include TWT replacement, transmitters for passive phased-array systems and transmit/receive modules for active phased-array radars. The most important performance parameter for high power devices is the power added efficiency (Eadd). High module output power can be ob- tained by combining several devices using parallel, push-pull or other balancing techniques. The out- put power (Pout) of cach MMIC or discrete chip is ‘maximized by using the largest possible gate width for the power stage compatible with acceptable production yields, Efficient device performance results when gain and breakdown voltage are optimized simultaneous. ‘The key to efficient device performance is to op- timize simultaneously gain and breakdown voltage. The material structure plays a very important role in this optimization. Generally, the gain increases. with the doping level in the active channel layer. However, increased doping results in a higher input capacitance and a lower breakdown voltage. The latter should be as large as possible for high Pout and Eadd. One solution to providing high break- down is to use a High-Low-High (H.L.H.) doping, 64 aPeniey MICROWAVE Sumner 1992 profile grown by molecular beam epitaxy. This is our standard power FET process [1] Five years ago, the best efficiency was realized exclusively with hybrids, today a mixture of hybrid and MMIC can be effectv Amplifier Topology Four to five years ago the most practical method for producing a high performance power module ‘was to use hybrid technology with discrete tran: tors exclusively. An example of such a first genera tion design is a 5-W, X-Band module used for a phased-array application [1,2], of which more than 2500 made by our firm. The typical CW perform- ance in the 9.2-10.2 GHz band was +373 dBm Pout, 33.2% Eadd, and 14.3 dB gain, For the past two years, it has been practical to produce second generation modules with improve- ‘ments in performance (particularly Eadd) and low- ered costs, using an MMIC as a single-ended driver followed by a balanced power stage using a pair of discrete GaAs FETs. This is the design used for this module (Figure 1). Future third-generation designs most likely will be built entirely around MMICs. ‘The schematic diagram of the 10 watt module using an MMIC as a single ended driver, followed by a balanced power stage using a pair of discrete GaAs FETs is shown in Figure 1. The off-chip matching circuits and couplers are thin film micros- trip lines printed on alumina or barium titanate substrates 6W, 12mm FET 434 x Bm 18 Gain 13 dB Gain ‘765 mA current 292 mA 0548 0 30 Loss dom Figure 1. Schematic diagram of the amplifier module. The driver is a two stage MBE monolithic power amplifier chip [3]. The MMIC consists of a 2.2mm FET driving a 5.76mm FET. The monolithicuses full interstage matching, partial matching at the input, and no matching at the output. When matched to 50 ohms at the input and the output using off-chip circuitry, the MMIC provides +335 dBm Pout, 33% Eadd and 14.5 dB gain across the 9,0-10.0 GHz band in class AB operation, The chip is very compact at 2.057mm x 1.778mm x 0.076mm, accommodating a good yield of chips per wafer. Figure 2 is a photograph of the MMIC die. The small chip size of the driver stage affords good wafer yields for the MMIC. Figure 2. Photograph of the two stage MBE power ampli- fier chip. The 12mm power GaAs FET uses the H-L-H doping profile (Figure 3). The geometry incorpo- rates 120 fingers, each 100 microns wide and 0.35 microns long. The structure has 12 cells, each cell consisting of a group of 10 fingers. Source pad via- hole grounding is used to reduce the source-to- ground inductance. The chip is 2.413mm x 0.457mm x 0.076mm. Figure 3. The 12mm power GaAs FET chip. 66 APPLE MICROWAVE Summer 1992 Module Performance With X Band FETs for which the gain and the breakdown voltage are relatively high, the optimal Eadd is obtained in Class AB amplifier operation at Vas =9.0 V and Tdsq=ldss/5. The Pout delivered by this device at 10.2 GHz is typically +38.0 dBm with an Eadd of 41%, for an input power of +30.7 dBm. The best performance measured has been a Pout of +38.5 dBm, and Eadd of 50 %. This corre- sponds to a power density of 590: mW/mm. The power and gain results reported in this paper were not de-embedded to correct for test fixture losses, and were measured under CW operation For measurement accuracy, the low impedance of the power chip was determined by measuring a smaller area scale model of the FET. Device Characterization and Modeling To obtain accurate device models, the power FET must be characterized using both large-signal, non-linear and small-signal linear methods. To ob- tain better accuracy in our measurements, a small FET with dimensions a known fraction of those of the large FET is used for modeling. For small-sig- nal information, standard S-parameter measur ments were performed on a 1.8mm PET. For large- signal characterization, a load-source pull system using fully-automatic coaxial tuners, switches, and an HP 8510 network analyzer was used. From these measurements a simplified unilateral broadband equivalent circuit was derived for the 1.8mm device. ‘The equivalent one-port model for the 12mm de- vice was calculated using lincar sealing transforma- tions from the 1.8mm FET. The equivalent circuit and the impedance ratios are shown in Figure 4. Input Output Gq = 0.91 pFimm Coup = 0.22 pFimm Ry =43Q+mm Roy: = 50.4.2 mm Figure 4. Simplified equivalent circuit for the 12mm pow- er FET at VDS =9.0 V, biased for class AB operation.