Block Diagram

7. Block Diagram
7-1 Overall Block Diagram
LOGIC CONTROL
R-Data 8,10,12 or 13Bits G-Data 8,10.12 or 13Bits B-Data 8,10,12 or 13Bits

Display Data

DRIVER CIRCUIT & PANEL

DRAM

Row Driver

Input Data Processor

Data Controller

DCLK HSYNC HSYNC DEN LVDS Interface

Driver Timing

1024 x 768 Pixels 1024 x 3 x 768 Cells

X Pulse Generator

Driver Timing Controller

Y Pulse Generator
- 3V3 - Vcc - Va - Vs - Vsc - Ve - Vset

Scan Timing

Column Driver

Vcc 3V3 Va Vs Vset Vsc Ve Reference : Voltage for Logic Control : Voltage for FET driver : Voltage for address pulse : Voltage for sustain pulse : Voltage for scan pulse : Voltage for X ramp pulse : Voltage for Y ramp pulse

Image Scaler + Video Decoder Micom

Samsung Electronics

7-1

Block Diagram

CN804-1(Main SMPS) CN102(Main Board) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 Signal 5.3V RTN N/C N/C RTN RTN 12V PS_ON RTN STBY FAN_ON FAN_D

CN803(Main SMPS) CN101(Main Board) Pin No. 1 2 3 4 5 6 7 8 9 10 Signal 6.5V RTN 12V RTN 18Vamp 18Vamp RTN_amp RTN_amp Vt RTN

CN810(Main SMPS) CN2013(Logic Board) Pin No. 1 2 3 4 5 6 7 8 9 10 Signal STBY VS_ON N/C PS_ON RTN 5.3V RTN RTN 5.3V 5.3V

CN2(DC-DC SMPS) CN5007(Y B'D) Pin No. 1 2 3 4 5 6 7 8 9 10 Signal Vs Vs RTN RTN Vset RTN Vscan RTN Vg D5.3V

CN4(DC-DC SMPS) CN4001(X B'D) Pin No. 1 2 3 4 5 6 7 8 9 Signal D5.3V Vg RTN RTN Ve RTN RTN Vs Vs

CN6(DC-DC SMPS) CN2509(E-Buffer) Pin No. 1 2 3 4 5 Signal RTN N.C D5.3V N/C Va

7-2

Samsung Electronics

Block Diagram

7-2 Partial Block Diagram

7-2-1 Audio/Video Signal Block Diagram
DDR (16MB ) K 4D263238D Ren es as M30620 Flash Memory 144Pin 16K RAM

Vi d eo 1/2

SVP PX
(256-FPGA) Si d e S.Vi d eo Co m p o n en t 3D Comb Multi Decoder De-interlacer Scaler LVDS Out WXGA Output DNIe (Demo) Caption/TTX2.5 DVI 10b it p ro c ess EEPROM L VDS Tx 12b i t

LBE ( SD)

PC DVI

H.P Ser v i c e

Au d i o SW HC4052

A u d i o Pr o c es s STV8257 Lip Sync(120ms)

H.P Am p TDA7050 Au d i o A m p STA313W 10W

UA RT MA X3223

7-2-2 DC-DC SMPS Block Diagram

Vs Input Part
Transformer Rectification Block

Vscan Output

Control and Switching Block

Auxiliary Power Feedback Block

Transformer

Rectification Block

Vset Output

Control and Switching Block

Auxiliary Power Feedback Block

Transformer

Rectification Block

Ve Output

Control and Switching Block

Auxiliary Power Feedback Block

Samsung Electronics

7-3

Block Diagram

7-2-3 Module Driver Board Block Diagram

1. Y Drive Board

2. X Drive Board

7-4

Samsung Electronics

Block Diagram

7-2-4 Logic Board Block Diagram

30 Pin Connector
Y-MAIN CONTROL SIGNAL

31 Pin LVDS
LVDS SIGNAL (8~12bit)

10 Pin (Power)
RELAY_EINT Vs-ON

20 Pin Connector
X-MAIN CONTROL SIGNAL

7-2-5 Power Block Diagram

Samsung Electronics

5 Pin (uart)

TX, RX

DDR (MA) DRIVE RESET

ASIC nRESET

DDR (FA)

SPS-NIRB (ASIC 816P)

DATA : 32bit ADDR : 12bit DQS, CLK, nCLK

DDR (MB)

CONTROL SIGNAL

MICOM
R,G,B : 24bit CLK 1, 2 BLK, POC, STB CSE, CE1, CE2 R,G,B : 24bit CLK 1, 2 BLK, POC, STB CSE, CE1, CE2

50 Pin Connector

FM75

50 Pin Connector

7-5

MEMO

7-6

Samsung Electronics