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1

PCB STACK UP
LAYER 2 : GND

DDR-SODIMM1

CLAW HAMMER / RS480 / SB400

CPU THERMAL
SENSOR

DDR
266,333,400MHz

GMT-781

CPU CLAW HAMMER

LAYER 4 : IN2
LAYER 5 : VCC

CT8 BLOCK DIAGRAM

LAYER 1 : TOP

LAYER 3 : IN1

14.318MHz

754 Pins (uPGA)

DDR-SODIMM2

SYSTEM POWER MAX1845


(1.2V/NB_CORE/1.25V)

CPUCLK,
CPUCLK#

LAYER 6 : BOT

CLOCK GEN
SBLINKCLK, SBLINKCLK#

NORTH BRIDGE
RS480M

LVDS X1

LCD Panel

SYSTEM MAX1999
POWER(3/5V)

OSC14M

TV, USB, BLUE TOOTH

SYSTEM POWER MAX1845


(2.5VSUS/1.8VSUS)

705 BGA

Power Board
B

HTREFCLK

R.G,B

CRT port

Daughter Board

CPU CORE MAX1544


POWER 1.2V

NBSRCCLK, NBSRCCLK#

HyperThansport I/O BUS


Link 16x16

CABLE DOCK

CY28RS480/ ICS951412

S-VIDEO

INTEGRADED VGA FUNCTION


Based on Redeon 9600

TV-OUT

BATT CHARGER
MAX1722

A-LINK
2X
PCI-E

32.768KHz

USB PORT 0, 1, 2

USB 2.0

ATA 66/100/133

1st IDE - HDD

DISCHARGE
NBSRCCLK, NBSRCCLK#

33MHZ, 3.3V PCI


PCLK_7411
PCLK_MINI
PCLK_LAN

SB400
564 BGA

2nd IDE - CDROM

PWRCLKP
PWRCLKN
DIB_DATAN
DIB_DATAP

DEVICE

AC97

LAN

CX20468-31
MBAMC20493-010

PCLK_591

MINI-PCI

CARDBUS / IEEE 1394


CONTROLLER/CF

Realtek
8100CL

24.576MHz
32.768KHz

48MHz

AC97

ATA 66/100/133

PCI DEVICES IRQ ROUTING

24.576MHz

TI 7411

25MHz

3.3V LPC, 33MHz

IDSEL # REQ/GNT # PCI_INT

GBIT ETHERNET AD16

MINIPCI SLOT

AD18

E,F

CardBus/1394 AD25

B,D,G

SMARTDAA
MODEM,

PC97551

AMP

CARDBUS
SLOT X1

5 IN 1
CARD
READER
SD/MMC,
SM, MS,
XD

TPA0312

TQFP 176

1394
CONN

WIRE

FAN

Touchpad

Keyboard

RJ11
JACK

FLASH

JACK
HEADPHONE,
2ND HEADPHONE,
MIC

RJ45
JACK

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
BLOCK
Date:
1

Thursday, April 14, 2005


7

Rev
1A

DIAGRAM
Sheet

of

1
8

42

CLK

+3V

CLK_VDD

NBSRCCLK
NBSRCCLK#

20 Mils

L39

+3V

40 Mils

TI201209G121
CLK_VDDA
C478
22U

C485
0.1U

C497
0.1U

C496
0.1U

C488
0.1U

C480
0.1U

C483
0.1U

C491
0.1U

C498
0.1U

L42

SBSRCCLK 12
SBSRCCLK# 12

SBLINKCLK
SBLINKCLK#

TI201209G121
C492

NBSRCCLK 7
NBSRCCLK# 7

SBSRCCLK
SBSRCCLK#

SBLINKCLK 7
SBLINKCLK# 7

C494

0.1U

22U

CLK_VDD
U23

EMI

+3V

REV.C

SBK160808T-301Y-S
L40
C482
C749
0.1U
2.2U

C750
0.1U

REV.B
27P
1

C320

Y2

Parallel Resonance Crystal


Tolerance: 35ppm (max)
Load: 20pf

C479

R83
*1M

14.318MHZ

27P

43
14
21
32
35
51
3
48
56

VDDCPU
VDDSRC3
VDDSRC2
VDDSRC1
VDD_SRC0
VDD_PCI
VDD48
VDDHTT
VDDREF

5
55
36
31
26
20
15
49
46
42

GND1
GND2
GNDSRC0
GNDSRC1
GNDSRC2
GNDSRC3
GNDSRC4
GNDPCI
GNDHTT
GNDCPU

X1

X2

REV.B

1.Remove R84.
9,10,13
9,10,13
7

T296

SCLK
SDATA
OSC14M

R281

33

Ioh = 5 * Iref
(2.32mA)

NC

7
8

SCLK
SDATA

52

REF2

37

IREF

39
38

CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1

45
44
41
40

CPUCLK8T0
CPUCLK8C0

SRCCLKT7
SRCCLKC7
SRCCLKT6
SRCCLKC6
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT3
SRCCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT1
SRCCLKC1
SRCCLKT0
SRCCLKC0

12
13
16
17
18
19
22
23
24
25
27
28
30
29
34
33

SRCCLKT7
SRCCLKC7
SRCCLKT6
SRCCLKC6
SRCCLKT5
SRCCLKC5

SEL75#/100/PCICLK0

50

R288
R291

15/F
15/F

R286
R290
R296
R298
R301
R303

33
33
33
33
33
33

CPUCLK 3
CPUCLK# 3

T128
T297
R285
R289
R295
R297
R300
R302

SBSRCCLK
SBSRCCLK#
NBSRCCLK
NBSRCCLK#
SBLINKCLK
SBLINKCLK#

R283

*4.7K

CLK_VDD

CLK_VDD

R274
10K

475/F
Voh = 0.71V @ 60 ohm

FS0/REF0
FS1/REF1
FS2

54
53
9

USB_48MHz
HTTCLK0

4
47

CLKREQB#
CLKREQA#

49.9/F
49.9/F
49.9/F
49.9/F
49.9/F
49.9/F

T131
T299
T301
T306
T305
T302
T304
T303
T298
T300

R273

R304

11
10

VDDA
GNDA

*22

R277
10K

R276
10K

CLK FREQ
SELECT

SB_OSC_INT 7,13

R275
R280
R279
R278
R284

33
33

*10K
*10K
*10K

USBCLK_EXT 13
HTREFCLK 7
R287
51.1

ICS951412
R292 R282
*10K *10K

Operating Current: 400mA

Layout Note:
1- PLACE ALL THE SERIES TERMINATION RESISTORS AS CLOSE AS
CKG. AS POSSIBLE

EXT CLK FREQUENCY SELECT TABLE(MHZ)

2- ROUTE ALL CPUCLK/#, NBSRCCLK/#, SBSRCCLK/#, SBLINKCLK/# AS


DIFFERENT PAIR RULE
3- PUT DECOUPLING CAPS CLOSE TO CKG. POWER PIN

FS2 FS1 FS0

CPU

SRCCLK HTT
[2:1]

PCI

USB

COMMENT

Hi-Z

100.00 Hi-Z

Hi-Z

48.00

Reserved

100.00 X/3

X/6

48.00

Reserved

180.00 100.00 60.00

30.00

48.00

Reserved

220.00 100.00 36.56

73.12

48.00

Reserved

100.00 100.00 66.66

33.33

48.00

Reserved

133.33 100.00 66.66

33.33

48.00

Reserved

200.00 100.00 66.66

33.33

48.00

Normal HAMMER operation

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
EXT CLOCK GENERATOR
Date:
5

Thursday, April 14, 2005

Sheet
1

Rev
3A
2

of

42

CPU

VDDA_1V2

20 Mils width to pin


100 Mils width to capacitor
250 Mils width to PWM

VDDA_1V2

U22A
AMD K8

Near Socket754
T124

U22C
AMD K8

LDT

CADIN[0..15]

CADIN[0..15]

5
5

CLKIP1
CLKIP0

5
5

CLKIN1
CLKIN0

CTLIP0

V_HT0_A0
V_HT0_A1
V_HT0_A2
V_HT0_A3
V_HT0_A4
V_HT0_A5
V_HT0_A6

V_HT0_B0
V_HT0_B1
V_HT0_B2
V_HT0_B3
V_HT0_B4
V_HT0_B5
V_HT0_B6

AF25
AE28
AF29
AG26
AG28
AH27
AH29

CADIP15
CADIP14
CADIP13
CADIP12
CADIP11
CADIP10
CADIP9
CADIP8
CADIP7
CADIP6
CADIP5
CADIP4
CADIP3
CADIP2
CADIP1
CADIP0

T25
U27
V25
W27
AA27
AB25
AC27
AD25
T27
V29
V27
Y29
AB29
AB27
AD29
AD27

HT_RXD15
HT_RXD14
HT_RXD13
HT_RXD12
HT_RXD11
HT_RXD10
HT_RXD9
HT_RXD8
HT_RXD7
HT_RXD6
HT_RXD5
HT_RXD4
HT_RXD3
HT_RXD2
HT_RXD1
HT_RXD0

HT_TXD15
HT_TXD14
HT_TXD13
HT_TXD12
HT_TXD11
HT_TXD10
HT_TXD9
HT_TXD8
HT_TXD7
HT_TXD6
HT_TXD5
HT_TXD4
HT_TXD3
HT_TXD2
HT_TXD1
HT_TXD0

N26
L25
L26
J25
G25
G26
E25
E26
N29
M28
L29
K28
H28
G29
F28
E29

CADOP15
CADOP14
CADOP13
CADOP12
CADOP11
CADOP10
CADOP9
CADOP8
CADOP7
CADOP6
CADOP5
CADOP4
CADOP3
CADOP2
CADOP1
CADOP0

CADIN15
CADIN14
CADIN13
CADIN12
CADIN11
CADIN10
CADIN9
CADIN8
CADIN7
CADIN6
CADIN5
CADIN4
CADIN3
CADIN2
CADIN1
CADIN0

R25
U26
U25
W26
AA26
AA25
AC26
AC25
T28
U29
V28
W29
AA29
AB28
AC29
AD28

HT_TXD#15
HT_TXD#14
HT_TXD#13
HT_TXD#12
HT_TXD#11
HT_TXD#10
HT_TXD#9
HT_TXD#8
HT_TXD#7
HT_TXD#6
HT_TXD#5
HT_TXD#4
HT_TXD#3
HT_TXD#2
HT_TXD#1
HT_TXD#0

N27
M25
L27
K25
H25
G27
F25
E27
P29
M27
M29
K27
H27
H29
F27
F29

CADON15
CADON14
CADON13
CADON12
CADON11
CADON10
CADON9
CADON8
CADON7
CADON6
CADON5
CADON4
CADON3
CADON2
CADON1
CADON0
CLKOP1
CLKOP0

5
5

CLKON1
CLKON0

5
5

CTLIN0

HT_RXD#15
HT_RXD#14
HT_RXD#13
HT_RXD#12
HT_RXD#11
HT_RXD#10
HT_RXD#9
HT_RXD#8
HT_RXD#7
HT_RXD#6
HT_RXD#5
HT_RXD#4
HT_RXD#3
HT_RXD#2
HT_RXD#1
HT_RXD#0

CADOP[0..15]

CLKIP1
CLKIP0

Y25
Y27

HT_RXCLK1
HT_RXCLK0

HT_TXCLK1
HT_TXCLK0

J26 CLKOP1
J29 CLKOP0

CLKIN1
CLKIN0

W25
Y28

HT_RXCLK#1
HT_RXCLK#0

HT_TXCLK#1
HT_TXCLK#0

J27 CLKON1
K29 CLKON0

CTLIP1
CTLIP0

R27
T29

HT_TXCTL1
HT_TXCTL0

N25 CTLOP1
P28 CTLOP0

HT_TXCTL#1
HT_TXCTL#0

P25 CTLON1
P27 CTLON0

CTLIN1
CTLIN0

R26
R29

HT_RXCTL1
HT_RXCTL0
HT_RXCTL#1
HT_RXCTL#0

12

LDT_RST#

7,12

LDTSTOP#

CADOP[0..15] 5
40
40

LDT_RST#
CPUPWRGD
LDTSTOP#

AF20
AE18
AJ27

RESET#
PWROK
HT_STOP#

L0_REF1
L0_REF0

AF27
AE26

L0_REF1
L0_REF0

COREFB
COREFB#

COREFB
COREFB#
T96
T121
T120

A23
A24
B23

COREFB
COREFB#
CORE_SENSE

VDDIO_SENSE

AE12
AF12
AE11

VDDIOFB
VDDIOFB#
VDDIO_SENSE

CPU_CLK
CPU_CLK#

AJ21
AH21

CLKIN
CLKIN#

FBCLKOUT
FBCLKOUT#

AH19
AJ19

FBCLKOUT
FBCLKOUT#

AH25
AJ25

VDDA1
VDDA2

AE15
AF15
AG14
AF14
AG13

VID0
VID1
VID2
VID3
VID4

VDDA_2.5V

CADON[0..15]

CADON[0..15]

5
40
40
40
40
40

VID0
VID1
VID2
VID3
VID4

VID0
VID1
VID2
VID3
VID4

DBRDY
DBREQ#

JTAG6
JTAG7

T101
CTLOP0
T102
CTLON0

AH17
AE19

TMS
TCK
TRST#
TDI
TDO

JTAG5
JTAG1
JTAG2
JTAG4
JTAG3

5
5

add c154,c283,c284,c285 4.7u


c9,c277 100u change to 220u

E20
E17
B21
A21
A22

TMS
TCK
TRST#
TDI
TDO

A25
B7
B13
B18
C1
C3
C6
C9
C20
C23
C24
D3
F3
J3

NC_A25
NC_B7
NC_B13
NC_B18
NC_C1
NC_C3
NC_C6
NC_C9
NC_C20
NC_C23
NC_C24
NC_D3
NC_F3
NC_J3

C295

3900P

CPU_CLK#

C296

3900P

FBCLKOUT#

R78

CPUCLK

169/F

THERMTRIP#

A20

THERMTRIP#

THERMDA
THERMDC

A26
A27

THERMDA
THERMDC

KEY0
KEY1

AJ28
A28

NC_BP3
NC_BP2
NC_BP1
NC_BP0

AG18
AH18
AG17
AJ18

NC_AG17
NC_AJ18

NC_BPSCLK
NC_BPSCLK#

AJ23
AH23

NC_AJ23
NC_AH23

NC_PLLCHZ
NC_PLLCHZ#

AE24
AF24

NC_SCANCLK1
NC_SCANCLK2
NC_SCANEN
NC_SCANSHENB
NC_SCANSHENA

D20
C21
D18
C19
B19

NC_RSVD_SCL
NC_RSVD_SDA

D22
C22

NC_BRN#

A19

NC_DCLKTWO

C15

NC_SINCHN

C18

DBRDY
DBREQ#

CPU_CLK

NC_ANALOG0
NC_ANALOG1
NC_ANALOG2
NC_ANALOG3

AF21
AF22
AF23
AE23

NC_K1
NC_R2
NC_R3
NC_AA2
NC_AA3
NC_AE9
NC_AE21
NC_AE22
NC_AG2
NC_AG4
NC_AG6
NC_AG7
NC_AG9
NC_AH1
NC_AF18

K1
R2
R3
AA2
AA3
AE9
AE21
AE22
AG2
AG4
AG6
AG7
AG9
AH1
AF18

CPUCLK# 2

80.6/F

FBCLKOUT

T294
T97

T118
T295

RN1
T122
T123

NC_D20
NC_C21
NC_D18
NC_C19
NC_B19

1
3
5
7

R34
R265
R256

T93
T82
NC_A19

680-8P4R
NC_D20
2
NC_C19
4
NC_B19
6
NC_C21
8
680
680
680

VCC_CORE

NC_D18
NC_AG17
NC_AJ18

STUFF WHEN CONFIGURED AS 16-BIT LINK


VDDA_1V2

T68

R56

49.9/F

CTLIP1

R57

49.9/F

CTLIN1

+2.5V

ESD

2.5VSUS
R40

*680

TDO

R66

51.1

VDDIO_SENSE

2.5VSUS
R259

820

NC_AJ23

R267

820

NC_AH23

NC_A19
0

51

COREFB

R41

51

COREFB#

R262

44.2/F

L0_REF1

R261

44.2/F

REV.D

NC_C18

R77

R42

VDDA_1V2

2.5VSUS

+3V

REV.B
VDDA_1V2

R76
CTL & DBG

B27
B29
C26
C28
D25
D27
D29

CADIP[0..15]

CADIP[0..15]

L0_REF0

C762

C763

*330p
R268
680

*330p
LDT_RST#

R260
R90

680
680

LDTSTOP#
THERMTRIP#

R48
R49

680
680

NC_A19
NC_C18

R258
R266

*680
*680

DBREQ#
DBRDY

R33
R54
R50
R46

*680
*680
*680
*680

TCK
TMS
TDI
TRST#

DBREQ#

ESD

C764

ESD

C765

REV.D

*.1U

REV.D

*.1U

VDDA_1V2
220U/6.3V

C9

C277

+3V
220U

C284 4.7U
Q28

2N7002E

R35
10K

R38
100/F

10K

C283 4.7U

C161 4.7U

C168 4.7U

C146 4.7U

C286 4.7U

C141 0.22U

C126 0.22U

C465 0.22U

C470 0.22U

C473 0.22U

C175 0.22U

C466 0.22U

C171 0.22U

C469 0.22U

C184 0.22U

C117 0.22U

C187 0.22U

C119 0.22U

C472 0.22U

30,36

1 THDAT_SMB

MBDATA

H/W MONITOR

6657VCC

CON1
DBREQ#
DBRDY
TCK
TMS
TDI
TRST#
TDO

+3V
C111
.1U/16V/0402

C285 4.7U

R32
C154 4.7U

30,36

Q8
3

MBCLK

2N7002E
1 THCLK_SMB

U18

THERMDA
C431
2200P/50V
THERMDC

VCC

SMCLK

THCLK_SMB

DXP

SMDATA

THDAT_SMB

DXN

-ALT

TEMP_ALARM# 13

-OVT

GND

REV.B

1
2
3
4
5
6
7
8
9
10
10
11
12
13
14

+2.5V
LDT_RST#

MAX6657/GMT-781
37

1999_RST#

Output current(Max):
300mA

+3V

VDDA_2.5V

VOUT

TI201209G121

VIN

L21

REV.C

Ra

SHDN

C721
100U/6.3V

100K/F

100P

C722

REV.B

C723

4.7U

+2.5V

C724
R257
680

0.22U

10U/10V

+2.5V

C311

R80
2

C308

GND
G923

SET

3300P

5
R79
100K/F

Rb
5

CPUPWRGD

REV.B

2. Change C311 from 10u to 100u,


remove C304.

C766

ESD
REV.D

*.1U

THERMTRIP#

R86
10K

PROJECT : CT8
3

THERM_CPUDIE#

Quanta Computer Inc.

THERM_CPUDIE# 13,30

Q14
MMBT3904

Vout=1.25(1+Ra/Rb)
Ra=Rb(Vout/1.25-1)
4

R89
1K

CPUPWRGD 12

3V_S5

U6

*HDT

1.Remove R386,Q33, connect


U18 pin 6 to TEMP_ALARM#.
50 Mils, routing as 15 mils width if the
distance from bead to cpu pin less than 1000
mils.

REV.B

DBREQ_L
DBRDY
TCK
TMS
TDI
TRST_L
TDO
+2.5V
+2.5V
KEY-NC
RES
RES
RES
RES
RES

Size
Document Number
Custom
CPU
Date:

Rev
3A

H.T/CTL I/F

Thursday, April 14, 2005

Sheet
1

of

42

VTT_DDR

B2
B4
B6
B8
B10
B12
B14
B16
B22
B25
B26
B28
C25
C27
C29
D2
D16
D19
D21
D23
D26
D28
E15
E16
E18
E22
E24
F2
F7
F9
F11
F13
F15
F17
F19
F21
F23
G6
G8
G10
G12
G14
G16
G18
G20
G22
G24
G28
H2
H7
H9
H11
H13
H15
H17
H19
H21
H23
H26
J6
J8
J10
J12
J14
J16
J18
J20
J22
J24
K2
K7
K9
K11
K13
K15
K17
K19
K21
K23
L6
L8
L10
L20
L22
L24
L28
M2
M7
M9
M21
M23
M26
N6
N8
N10
N20
N22
N24
P2
P7
P9
P21
P23
R6
R8
R10
R20
R22
R24

U22E
AMD K8
GROUND
VSS110
VSS1
VSS111
VSS2
VSS112
VSS3
VSS113
VSS4
VSS114
VSS5
VSS115
VSS6
VSS116
VSS7
VSS117
VSS8
VSS9
VSS118
VSS10
VSS119
VSS11
VSS120
VSS12
VSS121
VSS13
VSS122
VSS14
VSS123
VSS15
VSS124
VSS16
VSS125
VSS17
VSS126
VSS18
VSS127
VSS19
VSS128
VSS20
VSS129
VSS21
VSS130
VSS22
VSS131
VSS23
VSS132
VSS24
VSS133
VSS25
VSS134
VSS26
VSS135
VSS27
VSS136
VSS28
VSS137
VSS29
VSS138
VSS30
VSS139
VSS31
VSS140
VSS32
VSS141
VSS33
VSS142
VSS34
VSS143
VSS35
VSS144
VSS36
VSS145
VSS37
VSS146
VSS38
VSS147
VSS39
VSS148
VSS40
VSS149
VSS41
VSS150
VSS42
VSS151
VSS43
VSS152
VSS44
VSS153
VSS45
VSS154
VSS46
VSS155
VSS47
VSS156
VSS48
VSS157
VSS49
VSS158
VSS50
VSS159
VSS51
VSS160
VSS52
VSS161
VSS53
VSS162
VSS54
VSS163
VSS55
VSS164
VSS56
VSS165
VSS57
VSS166
VSS58
VSS167
VSS59
VSS168
VSS60
VSS169
VSS61
VSS170
VSS62
VSS171
VSS63
VSS172
VSS64
VSS173
VSS65
VSS174
VSS66
VSS175
VSS67
VSS176
VSS68
VSS177
VSS69
VSS178
VSS70
VSS179
VSS71
VSS180
VSS72
VSS181
VSS73
VSS182
VSS74
VSS183
VSS75
VSS184
VSS76
VSS185
VSS77
VSS186
VSS78
VSS187
VSS79
VSS188
VSS80
VSS189
VSS81
VSS190
VSS82
VSS191
VSS83
VSS192
VSS84
VSS193
VSS85
VSS194
VSS86
VSS195
VSS87
VSS196
VSS88
VSS197
VSS89
VSS198
VSS90
VSS199
VSS91
VSS200
VSS92
VSS201
VSS93
VSS202
VSS94
VSS203
VSS95
VSS204
VSS96
VSS205
VSS97
VSS206
VSS98
VSS207
VSS99
VSS208
VSS100
VSS209
VSS101
VSS210
VSS102
VSS211
VSS103
VSS212
VSS104
VSS213
VSS105
VSS214
VSS106
VSS215
VSS107
VSS216
VSS108
VSS217
VSS109
VSS218
VSS219

R28
T2
T7
T9
T21
T23
T26
U6
U8
U10
U20
U22
U24
V2
V7
V9
V21
V23
W6
W8
W10
W20
W22
W24
W28
Y2
Y7
Y9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y26
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA24
AB2
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AC6
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AC24
AC28
AD2
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD21
AD23
AD26
AE14
AE16
AE20
AE29
AF2
AF17
AF19
AF26
AF28
AG20
AG21
AG22
AG23
AG24
AG25
AG27
AG29
AH2
AH4
AH6
AH8
AH10
AH12
AH14
AH20
AH22
AH26
AH28
AJ20
AJ22
AJ24
AJ26

41

A18
B17
C16
C17
D17
AE13

VTT_SENSE
MEMZN
MEMZP
MD63
MD62
MD61
MD60
MD59
MD58
MD57
MD56
MD55
MD54
MD53
MD52
MD51
MD50
MD49
MD48
MD47
MD46
MD45
MD44
MD43
MD42
MD41
MD40
MD39
MD38
MD37
MD36
MD35
MD34
MD33
MD32
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
T104

T103

DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0

D14
C14

VTT_B1
VTT_B2
VTT_B3
VTT_B4
VTT_B5

VTT_A1
VTT_A2
VTT_A3
VTT_A4
VTT_A5
VTT_SENSE
MEMZN
MEMZP

A16
B15
A12
B11
A17
A15
C13
A11
A10
B9
C7
A6
C11
A9
A5
B5
C5
A4
E2
E1
A3
B3
E3
F1
G2
G1
L3
L1
G3
J2
L2
M1
W1
W3
AC1
AC3
W2
Y1
AC2
AD1
AE1
AE3
AG3
AJ4
AE2
AF1
AH3
AJ3
AJ5
AJ6
AJ7
AH9
AG5
AH5
AJ9
AJ10
AH11
AJ11
AH15
AJ15
AG11
AJ12
AJ14
AJ16

MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
MEMDATA4
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0

R1
A13
A7
C2
H1
AA1
AG1
AH7
AH13
T1
A14
A8
D1
J1
AB1
AJ2
AJ8
AJ13

MEMDQS17
MEMDQS16
MEMDQS15
MEMDQS14
MEMDQS13
MEMDQS12
MEMDQS11
MEMDQS10
MEMDQS9
MEMDQS8
MEMDQS7
MEMDQS6
MEMDQS5
MEMDQS4
MEMDQS3
MEMDQS2
MEMDQS1
MEMDQS0

VCC_CORE

POWER

AF16
AG15
AG16
AH16
AJ17

MEMRESET#
MEMVREF1

AG10MEMRST#
AG121.25VREF

T119

MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0

N3
N1
U3
V1
N2
P1
U1
U2

T289
T288
T109
T107
T287
T290
T106
T108

MEMCS#7
MEMCS#6
MEMCS#5
MEMCS#4
MEMCS#3
MEMCS#2
MEMCS#1
MEMCS#0

D8
C8
E8
E7
D6
E6
C4
E5

MEMCKEB
MEMCKEA

AE7 CKE1
AE8 CKE0

MEMCLK#7
MEMCLK7
MEMCLK#6
MEMCLK6
MEMCLK#5
MEMCLK5
MEMCLK#4
MEMCLK4
MEMCLK#3
MEMCLK3
MEMCLK#2
MEMCLK2
MEMCLK#1
MEMCLK1
MEMCLK#0
MEMCLK0
MEMBANKA1
MEMBANKA0
MEMRASA#
MEMCASA#
MEMWEA#
NC_MEMADDA15
NC_MEMADDA14
MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0
MEMBANKB1
MEMBANKB0
MEMRASB#
MEMCASB#
MEMWEB#
NC_MEMADDB15
NC_MEMADDB14
MEMADDB13
MEMADDB12
MEMADDB11
MEMADDB10
MEMADDB9
MEMADDB8
MEMADDB7
MEMADDB6
MEMADDB5
MEMADDB4
MEMADDB3
MEMADDB2
MEMADDB1
MEMADDB0

2.5VSUS

CS#7
CS#6
CS#5
CS#4
CS#3
CS#2
CS#1
CS#0

C10 DCLK#7
D10 DCLK7
E11 DCLK#6
E12 DCLK6
AG8 DCLK#5
AF8 DCLK5
AE10 DCLK#4
AF10 DCLK4
V4 DCLK#3
V3 DCLK3
K4 DCLK#2
K5 DCLK2
P5 DCLK#1
R5 DCLK1
P4 DCLK#0
P3 DCLK0
K3
H3
H5
D4
G5

MEMBAA1
MEMBAA0
RAS#A
CAS#A
WE#A

E13
C12
E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5

MAA15
MAA14
MAA13
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

L5
J5
H4
F5
F4

MEMBAB1
MEMBAB0
RAS#B
CAS#B
WE#B

E14
D12
E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3

MAB15
MAB14
MAB13
MAB12
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0

T87
T79
T94
T89
CS#3
CS#2
CS#1
CS#0

DCLK#7
DCLK7
DCLK#6
DCLK6
DCLK#5
DCLK5
DCLK#4
DCLK4
T111
T110
T99
T100

MEMBAA1
MEMBAA0
RAS#A
CAS#A
WE#A

B20
B24
D24
E19
E21
E23
E28
F18
F20
F22
F24
F26
G11
G13
G15
G17
G19
G21
G23
H10
H12
H14
H16
H18
H20
H22
H24
J9
J11
J13
J15
J17
J19
J21
J23
J28
K8
K10
K12
K14
K16
K18
K20
K22
K24
K26
L7
L9
L21
L23
M8
M10
M20
M22
M24
N7
N9
N21
N23
N28
P8
P10
P20
P22
P24
P26
R7
R9
R21
R23
T8
T10
T20
T22
T24
U7
U9
U21
U23
U28
V8
V10
V20
V22
V24
V26
W7
W9
W21
W23
Y8
Y10

10,11
10,11
9,11
9,11

9
9
10
10
9
9
10
10

DCLK#7
DCLK#6
DCLK#5
DCLK#4

R53
R52
R69
R75

DCLK7
DCLK6
DCLK5
DCLK4

120/F
120/F
120/F
120/F

LAYOUT: Place close to CPU.

9,11
9,11
9,11
9,11
9,11

T86
T95

MEMBAB1
MEMBAB0
RAS#B
CAS#B
WE#B

10,11
10,11
10,11
10,11
10,11

VCC_CORE

CKE0
CKE1

CKE0
CKE1

9,11
10,11

MD[63..0]

MD[63..0]

11

DQS[7..0]

DQS[7..0]

11

DM[7..0]

DM[7..0]

11

MAA[13..0]

MAA[13..0] 9,11

MAB[13..0]

MAB[13..0] 10,11

T98
T75

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
VDD77
VDD78
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50
VDD93
VDD94
VDD95
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133

C148
D5
D7
D9
D11
D13
D15
E4
F6
F8
F10
F12
F14
F16
G4
G7
G9
H6
H8
J4
J7
K6
L4
M6
N4
P6
R4
T6
U4
V6
W4
Y6
AA4
AA7
AB6
AB8
AC4
AC7
AC9
AD6
AD8
AD10
AD12
AD14
AD16
AE4
AF5
AF7
AF9
AF11
AF13

C163

220U

C267

220U

C225
C243

REV.B

330U
330U
330U

REV.B

C178

*4.7U

C177

*4.7U

C451

4.7U

C182

4.7U

C207

4.7U

C180

4.7U

C456

4.7U

C179

4.7U

C237

4.7U

C314

4.7U

C444

4.7U

C181

4.7U

C238

4.7U

C313

4.7U

C457

4.7U

C258

1U

C223

4.7U

C262

1U

C224

4.7U

C268

1U

C208

4.7U

C450

4.7U

C324

0.22U
C445

4.7U

C226

0.22U

C336

0.22U

C299

0.22U

C166

0.22U

C176

0.22U

C288

0.1U

C307

0.1U

C247

1U

C272

1U

C248 0.22U
C240 0.22U
C192 0.22U
C229 0.22U
C

C190 0.22U
C256 0.22U
C253 0.22U
C448 0.22U
C454 0.22U
VCC_CORE

Y12
Y14
Y16
Y18
Y20
Y22
Y24
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AA28
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AB26
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AD18
AD20
AD22
AD24
AE17
AE25
AE27
AG19
AH24

C194 0.1U
C254 0.1U
C193 0.1U
C216 0.1U
C205 0.1U
C244 0.1U
C231 0.1U
C206 0.1U
C245 0.1U
B

C222 0.1U
C257 0.1U
C199 0.1U
C455 0.1U
C215 0.1U
C198 0.1U
C232 0.1U
C255 0.1U
C200 0.1U
C234 0.1U
C214 0.1U
C447 0.1U
C246 0.1U

2.5VSUS

C191 0.1U

2.5VSUS

VTT_DDR

DCLK#1

R58

10K

DCLK#0

R59

10K

C213 0.1U
A

R254

60 mils

DCLK0

R60

10K

DCLK1

R62

10K

C468

W/S 15/20 mils

100/F
0.1U
1.25VREF

C142

C292

C293

0.22U

0.22U

4.7U

C139
C475

2.5VSUS

4.7U
MEMZN

R45

34.8/F

MEMZP

R47

34.8/F

R255
100/F

0.1U

C471
1000P

C467
0.01U

PROJECT : CT8

C474
*100P

Quanta Computer Inc.


Size
Document Number
Custom
CPU DDR/POWER I/F
Date:

2.5VSUS

U22D
AMD K8

20 mils width to CPU pins.

MEMORY

U22B
AMD K8

VTT_DDR

CPU

Thursday, April 14, 2005

Sheet
1

Rev
2A
4

of

42

CLG

Link 0 Is Clawhammer <--> RS480


U17A

CADOP[0..15]

CADON[0..15]

CADOP[0..15]
CADON[0..15]

HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N

CADOP7
CADON7
CADOP6
CADON6
CADOP5
CADON5
CADOP4
CADON4
CADOP3
CADON3
CADOP2
CADON2
CADOP1
CADON1
CADOP0
CADON0

R29
R28
T30
R30
T28
T29
V29
U29
Y30
W30
Y28
Y29
AB29
AA29
AC29
AC28

HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N

3
3

CLKOP1
CLKON1

Y26
W26

HT_RXCLK1P
HT_RXCLK1N

3
3

CLKOP0
CLKON0

W29
W28

HT_RXCLK0P
HT_RXCLK0N

CTLOP0
CTLON0

P29
N29

HT_RXCTLP
HT_RXCTLN

D27
E27

HT_RXCALN
HT_RXCALP

3
3

T26
R26
U25
U24
V26
U26
W25
W24
AA25
AA24
AB26
AA26
AC25
AC24
AD26
AC26

VDDA_1V2

R233
R234

49.9/F HT_RXCALP
49.9/F HT_RXCALN

PART 1OF6

HYPER TRANSPORT CPU


I/F

CADOP15
CADON15
CADOP14
CADON14
CADOP13
CADON13
CADOP12
CADON12
CADOP11
CADON11
CADOP10
CADON10
CADOP9
CADON9
CADOP8
CADON8

HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N

R24
R25
N26
P26
N24
N25
L26
M26
J26
K26
J24
J25
G26
H26
G24
G25

CADIP15
CADIN15
CADIP14
CADIN14
CADIP13
CADIN13
CADIP12
CADIN12
CADIP11
CADIN11
CADIP10
CADIN10
CADIP9
CADIN9
CADIP8
CADIN8

HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N

L30
M30
L28
L29
J29
K29
H30
H29
E29
E28
D30
E30
D28
D29
B29
C29

CADIP7
CADIN7
CADIP6
CADIN6
CADIP5
CADIN5
CADIP4
CADIN4
CADIP3
CADIN3
CADIP2
CADIN2
CADIP1
CADIN1
CADIP0
CADIN0

HT_TXCLK1P
HT_TXCLK1N

L24
L25

CLKIP1
CLKIN1

3
3

HT_TXCLK0P
HT_TXCLK0N

F29
G29

CLKIP0
CLKIN0

3
3

CTLIP0
CTLIN0

3
3

HT_TXCTLP
HT_TXCTLN

M29
M28

HT_TXCALP
HT_TXCALN

B28
A28

HT_TXCALP R235
HT_TXCALN

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

A7
B7
B6
B5
A5
A4
B3
B2
C1
D1
D2
E2
F2
F1
H2
J2
J1
K1
K2
L2
M2
M1
N1
N2
R1
T1
T2
U2
V2
V1
Y2
AA2

GFX_TX0P_C
GFX_TX0N_C
GFX_TX1P_C
GFX_TX1N_C
GFX_TX2P_C
GFX_TX2N_C
GFX_TX3P_C
GFX_TX3N_C
GFX_TX4P_C
GFX_TX4N_C
GFX_TX5P_C
GFX_TX5N_C
GFX_TX6P_C
GFX_TX6N_C
GFX_TX7P_C
GFX_TX7N_C
GFX_TX8P_C
GFX_TX8N_C
GFX_TX9P_C
GFX_TX9N_C
GFX_TX10P_C
GFX_TX10N_C
GFX_TX11P_C
GFX_TX11N_C
GFX_TX12P_C
GFX_TX12N_C
GFX_TX13P_C
GFX_TX13N_C
GFX_TX14P_C
GFX_TX14N_C
GFX_TX15P_C
GFX_TX15N_C

GPP_TX0P
GPP_TX0N

AD2
AD1

GPP_TX0P_C
GPP_TX0N_C
GPP_TX1P_C
GPP_TX1N_C

CADIP[0..15]

CADIP[0..15] 3

CADIN[0..15]

CADIN[0..15]

100/F

RS480M

U17B

PART 2 OF 6

T193
T190
T173
T172
T339
T165
T9
T204

12
12

A_RX0P
A_RX0N

12
12

A_RX1P
A_RX1N

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

D8
D7
D5
D4
E4
F4
G5
G4
H4
J4
H5
H6
G1
G2
K5
K4
L4
M4
N5
N4
P4
R4
P5
P6
P2
R2
T5
T4
U4
V4
W1
W2

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

GPP_RX0P
GPP_RX0N

AE1
AE2

GPP_RX0P
GPP_RX0N

GPP_RX1P
GPP_RX1N

AB2
AC2

GPP_RX1P
GPP_RX1N

GPP_TX1P
GPP_TX1N

AA1
AB1

GPP_RX2P
GPP_RX2N

AB5
AB4

GPP_RX2P
GPP_RX2N

GPP_TX2P
GPP_TX2N

Y5
Y6

GPP_TX2P_C
GPP_TX2N_C

GPP_RX3P
GPP_RX3N

Y4
AA4

GPP_RX3P
GPP_RX3N

GPP_TX3P
GPP_TX3N

W5
W4

GPP_TX3P_C
GPP_TX3N_C

AG1
AH1

SB_RX0P
SB_RX0N

SB_TX0P
SB_TX0N

AF2
AG2

A_TX0P_C
A_TX0N_C

C16
0.1U

SB_TX1P
SB_TX1N

AC4
AD4

A_TX1P_C
A_TX1N_C

C14
0.1U

A_RX0P
A_RX0N
A_RX1P
A_RX1N

AC5
AC6

R14
R16

10K/F AH3
8.25K/F AJ3

REV.B
REV.C

PCIE I/F TO
VIDEO

T32
T226
T219
T211
T206
T185
T15
T183
T170
T18
T7
T16
T197
T184
T29
T196
T177
T201
T22
T166
T168
T10
T38
T37
T178
T194
T23
T13
T19
T11
T341
T337

PCIE I/F TO SLOT

PCIE I/F TO SB

SB_RX1P
SB_RX1N
PCE_ISET
PCE_TXISET

PCE_PCAL
PCE_NCAL

AH2 R9
AJ2 R12

150/F
82.5/F

T228
T227
T225
T221
T220
T218
T214
T213
T210
T208
T207
T202
T200
T198
T181
T199
T180
T179
T195
T167
T169
T182
T176
T192
T164
T191
T175
T5
T203
T187
T189
T186

T163
T171
T188
T174
T17
T25
T31
T12

C17
0.1U

A_TX0P
A_TX0N

12
12

C15
0.1U

A_TX1P
A_TX1N

12
12

VDDA_1V2

REV.C

RS480M

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
RS480M-HT
Date:
5

Rev
3A

A-LINK0

Thursday, April 14, 2005

Sheet
1

of

42

CLG
U17C
T57
T246
T241
T51
T262
T260
T62
T256
T255
T253
T248
T52
T56
T245
T249
T88
T278
T80
T266
T235
T44
T231
T30
T83
T284
T65
T270
T238
T46
T216
T28

T265
T283
T71
T268
T236
T42
T215
T27
T50
T250
T53
T254
T58
T244
T243

MEMAA0
MEMAA1
MEMAA2
MEMAA3
MEMAA4
MEMAA5
MEMAA6
MEMAA7
MEMAA8
MEMAA9
MEMAA10
MEMAA11
MEMAA12
MEMAA13
MEMAA14

AF17
AK17
AH16
AF16
AJ22
AJ21
AH20
AH21
AK19
AH19
AJ17
AG16
AG17
AH17
AJ18

MEM_A0
MEM_A1 PART
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

AG26
AJ29
AE21
AH24
AH12
AG13
AH8
AE8

MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7

QSP0
QSP1
QSP2
QSP3
QSP4
QSP5
QSP6
QSP7

AF25
AH30
AG20
AJ25
AH13
AF14
AJ7
AG8

MEM_DQS0P
MEM_DQS1P
MEM_DQS2P
MEM_DQS3P
MEM_DQS4P
MEM_DQS5P
MEM_DQS6P
MEM_DQS7P

M_QSN0
M_QSN1
M_QSN2
M_QSN3
M_QSN4
M_QSN5
M_QSN6
M_QSN7

AG25
AH29
AF21
AK25
AJ12
AF13
AK7
AF9

MEM_DQS0N
MEM_DQS1N
MEM_DQS2N
MEM_DQS3N
MEM_DQS4N
MEM_DQS5N
MEM_DQS6N
MEM_DQS7N

RASA#
CASA#
WEA#
CSA#0
M_CKEA

AE17
AH18
AE18
AJ19
AF18

MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE

M_CLKA0
M_CLKA#0

AK16
AJ16

MEM_CKP
MEM_CKN

0.47U MEM_CAP1
0.47U MEM_CAP2

AE28
AJ4

MEM_CAP1
MEM_CAP2

MEM_VMODE

AJ20

MEM_VMODE

AK20

MEM_VREF

+2.5V
C130
C23
R29
B

C62
0.1U

R31

1K

1K
MEM_VREF
R30
1K

C72
0.1U

+1.8V

Stuff

Side-Port not used


MEM_VREF to 2.5VSUS

AJ15
AJ14

MPVDD
MPVSS

MEM_DQ0

3 OF 6 MEM_DQ1

MEM_A I/F

MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63
MEM_COMPP
MEM_COMPN

AF28
AF27
AG28
AF26
AE25
AE24
AF24
AG23
AE29
AF29
AG30
AG29
AH28
AJ28
AH27
AJ27
AE23
AG22
AF23
AF22
AE20
AG19
AF20
AF19
AH26
AJ26
AK26
AH25
AJ24
AH23
AJ23
AH22
AK14
AH14
AK13
AJ13
AJ11
AH11
AJ10
AH10
AE15
AF15
AG14
AE14
AE12
AF12
AG11
AE11
AJ9
AH9
AJ8
AK8
AH7
AJ6
AH6
AJ5
AG10
AF11
AF10
AE9
AG7
AF8
AF7
AE7
AH5 MEM_COMPP
AD30MEM_COMPN

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
R22
R43

T279
T81
T85
T84
T78
T77
T73
T76
T281
T286
T280
T277
T282
T276
T275
T274
T69
T70
T72
T67
T74
T64
T66
T61
T273
T272
T271
T269
T267
T263
T264
T261
T242
T36
T239
T240
T232
T237
T234
T233
T48
T47
T49
T45
T41
T40
T35
T39
T230
T229
T222
T223
T224
T212
T209
T205
T26
T20
T33
T34
T217
T21
T14
T24
*61.9/F
*61.9/F

+2.5V

RS480M

L5

MPVDD_PLL
TI201209G121
C45
1U

Side-Port not used


MPVDD to 1.8V

Decouple to MPVSS near the ball

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
RS480M-SIDE
Date:
5

Rev
1A

PORT MEM I/F

Thursday, April 14, 2005

Sheet
1

of

42

CLG

+3V
+3V
C711

C712

C713

C714

C715

C716

C745

C746

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

JOINT

40 mils

AVDD

AVSSN

C747
(2.5V)

L14

EMI

JOINT

*BK2125HS220

0.1U

C118

REV.B

AVSSQ

1U
JOINT
AVSSDI

AVSSN
U17D

0.1U

0.1U

C719

C720

0.1U

+1.8V

20 mils

0.1U

20 mils

R36

AVDDQ

AVDDDI
C98
1U

(1.8V)
C102

AVSSDI

1U

AVSSQ
+1.8V
AVDDQ

AVDD

L16

+2.5V
L18

TI201209G121

31
31

TI201209G121
C158
C137

C120

C143
1U

1U

10U

10U

AVSSQ

PLLVDD
(1.8V)
C51

+1.8V

L6

1U

TI201209G121

PLLVSS
C56

R17
1U

PLLVSS

REV.B
13

SUS_STAT#

A11
B11
C26
E11
F11

DAC_VSYNC
DAC_HSYNC
RSET
DAC_SCL
DAC_SDA

A14
B14

PLLVDD
PLLVSS

M23
L23

HTPVDD
HTPVSS

715/F

12,34

NB_RST#
0 NB_PWRGD_R

VDDR3

L3
TI201209G121

NB_PWRGD_R
LDTSTOP#
150/F

2
OSC14M
2,13 SB_OSC_INT

C138

C121
1U

10U

REV.B
REV.C

C740

C741

EMI

*330p

1000P

HTPVSS

R26

22

SB_OSC_INT_R

RS480_TVCLKIN

ESD
REV.D

R221
10K

D14
B15
B12
C12
AH4

SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP
SUS_STAT#

H13
H12

VDDR3_1
VDDR3_2

A13
B13

OSCIN
OSCOUT

C44
1U

L17

SPMEM_EN#
LOAD_ROM#
R227
*3K

DFT_GPIO2

B9

CLOCKs

TVCLKIN

F12
E13
D13

DFT_GPIO0/RSV
DFT_GPIO1/RSV
DFT_GPIO2/RSV

12
18

DAC2 BANDGAP REF (1.8V)

BMREQ#
EDIDCLK

EDIDCLK
I2C_DATA

F10
C10
C11
AF4
AE4

BMREQb
I2C_CLK
I2C_DATA
THERMALDIODE_P
THERMALDIODE_N

T6
T8

PLLVDD PLL VDD (1.8V)

ROUTING H_THRMDA AND HW_AGND AS DIFFERENTIAL PAIR

MIS.

D18
C18
B19
A19
D19
C19
D20
C20

TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N

B16
A16
D16
C16
B17
A17
E17
D17

TXLOUT0+
TXLOUT0TXLOUT1+
TXLOUT1TXLOUT2+
TXLOUT2T43
T55

TXCLK_UP
TXCLK_UN
TXCLK_LP
TXCLK_LN

B20
A20
B18
C17

T259
T258
TXLCLKOUT+ 18
TXLCLKOUT- 18

LPVDD
LPVSS
LVDDR18D
LVDDR18A_1
LVDDR18A_2

E18
F17
E19
G20
H20

LVSSR1
LVSSR2
LVSSR3
LVSSR4
LVSSR5
LVSSR6
LVSSR7
LVSSR8

G19
E20
F20
H18
G18
F19
H19
F18

LVDS_DIGON
LVDS_BLON
LVDS_BLEN

E14
F14
F13

GFX_CLKP
GFX_CLKN

B8
A8

HTTSTCLK
HTREFCLK

P23
N23

T63
T59
T247
T251
T54
T252
T60
T257

PLLVSS

JOINT
LPVSS

DO NOT SHARE GND VIA ON JOINT


18
18
18
18
18
18

+1.8V

+1.8V

25 mils
LPVDD

L8

LVDDR18A

L10

TI201209G121

25 mils

LVDDR18D

L11
TI201209G121

TI201209G121
C80

LPVSS

C91

25 mils

C65

C64

C81

C75

0.1U

4.7U

1U

0.1U

1U

0.1U

DISP_ON 18
LCD_BLON 18
CPIS_BLEN 18
NBSRCCLK 2
NBSRCCLK# 2
R44

10K/F
HTREFCLK 2

E8
E7

SBLINKCLK 2
SBLINKCLK# 2

DFT_GPIO3/RSV
DFT_GPIO4/RSV
DFT_GPIO5/RSV

C13
C14
C15

TMDS_HPD

A10

STRP_DATA

E10

DDC_DATA

B10

TESTMODE

E12

R226
R224
R229

DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
R222

*3K
*3K
*3K

1K
POWER_PLAY

EDIDDATA 18

+3V

R225

HTPVDD HT PLL VDD (1.8V)

JOINT

TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N

SB_CLKP
SB_CLKN

DAC VDD (2.5V)

AVDDDI DIGITAL VDD (1.8V)


AVDDQ

RED
GREEN
BLUE

12 ALLOW_LDTSTOP
+3V

C25
A26
B26

20 mils

HTPVDD

AVDD

CRT_R
CRT_G
CRT_B

R404

PWROK
LDTSTOP#

+1.8V

REV.C

31
31
31

HTPVDD
(1.2V)
C90

HTPVSS
18,30
3,12

4.7K

C
Y
COMP

PART 4 OF 6

20 mils

1U

C37

10U

AVDDQ
AVSSQ

B25
A25
A24

DDCCLK
DDCDAT

AVSSN

E24
D24
S-CD1
S-YD1
S-CVBS1

R37

PLLVDD

AVDD1
AVDD2
AVSSN1
AVSSN2
AVDDDI
AVSSDI

32
32
32

VSYNC
HSYNC

31
31

B27
C27
D26
D25
C24
B24

LVDS

REV.B

C718

PLL PWR

C717

PM

EMI

CRT/TVOUT

+1.8V

RS480M
4.7K
R23
2K

PUT AVDD, AVDDDI, AVDDQ,PLVDD,HTPVDD


DECOUPLING CAPS ON THEBOTTOM, CLOSE
TO BALLS

REV.B

JOINT

R21
*2K

DEL Y1 AND U3 CIRCUIT.

AVSSN
JOINT
AVSSQ
JOINT

LOAD_ROM#:LOAD ROM STRAP ENABLE strap


AVSSDI

+3V

High, LOAD ROM STRAP DISABLE


JOINT
A

PLLVSS

LOAD_ROM#

R27

*3K

Low, LOAD ROM STRAP ENABLE

R20
4.7K

SPMEM_EN#:SIDE PORT MEMORY ENABLE strap


SPMEM_EN#

R28

R228
4.7K

R223
4.7K

*3K

JOINT
HTPVSS

DO NOT SHARE GND VIA ON JOINT

NC, SIDE PORT MEMORY DISABLE

EDIDCLK

Low, SIDE PORT MEMORY ENABLE

I2C_DATA

PROJECT : CT8

Quanta Computer Inc.

EDIDDATA

Size
Document Number
Custom
RS480M-VIDEO
Date:

Rev
3A

& CLKGEN

Thursday, April 14, 2005

Sheet
1

of

42

VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120

M27
H24
N28
P25
P28
E26
K25
U28
V25
V28
R23

NB RS480 POWER STATES


U17F
RS480M

VSS89

VDDHT

REV.B

U17E

120 mils

FBMJ2125HM330-T
C

C152
22U

REV.B

L15,L55 TI201209G121
CHANGE TO
FBMJ2125HM330-T

C99
0.1U

C96
0.1U

C105
0.1U

C94
0.1U

C88
0.1U

C84
0.1U

C101
0.1U

C104
0.1U

C87
0.1U

C110
0.1U

C107
0.1U

C95
0.1U

C83
0.1U

VDDHT30
VDDHT31
+2.5V

C115
22U

C85
0.1U

C77
0.1U

C52
0.1U

C55
0.1U

C42
0.1U

C74
0.1U

C116
0.1U

C43
0.1U

C50
0.1U

C70
0.1U

C113
0.1U

C73
0.1U

C93
0.1U

C89
0.1U

C31
0.1U

C21
0.1U

C35
0.1U

C36
0.1U

VDD18
+1.8V

20 mils

L7
TI201209G121
C54
0.1U

D2
+3V

C57
0.1U

D1
1

1
BAV99
3

BAV99 3.3V_2.7
3

C63
0.1U

C76
0.1U

C71
1U

PART 5 OF 6 VDDA12_14

N27
U27
V27
G27
V24
H27
K24
AB24
P27
J27
AA27
K27
P24
AB27
AB23
V23
G23
E23
W23
K23
J23
H23
U23
AA23
D23
F23
C23
B23
A23
A29
AC30

VDD_HT1
VDD_HT2
VDD_HT3
VDD_HT4
VDD_HT5
VDD_HT6
VDD_HT7
VDD_HT8
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15
VDD_HT16
VDD_HT17
VDD_HT18
VDD_HT19
VDD_HT20
VDD_HT21
VDD_HT22
VDD_HT23
VDD_HT24
VDD_HT25
VDD_HT26
VDD_HT27
VDD_HT28
VDD_HT29
VDD_HT30
VDD_HT31

AK23
AK28
AK11
AK4
AE30
AC14
AD12
AC18
AC20
AD10
AD14
AD15
AD20
AC10
AD18
AC12
AD22
AC22
AH15

VDD_MEM1
VDD_MEM2
VDD_MEM3
VDD_MEM4
VDD_MEM5
VDD_MEM6
VDD_MEM7
VDD_MEM8
VDD_MEM9
VDD_MEM10
VDD_MEM11
VDD_MEM12
VDD_MEM13
VDD_MEM14
VDD_MEM15
VDD_MEM16
VDD_MEM17
VDD_MEM18
VDD_MEMCK

H15
AC17
AC15

VDD18_1
VDD18_2
VDD18_3

B21
C21
A22
B22
C22
F21
F22
E21
G21

VDD_CORE47
VDD_CORE46
VDD_CORE45
VDD_CORE44
VDD_CORE43
VDD_CORE42
VDD_CORE41
VDD_CORE40
VDD_CORE39

VDDA12_1
VDDA12_2
VDDA12_3
VDDA12_4
VDDA12_5
VDDA12_6
VDDA12_7
VDDA12_8
VDDA12_9
VDDA12_10
VDDA12_11
VDDA12_12
VDDA12_13
VDDA18_1
VDDA18_2
VDDA18_3
VDDA18_4
VDDA18_5
VDDA18_6
VDDA18_7
VDDA18_8
VDDA18_9
VDDA18_10
VDDA18_11
VDDA18_12
VDDA18_13
VDD_CORE1
VDD_CORE2
VDD_CORE3
VDD_CORE4
VDD_CORE5
VDD_CORE6
VDD_CORE7
VDD_CORE8
VDD_CORE9
VDD_CORE10
VDD_CORE11
VDD_CORE12
VDD_CORE13
VDD_CORE14
VDD_CORE15
VDD_CORE16
VDD_CORE17
VDD_CORE18
VDD_CORE19
VDD_CORE20
VDD_CORE21
VDD_CORE22
VDD_CORE23
VDD_CORE24
VDD_CORE25
VDD_CORE26
VDD_CORE27
VDD_CORE28
VDD_CORE29
VDD_CORE30
VDD_CORE31
VDD_CORE32
VDD_CORE33
VDD_CORE34
VDD_CORE35
VDD_CORE36
VDD_CORE37
VDD_CORE38

H9
AA7
G9
U8
N7
N8
U7
F9
AA8
G8
G7
J8
J7
B1
AG4
R8
AC8
AC7
AF6
AE6
L8
W8
W7
L7
R7
AF5
AK2
N16
M13
M15
W16
N18
P19
N12
P15
N14
M17
T19
G22
R12
P13
R14
V19
R18
U16
U12
T13
U14
T17
U18
E22
R16
V13
T15
P17
W18
D22
W12
V15
W14
V17
M19
H22
H21
D21

Power Signal

S0

S1

S3

VDDHT

ON

ON

OFF OFF

VDDR,VDDRCK

ON

ON

ON

VDD18

ON

ON

OFF OFF

VDDC

ON

ON

OFF OFF

OFF

VDDA18

ON

ON

OFF OFF

OFF
OFF

S4/S5

ON

G3
OFF
OFF

VDDA12

ON

ON

OFF OFF

AVDD

ON

ON

OFF OFF

OFF

AVDDDI

ON

ON

OFF OFF

OFF

PLLVDD

ON

ON

OFF OFF

OFF

HTPVDD

ON

ON

OFF OFF

OFF

VDDR3

ON

ON

OFF OFF

OFF

LPVDD

ON

ON

OFF OFF

OFF

LVDDR18D

ON

ON

OFF OFF

OFF

LVDDR18A

ON

ON

OFF OFF

OFF

L55

120 mils

FBMJ2125HM330-T
C34
1U

C28
0.1U

C27
0.1U

C26
0.1U

C32
0.1U

C10
22U
VDDA12_13
C13

VDDA12_13

VDDA18

20 mils

L4

VSSA22

+1.8V

4.7U

VDDA18_13

TI201209G121
C12
C29
22U

C24
0.1U

C25
0.1U

C33
0.1U

C22
0.1U

VSSA59

4.7U

VDDHT30
VDDA_1V2

C144

VDDA18_13

4.7U

VSS30
VDDHT31
C114
22U

C59
0.1U

C58
0.1U

C46
0.1U

C47
0.1U
C122
4.7U

VSS89
C67
0.1U

C41
0.1U

C48
0.1U

C49
0.1U

C103
22U

C61
0.1U

C39
0.1U

C40
0.1U

C38
0.1U

C66
0.1U

C60
0.1U

C68
0.1U

C100
0.1U

C97
0.1U

C78
0.1U

C79
0.1U

C69
0.1U

PUT DECOUPLING CAPS ON THE TOP, CLOSE


TO BALLS
CONNECT VSSA22,VSSA59,VSS30,VSS89
to the ground.

+ C18
*220U

RS480M

Notice the trace width.

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
RS480M-POWER
Date:
5

OFF

VDDA_1V2

VDDA12

POWER

L15

T27 VSS107
R27 VSS108
AD28VSS109
F24 VSS110
F27 VSS111
G28 VSS112

U19 VSS73
AC16VSS74
AG18VSS75
AC23VSS76
AD8 VSS77
AD11VSS78
AD13VSS79
AD16VSS80
AD19VSS81
AD23VSS82
AG5 VSS83
AG6 VSS84
AG21VSS85
AD17VSS86
AG15VSS87
AG12VSS88
AF30 VSS89
AG24VSS90
AG9 VSS91
AC19VSS92
AG27VSS93
AC11VSS94
AD7 VSS95
AJ30 VSS96
AC21VSS97
AK5 VSS98
AK10VSS99
AC13VSS100
AD21VSS101
AK22VSS102
AK29VSS103
W19 VSS104
AE26VSS105
AE27VSS106

VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
U15
V14
R15
T14
N15
V12
N13
P14
U17
T16
R17
P12
T12
R13
W13
W17
P18
V18
M18
U13
N17
W15
V16
T18
M14
M12
M16
P16

VSS30

G10 VSS1
G12 VSS2
AD29VSS3
AD27VSS4
AC27VSS5
G15 VSS6
G14 VSS7
Y24 VSS8
G13 VSS9
E9 VSS10
D15 VSS11
D9 VSS12
AD9 VSS13
G11 VSS14
F16 VSS15
G30 VSS16
AB28VSS17
AB25VSS18
D12 VSS19
AD24VSS20
AA28VSS21
G17 VSS22
Y23 VSS23
AC9 VSS24
R19 VSS25
Y27 VSS26
C28 VSS27
G16 VSS28
F25 VSS29
B30 VSS30
T24 VSS31
F26 VSS32
W27 VSS33
D11 VSS34
H11 VSS35
AD25VSS36
H17 VSS37
H10 VSS38
H16 VSS39
H14 VSS40
E16 VSS41
D10 VSS42
E15 VSS43
F15 VSS44

GROUND
VDDA_1V2

VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132

F28
H28
M24
J28
N19
K28
T23
L27

R5
AE5
V5
N3
F7
F5
R3
AA6
T3
M6
C5
F8
M8
Y8
V3
C3
W3
K8
D3
C6
AA3
A2
AB3
P8
J6
C8
AD3
V8
F3
AE3
AF3
M5
AB7
G3
B4
P7
AA5
C9
C7
J5
R6
J3
AD5
D6
C4
K3
AB8
T7
Y7
AD6
K7
H7
M3
V6
H8
C2
AG3
L6
AJ1
M7
V7
F6
E6
U5
U6
E5
L5
T8
VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
VSSA14
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
VSSA23
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
VSSA49
VSSA50
VSSA51
VSSA52
VSSA53
VSSA54
VSSA55
VSSA56
VSSA57
VSSA58
VSSA59
VSSA60
VSSA61
VSSA62
VSSA63
VSSA64
VSSA65
VSSA66
VSSA67
VSSA68

PAR 6 OF 6

VSSA59

VSSA22

CLG

Thursday, April 14, 2005

Rev
2A
Sheet

of

42

DDR

ALLEGRO ROOM PROPERTY


AMD CPU

Unbuffered DDR Near SODIMM Socket

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
4,11
4,11

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13

117
116
98

BA0
BA1
BA2

DM_0
DM_1
DM_2
DM_3
DM_4
DM_5
DM_6
DM_7

12
26
48
62
134
148
170
184
78

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8

DQS_0
DQS_1
DQS_2
DQS_3
DQS_4
DQS_5
DQS_6
DQS_7

11
25
47
61
133
147
169
183
77

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

35
37
160
158
89
91

CK0
CK0
CK1
CK1
CK2
CK2

MEMBAA0
MEMBAA1
10,11

DM_[7..0]

T112

DM_[7..0]

NOTE: BA2 is not used and it is left open.

112
111
110
109
108
107
106
105
102
101
115
100
99
123

DQS_[7..0]

10,11 DQS_[7..0]

4
4
4
4

DCLK5
DCLK#5
DCLK7
DCLK#7
R71
R72

DCLK5
DCLK#5
DCLK7
DCLK#7
2.5VSUS

4,11

CKE0

4,11
4,11
4,11
4,11
4,11

RAS#A
CAS#A
WE#A
CS#0
CS#1

10K
10K

CS#0
CS#1
T116

2,10,13
2,10,13

SDATA
SCLK

C150
0.1U

20 mils

+3V
T92

2.5VSUS

NOTE: VDDid is a no connect for 2.5V DDR SDRAM.


It is only used for 3.3V SDRAM.
NOTE: Pin 10 (RESET_L) is not
used by unbuffered DIMM's.

96
95

CKE0
CKE1

118
120
119
121
122
86

RAS
CAS
WE
S0
S1
RSET

194
196
198

SA0
SA1
SA2

193
195

SDA
SCL

197
199

VDDspd
VDDid

93
94
113
114
131
132
143
144
155
156
157
167
168
179
180
191
192

VDD#93
VDD#94
VDD#113
VDD#114
VDD#131
VDD#132
VDD#143
VDD#144
VDD#155
VDD#156
VDD#157
VDD#167
VDD#168
VDD#179
VDD#180
VDD#191
VDD#192

3
4
15
16
27
28
38
39

MD_[63..0]

CN13
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
VREF
VREF#2

5
7
13
17
6
8
14
18
19
23
29
31
20
24
30
32
41
43
49
53
42
44
50
54
55
59
65
67
56
60
66
68
127
129
135
139
128
130
136
140
141
145
151
153
142
146
152
154
163
165
171
175
164
166
172
176
177
181
187
189
178
182
188
190

MD_5
MD_1
MD_6
MD_3
MD_4
MD_0
MD_7
MD_2
MD_12
MD_13
MD_15
MD_10
MD_9
MD_8
MD_11
MD_14
MD_16
MD_21
MD_19
MD_23
MD_17
MD_20
MD_18
MD_22
MD_28
MD_29
MD_31
MD_30
MD_24
MD_25
MD_27
MD_26
MD_36
MD_33
MD_39
MD_35
MD_32
MD_37
MD_38
MD_34
MD_41
MD_44
MD_43
MD_46
MD_40
MD_45
MD_42
MD_47
MD_52
MD_49
MD_55
MD_50
MD_48
MD_53
MD_51
MD_54
MD_56
MD_61
MD_62
MD_58
MD_60
MD_57
MD_59
MD_63

MD_[63..0] 10,11

Test point need place another side

2.5VSUS

C203
10U

C449
0.1U

C325
0.1U

C217
0.1U

C209
0.1U

C331
0.1U

C156
0.1U

C315
10U

C301
0.1U

C464
0.1U

C332
0.1U

C443
0.1U

C263
0.1U

C477
0.1U

2.5VSUS

71
73
79
83
72
74
80
84

40 mils

1
2

DU
DU#97
DU#124
DU#200

85
97
124
200

VSS#40
VSS#51
VSS#52
VSS#63
VSS#64
VSS#75
VSS#76
VSS#87
VSS#88
VSS#90

40
51
52
63
64
75
76
87
88
90

VREF_DDR_MEM
T117
T113
T105
T90

C340

C339
0.22U

4.7U

C338
1000P
2.5VSUS

R88
1K

C195
C341
0.01U

4.7U

C172
0.22U

VREF_DDR_MEM

186
185
174
173
162
161
159
150
149
138
137
126
125
104
103

VSS
VSS#4
VSS#15
VSS#16
VSS#27
VSS#28
VSS#38
VSS#39

SO-DIMM
(REVERSE)

MAA[13..0]

VDD
VDD#10
VDD#21
VDD#22
VDD#33
VDD#34
VDD#36
VDD#45
VDD#46
VDD#57
VDD#58
VDD#69
VDD#70
VDD#81
VDD#82
VDD#92

4,11

VSS#186
VSS#185
VSS#174
VSS#173
VSS#162
VSS#161
VSS#159
VSS#150
VSS#149
VSS#138
VSS#137
VSS#126
VSS#125
VSS#104
VSS#103

9
10
21
22
33
34
36
45
46
57
58
69
70
81
82
92

2.5VSUS

R87
1K

PROJECT : CT8

C337
0.01U

Quanta Computer Inc.

Socket_SO_DIMM_200_pin,_RVS H5.2

Size
Document Number
Custom
DDR
Date:

Rev
1A

NEAR SO-DIMM

Thursday, April 14, 2005

Sheet
1

of

42

DDR

ALLEGRO ROOM PROPERTY


AMD CPU

Unbuffered DDR Far SODIMM Socket

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13

117
116
98

BA0
BA1
BA2

DM_0
DM_1
DM_2
DM_3
DM_4
DM_5
DM_6
DM_7

12
26
48
62
134
148
170
184
78

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8

DQS_0
DQS_1
DQS_2
DQS_3
DQS_4
DQS_5
DQS_6
DQS_7

11
25
47
61
133
147
169
183
77

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

35
37
160
158
89
91

CK0
CK0
CK1
CK1
CK2
CK2

MEMBAB0
MEMBAB1
9,11

T292

DM_[7..0]

DM_[7..0]

NOTE: BA2 is not used and it is left open.

112
111
110
109
108
107
106
105
102
101
115
100
99
123

9,11

DQS_[7..0]

DQS_[7..0]

4
4
4
4

DCLK4
DCLK#4
DCLK6
DCLK#6
R68
R74

DCLK4
DCLK#4
DCLK6
DCLK#6
2.5VSUS

4,11

CKE1

4,11
4,11
4,11
4,11
4,11

RAS#B
CAS#B
WE#B
CS#2
CS#3

10K
10K

CS#2
CS#3
T293
2.5VSUS

2,9,13
2,9,13

SDATA
SCLK

+3V
C149
0.1U

20 mils
2.5VSUS

NOTE: VDDid is a no connect for 2.5V DDR SDRAM.


It is only used for 3.3V SDRAM.

NOTE: Pin 10 (RESET_L) is not


used by unbuffered DIMM's.

CKE0
CKE1

118
120
119
121
122
86

RAS
CAS
WE
S0
S1
RSET

194
196
198

SA0
SA1
SA2

193
195

SDA
SCL

197
199

VDDspd
VDDid

93
94
113
114
131
132
143
144
155
156
157
167
168
179
180
191
192

VDD#93
VDD#94
VDD#113
VDD#114
VDD#131
VDD#132
VDD#143
VDD#144
VDD#155
VDD#156
VDD#157
VDD#167
VDD#168
VDD#179
VDD#180
VDD#191
VDD#192

3
4
15
16
27
28
38
39

VSS
VSS#4
VSS#15
VSS#16
VSS#27
VSS#28
VSS#38
VSS#39

CN12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

MD_[63..0]
5
7
13
17
6
8
14
18
19
23
29
31
20
24
30
32
41
43
49
53
42
44
50
54
55
59
65
67
56
60
66
68
127
129
135
139
128
130
136
140
141
145
151
153
142
146
152
154
163
165
171
175
164
166
172
176
177
181
187
189
178
182
188
190
71
73
79
83
72
74
80
84

VREF
VREF#2

1
2

DU
DU#97
DU#124
DU#200

85
97
124
200

VSS#40
VSS#51
VSS#52
VSS#63
VSS#64
VSS#75
VSS#76
VSS#87
VSS#88
VSS#90

40
51
52
63
64
75
76
87
88
90

MD_[63..0] 9,11

MD_5
MD_1
MD_6
MD_3
MD_4
MD_0
MD_7
MD_2
MD_12
MD_13
MD_15
MD_10
MD_9
MD_8
MD_11
MD_14
MD_16
MD_21
MD_19
MD_23
MD_17
MD_20
MD_18
MD_22
MD_28
MD_29
MD_31
MD_30
MD_24
MD_25
MD_27
MD_26
MD_36
MD_33
MD_39
MD_35
MD_32
MD_37
MD_38
MD_34
MD_41
MD_44
MD_43
MD_46
MD_40
MD_45
MD_42
MD_47
MD_52
MD_49
MD_55
MD_50
MD_48
MD_53
MD_51
MD_54
MD_56
MD_61
MD_62
MD_58
MD_60
MD_57
MD_59
MD_63

Test point need place another side


C

2.5VSUS

C316
10U

C440
0.1U

C279
0.1U

C463
0.1U

C438
0.1U

C476
0.1U

C453
0.1U

C306
0.1U

C461
0.1U

C159
0.1U

C434
0.1U

C212
0.1U

C294
0.1U

2.5VSUS

40 mils
VREF_DDR_MEM
T115
T114
T291
T285

186
185
174
173
162
161
159
150
149
138
137
126
125
104
103

T91

96
95

SO-DIMM
(REVERSE)

4,11
4,11

MAB[13..0]

VDD
VDD#10
VDD#21
VDD#22
VDD#33
VDD#34
VDD#36
VDD#45
VDD#46
VDD#57
VDD#58
VDD#69
VDD#70
VDD#81
VDD#82
VDD#92

4,11

VSS#186
VSS#185
VSS#174
VSS#173
VSS#162
VSS#161
VSS#159
VSS#150
VSS#149
VSS#138
VSS#137
VSS#126
VSS#125
VSS#104
VSS#103

9
10
21
22
33
34
36
45
46
57
58
69
70
81
82
92

2.5VSUS

PROJECT : CT8

Quanta Computer Inc.

Socket_SO_DIMM_200_pin,_RVS H9.2

Size
Document Number
Custom
DDR
Date:
5

Rev
1A

FAR SO-DIMM

Thursday, April 14, 2005

Sheet
1

10

of

42

9,10

MD[63..0]

MD[63..0]

DQS[7..0]

DQS[7..0]

DM[7..0]

MD62
MD58
MD56
MD61
MD59
MD63
MD60
MD57
MD55
MD50
MD48
MD53
MD51
MD54
MD49
MD52
MD42
MD47
MD45
MD40
MD43
MD46
MD41
MD44
MD38
MD34
MD32
MD37
MD39
MD35
MD36
MD33
MD27
MD26
MD25
MD24
MD31
MD30
MD28
MD29
MD22
MD18
MD17
MD20
MD19
MD23
MD16
MD21
MD11
MD14
MD9
MD8
MD10
MD15
MD12
MD13
MD7
MD2
MD4
MD0
MD6
MD3
MD5
MD1

DM[7..0]

RN46 1
3
RN48 1
3
RN47 1
3
RN49 1
3
RN50 1
3
RN53 1
3
RN51 1
3
RN52 1
3
RN55 1
3
RN58 1
3
RN54 1
3
RN56 1
3
RN59 1
3
RN61 1
3
RN57 1
3
RN60 1
3
RN63 1
3
RN65 1
3
RN62 1
3
RN64 1
3
RN67 1
3
RN69 1
3
RN66 1
3
RN68 1
3
RN71 1
3
RN73 1
3
RN70 1
3
RN72 1
3
RN75 1
3
RN77 1
3
RN74 1
3
RN76 1
3

2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4

MD_62
MD_58
MD_56
MD_61
MD_59
MD_63
MD_60
MD_57
MD_55
MD_50
MD_48
MD_53
MD_51
MD_54
MD_49
MD_52
MD_42
MD_47
MD_45
MD_40
MD_43
MD_46
MD_41
MD_44
MD_38
MD_34
MD_32
MD_37
MD_39
MD_35
MD_36
MD_33
MD_27
MD_26
MD_25
MD_24
MD_31
MD_30
MD_28
MD_29
MD_22
MD_18
MD_17
MD_20
MD_19
MD_23
MD_16
MD_21
MD_11
MD_14
MD_9
MD_8
MD_10
MD_15
MD_12
MD_13
MD_7
MD_2
MD_4
MD_0
MD_6
MD_3
MD_5
MD_1

10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2
10X2

10-0402
10-0402
10-0402
10-0402
10-0402
10-0402
10-0402
10-0402

9,10

DQS_[7..0]

9,10

DM_[7..0]

DQS_0
DQS_1
DQS_2
DQS_3
DQS_4
DQS_5
DQS_6
DQS_7

R272
R270
R264
R253
R245
R242
R239
R237

10-0402
10-0402
10-0402
10-0402
10-0402
10-0402
10-0402
10-0402

DM_[7..0]

Place on each end of


the VTT island.
VTT_DDR

DM_0
DM_1
DM_2
DM_3
DM_4
DM_5
DM_6
DM_7

C129

10U

RN33 1
3
5
7
RN35 1
3
5
7
RN30 1
3
5
7
RN32 1
3
5
7
RN27 1
3
5
7
RN29 1
3
5
7
RN24 1
3
5
7
RN26 1
3
5
7
RN11 1
3
5
7
RN13 1
3
5
7
RN8 1
3
5
7
RN10 1
3
5
7
RN5 1
3
5
7
RN7 1
3
5
7
RN2 1
3
5
7
RN4 1
3
5
7

MD_2
MD_7
MD_6
MD_3
MD_5
MD_1
MD_0
MD_4
MD_14
MD_11
MD_15
MD_10
MD_8
MD_9
MD_12
MD_13
MD_18
MD_22
MD_23
MD_19
MD_16
MD_21
MD_17
MD_20
MD_26
MD_31
MD_30
MD_27
MD_29
MD_28
MD_25
MD_24
MD_39
MD_35
MD_38
MD_34
MD_36
MD_33
MD_32
MD_37
MD_47
MD_42
MD_46
MD_43
MD_44
MD_41
MD_45
MD_40
MD_55
MD_50
MD_51
MD_54
MD_52
MD_49
MD_48
MD_53
MD_63
MD_59
MD_62
MD_58
MD_61
MD_56
MD_57
MD_60

DQS_[7..0]

C127
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

MD_[63..0]

10U

LAYOUT: Place alternating caps to GND and VDD_2.5_SUS


in a single line along VTT_DDR_SUS island.

C188

C169

C260

C157

C218

C186

C261

C459

1000P

100P

100P

1000P

1000P

100P

100P

1000P

68X2

RN3

1
3
RN9 1
3
RN25 1
3
RN31 1
3

2
4
2
4
2
4
2
4

DQS_6
DM_6
DQS_4
DM_4
DM_2
DQS_2
DM_0
DQS_0

RN6

2
4
2
4
2
4
2
4

1
3
RN12 1
3
RN28 1
3
RN34 1
3

VTT_DDR
4,9

MAA[13..0]

4,9

MEMBAA0

MAA0
MAA2
MAA8
MAA11
MAA1
MAA3
MAA5

68X4

68X4

MAA7
MAA9
MAA4
MAA6
MAA12
MAA13

68X4

RN18 1
3
5
7
RN20 1
3
5
7
RN22 1
3
5
7
R70

68X4
4,9
4,10

R73
R64

CKE0
CKE1

68X4
4,9
68X4

68X4

WE#A

4,9

CS#0

4,9
4,9
4,9
4,9

MEMBAA1
RAS#A
CS#1
CAS#A

2 47X4
4
6
8
2 47X4
4
6
8
2 47X4
4
6
8
47

47
47

MAA10
MAA13
CS#0

RN16 1
3
5
7

2 47X4
4
6
8

CS#1

RN15 1
3
5
7

2 47X4
4
6
8

68X4

VTT_DDR
4,10

MAB[13..0]

4,10

MEMBAB0

RN21 1
3
5
7
RN19 1
3
5
7
RN23 1
3
5
7
R65

MAB2
MAB4
MAB6
MAB5
MAB3
MAB1
MAB10

68X4

68X4

MAB11
MAB8
MAB9
MAB7
MAB12

68X4

2 47X4
4
6
8
2 47X4
4
6
8
2 47X4
4
6
8
47

68X4

68X4

4,10
4,10
4,10

RAS#B
CS#3
CS#2

4,10
4,10
4,10

CAS#B
WE#B
MEMBAB1

CS#3
CS#2
MAB13

RN14 1
3
5
7

2 47X4
4
6
8

MAB0

RN17 1
3
5
7

2 47X4
4
6
8

68X4

68X4

03/19 Modify ->Quanta stock haven't 68x4 (8P4R-0402)


68X2
68X2
68X2

LAYOUT: Locate close to Clawhammer socket.


VTT_DDR

REV.B

2.5VSUS

C280

68X2
68X2
68X2

68X2

C145 + C481 C128


100U/6.3V100U/6.3V
4.7U

*220U
C265
0.22U

LAYOUT: Place a cap every 1 in. on VTT


traces between Clawhammer and DDR.

VTT_DDR

Clawhammer and near DIMMs

68X4

DM_7
DQS_7
DM_5
DQS_5
DM_3
DQS_3
DM_1
DQS_1

LAYOUT: Place on VTT fill near


VTT_DDR

2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8

R271
R269
R263
R252
R243
R241
R238
R236

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

VTT_DDR

VTT_DDR

DDR
4

C343

C125

C347

C348

C342

C250
0.22U

4.7U

C319
0.22U

4.7U

C326
0.22U

4.7U

C228
0.22U

4.7U

C230
0.22U

4.7U

C290
0.1U

C349
C236
0.22U

4.7U

C134
C278
0.22U

C124
C204
0.22U

4.7U

4.7U

C133
C305
0.22U

4.7U

C233
0.1U

C287
0.1U

C335
0.1U

C266
0.1U

C219
0.1U

C201
0.1U

C302
0.1U

C162
0.1U

C442
0.1U

C312
0.1U

C327
0.1U

C270
0.1U

C170
0.1U

C220
0.1U

C275
0.1U

C147
0.1U

C282
0.1U

C446
0.1U

C241
0.1U

C289
0.1U

C235
0.1U

C330
0.1U

C202
0.1U

C436
0.1U

C151
0.1U

C276
0.1U

C259
0.1U

C264
0.1U

C174
0.1U

C183
0.1U

C291
0.1U

C160
0.1U

C334
0.1U

C300

C210

C298

C346

C322

C274

C185

C227

C344

C309

C239

C317

C165

C132

C323

C211

C167

C153

C189

C173

C252

C333

C310

C345

C131

C249

C135

C197

C273

C242

C251

C269

C271

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

VTT_DDR

PROJECT : CT8

2.5VSUS
0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

Quanta Computer Inc.

Document Number
0.1U Size
Custom
DDR
Date:

Rev
2A

SO-DIMM TERMINATION

Thursday, April 14, 2005

Sheet
1

11

of

42

CLG
32K_X1
Y4
1
2
32.768KHZ
R143

20M

C387

C388
18P
R114
1

2 8.2K
U7A

PLACE THESE COMPONENTSCLOSE TO U600, AND


USE GROUND GUILD FOR 32K_X1 AND 32K_X2
SB_RST#
2
2
5
5
5
5

REV.C

5
5
5
5

C360

A_RX0P
A_RX0N
A_RX1P
A_RX1N

C358

A_RST#

L27
M27

PCIE_RCLKP
PCIE_RCLKN

T134
T135
T340
T139

M30
N30
K30
L30
H30
J30
F30
G30

PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N

T132
T140
T310
T311

M29
N29
M28
N28
J29
K29
J28
K28

PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N

SBSRCCLK
SBSRCCLK#
.01U_0402
C361
.01U_0402
C359

.01U_0402
.01U_0402

A_TX0P
A_TX0N
A_TX1P
A_TX1N

A_TX0P
A_TX0N
A_TX1P
A_TX1N

PCIE_VDDR

150/F
150/F

G27
H27

PCIE_CALRP
PCIE_CALRN

R306

4.12K

G28

PCIE_CALI

R30

PCIE_PVDD

F26
R29
G26
P26
K26
L26
P28
N26
P27

PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8
PCIE_VDDR_9

H28
F29
H29
H26
F27
G29
L29
J26
L28
J27
N27
M26
K27
P29
P30

PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15

AJ8
AK7
AG5
AH5
AJ5
AH6
AJ6
AK6
AG7
AH7

CPU_STP#/DPSLP#
PCI_STP#
INTA#
INTB#
INTC#
INTD#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36

PCIE_PVDD

L44
SBK160808T-301Y-S
C354

C362
C355
1U

22U

PCIE_VDDR

0.1U

C610 AND C611 CLOSE


THE BALL R30 OF U600
PCIE_VDDR
L24

40 mils

+1.8V
TI201209G121
C356
22U

C525

C502

C521

C524

C522

C523

C527

C526

C501

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

3V_S5

C382
*0.1U
U9
NB_RST#

NB_RST#

T155
T157

SB_RST#

2
7,34

4
1

20
26
20
17
17
20

*TC7SH08FU
R520
B

22

REV.B

INTB#
INTC#
INTD#
INTE#
INTF#
INTG#

CPU_STP#
PCI_STP#
INTA#
INTB#
INTC#
INTD#
INTE#
INTF#
INTG#
INTH#

VDDA_1V2

R305

32K_X2

B2
B1

X1

XTAL

32K_X1

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK8
PCICLK9
PCICLK_FB

Part 1 of 4

R311
R312

+1.8V

SB400 SB

AH8

X2

*1K

PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/PDMA_REQ0#
REQ4#/PLL_BP33/PDMA_REQ1#
REQ5#/GPIO13
REQ6#/GPIO31
GNT0#
GNT1#
GNT2#
GNT3#/PLL_BP66/PDMA_GNT0#
GNT4#/PLL_BP50/PDMA_GNT1#
GNT5#/GPIO14
GNT6#/GPIO32
CLKRUN#
LOCK#

RB500
DEL D3
Remove charge circuit
Q16, R129, R133, R137,
R140

R126

1K

VCCRTC

30

3VRTC_1

C670
1U/16V

C485 Placement closed to SB


G1
SHORT_ PAD1

PCLK_MINI 16,17
PCLK_591 16,30
PCI_CLK_7411 16,20
PCLK_5
16,30
PCLK_6
16
PCLK_LAN 16,26
PCICLK8 16
C391

LENGTH OF (PCI_CLK9_R + PCI_CLK9_FB)


SHOULD BE AS SHORT AS POSSIBLE

*100P

REV.B

AD[0..31]

R_PCIRST#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
REQ5#
REQ6#
GNT0#
GNT1#
GNT2#
GNT3#
GNT4#
GNT5#
GNT6#
CLKRUN#

AD[0..31]

16,17,20,26
3V_S5
C381

0.1U

2
4
R_PCIRST#

PCIRST#

17,20,26,30

U10
TC7SH08FU

8.2K
C

+3V

C/BE0#
C/BE1#
C/BE2#
C/BE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#

17,20,26
17,20,26
17,20,26
17,20,26
17,20,26
17,20,26
17,20,26
17,20,26
17,20,26
17,20,26
17,20,26
17,20,26

REQ1#
REQ2#

17
26

REQ4#
REQ5#

20
16

GNT1#
GNT2#

17
26

GNT4#
GNT5#

20
16

INTA#
INTB#
INTC#
INTD#
INTE#
INTF#
INTG#
INTH#
PLOCK#

8.2K
8.2K
8.2K
2 8.2K
2 8.2K
2 8.2K
2 8.2K
2 8.2K
2 8.2K

1
1
1
1
1
1

CLKRUN#

R173
1

8.2K
2

PERR#
SERR#
TRDY#
PAR
STOP#
REQ3#
REQ5#
GNT4#

RN42
2
4
6
8
2
4
6
8

8.2KX4
1
3
5
7
1
3
5
7

REV.B
GNT1#
REQ6#
GNT3#
GNT2#
REQ2#
GNT0#
REQ1#

CLKRUN# 17,20,26
33

R398
R132
R136
R384
R125
R128
R371
R380
R428

+3V

PLOCK#

20

LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#

AG25
AH25
AJ25
AH24
AG24
AH26
AG26

LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#0
LPC_DRQ1#

LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#0

30
30
30
30
30
30

SERIRQ

AK27

SERIRQ

SERIRQ

17,20,30

IRDY#

RN41
RN40
2
4
6
8
2
4
6
8

C2
F3

VBAT
RTC_GND

A2
A1

8.2KX4

2 8.2K
R107 100K

LAD2

R108 100K
R106 100K
R103 100K
R452 100K

SERIRQ
LFRAME#
LPC_DRQ1#
LDRQ#0
REQ0#
GNT6#
GNT5#
DEVSEL#

C667
0.1U

2 8.2K

LAD3

FRAME#

VCCRTC

R174

LAD1

RTC_CLK 16
AUTO_ON# 16

8.2KX4
8.2KX4
1
3
5
7
1
3
5
7

R475

REQ4#

PCLK_LAN
PCLK_591
PCLK_MINI
PCI_CLK_7411

RTC

PCIRST#

R123

R155

RTCCLK
RTC_IRQ#/ACPWR_STRAP

SB400

BT1
RTC-BAT
2

T329
T333

22
22
22
22
22
22
22
22

LAD0

30 mils

LPC

1.2K

CPU_PG/LDT_PG
INTR/LINT0
NMI/LINT1
INIT#
SMI#
SLP#/LDT_STP#
IGNNE#
A20M#
FERR#
STPCLK#/ALLOW_LDTSTP
SSMUXSEL/GPIO0
DPRSLPVR
BMREQ#
LDT_RST#

RTC

1 R528

C29
A28
C28
B29
D29
E4
B30
F28
E28
E29
D25
E27
D27
D28

T143
T144
T338
T136
T138
3,7
LDTSTOP#
T137
T133
T309
7 ALLOW_LDTSTOP
3
CPUPWRGD
T313
7
BMREQ#
3
LDT_RST#

CPU

3VPCU

REV.B

30 mils

REV.C

AJ7
W3
Y2
W4
Y3
V1
Y4
V2
W2
AA4
V4
AA3
U1
AA2
U2
AA1
U3
T4
AC1
R2
AD4
R3
AD3
R4
AD2
P2
AE3
P3
AE2
P4
AF2
N1
AF1
V3
AB4
AC2
AE4
T3
AC4
AC3
T2
U4
T1
AB2
AB3
AF4
AF3
AG2
AG3
AH1
AH2
AH3
AJ2
AK2
AJ3
AK3
AG4
AH4
AJ4
AG1
AB1

R163
R149
R152
R151
R164
R150
R154
R153

PCI_MINI
PCI_591
PCI_7411
PCI_5
PCI_6
PCI_LAN
PCI_8
PCICLK9
PCI_CLK9_FB

RN43

VCCRTC
D3

L4
L3
L2
L1
M4
M3
M2
M1
N4
N3
N2

REV.B

PCI CLKS

18P

PCI INTERFACE

20M

PCI EXPRESS INTERFACE

R158
D

PLACE THESE CAPS CLOSE


TO THE CONNECTOR

32K_X2

4
3

RN36
2
4
6
8
2
4
6
8
RN44

8.2KX4
1
3
5
7
1
3
5
7
8.2KX4

C674
33P

EMI

C683
33P

C676
33P

C675
33P

PROJECT : CT8

REV.C

Quanta Computer Inc.

Size
C

Document Number

Date:

Thursday, April 14, 2005

Rev
3A

SB400-PCIE/PCI/CPU/LPC
Sheet
1

12

of

42

CLG

Please double check SB400 pin D5 & pin A27 define,


because cann't meet ATI library/symbols.

4.7K
4.7K
4.7K
2.2K
2.2K

R145
R159

30
GATEA20
30
RCIN#
3,30 THERM_CPUDIE#

SWI#_1

PWROK_SB is 33ms ~
500ms after NB_PWRGD

T145
T328

GPM7#
SCI_#
30

10K
10K

RSMRST_#

RSMRST_#

D1

2,7 SB_OSC_INT
SB_14M_X2

T146

REV.B

REV.C
R503 STUFF IS FULL FEATURE.
R504 STUFF IS DE-FEATURE.

R503

+3V

R504

REV.B

10K

+3V

*10K

AGP_STP#
AGP_BUSY#
R316

23
SPK
2,9,10
SCLK
2,9,10
SDATA
31 CRT_SENSE#
18
LCDID0
18
LCDID1
18
LCDID2

3V_S5

30 mils

30

30

SCI#

1SS355
1

D4
2

SWI#

1SS355
1

D15
2

AC_SDIN2
SDINB

R432
R412

8.2K
10K

BITCLK

R446

10K

REV.B

CRT_SENSE#

USBCLK_EXT 2
C609

*20P

33
33

USB_HSDP4+
USB_HSDM4-

A13
B13

USBP4+
USBP4-

32
32

USB_HSDP3+
USB_HSDM3-

A18
B18

USB_HSDP2+
USB_HSDM2-

A17
B17

USBP2+
USBP2-

33
33

USB_HSDP1+
USB_HSDM1-

A21
B21

USBP1+
USBP1-

22
22

USB_HSDP0+
USB_HSDM0-

A20
B20

USBP0+
USBP0-

22
22

AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3

C21
C18
D13
D10
D20
D17
C14
C11

AVDDTX_USB

AVDDC

A16

3.3V_AVDDC

AVSSC

B16

AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24

A9
A12
A19
A22
B9
B12
B19
B22
C9
C10
C12
C13
C17
C19
C20
C22
D9
D11
D12
D14
D18
D19
D21
D22

B23

14M_X2

B25
C25
C23
D24
D23
A27
C24
A26
B26
B27
C26
C27
D26

SIO_CLK
ROM_CS#/GPIO1
GHI#/GPIO6
VGATE/GPIO7
AGP_STP#/GPIO4
AGP_BUSY#/GPIO5
FANOUT0/GPIO3
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
DDC2_SCL/GPIO11
DDC2_SDA/GPIO12

SCI_#

SWI#_1

J2
K3
J3
K2

NC1
NC4
NC3
NC2

REV.B DEL R161


17,23
BITCLK
16,17,23 SDOUT1
23
SDINA
17
SDINB

R146

33

R148
R442

17,23 SYNC1
17,23 -CODEC_RST
16
SPDIF_OUT

+3V

33
33

R147

AC_DATA_OUT_R
SDINA
SDINB
AC_SDIN2
AC_SYNC_R
#CODEC_RST

G1
G2
H4
G3
G4
H1
H3
H2

AC_BITCLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
AC_SDIN2
AC_SYNC
AC_RST#
SPDIF_OUT

10K

REV.B

BT_OFF#
RF_OFF#

R355
11.8K
USB_RCOMP R111
T320
T316
T317
KBSMI#
USB_OCP_1#
BATLOW#
BT_OFF#
USB_OCP_4#
USB_OCP_5#
USB_OCP_6#
USB_OCP_7#

A11
B11

T151
T150

A10
B10

T154
T153

*0
C570

KBSMI#

BT_OFF# 33
RF_OFF# 17

REV.B

*20P

3V_S5

30

RN38
2
4
6
8

USB_OCP_1#
BT_OFF#
USB_OCP_5#
USB_OCP_4#

REV.D

BATLOW# 30

USB_OCP_5#
USB_OCP_4#

REV.D

R533
R534

*10K
*10K

3V_S5
R127
R131

USB_OCP_6#
USB_OCP_7#

T149
T148

10K
10K

R102

KBSMI#

AVDDRX_USB

10KX4
1
3
5
7

REV.D

4.7K

3VSUS
AVDDTX_USB

R418
10K
T158
T331
T330
T159

Y8
*XTAL-48MHZ
2

USBP5+
USBP5-

RSMRST#

USB PWR

R419
10K

10K

USB_HSDP5+
USB_HSDM5-

A14
B14

14M_X1/OSC

REV.D

10K
RF_OFF#
10K
MB_ID

A15
B15
C15
D16
C16
D15
B8
C8
C7
B7
B6
A6
B5
A5

A23

AK24

T147
R99
R318

48M_X1/USBCLK
TALERT#/TEMP_ALERT#/GPIO10
48M_X2
USB_RCOMP
BLINK/GPM6#
USB_VREFOUT
PCI_PME#/GEVENT4#
USB_ATEST1
RI#/EXTEVNT0#
USB_ATEST0
SLP_S3#
USB_OC0#/GPM0#
SLP_S5#
USB_OC1#/GPM1#
PWR_BTN#
USB_OC2#/FANOUT1/GPM2#
PWR_GOOD
USB_OC3#/GPM3#
SUS_STAT#
USB_OC4#/GPM4#
TEST1
USB_OC5#/GPM5#
TEST0
USB_OC6#/FAN_ALERT#/GEVENT6#
GA20IN
USB_OC7#/CASE_ALERT#/GEVENT7#
KBRST#
SMBALERT#/THRMTRIP#/GEVENT2#
USB_HSDP7+
LPC_PME#/GEVENT3#
USB_HSDM7LPC_SMI#/EXTEVNT1#
VOLT_ALERT#/GEVENT5#
USB_HSDP6+
SYS_RESET#/GPM7#
USB_HSDM6WAKE#/GEVENT8#

USB INTERFACE

+3V

Part 4 of 4

SB400 SB

ACPI / WAKE UP EVENTS

17,20,26 PCI_PME#
20
RI#
30
SUSB#
30
SUSC#
30
DNBSWON#
30
PWROK_SB
7
SUS_STAT#

C6
D5
C4
D3
B4
E3
B3
C3
D4
F2
E2
AJ26
AJ27
D6
C5
A25
D8
D7
D2

GPIO

3 TEMP_ALARM#

1. Remove R400.
R313
R330
R324
R96
R97

*0

U7D
TEMP_ALARM#
GPM6#
PCI_PME#
RI#
SUSB#
SUSC#
DNBSWON#
PWROK_SB

(NOT USED)

CRT_SENSE#
AGP_BUSY#
AGP_STP#
SDATA
SCLK

R362

R356
*10M

AC97

REV.B

4.7K
4.7K
4.7K
4.7K
4.7K
4.7K
10K
4.7K
4.7K

CLK / RST

R376
R336
R144
R135
R369
R385
R178
R377
R379

3V_S5
GPM6#
SUSB#
SUSC#
DNBSWON#
TEMP_ALARM#
PCI_PME#
RI#
BATLOW#
GPM7#

R361

20 mils

L27

C372

C545

C555

C612

C589

C566

TI201209G121
C571

22U

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

TI201209G121
C552

04/06 Modify
AVDDRX_USB

L28

20 mils

C599

C553

C575

C563

C581

C574

0.1U

0.1U

0.1U

0.1U

0.1U

0.1U

3.3V_AVDDC

20 mils

22U

L29
B

SBK160808T-301Y-S
C374
22U

C376
1U

C569
0.1U

C641 AND C642 CLOSE


THE BALL A16 OF U600

SB400

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
SB400-ACPI/GPIO/USB/AC97
Date:
5

Thursday, April 14, 2005

Sheet
1

13

Rev
3A
of

42

CLG
D

U7B

AK19
AJ19

SATA_TX1+
SATA_TX1-

AK18
AJ18

SATA_RX1SATA_RX1+

AK14
AJ14

SATA_TX2+
SATA_TX2-

AK13
AJ13

SATA_RX2SATA_RX2+

AK11
AJ11

SATA_TX3+
SATA_TX3-

AK10
AJ10

SATA_RX3SATA_RX3+

AJ15

SATA_CAL

AJ16

SATA_X1

AK16

SATA_X2

Part 2 of 4

PLLVDD_SATA

AH16

XTLVDD_SATA

AG10
AG14
AH12
AG12
AG18
AG21
AH18
AG20

AVDD_SATA_1
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_4
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
AVDD_SATA_8

AG9
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AH9
AG11
AG15
AG17
AG19
AG22
AG23
AF9
AH17
AH23
AH13
AH20
AK9
AJ12
AK17
AK23
AH10
AJ23

AVSSP_SATA_1
AVSSP_SATA_2
AVSSP_SATA_3
AVSSP_SATA_4
AVSSP_SATA_5
AVSSP_SATA_6
AVSSP_SATA_7
AVSSP_SATA_8
AVSSP_SATA_9
AVSSP_SATA_10
AVSSP_SATA_11
AVSSP_SATA_12
AVSSP_SATA_13
AVSSP_SATA_14
AVSSP_SATA_15
AVSSP_SATA_16
AVSSP_SATA_17
AVSSP_SATA_18
AVSSP_SATA_19
AVSSP_SATA_20
AVSSP_SATA_21
AVSSP_SATA_22
AVSSP_SATA_23
AVSSP_SATA_24
AVSSP_SATA_25
AVSSP_SATA_26
AVSSP_SATA_27
AVSSP_SATA_28
AVSSP_SATA_29
AVSSP_SATA_30
AVSSP_SATA_31
AVSSP_SATA_32

PIDE_IORDY
PIDE_IRQ
PIDE_A0
PIDE_A1
PIDE_A2
PIDE_DACK#
PIDE_DRQ
PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#

AD30
AE28
AD27
AC27
AD28
AD29
AE27
AE30
AE29
AC28
AC29

PIORDY
IRQ14
PDA0
PDA1
PDA2
PDDACK#
PDDREQ
PDIOR#
PDIOW#
PDCS1#
PDCS3#

PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15

AF29
AF27
AG29
AH30
AH28
AK29
AK28
AH27
AG27
AJ28
AJ29
AH29
AG28
AG30
AF30
AF28

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

V29
T27
T28
U29
T29
V30
U28
W29
W30
R27
R28

SIORDY
IRQ15
SDA0
SDA1
SDA2
SDDACK#
SDDREQ
SDIOR#
SDIOW#
SDCS1#
SDCS3#

SIDE_D0/GPIO15
SIDE_D1/GPIO16
SIDE_D2/GPIO17
SIDE_D3/GPIO18
SIDE_D4/GPIO19
SIDE_D5/GPIO20
SIDE_D6/GPIO21
SIDE_D7/GPIO22
SIDE_D8/GPIO23
SIDE_D9/GPIO24
SIDE_D10/GPIO25
SIDE_D11/GPIO26
SIDE_D12/GPIO27
SIDE_D13/GPIO28
SIDE_D14/GPIO29
SIDE_D15/GPIO30

V28
W28
Y30
AA30
Y28
AA28
AB28
AB27
AB29
AA27
Y27
AA29
W27
Y29
V27
U27

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

AVSST_SATA_1
AVSST_SATA_2
AVSST_SATA_3
AVSST_SATA_4
AVSST_SATA_5
AVSST_SATA_6
AVSST_SATA_7
AVSST_SATA_8
AVSST_SATA_9
AVSST_SATA_10
AVSST_SATA_11
AVSST_SATA_12
AVSST_SATA_13

AG13
AH22
AK12
AH11
AJ17
AH14
AH19
AJ20
AH21
AJ9
AG16
AK15
AK20

SIDE_IORDY
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
SIDE_DACK#
SIDE_DRQ
SIDE_IOR#
SIDE_IOW#
SIDE_CS1#
SIDE_CS3#

SATA_ACT#

AH15

SECONDARY ATA 66/100

AK8

SB400 SB

PRIMARY ATA 66/100

SATA_RX0SATA_RX0+

SERIAL ATA

SATA_TX0+
SATA_TX0-

AK21
AJ21

SERIAL ATA POWER

AK22
AJ22

34

SDA[0..2]

34

SDD[0..15]

34
34
34
34
34
34
34
34

SDIOW#
SDDREQ
SIORDY
SDIOR#
IRQ15
SDDACK#
SDCS1#
SDCS3#

34

PDA[0..2]

34

PDD[0..15]

34
34
34
34
34
16,34
34
34

PDIOW#
PDDREQ
PIORDY
PDIOR#
IRQ14
PDDACK#
PDCS1#
PDCS3#

SDA[0..2]
SDD[0..15]
SDIOW#
SDDREQ
SIORDY
SDIOR#
IRQ15
SDDACK#
SDCS1#
SDCS3#

PDA[0..2]
PDD[0..15]
PDIOW#
PDDREQ
PIORDY
PDIOR#
IRQ14
PDDACK#
PDCS1#
PDCS3#

SB400

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
SB400-SATA/IDE
Date:
5

Thursday, April 14, 2005

Rev
1A
Sheet
1

14

of

42

CLG
+3V

U7C

+1.8V

3V_S5

M12
M13
M18
M19
N12
N13
N18
N19
V12
V13
V18
V19
W12
W13
W18
W19

1.8V_S5

A3
A7
E6
E7
E1
F5

S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6

E9
E10
E20
E21

S5_1.8V_1
S5_1.8V_2
S5_1.8V_3
S5_1.8V_4

E13
E14
E16
E17

USB_PHY_1.8V_1
USB_PHY_1.8V_2
USB_PHY_1.8V_3
USB_PHY_1.8V_4

CPU_PWR

C30

CPU_PWR

V5_VREF

AG6

V5_VREF

A24
B24

AVDDCK
AVSSCK

A4
A8
A29
B28
C1
E5
E8
E11
E12
E15
E18

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11

+3V

+ C548
C535
22U

C529
1U

C530
1U

C531
1U

C514
1U

C499
1U

C500
1U

C628
0.1U

C623
0.1U

C634
0.1U

C629
0.1U

C627
0.1U

C625
0.1U

C622
0.1U

C504
0.1U

C626
0.1U

C624
0.1U

C618
0.1U

*100U

+3V

+1.8V

C495
22U

C607
1U

C559
1U

C540
1U

C593
1U

C561
0.1U

C544
0.1U

+1.8V

C604
0.1U

C541
0.1U

C605
0.1U

C603
0.1U

C542
0.1U

C582
0.1U

C602
0.1U

C591
0.1U

C551
0.1U

1.8VSUS

+1.8V
AVDD_CK

20 mils

L26

R95

VDDA_1V2
SBK160808T-301Y-S

+5V

C369
C370
1U

10U

C520
0.1U

+3V

R393

C357

0.1U

AVDD_CK

D17

15 mils

1K

15 mils

RB751V-40
C642
*1U

C633
0.1U

REV.B

3V_S5

1.8V_S5

C655
10U

1.8VSUS

30 mils

30 mils

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28
VDDQ_29
VDDQ_30
VDDQ_31
VDDQ_32
VDDQ_33
VDDQ_34

Part 3 of 4

POWER

PLACE ALL THE DECOUPLING


CAPS ON THIS SHEET CLOSE
TO SB AS POSSIBLE.

SB400 SB

A30
D30
E24
E25
J5
K1
K5
N5
P5
R1
U5
U26
U30
V5
V26
Y1
Y26
AA5
AA26
AB5
AC30
AD5
AD26
AE1
AE5
AE26
AF6
AF7
AF24
AF25
AK1
AK4
AK26
AK30

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16

VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

E19
E22
E23
E26
E30
F1
F4
G5
H5
J1
J4
K4
L5
M5
P1
R5
R26
T5
T26
T30
W1
W5
W26
Y5
AB26
AB30
AC5
AC26
AD1
AF5
AF8
AF23
AF26
AG8
AJ1
AJ24
AJ30
AK5
AK25
M14
M15
M16
M17
N14
N15
N16
N17
P12
P13
P14
P15
P16
P17
P18
P19
R12
R13
R14
R15
R16
R17
R18
R19
T12
T13
T14
T15
T16
T17
T18
T19
U12
U13
U14
U15
U16
U17
U18
U19
V14
V15
V16
V17
W14
W15
W16
W17

SB400

C617
C630
0.1U

C637
0.1U

C645
0.1U

C631
0.1U

C632
0.1U

C610
0.1U

10U

C547
0.1U

C606
0.1U

C588
0.1U

C594
0.1U

C587
0.1U

C558
0.1U

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
SB400-POWER & DECOUPLING
Date:
5

Thursday, April 14, 2005

Sheet
1

15

Rev
2A
of

42

CLG

3V_S5

+3V

3V_S5

+3V

+3V

+3V

+3V

+3V

+3V

+3V

+3V

R181

R319

R180

R182

R185

R165

R443

R431

R167

R172

R444

10K

*10K

10K

*10K

*10K

10K

10K

10K

*10K

*10K

*10K

REV.B
D

12
AUTO_ON#
13,17,23 SDOUT1
12
RTC_CLK
13
SPDIF_OUT
12,20 PCI_CLK_7411
12,30
PCLK_5
12
PCLK_6
12,26 PCLK_LAN
12
PCICLK8
12,30 PCLK_591
12,17 PCLK_MINI

PCICLK4

PCICLK7
PCICLK3
PCICLK2

REQUIRED STRAPS

R160

R441

R179

R162

R166

R184

R183

R430

R186

R171

R445

*10K

10K

*10K

10K

10K

*10K

*10K

*10K

10K

10K

10K

PCI_CLK4

PULL
HIGH

PCI_CLK5

ACPWRON

AC_SDOUT RTC_CLK

SPDIF_OUT PCI_CLK_7411PCLK_5

MANUAL
PWR ON

USE
DEBUG
STRAPS

SIO 24MHz

DEFAULT

INTERNAL
RTC
DEFAULT

PCI_CLK6

PCI_CLK7

PCI_CLK8 PCI_CLK3
PCI_CLK8 PCLK_591

PCLK_6

PCLK_LAN

48MHz OSC
MODE

14MHz OSC
MODE

CPU I/F = K8

ROM TYPE

DEFAULT

DEFAULT

DEFAULT

REV.B

USB PHY
PWRDOWN
DISABLE

H,H = PCI ROM

OVERLAP COMMON PADS WHERE


POSSIBLE FOR DUAL-OP
RESISTORS.

DEFAULT

H,L = PMC LPC ROM


AUTO
PWR
ON

PULL
LOW

IGNORE
DEBUG
STRAPS
DEFAULT

EXTERNAL
RTC (NOT
SUPPORTED
W/ IT8712 )

SIO 48MHz

48MHz XTAL
MODE

14MHz XTAL
MODE

CPU I/F = P4

USB PHY
PWRDOWN
ENABLE

L,H = NORMAL LPC ROM

DEFAULT

DEFAULT

L,L = FWH ROM

Need to check
+3V

+3V

+3V

+3V

+3V

+3V

+3V

+3V

+3V

+3V

PDDACK# for A21 pull high

14,34
PDDACK#
12,17,20,26 AD31
12,17,20,26 AD30
12,17,20,26 AD29
12,17,20,26 AD28
12,17,20,26 AD27
12,17,20,26 AD26
12,17,20,26 AD25
12,17,20,26 AD24
12,17,20,26 AD23

R314

R411

R189

R478

R448

R479

R449

R424

R187

R426

10K

10K

10K

10K

10K

*10K

*10K

*10K

*10K

*10K

+3V
R168

DEBUG STRAPS

R310

R477

R188

R403

R447

R425

R429

R423

R450

R427

*10K

*10K

*10K

*10K

*10K

10K

10K

10K

10K

*10K

05/05 Modify
12
12

C395
*0.1U

U15
5
6

REQ5#
GNT5#

8
4

PDACK#
PULL
HIGH

PULL
LOW

USE
SHORT
RESET

USE
LONG
RESET

PCI_AD31

PCI_AD30

PCI_AD29

PCI_AD28

PLL CHARGE
PUMP CTRL
BIT 1 HI

PLL CHARGE
PUMP CTRL
BIT 0 HI

PLL VCO
CTRL BIT
1 HI

PLL VCO
CTRL BIT
0 HI

DEFAULT

DEFAULT

DEFAULT

DEFAULT

PLL CHARGE
PUMP CTRL
BIT 1 LO

PLL CHARGE
PUMP CTRL
BIT 0 LO

PLL VCO
CTRL BIT
1 LO

PLL VCO
CTRL BIT
0 LO

DEFAULT

PCI_AD27
BYPASS
PCI PLL

PCI_AD26

PCI_AD25

PCI_AD24
USE EEPROM
PCIE STRAPS

PCI_AD23

BYPASS
ACPI
BCLK

BYPASS IDE
PLL

USE PCI
PLL

USE
ACPI
BCLK

USE IDE
PLL

USE DEFAULT
PCIE STRAPS

USE USB
PLL

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

*1K

SDA
SCL
VCC
GND

A0
A1
A2

1
2
3

WP

*AT24C32N-10SI-2.7

BY PASS
USB PLL

SB PCIE EEPROM STRAPS

Need to check
A

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
SB400-STRAPS
Date:
5

Thursday, April 14, 2005

Rev
2A
Sheet

16

of

42

+3V

CN22

33
13

RF_LINK
RF_OFF#

D7

21SS355

REV.C
12

INTF#

12,16 PCLK_MINI
12

R474

12,16,20,26 AD31
12,16,20,26 AD29

*33

C705
*18P

REQ1#

33

12,16,20,26 AD27
12,16,20,26 AD25

R199
1K

BC0EX1

12,20,26
C/BE3#
12,16,20,26 AD23

+3V

12,20,26
12,20,26

AD21
AD19

12,20,26
12,20,26
12,20,26

AD17
C/BE2#
IRDY#

12,20,26
12,20,26

CLKRUN#
SERR#

12,20,26
12,20,26
12,20,26

PERR#
C/BE1#
AD14

12,20,26
12,20,26

AD12
AD10

12,20,26
12,20,26

AD8
AD7

12,20,26

AD5

12,20,26

AD3

12,20,26

AD1

+5V

R197
*10K
13,23
13
13,23

SYNC1
SDINB

R195

33

SDIN1

BITCLK

R198
*10K

REV.B
DEL C402, R196.

125 GND

+5V

TIP
LAN1
LAN3
LAN5
LAN7
LED_GP
LED_GN
NC1
-INTB
+3V
R(IRQ3)
GND
PCICLK
GND
-REQ
+3V
AD31
AD29
GND
AD27
AD25
(V)
-CBE3
AD23
GND
AD21
AD19
GND
AD17
-CBE2
-IRDY
+3V
-CLKRUN
-SERR
GND
-PERR
-CBE1
AD14
GND
AD12
AD10
GND
AD8
AD7
+3V
AD5
(V)
AD3
+5V
AD1
GND
SYNC
SDIN0
BITCLK
-AC_PRIMARY
BEEP
AGND
+MIC
-MIC
AGND
-RI
+5VA

RING
LAN2
LAN4
LAN6
LAN8
LED_YP
LED_YN
NC2
+5V
-INTA
R(IRQ4)
+3VAUX
-RST
+3V
-GNT
GND
-PME
(V)
AD30
+3V
AD28
AD26
AD24
IDSEL
GND
AD22
AD20
PAR
AD18
AD16
GND
-FRAME
-TRDY
-STOP
+3V
-DEVSEL
GND
AD15
AD13
AD11
GND
AD9
-CBE0
+3V
AD6
AD4
AD2
AD0
(V)
SERIRQ
GND
M66EN
SDOUT
SDIN1
-RESET
-MPCICACK
AGND
+SPK
-SPK
AGND
NC4
+3VAUX

126 GND

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

R476
10K

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

+3V

MINI PCI TYPE III SLOT


+5V
INTE#

12

PCIRST#

12,20,26,30

GNT1#

12

LANVCC

R176

R451

PCI_PME# 13,20,26 REV.B


BC0EX2 33
AD30
12,16,20,26

1K

100 AD18
AD22

AD28
AD26
AD24

12,16,20,26
12,16,20,26
12,16,20,26

AD22
AD20
PAR
AD18
AD16

12,20,26
12,20,26
12,20,26
12,20,26
12,20,26

FRAME#
TRDY#
STOP#

12,20,26
12,20,26
12,20,26

DEVSEL# 12,20,26
AD15
AD13
AD11

12,20,26
12,20,26
12,20,26

AD9
C/BE0#

12,20,26
12,20,26

AD6
AD4
AD2
AD0

12,20,26
12,20,26
12,20,26
12,20,26

SERIRQ

12,20,30

SDOUT1

13,16,23

+3V

R191
*10K

-CODEC_RST 13,23
R190
1K
R439 2
LANVCC

1 10K

MINIPCI_TYPE_III
+3V

+5V

C685
.1U/16V/0402

+5V

C697
.1U/16V/0402

+5V
C528
.1U/16V/0402

C698
.1U/16V/0402

LANVCC

C702
.1U/16V/0402

C396
.1U/16V/0402

C704
.1U/16V/0402

C701
.1U/16V/0402

C696
.1U/16V/0402

C706
.1U/16V/0402

C684
.1U/16V/0402

REV.B

1. Remove R175, Q19.


2. CN22 pin 34 connect to PCI_PME#.

C703
.1U/16V/0402

C686
.1U/16V/0402

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
Date:
5

Thursday, April 14, 2005

Rev
3A
Sheet
1

17

of

42

VADJ_R

LCD_VCC

1K

VADJ
LCDVIN

BLON

30

L31
PBY201209T-4A

BLON

+3V

VIN
Q1

+3V

LCDVCC

VADJ_R

EDIDDATA 7
EDIDCLK 7

C409

RF_LED# 28,33

C412
.1U/16V/0402

C410

C1
.1U/16V/0402

C411
DTA124EUA

.1U_0603_25V

.1U/16V/0402
R216

10K

10U/25V
LCDID2
LCDID1
LCDID0

TXLOUT0+
TXLOUT0-

TXLOUT0+ 7
TXLOUT0- 7

TXLOUT1+
TXLOUT1-

C415
100P

R507

C416
100P
7

EMI

R508

DISP_ON

4.7K

TXLOUT2+
TXLOUT2TXLCLKOUT+
TXLCLKOUT-

7,30

PWROK

+3V

TXLCLKOUT+ 7
TXLCLKOUT- 7

+3V

D
D

D
D

5
6

LCDVCC

REV.C
REV.D

DTC144EU

*1K

2
1SS355

2
1

25 mils
500mA

Q25

D19

TXLOUT2+ 7
TXLOUT2- 7

C730
.47U

REV.B

2
R215

TXLOUT1+ 7
TXLOUT1- 7

10K

5VPCU

REV.D

Q23
SI3443DV

13
13
13

C413
100P

LCDID2
LCDID1
LCDID0

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

31
32
33
34

+5V

R211

CN1

C414

C2

10U/10V

.1U

REV.B

RN45
LCDID2
LCDID1
LCDID0

LCD_CON30

1
3
5
7

2
4
6
8

3VPCU

R4

8P4R-10K
R464
33K
D9
7

R212

LCD_BLON

100K

Q4
SI3457DV

1K

BLON

Close to EC
1

LID_EC#

+3V

30

R3

2
1

D
D

D
D

5
6

1SS355

REV.B

VIN

30mils
LCDVIN

20K

CPIS_BLEN

3
4

*1K

10K

LID

7,30

SW1

1
2

R1
R214

PWROK

R213

*0

2
Q2

REV.B

30

FPBACK

DTC144EU

Q24
*DTC144EUA
1

REV.B

PROJECT : CT8

Quanta Computer Inc.

Size
B

Document Number

Date:

Thursday, April 14, 2005


7

Rev
3A
Sheet

18

of
8

42

CardBus Connector
3VSUS

5VSUS

A_VCC

30 mils

5VSUS

5VSUS

C680

.01U_0402

.01U_0402
C678
4.7U/10V

C562

C564

.1U_0603_25V

1000P

C579
10U/10V/0805
TPS_CLOCK

C669
4.7U/10V

C672

C565

R434
.1U_0603_25V

.1U_0603_25V
*43K

20
20
20

TPS_DATA
TPS_CLOCK
TPS_LATCH

TPS_DATA
TPS_CLOCK
TPS_LATCH

AVPP
A_VCC

U26-3

U26-2

A_VCC

VCCB
VCCB

D19
K19

VCCA
VCCA

A5
A11

B_CAD31/B_D10
B_CAD30/B_D9
B_CAD29/B_D1
B_CAD28/B_D8
B_CAD27/B_D0
B_CAD26/B_A0
B_CAD25/B_A1
B_CAD24/B_A2
B_CAD23/B_A3
B_CAD22/B_A4
B_CAD21/B_A5
B_CAD20/B_A6
B_CAD19/B_A25
B_CAD18/B_A7
B_CAD17/B_A24
B_CAD16/B_A17
B_CAD15/B_IOWR
B_CAD14/B_A9
B_CAD13/B_IORD
B_CAD12/B_A11
B_CAD11/B_OE
B_CAD10/B_CE2
B_CAD9/B_A10
B_CAD8/B_D15
B_CAD7/B_D7
B_CAD6/B_D13
B_CAD5/B_D6
B_CAD4/B_D12
B_CAD3/B_D5
B_CAD2/B_D11
B_CAD1/B_D4
B_CAD0/B_D3

B15
A16
B16
A17
C16
D17
C19
D18
E17
E19
G15
F18
H14
H15
G17
K17
L13
K18
L15
L17
L18
L19
M17
M14
M15
N19
N18
N15
M13
P18
P17
P19

A_CAD31/A_D10
A_CAD30/A_D9
A_CAD29/A_D1
A_CAD28/A_D8
A_CAD27/A_D0
A_CAD26/A_A0
A_CAD25/A_A1
A_CAD24/A_A2
A_CAD23/A_A3
A_CAD22/A_A4
A_CAD21/A_A5
A_CAD20/A_A6
A_CAD19/A_A25
A_CAD18/A_A7
A_CAD17/A_A24
A_CAD16/A_A17
A_CAD15/A_IOWR
A_CAD14/A_A9
A_CAD13/A_IORD
A_CAD12/A_A11
A_CAD11/A_OE
A_CAD10/A_CE2
A_CAD9/A_A10
A_CAD8/A_D15
A_CAD7/A_D7
A_CAD6/A_D13
A_CAD5/A_D6
A_CAD4/A_D12
A_CAD3/A_D5
A_CAD2/A_D11
A_CAD1/A_D4
A_CAD0/A_D3

D1
C1
D3
C2
B1
B4
A4
E6
B5
C6
B6
G9
C7
B7
A7
A10
E11
G11
C11
B11
C12
B12
A12
E12
C13
F12
A13
C14
E13
A14
B14
E14

A_D10
A_D9
A_D1
A_D8
A_D0
A_A0
A_A1
A_A2
A_A3
A_A4
A_A5
A_A6
A_A25
A_A7
A_A24
A_A17
A_IOWR#
A_A9
A_IORD#
A_A11
A_OE#
A_CE2#
A_A10
A_D15
A_D7
A_D13
A_D6
A_D12
A_D5
A_D11
A_D4
A_D3

B_CC/BE3/B_REG
B_CC/BE2/B_A12
B_CC/BE1/B_A8
B_CC/BE0/B_CE1

F15
G18
K14
M18

A_CC/BE3/A_REG
A_CC/BE2/A_A12
A_CC/BE1/A_A8
A_CC/BE0/A_CE1

C5
F9
B10
G12

A_REG#
A_A12
A_A8
A_CE1#

B_CPAR/B_A13

K13

A_CPAR/A_A13

G10

A_A13

B_CFRAME/B_A23
B_CTRDY/B_A22
B_CIRDY/B_A15
B_CSTOP/B_A20
B_CDEVSL/B_A21
B_CBLOCK/B_A19

G19
H17
J13
J17
H19
J19

A_CFRAME/A_A23
A_CTRDY/A_A22
A_CIRDY/A_A15
A_CSTOP/A_A20
A_CDEVSL/A_A21
A_CBLOCK/A_A19

C8
A8
B8
A9
C9
E10

A_A23
A_A22
A_A15
A_A20
A_A21
A_A19

B_CPERR/B_A14
B_CSERR/B_WAIT

J18
B18

A_CPERR/A_A14
A_CSERR/A_WAIT

F10
B3

A_A14
A_WAIT#

B_CREQ/B_INPACK
B_CGNT/B_WE

E18
J15

A_CREQ/A_INPACK
A_CGNT/A_WE

E7
B9

A_INPACK#
A_WE#

B_CSTSCHG/B_BVD1(STSCHG/RI)
B_CCLKRUN/B_WP(IOIS16)
B_CCLK/B_A16

F14
A18
H18

A_CSTSCHG/A_BVD1(STSCHG/RI)
A_CCLKRUN/A_WP(IOIS16)
A_CCLK/A_A16

B2
C3
E9

B_CINT/B_READY(IREQ)

B19

A_CINT/A_READY(IREQ)

C4

A_STSCHG_P
A_IOIS16#
A_A16
15
R342 REV.D
A_IREQ#

B_CRST/B_RESET

F17

A_CRST/A_RESET

A6

A_RESET

B_CAUDIO/B_BVD2(SPKR)

C17

A_CAUDIO/A_BVD2(SPKR)

A2

A_SPKR_P

B_CCD1/B_CD1
B_CCD2/B_CD2
B_CVS1/B_VS1
B_CVS2/B_VS2

N13
B17
C18
F19

A_CCD1/A_CD1
A_CCD2/A_CD2
A_CVS1/A_VS1
A_CVS2/A_VS2

C15
E5
A3
E8

A_CD1#
A_CD2#
A_VS1#
A_VS2#

B_RSVD/B_D14
B_RSVD/B_D2
B_RSVD/B_A18

N17
A15
K15

A_RSVD/A_D14
A_RSVD/A_D2
A_RSVD/A_A18

B13
D2
C10

A_D14
A_D2
A_A18

PCI7411GHK

24
23
22
21
20
19
18
17
16
15
14
13

5V_0
5V_2
5V_1
NC_3
DATA
NC_2
CLOCK
SHDN#
LATCH
12V_1
NC_0 BVPP/BVCORE
BVCC1
12V_0
AVPP/AVCORE BVCC0
AVCC0
NC_1
AVCC1
OC#
GND
3.3VIN0
RESET#
3.3VIN1

3VSUS

TPS2224A/2220A (PWR)

25

20,30 RPCICGRST#

1
2
3
4
5
6
7
8
9
10
11
12

NC

U13
C519

CN4

C743
*22P

REV.B

A_D3
A_D4
A_D11
A_D5
A_D12
A_D6
A_D13
A_D7
A_D15
A_A10
A_CE2#
A_OE#
A_A11
A_IORD#
A_A9
A_IOWR#
A_A17
A_A24
A_A7
A_A25
A_A6
A_A5
A_A4
A_A3
A_A2
A_A1
A_A0
A_D0
A_D8
A_D1
A_D9
A_D10

2
3
37
4
38
5
39
6
41
8
42
9
10
44
11
45
46
55
22
56
23
24
25
26
27
28
29
30
64
31
65
66

SKTAAD0/D3
SKTAAD1/D4
SKTAAD2/D11
SKTAD3/D5
SKTAD4/D12
SKTAD5/D6
SKTAAD6/D13
SKTAAD7/D7
SKTAAD8/D15
SKTAAD9/A10
SKTAAD10/CE2#
SKTABAD11/OE#
SKTAAD12/A11
SKTAAD13/IORD#
SKTAAD14/A9
SKTAAD15/IOWR#
SKTAAD16/A17
SKTAAD17/A24
SKTAAD18/A7
SKTAAD19/A25
SKTAAD20/A6
SKTAAD21/A5
SKTAAD22/A4
SKTAAD23/A3
SKTAAD24/A2
SKTAAD25/A1
SKTAAD26/A0
SKTAAD27/D0
SKTAAD28/D8
SKTAAD29/D1
SKTAAD30/D9
SKTAAD31/D10

A_CE1#
A_A8
A_A12
A_REG#

7
12
21
61

-SKTACBE0/CE1#
-SKTACBE1/A8
-SKTACBE2/A12
-SKTACBE3/REG#

A_A23
A_A15
A_A22
A_A21
A_A20
A_A13
A_A14
A_WAIT#
A_INPACK#
A_WE#
A_IREQ#
A_A19
A_IOIS16#
A_RESET
A_D14
A_A18
A_VS1#
A_VS2#
A_CD1#
A_CD2#
A_SPKR_P
A_STSCHG_P
A_D2

19
54
20
53
50
49
13
14
59
60
15
16
48
33
58
40
47
43
57
36
67
62
63
32

SKTAPCLK/A16
-SKTAFRAME/A23
-SKTAIRDY/A15
-SKTATRDY/A22
-SKTADEVSEL/A21
-SKTASTOP/A20
SKTAPAR/A13
-SKTAPERR/A14
0SKTASERR/WAIT#
-SKTAREQ/INPACK#
-SKTAGNT/WE#
-SKTAINT/RDY
-SKTALOCK/A19
-SKTACLKRUN/WP
-SKTARST/RESET
SKTARSVD/D14
-SKTRSVD/A18
-SKTAVS1/VS1#
-SKTAVS2VS2#
-SKTACD1/CD1#
-SKTACD2/CD2#
SKTAAUDIO/BVD2
-SKTASTSCHG/BVD1
SKTARSVD/D2

REV.B
REMOVE PCI1510 CIRCUIT AND PARTS.

SKTA/VCC1
SKTA/VCC2

17
51

SKTA/VPP1
SKTA/VPP2

18
52

A_VCC

30 mils
AVPP
C597
10U/10V/0805

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22

1
34
35
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86

GND
GND

87
88

C580

.001U_0402

ESD

CARDBUS SLOT
FOX=WZ21131-G2

PCI7411GHK

PROJECT : CT8

Quanta Computer Inc.

Size
C

Document Number

Date:

Thursday, April 14, 2005

Rev
2A
Sheet
1

19

of

42

CardBus
3VSUS
3VSUS
U26-1

12,16,17,26 AD[0..31]

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

U2
V1
V2
U3
W2
V3
U4
V4
V5
U5
R6
P6
W6
V6
U6
R7
V9
U9
R9
N9
V10
U10
R10
N10
V11
U11
R11
W12
V12
U12
N11
W13

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C/BE3
C/BE2
C/BE1
C/BE0

12,17,26
12,17,26
12,17,26
12,17,26

C/BE3#
C/BE2#
C/BE1#
C/BE0#

W4
W7
W9
W11

12,17,26

PAR

P9

12,17,26 FRAME#
12,17,26 TRDY#
12,17,26
IRDY#
12,17,26 STOP#
12,17,26 DEVSEL#

V7
R8
U7
W8
N8
W5

FRAME
TRDY
IRDY
STOP
DEVSEL
IDSEL

V8
U8

PERR
SERR

U1
T2

REQ
GNT

P5
R3
T1

PCLK
PRST
GRST

12,17,26
12,17,26
12
12
B

VCCP
VCCP

AD25

R360

100

PERR#
SERR#
REQ4#
GNT4#
PCI_CLK_7411
PCIRST#
RPCICGRST#

12,16 PCI_CLK_7411
12,17,26,30 PCIRST#
19,30 RPCICGRST#

T3

13,17,26 PCI_PME#

3VSUS

U26-5

U31

R390
10K

SCL
SDA

SUSPEND

R2

DATA
CLOCK
LATCH

N1
L6
N2

SPKROUT

L7

PCMSPK

MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6

N3
M5
P1
P2
P3
N5
R1

INTB#
12
INTD#
12
INTG#
12
SERIRQ 12,17,30
PLOCK# 12
CARD_LED 21,28
CLKRUN# 12,17,26

M3

8
7
6
5

SCL
SDA

M2

PCI7411GHK
TPS_DATA
TPS_CLOCK
TPS_LATCH

VCC
NC
SCL
SDA

A0
A1
A3
GND

1
2
3
4

SCL

R415
R529

2.7K
*2.7K

3VSUS

SDA

R420
R530

2.7K
*2.7K

3VSUS

REV.C

24LC08

TPS_DATA 19
TPS_CLOCK 19
TPS_LATCH 19

PCIXX21 Power Terminals

23

3VSUS
U26-4

REV.B
CLK_48

M1

R515

C742

22

22p

CLK48M

W3
W10

PAR

REV.C

48MHz Clock

+3V

Y9
3
2

L47

OUT

VDD

GND

OE

FCM1608K221
R407

SG-8002CA 48M

4.7K
C663

H8
H9
H10
H11
H12
J8
M7
J12
M9
M10
M12
K8
K12
N7

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

G7
G8
G13
H13
J9
J10
J11
K9
K10
K11
L8
L9
L10
L11
L12
M8

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

3VSUS

C643

C651

.001U_0402
.01U_0402
C509

C590

C616

.1U

1U_0402_6.3V

1U_0402_6.3V
C

1.5V
1.5V

M19
H1
C647

VR_EN

1U_0402_6.3V

3VSUS

H2

C554

C560

.001U_0402
.01U_0402

C636

C659

.1U

1U_0402_6.3V

3VSUS

PCI7411GHK

C649

L48
0

.01U_0402

.01U_0402
C383
.1U

REV.B

C660
.1U

U26-6
W17

NC

TEST0
3VSUS

RI_OUT/PME

T19

P12

VCO_LF

PCI7411GHK
13

R391

RI#

*0

PCI7411GHK
PCIRST#

R402

RPCICGRST#

C754

C755

*.1U

*.1U

3VSUS

EMI

PCI_CLK_7411

U26-10
A_USB_EN

REV.C
R315
*22

B_USB_EN

C505
*22P

REV.B

1.
2.
3.
4.
5.
6.

E2

R387

*10K

E1

R388

*10K

PCI7411GHK

Change R402 from no stuff to 0 ohm.


Remove R392, Q36.
U26 pin T3 connect to PCI_PME#
Add RC circuit on CLK48M.
Change R407 to 4.7k.
Change L48 to 0 ohm.

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
Date:
5

Rev
3A

Thursday, April 14, 2005

Sheet
1

20

of

42

CARD POWER CONTROL

VCC_XD
MS_BS_SD_CMD_SM_WEZ
SM_REZ
SD_WP_SM_CEZ
SM_RBZ

U26-8
MC_PWR_CTRL_0# F1
F2

MC_PWR_CTRL_0
MC_PWR_CTRL_1

REV.B

SD_CDZ
MS_CDZ
SM_CDZ

SD_CD
MS_CD
SM_CD

E3
F5
F6

MS_CLK/SD_CLK/SM_EL_WP
MS_BS/SD_CMD/SM_WE
MS_DATA3/SD_DAT3/SM_D3
MS_DATA2/SD_DAT2/SM_D2
MS_DATA1/SD_DAT1/SM_D1
MS_SDIO(DATA0)/SD_DAT0/SM_D0

G5
F3
H5
G3
G2
G1

SD_CLK/SM_RE/SC_GPIO1
SD_CMD/SM_ALE/SC_GPIO2
SD_DAT0/SM_D4/SC_GPIO6
SD_DAT1/SM_D5/SC_GPIO5
SD_DAT2/SM_D6/SC_GPIO4
SD_DAT3/SM_D7/SC_GPIO3
SD_WP/SM_CE

J5
J3
H3
J6
J1
J2
H7

SM_REZ
SM_ALE
SM_D4
SM_D5
SM_D6
SM_D7
SD_WP_SM_CEZ

R421
R383

SM_CLE/SC_GPIO0
SM_R/B/SC_RFU
SM_PHYS_WP/SC_FCB

J7
K1
K2

SM_CLE
SM_RBZ_B

R375

MS_CLK_SD_CLK
MS_BS_SD_CMD_SM_WEZ
MS_DATA3_SD_DAT3_SM_D3
MS_DATA2_SD_DAT2_SM_D2
MS_DATA1_SD_DAT1_SM_D1
MS_DATA0_SD_DAT0_SM_D0

R499
R406

22
22

0
0

REV.B

SD_CLK
MS_CLK

REV.C
D

VCC_XD

C725
0.1U

5. ADD R516, R517, R518,


R519.
0

10K
10K
2.2K
2.2K

REV.B

1. Remove R397, D16, R489.


2. Add a Quick Switch U34 to
isolate clock.
3. Change R501 to 0 ohm.
4. CN5 pin 35, 43 connect to
the same net.

XD-RE#
XD-ALE

R516
R517
R518
R519

C726
0.1U

C727
0.1U

C728
0.1U

REV.B

XD-CLE
R531

REV.C

0
3VSUS

3VSUS
PCI7411GHK
5

R499,421,383,375 move to chip side.


5VSUS
L2

VCC_XD

SM_CDZ

3VSUS
K5
K3
K7

SC_DATA
SC_OC

L1
L3

R500
R389

10K

43K

XD-WP#

SEL

COM

REV.C
2

R532

*10K

VCC

IN_B1

IN_B0

A
B

GND
MS_CLK

SM_RBZ_B

8.2K

ORGND

Q35
U36
*NC7SZ58

MC_PWR_CTRL_0#

GND
*NC7SB3157

VCC_XD

VCC_XD

22
22
22
0
22
22
22

SD-DAT1
SD-DAT0
SD_CLK
SD-CMD
SD-DAT3
SD-DAT2
MS-BS
MS-DATA1
MS-DATA0
MS-DATA2

MS_BS_SD_CMD_SM_WEZ
MS_DATA3_SD_DAT3_SM_D3
MS_DATA2_SD_DAT2_SM_D2
MS_BS_SD_CMD_SM_WEZ
MS_DATA1_SD_DAT1_SM_D1
MS_DATA0_SD_DAT0_SM_D0
MS_DATA2_SD_DAT2_SM_D2
MS_CDZ
MS_DATA3_SD_DAT3_SM_D3

R490
R491
R492
R493
R495
R496
R497
R498

22

MS-DATA3
MS_CLK

SM_D4
SM_D5

R455
R453

0
0

XD-D4
XD-D5

XD-D6
XD-D7

R440
R433

0
0

SM_D6
SM_D7

23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46

D14
SD_CDZ

SM_RBZ
XD-RE#
XD-CE# R416

R457
R461
R460
R472

0
0
0
0

MS_DATA3_SD_DAT3_SM_D3
MS_DATA2_SD_DAT2_SM_D2
MS_DATA1_SD_DAT1_SM_D1
MS_DATA0_SD_DAT0_SM_D0

R463

MS_BS_SD_CMD_SM_WEZ

CLOSE TO XD
SOCKET

R359

*100K

SD_WP_SM_CEZ
*1SS355

XD-D3
XD-D2
XD-D1
XD-D0
XD-WP#
XD-WE#
XD-ALE
XD-CLE

VCC_XD

D13
SM_CDZ

2
R494

*1SS355

22

SM_CDZ

22
22

SM/XD-D6
SM/XD-D7
SM-LVD
#SM/XD-R/B
#SM/XD-RE
#SM/XD-CE
SM-VCC
#SM-CD
SM/XD-D3
SM/XD-D2
SM/XD-D1
SM-D0
SM/XD-WP-IN
#SM/XD-WE
#SM/XD-ALE
##SM/XD-CLE
XD-CD
XD-VCC
SD-CD-COM
SD-CD-SW
SM-WP-SW
5IN1_GND
5IN1_GND
5IN1_GND

10U/10V/0805
100K

3VSUS

5IN1_GND
SM-CD-COM
SM-CD-SW
NC
SD-WP-SW
SD-DAT1
SD-DAT0
SD-CLK
SD-VCC
SD-CMD
SD-DAT3
SD-DAT2
MS-BS
MS-DATA1
MS-DATA0
MS-DATA2
MS-INS
MS-DATA3
MS-CLK
MS-VCC
SM/XD-D4
SM/XD-D5

C664

Q39
XD-WP# R501

SD_CDZ
MS_CLK

MC_PWR_CTRL_0#

REV.B

REV.C

2N7002E

REV.B
1

R487
R488

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

R396

*2N7002E

20,28 CARD_LED

CN5

SD_WP_SM_CEZ
MS_DATA1_SD_DAT1_SM_D1
MS_DATA0_SD_DAT0_SM_D0

VCC_XD
Q32

PCI7411GHK

SM_CDZ

30 mils

REV.C

REV.B

AO3403

SC_CLK
SC_RST
SC_VCC_5V

VCC
SM_RBZ

SC_CD

U34

SC_PWR_CTRL

R399

U26-9
L5

3VSUS

REV.C

TAITWUN-R007-020-N5-44P

rev.f

VCC_XD

REV.C

5 IN1 CARD READER


A

C758

C759

C760

C761

0.47U

0.47U

0.47U

0.47U

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
Date:
8

Thursday, April 14, 2005


2

Rev
3A
Sheet

of

21
1

42

IEEE 1394a

IEEE 1394 CONNECTOR


L46

R13
R14
V17
V19
T18

R0

U18

20 mils

FBM1608
1394_AVDD

C621

TPBIAS0

C567

C546
*270P

C572 C576

C508
.001U_0402

R0

.01U

R339
56.2/F

1U_0402_6.3V

C556
1U/16V

R345
56.2/F

.1U
R322
6.34K

.1U/16V/0402

R1

U19
U15

TPA0+
TPA0-

V15
W15

TPA0P
TPA0N

TPB0+
TPB0-

V14
W14

TPB0P
TPB0N

PHY_TEST_MA

R17

TPA0P
TPA0N

CML1
1
4

TPB0P
TPB0N

1
4

TPBIAS0

*MCM3216-S
L1394_TPA0+
2
L1394_TPA03
2
3

CML2
R349
56.2/F
R323

CPS

CNA

P15

CNA

REV.C

REV.D

*MCM3216-S

R353
56.2/F

CN19

R320

390K

R321

390K

1394_CONN

Closed
Phy IC

TPB0_DF

M11

4.7K

PHY_TEST_MA

CPS

L1394_TPB0+
L1394_TPB0-

R357
5.11K/F

R1
TPBIAS0

5
6

AVDD
AVDD
AVDD
AVDD
VDPLL

5
6

3VSUS

U26-7

C601
270P

C511
R19 1394_XOUT
2

22P
Y7
24.576MHZ

C510

IN

OUT

ON# SET

GND

USB0PWR
1

R18 1394_XIN

VSPLL
AGND
AGND
AGND
AGND
TPBIAS1

T17
N12
P14
U14
U16
U17

TPBIAS1

TPA1+
TPA1-

V18
W18

1394_TPA1+
1394_TPA1-

TPB1+
TPB1-

V16
W16

C693
.1U/16V/0402

1394_TPA1+ 32
1394_TPA1- 32

1
4

USBP0USBP0+

REV.B
2

C515
*270P

TPB1_DF
R325
56.2/F

8
7
6
5

GND
GND
GND
GND

Suyin_020016MR004S100ZU
1

Closed Phy IC

USB 1

CN23
1
2
3
4

USBP0-1
USBP0+1

2
3

*WCM2012-90
COM-CHOKE-WCM2012-4P
R510
0

10 mils
TPBIAS1

C513
1U/16V

C695
*Clamp-Diode

40 mils
Iout=1A

R326
56.2/F

C694
*Clamp-Diode

5VSUS

C533
270P

U24
5

IN

OUT

ON# SET

USB1PWR
1

R333
5.11K/F

REV.C

L54
13
13

1394_TPB1+ 32
1394_TPB1- 32

R335
56.2/F

100U/10V

AAT4610A

R509

R331
56.2/F

C709
C692
470P

R473
6.8K

R12
U13
V13

22P

PC0 (TEST1)
PC1 (TEST2)
PC2 (TEST3)

PCI7411GHK

U33

XI

40 mils
Iout=1A

5VSUS

1394_TPA1+
C493
.1U/16V/0402

1394_TPA1-

GND

REV.B
C484

C487
470P

R293
6.8K

150U/6.3V
2

XO

AAT4610A
R511

REV.C

CN16

L43
13
13

USBP1USBP1+

4
1

1
2
3
4

USBP1-1
USBP1+1

3
2

*WCM2012-90
COM-CHOKE-WCM2012-4P
R512
0

GND
GND
GND
GND

8
7
6
5

USB 2

Suyin_020016MR004S100ZU

REV.B
C490
*Clamp-Diode

C489
*Clamp-Diode

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
Date:
5

Rev
3A

Thursday, April 14, 2005

Sheet
1

22

of

42

For Layout:
3VSUS

Place decoupling caps near the


power pins of SmartAMC
device.

MC16
0.1U

AMCVDD
GND
MC19
0.1U
MC14

MC25

10U

0.1U

MC15
0.1U
MC39

MC27

10U

0.1U

MC35
GND

GND

0.1U

AGND
GND

MC17
0.1U

DIB_DATAN

25

DIB_DATAP

PWRCLKP
PWRCLKN

RC0603

DIB_DATAN_A

DIB_DATAN

MR24

RC0603

DIB_DATAP_A

DIB_DATAP

MR20

DIB_PWRP

PWRCLKP

MR18

DIB_PWRN

PWRCLKN

13,16,17 SDOUT1
13,17
SYNC1
13,17 -CODEC_RST

MODEM_PRES
13
MR13
*0
13,17

GND

SDINA
BITCLK

20

AC_ONLY

33

RC0603

SDATA_IN0

21

SDATA_IN0

MR9

33

RC0603

BIT_CLK0

22

BIT_CLK

ID0

11

ID0#

ID1

12

ID1#

MR16 *0

GND
GND

MR11
*10K

MR12

24,32,33 MUTE_LED
RC0603

330

EAPD_1

14

PC_BEEP
MR8
*0

Populate RX152 in order


to enable the audio codec
only feature of the
SmartAMC device

SDATA_OUT
SYNC
AC_RESET#

MR14

MR17 *0

MR10
*10K
RC0603

15
16
17

45
13

R307
*10K

MC24

10U

1U

MR26
*3K

MC21 10U

CD_IN_R
CD_IN_GND
CD_IN_L

32
31
30

LINE_IN_L
LINE_IN_R

27
28

LINE_OUT_L
LINE_OUT_R
HP_OUT_L
HP_OUT_R

39
40
42
43

REF_FLT
VC_SCA
VREF_SCA

38
37
36

MBIAS/AVDD

34

S_PDIF

46

GPIO_4

47

GPIO_5

48

XTLO
XTLI

24
25

EAPD
PC_BEEP
DSPKOUT

MIC_BIAS 24

AGND

29

CX20468-31

CDAUDL

C595

1U/16V

CDINL2

CDAUDR

C614

1U/16V

CDINR2

CDGND

C583

1U/16V

CDGND1

REV.B
MIC1

24

AMPL
AMPR

24
24

R351
10K

CDAUDR
CDGND
CDAUDL
LINEINL_PR
LINEINR_PR

T141
T142

AGND

2
6
9
19
26

R374
20K

AGND

34

CDINR2

34

CDGND1

34

R363
20K

AGND

T4
T2
REF_FLT
VC_SCA
VREF_SCA

For Layout:

MIC_BIAS

Place CX132, CX133, CX135,


CX136 near SmartAMC
device

REV.B
SPDIF
GPIO_4

MR30

32

10K
97DOCK_OK 24

XTLO

MR31

*10K

MC33

MC38

MC36

MC40

0.1U

0.1U

0.1U

1U

AGND
AGND

EC_MUTELED
MR15

XTLO_1

33
MC13
22P

GND

MY2

REV.B
AGND

MC18
22P

24.576MHZ
2

GND

CDINL2

44

33
AVDD33

AVDD44

23

MC30

0.1U

MIC_BIAS

MIC_IN

MU3

GND

MC26

MC20
150P

REV.B
MR27
0

35
41

25

25

RCOSC1

GNDC2
GND8
GNDC9
GNDC19
AVSS_CLK

1
2
25

15:20:15 to other signal 50

GND
MC23
150P

AGND35
AGND41

RC_OSC

VDD_CLK

5
VDD5

MR28
249K
RC0603

VDDC18
VDDC10

For Layout:
Place these resistors close
to SmartAMC device.

15:5:15 to other signal


50

18
10

GND

FROM CD-ROM

AGND

GND
XTLI

Ground Tie

BITCLK

MR7
0

REV.B

For Layout:

C518
*22P
GND

For EMI request

AGND

+3V

Place crystal and associated


circuitry very near
SmartAMC Device.
C506

PC SPEAKER

D21
2

.1U_0603_25V

20

PCMSPK

13

SPK

PCBEEP1

R317
U25
TC7SH86FU

CX20468-21: ADD
R20, MR8
REMOVE
MR12, R413, D24, MR30, MR31

REV.D
1

REV:B SETTING

1SS355
PCBEEP2
*1K

PC_BEEP
C507 .47U

REV.D

CX20468-31:

R308
10K

C503

R309

*1000P

1K

ADD
MR12, R413, D24, MR30
REMOVE
R20, MR31, MR8

CX20468-31 without software EQ:


ADD
MR12, MR31, MR30
REMOVE
R413, D24, MR8, R20

REV.D

PROJECT : CT8

Quanta Computer Inc.

Size
C

Document Number

Date:

Thursday, April 14, 2005

Rev
2A

20---AC97 CTRL_CONEXANT20468-31
Sheet

23
8

of

42

AUDIO AMPLIFIER

L49
BK2125HS220_0805

2 .47U

C662 1

2 .47U

10
6
5

LIN+
LHPIN
LLINEIN

C666 2

1 4.7U/6.3V/CC0603

11

BYPASS

*1K
1K
10K
*10K

2
3

AGND

R395

R337

2 *.1u

C752 1

2 *.1u

C753 1

2 *.1u

1
24
13
12
25
26
27
28
29
30
31
32
33

GAIN0
GAIN1

53398-0410
AGND

AGND
L50
BK1608HS241-T

R366

10K

L_SPK-

AMCVDD

C392

VOLMUTE# 30

C390

180P
D18

180P

Q41
DTC144EUA

RB500

MUTE_LED 23,32,33

AGND

REV.D

AGND

0312 Gain Table

AGND
C751 1

22

GND4
GND3
GND2
GND1
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13

180P

L_SPK+

REV.C

DOCK_OK

180P
L51
BK1608HS241-T

TPA0312
PWP24

REV.C

SHUTDOWN

AGND

*.1U

GAIN0
0
0
1
1
X

+5V

SE/BTL
0
0
0
0
1

AMCVDD

U28
GMT_G910T21U

AV(inv)
6 dB
10 dB
15.6 dB
21.6 dB
4.1 dB

3
C592
.47U

Vin

800mA (30MIL)

Vout

C578

C584
.01U/50V

C585
.1U_0603_25V

+
T10U/10V
2

AGND

GAIN1
0
1
0
1
X

R413

15
17

.1U/16V/0402

C757

*.1U

AGND

C577
4.7U/10V

*0

R338

14

SE/BTL
HP/LINE

R408
15K

AGND

R240

PC-BEEP

C665

C756

R382
15K

C652 1

R358
R364
R365
R368

+5VAMP

4
3
2
1

AGND

RLINEIN
RHPIN
RIN+

EMI

C394

RLIN-1
RLIN-2

.47U

.047U
C620

L_SPK+
L_SPK-

C397

LIN-1 C644

4
9

1K

LOUT+
LOUT-

PVDD1
PVDD2

23
20
8

GND

R381

AMPL

7
18

23

R_SPK+
R_SPK-

AGND

21
16

.47U

ROUT+
ROUT-

VDD

AMPR

AGND
RRIN-2
RRIN-1

CN21

L52
BK1608HS241-T

+5VAMP
R_SPK+

23

RIN-1 C635

1K

L53
BK1608HS241-T
R_SPK-

AGND

U29
19

.047U
C608
R378

C658
22U_1206_16V

C648

.1U_0603_25V

10U_1206_10V
C656
+

SPEAKER OUT

+5VAMP

C661
4.7U/10V

R372
15K

.01U/50V
C657

C640

.1U_0603_25V
AGND

+5V
+5VAMP

AGND

AGND

AGND

AGND

2ND HEADPHONE OUT


LSPK+

R202

RSPK+

R200

*30-0805

LSPK+_2

*30-0805

RSPK+_2

C404

1
2
6
3
4
5

C403

*180P

9
7
8

PAVILION

10
CN24
*PHONEJACK-BLACK

*180P

MICROPHONE
FCM1608K221
L30

AGND

23
32

+5VAMP
AMCVDD

MIC1
MIC_PR

R205

1
2
6
3
4
5

1K

C408 220P_0603_50V

97DOCK_OK

1
RB501H

PAVILION

R209

*4.7k

R208

4.7k

C405

7
8
10
CN26
PHONEJACK-BLACK

AGND

AGND

PRESARIO
AGND

R151

23

R480

MIC_BIAS

C707
2

D8

DOCK_OK

2K

R207
220K

23

32 JACK_DETECT#

Q20
DTA124EU

R206
220K

R204

R398

3K

PC99 SPEC.

4.7U/6.3V/CC0603

AGND

1U/16V
AGND

HEADPHONE OUT
R_SPK+ C699
32

D_LSPK+
L_SPK+ C700

100U/6.3V LSPK+

R201

30-0805

LSPK+_1

32
D

100U/6.3V RSPK+

R203

30-0805

RSPK+_1

D_RSPK+
R193

R194

C406

C407

1K

1K

180P

180P

1
2
6
3
4
5

PAVILION
PRESARIO

7
8

10

CN25
PHONEJACK-BLACK

PROJECT : CT8

Quanta Computer Inc.


Size

Document Number

Date:

Thursday, April 14, 2005

AGND
1

Rev
3A

AUDIO AMP_ TI-TPA0312


5

Sheet

24
8

of

42

REV

Description

Date

00

Initial Release

February 14, 2002

01

27mmx27mm form factor.

July 5, 2002

02

6 pins J1 connector-T/R traces for specific uses-100V C902/C904

September 24, 2002

Vdd

REV:B MODIFY FOR USE


NEW MODEM MODULE

Revision History

MC978

0.1uF

MTP58

MTP59

DGND_LSD

MTP36

MTP37

MTP35

MTP38

MTP39

November 12, 2002

Removed J1B. Change size for C978, C984, R902, R904, R906, R908,
R910 and R978. Changed BR904 and BR906 to different manufacture.

November 26, 2002

NC2

25

NC3

29
Corrected error in Q904 PCB footprint.

08

1M TAC1/TIP

RAC2

19

TAC2

18

PADDLE

AC

MR904

0.033uF/100V

MC906
*470pF

MMBD3004S

GND
MC908
*470pF

MU902
TRDC

November 06, 2003

12

MTP34
TRDC

MR906

6.8M
MTP40

MBR906
MMBD3004S
TIP_2

MJ2
1
2

AGND_LSD

AGND_LSD
September 24, 2003

MTP41

MBR904
MC904

January 3, 2003

Added DIB data transformer footprint, added MC966, deleted ring


impedance circuit. Added the letter "M" prefix to all reference
designators.
Changed value for MC966 from 3.3nF to 10nF, 100V, +/-20%, Y5V. By
default, MC966 will be populated. Also, changed CX20493 revision from
11 to 21.

07

TAC1

AC

06

20

RING_1

MMZ1608D301B

Change J1 & J1B. Change R938 size. Add TP60 to TP71.

05

TAC1

0.033uF/100V

KU10S31N

04

RAC1

NC1

22

MC902

1M RAC1/RING

October 9, 2002

MR902

DVdd

24
add J1B - remove T903

03

RAC1

MRV902

MFB902

RING_2

21

MFB904

*FI-S2P-HF(JAE)

TIP_1

MTP42

MMZ1608D301B
MC918

MTP33

2 MC966
0.01U

0.1uF

MTP28

MTP29

CLK2

MTP26
BR908_CC

MMZ1608D301B
AC1
PWRCLKP

1
2
3
4
5
6
7
8

MTP23

GPIO1

CLK

MC930

MC928

2.2uF

0.1uF

C928, C930 must be


placed near pins 2
(AVdd) and 6
(AGnd).

RBias

23

DIB_DATAP

RBias

MTP69

59.0K

VZ

10

VZ

EIO

17

EIO

AGND_LSD

MC922

10pF

MC924

10pF

DIB_P2

27

DIB_P

DIB_N1 MR924

DIB_N2

28

DIB_N

EIF

16

EIF

TXO

14

TXO
TXF

TXF

13

DC_GND

15

MT922
4

MC910
0.047uF/100V

BRIDGE_CC

MQ902
MMBTA42
MTP31 1

MTP67

MQ904
SB29003
1

DGnd

23

MQ906
MMBTA42

MTP66

MR928
27
B

MTP64
1

MTP49

MTP65
MR938
110

C944, C974, and C976


must be placed near
pins 3 (Vc) and 4
(VRef).

2
3
*MID82157(omit)
Depending of the design target and DIB length,
DIB components can be:
-C922/C924 10pF
-C922/C924 47pF (Validation in progress)

20493-21
DGND_LSD

MTP62

Vref_LSD

DIB_DATAN

VRef

1
23

MTP61
Vc

MTP73

MTP32

Vc_LSD

DIB_DATAN

27
27

AGND_LSD

MR922

DIB_P1

RING_1
TIP_1

MTP68
MR908
348K
R908 must be placed
near pin 10 (VZ).

AGnd

MTP60

MTP25

*HEADER8 (omit)

AVdd

GND

1
MTP72

MTP71

RING_1
TIP_1

DIB_DATAP

1
2
3
4
5
6
7
8

MR954

MJ3
1
2
3
4
5
6
7
8

RXI-1

PWR+

MTP24

*HEADER8

C970 must be
placed near pins 7
(PWR+) and 6
(AGnd).

MTP27

MBR908
BAV99DW

2
3 PCLK
MID82154

26

0.1uF

AGND_LSD

R910 must be placed


near pin 9 (RXI).

MC970
A1
A2

AC2

C1
C2

MT902 BR908_AC1
4
MC962
47pF

1
2
3
4
5
6
7
8

PWRCLKP

MTP70

MR910
237K

RXI

Vdd

MTP30 1

PWRCLKN

1
23

PWR+

MFB906

PWRCLKN

MTP22

MJ1

CLK
10pF

MC926

1
23

C906 and C908 must be Y3 type


Capacitors for Nordic Countries only

15nF
AGND_LSD

C926 must be placed


near pin 26 (CLK).

MR932
15K

RXI

MC958

EIC

MTP52
C

EIC

11

AGND_LSD

AGND_LSD

MTP63
AGND_LSD

REV:B MODIFY
MC974
*0.001uF (omit)

C922, C924, C906, and C908, must be Y3 type Capacitors in order


to comply with Nordic Countries deviations of IEC60950 2nd and 3rd ed.
Y3 type capacitors must also be certified for a 2.5KV impulse test.
This must be checked in vendors' specifications (see AVL).

MC944

MC940

0.1uF

1uF

DEL L9 / L10 / RV1 / C458

MC976
.001uF

C940 is X5R ceramic.


AGND_LSD

Circuit traces for C922 and C924 should be less


than 2 inches.
A

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
22---MODEM
Date:
5

Rev
1A

(DAA)

Thursday, April 14, 2005

Sheet
1

25

of

42

DVDD33
AVDDL
DVDD
AVDD25
AVDDH

8100CL(10/100M)

8110SB(1G)

3.3VD
26,41,56,71,84,94,107
3.3VA
3,7,20
2.5VD
32,54,78,99
2.5VA
12
NC

3.3VD
26,41,56,71,84,94,107
2.5VA
3,7,20,16
1.8VD
32,54,78,99,24,45,64,110,116,126
NC

3.3VA
10,120

R156

REV.D

10K

REV.B

5V_AL

3.6K
1

Q17
SI3443DV
R142

10K

REV.D
REV.C
REV.B

C385 2
1
.47U

D
D

D
D

5
6

27

LANVCC

XTAL2

CS
SK
DI
DO

C363

5.6K

27P

GND
EESK
DVDD
EEDI/AUX
EEDO
LANVCC
EECS

R327

8
7
6
5

VCC
NC
NC
GND

R370

*0

C613
.1U/16V/0402

GND

93C46-3GR
AD[0..31]

TX0P
TX0N

27
27

TX1P
TX1N

12/11 FROM FAE


for 8110SB

R343

*0
V_12P
GND

Q30
L45
PBY201209T-4A

CTRL25 1
*2SB1188

REV.C

LANVCC

C536

AVDDL

12

Q34
2SB1197K

Q29

12/5 FROM FAE

AVDDL
GND
GND
ISOLATEB
DVDD
INTC#
LANVCC
PCIRST#
PCLK_LAN
GNT2#
REQ2#

INTC#

DVDD
AD31
AD30
GND
AD29
AD28
GND

DVDD

AD2
VSSPST
GND
VDD18
AD3
AD4
AD5
AD6
VDD33
AD7
CBE0B
VSSPST
AD8
AD9
M66EN
AD10
AD11
AD12
VDD33
AD13
AD14
VSSPST
GND
AD15
VDD18
CBE1B
PAR
SERRB
SMBDATA
GND
SMBCLK
VDD33
PERRB
STOPB
DEVSELB
TRDYB
VSSPST
CLKRUNB

39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

C539
.1U/16V/0402

C534
.1U/16V/0402

C615
.1U/16V/0402

C600
.1U/16V/0402

C517
.1U/16V/0402

*.1U/16V/0402

22U/10V/0805

C650

3
C596

2
C639
*.1U/16V/0402

C654

C538

C619
*.1U/16V/0402

*.1U/16V/0402

*.1U/16V/0402

R502

30 mils

PCLK_LAN

REV.B

AVDDH

R367
*22
R347

1K

15K

12,16,17,20 AD[0..31]

2 CTRL25
*2SB1188

20 mils

R373

12,17,20,30 PCIRST#
12,16 PCLK_LAN
12
GNT2#
12
REQ2#
13,17,20 PCI_PME#

REV.B

CTRL18 1

+3V

REV.B

.1U/16V/0402

C586
.1U/16V/0402

C573
.1U/16V/0402

C549

AVDDL

MDI0+
MDI0AVDDL
VSS
MDI1+
MDI1AVDDL
CTRL25
VSS
AVDDH
HSDAC+
HSDACVSS
MDI2+
MDI2AVDDL
VSS
MDI3+
MDI3AVDDL
VSSPST
GND
ISOLATEB
VDD18
INTAB
VDD33
RSTB
CLK
GNTB
REQB
PMEB
VDD18
AD31
AD30
GND
AD29
AD28
VSSPST

R354

12,17,20 C/BE3#
12,17,20 AD16

R405

AD2
GND
GND
DVDD
AD3
AD4
AD5
AD6
LANVCC
AD7
C/BE0#
GND
AD8
AD9
M66EN
AD10
AD11
AD12
LANVCC
AD13
AD14
GND
GND
AD15
DVDD
C/BE1#
PAR
SERR#

C/BE0#

R109

12,17,20

*15K

C/BE1#
PAR
SERR#

12,17,20
12,17,20
12,17,20

PERR#
STOP#
DEVSEL#
TRDY#

12,17,20
12,17,20
12,17,20
12,17,20

T152
T156

LANVCC
PERR#
STOP#
DEVSEL#
TRDY#
GND
+3V
Q40

2N7002E

CLKRUN# 12,17,20

REV.B

IRDY#
FRAME#
C/BE2#

100

PCLK_LAN-1
*0

102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65

AD27
AD26
LANVCC
AD25
AD24
C/BE3#
DVDD
AD_16
AD23
GND
AD22
AD21
GND
GND
AD20
DVDD
AD19
LANVCC
AD18
AD17
AD16
C/BE2#
FRAME#
GND
IRDY#
DVDD

LANVCC

.1U/16V/0402

10U/10V

C729

AVDDL
GND

30 mils

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38

27
27

RTL8110S(B)/8100C

C653

C375

C380
.1U/16V/0402

C373

.1U/16V/0402

C641

.1U/16V/0402

C598

.1U/16V/0402

C367
.1U/16V/0402

.1U/16V/0402

C512

C682
10U/10V

10U/10V

C516

R328
*0

*.1U/16V/0402

EMI

*.1U/16V/0402

C557

AVDDH

AD27
AD26
VDD33
AD25
AD24
CBE3B
VDD18
IDSEL
AD23
GND
AD22
AD21
VSSPST
GND
AD20
VDD18
AD19
VDD33
AD18
AD17
AD16
CBE2B
FRAMEB
GND
IRDYB
VDD18

U8
TX0P
TX0N
AVDDL
GND
TX1P
TX1N
AVDDL
CTRL25
GND
AVDDH

VSS
RSET
VDD18
CTRL18
LG2
HG
XTAL2
XTAL1
AVDDH
VSSPST
GND
LED0
VDD18
LED1
LED2
LED3
GND
EESK
VDD18
EEDI
EEDO
VDD33
EECS
LWAKE
AD0
AD1

128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103

DVDD

Y3
25.0000MHz

LANVCC

.1U/16V/0402

C739

For
8110SB

.1U/16V/0402

C738
.1U/16V/0402

C737

C736

27P

LANVCC

.1U/16V/0402

.1U/16V/0402

1
2
3
4

For CTL8110
R327 is 2.49K
GND
RSET
DVDD
CTRL18
GND
GND
XTAL2
XTAL1
AVDDH
GND
GND

3
AVDDL

LAN_LINK#

1
1

DTC144EU

REV.B

C364

XTAL1

Q18

LANVCC

U27

LANVCC

EECS
EESK
EEDI/AUX
EEDO

27 LAN_SPEED_LED#

3VAUXON

R341
2

3VPCU

30

AD0
AD1

12,17,20
12,17,20
12,17,20

0
C611
*22P

AD[0..31]

C568

*.1U/16V/0402

V_12P

For
8100CL

PROJECT : CT8

Quanta Computer Inc.

Size
C

Document Number

Date:

Thursday, April 14, 2005

Rev
3A

RTL8100CL
Sheet

26

of

42

Close to Chip
C532
.1U/0402

8100CL: 0.1U
8110SBL:
0.01U

C537
.1U/0402

R329
49.9/F

R332
49.9/F

R334
49.9/F

R340
49.9/F
TX1N

U4
26
26

TX0P
TX0N

26
26

TX1P
TX1N

CT1
TX0P
TX0N

6
7
8

CT
TD+
TD-

TX1P
TX1N
CT2

1
2
3

RD+
RDCT

TX1P
CT
TX+
TX-

11
10
9

LANCT1
X-TX0P
X-TX0N

RX+
RXCT

16
15
14

X-TX1P
X-TX1N
LANCT2

R244

R247

TX0N

75/F

75/F

X-TX0P
X-TX0N

32
32

X-TX1P
X-TX1N

32
32

TX0P

LAN_1
C458
.1U/0402
CC0402

ATPL-119
C281
1500P/2KV
CC1808

10/100M

CN14
LANVCC

R63

330

26 LAN_SPEED_LED#

REV.B

A1

LED1_YELP_Y

A2

LED1_YELN_Y

RX2-

C734
1000P

REV.C
REV.C

RX2+

RX1-

TX2-

TX2+

X-TX1P

RX1+

X-TX0N

TX1-

X-TX0P

10

TX1+

B1

11

LED2_GRNP_G

GND

15

B2

12

LED2_GRNN_G

GND

16

RING

X-TX1N

LANVCC
26

R67

330

LAN_LINK#

REV.B

Del 1G circuit.

C735
25
1000P

RING_1

13

25

TIP_1

14

TIP
LAN_CONN

C303
470P/CC1808

C318
470P/CC1808

10
BASE :OFF
100 BASE : YELLOW
1000 BASE : GREEN
LED1

APECIFICATION

A1(+)
A2(-)

YELLOW

LED2

APECIFICATION

B1(+)
B2(-)

GREEN

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
Date:
5

Thursday, April 14, 2005

Rev
3A
Sheet
1

27

of

42

5VPCU
5VPCU
R2
150

LED1
3

PWR_LED_1 1

*LED HSMB-C112 BLUE

PAVILION

LED13
PWR_LED_1

*LED HSMB-C172 BLUE


LED17-21VGC-TR8

Q3
30,33 PWR_LED

LED HSMD-C170 ORANGE

POWER
1

150
2

PAVILION

2
R484

DTC144EUA

LED HSMB-C172 BLUE

LED9

*HSMB-C112 BLUE
R485
150

LED11
1

30

MBATLED0

1
2

PAVILION

HSMD-C110 ORANGE

LED7
1

LED HSMD-C110 ORANGE

LED6

PRESARIO

DTC144EUA

PRESARIO

2
HSMD-C110 ORANGE

Q37

PRESARIO

HSMD-C110 ORANGE

30,33

MX7

SW3

MY3

Q31

20,21 CARD_LED

1
3
5

2
4
SW5

REV.B
C

R93
150

LED3
1

TP_LED

PAVILION

2
DTC144EUA

1
3
5

PAVILION

5VSUS

*LED HSMB-C172 BLUE

REV.B: LED7 AND LED8 SWAP

LED4

TP_R#

LED HSMD-C112 BLUE


2

*LED HSMB-C172 BLUE

30,33

30

TP_R#

DTC144EUA

Q15

33

2
4

R350
150

LED5

Touchpad control

PAVILION

PRESARIO

2
LED HSMD-C170 ORANGE
HSMD-C110 ORANGE
LED8

2
4

PRESARIO

+3V

PRESARIO

SW7

1
3
5

R486
150

LED12
34

IDELED#

3
Q38
DTC144EUA

PAVILION

*LED HSMB-C112 BLUE

TP_L#

TP_L#

2
4
SW4

R55
150

LED2

1
3
5

PAVILION

33

Q11
CAPSLED

DTC144EUA

30

LED HSMD-C170 ORANGE

2
4
SW6

1
3
5

PRESARIO

R483
150

LED10
18,33

RF_LED#

2
LED HSMB-C112 BLUE

+5V

PRESARIO

REV.B

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
Date:
5

Thursday, April 14, 2005

Rev
2A
Sheet
1

28

of

42

8Mbit (1M Byte), TSSOP40


D

D[0..7]

U12

30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30

ENV0
ENV1
BADDR0
BADDR1
TRIS
SHBM
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

30
30
30

CS#
RD#
WR#

ENV0
ENV1
BADDR0
BADDR1
TRIS
SHBM
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

CS#
RD#
WR#

22
24
9

CE#
OE#
WE#

D0
D1
D2
D3
D4
D5
D6
D7

25
26
27
28
32
33
34
35

RESET#/NC
RY/BY#/NC
NC1
NC2
NC3

10
12
29
38
11

VCC
VCC

31
30

30

D0
D1
D2
D3
D4
D5
D6
D7
R394

*100K

3VPCU

C638
*.1U/16V/0402

3VPCU
C646
.1U/16V/0402

GND
GND

23
39
C

*ST Micro M29W008AB/AMD-29LV081B/SST39VF080

AMD :Pin 10 is RESET# ; Pin12 is RY/BY#


SST :Pin10,12 are NC

1.AMD-29LV081B require MAX 500nS Tready for it's hardware


reset.And MAX6326_UR29 has >100mS reset timing.So we can tie
it's reset# pin to +3VALW directly.
2.SIO has internal 20 mS delay of VCC1_PWROK

4Mbit (512k Byte), TSSOP32


U11

ENV0
ENV1
BADDR0
BADDR1
TRIS
SHBM
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17

20
19
18
17
16
15
14
13
3
2
31
1
12
4
5
11
10
6

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17

VCC

CS#
RD#
WR#

30
32
7

CE#
OE#
WE#

GND

24

D0
D1
D2
D3
D4
D5
D6
D7

21
22
23
25
26
27
28
29

D0
D1
D2
D3
D4
D5
D6
D7

A18

A18

REV.B

3VPCU

39VF040

PROJECT : CT8

Quanta Computer Inc.

Size
B

Document Number

Date:

Thursday, April 14, 2005

Rev
2A
Sheet
1

29

of

42

3VPCU

3VPCU
3VPCU

12,17,20 SERIRQ
12 LFRAME#
12
LAD0
12
LAD1
12
LAD2
12
LAD3
12,16 PCLK_591
13

2
D6

KBSMI#

13

3VPCU

GATEA20
RCIN#

33
33
33
33
33
33
33
28,33

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

33
33
33
28,33
33
33
33
33
33
33
33
33
33
33
33
33

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15

R113

SCI#

SCI#

13
13

SERIRQ
DRQ0#
LFRAME#
LAD0
LAD1
LAD2
LAD3
PCLK_591
591RESET#
KBSMI#591
1
1SS355
SWI#2
T161

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

R170

20M

R177

120K

IOPD3/ECSCI

TINT-

105
106
107
108
109

TINT
TCK
TDO
TDI
TMS

NUMLED

110
111
114
115
116
117
118
119

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

591_32KX1

158

32KX1/32KCLKOUT

591_32KX2

160

32KX2

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

NBSWON#
ACIN
SUSB#

CS#

CS#

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

173
174
47

PORT-K
PORT-M

PORT-L

SEL0
SEL1
CLK

17
35
46
122
159
167
137

1. Remove R468.
2. Add a Diode D20 on BATLOW#.
3. R470 no stuff.

3VPCU

IRCLK
IRDATA

33

5VTP

R117
R118
RN37

3VPCU

MBCLK
MBDATA

4.7K
4.7K

TPCLK
TPDATA

2
4
6
8

PSCLK1
PSDAT1
KB_CLK
KB_DAT

R466

470K

591RESET#

C690
.1U/16V/0402

3VPCU

R467

SHBM

10K

R122

36
36

36

VADJ

18

5VPCU

PR_INSERT# 32
CELL-SET
VFAN_1
31
3VAUXON 26
CIR_OUT 32
DOCK5VON 32
RPCICGRST# 19,20
PWROKSB
T334
T335
MBATLED0 28
PWR_LED 28,33
MBCLK
3,36
MBDATA 3,36
PCIRST# 12,17,20,26

MBCLK
MBDATA

VCC
NC
SCL
SDA

A0
A1
A3
GND

1
2
3
4

*24LC08

REV.B

R471

8
7
6
5

PWROK_SB 13

07/19

LPC Debug Port


CN6

REV.B

CIR_IN
31,32
THERM_CPUDIE# 3,13

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

138
139
140
141
144
145
146
147

IOPJ0/RD
IOPJ1/WR0

150
151

RD#
WR#

SELIO

152

SELIO#

IOPD4
IOPD5
IOPD6
IOPD7

41
42
54
55

FPBACK
D/C#

IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13/BE0
IOPK6/A14/BE1
IOPK7/A15/CBRD

143
142
135
134
130
129
121
120

A8
A9
A10
A11
A12
A13
A14
A15

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1

113
112
104
103
48

A16
A17
A18
A19

MUSIC#

33

DVD#

33

SERIRQ
LFRAME#
LAD0
LAD1
LAD2
LAD3
PCLK_5
LDRQ#0
PCIRST#

PRESARIO
NBSWON# 33

DVD#

IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7

C384
*.1U

CLOSE TO U28

REV.B

T343

ENV1
BADDR0
BADDR1
SHBM

ACIN
SUSB#
LID_EC#

36
13
18

ENV0
ENV1
BADDR0
BADDR1
TRIS
SHBM
A6
A7

29
29
29
29
29
29
29
29

D0
D1
D2
D3
D4
D5
D6
D7

29
29
29
29
29
29
29
29

RD#
WR#

29
29

2
4

1
3
5

TP_LED
FPBACK
D/C#
BL/C#

28
18
36
36

A8
A9
A10
A11
A12
A13
A14
A15

29
29
29
29
29
29
29
29

A16
A17
A18
A19

29
29
29
29

12,16 PCLK_5

PAVILION

+3V

SW2

+5V

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

16
17
*EIC-3801-15

Pin 24 if no pull-high,
will can't reboot.
5VPCU

3VPCU

R459
4.7K

R462
4.7K

RP2

T332

MY4
MY5
MY6
MY7

10
9
8
7
6

1
2
3
4
5

MY3
MY2
MY1
MY0

1
2
3
4
5

MY15
MY14
MY13
MY12

IRCLK

IRDATA

10KX8
RP1
MY8
MY9
MY10
MY11

10
9
8
7
6

C688
*27PF

C689
*27PF

10KX8
R414

10K
MY16

T160

PC87541L

5VPCU

4.7K
4.7K

CC-SET

RSMRST_# 13
FANSIG
31

FANSIG

1U

R157
R169

R121

10K

T342

C691

*10K

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10

DNBSWON#591

29
T336
T162

REV.B

148
149
155
156
3
4
27
28

PORTJ-2

*0

MBCLK
MBDATA

124
125
126
127
128
131
132
133

PORT-D-2

AGND

BATLOW#

VOLME_UP#
VOLME_DN#

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO

PCICGRST# R470
PWROKSB
R409
10K

2
44
24
25

11
12
20
21
85
86
91
92
97
98

D5
2
1SS355

35,38
S5_ON
35,38,41 SUSON
35,39
MAINON
13
SWI#
40
VRON
1
D20 2
1SS355

62
63
69
70
75
76

96

13
DNBSWON#
13
BATLOW#
7,18
PWROK

MY16

33
MY16
37,38,39,40 HWPG
13
SUSC#
32
VOLME_UP#
32 VOLME_DN#
24
VOLMUTE#

C399
5P

32
33
36
37
38
39
40
43

IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46

PORT-J-1

BADDR1
MUSIC#

I/O Address
Index
Data
BADDR1-0
2E
2F
0 0
0 1
4E
4F
(HCFGBAH, HCFGBAL)+1
1 0
(HCFGBAH, HCFGBAL)
Reserved
1 1

U14

MUSIC#

PORT-I

R120

T326

26
29
30

PORT-H

GND1
GND2
GND3
GND4
GND5
GND6
GND7

C389
5P

REV.B
REV.C

99
100
101
102

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24

PS2 interface

R119

*10K

T327
T324
T325

168
169
170
171
172
175
176
1

PORT-D-1

10K

BADDR0

TEMP_MBAT 36
MBATV
36
AD_AIR
SYS_I

SWID2

IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT

32.768KHZ
B

TEMP_MBAT
MBATV

153
154
162
163
164
165

PORT-C

PORT-E

81
82
83
84
87
88
89
90
93
94

IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL

Key matrix scan

JTAG debug port

.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
Should have a 0.1uF capacitor close to every
GND-VCC pair + one larger cap on the
supply.

ENV1
C379
.1U/16V/0402

VBAT
IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

PORT-B

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

C398

161

95

.1U/16V/0402

DA0
DA1
DA2
DA3

PWM or
PORT-A

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

C378

12

SHBM=1: Enable shared memory with host BIOS

AD0
AD1
AD2
AD3
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9

DA output

Y5
591_32KX3

R141

Host interface

GA20/IOPB5
KBRST/IOPB6

VCCRTC

RESERCE FOR 97551

AD Input

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15

PSCLK1
PSDAT1
KB_CLK
KB_DAT
TPCLK
TPDATA

TPCLK
TPDATA
CAPSLED
NUMLED

31

71
72
73
74
77
78
79
80

T319
T323
T321
T322

33
33
28
33

SERIRQ
LDRQ
LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK
LREST
SMI
PWUREQ

5
6

RCIN#

10K

7
8
9
15
14
13
10
18
19
22
23

*0

R139

AVCC

U30

DRQ0#

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6

*0

VDD

R465

LDRQ#0

LDRQ#0

34
45
123
136
157
166

C400
C377
.1U/16V/0402
10U/10V/0805

16

LDRQ#(pin 8) internal is no use


12

C386
C393

C401
.1U/16V/0402

KBC-NS87541L

VCCRTC

3VPCU

+3V

Pin 103 internal is


"A19",Can't use to
GPIO

MY4
MY5
MY6
MY7

CP5
2
4
6
8

220PX4
1
3
5
7

MY8
MY9
MY10
MY11

CP4
2
4
6
8

220PX4
1
3
5
7

MY0
MY1
MY2
MY3

CP6
2
4
6
8

220PX4
1
3
5
7

MX4
MX5
MX6
MX7

CP1
2
4
6
8

220PX4
1
3
5
7

MX0
MX1
MX2
MX3

CP2
2
4
6
8

220PX4
1
3
5
7

MY12
MY13
MY14
MY15

CP3
2
4
6
8

220PX4
1
3
5
7

RN39
1
3
5
7
8P4R-10K

1
3
5
7

2
4
6
8

C671 220P

NBSWON#
DVD#
VOLME_UP#
VOLME_DN#

MY16

PROJECT : CT8

Quanta Computer Inc.

8P4R-10K

Size
C

Document Number

Date:

Thursday, April 14, 2005

Rev
3A
Sheet
1

30

of

42

C3

+5V_CRT2

CRT_R

CRT_G

20 MIL

+5V_CRT2

CN7
CRT_CONN

CRT_R

.1U_0603_25V

CRT PORT

20 mils

16

+5V

75-R as possible as
closed to SB
7

F1
FUSE1A6V_POLY
2
1

CRT_G
CRT_B

CRT_B

L2

BK1608LL680

CRT_R1

L1

BK1608LL680

CRT_G1

L32

BK1608LL680

CRT_B1
T1

R18

R13

REV.B
REV.C

R7

+5V
75

75

C6
10P

C418
10P

rev.e

6
1
7
2
8
3
9
4
10
5

C419
10P

11

CRT_SENSE# 13
D

12
13
14

+3V
D12
DA204U

15

75

AHCT1G125DCH

EMI

1
17

CRT_R1

.1U_0603_25V

C8

3
5VPCU

U1

PRESARIO

R482
*47

VSYNC

VSYNC1

R481
100K

*IRM-368

R217

R218
R219

39
39

R220

D11
DA204U
1

CRTVSYNC
CRTHSYNC

VCC
1

CIR_IN

HSYNC

D10
DA204U
HSYNC1

30,32
AHCT1G125DCH
7

CRT_G1

3
2

U2
7

Q26
1

DDCCLK
R6

4.7K

R11

4.7K

DDCCLK

2N7002E
3

C4

C5

C7

C11

22P

33P

33P

22P

1
CRT_B1

3
2

+3V

GND

DAT

IR1

C710
*4.7UF/6.3V

5VPCU

DDCDAT

DDCDAT

Q27

2N7002E
R5
6.8K

REV.D

+5V

+5V

REV.D

Q42
*DTC144EUA

Q13
U35

1
30

R522

VFAN_1

R521
3K

100k

3
2
1

D
D

D
D

5
6

SI3457DV
LMV331

30 mils

C748
1UF

5.1K

FAN_PWR1

HOLE3
H-RE315X354D110P2

REV.C

R524
10K

C321
T10U/10V

CN15
1
2
3

1
2
3
FAN

+3V

R61
10K

PAD2
EMIPAD354X157
1

PAD1
EMIPAD433X157
1

HOLE19
H-C236D110I160P2

HOLE20
H-TC236BC295D110I160P2

HOLE9
H-C236D110P2

HOLE4
H-TS315BC295D110P2

R523

+5V

1
1

1
1

1
1

1
1

HOLE8
H-C295D110P2

HOLE11
H-C236D110P2

HOLE21
H-C236D110P2

HOLE18
H-C236D110P2

HOLE10
H-C276D165P2

HOLE5
H-TC236BC295D110P2

HOLE6
H-TS315BC295D110P2

+5V

HOLE24
H-TC157D59P2

HOLE22
H-C295D110P2

HOLE1
H-TS315BC295D110P2

HOLE12
H-C295D110P2

HOLE2
H-TS315BC295D110P2

HOLE23
H-C295D110P2

HOLE7
H-TS315BC295D110P2

HOLE13
H-C295D165P2

REV.B

R10
6.8K

FANSIG

FAN CONTROL

30

C221
100P

PROJECT : CT8

Quanta Computer Inc.

Size
C

Document Number

Date:

Thursday, April 14, 2005

Rev
3A
Sheet
1

31

of

42

+3V

VA

L9
BK2125-33T

C731
.1U

REV.B

150 mils

C732
.1U

C733
.1U
L19

VA_P
5VPCU

REV.C
REV.B

REV.C
X-TX0P
X-TX0N

24

MIC_PR

24
24
30

D_RSPK+
D_LSPK+
VOLME_UP#

30

CIR_OUT

AGND
AGND

USBP4-1
USBP4+1
CIR_OUT

TVGND
0
S-CVBS1-PR
S-YD1-PR
S-CD1-PR
VOLME_DN#
30 VOLME_DN#
CIR_IN
30,31
CIR_IN
5VDOCK
.1U
C106
CC0402
L36
FCM2012K800
VA_P
R25

C423

56

55

55

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54

1
3
5
7
9
11
13
15
17
19
21
23
GND
D0+
D0DDCCLK
D1+
D1DDCDAT
D2+
D2HPD
CLK+
CLK49
51
53

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53

58

58

57

57

C424

.1U/50V

60
59

18,35,36,37,38,39,40 VIN

1
2
C437
*270P

56

.1U/50V

C708
270P

REV.C
JACK_DETECT#
SPDIF

30

3
2
1

C427
*.022U

DOCK5VON

Q9
*DTC144EUA

X-TX1P
27
X-TX1N
27
JACK_DETECT# 24
SPDIF
23
+5VAMP_PR
MUTE_LED 23,24,33
1394_TPA1+ 22
1394_TPA1- 22
C164
1394_TPB1+ 22
.1U
1394_TPB1- 22
CC0402

4
5
6

5VSUS

5VDOCK
L37

FBMJ2125HM330-T

C425
.1U
CC0402

+5V
3

U19

33

S-CVBS

S-CVBS

S-CVBS1-PR

L38

1.8UH
C429

5VDOCK
DOCK_PRESENT
C92
.1U
CC0402

VA_P

VCC

IN_B1

IN_B0

SEL

COM

PR_INSERT#
S-CVBS1

NC7SB3157

C428
100P

C435
.1U
CC0402

U20

33

S-YD

S-YD

S-YD1-PR

L12

1.8UH
C108

VCC

IN_B1

IN_B0

SEL

COM

4
2

C439
.1U
CC0402

U21
3VPCU
CIR_OUT
1

33
S-CD1-PR

C196
120P
R469
100K

3
DOCK_PRESENT 1
R51

2
0

Q10

VCC

IN_B1

SEL

COM

IN_B0
GND

*33P

3904
PR_PRESENT#

FUNCTION(COM)

LOW

IN_B0

HIGH

IN_B1

75-R as possible as
closed to SB

S-CD1

7
2

2
C441
.1U
CC0402

SEL

R232
75

S-CD1

NC7SB3157

C140
100P

S-YD1

+5V

PR_INSERT# 30

C432
120P

1.8UH
C136

PR_INSERT#
C433
120P

L13
C123
270P

VOLME_DN#
CIR_IN

S-CD

S-CD

75-R as possible as
closed to SB

S-YD1

NC7SB3157

C109
100P

R230
75

+5V
GND

*33P

C112
270P

S-CVBS1 7

+5V
GND

*33P

C430
270P

5VDOCK

CLOSE TO CONNECTOR

Q7

CN11

PR_PRESENT#

+5VAMP
C155
.1U
CC0402

*SI3443

JACK_DETECT#
SPDIF

L56
CMM211T-900M-S
R514
*0

27
27

R39
*100K

USBP4-1
USBP4+1

3
4

C86
.1U/16V/0402

2
1

USBP4USBP4+

C53
.1U/16V/0402

FBMJ2125HM330-T

+5VAMP_PR

CC0402

13
13

*0

CC0402

R513

60
59

CC0402

S-CVBS

R525

*0

S-YD

R526

*0

S-YD1

S-CD

R527

*0

S-CD1

R231
75

75-R as possible as
closed to SB

S-CVBS1

REV.C
1

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
Date:
A

Thursday, April 14, 2005

Rev
3A
Sheet
E

32

of

42

AV BOARD

KEYBOARD CONNECTOR
TOUCH PAD CONNECTOR

CN3

BK1608HS800-T
L20

12 mils

C297

5VSUS

.1U/16V/0402
CN2

30
30

TPDATA

30

TPCLK

5VTP

L23

SBK160808T-221

L22

SBK160808T-221

C329
*10P

12
11
10
9
8
7
6
5
4
3
2
1

TPDATA-1
TPCLK-1

C328
*10P

28

TP_L#

28

TP_R#

12

MX1
MX7
MX6
MY9
MX4
MX5
MY0
MX2
MX3
MY5
MY1
MX0
MY2
MY4
MY7
MY8
MY6
MY3
MY12
MY13
MY14
MY11
MY10
MY15

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

UP CONTACT

TOUCH PAD

CHECK PIN DEFINE

30
28,30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
28,30
30
30
30
30
30
30

24

REV.B
DEL CN20, C681, C677,CC673
UP CONTACT

KEYBOARD

CN8
30
NUMLED
30
NBSWON#
30
MUSIC#
30
DVD#
23,24,32 MUTE_LED

POWER BOARD

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

30
MY16
28,30 PWR_LED
RF_LED#

BLUELED

RF_LINK

DTC144EUA
1

DTC144EUA

5VPCU
+5V

17

Q6

C421
.1U/16V/0402

DAUGHTER BOARD

LFBR32164M241
RP3

DOWN CONTACT

MX0

MLB-160808-0220A

MX1

MX2

13
13

USBP2+
USBP2-

13
13

USBP5+
USBP5-

MX3

MX4

MX5

MX6

MX7

VOL DN

WIRELESS

BACK

PLAY/PAUSE

FORWARE

CN10

C420
D

20
LFBR32164M241
RP4

STOP

VOL UP

MUTE

POWER BOARD
C422
.1U/16V/0402

3VSUS

.1U/16V/0402

MLB-160808-0220A
MLB-160808-0220A
LFBR32164M241
RP5

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

L33
Q5

18,28

8
6
4
2
2
4
6
8
2
4
6
8

L34
L35
7
5
3
1
1
3
5
7
1
3
5
7

1
3
5
7
9
11
13
15
17
19

+3V

1
2
4
6
8
10
12
14
16
18
20

19

5VSUS
BT_OFF#
BLUELED

BT_OFF# 13
BC0EX1
BC0EX2
S-YD
S-CD
S-CVBS

17
17
32
32
32

TOP VIEW

C426
.1U/16V/0402

20

BT_OFF#

PROJECT : CT8
C82
.1U/16V/0402

DAUGHTER BOARD

Quanta Computer Inc.


Size
Document Number
Custom
MDC
Date:

Thursday, April 14, 2005


7

Rev
2A
Sheet

33

of
8

42

CDVCC

60 mils

L41
PBY201209T-4A
+5V

C351
C350
C353
C352
C486
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402
.1U/16V/0402 10U/10V/V

R105

CDINL2

6.8K

23

CDINR2

R101

6.8K

23

CDGND1

R104

3.4K/F CD_GND

14

SDA[0..2]

14

SDD[0..15]
SDIOW#
SDDREQ
SIORDY
SDIOR#
IRQ15
SDDACK#
SDCS1#
SDCS3#

14

PDA[0..2]

14

PDD[0..15]

14
14
14
14
14
14,16
14
14

CDAUD_R

NB_RST#

7,12 NB_RST#

14
14
14
14
14
14
14
14

CDAUD_L
CD_GND
NB_RST#
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0

CDAUD_L

PDIOW#
PDDREQ
PIORDY
PDIOR#
IRQ14
PDDACK#
PDCS1#
PDCS3#

SDIOW#
SIORDY
IRQ15
SDA1
SDA0
SDCS1#

SDA[0..2]
SDD[0..15]
CDVCC

SDIOW#
SDDREQ
SIORDY
SDIOR#
IRQ15
SDDACK#
SDCS1#
SDCS3#

R85

470 CSEL
T126
CN17

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

51
52

23

51
52

CD-ROM

+5V

CDAUD_R
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDDREQ
SDIOR#
SDDACK#
IOCS16#
DIAG#
SDA2
SDCS3#

T130
T129

CDVCC

CD.46

SDIOR#

R91

*4.7K

SDIOW#

R94

*4.7K

SIORDY

R299

4.7K

SDDREQ

R92

5.6K

IRQ15

R294

8.2K

SDD7

R98

10K

T127

CD.50

T125

CD-ROM

PDA[0..2]
PDD[0..15]
PDIOW#
PDDREQ
PIORDY
PDIOR#
IRQ14
PDDACK#
PDCS1#
PDCS3#
CN18
NB_RST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

28

IDELED#
HDD_VDD

PDDREQ
PDIOW#
PDIOR#
PIORDY
PDDACK#
IRQ14
PDA1
PDA0
PDCS1#
IDELED#

C679
*100P

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

+5V

PCSEL

R124

470

PDIAG
PDA2
PDCS3#

R138

*10K

60 mils

HDD_VDD L25
PBY201209T-4A
+5V

PDIOR#

R115

*4.7K

PDIOW#

R112

*4.7K

PIORDY

R116

4.7K

PDDREQ

R110

5.6K

IRQ14

R130

8.2K

PDD7

R100

10K

HDD_CONN
C365

HDD CONNECTOR.1U/16V/0402

C366
1000P

C368

C371
10U/10V/V

.1U/16V/0402

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
HDD
Date:
5

Rev
1A

CD-ROM

Thursday, April 14, 2005

Sheet
1

34

of

42

VIN

+2.5V

+1.8V

PR109
22B

PR116
1M

+3V

PR44
22B

+5V

PR100
22B

+15V

PR49
22B

PR58
1M

MAINON_G

37,38

MAIND

MAINON 2
2

PR115
1M

PQ16
2N7002E

PQ37
2N7002E

PQ23
2N7002E

PC67
2200P/50V

REV.B

PQ15
2N7002E

PQ44
2N7002E
1

PQ47
DTC144EUA

MAINON

30,39

MAIND

VIN

PR112
1M

1.8V_S5

3V_S5

PR101
22B

+15V

PR125
22B

PR60
1M
S5_OND

37

S5_OND

S5_ON_G

VTT_DDR

PR114
1M

1.8VSUS

PR57
22B

3VSUS

PR59
22B

5VSUS

2
PQ22
2N7002E
1

PC66
2200P/50V

PQ51
2N7002E
1

PQ38
2N7002E

PR99
22B

2.5VSUS

PR50
22B

PR56
1M

PR126
22B

SUSD

37,38

3
3

2
2

PQ52
2N7002E

PQ18
2N7002E

PQ19
2N7002E

PQ36
2N7002E

PQ21
2N7002E
1

PQ20
2N7002E
1

PC64
2200P/50V

PR113
1M

SUSD

SUSON_G

PQ46
DTC144EUA

+15V

VIN

SUSON 2

PR111
1M

S5_ON 2
PQ45
DTC144EUA

REV.B

30,38,41 SUSON

S5_ON

30,38

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
30---DISCHARGE
Date:
5

Rev
2A

Thursday, April 14, 2005

Sheet
1

35

of

42

VA

ADAPTER 18.5V 65W 3.51A VIN

1
SBM1040

PR25 10K

BATTERY CHARGER

PD2
2

From Docking CNN

REV.C

REV.B

VIN

18,32,35,37,38,39,40

VA2

PQ33
PQ24
VA3

1
PR66

SBM1040

PC75
.1U/50V

PC73
.1U/50V

10K

PL1

2P

AO4413

2P

AO4413

1
2
3
4

1P

1P

8
7
6
5

1
2
3
4

PR30
200K

0.033/1W/3720
PC18

8
7
6
5

7
6
POWER JACK

PR63

1
2
3
4
5

20 MIL TO CABLE DOCK

JP1

PD8

PL8
FBMJ3216HS480NT(6A)

PR89

PQ10
1
PC47

5VPCU

PC16

PC17

10U/25V

10U/25V

PD6

PR42 33

2N7002K
1

CSSN

PQ50

REV.B
10K/F

CSSP

2N7002E

BL/C#

BL/C#

15

16

PR12

PR13

100K

2.61K/F

REV.C
ICTL

REFIN

ACOK

ACIN

ICHG

GND

CCV

CCI

CCS

REF

CLS

LDO

DCIN

GND

MAX1772EEI

Battery Low 7.5V

PR14
PU1

30

PQ48
2N7002E

37.4K/F

VCTL

17

PR118

CELLS

18
CSIN

BATT

CSIP

19

20

21
DLO

23

24

25

22
DLOV

PR39
12.4K/F

LX

INP

PR119
100K

DHI

SYS_I

26

REF4.096
30

BST

27

LMV331

VA

PR15
100K

CSIN

CSSN

1772_5.4V

CSIP

PC32
1U/10V/X7R

CH501H-40

30

PC26
.1U/50V

.1U/50V

28

REV.B

PR120
47K

PU8

D/C#

S2

G2

G1

S1D2

PC29
.1U/50V

CSSP

D/C#

PC98

PR22
4.7

47.5K/F

SW1010C

REV.B

PC100
MBAT+

10U/25V

1
PD16

1P

PR24
4.7

PC34
1772_5.4V

PR117

2P

1P

PC19

PQ11

3VPCU

FBMJ3216HS800

0.05/1W/3720

PGND

3VPCU

REV.C

.047U/50V

.1U/50V

VIN

PL4

PC38

1
3VPCU

PC37

4.7

.1U/50V

15uH/4.4A/CDRH104R 2P

10U/25V

PD1
CH501H-40

10U/25V

4.7

PC99

PQ8

SI4814
0.47U/25V

PC44

10K
100K

.1U/50V

PR32

PR43

PR11
ACOK

PR31
100K

10U/25V

PR38

PL10

DTA124EUA
3

D1

FBMJ3216HS480NT(6A)

VA2

REV.B

PR61

ACOK

75K/F

1772_5.4V

14

13

12

11

10

1772_5.4V

PC101

PR23

75K/F
3

2
1

3
1

PR122
1M

PR36
15K
PC144
1U/25V

121K/F

12,18,26,29,30,32,37

CELL-SET
HI = LDO = 4 CELL

CC-SET = 1.05V/A

LOW = LDO/2 = 3 CELL

CC-SET

CC-SET 30

10K

REV.B

REV.C

PC25

PR17

.01U/50V

100K/F

.01U/50V

REF4.096

ACIN

1U/10V/X7R

REV.D
ESD

12.4K/F

CH501H-40

PR62
3VPCU

PR35

10K

PR127
30

2N7002K

.01U/50V

13.7K/F

2N7002K

AD_AIR

PD17

3VPCU
PC22
.1U/50V

.1U/50V

PQ53

PQ54

PC23

2
100K
30

PR40 PC145

*0

DTA124EUA

REF4.096

PC30

PR130

REV.C

PC46
1U/10V/X7R

PR121

PC33

CH501H-40

1K

1U/50V

PR129

PC36

PQ6

1
5VPCU

3VPCU
PR41

CH501H-40
PD9
2

PD3
2

PR18

1ST_BAT_CONN
.01U/50V

CN9

8
7

PL9
FBMJ3216HS480NT(6A)

10K/F

MBAT+

1
5
4
3
2
6

TEMP_MBAT 30

PR20
100

PC24

PR27

.01U/50V

100K/F

PR19
100
A

MBATV
MBCLK

MBDATA
MBDATA

MBCLK

30

PC31

3,30
PR28

.01U/50V

PROJECT : CT8

14K/F
PD4
ZD5.6V

Quanta Computer Inc.

PD5
ZD5.6V
2

3,30

MBATV

Size
Document Number
Custom

Rev
3A

MAX1772/CHARGING

Date:
5

Thursday, April 14, 2005

Sheet
1

36

of

42

3VPCU
VIN_1999_3V

REV.B

AO6402

10U/25V

PL18
VIN

.1U/50V

S0-S5
1
2
5
6

PC123

HI0805R800R-00

PC65

PC129

4.7

390K

PR53
150K

PQ39
PC128

2
.1U/50V

.1U/50V

2200P/50V

PC63

1999_RST#
2

PR54

35

REV.C

0.5A

S5_OND 3

S5_OND

3V_S5
D

Del
PC122

PR55

3V_S5

3V_S5

3,12,13,15,16,35

PC115
.1U/10V

PQ43
AO4914

REV.C

Rds(on)-24mOHM

3VPCU

1999_DH3
PL17

PC125

3VPCU

SHDN-

FB3

OUT3

22 3VPCU

REF

OUT5

21 5VPCU

FB5

V+

20

DL5

19

13

TON

DH5

16

14

BST5

LX5

15

3VSUS

13,19,20,21,22,23,33,35

VIN

2.2U/25V
1
2

HI0805R800R-00

1999_DL5

35,38

PC113
.1U/10V

MAIND

MAIND

S0-S3

1A

PQ42
PC140

1U/10V/X7R
SI4800DY

5VPCU

1999_DH5
PL16

PC116

5.8UH/6A/CDRH104R

4
PQ41

REV.B

.1U/50V
PD15

51

REF2V_1999

Rds(on)-20mOHM

AO4812
B

AO4702
SUSD

+5V

5V_AL
1

15,17,18,24,28,30,31,32,33,34,35 +5V
+

SUSD

35,38

5VSUS

PC142
4.7U/10V

PC59

PR106

5VSUS

.1U/10V

S0-S1

PR104

6A
PQ17

3
2
1

CHP202U

ALWAYS

5VPCU

330U/6.3V/ESR-25

PR110

.1U/50V

2.2U/25V

PC138
1999_BST5

18,28,30,31,32,33,36,38,39,40

PC118
5VPCU

MAX1999

PC120

1999_LX5

17

PC114
.1U/10V

PC132

VCC

PL19

35,38

SKIP-

PC130

LDO5

12

PC127

ILIM5

18

PC121

PC141

PRO-

11

PC126
1999_BST3

SUSD

3VSUS

23

SUSD

2A
10U/25V

PR103

10

GND

+3V

VIN_1999_5V
1999_DL3

10U/25V

100K
1
ILIM5

24

ILIM3

10U/25V

PR105
2

25

DL3

ON5

.1U/50V

1U/10V
1

LDO3

AO4812

S0-S1

2200P/50V

PC131
2

26

REF2V_1999

DH3

REF2V_1999

27

ON3

5
6
7
8

ILIM3

LX3

3
2
1

5V_AL

28

PGOOD

5
6
7
8

30,38,39,40 HWPG

ALWAYS

PQ40

2
C

BST3

3VPCU

5A

330U/6.3V/ESR-25

N.C

.1U/50V

.1U/50V

1
4.7U/10V

PU7

100K

PC137

2.2U/25V

PC143
2

5.8UH/6A/CDRH104R
PR108

12,18,26,29,30,32,36

PC119

3V_AL

+3V

PC124

1999_LX3

19,21,22,28,32,33,35

PC60

60.4K/F
60.4K/F

.1U/10V

3.5A

ILIM3

35,38

L_I(A)*Mosfet(Low-Side)RDSON(mOHM)=V_ILIM(mV)/10

S0-S3

MAIND

MAIND

2A

ILIM5
PR102
PR107
80.6K/F
2

82.5K/F

REV.B
PD13

PD14

1999_DL3

5VPCU

PC133

1999_DL3

.01U/50V

+15V
1

1
CHN217

+10V

.1U/50V

PC136
2.2U/25V

PC135

CHN217

Only for power

.01U/50V

+10V

+10V

PC134

ALWAYS

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
MAX1999(3V/5V)
Date:

Rev
3A

Thursday, April 14, 2005

Sheet
1

37

of

42

PC106

.1U/50V
VIN_1845_2.5V
PL14

VIN_1845_1.8V

PC109
2
PC103

8
7
6
5

1845LX1

24

1845DL1

FB2

CS1

28

11

ON1

PR94

12

ON2

13

ILIM2

1845ILIM1

ILIM1

FB1

TON

REF

10

SKIP

GND

23

PL13

PC97

PC96

PC28

PC95
1.8V_S5

5.8UH/6A/CDRH104R

PQ13
1845FB1
PR128

*0

1845REF2V

AO4704

1845VCC

PC107

15,35

PD19

PR45

*5.23K/F/0603

Rds(on)-12.5mOHM

REV.B

Rc

REV.B

.22U

Vout=(1+Rc/Rd)*1

UVP

Rd
PR47

OUT1

PGOOD

S0-S5

3
2
1

OUT2

14

27

DL1

PR93

1845ILIM2

22
LX1

CS2

1.8V_S5
.1U/50V

30,35,41 SUSON

Vout=(1+Rc/Rd)*1

DH2

15

1845DH1

1
2

16

1
2
3
30,35 S5_ON

1845BST1

26

*EC31QS04

0 1845_PWG

PR97

Rc

25

DH1

470U/4V/ESR-15/NEO

1845FB2

AO4704

BST1

LX2

*220U/4V/ESR-25

18

Rds(on)-12.5mOHM
REV.B

1845DH2

DL2

.1U/50V

PQ35

17

2.2U/25V

.1U/50V

2.2U/25V

*EC31QS04

*0

220U/4V/ESR-25

PR46

220U/4V/ESR-25

PD18

20

1845LX2

SI4800DY

5
6
7
8

2.5UH/7.5A/CDRH104R

5.5A

PQ12
PC53

3
2
1

PC55

21

PC56

PC104
10U/10V/Y5V

VDD

VCC

PC58

BST2

4
20

OVP

PC57

19

V+

1
2
3

1845BST2

PL15

3,4,9,10,11,35,41 2.5VSUS
C

PU6

2.5VSUS

S0-S3

.1U/50V

PC35
HI0805R800R-00

10U/25V

PC52

10U/25V

1845VCC

REV.C

8A

5VPCU

PR91

VIN_1845_1.8V

SI4392DY

10U/25V

1U/10V/X5R

PC45

VIN

5
6
7
8

.1U/50V

PQ34

PL5
PC48

PD7
CHP202U

8
7
6
5

PC40

2200P/50V

2200P/50V

.1U/50V

10U/25V

10U/25V

10U/25V

HI0805R800R-00

PC41

PC108

PC111

PC112
VIN

PC110

Rd

0
PR48
0

MAX8743

30,37,39,40 HWPG

REV.B

L_I(A)*Mosfet(Low-Side)RDSON(mOHM)=V_ILIM(mV)/10
Fix 2.5V Output
1.8V_S5

Fix 1.8V Output

1845REF2V

82.5K/F

2.5VSUS

PR96

REV.B
PR92

100K/F
PQ9
1845ILIM2

1845ILIM1

PQ14

+1.8V

47.5K/F
SUSD

+2.5V
6,7,8,12,15,35 +1.8V
+2.5V

3,6,7,8,35

PC50
.1U/10V

53.6K/F

0.25A

AO6402

PR98

1
2
5
6
MAIND

35,37

PR95

AO4812

S0-S1

SUSD

35,37

1.8VSUS
PC21

S0-S1

1.8VSUS

15,35
A

PC20

.1U/10V

.1U/10V

3A 35,37

MAIND

MAIND

S0-S3

0.2A

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
MAX1845(2.5VSUS/1.5V_S5)
Date:
5

Thursday, April 14, 2005

Sheet
1

Rev
3A
38

of

42

VIN_1993
VIN
5VPCU
PC71

1993BST

DCR 10m OHM

1993DH

15

1
2
3

VDDA_1V2

17

PL7
PC3

2.5UH/7.5A/CDRH104R

PC4
VDDA_1V2

PC80

2
1

BST

.1U/50V
1993LX

V+

LSAT

SHDN

23

AGND

21

DH

16

LX

18

DL

14

POK

PC76

VIN_1993

PR82 0

HWPG

PR4

1993SHDN#

30,37,38,40

MAINON 30,35

1993DL
PR1

4
PQ25

20

PGND

AO4704

11

CSP

12

CSN

10

OUT

2.49K/F

1993CSP

Rb

Vcs

PR131 2.49K/F
9
PR132

FB

TON

1PR8

REF

6 1993REF

*0

PR7
100K/F
2

13

PC43,PC80 change from 220u to


470u

10K/F

PC85
*100P

N.C

ILIM

PR80

.1U/50V
2

N.C

PC79
1

1
2
3

N.C

7.15K/F

Ra

SKIP

PR79

.1U/50V

2.2U/25V

470U/4V/ESR-25

REV.B

470U/4V/ESR-25

8
7
6
5

PC43

VDD

CH501H-40
SI4392DY

S0-S1

22

PC84
1U/10V/X5R

24

PQ26

VCC

PD10

20

19

8
7
6
5

10U/10V/Y5V

.1U/50V

10U/25V

10U/25V

2200P/50V

1993VCC

7A

PR77

PC81

OVP/UVP

PC72

HI0805R800R-00

10U/25V

1.2V

PC68

PC70

PC69

PL6

1993ILIM
PU4

MAX1992ETG
1

REV.C

PC8
1U/10V/X5R

Vout=VFB(1+Ra/Rb)
#VFB=0.7V

PC9

PR10

470P
75K/F

Vcs=I_L(A)*L_DCR(mOHM)=V_ILIM(mV)/10

REV.B

PROJECT : CT8

Quanta Computer Inc.

Size
A3

Document Number

Date:

Thursday, April 14, 2005

Rev
3A

MAX1993/VCC_NB
Sheet
1

39

of

42

5VPCU
PC77

PR67

22

D2

VID3

21

D3

VID4

20

D4

19

OVP

30

1
36

5
6
7
8
VID2

BSTM

26

1544DHM

PQ31

IR7821

IR7821

PR85
1544BSTM

3
2
1

DCR 1.7m OHM+-10%

.22U/25V

GND

5
6
7
8

5
6
7
8

1544-1
PQ27

1.5K

2P

1P

PC105

S0

IR7832

IR7832

PGND

S1

31

.22U

PR78

Vcs

PR76

1K/F

PR37

3
2
1

3
2
1

PC39

PC51
VCC_CORE

1544-3

1544DLM

29

1544-2

DLM

PC54

1P
+

MAX1544

PC49

1K/F

330U/2.5V/ESR-9/POS

2P

330U/2.5V/ESR-9/POS

PR29

330U/2.5V/ESR-9/POS

PQ30

PJ1 SHORT

0.56uH

330U/2.5V/ESR-9/POS

1544AGND

11

PR90
0.001/2W/5%

PL12

1544LXM

27

VCC_CORE
1.2V
30A

PC87

LXM

PC10
HI0805R800R-00

PQ28
4

3
2
1

1544VCC

DHM

28

PC90

10U/25V

V+

PC88

10U/25V

D1

PC11

10U/25V

D0

23

PC91

10U/25V

24

VID1

PC89

CH501H-40

.1U/50V

VID0

VIN
HI0805R800R-00
PL3

2200P/50V

VIN_1544

1544AGND

PL2
PC86

PD12
10U/10V/Y5V

VDD

VCC

10

10

5
6
7
8

2.2U/10V/X5R

1544VCC

1544AGND

REV.C
80.6K/F
1544TIME 1
270P
1544CCV 12
2

1544REF

17
16

1544OAIN+
1544OAIN-

FB

15

1544FB

CCI

14

1544CCI 1
PC6

SUS

1544_SUS

CCV

35

1544BSTS

VRON

SHDN

PR133

*0

5
6
7
8

IR7821

PR74 0

IR7821

1544REF

PL11

34

1544LXS
1544DLS

PR124

PR33
1544VCC

REV.B

1544SKIP#
PR81

15K

SKIP

DLS

32

TON

CSP
CSN

40
39

1
1544TON

PC42

1544CSP
1544CSN

GNDS

OFS
PU5

COREFB# 3
10/F

PC5
1000P
2

LPM K8 100mV of negative offset voltage

1544GNDS
1

121K/F

13

PR3

.22U

D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1

D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1

D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1

D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1

Output
1.550V
1.525V
1.500V
1.475V
1.450V
1.425V
1.400V
1.375V
1.350V
1.325V
1.300V
1.275V
1.250V
1.225V
1.200V
1.175V
1.150V
1.125V
1.100V
1.075V
1.050V
1.025V
1.000V
0.975V
0.950V
0.925V
0.900V
0.875V
0.850V
0.825V
0.800V
Shutdown

5
6
7
8

1544OFS

PR34

5
6
7
8

PR69

*0

PR75

TON=REF/300KHz
TON=Open/200KHz

Vcs

1.5K

1544REF
PR73

18

PC102

0.56uH

.22U/25V

330U/2.5V/ESR-9/POS

LXS

DCR 1.7m OHM+-10%

PC82
3
2
1

VROK

REV.D

10U/25V

25

PC12

10U/25V

DHS
BSTS

30,37,38,39 HWPG

PR123
30

1544DHS

PC15
.1U/50V

PR84

PQ4
PQ1

CH501H-40
33

COREFB

PC14

2200P/50V

REV.B

PC13

1544AGND
ILIM

D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

VIN_1544

3.65K/F

5VPCU

PD11

100K/F
60.4K/F
1544ILIM 9

REV.C REV.B

50mV/27.3A=1.83mV/a for load line slope

0
PR68

Vcs=I_L(A)*L_DCR(mOHM)=V_ILIM(mV)/20

PR6
3.65K/F

DEL PC7 PR9


PR5

1U/10V/X5R

PR64

DEL PC83

REV.D
2
470P

PR72

REF

REV.D

3
2
1

OAIN+
OAIN-

5
6
7
8

PC1
1

1544CMP
1544CMN

1544AGND

PC78
1

TIME

37
38

PR71

CMP
CMN

PQ2
4

PQ5
4

1544AGND

SUS

S1

S0

Output

High

OPEN OPEN

0.925V

REF

OPEN OPEN

1.325V

PROJECT : CT8

3
2
1

PC74
100P

80.6K/F

IR7832
3
2
1

IR7832

PR65

Quanta Computer Inc.


Size
Document Number
Custom

1544AGND 1544AGND

Date:
5

Thursday, April 14, 2005

Rev
3A

CPU VCC CORE


Sheet
1

40

of

42

1.25V (0.2A)
1.25V (1.2A)
2

S0-S3

REV.B

PC139
0

REV.B

150U/2V/ESR-18
R506

S0-S3

VTT_DDR
1
2
3
4

33K

1.Change Pr52 to
33k, Pr51 to
100k.
2.PC61,PC62 no stuff.

PC62

PU3

REV.B

PC61

8
7
6
5

VTT_DDR 4,11,35
2.5VSUS
PC117
10U/10V/Y5V

G2996

*.1U/50V

100K

*.1U/50V

PR51

VTT
GND
PVIN
SD
VSENSE AVIN
VREF VDDQ

PR52
30,35,38 SUSON

*0

R505

VTT_SENSE

2.5VSUS 3,4,9,10,11,35,38

Footprint/PSOP8-8P

PROJECT : CT8

Quanta Computer Inc.


Size
Document Number
Custom
VTT_DDR/VDDA_1V2
Date:
5

Thursday, April 14, 2005

Rev
2A
Sheet

41

of

42

Model

MODEL

REV

CHANGE LIST

FROM

Page

1A

CT8 M/B

1
2

First Release

2A
D

PAGE 2 : 1. C330, C479 CHANGE VALUE FROM 33p TO 27p for meet 35ppm.
2. DEL R84 0ohm (don't need reserve).
PAGE 3 : 1. ADD CON1 HDT CONNECTOR for AMD requirement.
2. ADD C721 100P, C722 4.7U, C723 3300P, C724 0.22U for high frequency decoupling.
3. Remove R386,Q33, connect U18 pin 6 to TEMP_ALARM# (no need level shift).
4. Change C311 from 10u to 100u and remove C304, that ensures VDD to VDDA power
down sequence is met.
5. Add c154,c283,c284,c285 4.7u c9,c277 100u change to 220u for VDDA_1V2 power noise.
PAGE 4 : 1. C148, C163 VALUE CHANGE FROM 330U TO 220U for Mechanic interference.
2. C225, C243, C267 PART NUMBER CHANGE TO CH733LM8812 for Mechanic interference.
PAGE 5 : 1. R16 VALUE CHANGE FROM 10K TO 8.5K for ATI requirement.
PAGE 7 : 1. ADD C711~C720, C745~C747 0.1U FOR EMI
2. DEL R19, CHANGE R17 VALUE TO 4.7K PULL +1.8V for side-port memory is not used.
3. DEL Y1 CIRCUIT because no need reserve is ATI requirement.
4. ADD C740, C741 FOR EMI.
5. CHANGE NET NAME FROM PWROK_NB TO PWROK for meet ATI power OK sequence.
PAGE 8 : 1. ADD L55 for VDDA_1V2 frequency decoupling.
2. L15,L55 TI201209G121 CHANGE TO FBMJ2125HM330-T.
PAGE11 : 1. C280 VALUE CHANGE FROM 330U TO 220U for Mechanic interference.
PAGE12 : 1. DEL R129, C391, C382, U9, D3, because no need reserve is ATI requirement.
2. Remove RTC charge circuit Q16, R133, R137, R140. because RTC battery is not
support charge function.
3. C387, C388 CHANGE VALUE FROM 12p TO 18p for meet 10ppm SPEC.
4. ADD RN40, RN41, R520 for PCI command signal pull high.
PAGE13 : 1. CHANGE R99 for blue tooth on/off and R318 for wire less on/off function.
2. DEL R401, C668, R400 for ATI power OK sequence.
3. DEL R161 0ohm for BITCLK.
4. ADD R503, R504 FOR F/F AND D/F.
5. CHANGE R147 PULL HIGH FROM 3V_S5 TO +3V for leakage current. and R446
contact to BITCLK because change net name.
PAGE15 : 1. Del C642 for meet IXP power on sequence.
PAGE16 : 1. Del R444 10K, Add R445 10K for ATI USB clock from outside.
PAGE17 : 1. DEL R175, Q19 and CN22 PIN34 CONNECT TO PCI_PME#. because no need LANVCC
to control PME signal.
2. Del R196, C402. no need reserve.
PAGE18 : 1. CHANGE R213 SIGNAL to PWROK and DEL Q21, Q22, Q24, R210for ATI LCD back light bug.
2. Reserve R215 1K PULL DOWN.
3. ADD R507, C730, R508, D19 for ATI LCD back light bug.
PAGE19 : 1. DEL PCI1510 CIRCUIT AND PARTS.
2. ADD C743 for tune clock waveform.
PAGE20 : 1. R402 stuff for PCI reset timing.
2. Remove R392, Q36 and U26 pin T3 connect to PCI_PME# for PME timing.
3. Add R515, C742 circuit on CLK48M for tune clock waveform.
4. Change R407 to 4.7k for limit current.
5. Change L48 to 0 ohm for EMI.
PAGE21 : 1. ADD R494 22ohm AND Q39 2N7002E for VCC_XD discharge.
2. CHANGE R487, R488, R490, R491, R492, R493, R495, R496, R497, R498, R499 VALUR FROM 0
TO 22 for signal waveform..
3. ADD R516, R517, R518 for TI requirement.
4. Remove R397, D16, R489.
5. Add a Quick Switch U34 to isolate clock.
6. Change R501 to 0 ohm.
7. CN5 pin 35, 43 connect to the same net.
8. C725~C728 0.1U for power noise.

PAGE22 : 1. C484 VALUE CHANGE FROM 100U TO 150U for USB power meet SPEC.
2. ADD R509, R510, R511, R512 FOR EMI.
PAGE23 : 1. MC13, MC18 CHANGE VALUE FROM 33p TO 22p for tune clock range.
2. CHANGE MR24, MR27 FROM 1K TO 0ohm for Conexant requirement.
3. ADD SPDIF.
4. Del MR26 for meet PC99 SPEC.
5. Del C518 for tune BITCLK waveform..
PAGE26 : 1. ADD R502 15K pull low for tune ISOLATEB voltage.
2. R341 change 4.7K to 3.6K for REALTEK recommend.
3. Add C729 10u and C650 change value from 10u to 22u for REALTEK recommend.
4. Change C385 from 2200p to 3300p for tune 3VPCU drop level.
5. Add C736, C737, C738, C739 for EMI.
6. DEL R134 no need reserve, ADD Q40 for leakage current.
PAGE27 : 1. ADD C734, C735 1000P FOR EMI.
2. DEL R246, R249 for 1G LAN.
PAGE28 : 1. R483 change signal from 5VPCU to +5V and R350 pull 5VSUS for leakage current.
PAGE29 : 1. U11 change package to TSSOP32 for Mechanic interference.
PAGE30 : 1. C389 8p, C399 5.6p change value to 15p for clock tolerance.
2. Del signal BT_OFF#, RF_OFF# for HP implement guide.
3. ADD R471 and DEL R468, R470 for ATI power OK sequence.
4. Add D20 for EC leakage current.
PAGE31 : 1. ADD HOLE24, AND D21, C744 BOM NO STUFF for tune FAN clock.
2. CHANGE L1, L2, L32 TO BK1608LL121. C6, C418, C419 TO 10P for CRT timing.
PAGE32 : 1. ADD R513, R514 2, C731, C732, C733 FOR EMI.
PAGE33 : 1. DEL CN20, C681, C677,CC673 because no need AV function.
PAGE35 : 1. ADD PR126, PR125, PQ51, PQ52 for 2.5VSUS and 1.8V_S5 discharge circuit.
PAGE36 : 1. CHANGE PQ24 FROM SI4425 TO AO4407, CHANGE PQ33 FROM AO4411 TO AO4407, CHANGE
PR36 FROM 130K TO 121K, PQ11 CHANGE TO 2N7002K, PD6 CHANGE TO CH501H-40. and add PQ53,
PD17, PR127, PC144 for prevent AC discharge MOSFET damage when adapter over watt.
2. Change PD16 bypass from 5VPCU to 3VPCU.
PAGE37 : 1. CHANGE PQ41 FROM AO4704 TO AO4702, CHANGE PR102 FROM 47.5K TO 80.6K, CHANGE
PQ43 FROM SI4834 TO AO4914 for Modify 5VPCU OCP point.
PAGE38 : 1. Change PWM IC from MAX1845 to MAX8743 to avoid negative voltage.Modify
2.5VSUS, 1.8V_S5 OCP point.
2. ADD PR128 NO STUFF for adjust work frequency.
PAGE39 : 1. CHANGE PR10 FROM 60.4K TO 75K for Change VCCA_1V2 OCP point.
2. PC43,PC80 change from 220u to 470u
PAGE40 : 1. ADD PR124 15K. DEL PR70, PC2 for VR_ON signal add pull down resistor.
2. Change PR64 from 37.4k to 49.9k for update over current from 32A to 39A.
PAGE41 : 1. ADD R505, R506 and Change VSENSE from VTT_DDR to CPU VTT_SENSE
2. Change PR52 to 33k, PR51 to 100k for timing.
3. PC61,PC62 no stuff.

PAGE 2 : 1. Add CAP C749, C750 0.1u for EMI.

PAGE26 : 1. Del 1G signal.


2. Change C385 from 3300p to 0.1u for power drop.

PAGE 3 : 1. Modify C311 component.

PAGE27 : 1. Del 1G circuit, because no support 1G function.

PAGE 5 : 1. Change R16 to 8.25k/F and R12 to 82.5 ohm for A-link drive.

3A

PAGE30 : 1. C89, C390 change value from 15p to 5p for frequency tolerance.

PAGE 7 : 1. Del C740 for VGA Clock waveform.


2. L17 change from bead to 150ohm for ATI VCO issue(PA_RS480L1).
PAGE12 : 1. Add D3 for meet SVTP SPEC.
2. Change C674, C675, C676, C683 value from 15p to 33p for EMI.
3. C358, C359, C360, C361 change value from 0.1u to 0.01u for ATI PA_IXP400AC11.
PAGE13 : 1. R503 change pull up source from 3VPCU to +3V for real power plane.
PAGE17 : 1. CN22 pin15 pull down for customer request.
PAGE18 : 1. Change C730 from 3300p to 0.1u for power drop.

PAGE31 : 1. Modify FAN circuit for diminish electronic magnetic noice.


2. Change L1, L2, L32 to BK1608LL680 for CRT waveform can meet SPEC.
PAGE32 : 1. Del 1G signal.
2. Add R525, R526, R527 0ohm for option FF or DF TV.
3. Add common choke for USB.
PAGE36 : 1.
2.
3.
4.

4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41

Change PC47 to 0.47U,PC37 to 0.047U for reduce Adapter in inrush current.


Del PQ49 for fix 3 CELL battery and cost down.
Change PQ53 for 2N7002K for ESD protect.
Add PR130,PQ54 for delay AD_AIR signal to EC After 3VPCU ready.

PAGE20 : 1. Add R529, R530 2.7K pull down for option FF and DF.
2. Reserve C754, C755 for EMI.
3. Change C742 to 22p for waveform quality.

PAGE37 : 1. Change PR53 to 150K for Meet MAX1999 SHDN signal


2. Del PC122 for meddle mechanic.

PAGE21 : 1.
2.
3.
4.

PAGE39 : 1. Add PR132 0 ohm,PR131 2.49K/F for reserve debug.

CT8 Mother
Board

1A
3A
3A
2A
3A
1A
3A
2A
1A
1A
2A
3A
3A
1A
2A
2A
3A
3A
2A
3A
3A
3A
2A
3A
1A
3A
3A
2A
2A
3A
3A
3A
2A
1A
2A
3A
3A
3A
3A
3A
2A

TO

3B

3B

3B

3B
3B

3B
3B
C

3B

3B

3B

3B

input trip Max level.

PAGE38 : 1. Modify VIN_1845_1.8V signal, because that is single net.

Add C758~C761 0.1u for bypass noise.


Change R501 from 3.3K to 0 for signal level.
Add R500, R531, U36 for signal driving.
Change R518, R519 to 2.2K for signal level.

PAGE40 : 1. Change PR64 to 60.4K Modify CPU over current protect point.
2. Change PR71 to 80.6K for Modify CPU power slew rate

PAGE22 : 1. change CN19, CN23, CN16 footprint for new part.


PAGE24 : 1. reserve C751, C752, C753, C756, C757 0.1u for EMI.

3B

PAGE 3 : 1. Add C762~C767 0.1u for ESD.


PAGE 7 : 1. Change C740 value from 1000p to 330p for ESD.
PAGE13 : 1. Modify BT_OFF# from GPIO1 to GPM3 for keep status in S3.
2. Add R533, R534 10k pull low for M/B ID.
PAGE18 : 1. Change R216 power source from +3V to 5VPCU and change C730 value to .47u for glitch.
PAGE19 : 1. Change R342 value from 33ohm to 15ohm for meet PCMCIA SPEC timing.
PAGE23 : 1. Add D21 1ss355 and change R309 value from 2.2k to 1k for eliminate GPRS card noise.
2. Del R317 for GPRS noise.
PAGE24 : 1. Add Q41 DTC144EU for GPRS noise.
PAGE26 : 1. Change R156 power source from 3VPCU to 5V_AL and change C385 value from .1u to .47u for power glitch.
PAGE31 : 1. Add Q43 (no stuff) DTC144EU and Q13 SI3457 for FAN driver.
PAGE36 : 1. Add PC145 .01u for ESD.
PAGE40 : 1. Add PR133 (No stuff) for power saving.
2. Del PC7, PR9, PC83 for ESD.

Quanta
Computer Inc.
8

PROJECT:CT8 M/B

REV:2A

APPROVED BY:

DRAWING BY: Ricky Chiu

DOCUMENT NO.: 204


DATE: 11/15/2004
5

PCBA P/N: 31CT8MB0021


SHEET 1 OF 1
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