Compal La-7552p Qbl60 Asus k53 Rev 0.03 WWW - Mycomp.su

A
p.
su
/x
/
Compal Confidential
2
QBL50 Schematics Document
yc
om
AMD Sabine
//
m
APU Llano / Hudson M2_M3 / Vancouver Whistler

UMA only / PX Muxless with BACO
3
tt
p:
2010-02-16
LA-7552P REV: 0.03
2010/08/04
Issued Date
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2010/08/04
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Cover Page
Size
B
Date:
Document Number
Rev
0.03
QBL60 LA-7552P
Tuesday, February 22, 2011
Sheet
E
of
49
Compal Confidential
Model Name : QBL60
Sabine
VRAM 1G/2G
128M16 x 4/8
page 23, 24
DDR3
ATI Vancuver Whistler
GFX x 8
Gen2
ADM1032
page 19
uFCBGA-962
Page 18~22
AMD FS1 APU

Llano
GFX x 4
APU HDMI
(UMA / Muxless)
DP x1 (DP0 TXP/N0)
Memory BUS(DDR3)
Dual Channel
uPGA-722 Package
page 28
P_GPP x 2
GEN1
page 26
p.
su
Page 6~10
Travis LVDS
Translator
LVDS
LVDS Conn.
Reserve eDP
DP x 4
(DP1 TXP/N 0~4)
UMI
USB2
FCH CRT (VGA DAC)
CRT Conn.
FCH
Hudson-M2/M3
page 27
GPP1
yc
om
page 27
GPP0
page 32
page 29
page 30
Port 1
Port 5
CMOS
Camera
Card Reader
RTS5137
Mini Card
(with BT)
page 27
page 32
Port2
page 31
Port 3
Port 4
USB
3.3V 48MHz
LPC BUS
port 0
port 1
3
SATA HDD1
Conn.
ODD
Conn.
page
page 33
33
HDA Codec
ALC269 page
30
ENE KB930
page 36
Touch Pad
LED
page 34
Port 0
S-ATA Gen2
page 29
tt
RJ45
USB2
(LS-7322P)
page 34
Page 13~17
p:
//
m
LAN(GbE)
BCM57785
USB2
HD Audio 3.3V 24.576MHz/48Mhz
uFCBGA-656
MINI Card 1
WLAN
Page 11,12
BANK 0, 1, 2, 3
1.5V DDRIII 800~1333MHz
HDMI Conn.
204pin DDRIII-SO-DIMM X2
/x
/
Thermal Sensor
Int.KBD
page 38
page 38
page 37
RTC CKT.
4
External board
page 25
DC/DC
Interface CKT.page
LS-7326P
Power/B
page 35
SYS BIOS (2M)
39
Power Circuit
page 40~48
A
BIOS ROM
page 15
LS-7322P
Audio BD
2010/08/04
Issued Date
page 30
EC BIOS (128K)
page 35
Compal Secret Data
2010/08/04
Deciphered Date
C
Title
Block Diagrams
Size
B
Date:
Document Number
Rev
0.03
QBL60 LA-7552P
Sheet
E
of
49
DISPLAY DISTRIBUTION
CLOCK DISTRIBUTION
: LVDS PATH
: APU HDMI PATH
LVDS CONN
A_SODIMM
B_SODIMM
TXOUT[0:2]+/TXCLK+/TZOUT[0:2]+/TZCLK+/I2CC_SCL/DA
AMD
ATI VGA
100MHz
100MHz
CPU FS1 SOCKET
APU_CLKP/N
100MHz
AMD
p.
su
AMD
/x
/
CLK_PEG_VGAP/N
APU_DISP_CLKP/N
C
APU_TXOUT[0:2]+/APU_TXOUT_CLK+/APU_TZOUT[0:2]+/APU_TZOUT_CLK+/APU_LVDS_CLK/DATA
FCH
Hudson-M2/M3
Internal CLK GEN
DP0_AUX
GPP_CLK
100MHz
//
m
32.768KHz 25MHz
LVDS Transtator
DP0_TXP/N[0:1]
DP0_AUXP/N
GbE LAN
DP0
APU
p:
WLAN
Mini PCI Socket
DP_IN
GPP0
GPP1
LVDS_OUT
RTD2132
yc
om
1066~1600MHz
MEM_MA_CLK1_P/N
MEM_MA_CLK7_P/N
1066~1600MHz
MEM_MB_CLK1_P/N
MEM_MB_CLK7_P/N
Whistler
tt
DP1
PCIE_GFX[0:7]
PCIE_GFX[12:15]
VGA
PCIE_GFX[0:7]
25MHz
FCH
LS
R
A
CRT CONN
Compal Secret Data
2010/08/04
Issued Date
HDMI CONN
2010/08/04
Deciphered Date
Title
CLOCK / DISPLAY DISTRIBUTION
2
Size
Document Number
Custom QBL60 LA-7552P
Date:
Rev
0.03
Sheet

1
of
49
Voltage Rails
S3
S5
STATE
+VALW
+V
+VS
Clock
Full ON
HIGH
HIGH
HIGH
ON
ON
ON
ON
S1(Power On Suspend)
HIGH
HIGH
HIGH
ON
ON
ON
LOW
S3 (Suspend to RAM)
LOW
HIGH
HIGH
ON
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
HIGH
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
ON
OFF
OFF
OFF
Adapter power supply (19V)
N/A
N/A
N/A
B+
AC or battery power rail for power circuit.
N/A
N/A
N/A
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
+CPU_CORE_NB
Voltage for On-die VGA of APU
ON
OFF
OFF
+VGA_CORE
0.95-1.2V switched power rail
ON
OFF
OFF
+0.75VS
0.75V switched power rail for DDR terminator
ON
ON
OFF
+1.0VSG
1.0V switched power rail for VGA
ON
OFF
OFF
+1.1ALW
1.1V switched power rail for FCH
ON
ON
ON*
+1.1VS
1.1V switched power rail for FCH
ON
OFF
OFF
+1.2VS
1.2V switched power rail for APU
ON
OFF
OFF
+1.5V
1.5V power rail for CPU VDDIO and DDR
ON
ON
OFF
+1.5VS
1.5V switched power rail
ON
OFF
OFF
+1.8VSG
ON
OFF
OFF
+2.5VS
2.5V for CPU_VDDA
ON
OFF
OFF
+3VALW
3.3V always on power rail
ON
ON
ON*
+LAN_IO
3.3V power rail for LAN
ON
ON
ON
+3VS
ON
OFF
OFF
+5VALW
5V always on power rail
ON
ON
ON*
+5VS
5V switched power rail
ON
OFF
OFF
+VSB
VSB always on power rail
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
SLP_S3# SLP_S4# SLP_S5#
BTO Option Table

BOM Structure
Use VGA (Mux)
X76@
VRAM ID Table
M2@
Use Hudson-M2
M3@
Use Hudson-M3
USB30@
USB30 on M/B
USB20@
USB20 on M/B
REQ#/GNT#
M3@ U25
FCH M3
Part Number = SA000043I90
BOM Config
//
m
External PCI Devices

IDSEL#
BTO Item
VGA@
x = 1 is read cmd, x= 0 is writee cmd.
Device
/x
/
VIN
SIGNAL
S1
p.
su
Description
yc
om
Power Plane
Interrupts
EC SM Bus2 address
EC SM Bus1 address
tt
p:
Device
Address
HEX
Device
Address
HEX
Smart Battery
0001 011X b
16H
ADI ADM1032 (VGA)
1001 101X b
9AH
(APU)
RTD2132S (TL)
FCH
SM Bus 0 address
FCH
SM Bus 1 address
Device
Address
HEX
DDR DIMM1
1101 000X b
D0
DDR DIMM2
1101 001X b
D2
Device
Address
HEX
2010/08/04
Issued Date
Compal Secret Data
2010/08/04
Deciphered Date
A
Title
Notes List
Size
B
Date:
Document Number
Rev
0.03
QBL60 LA-7552P
Sheet
E
of
49
AMD APU FS1

BATTERY
12.6V
PU201
ISL6267HRZ-T
PU101
CHARGER
BATT+
+CPU_CORE
+CPU_CORE_NB
+CPU_CORE
0.7~1.475V
VDD CORE 54A
+CPU_CORE_NB
0.7~1.475V
VDDNB 27.5A
+2.5VS
+2.5VS
VDDA 500mA
+1.5V
+1.5V
VDDIO 4.6A
+1.2VS
+1.2VS
VDDR 6.7A
+2.5VS
+1.5V
D
AC ADAPTOR
19V 90W
PU501
RT8209MGQW
VIN
PU603
APL5508-25DC
RAM DDRIII SODIMMX2

PU801
RT8209MGQW
B+
+1.2VS
+1.5V
VDD_MEM 4A
+0.75VS
VTT_MEM 0.5A
+0.75VS +0.75VS
PU601
APL5336KAI
PU901
RT8237CZQW
+VGA_CORE
PU301
RT8205LZQW
+3VALW
p.
su
+1.1VALW
/x
/
+VDDCI
PU701
RT8209MGQW
C
yc
om
+INVPWR_B+
+3VS
+1.0VSG
+1.5VSG
+1.5VSG
U41
AO4430L
+1.8VSG
PJ14
+3.3 350mA
+5VS 500mA
+5VALW
tt
+USB_VCCA
+USB_VCCB
DPLL_VDDC: 125 mA
SPV10: 120 mA
PCIE_VDDC: 2000 mA
DP[A:E]_VDD10: 680 mA
+1.5VSG
VDDR1: 3400 mA
+1.8VSG
+3VSG
+3VSG
+3VSG
U39
AO4430L
+1.1VS
+1.1VS
+3VS
+3.3V
+5V 45mA
+3.3VALW 30mA
+3.3VS 3mA
+3.3VS 25mA
LAN
RTL8111E
+3VS
Mini Card
+3.3VALW 201mA
A2VDD: 130 mA
VDDR3: 60 mA
VDDAN_11_USB_S: 140 mA
VDDCR_11_USB_S: 197 mA
VDDAN_11_SSUSB_S: 282 mA
VDDCR_11_SSUSB_S: 424 mA
VDDCR_11_S: 187 mA
VDDPL_11_SYS: 70 mA
+3VALW
EC
ENE KB930
+1.5VS 500mA
+3.3VS 1A
+3.3VALW 330mA
RTC
Bettary
Issued Date
VDDIO_33_PCIGP: 131 mA
VDDPL_33_SYS: 47 mA
VDDPL_33_DAC: 20 mA
VDDPL_33_ML: 20 mA
VDDAN_33_DAC: 200 mA
VDDPL_33_PCIE: 43 mA
VDDPL_33_SATA: 93 mA
VDDIO_AZ_S: 26 mA
VDDPL_33_SSUSB_S: 20 mA
VDDPL_33_USB_S: 17 mA
VDDAN_33_USB_S: 658 mA
VDDIO_33_S: 59 mA
VDDXL_33_S: 5 mA
VDDAN_33_HWM_S: 12 mA
GND
VDDIO_33_GBE_S
VDDCR_11_GBE_S
VDDIO_GBE_S
RTC BAT
VDDBT_RTC_G
2010/08/04
Deciphered Date
2010/08/04
3
Title
POWER DELIVERY CHART

Size
Document Number
Date:
Compal Secret Data
2.4 A
+1.1VALW
+1.1VALW
+3VALW
Audio Codec
ALC269-GR
+1.5VSG
PLL_PVDD: 75 mA
TSVDD: 20 mA
AVDD: 70 mA
VDD1DI: 100 mA
VDD2DI: 50 mA
A2VDDQ: 1.5 mA
VDD_CT: 110 mA
VDDR4: 170 mA
PCIE_PVDD: 40 mA
MPV18: 150 mA
SPV18: 75 mA
PCIE_VDDR: 400 mA
DP[A:F]_VDD18: 920 mA
DP[A:F]_PVDD: 120 mA
VDDPL_11_DAC: 7 mA
VDDAN_11_ML: 226 mA
VDDCR_11: 1007 mA
VDDAN_11_CLK: 340 mA
VDDAN_11_PCIE: 1088 mA
VDDAN_11_SATA: 1337 mA
+3VALW
SATA
HDD*2
ODD*1
+5V 3A
VRAM 1GB/2GB
64M / 128Mx16 * 4 / 8
+1.1VS
+1.5VS
+5V
Dual+1
2.5A
+1.0VSG
+3VS
USB X3
VDDCI 4.6A
p:
+5VS
FAN Control
APL5607
VDDC 47A
0.9~1.0V
FCH AMD Hudson M2/M3
//
m
B+ 300mA
0.85~1.1V
+1.8VSG
U33
SI4800
LCD panel
15.6"
U54/U55
AP2301MPG
+1.0VSG
PU602
APL5930KAI
PU401
SY8033BDBC
U40
SI4800
+5VALW
VGA ATI
Whistler/Seymour/Granville
+VGA_CORE
Rev
0.03

1
Sheet
of
49
18 PCIE_GTX_C_FRX_P[0..7]
PCIE_FTX_C_GRX_P[0..7] 18
18 PCIE_GTX_C_FRX_N[0..7]
PCIE_FTX_C_GRX_N[0..7] 18
JCPU1A
APU To HDMI
PCIE_FTX_GRX_P[12..15] 28
CONN@
PCIE_FTX_GRX_N[12..15] 28
PCI EXPRESS
P_GFX_RXP0
P_GFX_TXP0
AA2
PCIE_FTX_GRX_P0
C917VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_P0
AA9
P_GFX_RXN0
P_GFX_TXN0
AA3
PCIE_FTX_GRX_N0
C918VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_N0
PCIE_GTX_C_FRX_P1
Y7
P_GFX_RXP1
P_GFX_TXP1
Y2
PCIE_FTX_GRX_P1
C919VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_P1
PCIE_GTX_C_FRX_N1
Y8
P_GFX_RXN1
P_GFX_TXN1
Y1
PCIE_FTX_GRX_N1
C920VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_N1
PCIE_GTX_C_FRX_P2
W5
Y4
PCIE_FTX_GRX_P2
C921VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_P2
PCIE_GTX_C_FRX_N2
W6
PCIE_GTX_C_FRX_P3
W8
PCIE_GTX_C_FRX_N3
W9
PCIE_GTX_C_FRX_P4
V7
P_GFX_RXP4
P_GFX_TXP4
PCIE_GTX_C_FRX_N4
V8
P_GFX_RXN4
PCIE_GTX_C_FRX_P5
U5
PCIE_GTX_C_FRX_N5
P_GFX_TXN3
PCIE_FTX_C_GRX_N2
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_P3
W3
PCIE_FTX_GRX_N3
C924VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_N3
V2
PCIE_FTX_GRX_P4
C925VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_P4
P_GFX_TXN4
V1
PCIE_FTX_GRX_N4
C926VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_N4
P_GFX_RXP5
P_GFX_TXP5
V4
PCIE_FTX_GRX_P5
C927VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_P5
U6
P_GFX_RXN5
P_GFX_TXN5
V5
PCIE_FTX_GRX_N5
C928VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_N5
PCIE_GTX_C_FRX_P6
U8
P_GFX_RXP6
P_GFX_TXP6
U2
PCIE_FTX_GRX_P6
C929VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_P6
PCIE_GTX_C_FRX_N6
U9
P_GFX_RXN6
P_GFX_TXN6
U3
PCIE_FTX_GRX_N6
C930VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_N6
PCIE_GTX_C_FRX_P7
T7
P_GFX_RXP7
P_GFX_TXP7
T2
PCIE_FTX_GRX_P7
C931VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_P7
PCIE_GTX_C_FRX_N7
T8
P_GFX_RXN7
P_GFX_TXN7
T1
PCIE_FTX_GRX_N7
C932VGA@
2 0.1U_0402_16V7K
PCIE_FTX_C_GRX_N7
R5
P_GFX_RXP8
P_GFX_TXP8
T4
R6
P_GFX_RXN8
P_GFX_TXN8
T5
R8
P_GFX_RXP9
P_GFX_TXP9
R2
P_GFX_RXN9
P_GFX_TXN9
R3
P7
P_GFX_RXP10
P_GFX_TXP10
P2
P_GFX_RXN10
P_GFX_TXN10
P1
P_GFX_RXP11
P_GFX_TXP11
P4
P_GFX_RXN11
P_GFX_TXN11
P_GFX_RXP12
P_GFX_TXP12
AC6
32 PCIE_DTX_C_FRX_P1
AC8
32 PCIE_DTX_C_FRX_N1
AC9
AB7
AB8
AA5
AA6
13 UMI_MTX_C_FRX_P0
AF8
13 UMI_MTX_C_FRX_N0
AF7
13 UMI_MTX_C_FRX_P1
AE6
13 UMI_MTX_C_FRX_N1
AE5
13 UMI_MTX_C_FRX_P2
AE9
13 UMI_MTX_C_FRX_N2
AE8
13 UMI_MTX_C_FRX_P3
AD8
13 UMI_MTX_C_FRX_N3
AD7
P_ZVDDP
2
196_0402_1%
K5
P_GFX_RXP15
P_GFX_TXP15
P_GFX_RXN15
P_GFX_TXN15
P_GPP_RXP0
P_GPP_TXP0
P_GPP_RXN0
P_GPP_TXN0
P_GPP_RXP1
P_GPP_RXN1
P_GPP_TXP1
P_GPP_TXN1
P_GPP_RXP2
P_GPP_TXP2
P_GPP_RXN2
P_GPP_TXN2
P_GPP_RXP3
P_GPP_TXP3
P_GPP_RXN3
P_GPP_TXN3
P_UMI_RXP0
P_UMI_TXP0
P_UMI_RXN0
P_UMI_TXN0
P_UMI_RXP1
P_UMI_RXN1
P_UMI_RXP2
P_UMI_TXP1
P_UMI_TXN1
P_UMI_TXP2
P_UMI_RXN2
P_UMI_TXN2
P_UMI_RXP3
P_UMI_TXP3
P_UMI_RXN3
P_UMI_TXN3
P_ZVDDP
P_ZVSS
yc
om
P_GFX_TXN14
M4
PCIE_FTX_GRX_P14
M5
PCIE_FTX_GRX_N14
L2
PCIE_FTX_GRX_P15
8,14
APU_SIC 3
APU_SIC
CK
PCIE_FTX_DRX_P0
C950 1
2 0.1U_0402_16V7K
PCIE_FTX_C_DRX_P0 29
AD5
PCIE_FTX_DRX_N0
C951 1
2 0.1U_0402_16V7K
PCIE_FTX_C_DRX_N0 29
AC2
PCIE_FTX_DRX_P1
C952 1
2 0.1U_0402_16V7K
PCIE_FTX_C_DRX_P1 32
AC3
PCIE_FTX_DRX_N1
C953 1
2 0.1U_0402_16V7K
PCIE_FTX_C_DRX_N1 32
Q10
EC_SMB_CK 1
R538
2
0_0402_5%
EC_SMB_CK2 19,26,36
WLAN
Power Sequence of APU
AF1
UMI_FTX_MRX_P0
C956 1
2 0.1U_0402_16V7K
UMI_FTX_C_MRX_P0 13
AF2
UMI_FTX_MRX_N0
C957 1
2 0.1U_0402_16V7K
UMI_FTX_C_MRX_N0 13
AF5
UMI_FTX_MRX_P1
C958 1
2 0.1U_0402_16V7K
UMI_FTX_C_MRX_P1 13
AF4
UMI_FTX_MRX_N1
C959 1
2 0.1U_0402_16V7K
UMI_FTX_C_MRX_N1 13
AE3
UMI_FTX_MRX_P2
C960 1
2 0.1U_0402_16V7K
UMI_FTX_C_MRX_P2 13
AE2
UMI_FTX_MRX_N2
C961 1
2 0.1U_0402_16V7K
UMI_FTX_C_MRX_N2 13
AD1
UMI_FTX_MRX_P3
C962 1
2 0.1U_0402_16V7K
UMI_FTX_C_MRX_P3 13
AD2
UMI_FTX_MRX_N3
C963 1
2 0.1U_0402_16V7K
UMI_FTX_C_MRX_N3 13
K4
P_ZVSS
+1.5V
+2.5VS
Group A
+1.5VS
+CPU_CORE
Group B
+CPU_CORE_NB
2
196_0402_1%
AMD_TOPEDO_FS-1
+1.2VS
2010/08/04
Issued Date
Compal Secret Data
2010/08/04
Deciphered Date
A
EC_SMB_DA2 19,26,36
GLAN
AB5
1
R540
2
0_0402_5%
BSH111 1N_SOT23-3
AD4
AB1
EC_SMB_DA 1
R537
To EC
To HDMI
PCIE_FTX_GRX_N15
AB4
Q9
BSH111 1N_SOT23-3
L3
AB2
//
m
AC5
29 PCIE_DTX_C_FRX_N0
P_GFX_RXN14
PCIE_FTX_GRX_N13
p:
29 PCIE_DTX_C_FRX_P0
P_GFX_TXP14
M1
APU_SID 3
APU_SID
BSH111, the Vgs is:

min = 0.4V
Max = 1.3V
30K_0402_1%
L9
P_GFX_RXP14
PCIE_FTX_GRX_P13
8,14
L8
P_GFX_TXN13
M2
31.6K_0402_1%
tt
L6
P_GFX_TXP13
P_GFX_RXN13
PCIE_FTX_GRX_N12
+3VS
1 R536
L5
P_GFX_RXP13
N3
M8
P_GFX_TXN12
PCIE_FTX_GRX_P12
N2
1 R535
2 0.1U_0402_16V4Z
M7
P_GFX_RXN12
P5
C935 1
N9
GPP
N8
CPU TSI interface level shift
R9
For UMA Mux.
p.
su
2 0.1U_0402_16V7K
GRAPHICS
C923VGA@
P_GFX_RXN3
C922VGA@
P_GFX_TXP3
PCIE_FTX_GRX_P3
N6
1
R539
P_GFX_RXP3
PCIE_FTX_GRX_N2
P8
+1.2VS
P_GFX_TXN2
Y5
N5
P_GFX_TXP2
P_GFX_RXN2
W2
P_GFX_RXP2
/x
/
AA8
PCIE_GTX_C_FRX_N0
UMI-LINK
PCIE_GTX_C_FRX_P0
Title
AMD FS1 PCIE / UMI / TSI

Size Document Number
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
of
49
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
11
11
11
11
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
11 DDRA_CKE0
11 DDRA_CKE1
11 DDRA_ODT0
11 DDRA_ODT1
11 DDRA_SCS0#
11 DDRA_SCS1#
11 DDRA_SRAS#
11 DDRA_SCAS#
11 DDRA_SWE#
11 MEM_MA_RST#
11 MEM_MA_EVENT#
G14
H14
G18
H18
J21
H21
E27
E26
AE26
AD26
AB22
AA22
AB18
AA18
AA14
AA15
T21
T22
R23
R24
DDRA_CKE0
DDRA_CKE1
H28
H27
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CKE0
MA_CKE1
DDRA_SCS0#
DDRA_SCS1#
V22
AA26
MA_CS_L0
MA_CS_L1
DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#
V21
W24
W23
MA_RAS_L
MA_CAS_L
MA_WE_L
MEM_MA_RST#
MEM_MA_EVENT#
H25
T24
MA_RESET_L
MA_EVENT_L
W20
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
H17
F17
E19
J19
G16
H16
H19
F19
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
H20
F21
J23
H23
G20
E20
G22
H22
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
G24
E25
G27
G26
F23
H24
E28
F27
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
AB28
AC27
AD25
AA24
AE28
AD28
AB26
AC25
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
Y23
AA23
Y21
AA20
AB24
AD24
AA21
AC21
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
AA19
AC19
AC17
AA17
AB20
Y19
AD18
AD17
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
AA16
Y15
AA13
AC13
Y17
AB16
AB14
Y13
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
Y25
AA27
M_ZVDDIO W21
2
39.2_0402_1%
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
MA_ODT0
MA_ODT1
M_VREF
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
11
12 DDRB_SMA[15..0]
12
12
12
12
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRB_SDM[7..0]
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
12
12
12
12
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
T27
P24
P25
N27
N26
M28
M27
M24
M25
L26
U26
L27
K27
W26
K25
K24
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
U27
T28
K28
MB_BANK0
MB_BANK1
MB_BANK2
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
D14
A18
A22
C25
AF25
AG22
AH18
AD14
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
C15
B15
E18
D18
E22
D22
B26
A26
AG24
AG25
AG21
AF21
AG17
AG18
AH14
AG14
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
12 DDRB_CKE0
12 DDRB_CKE1
12 DDRB_ODT0
12 DDRB_ODT1
12 DDRB_SCS0#
12 DDRB_SCS1#
12 DDRB_SRAS#
12 DDRB_SCAS#
12 DDRB_SWE#
12 MEM_MB_RST#
12 MEM_MB_EVENT#
M_ZVDDIO
Qmbdf!uifn!dmptf!up!BQV!xjuijo!2#
CONN@
MEMORY CHANNEL B
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
DDRB_SMA14
DDRB_SMA15
/x
/
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
DDRA_ODT0
DDRA_ODT1
15mil
+1.5V
E14
J17
E21
F25
AD27
AC23
AD19
AC15
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#
+MEM_VREF
1
R541
MA_BANK0
MA_BANK1
MA_BANK2
E13
J13
H15
J15
H13
F13
F15
E15
p.
su
U24
U21
L23
DDRA_SDQ[63..0]
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
yc
om
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
p:
DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#
DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#
DDRA_SDM[7..0]
MEMORY CHANNEL A
U20
R20
R21
P22
P21
N24
N23
N20
N21
M21
U23
M22
L24
AA25
L21
L20
R26
R27
P27
P28
MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1
DDRB_CKE0
DDRB_CKE1
J26
J27
DDRB_ODT0
DDRB_ODT1
W27
Y28
DDRB_SCS0#
DDRB_SCS1#
V25
Y27
MB_CS_L0
MB_CS_L1
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
V24
V27
V28
MB_RAS_L
MB_CAS_L
MB_WE_L
MEM_MB_RST#
MEM_MB_EVENT#
J25
T25
MB_RESET_L
MB_EVENT_L
MB_CKE0
MB_CKE1
MB_ODT0
MB_ODT1
tt
11
11
11
11
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_SMA14
DDRA_SMA15
JCPU1C
11 DDRA_SMA[15..0]
CONN@
//
m
JCPU1B
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
A14
B14
D16
E16
B13
C13
B16
A16
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
C17
B18
B20
A20
E17
B17
B19
C19
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
C21
B22
C23
A24
D20
B21
E23
B23
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
E24
B25
B27
D28
B24
D24
D26
C27
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
AG26
AH26
AF23
AG23
AG27
AF27
AH24
AE24
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
AE22
AH22
AE20
AH20
AD23
AD22
AD21
AD20
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
AF19
AE18
AE16
AH16
AG20
AG19
AF17
AD16
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
AG15
AD15
AG13
AD13
AG16
AF15
AE14
AF13
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
DDRB_SDQ[63..0]
12
AMD_TOPEDO_FS-1
AMD_TOPEDO_FS-1
EVENT# pull high
0.75V reference voltage
+1.5V
2
+1.5V
4
R542
1K_0402_1%
R545 1
2 1K_0402_5% MEM_MB_EVENT#
15mil
1
2 1K_0402_5% MEM_MA_EVENT#
+MEM_VREF
R544 1
R543
1K_0402_1%
1
C964
1000P_0402_50V7K
C965
0.1U_0402_16V7K
2010/08/04
Issued Date
Compal Secret Data
2010/08/04
Deciphered Date
A
Title
AMD FS1 DDRIII I/F

Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
of
49
DP0_TXP0
F2
DP0_TXN0_C
2 0.1U_0402_16V7K
DP0_TXN0
F1
DP0_TXP1
E3
DP0_TXN1
E2
DP0_TXN1
ML_VGA_AUXP C975 1
2 0.1U_0402_16V7K
ML_VGA_AUXP_C 15
DP1_AUXN
E6
ML_VGA_AUXN C976 1
2 0.1U_0402_16V7K
ML_VGA_AUXN_C 15
DP0_TXP2
DP0_TXN2
DP2_AUXP
DP0_TXP3
DP0_TXN3
Place near APU

2 0.1U_0402_16V7K
DP1_TXP0
K2
C968 1
2 0.1U_0402_16V7K
DP1_TXN0
K1
15 ML_VGA_TXP1
C969 1
2 0.1U_0402_16V7K
DP1_TXP1
J3
DP1_TXP0
DP4_AUXN
DP0_HPD
D7
DP0_HPD
DP1_HPD
E7
DP1_HPD
DP2_HPD
J7
DP1_TXP3
DP3_HPD
H7
DP1_TXN3
DP4_HPD
G7
DP5_HPD
F7
DP_BLON
C6
DP_ENBKL
J2
15 ML_VGA_TXP2
DP1_TXP2
H2
DP1_TXP2
15 ML_VGA_TXN2
C979 1
2 0.1U_0402_16V7K
DP1_TXN2
H1
DP1_TXN2
C980 1
15 ML_VGA_TXN3
C981 1
13
APU_CLKN
13 APU_DISP_CLKP
47
AH7
APU_CLKN
AH6
CLKIN_L
APU_DISP_CLKP
AH4
DISP_CLKIN_H
AH3
APU_SVC
APU_SVC
B8
APU_SVD
APU_SVD
TSI
G3
System DP
APU_CLKP
APU_DISP_CLKN
13 APU_DISP_CLKN
47
DP1_TXN3
G2
A8
6,14
APU_SIC
6,14
APU_SID
APU_SIC
AH11
APU_SID
AG11
CLKIN_H
C5
DP_ENVDD
DP_INT_PWM
DP_AUX_ZVSS
D8
TEST6
SVD
TEST9
SIC
TEST10
SID
TEST12
TEST14
R576 1
2 1K_0402_5%
2 1K_0402_5%
APU_RST#
AF10
APU_PWRGD
AE10
APU_PROCHOT#
AD10
APU_SVC
Serial VID
APU_SVD
APU_THERMTRIP#
AG12
ALERT_L
AH12
RESET_L
TEST15
PWROK
TEST16
TEST17
PROCHOT_L
THERMTRIP_L
TEST18
TEST19
ALERT_L
TEST20
APU_TDO
A12
R791 1
2 1K_0402_5%
ALERT_L
APU_TCK
A11
APU_TMS
D12
Close to Header
APU_TRST#
B12
R592 1
2 1K_0402_5%
APU_TDI
APU_DBRDY
B11
R593 1
2 1K_0402_5%
APU_TCK
APU_DBREQ#
C11
R594 1
2 1K_0402_5%
APU_TMS
R595 1
2 1K_0402_5%
APU_TRST#
R596 1
2 300_0402_5%
E8
APU_DBREQ#
K21
AC11
Route as differential
with VSS_SENSE
47 APU_VDDNB_RUN_FB_L
47 APU_VDD_RUN_FB_L
R597 1
R600 1
47 APU_VDDNB_SEN
APU_VDD_RUN_FB_L
APU_VDD_SEN
route as differential
47 APU_VDD_SEN
TEST22
TEST23
TCK
TEST24
TMS
TRST_L
DBRDY
DBREQ_L
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST30_H
RSVD_1
RSVD_2
TEST30_L
TEST31
RSVD_3
TEST32_H
2 0_0402_5%
TEST32_L
B9
APU_VDDNB_SEN
A9
B10
TDO
2 0_0402_5%
C8
APU_VDDNB_RUN_FB_L
APU_VDDNB_SEN
route as differential
TDI
p:
APU_SID
TEST21
tt
2 1K_0402_5%
JTAG
R581 1
C12
RSVD
APU_TDI
APU_VDD_SEN
C9
A10
VSS_SENSE
TEST35
VDDIO_SENSE
FS1R1
DMAACTIVE_L
AMD_TOPEDO_FS-1
R569 1
R574 1
H12
D9
DP1_HPD 10
CRT
E9
R567 1
2 39.2_0402_1%
R571 1
2 10K_0402_5%
FS1R1 : Control S5 Dual PWR plane

In laptop, seems no use
+1.5V
VDDIO level
Need Level shift
R612 1
2 1K_0402_5%
ALLOW_STOP R577 1
2 1K_0402_5%
+1.5VS
2 150_0402_1%
MISC
APU_RST#
R578 1
2 300_0402_5%
APU_PWRGD
R580 1
2 300_0402_5%
+1.5V
2 0_0402_5%
+3VS
Asserted as an input to force the

processor into the HTC-active state
2 1K_0402_5%
R587
10K_0402_5%
R586
1K_0402_5%
APU_PROCHOT#
T9
H11
G11
APU_TEST19
R583 1
2 1K_0402_5%
F12
APU_TEST20
R584 1
2 1K_0402_5%
E11
APU_TEST21
R585 1
2 1K_0402_5%
D11
APU_TEST22
R589 1
2 1K_0402_5%
R610
F10
R582 1
2 1K_0402_5%
+1.5V
THERMTRIP shutdown
temperature: 125 degree
1K_0402_5%
T10
G12
APU_TEST24
AH10
TEST25_H
R588
10K_0402_5%
Q11
2
1
3
0_0402_5%
MMBT3904_NL_SOT23-3
1
R591
APU_TEST18
R590 1
2 1K_0402_5%
APU_THERMTRIP#
EC_THERM# 13,36,47
Indicates to the FCH that a thermal trip

has occurred. Its assertion will cause the FCH to
transition the system to S5 immediately
R609
10K_0402_5%
Q12
1
1
R611
2
0_0402_5%
H_THERMTRIP# 14
MMBT3904_NL_SOT23-3
TEST25_L
AH9
K7
+1.5V
HDT Debug conn
K8
JP1
AA12
T11
AB12
T12
M_TEST
K22
AB11
T13
AA11
T14
7
APU_TRST# R5981
TEST35
D10
Y11
FS1R1
AB10
ALLOW_STOP
C639 1
THERMDA
AE12
THERMDC
AD12
T15
2 0_0402_5%
2 10K_0402_5%
11
R603 1
2 10K_0402_5%
13
R605 1
2 10K_0402_5%
15
10
11
12
13
14
APU_TCK
APU_TMS
APU_TDI
APU_TDO
Cut on CPU side, Debug mount
10
R5991
2 0_0402_5%
APU_PWRGD
12
R6021
2 0_0402_5%
APU_RST#
14
16
APU_DBRDY
APU_DBREQ#
15
16
ALLOW_STOP 13
17
17
18
18
R606 1
2 0_0402_5% APU_TEST19
2 0.1U_0402_16V4Z
@
19
19
20
20
R608 1
2 0_0402_5% APU_TEST18
T16
Compal Secret Data

2010/08/04
SAMTE_ASP-136446-07-B
CONN@
Llano do not support this thermal die

R601 1
2010/08/04
Deciphered Date
B
2 39.2_0402_1%
HDMI
T8
H9
+1.5V
@
+3VALW
T7
G9
2 300_0402_5%
R564 1
FS1R1
T6
Issued Date
2 300_0402_5%
Chang to unpop (DG ref.)

20101111
VDD_SENSE
VDDR_SENSE
R558 1
M_TEST
VDDIO level
Need Level shift
DP_INT_PWM 10
R573 1
G10
H10
LVDS
VDDP_SENSE
VDDNB_SENSE
TEST35
APU_SIC
AA10
DP0_HPD 10
2 1K_0402_5%
2 510_0402_1%
+1.5V
R579 1
SENSE
TEST
+1.5V
2 510_0402_1%
R557 1
DP_ENVDD 10
DP_AUX_ZVSS
//
m
R575 1
13 APU_PWRGD
CTRL
13 APU_RST#
Chang to PU +1.5VS (DG ref.)
20101111
+1.5V
R548 1
TEST25_H
R559 1
DP_ENBKL 10
C7
SVC
TEST25_L
APU_HDMI_DATA 28
DP5_HPD 10
DP_DIGON
DISP_CLKIN_L
1 1.8K_0402_5%
APU_HDMI_CLK 28
DP5_HPD
DP_VARY_BL
CLK
APU_CLKP
2 0.1U_0402_16V7K
DP1_TXP3
SER.
13
100MHz
2 0.1U_0402_16V7K
DP1_TXN1
+1.5V
APU_HDMI_DATA
DP1_TXN1
1 1.8K_0402_5%
ML_VGA_AUXN R556
G6
APU_HDMI_CLK
2 0.1U_0402_16V7K
G5
F5
2 0.1U_0402_16V7K
1 1.8K_0402_5%
ML_VGA_AUXP R547
+1.2VS
VDDIO level
Need Level shift
H5
F4
C978 1
15 ML_VGA_TXP3
J6
H4
DP5_AUXP
C970 1
1 1.8K_0402_5%
AUX 2~5 are for GFX interface

use, they could be selected to I2C
or AUX logic
DP5_AUXN
DP1_TXP1
R555
J5
DP1_TXN0
15 ML_VGA_TXN1
To FCH VGA ML
100MHz_NSS
DP4_AUXP
R554
DP0_AUXN
C977 1
15 ML_VGA_TXN0
DP3_AUXP
DP3_AUXN
DISPLAY PORT 1
15 ML_VGA_TXP0
DP2_AUXN
To FCH
DP0_AUXP
2 2
B
C3
E5
DP0_TXN3
DP0_AUXN_C 26
DP1_AUXP
C2
DP0_AUXN
DP0_TXP1
T22
D1
DP0_TXP3
DP0_TXN0
If not used, pins are left unconnected (DG ref.)

20101111
To LVDS
Translator
2 2
T21
DP0_TXN2
DP0_AUXP_C 26
2 0.1U_0402_16V7K
T20
D2
2 0.1U_0402_16V7K
C974 1
T19
C972 1
DP0_AUXN
DP0_TXP2
DP0_AUXP
D5
T26
D4
/x
/
T25
DP0_AUXP
DP0_TXP0
2 0.1U_0402_16V7K
C973 1
C971 1
Place near APU
p.
su
26
DP0_TXP0_C
DISPLAY PORT MISC.
26
CONN@
DISPLAY PORT 0
To LVDS
Translator
JCPU1D
Place near APU
yc
om
Title
AMD FS1 Display / MISC / HDT

Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
of
49
VDD
+CPU_CORE
50A
VDDNB
+CPU_CORE_NB
22.5A
VDDIO
+1.5V
4A
1
+
2
p.
su
+
2
yc
om
C5
330U_D2_2V_Y
180P_0402_50V8J
C1025
180P_0402_50V8J
C1024
0.22U_0603_16V4Z
C1023
0.22U_0603_16V4Z
180P_0402_50V8J
C1030
180P_0402_50V8J
C1022
0.22U_0603_16V4Z
C1021
0.22U_0603_16V4Z
C17
4.7U_0603_6.3V6K
C16
4.7U_0603_6.3V6K
C15
/x
/
390U_2.5V_10M
C1011
390U_2.5V_10M
C1010
390U_2.5V_10M
C1009
180P_0402_50V8J
4.7U_0603_6.3V6K
C1029
//
m
VDDP decoupling
+1.2VS
120mil
p:
2
1
+
VDDA
VDDA
C1038
220U_6.3V_M
CONN@
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T11
T19
U4
U7
U10
U18
V9
V11
V19
W4
W7
W10
W12
W14
W16
W18
Y9
Y22
AA4
AA7
AB9
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AB27
AC4
AC7
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AC24
AC26
AC28
AD9
AD11
AE4
AE7
AE13
AE15
AE17
AE19
AE21
AE23
AE25
AE27
AF3
AF6
AF9
AF12
AF14
AF16
AF18
AF20
AF22
AF24
AF26
AF28
AG10
AH5
AH8
AH13
AH15
AH17
AH19
AH21
AH23
AH25
2
AMD_TOPEDO_FS-1
tt
C1037
+1.2VS
0.22U_0603_16V4Z
C1036
0.22U_0603_16V4Z
180P_0402_50V8J
160mil
C1035
C1038 change to SF000002Y00

20101228
VDDR decoupling
C1051
1000P_0402_50V7K
C1050
1000P_0402_50V7K
C1049
1000P_0402_50V7K
1000P_0402_50V7K
C1048
180P_0402_50V8J
C1047
Keep trace from Caps to APU

within 1.2"
180P_0402_50V8J
Keep trace from resistor to APU

within 0.6"
C1046
AMD_TOPEDO_FS-1
180P_0402_50V8J
Decoupling between CPU and DIMMs

across VDDIO and VSS split
C1045
A7
A13
A15
A17
A19
A21
A23
A25
B7
C4
C10
C14
C16
C18
C20
C22
C24
C26
C28
D13
D15
D17
D19
D21
D23
D25
D27
E4
E10
E12
F9
F11
F14
F16
F18
F20
F22
F24
F26
F28
G4
G8
G13
G15
G17
G19
G21
G23
G25
J4
J8
J18
J20
J22
J24
K19
L4
L7
L10
M9
M11
M19
N4
N7
N10
N18
P9
P11
P19
R4
R7
R10
R18
T9
180P_0402_50V8J
C992
180P_0402_50V8J
C991
0.01U_0402_16V7K
C990
0.01U_0402_16V7K
C998
0.01U_0402_16V7K
C1020
C989
0.22U_0603_16V4Z
0.22U_0603_16V4Z
C1008
C1019
C988
0.22U_0603_16V4Z
180P_0402_50V8J
C1007
0.22U_0603_16V4Z
180P_0402_50V8J
4.7U_0603_6.3V6K
C1018
C987
C1006
22U_0805_6.3V6M
0.22U_0603_16V4Z
C986
C1005
22U_0805_6.3V6M
0.22U_0603_16V4Z
C985
22U_0805_6.3V6M
C1004
C1003
C14
0.22U_0603_16V4Z
180P_0402_50V8J
A5
A6
B5
B6
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
C1028
VDDR
VDDR
VDDR
VDDR
C997
C984
C1013
A3
A4
B3
B4
C1034
VDDR
VDDR
VDDR
VDDR
VDDP_B_1
VDDP_B_2
VDDP_B_3
VDDP_B_4
+1.5V
10U_0603_6.3V6M
AG6
AG7
AG8
AG9
R22
R25
R28
T20
T23
T26
U22
U25
U28
V20
V23
V26
W22
W25
W28
Y24
Y26
AA28
C6
VDDP_A_1
VDDP_A_2
VDDP_A_3
VDDP_A_4
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
22U_0805_6.3V6M
22U_0805_6.3V6M
C1002
C1001
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
+1.5V
C1044
160mil
AG2
AG3
AG4
AG5
AE11
AF11
+CPU_CORE_NB
180P_0402_50V8J
180P_0402_50V8J
C1043
22U_0805_6.3V6M
C18
0.22U_0603_16V4Z
C1041
3300P_0402_50V7K
C1040
40mil
+VDDA_APU
K11
K12
K13
K14
K16
K17
K18
L18
10U_0603_6.3V6M
L1
FBMA-L11-201209-221LMA30T_0805
2
1
C7
+2.5VS
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
+1.5V
C8
160mil
+1.2VS
10U_0603_6.3V6M
+1.2VS
G28
H26
J28
K20
K23
K26
L22
L25
L28
M20
M23
M26
N22
N25
N28
P20
P23
P26
900mil
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
0.22U_0603_16V4Z
120mil
Del C1039
201012061900
JCPU1F
+CPU_CORE_NB
C1027
+1.5V
22U_0805_6.3V6M
160mil
J9
J10
J11
J12
J14
J16
K9
K10
22U_0805_6.3V6M
900mil
+CPU_CORE_NB
+CPU_CORE
T6
T10
T18
U1
U11
U19
V3
V6
V10
V18
W1
W11
W13
W15
W17
W19
Y3
Y6
Y10
Y12
Y14
Y16
Y18
Y20
AA1
AB3
AB6
AC1
AD3
AD6
AE1
C1012
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
C983
CPU_CORE
330uF X 4
22uF X 11
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
2000mil
C1000
C1
D3
D6
E1
F3
F6
F8
G1
H3
H6
H8
J1
K3
K6
L1
L11
L19
M3
M6
M10
M18
N1
N11
N19
P3
P6
P10
P18
R1
R11
R19
T3
CONN@
22U_0805_6.3V6M
+CPU_CORE
3A / 3.5A
JCPU1E
22U_0805_6.3V6M
2000mil
0.75A
CORE_NB
330uF X 2
22uF X 4
+CPU_CORE
C996
VDDA
+2.5VS
CPU BOTTOM SIDE DECOUPLING

22U_0805_6.3V6M
C982
VDDP / VDDR
+1.2VS
Consumption
Power Name
+1.2VS
Demo Board Capacitor (include PWM side)
C13
CPU_CORE
470uF x 6
22uF x 9
0.22uF x 2
180pF x 2
10nF x 3
4.7U_0603_6.3V6K
C12
4.7U_0603_6.3V6K
C11
4.7U_0603_6.3V6K
C10
4.7U_0603_6.3V6K
0.22U_0603_16V4Z
C1055
0.22U_0603_16V4Z
C1054
0.22U_0603_16V4Z
C1053
0.22U_0603_16V4Z
C1052
VDDIO_SUS
(CPU side)
680uF x 1
330uF x 1
22uF x 3
4.7uF x 4
0.22uF x 6
180pF x 4
2010/08/04
VDDP/R_PWM VDDP
470uF x 2
10uF x 3
10uF x 1
0.22uF x 2
180pF x 2
VDDR
4.7uF x 4
0.22uF x 4
1nF x 4
180pF x 4

2010/08/04
Deciphered Date
A
VDDIO_SUS
(DIMM x2)
100uF x 4
0.1uF
Compal Secret Data
Issued Date
CORE_NB
470uF x 4
22uF x 6
0.22uF x 2
180uF x 3
Title
AMD FS1 PWR / GND

Custom
Rev
0.02
QBL60 LA-7552P
Date:
Sheet
E
of
49
+3VS
+3VS
APU_ENBKL
E
@
R620
100K_0402_5%
+3VS
@
Q14
2N7002_SOT23
/x
/
DP1_HPD 8
1
100K_0402_5%
1
R633
DP_ENVDD
@
Q19
2
2
2.2K_0402_5% B
//
m
@
R634
100K_0402_5%
2
G
Q18
@
2N7002_SOT23
+3VS
tt
p:
APU_ENVDD 27
D
2
R659
@
R632
4.7K_0402_5%
R635
47K_0402_5%
R636
4.7K_0402_5%
2
DP5_HPD 8
@
R631
100K_0402_5%
1
R637
8 DP_INT_PWM
Q21
2
2
2.2K_0402_5% B
R638
4.7K_0402_5%
MMBT3904_NL_SOT23-3
APU_INVT_PWM 26,27
1
Q17
3
1
MMBT3904_NL_SOT23-3
E
APU_HDMI_HPD
2 2
From HDMI Conn

28 APU_HDMI_HPD
R630
4.7K_0402_5%
+3VS
R628
10K_0402_5%
@
R629
1K_0402_5%
HDMI HPD
yc
om
+1.5VS
ENBKL 36
+3VS
1
100K_0402_5%
p.
su
2
R627
2 0_0402_5%
15 FCH_CRT_HPD
R624 1 @
MMBT3904_NL_SOT23-3
Q16
3
1
MMBT3904_NL_SOT23-3
FCH_CRT_HPD
2 2
APU_ENBKL
From FCH
R623
4.7K_0402_5%
R621
10K_0402_5%
@
R622
1K_0402_5%
CRT HPD
+1.5VS
1
1
@
1
R619
DP_ENBKL
2
MMBT3904_NL_SOT23-3
1
100K_0402_5%
@
Q15
2
2
2.2K_0402_5% B
2
G
DP0_HPD 8
2
R618
@
R614
4.7K_0402_5%
1
Q13
3
1
MMBT3904_NL_SOT23-3
LVDS_HPD
LVDS_HPD
R616
4.7K_0402_5%
26
From Translator
@
R617
100K_0402_5%
@
R615
1K_0402_5%
Translator HPD
2 2
R613
10K_0402_5%
+1.5VS
2
G
Q20
2N7002_SOT23
Q15 / Q19 / Q21 change to SB000006A00

20101228
Compal Secret Data
Issued Date
2010/08/04
2010/08/04
Deciphered Date
Title
AMD FS1 Singal Level Shifter
2

Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
1
10
of
49
+1.5V
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
7
7
DDRA_CLK0
DDRA_CLK0#
DDRA_SCS1#
DDRA_SMA13
DDRA_SCS1#
7 DDRA_SDQS4#
7 DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
7 DDRA_SDQS6#
7 DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
R643
10K_0402_5%
1
2
+3VS
+3VS
C1080
C1081
R645
2.2U_0603_6.3V4Z
0.1U_0402_16V4Z
2
G1
G2
206
DDRA_SDQS3# 7
DDRA_SDQS3 7
+0.75VS
C1073
C1074
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C1075
1
0.1U_0402_16V4Z
C1076
1
0.1U_0402_16V4Z
2
DDRA_CKE1
1
0.1U_0402_16V4Z
DDRA_CKE1 7
DDRA_SMA15
DDRA_SMA14
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_CLK1
DDRA_CLK1#
DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_ODT1
DDRA_CLK1 7
DDRA_CLK1# 7
DDRA_SBS1# 7
DDRA_SRAS# 7
+VREF_CA
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ44
DDRA_SDQ45
C1078
1
C1066
2
0.1U_0402_16V4Z
Add C1106
20101101
C1079
2
4.7U_0603_6.3V6K
+VREF_CA
+1.5V
+1.5V
R640
1K_0402_1%
R639
1K_0402_1%
15mil
DDRA_SCS0# 7
DDRA_ODT0 7
DDRA_ODT1 7
DDRA_SDM4
C1106
+VREF_DQ
15mil
DDRA_SDQ36
DDRA_SDQ37
+1.5V
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQS5#
DDRA_SDQS5
15mil
+VREF_DQ
C1061
C1062
R641
1K_0402_1%
+VREF_CA
C1064
C1065
R642
1K_0402_1%
1000P_0402_50V7K
DDRA_SDQS5# 7
DDRA_SDQS5 7
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDM6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQS7# 7
DDRA_SDQS7 7
DDRA_SDQ62
DDRA_SDQ63
MEM_MA_EVENT#
MEM_MA_EVENT# 7
FCH_SDATA0 12,14,32
FCH_SCLK0 12,14,32
+0.75VS
4
TYCO_2-2013310-1
2010/08/04
Issued Date
Compal Secret Data
DIMM_A STD H:9.2mm
2010/08/04
Deciphered Date
<Address: 00>
A
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C1072
10K_0402_5%
205
DDRA_SDQS3#
DDRA_SDQS3
C1060
DDRA_SDQ32
DDRA_SDQ33
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
0.1U_0402_16V4Z
2
C1071
C1063
DDRA_SWE#
DDRA_SCAS#
1
0.1U_0402_16V4Z
C1077
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
C1070
4.7U_0603_6.3V6K
DDRA_SBS0#
DDRA_SWE#
DDRA_SCAS#
DDRA_SMA10
DDRA_SBS0#
C1069
DDRA_SDQ28
DDRA_SDQ29
4.7U_0603_6.3V6K
7
7
7
DDRA_CLK0
DDRA_CLK0#
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
1
0.1U_0402_16V4Z
DDRA_SDQ22
DDRA_SDQ23
0.1U_0402_16V4Z
2
C1068
DDRA_SMA12
DDRA_SMA9
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
0.1U_0402_16V4Z
2
C1067
DDRA_SBS2#
DDRA_SDM2
DDRA_SBS2#
DDRA_CKE0
+1.5V
DDRA_SDQ20
DDRA_SDQ21
DDRA_CKE0
Place near DIMM1
MEM_MA_RST# 7
DDRA_SDQ14
DDRA_SDQ15
1000P_0402_50V7K
7
2
DDRA_SDM1
MEM_MA_RST#
0.1U_0402_16V4Z
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ12
DDRA_SDQ13
/x
/
DDRA_SDM3
DDRA_SMA[0..15] 7
DDRA_SDQ24
DDRA_SDQ25
DDRA_SMA[0..15]
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQS0# 7
DDRA_SDQS0 7
DDRA_SDM[0..7] 7
7 DDRA_SDQS2#
7 DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS2
DDRA_SDQS0#
DDRA_SDQS0
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
1000P_0402_50V7K
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ[0..63]
DDRA_SDQ4
DDRA_SDQ5
p.
su
DDRA_SDQS1#
DDRA_SDQS1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
0.1U_0402_16V4Z
7 DDRA_SDQS1#
7 DDRA_SDQS1
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
yc
om
DDRA_SDQ8
DDRA_SDQ9
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
//
m
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
p:
DDRA_SDQ2
DDRA_SDQ3
JDIMM1
tt
DDRA_SDM0
+1.5V
15mil
DDRA_SDQ0
DDRA_SDQ1
+VREF_DQ
Title
DDRIII SO-DIMM 1
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
11
of
49
+1.5V
DDRB_SDQ2
DDRB_SDQ3
1
DDRB_SDQ8
DDRB_SDQ9
7 DDRB_SDQS1#
7 DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
7 DDRB_SDQS2#
7 DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26
DDRB_SDQ27
JDIMM2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
205
G1
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
DDRB_SDQ[0..63]
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQS0# 7
DDRB_SDQS0 7
DDRB_SDM[0..7] 7
DDRB_SMA[0..15]
DDRB_SMA[0..15] 7
DDRB_SDQ6
DDRB_SDQ7
1
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDM1
MEM_MB_RST#
MEM_MB_RST# 7
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ20
DDRB_SDQ21
Place near DIMM2
DDRB_SDM2
DDRB_SDQ22
DDRB_SDQ23
+1.5V
DDRB_SDQ28
DDRB_SDQ29
0.1U_0402_16V4Z
2
C1089
DDRB_SDQS3#
DDRB_SDQS3
DDRB_SDQS3# 7
DDRB_SDQS3 7
0.1U_0402_16V4Z
2
C1090
1
0.1U_0402_16V4Z
C1091
1
0.1U_0402_16V4Z
DDRB_SDQ30
DDRB_SDQ31
C1093
1
0.1U_0402_16V4Z
+0.75VS
DDRB_SMA3
DDRB_SMA1
7
7
DDRB_CLK0
DDRB_CLK0#
DDRB_SBS0#
7
7
DDRB_SWE#
DDRB_SCAS#
DDRB_SCS1#
DDRB_CLK0
DDRB_CLK0#
DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#
DDRB_SCAS#
DDRB_SMA13
DDRB_SCS1#
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
7 DDRB_SDQS6#
7 DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
R646
10K_0402_5%
1
2
+3VS
R648
206
DDRB_CLK1 7
DDRB_CLK1# 7
DDRB_SBS1#
DDRB_SRAS#
DDRB_SBS1# 7
DDRB_SRAS# 7
DDRB_SCS0#
DDRB_ODT0
DDRB_SCS0# 7
DDRB_ODT0 7
DDRB_ODT1
DDRB_ODT1 7
DDRB_SDM4
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ44
DDRB_SDQ45
C1088
1000P_0402_50V7K
1
+
@
C9
330U_X_2VM_R6M
+VREF_CA
15mil
+VREF_CA
DDRB_SDQ36
DDRB_SDQ37
2
4.7U_0603_6.3V6K
+VREF_DQ
15mil
C1098
1
15mil
+VREF_DQ
C1083
C1084
+VREF_CA
C1086
C1087
DDRB_SDQS5#
DDRB_SDQS5
DDRB_SDQS5# 7
DDRB_SDQS5 7
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDM6
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
DDRB_SDQS7# 7
DDRB_SDQS7 7
DDRB_SDQ62
DDRB_SDQ63
MEM_MB_EVENT#
MEM_MB_EVENT# 7
FCH_SDATA0 11,14,32
FCH_SCLK0 11,14,32
+0.75VS
4
TYCO_2-2013289-1
10K_0402_5%
G2
DDRB_CLK1
DDRB_CLK1#
Add C1107
20101101
C1101
C1085
DDRB_SDM5
DDRB_SMA2
DDRB_SMA0
1
0.1U_0402_16V4Z
+1.5V
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDRB_SDQ40
DDRB_SDQ41
DDRB_SMA6
DDRB_SMA4
C1100
+1.5V
0.1U_0402_16V4Z
2
C1097
@
1
C1107
4.7U_0603_6.3V6K
1
0.1U_0402_16V4Z
C1082
DDRB_SDQ34
DDRB_SDQ35
C1099
DDRB_SMA11
DDRB_SMA7
0.1U_0402_16V4Z
DDRB_SDQS4#
DDRB_SDQS4
0.1U_0402_16V4Z
2
4.7U_0603_6.3V6K
7 DDRB_SDQS4#
7 DDRB_SDQS4
DDRB_SMA15
DDRB_SMA14
1000P_0402_50V7K
DDRB_SMA8
DDRB_SMA5
DDRB_CKE1 7
p.
su
DDRB_SMA12
DDRB_SMA9
DDRB_CKE1
yc
om
DDRB_SBS2#
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
//
m
DDRB_SBS2#
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
1
0.1U_0402_16V4Z
C1096
p:
DDRB_CKE0
0.1U_0402_16V4Z
2
C1095
tt
DDRB_CKE0
C1094
0.1U_0402_16V4Z
2
C1092
1000P_0402_50V7K
DDRB_SDM0
+1.5V
15mil
DDRB_SDQ0
DDRB_SDQ1
/x
/
+VREF_DQ
2010/08/04
Deciphered Date
<Address: 01>
A
2010/08/04
Issued Date
Compal Secret Data
DIMM_B STD H:5.2mm

B
Title
DDRIII SO-DIMM 2
Custom
Date:
Rev
0.03
QBL60 LA-7552P
Sheet
E
12
of
49
C1195
150P_0402_50V8J
2
U25A
HUDSON-2
CLK_PCIE_MINI1_R J27
0_0402_5%
2
CLK_PCIE_MINI1#_R K26
0_0402_5%
2
F33
F31
SS
E33
E31
M23
M24
M27
M26
N25
N26
R23
R24
N27
R27
R657 1
31 CLK_SD_48M
22_0402_5% CLK_SD_48M_R J26
25M_X1
2
0_0402_5%
1
R856
1
2
C1200
27P_0402_50V8J
EMI2
R858
1M_0402_5%
X1
25M_X2
C33
GPP_CLK3P
GPP_CLK3N
GPP_CLK4P
GPP_CLK4N
GPP_CLK5P
GPP_CLK5N
GPP_CLK6P
GPP_CLK6N
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/CLK_REQ6#/GPIO49
SERIRQ/GPIO48
GPP_CLK7P
GPP_CLK7N
GPP_CLK8P
GPP_CLK8N
DMA_ACTIVE#
PROCHOT#
APU_PG
LDT_STP#
APU_RST#
14M_25M_48M_OSC
25M_X1
S5_CORE_EN
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
32K_X1
B25
D25
D27
C28
A26
A29
A31
B27
AE27
AE19
G25
E28
E26
G26
F26
NC
32K_X2
5
P
G
5
R836
4.7K_0402_5%
2 2
PE_GPIO0 18
PE_GPIO1 25,36
0_0402_5%
1
1
Q38
MMBT3904_NL_SOT23-3
APU_PWRGD_L 47
PE_GPIO1 1
R109
2
10K_0402_5%
LPC_CLK0_EC_R R8431
2 LPC_CLK0_EC
R6711 22_0402_5%
2
LPC_CLK1_R
R8441 22_0402_5%
2
LPC_AD0
0_0402_5%
LPC_AD1
LPC_AD2
LPC_AD3
LPC_CLK0_EC 16,36
CLK_PCI_DB 32
LPC_CLK1 16
LPC_AD0 32,36
LPC_AD1 32,36
LPC_AD2 32,36
LPC_AD3 32,36
LPC_FRAME# 32,36
CONN@
R853 1
APU_PWRGD
ALLOW_STOP 8
EC_THERM# 8,36,47
APU_PWRGD 8
2 0_0402_5%
H7
F1
F3
E6
R855 1
2 22_0402_5%
APU_PG/APU_RST#/LDT_STP# : OD pin
DMA_ACTIVE# : IN/OD, 0.8V threshold
PROCHOT# : IN, 0.8V threshold
LDT_STP : No use, NC
DMA active. The FCH drives the DMA_ACTIVE# to
APU to notify DMA activity. This will cause the APU
to reestablish the UMI link quicker.
APU_RST# 8
G2
32K_X1
G4
32K_X2
+RTCBATT
RTC_CLK 16,36
R857
1K_0402_5%
RTCVCC_R
1 C1203
D23
2
1
R859
2
510_0402_5%
W=20mils
CLRP1
SHORT PADS
C1204
for Clear CMOS
2
@
+CHGRTC
DAN202UT106_SC70-3
4
Compal Secret Data

2010/08/04
SERIRQ 36
C1202 1
Issued Date
JRTC1
SUYIN_060003HA002G202ZL
2010/08/04
Deciphered Date
Close to HUDSON-M2
P
1
R834
10K_0402_5%
Q38 change to SB000006A00

20101228
+RTCBATT
32.768KHZ_12.5PF_Q13MC14610002
22P_0402_50V8J
NC
OSC
+3VS
2
0.1U_0402_16V4Z
1
2
C1206 1
OSC
G
3
1
R842
2
0_0402_5%
+1.5VS
T24
Y4
VGA_PWRGD_R
2
0_0402_5%
APU_PWRGD
32K_X1
1
R832
T23
R861
20M_0402_5%
2
VGA_PWRGD_R
HUDSON-M2_FCBGA656
M2@
22P_0402_50V8J
1
R830 @
+RTCVCC
32K_X2
1
2
R831 @ 100K_0402_5%
16
16
16
16
16
25M_X2
1
2
C1201
27P_0402_50V8J
C1205 1
PCI CLKS
GPP_CLK2P
GPP_CLK2N
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
AF18
AE18
AC16
AD18
25MHZ_20PF_7A25000012
C31
GPP_CLK1P
GPP_CLK1N
CLK_PCIE_MINI1 R644 1
CLK_PCIE_MINI1#R572 1
INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
NC7SZ08P5X_NL_SC70-5
32 CLK_PCIE_MINI1
32 CLK_PCIE_MINI1#
GPP_CLK0P
GPP_CLK0N
0.1U_0402_16V4Z
WLAN
H27
H28
@U27
@
U27
2 B
VGA_PWRGD
25,48 VGA_PWRGD
CLK_PCIE_LAN_R
0_0402_5%
2
CLK_PCIE_LAN#_R
0_0402_5%
2
1
2
R835
0_0402_5%
+3VALW
@ C1199
1
2
CLK_PCIE_LAN R604 1
CLK_PCIE_LAN# R625 1
PLT_RST# 18,29,32
U26
GLAN
29 CLK_PCIE_LAN
29 CLK_PCIE_LAN#
R826
8.2K_0402_5%
@
4
0.1U_0402_16V4Z
VGA
SLT_GFX_CLKP
SLT_GFX_CLKN
@
1
J30
K29
C1188
150P_0402_50V8J
CLK_PEG_VGA
CLK_PEG_VGA#
18 CLK_PEG_VGA
18 CLK_PEG_VGA#
APU_CLKP
APU_CLKN
2 33_0402_5%
2
1U_0402_6.3V4Z
T24
T23
DISP2_CLKP
DISP2_CLKN
2
R825 1
APU_CLKP
APU_CLKN
DISP_CLKP
DISP_CLKN
APU_PCIE_RST#_C
8 APU_CLKP
8 APU_CLKN
PCIE_RCLKP
PCIE_RCLKN
C1193
1
2
0.1U_0402_16V4Z
H33
H31
CLK_CALRN
AJ3
AL5
AG4
AL6
AH3
AJ5
AL1
AN5
AN6
AJ1
AL8
AL3
AM7
AJ6
AK7
AN8
AG9
AM11
AJ10
AL12
AK11
AN12
AG12
AE12
AC12
AE13
AF13
AH13
AH14
AD15
AC15
AE16
AN3
AJ8
AN10
AD12
AG10
AK9
AL10
AF10
AE10
AH1
AM9
AH8
AG15
AG13
AF15
AM17
AD16
AD13
AD21
AK17
AD19
AH9
+3VALW
For PCIE device reset on FS1

(GLAN,WLAN)
/x
/
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT0#
GNT1#/GPO44
GNT2#/SD_LED/GPO45
GNT3#/CLK_REQ7#/GPIO46
CLKRUN#
LOCK#
PCI_CLK3 16
PCI_CLK4 16
p.
su
AA27
AA26
W27
V27
V26
W26
W24
W23
R26
T26
APU DISP
APU
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
G30
G28
APU_DISP_CLKP
APU_DISP_CLKN
8 APU_DISP_CLKP
8 APU_DISP_CLKN
V33
V31
W30
W32
AB26
AB27
AA24
AA23
F27
For "EXT" CLK mode, input to PCIE,
SS
NSS
2 2K_0402_1% CLK_CALRN
R833 1
+1.1VS_CKVDD
PCIE_CALRP
PCIE_CALRN
PCIRST#
AB5
PCI_CLK1 16
yc
om
AF29
AF31
AF3
AF1
AF5
AG2
AF6
//
m
UMI_RX0P
UMI_RX0N
UMI_RX1P
UMI_RX1N
UMI_RX2P
UMI_RX2N
UMI_RX3P
UMI_RX3N
PCI INTERFACE
AB33
AB31
AB28
AB29
Y33
Y31
Y28
Y29
UMI_TX0P
UMI_TX0N
UMI_TX1P
UMI_TX1N
UMI_TX2P
UMI_TX2N
UMI_TX3P
UMI_TX3N
LPC
UMI_FTX_C_MRX_P0
UMI_FTX_C_MRX_N0
UMI_FTX_C_MRX_P1
UMI_FTX_C_MRX_N1
UMI_FTX_C_MRX_P2
UMI_FTX_C_MRX_N2
UMI_FTX_C_MRX_P3
UMI_FTX_C_MRX_N3
2 590_0402_1% PCIE_CALRP
2 2K_0402_1% PCIE_CALRN
R827 1
R828 1
+PCIE_VDDR_FCH
AE30
AE32
AD33
AD31
AD28
AD29
AC30
AC32
PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
p:
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
APU
UMI_FTX_C_MRX_P0
UMI_FTX_C_MRX_N0
UMI_FTX_C_MRX_P1
UMI_FTX_C_MRX_N1
UMI_FTX_C_MRX_P2
UMI_FTX_C_MRX_N2
UMI_FTX_C_MRX_P3
UMI_FTX_C_MRX_N3
2
2
2
2
2
2
2
2
S5 PLUS
6
6
6
6
6
6
6
6
C1189 1
C1190 1
C1191 1
C1192 1
C1196 1
C1197 1
C1198 1
C1194 1
PCI EXPRESS INTERFACES
UMI_MTX_C_FRX_P0
UMI_MTX_C_FRX_N0
UMI_MTX_C_FRX_P1
UMI_MTX_C_FRX_N1
UMI_MTX_C_FRX_P2
UMI_MTX_C_FRX_N2
UMI_MTX_C_FRX_P3
UMI_MTX_C_FRX_N3
CLOCK GENERATOR
6
6
6
6
6
6
6
6
UMI_MTX_FRX_P0
UMI_MTX_FRX_N0
UMI_MTX_FRX_P1
UMI_MTX_FRX_N1
UMI_MTX_FRX_P2
UMI_MTX_FRX_N2
UMI_MTX_FRX_P3
UMI_MTX_FRX_N3
PCIE_RST#
A_RST#
tt
PCI Host Bus Reset (To EC)
APU_PCIE_RST#_CAE2
A_RST#_R
AD5
2 33_0402_5%
R829
36 A_RST#
Title
Hudson-M2/M3-UMI/PCI/CLOCK/LPC/RTC
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
13
of
49
PCIE_RST2 : Reset PCIE device on Hudson2

U25D
U2
36 EC_RSMRST#
2 0_0402_5% LAN_CLKREQ#_1
Modify 2010212-AMD request

FCH_SCLK0
FCH_SDATA0
FCH_SCLK1
FCH_SDATA1
11,12,32 FCH_SCLK0
11,12,32 FCH_SDATA0
SM bus 0-->S0 PWR domain

SM bus 1-->S5 PWR domain
VGA_PD: Support MLDAC power
save if connect
0: MLDAC power on
1: MLDAC power off
16
2
10K_0402_5%
MINI1_CLKREQ#
32 MINI1_CLKREQ#
1
R873
VGA_PD
VGA_PD
T29
M7
R8
T1
P6
F5
P5
J7
T8
T28
34
34
USB_OC1#
USB_OC0#
USB_OC1#
USB_OC0#
R866 1
R867 1
30 HDA_BITCLK_AUDIO
30 HDA_SDOUT_AUDIO
30 HDA_SDIN0
H_THERMTRIP#
+3VALW
FCH_SCLK1
MINI1_CLKREQ#
1
2
Project SKU ID
GPIO189 (use VGA)
L(NO)
R44
L(NO)
R46
L(15")
R48
GPIO190 (use PX)

GPIO191
Add Project ID Table

201011301600
LAN_CLKREQ#_1
2
8.2K_0402_5%
D21
C20
D23
C22
PS2KB_DAT/GPIO189
PS2KB_CLK/GPIO190
PS2M_DAT/GPIO191
PS2M_CLK/GPIO192
F21
E20
F20
A22
E18
A20
J18
H18
G18
B21
K18
D19
A18
C18
B19
B17
A24
D17
KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/GPIO223
KSO_15/GPIO224
KSO_16/GPIO225
KSO_17/GPIO226
tt
FCH_GPIO189
FCH_GPIO190
FCH_GPIO191
H(YES)
R43
H(YES)
R45
H(17")
R47
USB 1.1
USB_HSD12P
USB_HSD12N
USB_HSD11P
USB_HSD11N
Hudson-M2
EHCI CTL
DEV 22, Fn 2
<Disable CTL of M2>
K10
J12
G12
F12
USB_HSD9P
USB_HSD9N
B11
D11
USB_HSD8P
USB_HSD8N
E10
F10
USB_HSD7P
USB_HSD7N
C10
A10
USB20_P10
USB20_N10
USB20_P10 34
USB20_N10 34
H9
G9
USB_HSD5P
USB_HSD5N
A8
C8
USB_HSD4P
USB_HSD4N
F8
E8
USB20_P4
USB20_N4
USB_HSD3P
USB_HSD3N
C6
A6
USB20_P3
USB20_N3
USB_HSD2P
USB_HSD2N
C5
A5
USB20_P2
USB20_N2
USB_HSD1P
USB_HSD1N
C1
C3
USB20_P1
USB20_N1
E1
E3
USB20_P0
USB20_N0
USBSS_CALRP
USBSS_CALRN
C16
A16
USBSS_CALRP
USBSS_CALRN
USB_SS_TX3P
USB_SS_TX3N
A14
C14
USB_SS_TX2P
USB_SS_TX2N
USB_SS_RX2P
USB_SS_RX2N
USB_SS_TX1P
USB_SS_TX1N
USB_SS_TX0P
USB_SS_TX0N
USB_SS_RX0P
USB_SS_RX0N
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
Hudson-M3
xHCI CTL
DEV 16, Fn 1
xHCI CTL
DEV 16, Fn 0
USB1
Hudson-M2/M3
EHCI CTL
DEV 19, Fn 2
USB_HSD6P
USB_HSD6N
USB_SS_RX3P
USB_SS_RX3N
2 11.8K_0402_1%
H6
H5
K12
K13
USB_SS_RX1P
USB_SS_RX1N
EMBEDDED CTRL
R863 1
H10
G10
USB_HSD10P
USB_HSD10N
USB_HSD0P
USB_HSD0N
PS2_DAT/SDA4/GPIO187
PS2_CLK/CEC/SCL4/GPIO188
SPI_CS2#/GBE_STAT2/GPIO166
1
2
1
1
2
FCH_SDATA0
@
R44
8.2K_0402_5%
FCH_SCLK0
2
2.2K_0402_5%
2
2.2K_0402_5%
2
8.2K_0402_5%
@
R46
8.2K_0402_5%
R48
8.2K_0402_5%
1
R940
FCH_PCIE_WAKE#
@
R43
8.2K_0402_5%
EC_LID_OUT#
FCH_GPIO189
FCH_GPIO190
FCH_GPIO191
FCH_SDATA1
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AZ_SDIN3/GPIO170
AZ_SYNC
AZ_RST#
K19
J19
J21
T27
USB_OC1#
+3VS
1
R880
1
R881
1
R882
2 33_0402_5%
2 33_0402_5%
BLINK/USB_OC7#/GEVENT18#
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GEVENT17#
USB_OC4#/IR_RX0/GEVENT16#
USB_OC3#/AC_PRES/TDO/GEVENT15#
USB_OC2#/TCK/GEVENT14#
USB_OC1#/TDI/GEVENT13#
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#
AB3
AB1
AA2
Y5
Y3
Y1
AD6
AE4
USB_OC0#
@
R45
8.2K_0402_5%
2
100K_0402_5%
2
100K_0402_5%
2
10K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
R47
8.2K_0402_5%
1
R55
1
R54
1
R871
1
R874
1
R876
1
R877
1
R878
R868 1
R869 1
30 HDA_SYNC_AUDIO
30 HDA_RST_AUDIO#
+3VALW
HDA_BITCLK
HDA_SDOUT
HDA_SDIN0
HDA_SDIN1
T31
T35
HDA_SYNC
HDA_RST#
2 33_0402_5%
2 33_0402_5%
CLK_REQ4#/SATA_IS0#/GPIO64
SMARTVOLT1/SATA_IS2#/GPIO50
SATA_IS4#/FANOUT3/GPIO55
SATA_IS5#/FANIN3/GPIO59
SPKR/GPIO66
SCL0/GPIO43
SDA0/GPIO47
SCL1/GPIO227
SDA1/GPIO228
CLK_REQ2#/FANIN4/GPIO62
CLK_REQ1#/FANOUT4/GPIO61
IR_LED#/LLB#/GPIO184
SMARTVOLT2/SHUTDOWN#/GPIO51
DDR3_RST#/GEVENT7#/VGA_PD
GBE_LED0/GPIO183
SPI_HOLD#/GBE_LED1/GEVENT9#
GBE_LED2/GEVENT10#
GBE_STAT0/GEVENT11#
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#
//
m
USB_HSD13P
USB_HSD13N
RSMRST#
AG24
AE24
AE26
AF22
AH17
AG18
AF24
AD26
AD25
T7
R7
AG25
AG22
J2
AG26
V8
W8
Y6
V10
AA8
AF25
p:
R81
29 LAN_CLKREQ#
USB_FSD0P/GPIO185
USB_FSD0N
USB_RCOMP
/x
/
1
2
R862 10K_0402_5%
+3VS
H1
H3
p.
su
8 H_THERMTRIP#
@
1
2 SYS_RESET#
R18 10K_0402_5%
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/GEVENT23#
LPC_PD#/GEVENT5#
SYS_RESET#/GEVENT19#
WAKE#/GEVENT8#
IR_RX1/GEVENT20#
THRMTRIP#/SMBALERT#/GEVENT2#
WD_PWRGD
USB_FSD1P/GPIO186
USB_FSD1N
USB 2.0
+3VALW
FCH_PCIE_WAKE#
GA20IN/GEVENT0#
B9
USB 3.0
AG19
R9
C26
T5
U4
K1
V7
R10
AF19
ACPI / WAKE UP EVENTS
EC_KBRST#
EC_SCI#
EC_SMI#
G8
USB_RCOMP
GPIO
EC_GA20
36
36
36
TEST0
TEST1/TMS
TEST2
USB OC
36
AE22
29,32,36 FCH_PCIE_WAKE#
THERMTRIP:
Need level shift from +3VALW to +1.5V
T9
T10
V9
USBCLK/14M_25M_48M_OSC
yc
om
TEST0
TEST1
TEST2
PCIE_RST2#/PCI_PME#/GEVENT4#
RI#/GEVENT22#
SPI_CS3#/GBE_STAT1/GEVENT21#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
HD AUDIO
36
SLP_S3#
36
SLP_S5#
36 PBTN_OUT#
36 FCH_PWRGD
USB MISC
HUDSON-2
AB6
R2
W7
T3
W2
J4
N7
EC_LID_OUT#
36 EC_LID_OUT#
USB20_P4 31
USB20_N4 31
USB20_P3 32
USB20_N3 32
USB20_P2 27
USB20_N2 27
USB20_P1 30
USB20_N1 30
USB20_P0 34
USB20_N0 34
R864 1 M3@
R865 1
M3@
CardReder
WLAN(BT)
CMOS
USB3
USB2
2 1K_0402_1%
2 1K_0402_1%
Hudson-M2/M3
EHCI CTL
DEV 18, Fn 2
2
+FCH_VDD_11_SSUSB_S
Hudson-M3
xHCI CTL
DEV 16, Fn 1
xHCI CTL
DEV 16, Fn 0
C12
A12
D15
B15
E14
F14
F15
G15
H13
G13
J16
H16
USB30_MTX_DRX_P0
USB30_MTX_DRX_N0
J15
K15
USB30_MRX_DTX_P0
USB30_MRX_DTX_N0
H19
G19
G22
G21
E22
H22
J22
H21
R870 1
R872 1
APU_SIC
APU_SID
C39 1
C37 1
M3@
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
M3@
USB30_MTX_C_DRX_P0 34
USB30_MTX_C_DRX_N0 34
On board
USB Conn
USB30_MRX_DTX_P0 34
USB30_MRX_DTX_N0 34
2 10K_0402_5%
2 10K_0402_5%
APU_SIC 6,8
APU_SID 6,8
EC_PWM2
EC_PWM2 16
K21
K22
F22
F24
E24
B23
C24
F18
HUDSON-M2_FCBGA656
M2@
Modify 20101111
1
R884
@
1
R885
@
1
R886
@
1
R888
EC_RSMRST#
2
2.2K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
+3VALW
For FCH internal debug use
HDA_BITCLK
R887
HDA_SDIN0
R889
HDA_SDIN1
R890
TEST0
2.2K_0402_5%
TEST1
2.2K_0402_5%
TEST2
2.2K_0402_5%
2010/08/04
Issued Date
Compal Secret Data
2010/08/04
Deciphered Date
B
Title
Hudson-M2/M3-ACPI/USB/EC
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
14
of
49
SYS BIOS ROM
U25B
+3VALW
0.1U_0402_16V4Z
2
HUDSON-2
33 SATA_STX_DRX_P1
33 SATA_STX_DRX_N1
AN22
AL22
SATA_TX1P
SATA_TX1N
33 SATA_DTX_C_SRX_N1
33 SATA_DTX_C_SRX_P1
AH20
AJ20
SATA_TX3P
SATA_TX3N
SATA_RX3N
SATA_RX3P
AL26
AN26
SATA_TX4P
SATA_TX4N
AJ26
AH26
SATA_RX4N
SATA_RX4P
AN29
AL28
SATA_TX5P
SATA_TX5N
AK27
AM27
SATA_RX5N
SATA_RX5P
AL29
AN31
NC6
NC7
AL31
AL33
NC8
NC9
AJ33
AJ31
+AVDD_SATA
SATA_RX2N
SATA_RX2P
AN24
AL24
AH33
AH31
SATA_TX2P
SATA_TX2N
1K_0402_1% 2
1 R899
SATA_CALRP
AF28
1K_0402_1% 2
1 R900
SATA_CALRN
AF27
SATA_LED#
AD22
VGA_RED
NC10
NC11
NC12
NC13
SATA_LED#
AF21
AG21
WL_OFF#
32 WL_OFF#
10K_0402_5%
R14
K5
10K_0402_5%
1
R15
K3
10K_0402_5%
1
R16
AK15
AN16
AL16
K6
R13
ML_VGA_L0P
ML_VGA_L0N
ML_VGA_L1P
ML_VGA_L1N
ML_VGA_L2P
ML_VGA_L2N
ML_VGA_L3P
ML_VGA_L3N
FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54
ML_VGA_HPD/GPIO229
VIN0/GPIO175
HW MONITOR
p:
BT_ON
BT_ON
SATA_X2
AUXCAL
FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58
M6
10K_0402_5%
VIN1/GPIO176
VIN2/SDATI_1/GPIO177
VIN3/SDATO_1/GPIO178
tt
32
AH16
AM15
AJ16
SATA_X1
L30
CS#
WP#
HOLD#
GND
@ R36
FCH_SPI_CLK
GBE_MDIO
VCC
SCLK
SI
SO
@ C23
2
1
2
10_0402_5%
10P_0402_50V8J
GBE_MDIO
VIN4/SLOAD_1/GPIO179
TEMPIN0/GPIO171
VIN5/SCLK_1/GPIO180
TEMPIN1/GPIO172
VIN6/GBE_STAT3/GPIO181
GBE_PHY_INTR
GBE_COL
GBE_PHY_INTR
GBE_CRS
VIN7/GBE_LED3/GPIO182
NC1
NC2
NC3
NC4
NC5
TEMPIN3/TALERT#/GPIO174
FCH_SPI_MISO
FCH_SPI_MOSI
1
2 0_0402_5%
FCH_SPI_CS1#
FCH_SPI_WP#
1
R891
2
10K_0402_5%
1
R892
1
R893
1
R894
1
R895
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%
FCH_SPI_CLK
Add SYS BIOS ROM

20101111
FCH_CRT_R 27
2 150_0402_1%
R897 1
2 150_0402_1%
R898 1
2 150_0402_1%
FCH_CRT_G 27
2
FCH_CRT_B 27
FCH_CRT_HSYNC
FCH_CRT_VSYNC
FCH_CRT_DDC_SDA 27
FCH_CRT_DDC_SCL 27
R901 1
27
27
2 715_0402_1%
V28
V29
ML_VGA_AUXP_C 8
ML_VGA_AUXN_C 8
U28 AUXCAL 1
R903
T31
T33
T29
T28
R32
R30
P29
P28
2
100_0402_1%
FCH_CRT_HPD 10
10K_0402_5%
R10
10K_0402_5%
R11
M5
10K_0402_5%
R9
P3
1
R904
10K_0402_5%
R8
M1
2
10K_0402_5%
10K_0402_5%
R7
P1
+FCH_VDDAN_33_DAC_R
FCH_CRT_HPD
10K_0402_5%
R6
L2
N4
8
8
8
8
8
8
8
8
R5
M3
+VDDAN_11_ML
ML_VGA_TXP0
ML_VGA_TXN0
ML_VGA_TXP1
ML_VGA_TXN1
ML_VGA_TXP2
ML_VGA_TXN2
ML_VGA_TXP3
ML_VGA_TXN3
FCH_CRT_HPD
N2
@
1
GL-02/10/2011: Please enabled integrated pull-up/pull-down and left unconnected.
10K_0402_5%
2
R12
TEMPIN2/GPIO173
Change to PD 20101112
M28
N30
C29
FCH_SPI_CLK
FCH_SPI_MOSI
FCH_SPI_MISO
+3VALW
GBE_RXERR
M33
N32
K31
8
6
5
2
Add for EMI 201011291330
R896 1
VGA_BLUE
AUX_VGA_CH_P
AUX_VGA_CH_N
VGA MAINLINK
2 10K_0402_5%
//
m
R902 1
+3VS
1
3
7
4
MX25L1606EM2I-12G SOP 8P
SA000041N00
FCH_SPI_CLK_R R35
M29
VGA_DDC_SDA/GPO70
VGA_DDC_SCL/GPO71
SATA_ACT#/GPIO67
V6
V5
V3
T6
V1
L32
VGA_DAC_RSET
32
FCH_SPI_CS1#
FCH_SPI_WP#
FCH_SPI_HOLD#
GBE_COL
GBE_CRS
AC4
AD3
AD9
W10
AB8
AH7
AF7
AE7
AD7
AG8
AD1
AB7
AF9
AG6
AE8
AD8
AB9
AC2
AA7
W9
VGA_GREEN
VGA_HSYNC/GPO68
VGA_VSYNC/GPO69
SATA_CALRP
SATA_CALRN
2
2 1K_0402_5%
2 10K_0402_5%
10K_0402_5%
GBE_RXERR
SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
ROM_RST#/SPI_WP#/GPIO161
C466
1
U28
1
R626 1
R934 1
R935
p.
su
AH24
AJ24
GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR
GBE LAN
AM23
AK23
SATA_RX1N
SATA_RX1P
SPI ROM
AJ22
AH22
SD_CLK/SCLK_2/GPIO73
SD_CMD/SLOAD_2/GPIO74
SD_CD/GPIO75
SD_WP/GPIO76
SD_DATA0/SDATI_2/GPIO77
SD_DATA1/SDATO_2/GPIO78
SD_DATA2/GPIO79
SD_DATA3/GPIO80
+3VALW
AL14
AN14
AJ12
AH12
AK13
AM13
AH15
AJ14
/x
/
SATA_RX0N
SATA_RX0P
SD CARD
AL20
AN20
VGA DAC
SATA_TX0P
SATA_TX0N
yc
om
ODD
33 SATA_STX_DRX_P0
33 SATA_STX_DRX_N0
SERIAL ATA
HDD1
AK19
AM19
10K_0402_5%
AG16
AH10
A28
G27
L4
HUDSON-M2_FCBGA656
M2@
2010/08/04
Issued Date
Compal Secret Data
2010/08/04
Deciphered Date
A
Title
Hudson-M2/M3-SATA/GBE/HWM
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
15
of
49
STRAP PINS
1
PULL
HIGH
PCI_CLK1
PCI_CLK3
PCI_CLK4
LPC_CLK0
LPC_CLK1
EC_PWM2
ALLOW
PCIE GEN2
USE
DEBUG
STRAPS
NON_FUSION
CLOCK MODE
EC
ENABLED
CLKGEN
ENABLED
LPC ROM
DEFAULT
PULL
LOW
DEFAULT
FORCE
PCIE GEN1
IGNORE
DEBUG
STRAP
FUSION
CLOCK
MODE
EC
DISABLED
DEFAULT
DEFAULT
DEFAULT
RTC_CLK
S5 PLUS
MODE
DISABLED
If support ML DAC power down when no VGA plug
DEFAULT
SPI ROM
CLKGEN
DISABLE
L47
1
2
FBMA-L11-201209-221LMA30T_0805
S5 PLUS
MODE
ENABLED
30mil
220 ohm
+3VS
+FCH_VDDAN_33_DAC
+FCH_VDDAN_33_DAC_R
DEFAULT
VGA_PD#
1
R912
p.
su
@ Q40 3
AP2301GN-HF_SOT23-3
13,36 LPC_CLK0_EC
DEFAULT
BYPASS
PCI PLL
ENABLE
ILA
AUTORUN
BYPASS
FC PLL
USE EEPROM
PCIE STRAPS
6
4
2
1
1
2
2
1
2
1
//
m
ENABLE PCI
MEM BOOT
h
@
2
1
2
1
2
DEFAULT
Compal Secret Data
2010/08/04
Issued Date
2010/08/04
Deciphered Date
A
DISABLE PCI
MEM BOOT
R930 2.2K_0402_5%
R929 2.2K_0402_5%
R928 2.2K_0402_5%
R927 2.2K_0402_5%
R926 2.2K_0402_5%
2
1U_0402_6.3V4Z
PCI_AD23
p:
DEFAULT
R925
C1212
2.2K_0402_5%
tt
DEFAULT
DEFAULT
USE DEFAULT
PCIE STRAPS
1
2
1
2
1
2
1
2
1
2
1
2
PCI_AD23
USE FC
PLL
VGA_PD
Q41A
DMN66D0LDW-7_SOT363-6
PCI_AD24
13
DISABLE
ILA
AUTORUN
Check VGA_PD states

14
VGA_PD#
C1211
1U_0402_6.3V4Z
PCI_AD25
13
USE PCI
PLL
R914
100K_0402_5%
PULL
LOW
PCI_AD24
Q41B
PULL
HIGH
PCI_AD25
VGA_PD: Support MLDAC power

save if not connect
0: MLDAC power on
1: MLDAC power off
R924
0_0402_5%
+3VS
R923
1K_0402_5%
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]

PCI_AD27
R922 2.2K_0402_5%
DEBUG STRAPS
PCI_AD26
R921 2.2K_0402_5%
R920 10K_0402_5%
R919 10K_0402_5%
R918 10K_0402_5%
R917 10K_0402_5%
R915 10K_0402_5%
PCI_AD26
2
0_0402_5%
R916
100K_0402_5%
13,36 RTC_CLK
13
@
1
R913
yc
om
14 EC_PWM2
PCI_AD27
+FCH_VDDAN_11_MLDAC
30mil
VGA_PD#
13 LPC_CLK1
13
13 PCI_CLK4
2
0_0402_5%
+1.1VS
13 PCI_CLK3
13
AO3413 Vgs(max)=1V
/x
/
1
2
1
2
1
2
1
2
1
2
1
2
R911 10K_0402_5%
+3VALW
R910 10K_0402_5%
+3VALW
R909 10K_0402_5%
+3VALW
R908 10K_0402_5%
+3VALW
R907 10K_0402_5%
10K_0402_5%
+3VS
R906 10K_0402_5%
R905
13 PCI_CLK1
2
+3VS
220 ohm
+3VS
C1210
1
2
FBMA-L11-201209-221LMA30T_0805
0.1U_0402_16V4Z
C1209
@Q39
@
Q39 3
AP2301GN-HF_SOT23-3
2.2U_0603_6.3V4Z
@ L48
Title
Hudson-M2/M3-STRAP
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
16
of
49
C1218 / C1219 / C1247 Change to SE00000I10

20101228
+VCC_FCH_R
U25C
PCI/GPIO I/O
CORE S0
CLKGEN I/O
/x
/
p.
su
SERIAL ATA
MAIN LINK
GBE LAN
C1247
22U_0805_6.3V6M
3.3V_S5 I/O
2
0_0805_5%
1
R941
2
0_0805_5%
+1.1VS
2
0_0402_5%
R26
change to four 1uf-AMD request

20110212
+3VALW
10mils
G24
5mA
+VDDXL_3.3V
C1261
2.2U_0603_6.3V4Z
yc
om
1
R938
+3VALW
C1260
L28
1
2
MBK1608221YZF_2P
220 ohm
USB
+1.1VALW
10mils
C1265
1
R1145
2.2U_0603_6.3V4Z
p:
187mA
+VDDCR_1.1V
C1264
VDDCR_11_S_1
VDDCR_11_S_2
N20
M20
1U_0402_6.3V6K
//
m
C1237
2.2U_0603_6.3V4Z
PCI EXPRESS
R25
2
0_0603_5%
59mA
+VDDIO_33_S
C1282
.1U_0402_16V7K
2
0_0603_5%
N8
K25
H25
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSAN_HWM
VSSXL
VSSPL_DAC
VSSAN_DAC
VSSANQ_DAC
VSSIO_DAC
VSSPL_SYS
EFUSE
T25
T27
U6
U14
U17
U20
U21
U30
U32
V11
V16
V18
W4
W6
W25
W28
Y14
Y16
Y18
AA6
AA12
AA13
AA14
AA16
AA17
AA25
AA28
AA30
AA32
AB25
AC6
AC18
AC28
AD27
AE6
AE15
AE21
AE28
AF8
AF12
AF16
AF33
AG30
AG32
AH5
AH11
AH18
AH19
AH21
AH23
AH25
AH27
AJ18
AJ28
AJ29
AK21
AK25
AL18
AM21
AM25
AN1
AN18
AN28
AN33
T21
L28
K33
N28
R6
+1.1VALW
10mils
VDDPL_11_SYS_S
J24
C1272
C1271
L29
70mA
+VDDPL_1.1V
HUDSON-M2_FCBGA656
M2@
1
2
MBK1608221YZF_2P
.1U_0402_16V7K
VDDCR_11_USB_S_1
VDDCR_11_USB_S_2
2.2U_0603_6.3V4Z
tt
+1.1VS
1
+1.1VS
1U_0402_6.3V6K
C1252
N18
L19
M18
V12
V13
Y12
Y13
W11
C1246
.1U_0402_16V7K
C1236
+AVDD_SATA
VDDAN_11_USB_S_1
VDDAN_11_USB_S_2
HUDSON-2
A3
A33
B7
B13
D9
D13
E5
E12
E16
E29
F7
F9
F11
F13
F16
F17
F19
F23
F25
F29
G6
G16
G32
H12
H15
H29
J6
J9
J10
J13
J28
J32
K7
K16
K27
K28
L6
L12
L13
L15
L16
L21
M13
M16
M21
M25
N6
N11
N13
N23
N24
P12
P18
P20
P21
P31
P33
R4
R11
R25
R28
T11
T16
T18
1337mA+AVDD_SATA
1U_0402_6.3V6K
VDDXL_33_S
U25E
1088mA
.1U_0402_16V7K
C1245
VDDAN_33_USB_S_1
VDDAN_33_USB_S_2
VDDAN_33_USB_S_3
VDDAN_33_USB_S_4
VDDAN_33_USB_S_5
VDDAN_33_USB_S_6
VDDAN_33_USB_S_7
VDDAN_33_USB_S_8
VDDAN_33_USB_S_9
VDDAN_33_USB_S_10
VDDAN_33_USB_S_11
VDDAN_33_USB_S_12
C1219
C1230
2.2U_0603_6.3V4Z
.1U_0402_16V7K
VDDIO_GBE_S_1
VDDIO_GBE_S_2
22U_0805_6.3V6M
C1217
C1226
.1U_0402_16V7K
C1235
VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8
2.2U_0603_6.3V4Z
C1216
.1U_0402_16V7K
.1U_0402_16V7K
C1225
T12
T13
.1U_0402_16V7K
.1U_0402_16V7K
C1270
C1269
.1U_0402_16V7K
C1268
2.2U_0603_6.3V4Z
220 ohm
AA21
Y20
AB21
AB22
AC22
AC21
AA20
AA18
AB20
AC19
10mils
VDDCR_11_GBE_S_1
VDDCR_11_GBE_S_2
10mils
+VDDCR_1.1V_USB
C1215
197mA
1
2
MBK1608221YZF_2P
VDDIO_33_GBE_S
VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7
VDDAN_11_SATA_8
VDDAN_11_SATA_9
VDDAN_11_SATA_10
C1251
L59
1U_0402_6.3V6K
+1.1VALW
C1244
1U_0402_6.3V6K
C1263
.1U_0402_16V7K
VDDAN_11_ML_1
VDDAN_11_ML_2
VDDAN_11_ML_3
VDDAN_11_ML_4
10mils
U12
U13
C1234
+VDDAN_11_USB_S
1U_0402_6.3V6K
60mils
C1250
C1257
G7
H8
J8
K8
K9
M9
M10
N9
N10
M12
N12
M11
.1U_0402_16V7K
C1256
10U_0603_6.3V6M
10U_0603_6.3V6M
C1255
C1254
C1262
C1267
220 ohm
.1U_0402_16V7K
C1266
2.2U_0603_6.3V4Z
220 ohm
140mA
2.2U_0603_6.3V4Z
+3VS
L22
+VDDPL_33_SATA
1
2
MBK1608221YZF_2P
VDDPL_11_DAC
30mils
+1.1VALW
1
2
MBK1608221YZF_2P
L57
AA9
AA10
2
0_0402_5%
+VDDAN_33_USB
1U_0402_6.3V6K
C1259
.1U_0402_16V7K
C1258
2.2U_0603_6.3V4Z
C1253
220 ohm/2A
AB11
AA11
+PCIE_VDDR_FCH
1U_0402_6.3V6K
658mA
1U_0402_6.3V6K
+3VS
AB10
1
R945
+3VALW
1
2
FBMA-L11-201209-221LMA30T_0805
220 ohm
Y22
V23
V24
V25
R1242 change to 2.2uf-AMD request

20110212
L54
L15
+VDDPL_33_PCIE
1
2
MBK1608221YZF_2P
2
0_0805_5%
340mA
+PCIE_VDDR_FCH
C1243
1U_0402_6.3V6K
C1249
.1U_0402_16V7K
C1248
change to 0ohm-AMD request

20110212
2.2U_0603_6.3V4Z
L7
2 +FCH_VDDPL_33_USB_S
0_0603_5%
LDO_CAP
20mils
2.2U_0603_6.3V4Z
+VDDAN_33_USB
1
C1242
.1U_0402_16V7K
2
0_0603_5%
C1241
4.7U_0603_6.3V6K
1
R1148
VDDPL_33_SATA
10mils
V21
50mils
VDDPL_33_PCIE
+VDDAN_11_ML
226mA
220 ohm/2A
M31
+VDDPL_11_DAC
2
0_0402_5%
C1240
M3@
2
2
2.2U_0603_6.3V4Z
AB24
Y21
AE25
AD24
AB23
AA22
AF26
AG27
VDDPL_33_USB_S
@
1
C1232
VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8
VDDPL_33_SSUSB_S
C1233
C1239
M3@
.1U_0402_16V7K
C1238
2.2U_0603_6.3V4Z
220 ohm
L24
7mA
1
2 +VDDPL_11_DAC_L
1
MBK1608221YZF_2P
R24
AG28
VDDAN_33_DAC
1U_0402_6.3V6K
10mils
LDO_CAP: Internally generated 1.8V +VDDPL_33_SATA

supply for the RGB outputs
For A11: Cap = 1nF
For A12, Cap = DNI
+FCH_VDDAN_11_MLDAC
1
2 +FCH_VDDPL_33_SSUSB_S
MBK1608221YZF_2P
D7
AH29
93mA
VDDPL_33_ML
.1U_0402_16V7K
10mils
+VDDPL_33_PCIE
VDDPL_33_DAC
+1.1VS_CKVDD
C1224
43mA
+FCH_VDDPL_33_USB_S
L18
H26
J25
K24
L22
M22
N21
N22
P22
1
R937
+1.1VS_CKVDD
20mils
VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8
VDDPL_33_SYS
1U_0402_6.3V6K
10mils
C1214
17mA
R936 2
1U_0402_6.3V6K
10mils
M2@ 10_0402_5% +FCH_VDDPL_33_SSUSB_S
T14
T17
T20
U16
U18
V14
V17
V20
Y17
C1223
20mA
50mils
VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9
1U_0402_6.3V6K
VDDPL_33_SSUSB_S
For Hudson3 USB3.0 only
For Hudson2, connect to GND
VDDIO_33_PCIGP_1
VDDIO_33_PCIGP_2
VDDIO_33_PCIGP_3
VDDIO_33_PCIGP_4
VDDIO_33_PCIGP_5
VDDIO_33_PCIGP_6
VDDIO_33_PCIGP_7
VDDIO_33_PCIGP_8
VDDIO_33_PCIGP_9
VDDIO_33_PCIGP_10
C1213
M3@L6
M3@
L6
.1U_0402_16V7K
+3VALW
C1221
10mils
+VDDPL_33_DAC
2
V22
0_0402_5%
10mils
+VDDPL_33_ML
U22
2
0_0402_5%
200mA R23
10mils
+FCH_VDDAN_33_DAC_R
T22
1
20mA R22
.1U_0402_16V7K
220 ohm
C1231
C1227
2.2U_0603_6.3V4Z
1
2
MBK1608221YZF_2P
10mils
20mA
+FCH_VDDPL_33_MLDAC
@ L4
HUDSON-2
AB17
AB18
AE9
AD10
AG7
AC13
AB12
AB13
AB14
AB16
H24
2 +FCH_VDDPL_33_MLDAC
0_0603_5%
R19
+3VS
47mA
+VDDPL_3.3V
+FCH_VDDAN_33_DAC_R
1
.1U_0402_16V7K
C1220
.1U_0402_16V7K
.1U_0402_16V7K
C1229
C1222
2.2U_0603_6.3V4Z
220 ohm
C1228
C1218
+VDDPL_3.3V
1
2
MBK1608221YZF_2P
+VDDIO_33_PCIGP
2
0_0603_5%
R20
L3
22U_0805_6.3V6M
+3VS
+3VS
+1.1VS
1007mA
10mils
1U_0402_6.3V6K
131mA
GROUND
220 ohm
Connected to VSS through a dedicated via.
+3VALW
+FCH_VDD_11_SSUSB_S
20mils
+VDDCR_11_SSUSB
C1281
M3@
2
M3@
2
.1U_0402_16V7K
C1280
M3@
2
.1U_0402_16V7K
1
2
1
2
USB SS
+FCH_VDD_11_SSUSB_S
C1279
M3@
2
1U_0402_6.3V6K
C1278
M3@ 2
2 L61 M3@ 1
1
R1150
0_0603_5%
FBMA-L11-201209-221LMA30T_0805
VDDCR_11_SSUSB_S_1
VDDCR_11_SSUSB_S_2
VDDCR_11_SSUSB_S_3
VDDCR_11_SSUSB_S_4
12mA
+VDDAN_33_HWM
1
C1473
30mils
N16
N17
P17
M17
M8
.1U_0402_16V7K
VDDAN_33_HWM_S
C1472
.1U_0402_16V7K
C1275
.1U_0402_16V7K
M3@
2
10mils
VDDAN_11_SSUSB_S_1
VDDAN_11_SSUSB_S_2
VDDAN_11_SSUSB_S_3
VDDAN_11_SSUSB_S_4
VDDAN_11_SSUSB_S_5
R27
2
0_0402_5%
AMD reply:
VDDAN_33_HWM_S: Please connect
it to +3.3V_S5 directly if HWM is not used.
+3VS
10mils
VDDIO_AZ_S
AA4
1
1
C1276
1
C1277
HUDSON-M2_FCBGA656
M2@
R28
2
2.2U_0603_6.3V4Z
2
.1U_0402_16V7K
2010/08/04
VDDIO_AZ_S should be tied to

+3.3/1.5V_S5 rail if Wake on Ring
is supported

2010/08/04
Deciphered Date
C
2
0_0402_5%
Compal Secret Data
Issued Date
26mA
+VDDIO_AZ
POWER
424mA
42 ohm/4A
M3@
2
10U_0603_6.3V6M
+1.1VALW
M3@
2
C1274
M2@
C1281
0_0402_5%
C1273
M2@
C1275
0_0402_5%
40mils
1U_0402_6.3V6K
For FCH M2 - BOM option

VDDAN_11_SSUSB_S / VDDAN_11_SSUSB_S
Connected to VSS.
P16
M14
N14
P13
P14
+VDDAN_SSUSB
M3@ 2
0_0603_5%
2.2U_0603_6.3V4Z
282mA
1
R1149
Title
Hudson-M2/M3-POWER/GND
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
17
of
49
GFX PCIE LANE REVERSAL

U8A
U8G
PCIE_TX0P
PCIE_TX0N
Y33
Y32
PCIE_GTX_FRX_P0
PCIE_GTX_FRX_N0
C580 1
C291
2
1
VGA@
VGA@
PCIE_FTX_C_GRX_P1
PCIE_FTX_C_GRX_N1
Y35
W 36
PCIE_RX1P
PCIE_RX1N
PCIE_TX1P
PCIE_TX1N
W 33
W 32
PCIE_GTX_FRX_P1
PCIE_GTX_FRX_N1
C247 1
C473
2
1
VGA@
PCIE_FTX_C_GRX_P2
PCIE_FTX_C_GRX_N2
W 38
V37
PCIE_RX2P
PCIE_RX2N
PCIE_TX2P
PCIE_TX2N
U33
U32
PCIE_GTX_FRX_P2
PCIE_GTX_FRX_N2
C572 1
C288
2
1
VGA@
PCIE_RX3P
PCIE_RX3N
T35
R36
PCIE_RX5P
PCIE_RX5N
PCIE_FTX_C_GRX_P6
PCIE_FTX_C_GRX_N6
R38
P37
PCIE_FTX_C_GRX_P7
PCIE_FTX_C_GRX_N7
P35
N36
PCIE_RX7P
PCIE_RX7N
N38
M37
PCIE_RX8P
PCIE_RX8N
PCIE_RX6P
PCIE_RX6N
PCIE_GTX_FRX_P4
PCIE_GTX_FRX_N4
C287 1
C228
2
1
VGA@
PCIE_TX5P
PCIE_TX5N
T30
T29
PCIE_GTX_FRX_P5
PCIE_GTX_FRX_N5
C224 1
C576
2
1
VGA@
PCIE_TX6P
PCIE_TX6N
P33
P32
PCIE_GTX_FRX_P6
PCIE_GTX_FRX_N6
C295 1
C472
2
1
VGA@
PCIE_TX7P
PCIE_TX7N
P30
P29
PCIE_TX8P
PCIE_TX8N
N33
N32
PCIE_TX9P
PCIE_TX9N
N30
N29
PCIE_TX10P
PCIE_TX10N
L33
L32
PCIE_TX11P
PCIE_TX11N
L30
L29
PCIE_TX12P
PCIE_TX12N
K33
K32
L38
K37
PCIE_RX10P
PCIE_RX10N
K35
J36
PCIE_RX11P
PCIE_RX11N
J38
H37
PCIE_RX12P
PCIE_RX12N
H35
G36
PCIE_RX13P
PCIE_RX13N
PCIE_TX13P
PCIE_TX13N
J33
J32
G38
F37
PCIE_RX14P
PCIE_RX14N
PCIE_TX14P
PCIE_TX14N
K30
K29
F35
E37
PCIE_RX15P
PCIE_RX15N
PCIE_TX15P
PCIE_TX15N
H33
H32
CALIBRATION
VGA_RST#
AA30
tt
PCIE_REFCLKP
PCIE_REFCLKN
PCIE_CALRP
Y30
VGA_PCIE_CALRP
PCIE_CALRN
Y29
VGA_PCIE_CALRN
PW RGOOD
C242 1
C468
2
VGA@
2
VGA@
2
VGA@
2
1
VGA@
PCIE_GTX_C_FRX_P1
PCIE_GTX_C_FRX_N1
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_FRX_P2
PCIE_GTX_C_FRX_N2
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_FRX_P3
PCIE_GTX_C_FRX_N3
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_FRX_P4
PCIE_GTX_C_FRX_N4
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_FRX_P5
PCIE_GTX_C_FRX_N5
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
AJ38
AK37
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
AH35
AJ36
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_FRX_P6
PCIE_GTX_C_FRX_N6
0.1U_0402_16V7K
0.1U_0402_16V7K
PCIE_GTX_C_FRX_P7
PCIE_GTX_C_FRX_N7
For UMA Mux.
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
AG38
AH37
TXOUT_U3P
TXOUT_U3N
AF35
AG36
LVTMDP
VGA@
PCIE_RX9P
PCIE_RX9N
AH16
PCIE_GTX_FRX_P7
PCIE_GTX_FRX_N7
2
VGA@
T33
T32
CLOCK
2
1
R389 VGA@ 10K_0402_5%
2
1
VGA@
PCIE_TX4P
PCIE_TX4N
M35
L36
AB35
AA36
13 CLK_PEG_VGA
13 CLK_PEG_VGA#
C579 1
C316
0.1U_0402_16V7K
0.1U_0402_16V7K
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
AP34
AR34
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
AW 37
AU35
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
AR37
AU39
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
AP35
AR35
TXOUT_L3P
TXOUT_L3N
AN36
AP37
2160809000A11SEYMOU_FCBGA962
VGA@
+3VSG
@
R394
2.2K_0402_5%
PCIE_FTX_C_GRX_P5
PCIE_FTX_C_GRX_N5
PCIE_GTX_FRX_P3
PCIE_GTX_FRX_N3
AK35
AL36
13
PE_GPIO0
13,29,32 PLT_RST#
1 @
R159
R388 1
VGA@
U21
Y
3
PCIE_RX4P
PCIE_RX4N
U30
U29
2
VGA@
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
2 10K_0402_5%
2 10K_0402_5%
1
yc
om
U38
T37
PCI EXPRESS INTERFACE
PCIE_FTX_C_GRX_P4
PCIE_FTX_C_GRX_N4
PCIE_TX3P
PCIE_TX3N
VGA@
AK27
AJ27
PCIE_GTX_C_FRX_P0
PCIE_GTX_C_FRX_N0
//
m
V35
U36
R386 1 VGA@
R387 1 VGA@
VARY_BL
DIGON
p:
PCIE_FTX_C_GRX_P3
PCIE_FTX_C_GRX_N3
0.1U_0402_16V7K
0.1U_0402_16V7K
LVDS CONTROL
PCIE_RX0P
PCIE_RX0N
AA38
Y37
PCIE_GTX_C_FRX_N[0..7]
PCIE_FTX_C_GRX_P0
PCIE_FTX_C_GRX_N0
/x
/
PCIE_GTX_C_FRX_N[0..7]
PCIE_GTX_C_FRX_P[0..7]
p.
su
PCIE_GTX_C_FRX_P[0..7]
PCIE_FTX_C_GRX_N[0..7]
6 PCIE_FTX_C_GRX_N[0..7]
1.27K_0402_1%
2K_0402_1%
VGA_RST#
PCIE_FTX_C_GRX_P[0..7]
6 PCIE_FTX_C_GRX_P[0..7]
<VARY_BL>
LCD PWM (pulse width modulated)
output to adjust LCD brightness
Active High ,external PD need
<DIGON>
Controls panel digital power on/off.
Active High ,external PD need
2
0_0402_5%
VGA@
R390 1
VGA@
+1.0VSG
PERSTB
VGA@
Compal Secret Data
2010/07/12
Issued Date
Deciphered Date
2012/07/12
A
Title
Vancouver_ PCIE / LVDS

Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
18
of
49
U8B
Setting
CONFIG[1]
GPIO12
CONFIG[0]
GPIO11
b) If BIOS_ROM_EN = 0, then Config[2:0] defines

the primary memory aperture size.
AUD[1]
HSYNC
AUD(0)
VSYNC
00: No audio function;

10: Audio for DisplayPort only;
01: Audio for DisplayPort and HDMI if adapter is detected;
11: Audio for both DisplayPort and HDMI
0= Advertises the PCI-E device as 2.5 GT/s capable at power-on
1= Advertises the PCI-E device as 5.0 GT/s capable at power-on
5.0 GT/s capability will be controlled by software
BIF_GEN2_EN GPIO2
H2SYNC
(GENLK_CLK)
RESERVED
001
Enable external BIOS ROM device (Internal PD)

0: Diable, 1: Enable
BIOS_ROM_EN GPIO22
GPIO8
00
1
Internal use only. THIS PAD HAS AN INTERNAL

PULL-DOWN AND MUST BE 0 V AT RESET. The
pad may be left unconnected
1
2
1
2
1
2
1
2
1
2
Move to
DDCCLK_AUX3P,DDCDATA_AUX3N,
AK26
AJ26
GPIO6 voltage control signal ,No use can NC
SWAPLOCKA
SWAPLOCKB
TXCBP_DPB3P
TXCBM_DPB3N
TX3P_DPB2P
TX3M_DPB2N
DPB
TX4P_DPB1P
TX4M_DPB1N
TX5P_DPB0P
TX5M_DPB0N
TXCCP_DPC3P
TXCCM_DPC3N
TX0P_DPC2P
TX0M_DPC2N
DPC
TX1P_DPC1P
TX1M_DPC1N
TX2P_DPC0P
TX2M_DPC0N
NC_TXCDP_DPD3P
NC_TXCDM_DPD3N
NC_TX3P_DPD2P
NC_TX3M_DPD2N
DPD
NC_TX4P_DPD1P
NC_TX4M_DPD1N
NC_TX5P_DPD0P
NC_TX5M_DPD0N
VRAM_ID0
VRAM_ID1
VRAM_ID2
VRAM_ID3
X76@
VGA_GPIO0
VGA_GPIO1
VGA_GPIO2
VGA_GPIO3
VGA_GPIO4
VGA_ENBKL
2 VGA@ 1
R413 10K_0402_5%
GPIO7 Controls backlight on/off.

Active High ,need external PD
ROM
if GPIO22 High ,GPIO 11-13->CFG[0:2]

Config ROM type ,GPU has internal PD
GPU_VID0
THM_ALERT#
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
VGA_GPIO0
VGA_GPIO1
VGA_GPIO2
VGA_GPIO3
VGA_GPIO4
R405
R406
R408
R409
1 VGA@
@
1
@
1
@
1
2
2
2
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
3K_0402_5%
VGA_GPIO11
VGA_GPIO12
VGA_GPIO13
GPIO_22_ROMCSB
48
Reserved
GPU_VID1
GPU_VID1
GPIO_22_ROMCSB
T30
T32
T18
T33
T34
T17
External BIOS device

ON(1)/OFF(0) inter PD
Internal Debug
no use can floating
ON(1)/OFF(0)
Stereo Sync
no use can NC
For ATI Cross fire
no use can NC
AK24
GPIO_0
GPIO_1
G
GPIO_2
GB
GPIO_3_SMBDATA
GPIO_4_SMBCLK
B
GPIO_5_AC_BATT
BB
DAC1
GPIO_6
GPIO_7_BLON
HSYNC
GPIO_8_ROMSO
VSYNC
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
RSET
GPIO_12
70mA AVDD
GPIO_13
GPIO_14_HPD2
AVSSQ
GPIO_15_PWRCNTL_0
100mA VDD1DI
GPIO_16
GPIO_17_THERMAL_INT
VSS1DI
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
R2/NC
GPIO_21_BB_EN
R2B/NC
GPIO_22_ROMCSB
GPIO_23_CLKREQB
G2/NC
JTAG_TRSTB
G2B/NC
JTAG_TDI
JTAG_TCK
B2/NC
JTAG_TMS
B2B/NC
JTAG_TDO
GENERICA
GENERICB
C/NC
GENERICC
Y/NC
GENERICD
COMP/NC
GENERICE_HPD4
DAC2
NC_GENERICF_HPD5
NC_GENERICG_HPD6
H2SYNC/GENLK_CLK
V2SYNC/GENLK_VSYNC
HPD1
R430 1 VGA@
2 499_0402_1%
R431 1 VGA@
2 249_0402_1%
R443
@
0_0402_5%
20mil
AN31
27MCLK
AV33
XTALOUT AU34
XO_IN
AW34
XO_IN2
AW35
A2VSSQ/TSVSSQ
+TSVDD
VGA_SMB_DA2
DDC2CLK
DDC2DATA
XO_IN
AUX2P
AUX2N
XO_IN2
AK32
TS_FDO
THERMAL
NC_DDCCLK_AUX4P
NC_DDCDATA_AUX4N
DDCCLK_AUX5P
DDCDATA_AUX5N
DDC6CLK
DDC6DATA
TS_A/NC
TSVDD
TSVSS
EC_SMB_CK2 6,26,36
EC_SMB_DA2
EC_SMB_DA2 6,26,36
AU20
AT19
AT21
AR20
NC on Park,
Robson and Seymour
AU22
AV21
AT23
AR22
AD39
AD37
AE36
AD35
AF37
AE38
AC36 HSYNC
AC38 VSYNC
R414
AB34
499_0402_1%
VGA@
AD34
AE34
+AVDD
AC33
AC34
+VDD1DI
VGA@
20mA
NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N
10mil
VGA@ 1 VGA@ 1 VGA@ 1
AF30
AF31
AC32
AD32
AF32
AD29
AC29
T2
T3
10mil
AG31
AG32
10mil
AG33
10mil
AD33
L9
+3VSG
AUD Strap
VSYNC
HSYNC
R417 1 @
R418 1 @
2 10K_0402_5%
2 10K_0402_5%
AMD ref:120ohm/0.3A
NC on Whistler
and Seymour
1
+1.8VSG
VGA@
BLM18AG121SN1D_0603
AMD ref:120ohm/0.3A
SM010030010
200ma 120ohm@100mhz DCR 0.2
Back compatibility(Manhattan)
+VDD2DI
VSS2DI
R77 1 @
R209 1 @
2 0_0402_5%
2 0_0402_5%
+A2VDD
R70
1 @
2 0_0402_5%
+3VSG
+A2VDDQ
R256 1 @
2 0_0402_5%
1 @
+1.8VSG
AF33
AA29
2
VGA@
VGA@
HSYNC:VSYNC
11: Audio for both DisplayPort and HDMI
L8
BLM18AG121SN1D_0603
1
+1.8VSG
VGA@
10mil
AC30
AC31
AD30
AD31
1
2
R436 VGA@ 715_0402_1%
AM26
AN26
+VDD1DI
1 @
1 @
Whistler and Seymour

Except A2VSSQ change to TSVSSQ,
others are NC
AM27
AL27
AM19
AL19
GPIO8 Serial-ROM output from ROM.

GPIO9 Serial-ROM input to ROM.
GPIO10 Serial-ROM clock to ROM.
GPIO22 erternal BIOS-ROM enable
AN20
AM20
AL30
AM30
AL29
AM29
GPIO8,GPIO9,GPIO10 no use can NC

GPIO22
Enable need 3K PH ,no use must NC
NC on Park,
Robson and Seymour
AN21
AM21
if GPIO22 High ,GPIO 11-13->CFG[0:2]

Config ROM type ,GPU has internal PD
if GPIO22 Low ,GPIO 11-13->CFG[0:2]
Config Primary memory-aperture size
CFG[3:0]
128MB 000
256MB 001 *
64MB 010
AJ30
AJ31
NC on Park,
Robson and Seymour
AK30
AK29
VGA@
VGA@
Issued Date
Compal Secret Data
2010/07/12
Deciphered Date
2012/07/12
Title
Vancouver_Strape/DP/HDMI//CRT
Custom
Rev
0.03
QBL60 LA-7552P
Date:
B
EC_SMB_CK2
AT17
AR16
A
6
Q8A
VGA@
3
Q8B
C352
0.1U_0402_16V4Z
VGA@
C351
1U_0402_6.3V6K
C350
10U_0603_6.3V6M
120ohm/0.3A
10mil
DDC1CLK
DDC1DATA
AUX1P
AUX1N
XTALIN
XTALOUT
DPLUS
DMINUS
AJ32
AJ33
L12
BLM18AG121SN1D_0603
2
1
VGA@
1
VGA@
DDC/AUX
DDCCLK_AUX3P
DDCDATA_AUX3N
AL31
Future ASIC call MLPS

OLD ASIC is Fan PWM
R2SET/NC
125mA
0_0402_5%
GPU_THERM_D+
GPU_THERM_D-
+1.8VSG
A2VDDQ/NC
PLL/CLOCK
DPLL_VDDC
AF29
AG29
VGA@
AU16
AV15
DPLL_PVDD
DPLL_PVSS 75mA
R444
VGA@
C354
18P_0402_50V8J
C347
1U_0402_6.3V6K
27MHZ_16PF_X5H027000FG1H
C346
0.1U_0402_16V4Z
AMD ref:470ohm/1A
VGA@
C353
18P_0402_50V8J
+DPLL_VDDC
1 VGA@ 1 VGA@ 1 VGA@
VGA@ Y3
2
1
AM32
AN32
VGA@ L11
2
1
BLM18AG121SN1D_0603
C341
1U_0402_6.3V6K
27MCLK
A2VDD/NC
VREFG
tt
1 VGA@ 1 VGA@
+3VSG
C344
10U_0603_6.3V6M
C340
0.1U_0402_16V4Z
VGA@
C339
10U_0603_6.3V6M
R393
4.7K_0402_5%
VGA@
AT15
AR14
C343
0.1U_0402_16V4Z
+DPLL_PVDD
C345
10U_0603_6.3V6M
VGA@
2
1
R445
1M_0402_5%
2mA
VDD2DI/NC
VSS2DI/NC
20mil
+1.0VSG
XTALOUT
100mA
+VGA_VREF AH13
VGA@
VGA@ L10
2
1
BLM18AG121SN1D_0603
AMD ref:470ohm/1A
2 0.1U_0402_16V4Z
+1.8VSG
AU14
AV13
C342
1U_0402_6.3V6K
C335
SM010030010
20mil
p:
+1.8VSG
2
4.7K_0402_5%
Not share via for other GND

R
RB
100mA
1
R391 VGA@
ADM1032ARMZ-2REEL_MSOP8
VGA_SMB_CK2
AT33
AU32
C334
10U_0603_6.3V6M
2
2
2
2
2
THM_ALERT#
GND
THERM#
AR32
AT31
C333
0.1U_0402_16V4Z
1 VGA@
1 VGA@
1 VGA@
@
1
@
1
6
5
+3VSG
C332
1U_0402_6.3V6K
R395
R396
R397
R398
R401
ALERT#
R392
4.7K_0402_5%
VGA@
C331
22U_0805_6.3V6M
48
Critical temperature fault
D-
+3VSG
C330
0.1U_0402_16V4Z
+3VSG
GPU_VID0
VGA_SMB_DA2
AV31
AU30
C329
1U_0402_6.3V6K
GPIO6,15,16,20
Voltage control signal
GPIO6,15 no use can NC
Thermal monitor interrupt
VGA_GPIO11
VGA_GPIO12
VGA_GPIO13
AH20
AH18
AN16
AH23
AJ23
AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17
AL13
AJ14
AK13
AN13
AM23
AN23
AK23
AL24
AM24
AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24
VGA_SMB_CK2
AR30
AT29
SCL
SDA
GENERAL PURPOSE I/O
R435
10K_0402_5%
X76@
R434
10K_0402_5%
X76@
R433
10K_0402_5%
R432
10K_0402_5%
X76@
X76@
AJ21
AK21
I2C
GPIO5 fast-power reduction:

HW control will casue display disturb
should use SW method control
R429
10K_0402_5%
X76@
R428
10K_0402_5%
X76@
R427
10K_0402_5%
R426
10K_0402_5%
X76@
Global Swap Lock on

Multiple GPUs
+1.8VSG
NC on Park,
Robson and Seymour
DNI
GPIO21
VRAM_ID0
VRAM_ID1
VRAM_ID2
VRAM_ID3
TX2P_DPA0P
TX2M_DPA0N
SDATA
GPIO13
memory apertures
CONFIG[3:0]
128 MB 000
256 MB 001 *
64 MB 010
NC_DVPCNTL_MVP_0
NC_DVPCNTL_MVP_1
NC_DVPCNTL_0
NC_DVPCNTL_1
NC_DVPCNTL_2
NC_DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
NC_DVPDATA_17
NC_DVPDATA_18
NC_DVPDATA_19
NC_DVPDATA_20
NC_DVPDATA_21
NC_DVPDATA_22
NC_DVPDATA_23
SCLK
D+
CONFIG[2]
GPIO13,12,11 (config 2,1,0) : (Internal PD)

a) If BIOS_ROM_EN = 1, then Config[2:0] defines
the ROM type.
NC on Park,
Robson and Seymour
NC on Park, Robson
AT27
AR26
VDD
PCI Express Transmitter De-emphasis Enable (Internal PD)

0: Tx de-emphasis diabled
1: Tx de-emphasis enabled
AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12
TX1P_DPA1P
TX1M_DPA1N
AU26
AV25
GPIO1
DPA
AT25
AR24
GPU_THERM_D+
2200P_0402_50V7K
1
2
C325 VGA@
GPU_THERM_D-
Transmitter Power Saving Enable (Internal PD)

0: 50% Tx output swing
1: full Tx output swing
GPIO0
TX_DEEMPH_EN
TX0P_DPA2P
TX0M_DPA2N
1 VGA@
/x
/
TX_PWRS_ENB
MUTI GFX
AU24
AV23
yc
om
GPIO9
U9 VGA@
TXCAP_DPA3P
TXCAM_DPA3N
//
m
VGA_DIS
VGA Disable determines (Internal PD)

0: VGA Controller capacity enabled
1: The device will not be recognized as the systems VGA controller
External VGA Thermal Sensor
+3VSG
Don't have this strap on

Whistler and Seymour
C324
0.1U_0402_16V4Z
VIP Device Strap Enable indicates to the software driver (Internal PD)
V2SYNC 0: Driver would ignore the value sampled on VHAD_0 during reset
(GENLK_VSYNC) 1: VHAD_0 to determine whether or not a VIP slave device
VIP_DEVICE_EN
Pin Straps description <all internal PD>
p.
su
Strap Name

E
Sheet
19
of
49
+1.5VSG
R454
R455
R456
R457
R458
R460
1 VGA@
1 VGA@
1 VGA@
1 VGA@
1 VGA@
1 VGA@
2
L27
2 243_0402_1% N12
2 243_0402_1% AG12
243_0402_1%
2
M12
2 243_0402_1% M27
2 243_0402_1% AH12
243_0402_1%
NC_MVREFDA
NC_MVREFSA
NC_CKEA0
NC_CKEA1
NC_MEM_CALRN0
MEM_CALRN1
NC_MEM_CALRN2
NC_WEA0B
NC_WEA1B
MEM_CALRP1
NC_MEM_CALRP0
NC_MEM_CALRP2
NC_MAA0_8
NC_MAA1_8
R449 VGA@
100_0402_1%
QSA#[0..7]
QSA#[0..7]
VGA@
23
+1.5VSG
R451
VGA@
40.2_0402_1%
J21
G19
ODTA0
ODTA1
H27
G27
CLKA0
CLKA0#
J14
H14
CLKA1
CLKA1#
K23
K19
RASA0#
RASA1#
K20
K17
CASA0#
CASA1#
K24
K27
CSA0#_0
M13
K16
CSA1#_0
K21
J20
CKEA0
CKEA1
K26
L15
WEA0#
WEA1#
H23
J19
ODTA0
ODTA1
23
23
CLKA0
CLKA0#
23
23
CLKA1
CLKA1#
23
23
15mil
MVREFSB
RASA0#
RASA1#
23
23
CASA0#
CASA1#
23
23
CSA0#_0
23
CSA1#_0
23
CKEA0
CKEA1
23
23
WEA0#
WEA1#
23
23
MAA13
23
R453
VGA@
100_0402_1%
VGA@
MVREFDB Y12
MVREFSB AA12
R459
5.11K_0402_1%
TESTEN
2 VGA@ 1
TEST_MCLK
TEST_YCLK
p:
tt
DDBIB0_0/QSB_0B/WDQSB_0
AD28
AK10
AL10
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
F6
K3
P3
V5
AB5
AH1
AJ9
AM5
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
G7
K1
P1
W4
AC4
AH3
AJ8
AM3
QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7
CLKB1
CLKB1B
AD8
AD7
CLKB1
CLKB1#
T10
Y10
RASB0#
RASB1#
W10
AA10
CASB0#
CASB1#
P10
L10
CSB0#_0
AD10
AC10
CSB1#_0
U10
AA11
CKEB0
CKEB1
N10
AB11
WEB0#
WEB1#
CKEB0
CKEB1
MAB0_8
MAB1_8
DRAM_RST
T8
W8
R461 10_0402_5%
1
2
VGA@
AH11
DQMB#[0..7]
24
24
24
CLKB1
CLKB1#
24
24
RASB0#
RASB1#
24
24
CASB0#
CASB1#
24
24
CSB0#_0
24
CSB1#_0
24
CKEB0
CKEB1
24
24
WEB0#
WEB1#
24
24
MAB13
24
24
24
2
VGA@ 51.1_0402_1%
VRAM_RST# 23,24
R463
VGA@
C359
VGA@
5.11K_0402_1%
VGA@
R465
@
51.1_0402_1%
Note:
route 50ohms single-ended
and 100ohms diff
and keep short
REF137-03 suggest
24
24
CLKB0
CLKB0#
R462
24
QSB#[0..7]
ODTB0
ODTB1
B_BA[0..2]
QSB[0..7]
QSB#[0..7]
CLKB0
CLKB0#
CSB1B_0
CSB1B_1
B_BA[0..2]
QSB[0..7]
ODTB0
ODTB1
CSB0B_0
CSB0B_1
MAB[0..12] 24
DQMB#[0..7]
T7
W7
CASB0B
CASB1B
CLKTESTA
CLKTESTB
H3
H1
T3
T5
AE4
AF5
AK6
AK5
L9
L8
RASB0B
RASB1B
TESTEN
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
B_BA2
B_BA0
B_BA1
CLKB0
CLKB0B
ADBIB0/ODTB0
ADBIB1/ODTB1
MVREFDB
MVREFSB
MAB[0..12]
P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9
R464
@
51.1_0402_1%
WCKB0_0/DQMB_0
WCKB0B_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0B_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1B_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1B_1/DQMB_7
GDDR5/DDR2/GDDR3
EDCB0_0/QSB_0/RDQSB_0
WEB0B
WEB1B
C361
0.1U_0402_16V4Z
C360
0.1U_0402_16V4Z
VGA@
/x
/
MEMORY INTERFACE B
1
2
L18
L20
15mil
MVREFDB
MVREFDA
MVREFSA
23
MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8
MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12
MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1
VGA@
QSA[0..7]
C358
0.1U_0402_16V4Z
100_0402_1%
QSA[0..7]
DQB0_0/DQB_0
DQB0_1/DQB_1
DQB0_2/DQB_2
DQB0_3/DQB_3
DQB0_4/DQB_4
DQB0_5/DQB_5
DQB0_6/DQB_6
DQB0_7/DQB_7
DQB0_8/DQB_8
DQB0_9/DQB_9
DQB0_10/DQB_10
DQB0_11/DQB_11
DQB0_12/DQB_12
DQB0_13/DQB_13
DQB0_14/DQB_14
DQB0_15/DQB_15
DQB0_16/DQB_16
DQB0_17/DQB_17
DQB0_18/DQB_18
DQB0_19/DQB_19
DQB0_20/DQB_20
DQB0_21/DQB_21
DQB0_22/DQB_22
DQB0_23/DQB_23
DQB0_24/DQB_24
DQB0_25/DQB_25
DQB0_26/DQB_26
DQB0_27/DQB_27
DQB0_28/DQB_28
DQB0_29/DQB_29
DQB0_30/DQB_30
DQB0_31/DQB_31
DQB1_0/DQB_32
DQB1_1/DQB_33
DQB1_2/DQB_34
DQB1_3/DQB_35
DQB1_4/DQB_36
DQB1_5/DQB_37
DQB1_6/DQB_38
DQB1_7/DQB_39
DQB1_8/DQB_40
DQB1_9/DQB_41
DQB1_10/DQB_42
DQB1_11/DQB_43
DQB1_12/DQB_44
DQB1_13/DQB_45
DQB1_14/DQB_46
DQB1_15/DQB_47
DQB1_16/DQB_48
DQB1_17/DQB_49
DQB1_18/DQB_50
DQB1_19/DQB_51
DQB1_20/DQB_52
DQB1_21/DQB_53
DQB1_22/DQB_54
DQB1_23/DQB_55
DQB1_24/DQB_56
DQB1_25/DQB_57
DQB1_26/DQB_58
DQB1_27/DQB_59
DQB1_28/DQB_60
DQB1_29/DQB_61
DQB1_30/DQB_62
DQB1_31/DQB_63
1
VGA@
C357
0.1U_0402_16V4Z
R452
VGA@
DDR2
GDDR5/GDDR3
DDR3
GDDR5
MVREFSA
R447
40.2_0402_1%
15mil
23
120P_0402_50V8
Place all these components very close

to GPU (Within 25mm) and
keep all component close to
each Other (within5mm) except Rser2
VGA@
QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7
DQMA#[0..7]
+1.5VSG
DQMA#[0..7]
C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5
p.
su
R450
40.2_0402_1%
A34
E30
E26
C20
C16
C12
J11
F8
23
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
+1.5VSG
C34
D29
D25
E20
E16
E12
J10
D7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
A_BA[0..2]
VGA@
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
A_BA[0..2]
U8D
DDR2
GDDR3/GDDR5
DDR3
MDB[0..63]
MDB[0..63]
1
2
A32
C32
D23
E22
C14
A14
E10
D9
24
C356
0.1U_0402_16V4Z
100_0402_1%
C355
0.1U_0402_16V4Z
VGA@
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
A_BA2
A_BA0
A_BA1
MAA[0..12] 23
15mil
MVREFDA
G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17
VGA@
40.2_0402_1%
NC_DQA0_0/DQA_0
NC_MAA0_0/MAA_0
NC_DQA0_1/DQA_1
NC_MAA0_1/MAA_1
NC_DQA0_2/DQA_2
NC_MAA0_2/MAA_2
NC_DQA0_3/DQA_3
NC_MAA0_3/MAA_3
NC_DQA0_4/DQA_4
NC_MAA0_4/MAA_4
NC_DQA0_5/DQA_5
NC_MAA0_5/MAA_5
NC_DQA0_6/DQA_6
NC_MAA0_6/MAA_6
NC_DQA0_7/DQA_7
NC_MAA0_7/MAA_7
NC_DQA0_8/DQA_8
NC_MAA1_0/MAA_8
NC_DQA0_9/DQA_9
NC_MAA1_1/MAA_9
NC_DQA0_10/DQA_10
NC_MAA1_2/MAA_10
NC_DQA0_11/DQA_11
NC_MAA1_3/MAA_11
NC_DQA0_12/DQA_12
NC_MAA1_4/MAA_12
NC_DQA0_13/DQA_13
NC_MAA1_5/MAA_13_BA2
NC_DQA0_14/DQA_14
NC_MAA1_6/MAA_14_BA0
NC_DQA0_15/DQA_15
NC_MAA1_7/MAA_A15_BA1
NC_DQA0_16/DQA_16
NC_DQA0_17/DQA_17
NC_WCKA0_0/DQMA_0
NC_DQA0_18/DQA_18
NC_WCKA0B_0/DQMA_1
NC_DQA0_19/DQA_19
NC_WCKA0_1/DQMA_2
NC_DQA0_20/DQA_20
NC_WCKA0B_1/DQMA_3
NC_DQA0_21/DQA_21
NC_WCKA1_0/DQMA_4
NC_DQA0_22/DQA_22
NC_WCKA1B_0/DQMA_5
NC_DQA0_23/DQA_23
NC_WCKA1_1/DQMA_6
NC_DQA0_24/DQA_24
NC_WCKA1B_1/DQMA_7
GDDR5/DDR2/GDDR3
NC_DQA0_25/DQA_25
NC_DQA0_26/DQA_26 NC_EDCA0_0/QSA_0/RDQSA_0
NC_DQA1_0/DQA_32
NC_EDCA1_2/QSA_6/RDQSA_6
NC_DQA1_1/DQA_33
NC_EDCA1_3/QSA_7/RDQSA_7
NC_DQA1_2/DQA_34
NC_DQA1_3/DQA_35 NC_DDBIA0_0/QSA_0B/WDQSA_0
NC_DQA1_10/DQA_42NC_DDBIA1_3/QSA_7B/WDQSA_7
NC_DQA1_11/DQA_43
NC_DQA1_12/DQA_44
NC_ADBIA0/ODTA0
NC_DQA1_13/DQA_45
NC_ADBIA1/ODTA1
NC_DQA1_14/DQA_46
NC_DQA1_15/DQA_47
NC_CLKA0
NC_DQA1_16/DQA_48
NC_CLKA0B
NC_DQA1_17/DQA_49
NC_DQA1_18/DQA_50
NC_CLKA1
NC_DQA1_19/DQA_51
NC_CLKA1B
NC_DQA1_20/DQA_52
NC_DQA1_21/DQA_53
NC_RASA0B
NC_DQA1_22/DQA_54
NC_RASA1B
NC_DQA1_23/DQA_55
NC_DQA1_24/DQA_56
NC_CASA0B
NC_DQA1_25/DQA_57
NC_CASA1B
NC_DQA1_26/DQA_58
NC_DQA1_27/DQA_59
NC_CSA0B_0
NC_DQA1_28/DQA_60
NC_CSA0B_1
NC_DQA1_29/DQA_61
NC_DQA1_30/DQA_62
NC_CSA1B_0
NC_DQA1_31/DQA_63
NC_CSA1B_1
MAA[0..12]
R446
C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5
DDR2
GDDR5/GDDR3
DDR3
//
m
+1.5VSG
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
GDDR5
R448
U8C
DDR2
GDDR3/GDDR5
DDR3
MDA[0..63]
MDA[0..63]
MEMORY INTERFACE A
23
yc
om
Park&Seymour is single channel for

memory (channel B only)
Issued Date
Compal Secret Data
2010/07/12
Deciphered Date
2012/07/12
A
Title
Vancouver_Memory
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet

E
20
of
49
Seymour/Whistler
PCIE_VDDR,PCIE_PVDD can combian to PCIE_VDDR
U8E
//
m
tt
1
2
/x
/
VGA@
2
VGA@
2
VGA@
2
+VGA_CORE
Granville PRO VDDC:47A

Madison PRO VDDC+VDDCI=31.3A
Whistler PRO VDDC+VDDCI=24A
SeymourXT VDDC+VDDCI=14.2A
RobsonXT VDDC+VDDCI=12.9A
BIF_VDDC
Park/Madison:Connect to VDDC
Seymour/Whisler:
dGPU operating:VDDC
BACO mode:+1.0V
2010/04/27
non-BACO design,N27,T27
connect BIF_VDDC to VDDC
For BACO design
VDDCI and VDDC should have seperate regulators with a merge option on PCB
For Madison and Park, VDDCI and VDDC can share one common regulator
3
(GDDR3/DDR3 1.12V@4A VDDCI)

(GDDR5 1.12V@16A VDDCI)
AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13
SM01000BY00 5000ma 120ohm@100mhz DCR 0.02
160mil
+VDDCI
VGA@
1
VGA@
1
VGA@
1
VGA@
1
VGA@
1
VGA@
1
VGA@
1
VGA@
1
VGA@
1
VGA@
1
VGA@
VGA@
VGA@
VGA@
VGA@
2
1
VGA@
L19
FBMA-L11-201209-121LMA50T_0805
2
1
VGA@
L21
FBMA-L11-201209-121LMA50T_0805
+VGA_CORE
Seymour/Whistler
C465
10U_0603_6.3V6M
FB_GND
VGA@
C457
1U_0402_6.3V6K
@
R466
0_0402_5%
VGA@
2
VGA@
C464
10U_0603_6.3V6M
FB_VDDCI
AH29
VGA@
VGA@
2
C463
10U_0603_6.3V6M
FB_GND
C462
0.1U_0402_16V4Z
FB_VDDC
NC 20101116
C461
1U_0402_6.3V6K
AF28
AG28
VGA@
VGA@
VGA@
2
C456
1U_0402_6.3V6K
10mil
VGA@
2
C455
1U_0402_6.3V6K
GCORE_SEN
VGA@
C454
1U_0402_6.3V6K
VOLTAGE
SENESE
VGA@
2
+BIF_VDDC
Granville VDDCI:4.6A
VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
5A VDDCI#9
VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
ISOLATED VDDCI#15
CORE I/O VDDCI#16
VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22
C453
1U_0402_6.3V6K
GCORE_SEN
120mA
SPVSS
+BIF_VDDC
VGA@
VGA@
C452
1U_0402_6.3V6K
48
SPV10
VGA@
C451
1U_0402_6.3V6K
AN9
AN10
VGA@
C450
1U_0402_6.3V6K
+SPV10
C449
1U_0402_6.3V6K
470ohm/1A
SM010030010
VGA@
VGA@
VGA@
C448
1U_0402_6.3V6K
C447
0.1U_0402_16V4Z
VGA@
1
C446
1U_0402_6.3V6K
VGA@
1
75mA
p:
20mil
150mA
SPV18
AM10
VGA@
C425
1U_0402_6.3V6K
BLM18AG121SN1D_0603
VGA@
+SPV_18
VGA@
C414
1U_0402_6.3V6K
+1.0VSG
C445
10U_0603_6.3V6M
L18
VGA@
C424
1U_0402_6.3V6K
VGA@
1
C460
0.1U_0402_16V4Z
C459
1U_0402_6.3V6K
C458
10U_0603_6.3V6M
VGA@
1
MPV18#1
MPV18#2
VGA@
C413
1U_0402_6.3V6K
10mil
VGA@
1
H7
H8
C423
1U_0402_6.3V6K
L20
2
1
BLM18AG121SN1D_0603
VGA@
+MPV_18
VGA@
C412
1U_0402_6.3V6K
+1.8VSG
20mil
VGA@
C434
10U_0603_6.3V6M
SM010030010
PLL
C422
1U_0402_6.3V6K
VGA@
C411
1U_0402_6.3V6K
C395
10U_0603_6.3V6M
NC_VDDRHB
NC_VSSRHB
C433
10U_0603_6.3V6M
C444
0.1U_0402_16V4Z
C443
1U_0402_6.3V6K
VGA@
1
C442
0.1U_0402_16V4Z
VGA@
1
C441
1U_0402_6.3V6K
VGA@
1
C440
10U_0603_6.3V6M
VGA@
1
+1.0VSG
Granville VDDC:47A
C421
1U_0402_6.3V6K
V12
U12
VGA@
1
C410
1U_0402_6.3V6K
L17
2
1
BLM18AG121SN1D_0603
VGA@
NC_VDDRHA
NC_VSSRHA
C394
1U_0402_6.3V6K
+1.8VSG
M20
M21
C432
10U_0603_6.3V6M
SM010030010
C420
1U_0402_6.3V6K
470ohm/1A
170mA
C409
1U_0402_6.3V6K
VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#6
C370
1U_0402_6.3V6K
AD12
AF11
AF12
AG11
C431
10U_0603_6.3V6M
VDDR4#4
VDDR4#5
VDDR4#7
VDDR4#8
C419
1U_0402_6.3V6K
AF13
AF15
AG13
AG15
60mA
VGA@
1
C408
1U_0402_6.3V6K
C439
0.1U_0402_16V4Z
VGA@
1
C438
1U_0402_6.3V6K
VGA@
VGA@
1
C437
10U_0603_6.3V6M
VGA@
1
VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4
20mil
+VDDR4_5
1
L16
120ohm/0.3ABLM18AG121SN1D_0603
AF23
AF24
AG23
AG24
VGA@
1
C369
1U_0402_6.3V6K
10mil
VGA@
1
C430
10U_0603_6.3V6M
VGA@
VGA@
1
C418
1U_0402_6.3V6K
I/O
VGA@
1
C407
1U_0402_6.3V6K
219mA
VGA@
1
C429
10U_0603_6.3V6M
VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4
VGA@
1
C428
10U_0603_6.3V6M
VGA@
C426
1U_0402_6.3V6K
+1.8VSG
C415
10U_0603_6.3V6M
SM010030010
VGA@
C427
0.1U_0402_16V4Z
AF26
AF27
AG26
AG27
1
+1.8VSG
L13 VGA@
FBMA-L11-201209-221LMA30T_0805
220ohm/2A
VGA@
1
C417
1U_0402_6.3V6K
20mil
+VDD_CT
+3VSG
2
LEVEL
TRANSLATION
C416
1U_0402_6.3V6K
VGA@
C393
1U_0402_6.3V6K
POWER
C403
1U_0402_6.3V6K
C402
10U_0603_6.3V6M
Ref137-12~ remove Bead
VGA@
C368
1U_0402_6.3V6K
VGA@
C404
0.1U_0402_16V4Z
VGA@
C406
1U_0402_6.3V6K
120ohm/0.3A
AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
C405
1U_0402_6.3V6K
+1.8VSG
VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
47A VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC/BIF_VDDC#33
VDDC#34
VDDC#35
VDDC#36
55mA VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC/BIF_VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58
CORE
VGA@
1
C392
1U_0402_6.3V6K
3400mA 2A
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28
VGA@
1
C391
1U_0402_6.3V6K
1
L14
BLM18AG121SN1D_0603
C401
1U_0402_6.3V6K
C400
1U_0402_6.3V6K
C399
1U_0402_6.3V6K
C398
1U_0402_6.3V6K
C397
10U_0603_6.3V6M
C373
10U_0603_6.3V6M
C372
10U_0603_6.3V6M
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
+PCIE_VDDR
VGA@ VGA@
1
1
p.
su
VGA@
1
C384
10U_0603_6.3V6M
VGA@
1
C365
1U_0402_6.3V6K
SM010014520 3000ma 220ohm@100mhz DCR 0.04
40mil
AA31
AA32
AA33
AA34
V28
W29
W30
Y31
AB37
C383
1U_0402_6.3V6K
PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
440mA PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
PCIE_VDDR/PCIE_PVDD
C364
1U_0402_6.3V6K
VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34
C382
0.1U_0402_16V4Z
C390
1U_0402_6.3V6K
C389
1U_0402_6.3V6K
C367
1U_0402_6.3V6K
VGA@
1
C388
1U_0402_6.3V6K
VGA@
1
C387
1U_0402_6.3V6K
VGA@
1
C386
1U_0402_6.3V6K
VGA@
1
C366
1U_0402_6.3V6K
VGA@
1
PCIE
AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7
C381
0.1U_0402_16V4Z
C363
1U_0402_6.3V6K
C380
1U_0402_6.3V6K
C379
1U_0402_6.3V6K
VGA@
1
C371
10U_0603_6.3V6M
SM010030010
MEM I/O
VGA@
1
VGA@
1
C385
1U_0402_6.3V6K
VGA@
1
VGA@
1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@ 1 VGA@ 1
C396
10U_0603_6.3V6M
VGA@
VGA@
1
VGA@
1
VGA@
1
C378
1U_0402_6.3V6K
C374 change to SF000002Z00

20101228
VGA@
1
C377
1U_0402_6.3V6K
VGA@
1
C362
1U_0402_6.3V6K
VGA@
1
C376
1U_0402_6.3V6K
C375
1U_0402_6.3V6K
VGA@
1
1
VGA@
C374
330U_2.5V_M
yc
om
+1.5VSG
VGA@
Issued Date
Compal Secret Data
2010/07/12
Deciphered Date
2012/07/12
A
Title
Vancouver_Power/GND
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet

E
21
of
49
DP C/D POWER
20mil
+DPABCD_VDD18
AN17
AP16
AP17
AW14
AW16
20mil
+DPABCD_VDD18
AP22
AP23
20mil
AP14
AP15
25
//
m
p:
SM01000BL00
1000ma 470ohm@100mhz DCR 0.2
+1.0VSG
yc
om
FootPrint
PX_EN
PX_EN: PU at P.20
SBIOS will control VGA power on/off.
High :BACO mode enable
LOW:BACO disable
AP25
AP26
+DPABCD_VDD18
DPCD/DPD_VDD10#1
DPCD/DPD_VDD10#2
DPAB/DPB_VDD10#1
DPAB/DPB_VDD10#2
AN33
AP33
+DPABCD_VDD10
20mil
DP/DPB_VSSR#1
DP/DPB_VSSR#2
DP/DPB_VSSR#3
DP/DPB_VSSR#4
DP/DPB_VSSR#5
DPCD_CALR
DPAB_CALR
DP E/F POWER
DPEF/DPE_VDD18#1
DPEF/DPE_VDD18#2
DP PLL POWER
DPAB_VDD18/DPA_PVDD
DP_VSSR/DPA_PVSS
DPEF/DPE_VDD10#1
DPEF/DPE_VDD10#2
DPAB_VDD18/DPB_PVDD
DP_VSSR/DPB_PVSS
DP/DPE_VSSR#1
DP/DPE_VSSR#2
DP/DPE_VSSR#3
DP/DPE_VSSR#4
DPCD_VDD18/DPC_PVDD
DP_VSSR/DPC_PVSS
DPEF_VDD18/DPE_PVDD
DP_VSSR/DPE_PVSS
AK33
AK34
AW28
AF39
AH39
AK39
AL34
AM34
VGA@
+1.8VSG
FootPrint
L25
MBK1608221YZF_2P
2
1
VGA@
220mA
R468
150_0402_1%
2
VGA@
AU28
AV27
+DPABCD_VDD18
AV29
AR28
+DPABCD_VDD18
AU18
AV17
+DPABCD_VDD18
AV19
AR18
+DPABCD_VDD18
AM37
AN38
+1.0VSG
AL38
AM35
FootPrint
10mil
10mil
10mil
10mil
3
+DPEF_VDD18
20mA
DPEF/DPF_VDD10#1
DPEF/DPF_VDD10#2
DPEF_VDD18/DPF_PVDD
DP_VSSR/DPF_PVSS
C483
0.1U_0402_16V4Z
SM01000BL00
1000ma 470ohm@100mhz DCR 0.2
20mA
DPEF/DPF_VDD18#1
DPEF/DPF_VDD18#2
AN29
AP29
AP30
AW30
AW32
20mA
DPCD_VDD18/DPD_PVDD
DP_VSSR/DPD_PVSS
20mil
+DPEF_VDD10
VGA@
DP/DPD_VSSR#1
DP/DPD_VSSR#2
DP/DPD_VSSR#3
DP/DPD_VSSR#4
DP/DPD_VSSR#5
20mA
AF34
AG34
20mA
AL33
AM33
AN34
AP39
AR39
AU37
+DPEF_VDD18
20mil
20mA
AH34
AJ34
VGA@
20mil
DPAB/DPB_VDD18#1
DPAB/DPB_VDD18#2
20mil
+DPEF_VDD10
DP mode:220mA
LVDS mode:240mA
L27
MBK1608221YZF_2P
2
1
VGA@
FootPrint
AW18
AN27
AP27
AP28
AW24
AW26
DPCD/DPD_VDD18#1
DPCD/DPD_VDD18#2
20mil
+DPEF_VDD18
C480
0.1U_0402_16V4Z
PX_EN
L26
MBK1608221YZF_2P
2
1
VGA@
R467
150_0402_1%
2
1
VGA@
20mil
+DPABCD_VDD10
L23
MBK1608221YZF_2P
2
1
VGA@
300mA
C477
10U_0603_6.3V6M
+1.8VSG
DP mode:300mA
LVDS mode:440mA
AP31
AP32
20mil
+DPABCD_VDD18
C476
1U_0402_6.3V6K
SM01000BL00
1000ma 470ohm@100mhz DCR 0.2
DP/DPA_VSSR#1
DP/DPA_VSSR#2
DP/DPA_VSSR#3
DP/DPA_VSSR#4
DP/DPA_VSSR#5
AN24
AP24
C475
0.1U_0402_16V4Z
AN19
AP18
AP19
AW20
AW22
DPAB/DPA_VDD10#1
DPAB/DPA_VDD10#2
DP/DPC_VSSR#1
DP/DPC_VSSR#2
DP/DPC_VSSR#3
DP/DPC_VSSR#4
DP/DPC_VSSR#5
p.
su
+DPABCD_VDD10
Manhatann:220mA
Seymour:110mA
DPCD/DPC_VDD10#1
DPCD/DPC_VDD10#2
DPAB/DPA_VDD18#1
DPAB/DPA_VDD18#2
C471
1U_0402_6.3V6K
AP13
AT13
DPCD/DPC_VDD18#1
DPCD/DPC_VDD18#2
C470
0.1U_0402_16V4Z
20mil
+DPABCD_VDD10
AP20
AP21
SM01000BL00
1000ma 470ohm@100mhz DCR 0.2
DP A/B POWER
/x
/
Manhatann:300mA
Seymour:150mA
C482
1U_0402_6.3V6K
U8H
+DPEF_VDD18
10mil
10mil
DP/DPF_VSSR#1
DP/DPF_VSSR#2
DP/DPF_VSSR#3
DP/DPF_VSSR#4
DP/DPF_VSSR#5
R470
2
1 AM39
VGA@
150_0402_1%
DPEF_CALR
VGA@
Park/Madison :AL21left NC
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
VGA@
REF137-13 update
C479
1U_0402_6.3V6K
GND#100
GND#101
GND#102
GND#103
GND#104
GND#105
GND#106
GND#107
GND#108
GND#109
GND#110
GND#111
GND#112
GND#113
GND#114
GND#115
GND#116
GND#117
GND#118
GND#119
GND#120
GND#121
GND#122
GND#123
GND#124
GND#125
GND#126
GND#127
GND#128
GND#129
GND#130
GND#131
GND#132
GND#133
GND#134
GND#135
GND#136
GND#137
GND#138
GND#139
GND#140
GND#141
GND#142
GND#143
GND#144
GND#145
GND#146
GND#147
GND#148
GND#149
GND#150
GND#151
GND#153
GND#154
GND#155
GND#156
GND#157
GND#158
GND#159
GND#160
GND#161
GND#163
GND#164
GND#165
GND#166
GND#167
GND#168
GND#169
GND#170
GND#171
GND#172
GND#173
GND#174
GND#175
GND#152
GND#162
DPx-VSSR,DPx_PVSS can combian to DP_VSSR

(Manhatann should have individual GND)
where x is A,B,C,D,E,F
C481
10U_0603_6.3V6M
GND
A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13
C478
10U_0603_6.3V6M
GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND/PX_EN#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
Seymour/Whistler
DPA_VDD10,DPB_VDD10
can combian to DPAB_VDD10
DPC_VDD10,DPD_VDD10
can combian to DPCD_VDD10
DPE_VDD10,DPD_VDD10
can combian to DPEF_VDD10
C469
10U_0603_6.3V6M
F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35
tt
AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39
U8F
DPA_VDD18,DPA_PVDD,DPB_VDD18,DPB_PVDD
can combian to DPAB_VDD18
DPC_VDD18,DPC_PVDD,DPD_VDD18,DPD_PVDD
can combian to DPCD_VDD18
(DPD_VDD18,DPD_PVDD not applicable on Robson/Park)
DPE_VDD18,DPE_PVDD,DPF_VDD18,DPF_PVDD
can combian to DPEF_VDD18
A39
AW1
AW39
Seymour/Whistler:
AL21:PX_EN
use to control discreate GPU regulators
for power express BACO mode
Support BACO:
output High3.3V:turn off regulators (BACO mode on)
output Low0V:turn on regulators (BACO mode off)
need PD resistor
No support BACO:
left NC
B
Issued Date
Compal Secret Data
2010/07/12
2012/07/12
Deciphered Date
C
Title
Vancouver_Power/GND
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
22
of
49
DQSL
DQSU
VRAM_RST#
20,24 VRAM_RST#
T2
RESET
L8
R475
4.99K_0402_1% VGA@
tt
RESET
ZQ/ZQ0
VRAM_RST# T2
L8
VGA@
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
J1
L1
J9
L9
R474
243_0402_1%
VGA@
+1.5VSG
R479
4.99K_0402_1% VGA@
R480
4.99K_0402_1%
VGA@
15mil
15mil
VREFDA_Q2
R490
4.99K_0402_1%
VGA@
C487
VGA@
+1.5VSG
VREFCA_A3
R491
4.99K_0402_1%
VGA@
C488
VGA@
VGA@
VGA@
VREFDA_Q4
R494
C491
4.99K_0402_1%
VGA@
VGA@
+1.5VSG
VGA@
1
C518
10U_0603_6.3V6M
VGA@
1
C517
10U_0603_6.3V6M
VGA@
1
C520
10U_0603_6.3V6M
VGA@
1
VGA@
1
Compal Secret Data
Issued Date
VGA@
1
VGA@
1
2010/07/12
2012/07/12
Deciphered Date
C
C511
1U_0402_6.3V6K
VGA@
1
C510
1U_0402_6.3V6K
15mil
VGA@
1
Title
VRAM_DDR3 / Channel A
+1.5VSG
VREFCA_A4
C490
C509
1U_0402_6.3V6K
C519
10U_0603_6.3V6M
C521
0.01U_0402_16V7K
B1
B9
D1
D8
E2
E8
F9
G1
G9
R482
4.99K_0402_1% VGA@
C508
1U_0402_6.3V6K
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
15mil
C507
1U_0402_6.3V6K
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
R493
4.99K_0402_1%
VGA@
C506
1U_0402_6.3V6K
C505
1U_0402_6.3V6K
C504
1U_0402_6.3V6K
C503
1U_0402_6.3V6K
C502
1U_0402_6.3V6K
+1.5VSG
C501
1U_0402_6.3V6K
2
56_0402_1%
ZQ/ZQ0
+1.5VSG
+1.5VSG
VGA@
1
VGA@
1
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
RESET
VREFDA_Q3
R492
C489
4.99K_0402_1%
VGA@
VGA@
1
VGA@
1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R481
4.99K_0402_1% VGA@
15mil
VGA@
1
VGA@
1
A1
A8
C1
C9
D2
E9
F1
H2
H9
96-BALL
SDRAM DDR3
K4B1G1646E-HC12_FBGA96
X76@
+1.5VSG
VGA@
1
VGA@
1
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
0.1U_0402_16V4Z
DQSL
DQSU
VGA@
1
VGA@
G3
B7
B2
D9
G7
K2
K8
N1
N9
R1
R9
C500
1U_0402_6.3V6K
2
56_0402_1%
VGA@
R478
4.99K_0402_1% VGA@
C499
1U_0402_6.3V6K
1
R498
C485
VGA@
C486
C498
1U_0402_6.3V6K
CLKA1#
QSA#6
QSA#7
VGA@
1
C516
10U_0603_6.3V6M
20
DQSL
DQSU
VGA@
1
C515
10U_0603_6.3V6M
1
R497
DML
DMU
VGA@
1
C514
10U_0603_6.3V6M
CLKA1
E7
D3
+1.5VSG
C512
0.01U_0402_16V7K
VGA@
20
DQMA#6
DQMA#7
VGA@
1
C513
10U_0603_6.3V6M
2
4
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DML
DMU
VGA@
1
2
56_0402_1%
1
DQSL
DQSU
VGA@
1
VGA@
VGA@
F3
C7
96-BALL
SDRAM DDR3
X76@
+1.5VSG
+1.5VSG
VREFCA_A2
R489
4.99K_0402_1%
VGA@
J1
L1
J9
L9
R473
243_0402_1%
VGA@
15mil
C497
1U_0402_6.3V6K
1
R496
C496
1U_0402_6.3V6K
CLKA0#
QSA6
QSA7
VGA@
1
C495
1U_0402_6.3V6K
20
2
56_0402_1%
DQSL
DQSU
VGA@
1
C494
1U_0402_6.3V6K
1
R495
ODT/ODT0
CS/CS0
RAS
CAS
WE
VGA@
1
C493
1U_0402_6.3V6K
CLKA0
L8
K1
L2
J3
K3
L3
VGA@
1
C492
1U_0402_6.3V6K
VGA@
20
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VREFDA_Q1
+1.5VSG
G3
B7
ODTA1_1
CSA1#_0
RASA1#
CASA1#
WEA1#
+1.5VSG
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
BA0
BA1
BA2
0.1U_0402_16V4Z
QSA#4
QSA#5
VRAM_RST# T2
R477
4.99K_0402_1% VGA@
15mil
R488
4.99K_0402_1%
VGA@
E7
D3
A1
A8
C1
C9
D2
E9
F1
H2
H9
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
0.1U_0402_16V4Z
VGA@
DQMA#4
DQMA#5
CK
CK
CKE/CKE0
0.1U_0402_16V4Z
C484
F3
C7
0.1U_0402_16V4Z
ODTA1_1
15mil
VREFCA_A1
R487
4.99K_0402_1%
VGA@
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
0.1U_0402_16V4Z
R486
56_0402_1%
2
VGA@
R476
4.99K_0402_1% VGA@
0.1U_0402_16V4Z
R485
0_0402_5%
ODTA1 2
1
1
VGA@
ZQ/ZQ0
96-BALL
SDRAM DDR3
X76@
+1.5VSG
+1.5VSG
R484
VGA@
56_0402_1%
ODTA0 2
1
1
2
R483
0_0402_5% VGA@
J1
L1
J9
L9
R472
243_0402_1%
VGA@
0.1U_0402_16V4Z
ODTA1
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
ODTA0_1
20
RESET
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
Pull high for Madison and Park...
ODTA0
DQSL
DQSU
VRAM_RST# T2
96-BALL
SDRAM DDR3
X76@
+1.5VSG
+1.5VSG
20
G3
B7
J1
L1
J9
L9
R471
243_0402_1%
VGA@
QSA#3
QSA#1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
ZQ/ZQ0
L8
DML
DMU
QSA4
QSA5
J7
K7
K9
MDA63
MDA58
MDA60
MDA59
MDA61
MDA56
MDA62
MDA57
G3
B7
E7
D3
CSA1#_0
RASA1#
CASA1#
WEA1#
CLKA1
CLKA1#
CKEA1
+1.5VSG
D7
C3
C8
C2
A7
A2
B8
A3
QSA#2
QSA#0
DQMA#3
DQMA#1
20
20
20
20
M2
N8
M3
MDA48
MDA51
MDA55
MDA54
MDA50
MDA52
MDA49
MDA53
QSA#[7..0]
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
ODT/ODT0
CS/CS0
RAS
CAS
WE
A_BA0
A_BA1
A_BA2
B2
D9
G7
K2
K8
N1
N9
R1
R9
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
20
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DQSL
DQSU
K1
L2
J3
K3
L3
ODTA1_1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
DML
DMU
F3
C7
A1
A8
C1
C9
D2
E9
F1
H2
H9
CK
CK
CKE/CKE0
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E7
D3
QSA3
QSA1
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
J7
K7
K9
VREFCA
VREFDQ
DQMA#2
DQMA#0
ODT/ODT0
CS/CS0
RAS
CAS
WE
CLKA1
CLKA1#
CKEA1
+1.5VSG
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
BA0
BA1
BA2
M8
H1
QSA[7..0]
K1
L2
J3
K3
L3
20
M2
N8
M3
MDA43
MDA44
MDA40
MDA45
MDA42
MDA46
MDA41
MDA47
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
20
ODTA0_1
CSA0#_0
RASA0#
CASA0#
WEA0#
+1.5VSG
A_BA0
A_BA1
A_BA2
D7
C3
C8
C2
A7
A2
B8
A3
VREFCA_A4
VREFDA_Q4
DQSL
DQSU
CK
CK
CKE/CKE0
B2
D9
G7
K2
K8
N1
N9
R1
R9
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MDA35
MDA32
MDA38
MDA34
MDA37
MDA36
MDA39
MDA33
F3
C7
DQMA#[7..0]
A1
A8
C1
C9
D2
E9
F1
H2
H9
J7
K7
K9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
E3
F7
F2
F8
H3
H8
G2
H7
QSA2
QSA0
CSA0#_0
RASA0#
CASA0#
WEA0#
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
CLKA0
CLKA0#
CKEA0
+1.5VSG
+1.5VSG
BA0
BA1
BA2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
ODT/ODT0
CS/CS0
RAS
CAS
WE
M2
N8
M3
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
VREFCA
VREFDQ
K1
L2
J3
K3
L3
ODTA0_1
A_BA0
A_BA1
A_BA2
M8
H1
CK
CK
CKE/CKE0
MAA[13..0]
20
20
20
20
20
J7
K7
K9
B2
D9
G7
K2
K8
N1
N9
R1
R9
MDA15
MDA11
MDA14
MDA10
MDA13
MDA9
MDA12
MDA8
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
CLKA0
CLKA0#
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
D7
C3
C8
C2
A7
A2
B8
A3
VREFCA_A3
VREFDA_Q3
CKEA0
+1.5VSG
BA0
BA1
BA2
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MDA25
MDA30
MDA24
MDA29
MDA26
MDA31
MDA27
MDA28
p.
su
20
M2
N8
M3
MDA[0..63]
MDA[0..63]
20
A_BA0
A_BA1
A_BA2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
E3
F7
F2
F8
H3
H8
G2
H7
20
20
20
20
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
U14
X76L04@
MDA0
MDA5
MDA1
MDA7
MDA3
MDA4
MDA2
MDA6
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
VREFCA
VREFDQ
2GVRAM-HYNIX
X76L03@
D7
C3
C8
C2
A7
A2
B8
A3
M8
H1
1GVRAM-HYNIX
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
ZZZ4
VREFCA_A2
VREFDA_Q2
ZZZ3
1
MDA22
MDA19
MDA21
MDA18
MDA23
MDA16
MDA20
MDA17
X76L02@
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
E3
F7
F2
F8
H3
H8
G2
H7
//
m
X76L01@
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
2GVRAM-SAM
VREFCA
VREFDQ
1GVRAM-SAM
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
yc
om
VREFCA_A1 M8
VREFDA_Q1 H1
ZZZ2
U13
p:
ZZZ1
U12
U11
/x
/

Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
23
of
49
20
20
20
20
DQMB#[7..0]
QSB3
QSB1
F3
C7
DQSL
DQSU
DQMB#3
DQMB#1
E7
D3
DML
DMU
QSB#3
QSB#1
G3
B7
DQSL
DQSU
CSB0#_0
RASB0#
CASB0#
WEB0#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQMB#2
DQMB#0
E7
D3
DML
DMU
QSB#2
QSB#0
G3
B7
DQSL
DQSU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
20
20
20
20
J7
K7
K9
CK
CK
CKE/CKE0
K1
L2
J3
K3
L3
ODT/ODT0
CS/CS0
RAS
CAS
WE
QSB4
QSB5
F3
C7
DQSL
DQSU
DQMB#4
DQMB#5
E7
D3
DML
DMU
QSB#4
QSB#5
G3
B7
DQSL
DQSU
CSB1#_0
RASB1#
CASB1#
WEB1#
tt
p.
su
DQMB#6
DQMB#7
E7
D3
DML
DMU
QSB#6
QSB#7
G3
B7
DQSL
DQSU
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
ZQ/ZQ0
+1.5VSG
J1
L1
J9
L9
VGA@
R509
4.99K_0402_1%
VGA@
1
2
2
R519
4.99K_0402_1%
C526
VGA@
VGA@
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B1
B9
D1
D8
E2
E8
F9
G1
G9
+1.5VSG
R510
4.99K_0402_1%
VGA@
VREFDB_Q3
R520
4.99K_0402_1%
C527
VGA@
VGA@
VGA@
VREFCB_A4
R521
4.99K_0402_1%
VGA@
1
VGA@
1
VGA@
1
VGA@
1
VGA@
1
+1.5VSG
1
VGA@ VGA@
C529
VGA@
VGA@
VGA@
1
VGA@
1
VGA@
1
VGA@
1
VGA@
1
VGA@
4
Compal Secret Data

2012/07/12
Deciphered Date
C
VREFDB_Q4
R522
4.99K_0402_1%
C558
10U_0603_6.3V6M
VGA@
C557
10U_0603_6.3V6M
2010/07/12
C550
1U_0402_6.3V6K
C528
VGA@
VGA@
+1.5VSG
C556
10U_0603_6.3V6M
A1
A8
C1
C9
D2
E9
F1
H2
H9
C549
1U_0402_6.3V6K
VGA@
1
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
C548
1U_0402_6.3V6K
VGA@
1
B2
D9
G7
K2
K8
N1
N9
R1
R9
RESET
C547
1U_0402_6.3V6K
VGA@
1
Issued Date
DQSL
DQSU
C546
1U_0402_6.3V6K
VGA@
1
1 VGA@
MDB56
MDB59
MDB63
MDB62
MDB57
MDB61
MDB58
MDB60
0.1U_0402_16V4Z
R508
4.99K_0402_1%
VGA@
VREFCB_A3
C525
VGA@
VGA@
F3
C7
0.1U_0402_16V4Z
R507
4.99K_0402_1%
VGA@
VGA@
1
D7
C3
C8
C2
A7
A2
B8
A3
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
BA0
BA1
BA2
+1.5VSG
C555
10U_0603_6.3V6M
C559
0.01U_0402_16V7K
+1.5VSG
MDB55
MDB49
MDB52
MDB50
MDB53
MDB48
MDB54
MDB51
96-BALL
SDRAM DDR3
X76@
0.1U_0402_16V4Z
R502
243_0402_1%
C553
10U_0603_6.3V6M
VGA@
QSB6
QSB7
+1.5VSG
C554
10U_0603_6.3V6M
ODT/ODT0
CS/CS0
RAS
CAS
WE
+1.5VSG
+1.5VSG
C552
10U_0603_6.3V6M
CLKB1#
R525
56_0402_1%
1
2
VGA@
R526
56_0402_1%
1
2
VGA@
K1
L2
J3
K3
L3
L8
C545
1U_0402_6.3V6K
CK
CK
CKE/CKE0
T2
E3
F7
F2
F8
H3
H8
G2
H7
+1.5VSG
J7
K7
K9
VRAM_RST#
C544
1U_0402_6.3V6K
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
CLKB1
CLKB1#
CKEB1
ODTB1_1
CSB1#_0
RASB1#
CASB1#
WEB1#
B1
B9
D1
D8
E2
E8
F9
G1
G9
C543
1U_0402_6.3V6K
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
C542
1U_0402_6.3V6K
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
C541
1U_0402_6.3V6K
C551
10U_0603_6.3V6M
CLKB1
C530
0.01U_0402_16V7K
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
M2
N8
M3
96-BALL
SDRAM DDR3
X76@
C540
1U_0402_6.3V6K
J1
L1
J9
L9
VREFDB_Q2
R518
4.99K_0402_1%
C539
1U_0402_6.3V6K
VGA@
1
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
B_BA0
B_BA1
B_BA2
+1.5VSG
+1.5VSG
R506
4.99K_0402_1%
C538
1U_0402_6.3V6K
VGA@
C524
VGA@
VGA@
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
VREFCA
VREFDQ
+1.5VSG
VREFCB_A2
R517
4.99K_0402_1%
C537
1U_0402_6.3V6K
VGA@
1
C536
1U_0402_6.3V6K
VGA@
1
C535
1U_0402_6.3V6K
VGA@
1
C534
1U_0402_6.3V6K
VGA@
VGA@
1
C533
1U_0402_6.3V6K
56_0402_1%
2
C532
1U_0402_6.3V6K
+1.5VSG
C531
1U_0402_6.3V6K
CLKB0#
C523
VGA@
VGA@
A1
A8
C1
C9
D2
E9
F1
H2
H9
0.1U_0402_16V4Z
R524
VREFDB_Q1
R516
4.99K_0402_1%
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
ZQ/ZQ0
VGA@
0.1U_0402_16V4Z
R523 56_0402_1%
2
VGA@
VGA@
0.1U_0402_16V4Z
R515
C522
4.99K_0402_1% VGA@
VGA@
0.1U_0402_16V4Z
R514
56_0402_1%
2
VGA@
0.1U_0402_16V4Z
ODTB1_1
VGA@
VREFCB_A1
VGA@
ODTB1 R513
0_0402_5%
CLKB0
R505
4.99K_0402_1%
B2
D9
G7
K2
K8
N1
N9
R1
R9
RESET
R504
4.99K_0402_1%
0_0402_5%
ODTB1
+1.5VSG
L8
R501
243_0402_1%
96-BALL
SDRAM DDR3
X76@
+1.5VSG
R503
4.99K_0402_1% VGA@
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
T2
R512
56_0402_1%
2
VGA@
VGA@
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
R500
243_0402_1%
J1
L1
J9
L9
VGA@
ODTB0 R511
B1
B9
D1
D8
E2
E8
F9
G1
G9
VRAM_RST#
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
ODTB0
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1
+1.5VSG
RESET
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
L8
MDB44
MDB43
MDB47
MDB41
MDB45
MDB40
MDB46
MDB42
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
BA0
BA1
BA2
VRAM_RST# T2
ZQ/ZQ0
96-BALL
SDRAM DDR3
X76@
+1.5VSG
ODTB0_1
20
DQSL
DQSU
CLKB1
CLKB1#
ODTB1_1
D7
C3
C8
C2
A7
A2
B8
A3
VREFCB_A4 M8
VREFDB_Q4 H1
+1.5VSG
M2
N8
M3
CKEB1
MDB35
MDB37
MDB34
MDB39
MDB33
MDB38
MDB32
MDB36
RESET
VGA@
J1
L1
J9
L9
Pull high for Madison and Park...
F3
C7
A1
A8
C1
C9
D2
E9
F1
H2
H9
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
E3
F7
F2
F8
H3
H8
G2
H7
T2
1
R499
243_0402_1%
20
QSB2
QSB0
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VRAM_RST#
L8
20
ODT/ODT0
CS/CS0
RAS
CAS
WE
20
+1.5VSG
yc
om
QSB#[7..0]
20,23 VRAM_RST#
20
K1
L2
J3
K3
L3
ODTB0_1
CSB0#_0
RASB0#
CASB0#
WEB0#
//
m
20
20
CK
CK
CKE/CKE0
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
B_BA0
B_BA1
B_BA2
QSB[7..0]
20
J7
K7
K9
B2
D9
G7
K2
K8
N1
N9
R1
R9
20
A1
A8
C1
C9
D2
E9
F1
H2
H9
CLKB0
CLKB0#
CKEB0
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
BA0
BA1
BA2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
20
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
M2
N8
M3
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
VREFCA
VREFDQ
ODT/ODT0
CS/CS0
RAS
CAS
WE
ODTB0_1
MDB1
MDB6
MDB0
MDB4
MDB3
MDB7
MDB2
MDB5
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
+1.5VSG
B_BA0
B_BA1
B_BA2
+1.5VSG
D7
C3
C8
C2
A7
A2
B8
A3
VREFCB_A3 M8
VREFDB_Q3 H1
K1
L2
J3
K3
L3
MAB[13..0]
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MDB22
MDB20
MDB21
MDB18
MDB19
MDB17
MDB23
MDB16
CK
CK
CKE/CKE0
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
E3
F7
F2
F8
H3
H8
G2
H7
J7
K7
K9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
20
+1.5VSG
B2
D9
G7
K2
K8
N1
N9
R1
R9
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
VREFCA
VREFDQ
CLKB0
CLKB0#
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
CKEB0
MDB15
MDB10
MDB12
MDB11
MDB13
MDB9
MDB14
MDB8
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
BA0
BA1
BA2
MDB[0..63]
MDB[0..63]
D7
C3
C8
C2
A7
A2
B8
A3
VREFCB_A2 M8
VREFDB_Q2 H1
20
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MDB26
MDB28
MDB27
MDB31
MDB25
MDB30
MDB24
MDB29
B_BA0
B_BA1
B_BA2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3
E3
F7
F2
F8
H3
H8
G2
H7
p:
20
M2
N8
M3
20
20
20
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
VREFCA
VREFDQ
U18
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
U17
VREFCB_A1 M8
VREFDB_Q1 H1
U16
/x
/
U15
Title
VRAM_DDR3 / Channel B
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
24
of
49
Power Sequence of Whistler and Seymour

SUSP#
+3VSG
(JUMP form +3VS)
10ms
VGA_ON
VGA_PWR_ON
1.5_VDDC_PWREN
+VGA_CORE
+1.5VSG
VGA Muxless with BACO Status Mapping table

Normal mode
BACO mode
PX_EN
0
1
1.5_VDDC_PWREN
1
0
VDDC_EN
1
0
1.0_EN
0
1
+3.3VSG
ON
ON
+1.8VSG
ON
ON
ON
+1.0VSG
ON
ON
+VGA_CORE
OFF
ON
+1.5VSG
OFF
+BIF_VDDC
+VGA_CORE
+1.0VSG
VGA Power Enable Signal Mapping table

Whislter
VGA_PWR_ON source signal
VGA_ON
+3.3VSG
SUSP#
+1.8VSG
VGA_PWR_ON
+1.0VSG
VGA_PWR_ON
+VDDCI
Combine with +VGA_CORE
+VGA_CORE
1.5_VDDC_PWREN
+1.5VSG
1.5_VDDC_PWREN
+1.0VSG
+1.8VSG
/x
/
20ms
5
P
G
3
1
1.5_VDD_PWREN
1.5_VDD_PWREN 38,48
VGA@
Q22
2N7002_SOT23
VGA@
R652
5.11K_0402_1%
+5VS
+5VS
2
1
VGA@
R654
1K_0402_5%
VGA@ C1104
0.1U_0402_16V4Z
2
1
1 VGA@ 2
2
R655
0_0402_5%
1
1.0_EN
VGA@
U20
Y
A
2
1
p:
VDDC_EN
+3VS
From +VGA_CORE regulator
tt
Q23B
VGA@
1.5_VDD_PWREN
13,48 VGA_PWRGD
VGA@
R653
1K_0402_5%
Q23A
VGA@
1 VGA@ 2
2
R651
0_0402_5% G
PX_EN
1
2
10K_0402_1%
VGA@
13,36 PE_GPIO1
@
R119
2
2 10K_0402_5% 1
VGA_PWR_ON 38,42,45
R650 1
VGA_PWR_ON
+3VS
VGA@
U19
1 VGA@ 2
R111
0_0402_5%
VGA_PWR_ON
VGA_ON
For VGA Power on control
22
//
m
Delay SUSP# 10ms

36
>2ms
2 0_0402_5%
C1103 VGA@
0.1U_0402_16V4Z
1
2
VGA_PWR_ON
yc
om
p.
su
PE_GPIO1
@
R649 1
+3VS
For PX sequence, >2mS delay is required between

PE_GPIO1 and VGA_PWR_ON
AO3416_SOT23-3
VGA@
20mil
+VGA_CORE
Q25
30mil
Q24
VGA@
+BIF_VDDC
+1.0VSG
AO3416_SOT23-3
@
1
R656
2
0_0805_5%
2
G
1
VGA@
C1105
2 22U_0805_6.3V6M
1.0_EN
C1105 Change to SE00000I10

20101228
2
G
D
+VGA_CORE
1
VGA@
Q26
AO3416_SOT23-3
1
D
30mil
3
A
3
VGA@
Q27
AO3416_SOT23-3
S
VDDC_EN
AO3416 NMOS
Vgs(th)(Max)= 1V
Rds(on)(Max)= 22m ohm @Vgs=4.5V
Q24 / Q25 / Q26 / Q27 change to SB00000FG10

20101228
Issued Date
Compal Secret Data
2010/08/04
2010/08/04
Deciphered Date
5
Title
VGA power sequence and BACO

Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
1
25
of
49
+3VS
+3VS_PS
+3VS_PS
40mil
40mil
R1160
0_0603_5%
U2
+3VS_PS
8
7
6
5
U46
+1.2VS_PS
+1.2VS_PS
60mil
R1172
L78 2
1 SWR_VDD
FBMA-L11-201209-221LMA30T_0805
@ L77 1
2 SWR_LX
4.7UH_PG031B-4R7MS_1.1A_20%
0_0603_5%
40mil
60mil 13
18
60mil 12
60mil 11
27
7
DP_V33
TXEC+
TXEC-
SWR_VDD
PVCC
TXE2+
TXE2-
Power
60mil
L76 2
1 DP_V33
FBMA-L11-201209-221LMA30T_0805
SWR_LX
SWR_VCCK
VCCK
DP_V12
LVDS
+1.2VS
TXE1+
TXE1TXE0+
TXE0-
19
20
APU_TXOUT_CLK+
APU_TXOUT_CLK-
21
22
APU_TXOUT2+
APU_TXOUT2-
23
24
APU_TXOUT1+
APU_TXOUT1-
25
26
APU_TXOUT0+
APU_TXOUT0-
MIIC_SCL_R
MIIC_SDA_R
APU_TXOUT_CLK+ 27
APU_TXOUT_CLK- 27
8
8
DP0_TXP0_C
DP0_TXN0_C
DP0_TXP0_C
DP0_TXN0_C
APU_TXOUT1+ 27
APU_TXOUT1- 27
APU_TXOUT0+ 27
APU_TXOUT0- 27
+3VS_PS
AUX_P
AUX_N
5
6
LANE0P
LANE0N
32
Change to 12Kohm 1% (DG ref.)

20101114
2
0_0402_5%
2
0_0402_5%
1
R1164
TL_INVT_PWM 27
TL_ENVDD 27
APU_INVT_PWM 10,27
TL_BKOFF# 27,36
1
C31
MIIC_SCL
1
R1165
MIIC_SDA
1
R1166
GND
33
MIIC_SCL
1
MIIC_SDA R17 1
R3
Close to
Pin27
CSDA
1
R1170
MIIC_SCL_R
2
MIIC_SDA_R
0_0402_5%
2
0_0402_5%
+3VS_PS
@
Q90A
C
CSDA
EC_SMB_DA2
EC_SMB_DA2 6,19,36
1
R1169
2
0_0402_5%
CSCL
@
Q90B
3
EC_SMB_CK2
EC_SMB_CK2 6,19,36
1
R1171
2
0_0402_5%
For upgrade Firmwave
MIIC_SCL
@
1
2
R1175 4.7K_0402_5%
tt
p:
1
R1167
APU_LVDS_CLK 27
APU_LVDS_DAT 27
//
m
0.1U_0402_16V4Z
C30
0.1U_0402_16V4Z
C2
0.1U_0402_16V4Z
C1489
22U_0805_6.3V6M
31
30
APU_LVDS_CLK
APU_LVDS_DAT
yc
om
Close to Pin7
MIICSCL0
MIICSDA0
RTD2132S-GR_QFN32_5X5
1
R30
12K_0402_1%
+1.2VS_PS
Close to L3
1
R1161
1
R1162
p.
su
ROM
MIICSCL1
MIICDA1
29
28
DP_REXT
DP_GND
1
C29
0.1U_0402_16V4Z
1
C28
0.1U_0402_16V4Z
C27
22U_0805_6.3V6M
HPD
LVDS
EDID
Close to Pin13
14
15
16
17
1
R1168
100K_0402_5%
8
4
CIICSCL1
CIICSDA1
Other
9
10
2
4.7K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
R1163
APU_LVDS_CLK
GPIO(PWM OUT)
GPIO(Panel_VCC)
GPIO(PWM IN)
GPIO(BL_EN)
/x
/
CSCL
CSDA
LVDS_HPD
SWR_VDD
CSCL
Reserved for EC programming ROM

Need EC confirm
Close to P18
APU_LVDS_DAT
10
2
1
GPIO
C4
DP0_AUXP_C
DP0_AUXN_C
DP-IN
0.1U_0402_16V4Z
1
C25
C20
2
0.1U_0402_16V4Z
10U_0603_6.3V6M
DP0_AUXP_C
DP0_AUXN_C
1
2
3
4
D
RTD2132S
8
8
A0
A1
A2
GND
CAT24C64WI-GT3_SO8
APU_TXOUT2+ 27
APU_TXOUT2- 27
Close to Pin3
DP_V33
VCC
WP
SCL
SDA
Compal Secret Data
Issued Date
2010/08/04
2010/08/04
Deciphered Date
5
Title
LVDS Translator - RTD2132S

Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
1
26
of
49
D1
HSYNC_L
1
VSYNC_L
YSDA0502C 3P C/A SOT-23

@
VGA_DDC_DATA_C
W=40mils
1
3
+CRT_VCC
C1573
C1574
For EMI
2
C1576
C1577
JCRT1
GREEN
+CRT_VCC
VSYNC_L
15 FCH_CRT_DDC_SCL
R1656
2
26 TL_ENVDD
R712 1
2N7002DW-7-F_SOT363-6
Q99A
2
0_0402_5%
0.047U_0402_16V7K
C1589
Q99B
2N7002DW-7-F_SOT363-6
20_0402_5%
30
30
14
14
W=60mils
+LCDVDD
+3VS
R1661
@
R1662
@
@ 1
C1590
2
1
1
36 EC_INVT_PWM
R1655 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
G1
G2
G3
G4
G5
41
42
43
44
45
HONDA_LVD-A40SFYG+
CONN@
ESD
INVTPWM
1
10,26 APU_INVT_PWM
2 0_0402_5%
AZC199-02SPR7G_SOT23-3
JLVDS1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
BKOFF#
D8
1
RB751V_SOD323
2
R1657
10K_0402_5%
DISPOFF#
2
BKOFF#
R718 1
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
For EMI, close to JLVDS1.
C122
2
R719 1 @
2 0_0402_5%
36
TL_BKOFF#
TL_INVT_PWM 1
R722
R1654 1 @
R1677
10K_0402_5%
Compal Secret Data
Issued Date
26,36 TL_BKOFF#
26 TL_INVT_PWM
D14
1
R1670
10K_0402_5%
INVTPWM
DISPOFF#
@ D29
AZC199-02SPR7G_SOT23-3
@
RB751V_SOD323
2
3
3
@ D30
Panel PWM Control
+3VS
Camera
USB20_N2
USB20_P2
USB20_N2
USB20_P2
26 APU_LVDS_CLK
26 APU_LVDS_DAT
Panel Backlight Control
100P_0402_50V8J
DMIC_CLK
DMIC_DATA
100K_0402_5%
26 APU_TXOUT126 APU_TXOUT1+
26 APU_TXOUT2R21
26 APU_TXOUT2+
0_0402_5%
@
26 APU_TXOUT_CLK26 APU_TXOUT_CLK+
+3VS
R1660
tt
10 APU_ENVDD
R1659 1 @
2
1
220K_0402_1%
C19
26 APU_TXOUT026 APU_TXOUT0+
0.1U_0402_16V4Z
W=60mils
L119 1
B+_L
2
FBMA-L11-201209-221LMA30T_0805
B+
2
G
C1586
For EMI, close to JLVDS1.
680P_0402_50V7K @
1
//
m
C1588
For AMD DG-47520-1-10
p:
W=60mils
4.7U_0805_10V4Z
1
C1585
4.7U_0805_10V4Z
6 2
C1587
0.1U_0402_16V4Z
1
R1653
47K_0402_5%
R1652
100_0805_5%
+LCDVDD
+3VS
Q93
SI2301BDS-T1-E3_SOT23-3
+LCDVDD
+5VALW
VGA_DDC_CLK_C
C1582
@
VGA_DDC_DATA_C
2
0_0402_5%
VGA_DDC_CLK_C
2
0_0402_5%
FCH_CRT_DDC_SCL
R31 1
Panel LCDVDD Control
Q101B
FCH_CRT_DDC_SDA
R4
1
16
17
CONN@
VGA_DDC_DATA_C
C1581
@
Close to APU
C1584 1
0.1U_0402_16V4Z
C1583
VGA_DDC_CLK_C
U88
74AHCT1G125GW_SOT353-5
+LCDVDD
FCH_CRT_DDC_SCL
C1580
Q101A
@
1
2
R1650 0_0603_5%
G
G
SUYIN_070546FR015S263ZR
VGA_DDC_DATA_C
2.2K_0402_5%
yc
om
VSYNC_L
15P_0402_50V8J
CRT_VSYNC_D
15P_0402_50V8J
15 FCH_CRT_VSYNC
P
OE#
5
1
2
1K_0402_5%
R1642
47K_0402_5%
R1648 1
2.2K_0402_5%
C1579
1
2
0.1U_0402_16V4Z
FCH_CRT_VSYNC_R
1
R1651 0_0402_5%
HSYNC_L
BLUE
DDC_MD2
R1646
47K_0402_5%
22P_0402_50V8J
FCH_CRT_DDC_SDA
15 FCH_CRT_DDC_SDA
+CRT_VCC
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
T69 PAD
RED
1
R1645
U87
74AHCT1G125GW_SOT353-5
R1644
2.2K_0402_5%
@
HSYNC_L
1
2
R1643 0_0603_5%
CRT_HSYNC_D
2.2K_0402_5%
@
p.
su
0.1U_0402_16V4Z
+CRT_VCC
5
1
P
OE#
FCH_CRT_HSYNC_R
1
R1641 0_0402_5%
15 FCH_CRT_HSYNC
+3VS
2
1K_0402_5%
1
C1571
@
100P_0402_50V8J
SMD1812P075TF .75A 13.2V

RB491D_SOT23-3
1
C1570
BLUE
1
10P_0402_50V8J
C1572
GREEN
10P_0402_50V8J
R1639
W=40mils
RED
/x
/
+CRT_VCC
C1578
R1640 1
1
2
0.1U_0402_16V4Z
R1638
R1637
C1575
10P_0402_50V8J
CRT_B_R
10P_0402_50V8J
CRT_G_R
2
0_0402_5%
10P_0402_50V8J
2
0_0402_5%
1 R1636
1 R1635
FCH_CRT_B
L116
1
2
CHILISIN NBQ160808T-800Y-N 0603
L117
1
2
L118
1
2
150_0402_1%
FCH_CRT_G
150_0402_1%
CRT_R_R
2
0_0402_5%
150_0402_1%
15 FCH_CRT_B
1 R1634
L115
1+5VS_CRTVCC
1
ESD
FCH_CRT_R
D4

@
15 FCH_CRT_G
VOUT
AP2230_SOT23-3
VGA_DDC_CLK_C
VIN
@
+CRT_VCC
15 FCH_CRT_R
Q92
1

D6
D2
RED
+5VS
3
@
0.1U_0402_16V4Z
GND
BLUE
GREEN
100P_0402_50V8J
CRT
D3
10P_0402_50V8J
2010/06/30
Deciphered Date
2012/06/30
Title
P10-LVDS/CRT CONN
Size
C
Date:

Document Number
Rev
0.03
QBL60 LA-7552P
Sheet

1
27
of
49
+5VS
Q95
D
@
1
C1591
+HDMI_5V_OUT
470K_0402_5%
1
2
W=40mils
0.5A_15V_SMD1812P050TF
1
C1592
SI3456BDV-T1-E3 1N TSOP6
2
EN_HDMI
HDMI_SDATA
C1601 1
0.1U_0402_16V7K
S
2
S
G
8 APU_HDMI_DATA
R1679
Q96
SSM3K7002FU_SC70-3
2
G
38,45 SUSP
Q36
BSH111 1N_SOT23-3
1.5M_0402_5%
1
3
8 APU_HDMI_CLK
HDMI_SCLK
1
2
1
2
R1678
R750
R749
2K_0402_1%
2K_0402_1%
R748
0_0402_5%
R746
R745
4.7K_0402_5%
4.7K_0402_5%
+VSB
+HDMI_5V_OUT
F2
+HDMI_5V
+1.5VS
1U_0603_10V6K
+1.5VS
1U_0603_10V4Z
6
5
2
1
Q33
BSH111 1N_SOT23-3
+3VS
2
+HDMI_5V_OUT
JHDMI1
HDMI_HPD
/x
/
R755
0_0402_5%
1
R762
HDMI_HPD
2
150K_0402_5%
E
Q34
MMBT3904_NL_SOT23-3
@
R768
365K_0402_1%
2
10 APU_HDMI_HPD
1
UMA use 604 ohm

VGA use 499 ohm
2
2
604_0402_1%
604_0402_1%
C1168
C1169
2
2
1 0.1U_0402_16V7K HDMI_C_TX1- R788 1

1 0.1U_0402_16V7K HDMI_C_TX1+ R790 1
2
2
604_0402_1%
604_0402_1%
C1170
C1171
2
2
1 0.1U_0402_16V7K HDMI_C_TX0- R792 1

1 0.1U_0402_16V7K HDMI_C_TX0+ R795 1
2
2
604_0402_1%
604_0402_1%
C1172
C1173
2
2
1 0.1U_0402_16V7K HDMI_C_CLK- R797 1

1 0.1U_0402_16V7K HDMI_C_CLK+ R799 1
2
2
604_0402_1%
604_0402_1%
2
G
+HDMI_5V_OUT
B
R801
6 PCIE_FTX_GRX_N15
6 PCIE_FTX_GRX_P15
1 0.1U_0402_16V7K HDMI_C_TX2- R784 1

1 0.1U_0402_16V7K HDMI_C_TX2+ R786 1
6 PCIE_FTX_GRX_N14
6 PCIE_FTX_GRX_P14
2
2
//
m
6 PCIE_FTX_GRX_N13
6 PCIE_FTX_GRX_P13
From APU
C1166
C1167
6 PCIE_FTX_GRX_N12
6 PCIE_FTX_GRX_P12
yc
om
R775
10K_0402_5%
Near the connector
HDMI_SDATA
HDMI_SCLK
HDMI_R_CKHDMI_R_CK+
HDMI_R_D0-
p.
su
2
B
Q34 change to SB000006A00

20101228
HDMI_C_CLK-
HDMI_R_D0+
HDMI_R_D1HDMI_R_D1+
HDMI_R_D2HDMI_R_D2+
20
21
22
23
C
CONN@
R756 1
HDMI_C_CLK+
2
3
2
3
HDMI_R_CK+
2
0_0402_5%
R769 1
1
2
3
HDMI_R_D0-
0_0402_5%
@ L39
WCM2012F2SF-900T04_0805
4 4
HDMI_C_TX0+
HDMI_R_CK-
0_0402_5%
R765
Q35
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
SUYIN_100042MR019S153ZL
1 1
@ L38
WCM2012F2SF-900T04_0805
4 4
HDMI_C_TX0-
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
2
3
HDMI_R_D0+
R779
0_0402_5%
SSM3K7002FU_SC70-3
HDMI_C_TX1-
R781 1
HDMI_R_D1-
0_0402_5%
p:
100K_0402_5%
tt
1 1
@ L40
WCM2012F2SF-900T04_0805
4 4
HDMI_C_TX1+
HDMI_C_TX2-
HDMI_R_D1+
HDMI_R_D1+
HDMI_R_D0+
HDMI_R_D1HDMI_R_D2+
2 2
98
HDMI_R_D1-
HDMI_R_D0-
4 4
77
HDMI_R_D2+
HDMI_R_CK+
HDMI_R_D2-
5 5
66
HDMI_R_D2-
HDMI_R_CK-
2 2
98
HDMI_R_D0-
4 4
77
HDMI_R_CK+
5 5
66
HDMI_R_CK-
3 3
3 3
R783 1
2
3
2
3
HDMI_R_D2+
2
0_0402_5%
D32
6
+5VS
+HDMI_5V_OUT
I/O4
I/O2
VDD
GND
I/O3
I/O1
HDMI_SDATA
HDMI_SCLK
For ESD request.
2010/08/04
Issued Date
Compal Secret Data
2010/08/04
Deciphered Date
4
AZC099-04S.R7G_SOT23-6
L15ESDL5V0NA-4 SLP2510P8
For ESD request.
HDMI_R_D2-
0_0402_5%
HDMI_HPD
L15ESDL5V0NA-4 SLP2510P8
HDMI_R_D1+
R794
HDMI_R_D0+
3
0_0402_5%
1 1
@ L41
WCM2012F2SF-900T04_0805
4 4
109
R782
h
109
D13
1 1
HDMI_C_TX2+
D11
1 1
Title
HDMI Connector
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
1
28
of
49
1
1
1
C1616
C1617
1
1
C1615
Q54
EN_WOL#
2
G
C1619
C1620
C1621
C1622
C1623
+LAN_IO
W=40mils
1
D
U49
C1629 1
20.1U_0402_16V7K
PCIE_FRX_DTX_P0
22
HSOP
6 PCIE_DTX_C_FRX_N0
C1630 1
20.1U_0402_16V7K
PCIE_FRX_DTX_N0
23
HSON
17
18
HSIP
HSIN
6 PCIE_FTX_C_DRX_P0
6 PCIE_FTX_C_DRX_N0
LED3/EEDO
LED1/EESK
LED0
31
37
40
EECS/SCL
EEDI/SDA
30
32
MDIP0
MDIN0
MDIP1
MDIN1
NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3
1
2
4
5
7
8
10
11
R5511
R6601
2 10K_0402_5%
2 10K_0402_5%
p.
su
6 PCIE_DTX_C_FRX_P0
13,18,32 PLT_RST#
25
PERSTB
13 CLK_PCIE_LAN
13 CLK_PCIE_LAN#
19
20
REFCLK_P
REFCLK_N
+3VS
XTLO
43
XTLI
44
LAN_WAKE#
R661
1
CLKREQB
ISOLATEB
28
26
CKXTAL1
CKXTAL2
DVDD10
DVDD10
DVDD10
2
R662
15K_0402_5%
1
+LAN_IO
2
1 0_0402_5%
R647
3.3V : Enable switching regulator
0V
: Disable switching regulator
R563 1
14
15
38
33
+LAN_IO
R568
1
2 10K_0402_5%
2 1K_0402_5%
+LAN_VDDREG
34
35
2 2.49K_0402_1%
46
2
24
49
ISOLATEB
DVDD33
DVDD33
NC/SMBCLK
NC/SMBDATA
GPO/SMBALERT
AVDD33
AVDD33
AVDD33
AVDD33
ENSWREG
EVDD10
VDDREG
VDDREG
AVDD10
AVDD10
AVDD10
AVDD10
RSET
GND
PGND
REGOUT
27
39
12
42
47
48
21
3
6
9
45
36
C1627
I/O4
C1631
2
1
C1632
2
+LAN_VDD
+LAN_SROUT1.05
12P_0402_50V8J
1
+LAN_IO
VDD
GND
C1634
C1635 1
0.01U_0402_16V7K
TS1
+V_DAC
LAN_MDIN3
LAN_MDIP3
1
2
3
+V_DAC
LAN_MDIN2
LAN_MDIP2
4
5
6
+V_DAC
LAN_MDIN1
LAN_MDIP1
7
8
9
+V_DAC
LAN_MDIN0
LAN_MDIP0
10
11
12
TCT1
TD1+
TD1-
MCT1
MX1+
MX1-
TCT2
TD2+
TD2-
MCT2
MX2+
MX2-
TCT3
TD3+
TD3-
MCT3
MX3+
MX3-
TCT4
TD4+
TD4-
MCT4
MX4+
MX4-
24
23
22
21
20
19
18
17
16
15
14
13
R549 1
R1529 1
R1530 1
R552 1
RJ45_TX3RJ45_TX3+
2
2
2
2
RJ45_TX2RJ45_TX2+
RJ45_TX3+
RJ45_RX1-
RJ45_TX2-
RJ45_TX2+
RJ45_RX1+
RJ45_TX0-
RJ45_TX0+
PR4PR4+
PR2PR3PR3+
PR2+
PR1PR1+
I/O3
LAN_MDIP0
I/O1
SHLD2
GND_LAN
D38
I/O4
I/O2
LAN_MDIP2
RJ45_RX1+ 1
LAN_MDIN3
D21
@
1
LSE-200NX3216TRLF_1206-2
2
D22
@
1
LSE-200NX3216TRLF_1206-2
2
D31
@
1
LSE-200NX3216TRLF_1206-2
2
D34
@
1
LSE-200NX3216TRLF_1206-2
2
VDD
GND
I/O3
I/O1
RJ45_TX2+ 1
RJ45_TX0-
RJ45_TX3+ 1
For ESD request.
Issued Date
ESD
2012/06/30
Deciphered Date
3
RJ45_RX1-
RJ45_TX2-
PD10943-T7_SOD323-2
RJ45_TX3-
PD10943-T7_SOD323-2
SOD323 package
A
Compal Secret Data

2010/06/30
PD10943-T7_SOD323-2
2
@
D41
LAN_MDIN2
@@
GND_LAN
1
@
D40
+LAN_IO
RJ45_TX0RJ45_TX0+
D19
LAN_MDIP3
C1636
1000P_1206_2KV7K
PD10943-T7_SOD323-2
ESD
1
D39
GND_LAN
10
SANTA_130452-C
RJ45_TX0+ 1
BOTH_GST5009-LF
<BOM Structure>
75_0603_1%
75_0603_1%
75_0603_1%
75_0603_1%
RJ45_RX1RJ45_RX1+
XTLO
SHLD1
+LAN_SROUT1.05 LAN_MDIN1
37
GND_LAN
0_0402_5%
Y6
25MHZ_12PF_X5H025000FC1H-H
JLAN1
RJ45_TX3-
tt
XTLI
10P_0402_50V8J
RTL8111E-VL-CGT_QFN48_6X6
0_0603_5%
R550
C1633
2
LAN_MDIN0
I/O2
+LAN_VDD
W=60mils
D18
LAN_MDIP1
C1628
+LAN_IO
+LAN_EVDD10
<BOM Structure>
These components close to Pin 36

( Should be place within 200 mils )
+LAN_VDD
p:
0_0603_5%
R546
1 @
2
13
29
41
LANWAKEB
1K_0402_5%
R561 1
R562 1
yc
om
14 LAN_CLKREQ#
LAN_MDIP0
LAN_MDIN0
LAN_MDIP1
LAN_MDIN1
LAN_MDIP2
LAN_MDIN2
LAN_MDIP3
LAN_MDIN3
//
m
16
/x
/
Q91
2N7002_SOT23
C1626
+LAN_EVDD10
0_0603_5%
<BOM Structure>
14,32,36 FCH_PCIE_WAKE#
2
LAN_WAKE#
C1625
R658
1
0_0603_5%
W=20mils
+LAN_VDD
+LAN_VDDREG
2
G
R1620
10K_0402_5%
1U_0402_6.3V6K
R560
1
0.1U_0402_16V7K
<BOM Structure>
+LAN_IO
R553
10K_0402_5%
4.7U_0603_6.3V6K
C1624
0.1U_0603_25V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
3
These caps close to Pin 12,27,39,42,47,48

1
Q30
SSM3K7002FU_SC70-3
2
G
EN_WOL
2
36
These caps close to Pin 3,6,9,13,29,41,45
R534
1
2 EN_WOL#
220K_0402_5%~N
SSM3K7002FU_SC70-3
R533
100K_0402_5%
4.7U_0603_6.3V6K
C1618
1
C1614
0.1U_0402_16V7K
1
C1613
0.1U_0402_16V7K
1
C1612
0.1U_0402_16V7K
C1611
0.1U_0402_16V7K
<BOM Structure>
R1106
470_0603_5%
0.1U_0402_16V7K
AO3419L_SOT23-3
0.1U_0402_16V7K
+5VALW
1.5A
C1610
1U_0402_6.3V6K
+LAN_VDD
+LAN_IO
Q29
3
0.1U_0402_16V7K
<BOM Structure>
0.1U_0402_16V7K
<BOM Structure>
0.1U_0402_16V7K
<BOM Structure>
JUMP_43X118
0.1U_0402_16V7K
+LAN_IO
0.1U_0402_16V7K
<BOM Structure>
+3VALW
W=60mils
0.1U_0402_16V7K
<BOM Structure>
J8
W=60mils
0.1U_0402_16V7K
<BOM Structure>
Title
P25-LAN RTL8111E
Date:
Rev
0.02
Sheet

1
29
of
49
+5VS_PVDD
DMIC_CLK
L121 1
EMI request 12.24

EC_MUTE#
EC_MUTE#
R1545 1
HP_JD
2 0_0402_5%
HDA_RST_AUDIO#
+1.5VS
32
33
HP_OUTL
HP_OUTR
MIC2_L
MIC2_R
GPIO0/DMIC_DATA
10U_0805_10V6K
C1494
10
HDA_SYNC_AUDIO
BCLK
HDA_BITCLK_AUDIO_R 1 R1590
SDATA_OUT
PD#
SDATA_IN
RESET#
EAPD
SPDIFO
PCBEEP
SENSE A
MIC2_VREFO
SENSE B
CBP
MIC1_VREFO_R
LDO_CAP
CBN
VREF
MIC1_VREFO_L
JDREF
PVSS2
PVSS1
DVSS2
DVSS1
CPVEE
AVSS1
AVSS2
HDA_SYNC_AUDIO
HDA_SDOUT_AUDIO
HDA_SDIN_AUDIO1 R1546 2
33_0402_5%
47
1 R1547
48
0_0402_5%
2
0.22U_0603_16V7K
@
AC97_VREF
19
AC_JDREF
34
26
37
EAPD
R1559 1 @
2 0_0402_5%
R1541
R1542
2
2
1 R1552 2
20K_0402_1%
1
2
C1498
2.2U_0603_16V6K
C1499
C1500
1
C1501
2
SPK_L1
SPK_L2
SPK_R1
SPK_R2
37
37
37
37
+USB_VCCB
1 2.2K_0402_1%
1 2.2K_0402_1%
ACES_87213-1400G
14
14
USB20_N1
USB20_P1
36
p:
2 0_0402_5%
C1492
HDA_SDIN0 14
MIC_JD
L109
MIC2
MIC1
MIC-2
BLM18PG121SN1D_0603
2 MIC-1
BLM18PG121SN1D_0603
1
1
2
L110
1
C1495
220P_0402_50V7K
HP_JD
HPR
HPL
C1496
220P_0402_50V7K
14
13
12
11
10
9
8
7
6
5
4
3
2
1
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JAU1
HP_OUTR 1
tt
2 0_0402_5%
R1558 1 @
R1538
@
R1554
75_0603_1%
2 HP_R
L111
1
2
L112
HP_OUTL 1 R1555 2 HP_L

75_0603_1%
2 0_0402_5%
R1557 1 @
SPK_L1
SPK_L2
SPK_R1
SPK_R2
+MIC1_VREFO_R
27
R1556 1
HDA_BITCLK_AUDIO
HDA_BITCLK_AUDIO 14
+MIC1_VREFO_R
+MIC1_VREFO_L
HDA_SDOUT_AUDIO 14
29
30
28
14
2
0_0402_5%
20
1
2
1
C1484
Close to JSPK1
HDA_SYNC_AUDIO
SYNC
GPIO1/DMIC_CLK
2
HDA_RST_AUDIO#
4.7K_0402_5%
R1553 @
@
0.1U_0402_16V7K
C1503
0_0402_5%
HP_OUT_L
HP_OUT_R
MIC1_L
MIC1_R
ALC269-GR_QFN48_7X7
SPK_R2
SPKOUT_R1
SPKOUT_R2
43
42
49
7
2 0_0603_5%
2
0.22U_0603_16V7K
@
1U_0603_10V6K
/x
/
45
44
36
R1536 1
2
0.22U_0603_16V7K
@
22P_0402_50V8J
SPK_OUT_R+
SPK_OUT_R-
13
SPKOUT_R2
10P_0402_50V8J
LINE2_L
LINE2_R
35
1
2
C1497 2.2U_0603_16V6K
31
0.1U_0402_16V7K
38
25
14
15
11
1
1 C1480
1
C1478
+5VS
AVDD2
AVDD1
39
46
PVDD2
PVDD1
SPKOUT_L1
SPKOUT_L2
SPK_R1
@
40
41
2 0_0603_5%
C1491
SPK_OUT_L+
SPK_OUT_L-
R1535 1
HDA_SDOUT_AUDIO
2
LINE1_L
LINE1_R
18
+MIC1_VREFO_L
2
1
MBK1608800YZF 0603
U50
MONO_OUT
SENSE_A
C1487
23
24
12
1 R1548 2
20K_0402_1%
2 R1549 1
39.2K_0402_1%
1
PD#
DVDD_IO
DVDD
DMIC_CLK_CODEC
2
FBMA-L10-160808-301LMT_2P
14 HDA_RST_AUDIO#
MIC_JD
2 0_0402_5% DMIC_DATA_CODEC
SPKOUT_R1
p.
su
R1543 1
10U_0805_10V6K
36
DMIC_CLK
DMIC_DATA
SPK_L2
yc
om
27
DMIC_DATA
C1486
0.1U_0402_16V7K
27
10U_0805_10V6K
MIC2
C1485
2 C1490 4.7U_0603_6.3V6K MIC1_C 21

MIC2_C 22
2 C1493 4.7U_0603_6.3V6K
16
17
2 0_0603_5%
L108
MIC1_R 1
2
1K_0402_5%
MIC2_R 1
1 R1540 2
1K_0402_5%
1 R1539
R1533 1
//
m
MIC1
C1505
SPKOUT_L2
+5VS_PVDD +VDDA
0.1U_0402_16V7K
10U_0603_6.3V6M
C1488
1
2
0.22U_0603_16V7K
@
1U_0603_10V6K
1 C24
@ C1483
+3VS_DVDD
0.1U_0402_16V7K
1
C1482
10U_0603_6.3V6M
R1537
2
1
0_0603_5%
C1477
SPK_L1
2 0_0603_5%
@ C1474
+3VS_DVDD_R
C1481
+3VS
R1532 1
10P_0402_50V8J
R1534
2
1
0_0603_5%
+3VS_DVDD
0.1U_0402_16V7K
C1476
0.1U_0402_16V7K
C1475
0.1U_0402_16V7K
10U_0805_10V6K
SPKOUT_L1
R1531
2
1
0_0805_5%
+5VS
HPR
BLM18PG121SN1D_0603
HPL
BLM18PG121SN1D_0603
1
1
C1502
470P_0402_50V7K
C1504
470P_0402_50V7K
Issued Date
2010/06/30
2012/06/30
Deciphered Date
A
Compal Secret Data
Title
P26-HD CODEC ALC259

Date:
G
Rev
0.03
Sheet
30
H
of
49
Card Reader RTS5137

(only SD/MMC/MS function)
+3VS
+3VS_CR
R1560
30mil
2 0_0603_5%
14
14
+RREF & +VREF need 12mils
12mil
U51
+RREF
1
2
3
+3VS_CR
1
30mil
+VREG
C1511
4
5
6
+CARDPWR
10mil
C1512
7
1U_0402_6.3V6K
SDWP_MSCLK
1 R529
2 SDWP_MSCLK_R8
2
0_0402_5% MS_INS#
9
SDD1
10
SDD0
11
MSD3
12
1
0.1U_0402_16V4Z
17
GPIO0
DM
DP
24
CLK_IN
3V3_IN
CARD_3V3
V18
SP1
SP2
SP3
SP4
SP5
22
21
20
19
18
16
15
14
13
SP14
SP13
SP12
SP11
SP10
SP9
SP8
SP7
SP6
NC
@
1
R1561
CLK_SD_48M
2
1
10_0402_5% @
@C1509
C1509
MS_BS
SDD2
SDD3_MSD1
SDCMD
MSD0
SDCLKMSD2 1
R441
SDCD#
EMI
SDCLK_MSD2
2
0_0402_5%
RTS5137-GR_QFN24_4X4
Card Reader Connector

C
+CARDPWR
30mil
1
R1562
100K_0402_5%
1
C1514
0.1U_0402_16V4Z
C1515
0.1U_0402_16V4Z
C1513
0.1U_0402_16V4Z
EMI
+CARDPWR
JCR1
Close to U51
SDCD#
SDWP_MSCLK
SDD1
SDD0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
MS_BS
SDCLK_MSD2
MSD0
MS_INS#
MSD3
SDCMD
SDD3_MSD1
SDD2
22
23
p:
@
C788
1
2
0.1U_0402_16V4Z
//
m
Close to connector
yc
om
SDWP_MSCLK
@
C787
1
2
0.1U_0402_16V4Z
p.
su
SDCLK_MSD2
2
10P_0402_50V8J
CLK_SD_48M 13
23
NC
25
C1510
4.7U_0805_10V4Z
REFE
/x
/
1
100P_0402_50V8J
2
6.2K_0603_1%
USB20_N4
USB20_N4
USB20_P4
USB20_P4
EPAD
2
C1507
R1733 1
SD-CD
SD-WP
SD-D1
SD-D0
MS-GND
SD-GND
MS-BS
SD-CLK
MS-D1
MS-D0
SD-VCC
MS-D2
SD-GND
MS-INS
MS-D3
SD-CMD
MS-SCLK
MS-VCC
SD-D3
MS-GND
SD-D2
GND
GND
TAITW_R009-142-HM
tt
CONN@
Issued Date
Compal Secret Data
2010/06/30
2012/06/30
Deciphered Date
5
Title
P27-RTS5137 Media Card Controller

Custom
QBL60
Date:
Rev
0.03
LA-7552P
Sheet
1
31
of
49
W=60mils
Mini-Express Card for WLAN/WiMAX(Half)
+3VS_WLAN
+3VALW
+1.5VS
14 MINI1_CLKREQ#
2 0_0402_5%
BT_ONR1594 1
@
MINI1_CLKREQ#
2 0_0402_5%
WLAN_WAKE#
13 CLK_PCIE_MINI1#
13 CLK_PCIE_MINI1
C124
1
EMI
2
10P_0402_50V8J
@
PCI_RST#_R
CLK_PCI_DB
R530
1CLK_PCI_DB
6 PCIE_DTX_C_FRX_N1
6 PCIE_DTX_C_FRX_P1
0_0402_5%
@
6 PCIE_FTX_C_DRX_N1
6 PCIE_FTX_C_DRX_P1
+3VS_WLAN
BT_ON
For EC to detect
debug card insert.
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
FCH_SMCLK0_R
FCH_SMDAT0_R
2
2
R1569 1
R1570 1
2 @ 0_0402_5%
2 @ 0_0402_5%
R1571 1
R1572 1
2 @ 0_0402_5%
2 @ 0_0402_5%
36,38
LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R
PCI_RST#_R
CLK_PCI_DB
WLAN_LED# 36
BT_LED# 36
54
GND2
R1583
100K_0402_5%
1
LED1
White
35,36 PWR_LED#
2
300_0402_5%
1
R1584
+5VALW
19-217/T1D-DP1Q2QY/3T 0603 WHITE

LED2
1
2
300_0402_5%
1
R1585
2
300_0402_5%
1
R1586
O
3
HT-297DQ/GQ 0603 AMB/YG
Green
2
WLAN_D_LED#
LED3
1
2
300_0402_5%
RB751V_SOD323
R1589 1
2 0_0402_5%
tt
36 RF_LED#
1
R1588
19-21SYGC/S530-E3/TR8 0603 Y/G
+3VALW
2
0_0402_5%
Q32
SSM3K7002FU_SC70-3
C1663
0.1U_0603_25V7K
R1573
R1574
R1576
R1578
R1579
R1580
1
1
1
1
1
1
2
2
2
2
2
2
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
PLT_RST#
LPC_FRAME# 13,36
LPC_AD3 13,36
LPC_AD2 13,36
LPC_AD1 13,36
LPC_AD0 13,36
CLK_PCI_DB
13
LED4
Green
15 SATA_LED#
2
300_0402_5%
1
R1591
D26
2
1
3
+3VALW
D36
CHARGE_LED1#
CHARGE_LED0#
@
1
+3VS

D37
@
WLAN_D_LED#
SATA_LED#
p:
RB751V_SOD323
@
D25
BT_R_LED#
BATT_CHG_LED#
WLAN_R_LED#
PWR_LED#
//
m
BATT_LOW_LED#
36 CHARGE_LED1#
yc
om
Add to prevent leakage issue.
D24
2
G
SUSP#
R115
Reserve for SW mini-pcie debug card.

Series resistors closed to KBC side.
FCH_SCLK0 11,12,14
FCH_SDATA0 11,12,14
USB20_N3 14
USB20_P3 14
0_0402_5%
2
1 R1577 WLAN_LED#
2
1 R1575 BT_LED#
0_0402_5%
WLAN_R_LED#
BT_R_LED#
WL_OFF# 15
WL_OFF#_EC 36
PLT_RST# 13,18,29
+3VALW
+3VS
R669
10K_0402_5%
White
R1567 1
R1568 1
LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R
0_0402_5%
0_0402_5%
BELLW_80003-1021
LED
R663
100K_0402_5%
1
+5VALW
36 CHARGE_LED0#
C1518
0.1U_0402_16V4Z
Orange
p.
su
15
53
36 EC_TX_P80_DATA
36 EC_RX_P80_CLK
100_0402_1%
R1581
EC_TX_P80_DATA 1
2 EC_TX_P80_DATA_R
EC_RX_P80_CLK 1
2 EC_RX_P80_CLK_R
@ R1582
100_0402_1%
BT_ON R1566 1
2 0_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
R1565 1
1
C1517
0.1U_0402_16V4Z
JMINI1
@
C1516
0.1U_0402_16V4Z
FCH_PCIE_WAKE#
1
R1564
0_1206_5%
14,29,36
1 0_1206_5%
/x
/
R1563 2
AO3413_SOT23-3
+5VALW
Mini-Express Card(WLAN/WiMAX)
1 0_1206_5%
C1664
1U_0402_6.3V6K
+1.5VS
+3VS_WLAN
R1596
+3VALW
+3VS
Q31
3

D35
36,37 NUM_LED#
NUM_LED#
CAPS_LED#
@
1
+3VS
19-21SYGC/S530-E3/TR8 0603 Y/G
ESD
LED6
Green
36 CAPS_LED#
2
300_0402_5%
1
R1593
+3VS
19-21SYGC/S530-E3/TR8 0603 Y/G
Compal Secret Data
Issued Date
2010/06/30
Deciphered Date
2012/06/30
Title
P28-Mini PCIE/LED
Size
Document Number
Rev
0.03
QBL60 LA-7552P
Date:
Sheet

E
32
of
49
SATA HDD Conn.

JHDD1
C656 1
C658 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0
SATA_DTX_C_SRX_N0 C1519 1
SATA_DTX_C_SRX_P0 C1520 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_DTX_SRX_N0
SATA_DTX_SRX_P0
+3VS
+5VS
R1595 1
10U_0603_6.3V6M
C660
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C661
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
C22
+5VS_HDD
2 0_0805_5%
C662
C663
GND
A+
AGND
BB+
GND
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12 GND1
V12 GND2
V12
23
24
SUYIN_127043FR022S21MZR
1000P_0402_50V7K
p.
su
1U_0402_6.3V4Z
1
2
3
4
5
6
7
/x
/
SATA_STX_DRX_P0
SATA_STX_DRX_N0
15 SATA_STX_DRX_P0
15 SATA_STX_DRX_N0
SATA ODD FFC Conn.
1
1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_STX_C_DRX_P1
SATA_STX_C_DRX_N1
C1521 1
C1522 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_DTX_SRX_N1
SATA_DTX_SRX_P1
C648
C649
15 SATA_STX_DRX_P1
15 SATA_STX_DRX_N1
80mils
+5VS
yc
om
JODD1
+5VS_ODD
2
0_0805_5%
@
1
2
R670
10K_0402_5%
1
R1598
//
m
+3VS
GND
A+
AGND
BB+
GND
DP
+5V
+5V
MD
GND
GND
GND
GND
15
14
OCTEK_SLS-13DC1G_RV
tt
p:
1
2
3
4
5
6
7
8
9
10
11
12
13
Issued Date
2010/06/30
2012/06/30
Deciphered Date
A
Compal Secret Data
Title
P29-HDD & ODD CONN

Size
B
Document Number
Rev
0.03
QBL60 LA-7552P
Date:
G
Sheet
33
H
of
49
+5VALW
10.1U_0402_16V4Z
USB_ON#
GND
IN
IN
EN#
USB20_P10 1
8
7
6
5
OUT
OUT
OUT
OC#
USB20_N10 4
Low Active
USB20_P10_C
USB20_N10_C
+USB_VCCA
C708
470P_0402_50V7K
L58
C710
@ 1000P_0402_50V7K
USB20_P0
USB20_N0
USB20_P0_C
USB20_N0_C
S COM FI_ KINGCORE WCM-2012HS-900T

+5VALW
S COM FI_ KINGCORE WCM-2012HS-900T
USB_OC0# 14
AP2301MPG-13 MSOP 8P
W=80mils
14
14
+USB_VCCA
+USB_VCCB
10.1U_0402_16V4Z
36
USB_ON#
USB_ON#
GND
IN
IN
EN#
OUT
OUT
OUT
OC#
8
7
6
5
p.
su
C714
1
2
3
4
C711
470P_0402_50V7K
USB_OC1# 14
AP2301MPG-13 MSOP 8P
Low Active
C713
@ 1000P_0402_50V7K
L60
1 0_0402_5%
M3@
14 USB30_MTX_C_DRX_P0
USB30_MTX_C_DRX_P0
USB30_MTX_C_DRX_P0_C
14 USB30_MTX_C_DRX_N0
USB30_MTX_C_DRX_N0
USB30_MTX_C_DRX_N0_C
2 R672
1 0_0402_5%
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
14
14
JUSB2
2 R665
2 R667
@
@
USB20_N0
USB20_P0
C712
47U_0805_6.3V
1 0_0402_5%
1 0_0402_5%
USB20_N0_C
USB20_P0_C
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
SUYIN_020173MR004S50DZL
CONN@
D20
USB20_P10_C
+5VALW
USB20_N10_C
I/O4
I/O2
VDD
GND
I/O3
I/O1
USB20_P0_C
USB20_N0_C
3
For ESD request.
tt
1
2
3
4
W=80mils
p:
WCM-2012HS-900T
1 0_0402_5% USB20_N10_C
1 0_0402_5% USB20_P10_C
SUYIN_020173MR004S50DZL
CONN@
//
m
2 R673
C709
47U_0805_6.3V
yc
om
2 R666
2 R664
@
@
Left USB Conn.
EMI request
U55
JUSB1
USB20_N10
USB20_P10
USB20_N10
1 USB20_P10
/x
/
C707
1
2
3
4
Left USB Conn.
L55
+USB_VCCA
U54
2 R675
14 USB30_MRX_DTX_P0
14 USB30_MRX_DTX_N0
USB30_MRX_DTX_P0
USB30_MRX_DTX_N0
@
1 0_0402_5%
L62
M3@
USB30_MRX_DTX_P0_C
USB30_MRX_DTX_N0_C
D5
1 1
109
2 2
98
USB30_MRX_DTX_P0_C
4 4
77
USB30_MRX_DTX_P0_C
USB30_MRX_DTX_N0_C
5 5
66
USB30_MRX_DTX_N0_C
WCM-2012HS-900T
2 R674
3 3
8
1 0_0402_5%
YSCLAMP0524P_SLP2510P8-10-9
M3@
Issued Date
Compal Secret Data
2010/06/30
Deciphered Date
2012/06/30
Title
A
P32-USB/BT/USBsub
Custom
Rev
0.03
QBL60 LA-7552P
Date:
Sheet
E
34
of
49
ON/OFF switch
Fan Control Circuit
Power Button
+3VS
2
100K_0402_5%
D12
2
3
8
7
6
5
FAN_SPEED
ON/OFF#
36
51_ON#
40
C702
1000P_0402_50V7K~N
C701
C700
U53
R527
ON/OFFBTN#
R668
10K_0402_5%
SW 3
SMT1-05-A_4P
1
3
+5VS
+3VALW
7236LGH
GND
GND
GND
GND
EN
VIN
VOUT
VSET
1
2
3
4
ACES_85205-0300N
2.2U_0603_106K
1000P_0402_50V7K~N
+5VS_FAN
APL5607KI-TRG_SO8
36
FAN_SPEED
FAN_SPEED
C703
10U_0603_6.3V6M
5
4
GND
GND
3
2
1
3
2
1
JFAN1
DAN202UT106_SC70-3
6
5
Change to SC600000B00
C773
36
CONN@
FAN_SET
EC_ON
EC_ON
R528
4
SSM3K7002FU_SC70-3
6
5
10K_0402_5%
yc
om
EC BIOS ROM
p.
su
Q28
2
G
/x
/
36
SW 4
SMT1-05-A_4P
1
3
%RWWRP6LGH
1000P_0402_50V7K
1
+3VALW
PW R_LED# 32,36
+5VALW
LID_SW # 36
+3VALW
LID_SW #
1
R1049
2
0_0603_5%
PJSOT24CH_SOT23-3
D27
B
@ C1374
2
R1055
1
EC_SPI_W P# 3
EC_SPI_HOLD#7
4
CS#
WP#
HOLD#
GND
VCC
SCLK
SI
SO
8
6
5
2
EC_SPICLK_R
EC_SO_SPI_SI_R
EC_SI_SPI_SO_R
R1051 1
R1053 1
R1054 1
1
0_0402_5%
33P_0402_50V8K
2 0_0402_5%
EC_SPICLK 36
2 0_0402_5%
EC_SO_SPI_SI 36
2 0_0402_5%
EC_SI_SPI_SO 36
MX25L1606EM2I-12G SOP 8P
SA000041N00
tt
p:
2 0.1U_0402_16V4Z
U42
//
m
+3VALW
C1370 1
+SPI_VCC
EC_SPICS#/FSEL#
R1050 1
2 4.7K_0402_5%
R1052 1
2 4.7K_0402_5%
36 EC_SPICS#/FSEL#
ACES_85201-06051
ON/OFFBTN#
JBTN1
1 1
2 2
3 3
4 4
5 5
6 6
GND 7
GND 8
Compal Secret Data
2010/06/30
Issued Date
Deciphered Date
2012/06/30
5
Title

P31-KB /SW/TP/Lid
Size
B
Date:
Document Number
Rev
0.03
QBL60 LA-7552P
Sheet
1
35
of
49
+3VALW
C1347
C1348
2
2
0.1U_0402_16V4Z
C1349
1000P_0402_50V7K
1
1
C1350
<BOM Structure>
1000P_0402_50V7K
A_RST#
14
KSO[0..15]
EC_SCI#
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO[0..15] 37
KSI[0..7]
KSI[0..7]
37
@
+3VALW
+3VS
+3VALW
1
R1020
1
R1021
1
R1022
1
R1023
@
@
@
2
2.2K_0402_5%
EC_SMB_CK2
2
2.2K_0402_5%
EC_SMB_DA2
2
2.2K_0402_5%
2
2.2K_0402_5%
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
77
78
79
80
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
R1037
100K_0402_5%
OSC
OSC
NC
@
X2
@
C1362
15P_0402_50V8J
EC_CRY1
2 EC_CRY2
0_0402_5%
122
123
C1358
22P_0402_50V8J
32.768KHZ_12.5PF_Q13MC14610002
FAN_SET
IREF
CHGVADJ
SM Bus
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
+3VS
FCH_PW RGD 1
R1035
FAN_SET 35
IREF
39
CHGVADJ 39
EN_W OL
VLDT_EN
LID_SW #
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
119
120
126
128
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
73
74
89
90
91
92
93
95
121
127
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
100
101
102
103
104
105
106
107
108
EC_RSMRST#
EC_LID_OUT#
EC_ON
EC_PME#
FCH_PW RGD
BKOFF#
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
PE_GPIO1
ENBKL
EAPD
EC_THERM#
SUSP#
PBTN_OUT#
1 @
2 TL_BKOFF#
R29 0_0402_5%
V18R
124
GPI
XCLK1
XCLK0
VGATE
47
EN_W OL 29
VLDT_EN 38,46
LID_SW # 35
1
R1018
1
R1019
EC_SPICLK 35
EC_SPICLK_L 1
R1033
2
0_0402_5%
EC_SI_SPI_SO 35
EC_SO_SPI_SI 35
@
C1357 33P_0402_50V8K
Reserve for EMI, close to EC

35
Delay EC_PWROK 50ms

for VGA criterial
FSTCHG 39
CHARGE_LED0# 32
CAPS_LED# 32
CHARGE_LED1# 32
PW R_LED# 32,35
SYSON
38,43
VR_ON
47
ACIN
39
CHARGE_LED0#
CAPS_LED#
CHARGE_LED1#
PW R_LED#
SYSON
VR_ON
ACIN
ACIN
C1363
2
100P_0402_50V8J
1
ENBKL
1
100K_0402_5%
2
R1034
EC_RSMRST# 14
EC_LID_OUT# 14
EC_ON
35
FCH_PW RGD 14
BKOFF#
27
W L_OFF#_EC 32
RF_LED# 32
VGA_ON 25
Delay SUSP# 10ms
PE_GPIO1 13,25
ENBKL
10
EAPD
30
EC_THERM# 8,13,47
SUSP#
32,38
PBTN_OUT# 14
TL_BKOFF# 26,27
R1032
10K_0402_5%
@
C1359
14,29,32 FCH_PCIE_W AKE#
4.7U_0603_6.3V6K
EC_PME#
1 @
2
R2 0_0402_5%
20mil
L66
ECAGND 1
2
FBM-11-160808-601-T_0603
Compal Secret Data
2010/08/04
Deciphered Date
2010/08/04
4
2
4.7K_0402_5%
2
4.7K_0402_5%
TP_DATA
EC_SPICS#/FSEL#
KB930QF A1 LQFP 128P
Issued Date
2
10K_0402_5%
+5VS
TP_CLK
EC_MUTE# 30
USB_ON# 34
W LAN_LED# 32
BT_LED# 32
TP_CLK 37
TP_DATA 37
EC_SPICLK_L
+3VALW
NC
2
1
NUM_LED#
BATT_TEMP 40
97
98
99
109
GPIO
100P_0402_50V8J
ECAGND
1
ADP_I
39
AD_BID0 37
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
11
24
35
94
113
RTC_CLK
EC_CRY2
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
ADP_I
AD_BID0
EC_MUTE#
USB_ON#
W LAN_LED#
BT_LED#
TP_CLK
TP_DATA
SPI Flash ROM
C1360
2
39
BATT_TEMP
83
84
85
86
87
88
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
GND
GND
GND
GND
GND
1
R1036
13,16
@
C1361
15P_0402_50V8J
1
EC_TX_P80_DATA
EC_RX_P80_CLK
ON/OFF#
32,37 NUM_LED#
EC_CRY1
EC_INVT_PW M
FAN_SPEED
32 EC_TX_P80_DATA
32 EC_RX_P80_CLK
35
ON/OFF#
EC_SCI#
2
10K_0402_5%
SLP_S3#
SLP_S5#
EC_SMI#
27 EC_INVT_PW M
35 FAN_SPEED
+3VS
1
R1623
SLP_S3#
SLP_S5#
EC_SMI#
ACOFF
SPI Device Interface
p:
14
14
14
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
68
70
71
72
PS2 Interface
tt
BATT
APU/VGA
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
1
R1027
1
R1028
1
R1029
1
R1030
1
R37
1
R1619
@
1
R1617
1
R1616
40
40
6,19,26
6,19,26
63
64
65
66
75
76
DA Output
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
+3VALW
EC_SMB_CK1
2
2.2K_0402_5%
EC_SMB_DA1
2
2.2K_0402_5%
KSO1
2
47K_0402_5%
KSO2
2
47K_0402_5%
LID_SW #
2
10K_0402_5%
USB_ON#
2
10K_0402_5%
EC_SMI#
2
10K_0402_5%
EC_MUTE#
2
10K_0402_5%
AD
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
ACOFF
p.
su
13
1
47K_0402_5%
1
0.1U_0402_16V4Z
12
13
37
EC_SCI#
20
38
1
2
@ R1015
10K_0402_5%
PWM Output
21
23
26
27
yc
om
2
R1011
2
C1353
+3VALW
LPC_CLK0_EC
A_RST#
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
AGND
13,16 LPC_CLK0_EC
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
69
1
33_0402_5%
1
2
3
4
5
7
8
10
//
m
@ C1352
22P_0402_50V8J
@
2
1
2
R1014
EC_GA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
0.1U_0402_16V4Z
AVCC
VCC
VCC
VCC
VCC
VCC
VCC
U31
67
9
22
33
96
111
125
14
EC_GA20
14 EC_KBRST#
13
SERIRQ
13,32 LPC_FRAME#
13,32
LPC_AD3
13,32
LPC_AD2
13,32
LPC_AD1
13,32
LPC_AD0
C1351
ECAGND
2
2
0.1U_0402_16V4Z
L65
1
2+EC_VCCA
BLM18AG601SN1D_2P
1
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
1 C1346
1
C1345
/x
/
Title
EC ENE KB930
Size
B
Date:
Document Number
Rev
0.03
QBL60 LA-7552P
Sheet
1
36
of
49
INT_KBD Conn.
P9 FS1 PWR/GND
36
36
ID
ACES_88514-02401-071
26
25
KSO8
C1549 1
2 @ 100P_0402_50V8J
KSO5
C1550 1
2 @ 100P_0402_50V8J
KSO13
C1551 1
2 @ 100P_0402_50V8J
KSI3
C1552 1
2 @ 100P_0402_50V8J
KSO12
C1553 1
2 @ 100P_0402_50V8J
KSO14
C1554 1
2 @ 100P_0402_50V8J
KSO11
C1555 1
2 @ 100P_0402_50V8J
KSI7
C1556 1
2 @ 100P_0402_50V8J
KSO10
C1557 1
2 @ 100P_0402_50V8J
KSI6
C1558 1
2 @ 100P_0402_50V8J
KSO3
C1559 1
2 @ 100P_0402_50V8J
KSI5
C1560 1
2 @ 100P_0402_50V8J
KSO4
C1561 1
2 @ 100P_0402_50V8J
KSI4
C1562 1
2 @ 100P_0402_50V8J
KSI0
C1563 1
2 @ 100P_0402_50V8J
KSO9
C1564 1
2 @ 100P_0402_50V8J
KSO0
C1565 1
2 @ 100P_0402_50V8J
KSI1
C1566 1
2 @ 100P_0402_50V8J
C435
C436
VGA@
VGA@
36
AD_BID0
7
8
2 100K_0402_5%
R1026
2 0_0402_5%
H5
H_3P8
H12
H_3P0
H6
H_3P0
@
H13
H_3P0
H8
H_3P8
@
H14
H_4P3
H9
H_3P8
1
+
1
+
1
+
H15
H_4P3
H10
H_4P3
@
H16
H_3P0
H18
H_3P8
H22
H_7P0
@
H23
H_3P3
@
H21
H_3P0
H20
H_3P0
H19
H_3P0
H7
H_3P0
H17
H_2P7N
@
H3
H_10P0X6P0N
H1
H_2P7X5P0N
D10

GND_LAN
FD3
FD4
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FIDUCIAL_C40M80
tt
FD2
FD1
//
m
D9
4
DTSGZML-63N-Q-T-R_5P
For ESD.
Close to JSPK1
p:
1
2
3
4
G5
G6
ACES_85205-04001
CONN@
SW6
1
2
3
4
5
6
DTSGZML-63N-Q-T-R_5P
SPK_R1
SPK_R2
SPK_L1
SPK_L2
SPK_R1
SPK_R2
SPK_L1
SPK_L2
For ESD.
Close to JTP1
SW/R
H4
H_3P0
H11
H_4P3
30
30
30
30
R1024
D28
D17
SW5
JSPK1
ACES_85201-06051
Rb
H2
H_3P8
SW/L
AD_BID0
VGA@
PCB
GND1
GND2
0.82V
p.
su
1
2
3
4
5
6
0.5V
33K
+3VALW
yc
om
@
@
C1568
C1569
100P_0402_50V8J
100P_0402_50V8J
2
SW/L
SW/R
18K
100K
Ra
JTP1
100K
R10 MP
ZZZ
R03 PR
3
+
0.1U_0402_16V4Z
1
2
3
4
5
6
C474
C1567
TP_CLK
TP_DATA
0.25V
+CPU_CORE
To TP/B Conn.
TP_CLK
TP_DATA
0V
8.2K
+VGA_CORE
+5VS
36
36
100K
/x
/
CONN PIN define need double check
100K
R02 ER
2 @ 100P_0402_50V8J
R01 SR
C1548 1
KSI2
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JKB1
CONN@
2 @ 100P_0402_50V8J
GND2
GND1
C1547 1
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
KSO6
KSO15
KSO0
KSO7
KSO5
KSO2
KSO4
KSO8
KSO6
KSO11
KSO10
KSO12
KSI3
KSI0
KSI2
KSI4
KSI6
KSI7
KSI1
KSI5
KSO13
KSO1
KSO3
KSO9
KSO14
2 @ 100P_0402_50V8J
330U_D2_2V_Y
2 @ 100P_0402_50V8J
C1545 1
C1014
330U_D2_2V_Y
C1544 1
KSO7
Vab
C995
330U_D2_2V_Y
KSO1
2 @ 100P_0402_50V8J
Rb
C999
330U_D2_2V_Y
2 @ 100P_0402_50V8J
C1546 1
Ra
C994
330U_D2_2V_Y
C1543 1
KSO15
BRD ID
C993
KSO2
330U_D2_2V_Y
KSO[0..15]
330U_D2_2V_Y
KSI[0..7]
KSO[0..15]
330U_D2_2V_Y
KSI[0..7]
Close to LED1
1
C1644
2
0.1U_0603_25V7K
Close to LED2
1
C1645
2
0.1U_0603_25V7K
Close to LED3
29 +LAN_SROUT1.05
+LAN_SROUT1.05
+LAN_VDD
L120
W=60mils
1
W=60mils
1
C1646
2
0.1U_0603_25V7K
Close to LED4
1
C1647
4.7UH_1008HC-472EJFS-A_5%_1008
2
0.1U_0603_25V7K
Close to LED5
1
C1648
These components close to Pin 36

( Should be place within 200 mils )
2
0.1U_0603_25V7K
For ESD.
Cap to LED gap is 1.2mm.
Issued Date
Compal Secret Data
2010/11/25
Deciphered Date
2011/12/31
Title
P33-Other IO/USB (right)

Custom
Rev
0.02
QBL50 LA-7551P
Date: Tuesday, February 22, 2011
Sheet
37
of
49
2
R1104
100K_0402_5%
2
+5VALW
2
SUSP
32,36
SUSP#
SUSP
2
G
S
SSM3K7002FU_SC70-3
/x
/
SUSP
+1.5V to +1.5VSG (1.5A)
C1456
0.1U_0603_25V7K
Q53
2
G
28,45
SSM3K7002FU_SC70-3
R1108
100K_0402_5%
Q58
2
G
R1109
10K_0402_5%
p.
su
SSM3K7002FU_SC70-3
1
Q52
2
G
SYSON
36,43
1
1
2
3
2
2
SSM3K7002FU_SC70-3
R1102
10K_0402_5%
<BOM Structure>
SSM3K7002FU_SC70-3
C1451
0.1U_0603_25V7K
R1110
470_0603_5%
VLDT_EN#
SYSON#
1 1
C1452
C1455
1U_0402_6.3V4Z
U40
SI4800BDY-T1-GE3_SO8
1
2
3
10U_0603_6.3V6M
C1453
Q59
SUSP
36,46 VLDT_EN
Q57
2
G
+3VS
C1454
10U_0603_6.3V6M
10U_0603_6.3V6M
Q64
2
G
<BOM Structure>
S
SSM3K7002FU_SC70-3
3VS_GATE
1
200K_0402_5%
2
R1112
+VSB
1.1VS_GATE
2
47K_0402_5%
VLDT_EN#
+3VALW
1
R1105
C1450
0.1U_0603_25V7K
Q51
2
G
R1098
100K_0402_5%
+VSB
SSM3K7002FU_SC70-3
1 1
1
1
3
8
7
6
5
2
1
2
4
1
Q56
2
G
SSM3K7002FU_SC70-3
D
VLDT_EN#
R1101
470_0603_5%
S
1
SUSP
C1449
5VS_GATE
2
100K_0402_5%
SUSP
C1447
Q55
2
G
1
2
3
1U_0402_6.3V4Z
+VSB
R1100
1K_0402_5%
R1097
100K_0402_5%
8
7
6
5
10U_0603_6.3V6M
1
R1103
+5VALW
+1.1VS
C1448
R1099
470_0603_5%
10U_0603_6.3V6M
C1444
1U_0603_10V6K
C1446
+1.1VALW
U39
AO4430L_SO8
10U_0805_10V4Z
1
C1445
C1443
10U_0805_10V4Z
10U_0805_10V4Z
+5VS
U38
SI4800BDY-T1-GE3_SO8
8
1
7
2
6
3
5
+5VALW
+5VALW
SSM3K7002FU_SC70-3
+1.5V
+1.5VSG
1 1
+5VALW
C1462
VGA@
0.1U_0603_25V7K
R1119
100K_0402_5%
VGA_PWR_ON#
VLDT_EN#
R1131
100K_0402_5%
@ PJ14
2
+3VSG
1.5_VDDC_PWREN#
JUMP_43X118
25,48 1.5_VDD_PWREN
1
+3VS
<BOM Structure>
S
SSM3K7002FU_SC70-3
2
G
Q68
2N7002_SOT23
tt
h
Q62
2
G
Q77
2N7002_SOT23
4
R1134
10K_0402_5%
2
1
1
1
1
+5VALW
Change to Jump
201012062000
R1137
470_0603_5%
Q72
SUSP
<BOM Structure>
SSM3K7002FU_SC70-3
+3VS to +3VSG (3.3A)
+0.75VS
2
G
<BOM Structure>
SSM3K7002FU_SC70-3
VGA_PWR_ON#
3
2
SYSON#
Q71
2
G
2
G
R1136
470_0603_5%
1
1
Q65
VGA@
S
SSM3K7002FU_SC70-3
+2.5VS
R1135
470_0603_5%
VGA@
1.5_VDDC_PWREN#
VGA@
S
SSM3K7002FU_SC70-3
+1.5V
4
1
2
G
VGA@
S
SSM3K7002FU_SC70-3
Q66
VGA_PWR_ON#
R1128
470_0603_5%
2
G
R1123
100K_0402_5%
Q70
2
G
2010/08/04
Issued Date
Compal Secret Data
SUSP
<BOM Structure>
SSM3K7002FU_SC70-3
2010/08/04
Deciphered Date
Title
DC Interface
2
G
Q67
+1.2VS
R1127
470_0603_5%
R1126
470_0603_5%
VGA@
R1125
470_0603_5%
VGA@
+1.8VSG
+VGA_CORE
+1.0VSG
25,42,45 VGA_PWR_ON
2 1.5_VDDC_PWREN#
G
VGA@
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
Q73
p:
S
S
SSM3K7002FU_SC70-3
3
C1463
0.22U_0603_16V4Z
VGA@
R1114
470_0603_5%
Q74 D
1.5_VDDC_PWREN# 2
1
2
VGA@ R1120 47K_0402_5%
G
VGA@
S
SSM3K7002FU_SC70-3
1
VGA@
C1464
0.1U_0402_16V7K
2
SUSP
2
G
Q61
2
G
1
VGA@
C1458
1U_0402_6.3V4Z
2
1.5VSG_GATE
1 VGA@ 2
R1118 100K_0402_5%
//
m
yc
om
2
1
2
1
2
1
1
+VSB
VGA@ C1457
2
1
47K_0402_5%
10U_0603_6.3V6M
Q60
R1117
470_0603_5%
VGA@
C1460
R1122
C1461
10U_0603_6.3V6M
R1116
100K_0402_5%
SUSP#
+1.5VS
AP2301GN-HF_SOT23-3
Q63
3
1
10U_0603_6.3V6M
VGA@ C1459
+1.5V
10U_0603_6.3V6M
1
2
3
U41
VGA@
AO4430L_SO8
8
7
6
5
B
Size
B
Date:
Document Number
Rev
0.03
QBL60 LA-7552P
Sheet
E
38
of
49
PL1
HCB2012KF-121T50_0805
1
2
X7R type
PC5
0.1U_0603_16V7K
PR1
22K_0402_1%
PC4
100P_0402_50V8J
PU1
1
VCC TMSNS1
GND RHYST1
OT1 TMSNS2
OT2 RHYST2
OTP_N_001
OTP_N_002
1
PR2
22.1K_0402_1%
1
2
VL
PC3
1000P_0402_50V7K
@ACES_88323-0471
PC2
100P_0402_50V8J
PC1
1000P_0402_50V7K
PH1 under CPU botten side :

CPU thermal protection at 92 +-3 degree C
Recovery at 80 +-3 degree C
VIN
PL2
HCB2012KF-121T50_0805
1
2
ADPIN
PJPDC1
OTP_N_003
VMB
PD3
RLS4148_LL34-2
PC9
0.1U_0603_25V7K
2
2
1
2
VSB_N_001
PQ2
SSM3K7002FU_SC70-3
+VSBP
+VSB
@JUMP_43X39
1
2
PR18
68_1206_5%
VS
PC12
0.1U_0603_25V7K
PC11
0.22U_0603_25V7K
PR21
100K_0402_1%
PQ1
TP0610K-T1-GE3_SOT23-3
(120mA,40mils ,Via NO.= 1)
PQ3
PR17
TP0610K-T1-GE3_SOT23-368_1206_5%
N1
+VSBP
PJ2
VS_N_001
1
1
PD4
RLS4148_LL34-2
BATT+
PC8
0.22U_0603_25V7K
2
1
PR10
100K_0402_1%
PR16
0_0402_5%
2VSB_N_002 2
G
tt
VIN
SPOK
p:
42,45
1VSB_N_003
BATT_TEMP 36
PR13
100K_0402_1%
PR12
22K_0402_1%
1
2
1K_0402_1%
VL
+3VALW
//
m
100K_0402_5%
PR30
B+
PC10
0.1U_0402_16V7K
EC_SMB_DA1 36
EC_SMB_CK1 36
PR29
VS_ON 42
PC7
0.01U_0402_25V7K
@PJSOT24CW _SOT323-3
0_0402_5%
yc
om
1
3
1
PR31
100_0402_1%
BATT+
p.
su
PD2
2
PR28
100_0402_1%
1
2
1
2
3
@SUYIN_200275MR009G186ZL
PC6
1000P_0402_50V7K
PD1
PR27
1K_0402_1%
@PJSOT24CW_SOT323-3
GND
GND
EC_SMCA
EC_SMDA
TS_A
PH1
100K_0402_1%_NCP15W F104F03RC
PR4
PL4
HCB2012KF-121T50_0805
1
2
1
2
3
4
5
6
7
8
9
/x
/
PJP2
10
11
G718TM1U_SOT23-8
2
PL3
HCB2012KF-121T50_0805
1
2
1
2
3
4
5
6
7
8
9
35
2
PR22
22K_0402_1%
51_ON#
VS_N_002
Issued Date
Compal Secret Data
2009/01/23
Deciphered Date
2010/01/23
A
Title
DCIN / BATT CONN / OTP

Size
Document Number
Rev
0.1
NCL61 LA-6321P M/B

Date:

D
Sheet
40
of
44
PC115
1
2
UGATE
17
DH_CHG
BOOT
16
VDDP
15
LGATE
14
PGND
13
VREF
CHG_CHLIM
CHLIM
6251aclim
10
ACLIM
Rtop
PR128
20K_0402_1%
11
VADJ
PR105
10K_0402_1%
1
2
GND
PC106
2200P_0402_25V7K
PC105
0.1U_0402_25V6
2
1
PR111
14.3K_0402_1%
2
1
PR122
2.2_0603_1%
PR126
0_0603_5%
BST_CHG 1
DL_CHG
PL101
10UH +-20% MSCDRI-104A-100M-E
CHG
1
2
PQ110
PC121
0.1U_0603_25V7K
BST_CHGA 2
1
4
PD106
RB751V-40TE17_SOD323-2
6251VDDP
26251VDD
PR102
0.02_1206_1%
4
BATT+
AON7406L_DFN8-5
PR129
4.7_0603_5%
PC123
4.7U_0805_6.3V6K
ISL6251AHAZ-T QSOP 24P
36 CHGVADJ
12
p.
su
LX_CHG
2 ACPRN
G
PQ109
@SSM3K7002FU_SC70-3
PC101
10U_0805_25V6K
2
1
18
PHASE
19
ICM
1CHG_N_0081
CSIP
VCOMP
PQ108
AON7408L_DFN8-5
PR125
@4.7_1206_5%
20
PC114
@2200P_0402_25V7K
CSOP
1CHG_SNUB2
CSIN
CHG_N_006
PC124
@680P_0402_50V7K
ICOMP
CHG_N_001
3
2
1
21
CSON
CSOP
/x
/
CELLS
PR127
6251VREF 1
2
226K_0402_1%
1
2
DCIN
22
PR118
20_0603_5%
CHG_CSON 1
2
PC113
0.047U_0603_16V7K
CHG_CSOP 1
2
PR119
20_0603_5%
CHG_CSIN
2
1
PC118
PR120
0.1U_0603_25V7K
20_0603_5%
CHG_CSIP
1
2
6251VREF
PC110
1000P_0402_50V7K
2
1
CSON
VIN
PR115
100K_0402_1%
1
2
PQ106
DTC115EUA_SC70-3
PR104
140K_0402_1%
EN
ACPRN
3
2
1
PQ111
DTC115EUA_SC70-3
23
ACOFF
1
2
PC120
0.1U_0402_16V7K
PR103
150K_0402_1%
PC122
0.01U_0402_25V7K
2
1
IREF
36
ADP_I
ACSET ACPRN
PC120 must close EC pin.
CHG_VCOMP
100_0402_1%
2 CHG_ICM 7
36
ACOFF
10K_0402_1%
2
PR123
0.01U_0402_25V7K
PACIN
PR124
22K_0402_5%
1
2
6800P_0402_25V7K
CHG_ICOMP
2
24
PR121
1
DCIN
PC117
1
2
VDD
CHG_N_009
PC116
1
SSM6N7002FU_US6
6251_EN
PR130
0_0402_5%
1
2
PR110
47K_0402_1%
1
2
PC112
1U_0603_25V6K
1
2
yc
om
PQ107B
2S: Float
3S: GND
10_1206_5%
CHG_N_005
PU101
8
7
6
5
PR112
10K_0402_1%
//
m
SSM6N7002FU_US6
PR113
CHG_VADJ
3CHG_N_002
PD101
CHG_VIN 1
PC109
2.2U_0603_6.3V6K
2
1
1
2
PQ107A
36
100K_0402_1%
PR117
PR116
150K_0402_1%
ACSETIN
PC111
@10U_0805_25V6K
2
1
1
1
2
2
1
FSTCHG
CHG_N_001
36
RB751V-40TE17_SOD323-2
ACSETIN
PR114
10K_0402_1%
2
1
2
PQ105
DTC115EUA_SC70-3
PR108
191K_0402_1%
1
2
6251VDD
CHG_N_003
PQ103
AO4407AL 1P SO8
1
2
3
CSIN
CSIP
PR107
200K_0402_1%
PC108
0.1U_0603_25V7K
PR109
47K_0402_1%
1CHG_N_010
PQ104
DTA144EUA_SC70-3
VIN
8
7
6
5
B+
CHG_B+
PL102
1.2UH_1231AS-H-1R2N=P3_2.9A_30%
2
1
PC104
10U_0805_25V6K
2
1
1
2
3
8
7
6
5
PR101
0.02_1206_1%
1
4
PC107
5600P_0402_25V7K
1
2
VIN
P3
PQ102
AO4409L_SO8
1
2
3
P2
@10U_0805_25V6K
PC102
10U_0805_25V6K
2
1
B+
(B+ 6A,240mils ,Via NO.= 12)

PQ101
AO4435L_SO8
PC103
4.7U_0805_25V6-K
2
1
PR106
22K_0402_1%
p:
PR131
47K_0402_1%
ACIN
PR132
10K_0402_1%
36
PACIN
ACPRN
PQ112
2
B
Iada=0~4.737A(90W);CP=4.03A;where Racdet=0.020ohm,where Rtop=12.4K

90W for Dis:Rtop:SD00000AJ80
Iada=0~3.421A(65W);CP=2.91A;where Racdet=0.020ohm,where Rtop=226K
65W for UMA:Rtop:SD034226380
Astro2010_01_15 need confirm P/N
CP= 85%*Iada;
PR133
10K_0402_1%
1
2
tt
6251VDD
PR136
20K_0402_1%
2
E
MMBT3904W H NPN SOT323-3
CP mode
Vaclim=VREF*(Rbot//Rinternal/(Rtop//Rinternal+Rbot//Rinternal))
when 90W Vaclim=2.39*(20K//152K/(20K//152K+12.4K//152K))=1.44966V
when 65W Vaclim=2.39*(20K//152K/(20K//152K+226K//152K))=0.38914V
Iinput=(1/Racdet)*((0.05*Vaclim/VREF+0.05))
when 90W,Iinput=(1/0.02)*(0.05*1.44966/2.39+0.05)=4.02A
when 65W,Iinput=(1/0.02)*(0.05*0.38914/2.39+0.05)=2.92A
CC=0.25A~3A
CHGVADJ=(Vcell-4)/0.10627
IREF=1.016*Icharge
Vcell
IREF=0.254V~3.048V
4V
VCHLIM need over 95mV
4.2V
CHGVADJ
Issued Date
Compal Secret Data
0V
1.882V
2009/01/23
Deciphered Date
2010/01/23
A
Title
CHARGER
Size
Document Number
Rev
0.1
NCL61 LA-6321P M/B

Date:

D
Sheet
41
of
44
2VREF_6182
1
2
PC306
10U_0805_25V6K
PC312
2200P_0402_50V7K
2
1
LX_5V
19
LG_5V
PL305
4.7UH_FMJ-0630T-4R7 HF_5.5A_20%
1
2
UG_5V
20
3
2
1
22
21
5
6
7
8
BOOT1
40,45
4
SNUB_5V
SPOK
PQ306
AO4406AL_SO8
1
+ PC305
150U_B2_6.3VM_R35M
PC318
4.7U_0805_10V6K
+5VALWP
VL
3
2
1
RT8205LZQW(2) WQFN 24P PWM
PR313
@4.7_1206_5%
PC311
0.1U_0402_25V6
2
1
ENTRIP1
1
ENTRIP1
2
FB1
VREG5
VIN
PR309
PC315
2.2_0402_5%
0.1U_0402_10V7K
BST_5V 1
2 BST1_5V 1
2
UGATE1
LGATE1
17
16
GND
15
PC320
1U_0603_10V6K
B++
2
24
23
PC317
@680P_0402_50V7K
PR315
95.3K_0402_1%
VO1
PGOOD
PQ305
AON7408L_DFN8-5
AO4468L_SO8
PR307
165K_0402_1%
2
EN0
B++
p.
su
LGATE2
SKIPSEL
PR314
499K_0402_1%
2
PR306
20K_0402_1%
2
PHASE1
EN
PHASE2
13
B++
UGATE2
14
8
7
6
5
4
BOOT2
yc
om
12
LG_3V
PQ304
11
VREG3
//
m
1
PC303
150U_B2_6.3VM_R35M
LX_3V
1
2
3
+3VALWP
PR312
@4.7_1206_5%
PC316
@680P_0402_50V7K
2
1 SNUB_3V
2
1
PL303
4.7UH_FMJ-0630T-4R7 HF_5.5A_20%
2
1
REF
VO2
1
2
3
PC314
8
PR308
0.1U_0402_10V7K
BST1_3V 1
1
2
2 BST_3V 9
2.2_0402_5%
UG_3V 10
PR305
30.9K_0402_1%
2
NC
18
P PAD
25
TONSEL
PU301
PC313
10U_0805_6.3V6M
PQ303
AON7408L_DFN8-5
FB2
1
2
PC304
4.7U_0805_25V6-K
PC310
2200P_0402_50V7K
2
1
PR303
133K_0402_1%
1
FB_5V 1
ENTRIP2
+3VLP
2
PC309
0.1U_0402_25V6
2
1
1
2
PC322
@680P_0402_50V7K
FB_3V
ENTRIP2
PL301
HCB2012KF-121T50_0805
PR302
20K_0402_1%
1
2
B++
B+
/x
/
PR301
13.7K_0402_1%
1
PC308
1U_0603_16V6K
PC319
0.1U_0603_25V7K
+3VLP
+5VALWP
VL
+5VALW
(5A,200mils ,Via NO.= 10)
+5VALW
PAD-OPEN 4x4m
PJP305
2
VL
PJP301
PQ308
DTC115EUA_SC70-3
+3VALWP
1
PAD-OPEN 2x2m
+3VALW
PAD-OPEN 4x4m
EC:+3VL, reserve PR319, install PR318, PR320 100K

EC:+3VALW, reserve PR318, install PR319, PR320 42.2K
Compal Secret Data
2007/08/02
Issued Date
2008/08/02
Deciphered Date
A
PAD-OPEN 4x4m
PJP303
PC321
2.2U_0603_10V6K
1
2
PR319
100K_0402_1%
1
PAD-OPEN 2x2m
PJP306
+5VALWP
2
2
1
PR320
42.2K_0402_1%
PR317
100K_0402_5%
+CHGRTC
PJP302
2
p:
PQ307B
SSM6N7002FU_US6
40 VS_ON
VS
tt
N_3_5V_001
2
G
D
PQ307A
SSM6N7002FU_US6
ENTRIP2
ENTRIP1
2VREF_6182
Title

3.3VALWP/5VALWP

Custom
Date:
Rev
0.1
LAXXXX
Sheet
E
42
of
44
PC402
22U_0805_6.3VAM
PC401
22U_0805_6.3VAM
PC404
68P_0402_50V8J
2
1
1
PR402
10K_0402_1%
//
m
yc
om
SY8033BDBC_DFN10_3X3
PR401
20K_0402_1%
2
1.8VSP_FB
NC
TP
PR405
@47K_0402_5%
11
EN_1.8VSP
PR404 0_0402_5%
FB
<Vo=1.8V> VFB=0.6V
Vo=VFB*(1+PR401/PR402)=0.6*(1+20K/10K)=1.8V
+1.8VSGP
EN
p.
su
LX
SVIN
PC405
@0.1U_0402_10V7K
25,38,46 VGA_PWR_ON
PL401
1UH_VLS252012T-1R0N1R7_2.4A_30%
1
2
1.8VSP_LX
PR403
4.7_1206_5%
PVIN
LX
PC406
680P_0402_50V7K
SNUB_1.8VSP
2
1
PVIN
NC
PC403
22U_0805_6.3VAM
10
1.8VSP_VIN
PU401
HCB1608KF-121T30_0603
1
2
PG
PL402
+5VALW
/x
/
PJP401
1
+1.8VSGP
+1.8VSG
(2A, 80mils, Via NO.= 4)
PAD-OPEN 3x3m
tt
p:
Issued Date
Compal Secret Data
2009/01/23
Deciphered Date
2010/01/23
A
Title
+1.8VSGP
Size
Document Number
Rev
0.1
NCL61 LA-6321P M/B

Date:

D
Sheet
43
of
44
0_0402_5%
B+
LG_1.5V
+5VALW
PC510
4.7U_0805_10V6K
NC
3
2
1
+5VALW
PQ502
FDS6690AS-G_SO8
PR502
2.15K_0402_1%
LGATE
TRIP_1.5V 1
//
m
RT8209MGQW _W QFN14_3P5X3P5
PGOOD
11
10
5
6
7
8
CS
VDDP
15.4K_0402_1%
3
2
1
FB
PR508
1
2
1
2
2200P_0402_50V7K
PC506
+1.5VP
C
1
+ PC501
220U_6.3VM_R15
PJP502
p:
PL501
2.2UH_PCMC063T-2R2MN_8A_20%
1
2
1SNUB_1.5V
14
15
VDD
PHASE
LX_1.5V
PQ501
AON7408L_DFN8-5
p.
su
2.21K_0402_1%
PC509
4.7U_0603_10V6K
FB_1.5V
UG_1.5V
yc
om
PR501
13
12
PGND
+1.5VP
V5FILT_1.5V
PR507
100_0402_1%
+5VALW 1
+5VALW
VOUT
GND
+1.5VP
UGATE
TON
BOOT
EN/DEM
PU501
PR506
255K_0402_1%
1
2TON_1.5V
1
2
PR509
@4.7_1206_5%
PC511
@680P_0402_50V7K
PC508
0.1U_0402_10V7K
PC504
@4.7U_0805_25V6-K
PC503
10U_0805_25V6K
PR504
2.2_0402_5%
BST_1.5V 1
2BST1_1.5V
/x
/
PC505
@0.1U_0402_10V7K
PL502
HCB1608KF-121T30_0603
2
1
PC512
@680P_0402_50V7K
EN_1.5V
PC507
0.1U_0402_25V6
1.5V_B+
PR503
36,38 SYSON
2
@PAD-OPEN 4x4m
PJP501
tt
+1.5VP
+1.5V
@PAD-OPEN 4x4m
Compal Secret Data
2007/05/29
Issued Date
Deciphered Date
2008/05/29
5
Title

+1.5VP
Size
Document Number
Rev
0.1
LAXXXX
Date:
Sheet
1
44
of
44
1.1V_B+
PR703
SPOK
0_0402_5%
B+
PL702
HCB1608KF-121T30_0603
2
1
EN_1.1V
1
PC704
@0.1U_0402_10V7K
10
9
+5VALW
LG_1.1V
+5VALW
PQ702
PC709
4.7U_0805_10V6K
AO4468L_SO8
4
PC711
@680P_0402_50V7K
2
1
+
PR706
@100K_0402_5%
PC701
220U_D2_2VY_R15M
//
m
yc
om
3
2
1
VDDP
LGATE
15K_0402_1%
2
PR708
TRIP_1.1V 1
+1.1VALW
PC710
@680P_0402_50V7K
11
PR709
@4.7_1206_5%
PL701
1
2
CS
/x
/
3
2
1
PHASE
LX_1.1V
1SNUB_1.1V
14
15
NC
BOOT
UG_1.1V
5
6
7
8
PGOOD
13
12
FB
UGATE
PQ701
AON7408L_DFN8-5
p.
su
PR702
10K_0402_1%
5
FB_1.1V
PC707
0.1U_0402_10V7K
VDD
PGND
PR701
4.64K_0402_1%
VOUT
+1.1VALW
PC708
4.7U_0603_6.3V6M
1
1
PR707
100_0402_1%
C
V5FILT_1.1V
+5VALW 1
TON
+1.1VALW
+5VALW
EN/DEM
PR705
255K_0402_1%
1
2TON_1.1V
GND
PU701
PC706
0.1U_0402_25V6
2
2
PC705
2200P_0402_50V7K
2
1
PR704
2.2_0402_5%
BST_1.1V 1
2 BST1_1.1V 1
PC702
10U_0805_25V6K
40,42
tt
p:
Compal Secret Data
2009/12/01
Issued Date
Deciphered Date
2010/12/31
5
Title

PWR+1.1VALWP
Size
Document Number
Custom
Rev
0.1
LAXXXX
Date:
Sheet
1
45
of
44
+1.5V
VIN
NC
GND
NC
VREF VCNTL
VOUT
NC
TP
+3VALW
PR601
1K_0402_1%
PC601
4.7U_0805_6.3V6K
2
1
PU601
1
PC603
1U_0603_10V6K
APL5336KAI-TRL_SOP8P8
2
G
S
0_0402_5%
+0.75VSP
1
10.75VS_N_002
PR602
1K_0402_1%
2
28,38 SUSP
PQ602
SSM3K7002FU_SC70-3
PR604
2
1
PC604
0.1U_0402_16V7K
VREF_G2992
PC605
10U_0805_6.3V6M
/x
/
PC606
@0.1U_0402_10V7K
PU603
APL5508-25DC-TRL_SOT89-3
2
yc
om
+3VS
+5VALW
2
1
PR611
7.32K_0402_1%
1
2
PR605
@150_1206_5%
+2.5VS
PAD-OPEN 3x3m
p:
PR610
1.82K_0402_1%
+2.5VSP
PC615
22U_0805_6.3V6M
PC613
0.1U_0402_16V7K
PD601
1
FB
PJP602
+1.0VSP
PC614
180P_0402_50V8J
EN
POK
3
4
PC607
1U_0402_6.3V6K
+2.5VSP
//
m
8
7
VOUT
VOUT
GND
VCNTL
VIN
VIN
OUT
GND
1
VGA_PWR_ON
PR609
15K_0402_1%
1
2
APL5930KAI-TRG_SO8
6
5
9
25,38,43
PU602
PC611
4.7U_0805_6.3V6K
PC612
1U_0603_10V6K
+1.5V
IN
PAD-OPEN 3x3m
+0.75VS
p.
su
+0.75VSP
PC608
4.7U_0805_6.3V6K
PJP601
PJP603
1
+1.0VSP
tt
@1SS355_SOD323-2
+1.0VSG
(2.5A,100mils ,Via NO.= 5)
PAD-OPEN 3x3m
Compal Secret Data
Issued Date
2006/11/23
Deciphered Date
2007/11/23
5
Title

PWR 0.75VSP/1.0VSP/2.5VSP
Size
Document Number
Rev
0.1
LAXXXX
Date:
Sheet

1
46
of
44
/x
/
PHASE
LX_1.2V
TRIP_1.2V 1 PR808
CS
11
VDDP
10
LGATE
+5VALW
LG_1.2V
1
2
PC811
@680P_0402_50V7K
PC806
0.1U_0402_25V6
1
2
2200P_0402_50V7K
PC805
2
1
15K_0402_1%
+5VALW
PC809
4.7U_0805_10V6K
PR809
@4.7_1206_5%
PQ802
IRF8707TRPBF_SO8
4
PC810
@680P_0402_50V7K
3
2
1
//
m
tt
p:
+1.2VS
PL801
1
2
PC801
BOOT
NC
PR802
5.36K_0402_1%
UG_1.2V
12
PQ801
AON7408L_DFN8-5
220U_D2_2VY_R15M
PGOOD
13
14
15
FB
3.24K_0402_1%
UGATE
FB_1.2V
VDD
yc
om
VOUT
PC808
4.7U_0603_6.3V6M
+1.2VS
1
PR807
100_0402_1%
PR801
PGND
V5FILT_1.2V
+5VALW 1
TON
+1.2VS
+5VALW
EN/DEM
PR805
255K_0402_1%
1
2TON_1.2V
GND
PU801
PC807
0.1U_0402_10V7K
PR804
2.2_0402_5%
BST_1.2V 1
2BST1_1.2V
PC802
10U_0805_25V6K
2
1
p.
su
PC804
@0.1U_0402_10V7K
B+
PL802
HCB1608KF-121T30_0603
2
1
1SNUB_1.2V 2
0_0402_5%
3
2
1
EN_1.2V
5
6
7
8
VLDT_EN
1.2V_B+
PR803
36,38
Issued Date
Compal Secret Data
2009/01/23
Deciphered Date
2010/01/23
A
Title
+1.2VSP
Size
Document Number
Rev
0.1
NCL61 LA-6321P M/B

Date:

D
Sheet
47
of
44
PL204
HCB2012KF-121T50_0805
1
2
5
3
2
1
PR213
3.65K_0805_1%
2
1
VSUMG-
PR214
1_0402_1%
2
1
1
1
2
8 APU_VDD_RUN_FB_L
PC263
@330P_0402_50V7K
PLACE NEAR Phase1 choke
3
2
1
PC227
100U_25V_M
PC230
@100U_25V_M
PC243
2200P_0402_50V7K
2
1
PC242
0.01U_0402_25V7K
2
1
PC224
10U_0805_25V6K
2
1
VSUM+_2
1
2
SNUB_CPU2
PC253
2200P_0402_50V7K
2
1
PC254
0.01U_0402_25V7K
2
1
PC222
10U_0805_25V6K
2
1
PC221
10U_0805_25V6K
2
1
0_0402_5%
PQ201
UGATE1
4
TPCA8065-H_PPAK56-8-5
PL201
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
4
PHASE1
PH201
PR247
10K_0402_5%_ERTJ0ER103J 2.2_0603_5%
BOOT1 2
PC260
0.1U_0603_50V7K
1BOOT1_1 2
1
PQ202
VSUMLGATE1
PC262
0.1U_0603_50V7K
3
2
1
2
PR252
10_0402_5%
2
1
VSUM+
PR240
4.99_0402_1%
PC261
@330P_0402_50V7K
8 APU_VDD_SEN
6267_VCCP1 2
//
m
TP
49
24
VIN_CPU
1
2
VIN
VDD
ISUMP
23
22
PR244
976_0402_1%
2
1
CPU_B+
PC264
1000P_0402_50V7K
ISEN1
2 PR245 1
10K_0402_1%
VSUM+
2 PR250 1
3.65K_0805_1%
PR249
4.7_1206_5%
PR251
1_0402_1%
2
1
VSUM-
1 PR246 2 ISEN2
10K_0402_1%
VSUM-_1
PC265
680P_0402_50V7K
2
VSUM+_1
VSUM-
PR2351
CPU_B+
0_0603_5%
1
+5VS
PR237
1_0603_5%
PR248
10_0402_5%
2
1
VSUM-_2
If the layout of each phase to CPU

is symmetric, the two res. can be
removed.
They are used for phase current
balance adjustment.
2.26K_0402_1%
+CPU_CORE
1 PR222 2 ISEN1
10K_0402_1%
PC246
680P_0402_50V7K
SNUB_CPU1
+CPU_CORE
PR242
1
PR231
1_0402_1%
VSUM- 2
1
143K_0402_1%
470P_0402_50V7K
PR241
1
PC257
0.22U_0402_10V6K
2
1
PC255
1COMP_CPU_12
PC256
0.22U_0402_10V6K
2
1
ISEN1
PROG1_CPU 1
ISEN2
25
VSUM+ 2 PR230 1
3.65K_0805_1%
3
2
1
PC252
1
1000P_0402_50V7K
BOOT1
2 PR220 1
10K_0402_1%
PR228
4.7_1206_5%
1FB_CPU_1
2
324_0402_1%
UGATE1
p:
PR239
PC258
2
1
PC251
1
27
26
LGATE2
ISEN2
PQ204
PHASE1
PC244
0.1U_0603_50V7K
1BOOT2_12
1
PR234
6.65K_0402_1%
tt
68P_0402_50V8J
PC250
0.22U_0603_25V7K
FB_CPU
PR238
@10_0402_5%
2
1
1U_0603_10V6K
1 VDD_CPU
33P_0402_50V8J
2
PC249
PC248
1
ISUMN_CPU
Rfset(Kohm)=(Period(uS))-0.29)*2.65
PC247
1000P_0402_50V7K
PR236
8.06K_0402_1%
ISEN3_FB2_CPU
VW_CPU
COMP_CPU
PROG1
RTN
VSEN
ISEN1
ISEN2
ISEN3/FB2
ISUMN
21
20
19
PH202 470K_0402_5%_TSM0B474J4702RE
18
17
PLACE NEAR Phase1 L-MOS
NTC
16
12
FB
PR233 27.4K_0402_1%
NTC_CPU
1
15
COMP
3.83K_0402_1%
1PH202_CPU
VW
BOOT1
14
PR232
UG1
PROC_HOT
1
LGATE1
28
PR226
2.2_0603_5%
BOOT2 2
PL202
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
4
PGOOD
11
2
0_0402_5%
PWM3
29
PC259
2
1
10
VGATE
8,13,36 EC_THERM#
PR218
2
6267_VCCP1
PHASE2
PH1
0.22U_0402_16V7K
VR_ON
13
36
36
PC223
10U_0805_25V6K
2
1
ENABLE
31
3
2
1
LG1
LGATE2
30
PWM3
SVC
PHASE2
PR219
0_0603_5%
1U_0603_10V6K
PWROK
33
32
PR224
VCCP
ISL6267HRZ-T_QFN48_6X6
UGATE2
yc
om
p.
su
37
LG1_NB
39
40
38
PH1_NB
UG1_NB
PROG2
NTC_NB
44
43
ISUMN_NB
45
RTN_NB
47
46
LG2
SVD
BOOT2
34
APU_SVC
PH2
35
PC245
2
1
VW_NB
PGOOD_NB
13 APU_PWRGD_L
PR225
@100K_0402_5%
UG2
UGATE2
1PH201_CPU 2
PR223 0_0402_5%
2
1 SDA
PR227 0_0402_5%
2
1 ALERT#
PR229 0_0402_5%
2
1 SCLK
APU_SVD
BOOT2
COMP_NB
VSEN_NB
48
FB_NB
CPU_B+
PQ203
36
PWM2_NB
PR243
2
1
12.1K_0402_1%
VW_NB
+5VS
/x
/
PC237
680P_0402_50V7K
PR215
PC240
2.2_0603_5%
0.1U_0603_50V7K
2
1BOOST1_NB1 2
1
0.01U_0402_16V7K
BOOT1_NB
1
PR221
100K_0402_5%
FB2_NB
ISUMP_NB
FB_NB
COMP_NB
+3VS
ISEN1_NB
ISEN2_NB
PU201
VSUMG-_1
VSUMG+_1
VSUMG+
Rfset(Kohm)=(Period(uS))-0.29)*2.65
C
+CPU_CORE_NB
1
SNUB_NB 2
1
2
PROG2 1
41
ISUMN_NB
NTC_NB
PC241
1000P_0402_50V7K
PR216
8.06K_0402_1%
42
+5VS
PC239
1000P_0402_50V7K
PR210
324_0402_1%
PR205
4.7_1206_5%
1FB_NB_12
LGATE_NB
PC238
100P_0402_50V8J
PL203
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
4
2
PQ206
VSUMG-
PH204
470K_0402_5%_TSM0B474J4702RE
PC235
1
2
0.1U_0603_50V7K
PR211
27.4K_0402_1%
NTC_NB_1
1
2
1
2
PR212
3.83K_0402_1%
2
PR217
BOOT1_NB 6.65K_0402_1%
2
1
PR206
845_0402_1%
PHASE_NB
10K_0402_5%_ERTJ0ER103J
1
@ PR209
@PR209
@10_0402_5%
PH203
PR208
2.26K_0402_1%
2
1
PLACE NEAR NB L-MOS

PC236
PR207
470P_0402_50V7K
143K_0402_1%
2
1COMP_NB_1
2
1
PC229
2200P_0402_50V7K
2
1
5
UGATE_NB
PC266
@330P_0402_50V7K
B+
PQ205
3
2
1
PR201
11K_0402_1%
PR203
2.61K_0402_1%
1PH203_NB 2
1
PR204
10_0402_5%
2
1
PC232
@330P_0402_50V7K
8 APU_VDDNB_SEN
+CPU_CORE_NB
PC234
2
1
8 APU_VDDNB_RUN_FB_L
0.047U_0402_16V7K
PC233
2
1
PC231
1000P_0402_50V7K
0.1U_0402_10V7K
VSUMG+
PR202
10_0402_5%
2
1
PL205
HCB2012KF-121T50_0805
1
2
PC228
0.01U_0402_25V7K
2
1
PC226
10U_0805_25V6K
2
1
PLACE NEAR NB choke
PC225
10U_0805_25V6K
2
1
CPU_B+
Issued Date
Compal Secret Data
2010/11/11
Deciphered Date
2011/11/11
5
Title
PWR_+CPU_CORE/+CPU_CORE_NB
Size
Document Number
Rev
0.1
PEQAE LA-7291P M/B

Date:

1
Sheet
48
of
PL902
HCB2012KF-121T50_0805
1
2
RT8237CZQW (2) W DFN
PC919
2.2U_0603_6.3V6K
0.9V
FB0_VGA 1
GCORE_SEN 21
+3VSG
SSM3K7002FU_SC70-3
GPU_VID0_1 1
PR917
5.1K_0402_1%
2
PC922
.1U_0402_16V7K
2
G
PQ905
100_0402_1%
PR916
@10K_0402_5%
PC920
@680P_0402_50V7K
PR912
2
1
GPU_VID1
6.19K_0402_1%
3
2
1
1
2
PC921
@.1U_0402_16V7K
1
3
0.1U_0402_10V7K
19
GPU_VID0
PR918
@10K_0402_5%
3
tt
1.0V
PR902
6.98K_0402_1%
Rrf = 470K, FSW = 290KHz
2GPU_VID1_1
G
PR913
@10K_0402_1%
PC918
p:
Rtrip = 73.2K, OCP = 34.42A
PR915
@5.1K_0402_1%
19
//
m
@SSM3K7002FU_SC70-3
PQ904
yc
om
PR904
@10K_0402_1%
FB1_VGA1
2
2.94K_0402_1%
1
2
PR903
+3VSG
PR911
470K_0402_1%
3
2
1
PR901
Whistler Pro
PR910
@4.7_1206_5%
PC901
330U_D2_2V_Y
11
+VGA_CORE1
GPU VID0
PQ903
p.
su
TP
GPU VID1
PQ902
+5VALW
PR914
10K_0402_1%
2
1
2
0_0603_5%
RF
V5IN_VGA
DL_VGA
DRVL
V5IN
+VGA_CORE
VFB
PR909
PL901
0.36UH_PDME104T-R36MS0R825_37A_20%
1
2
SW
LX_VGA
1SNUB_VGA
EN
1
2BST1_VGA
2.2_0603_5%
0.1U_0603_25V7K
@TPCA8065-H_PPAK56-8-5
DH_VGA
BST_VGA
RF_VGA
10
DRVH
VBST
TRIP
/x
/
FB_VGA
PGOOD
0_0402_5%
PC917
@.1U_0402_16V7K
25,38 1.5_VDD_PW REN
PR9072TRIP_VGA 2
1
73.2K_0402_1%
EN_VGA 3
PC916
1
2
3
2
1
13,25 VGA_PW RGD
PR906
4
PU901
PQ906
3
2
1
PQ901
PR905
10K_0402_1%
1 PR908
1
2
PC913
@4.7U_0805_25V6-K
2
1
1
2
PC915
2200P_0402_50V7K
PC914
0.1U_0402_25V6
PC923
@680P_0402_50V7K
+3VS
10U_0805_25V6K
PC911
2
1
VGA_B+
10U_0805_25V6K
PC912
2
1
B+
Compal Secret Data
Issued Date
2007/05/29
Deciphered Date
200810/11
A
Title

VGA_CORE
Size
Document Number
Rev
0.1
LAXXXX
Date:

D
Sheet
49
of
44
Version change list (P.I.R. List)
Item
Power section
Reason for change
Page 1 of 1
PG#
Modify List
Date
Phase
1
2
D
5
6
p.
su
/x
/
//
m
yc
om
tt
p:
Compal Secret Data
Issued Date
2008/09/15
2010/12/31
Deciphered Date
5
Title

Changed-List History
Size
Document Number
Rev
1.0
LA-4902P
Date:
Sheet
1
50
of
47

Compal La-7552p Qbl60 Asus k53 Rev 0.03 WWW - Mycomp.su

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A

QBL50 Schematics Document

APU Llano / Hudson M2_M3 / Vancouver Whistler

Compal Electronics, Inc.

Compal Secret Data

AMD FS1 APU

FCH CRT (VGA DAC)

HD Audio 3.3V 24.576MHz/48Mhz

1.5V DDRIII 800~1333MHz

SYS BIOS (2M)

Compal Electronics, Inc.

Compal Secret Data

CPU FS1 SOCKET

CLOCK / DISPLAY DISTRIBUTION

Tuesday, February 22, 2011

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

Voltage for On-die VGA of APU

0.95-1.2V switched power rail

0.75V switched power rail for DDR terminator

1.0V switched power rail for VGA

1.1V switched power rail for FCH

1.1V switched power rail for FCH

1.2V switched power rail for APU

1.5V power rail for CPU VDDIO and DDR

1.5V switched power rail

1.8V switched power rail

2.5V for CPU_VDDA

3.3V always on power rail

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail

5V switched power rail

VSB always on power rail

SLP_S3# SLP_S4# SLP_S5#

BTO Option Table

Use VGA (Mux)

Part Number = SA000043I90

External PCI Devices

x = 1 is read cmd, x= 0 is writee cmd.

ADI ADM1032 (VGA)

Compal Electronics, Inc.

Compal Secret Data

AMD APU FS1

VDD CORE 54A

RAM DDRIII SODIMMX2

POWER DELIVERY CHART

Compal Secret Data

FCH AMD Hudson M2/M3

Tuesday, February 22, 2011

Power Sequence of APU

Compal Electronics, Inc.

Compal Secret Data

BSH111, the Vgs is:

CPU TSI interface level shift

For UMA Mux.

AMD FS1 PCIE / UMI / TSI

Tuesday, February 22, 2011

EVENT# pull high

0.75V reference voltage

Compal Electronics, Inc.