CONTENTS A. ANALOG PART SAFETY PRECAUTIONS: ...........................................................................................................................................

TV set switched off...................................................................................................................3 Measurements ...........................................................................................................................3 SCART 1 ..................................................................................................................................3 SCART 2 ..................................................................................................................................3 2. SMALL SIGNAL PART WITH STV2248 .........................................................................4 2.1 Vision IF amplifier..............................................................................................................4 2.2 QSS Sound circuit (QSS versions) .....................................................................................4 2.3 FM demodulator and audio amplifier (mono versions) ......................................................4 2.4 Video switching ..................................................................................................................5 2.5 Synchronisation circuit .......................................................................................................5 2.6 Chroma and luminance processing .....................................................................................5 2.7 RGB output circuit..............................................................................................................6 2.8 -Controller ........................................................................................................................7

PERI-TV SOCKET ........................................................................................................................................................3

1. INTRODUCTION ......................................................................................................................................................4

3. TUNER ........................................................................................................................................................................7 4- DIGITAL TV SOUND PROCESSOR MSP34X0....................................................................................................8 5. SOUND OUTPUT STAGE TDA7266L/TDA7266 ...................................................................................................8 6. VERTICAL OUTPUT STAGE WITH TDA8174A .................................................................................................8 7. TRIPLE VIDEO OUTPUT AMPLIFIER TDA6107JF ..........................................................................................8 8. POWER SUPPLY (SMPS) ........................................................................................................................................8 9. POWER FACTOR CORRECTION ......................................................................................................................... 8

10. POWER CARD 11PW04-3, 11PW05..8 11. RGB SWITCHING CARD 11RGB30-3......9
12. SERIAL ACCESS CMOS 8K EEPROM 24C08 ...................................................................................................9 13. CLASS AB STEREO HEADPHONE DRIVER TDA1308 ................................................................................... 9 14. SAW FILTERS ......................................................................................................................................................... 9 15. IC DESCRIPTIONS AND INTERNAL BLOCK DIAGRAM ............................................................................. 9

ST92195................................................................................................................................10 STV224X ..............................................................................................................................11 UV1315, UV1316, UV1336,TECC2949PG40B,TAEA-G0XXD ,ChongQing QingJia .....12 TDA7266/TDA7266L ..........................................................................................................14 TDA8174 ..............................................................................................................................15 TDA6107JF ..........................................................................................................................15 MC44608 ..............................................................................................................................16 MSP34X0G ..........................................................................................................................17 24C08....................................................................................................................................18 TDA1308 ..............................................................................................................................19 PI5V330.20 SAW FILTERS .....................................................................................................................21

SERVICE MENU ADJUSTMENTS...........................................................................................................................21 OPTIONS ......................................................................................................................................................................31 GENERAL BLOCK DIAGRAM of 11AK30 ............................................................................................................. 37 CIRCUIT DIAGRAMS................................................................................................................................................38

DO NOT CHANGE ANY MODULE UNLESS THE SET IS SWITCHED OFF The mains supply part of the switch mode power supplys transformer is live. Use an isolating transformer. The receiver complies with the safety requirements. SAFETY PRECAUTIONS: The service of this TV set must be carried out by qualified persons only. Components marked with the warning symbol on the circuit diagram are critical for safety and must only be replaced with an identical component. - Power resistor and fused resistors must be mounted in an identical manner to the original component. - When servicing this TV, check that the EHT does not exceed 26kV. TV set switched off: Make short-circuit between HV-CRT clip and CRT ground layer. Short C809 before changing IC800 and IC801 or other components in primary side of the SMPS part. Measurements: Voltage readings and oscilloscope traces are measured under the following conditions: Antenna signals level is 60dB at the color bar pattern from the TV pattern generator. (100% white, 75% color saturation) Brightness, contrast, and color are adjusted for normal picture performance. Mains supply, 220VAC, 50Hz. PERI-TV SOCKET - The figure of PERI-TV socketSCART 1 PINING 1 Audio right output 0.5Vrms / 1K 2 Audio right input 0.5Vrms / 10K 3 Audio left output 0.5Vrms / 1K 4 Ground AF 5 Ground Blue 6 Audio left input 0.5Vrms / 10K 7 Blue input 0.7Vpp / 75ohm 8 AV switching input 0-12VDC /10K 9 Ground Green 10 11 Green input 0.7Vpp / 75ohm 12 13 Ground Red 14 Ground Blanking 15 Red input 0.7Vpp / 75ohm 16 Blanking input 0-0.4VDC, 1-3VDC / 75 Ohm 17 Ground CVBS output 18 Ground CVBS input 19 CVBS output 20 CVBS input 21 Ground SCART 2 PINING 1 Audio right output 2 Audio right input 3 Audio left output 4 Ground AF 5 Ground Blue 6 Audio left input 7 Blue input 8 AV switching input 9 Ground Green 10 11 12 13 Ground Red 14 Ground Blanking 0.5Vrms / 1K 0.5Vrms / 10K 0.5Vrms / 1K 1Vpp / 75ohm 1Vpp / 75ohm

0.5Vrms / 10K 0-12VDC /10K

15 16 17 Ground CVBS output 18 Ground CVBS input

19 CVBS output 20 CVBS input 21 Ground

1Vpp / 75ohm 1Vpp / 75ohm

1. INTRODUCTION 11AK30 is a 90 chassis capable of driving 20/21 tubes at the appropriate currents. The chassis is capable of operating in PAL, SECAM and NTSC standards. The sound system is capable of giving 5 watts RMS output into a load of 8 ohms. One page, 7 page SIMPLETEXT, TOPTEXT, FASTTEXT and US Closed Caption is also provided. The chassis is equipped with a double-deck 42 pin Scart connector. 2. SMALL SIGNAL PART WITH STV2248: STV2248 video processor is essential for realizing all small signal functions for a color TV receiver. 2.1 Vision IF amplifier3 The vision IF amplifier can demodulate signals with positive and negative modulation. The PLL demodulator is completely alignment-free. Although the VCO (Toko-coil) of the PLL circuit is external, yet the frequency is fixed to the required value by the original manufacturer thus the Toko-coil does not need to be adjusted manually. The setting of the various frequencies (38.9 or 45.75 MHz) can be made via changing the coil itself. 2.2 QSS Sound circuit (QSS versions) The sound IF amplifier is similar to the vision IF amplifier and has an external AGC de-coupling capacitor. The single reference QSS mixer is realised by a multiplier. In this multiplier the SIF signal is converted to the inter-carrier frequency by mixing it with the regenerated picture carrier from the VCO. The mixer output signal is supplied to the output via a high-pass filter for attenuation of the residual video signals. With this system a high performance hi-fi stereo sound processing can be achieved. The AM sound demodulator is realised by a multiplier. The modulated sound IF signal is multiplied in phase with the limited SIF signal. The demodulator output signal is supplied to the output via a low-pass filter for attenuation of the carrier harmonics. The AM signal is supplied to the output via the volume control. 2.3. AM DEMODULATOR The AM demodulated signal results from multiplying the input signal by itself, it is available on AM/FM output. 2.3 FM demodulator and audio amplifier (mono versions): The FM demodulator is realized as narrow-band PLL with external loop filter, which provides the necessary selectivity without using an external band-pass filter. To obtain a good selectivity a linear phase detector and constant input signal amplitude are required. For this reason the intercarrier signal is internally supplied to the demodulator via a gain controlled amplifier and AGC circuit. The nominal frequency of the demodulator is tuned to the required frequency (4.5/5.5/6.0/6.5 MHz) by means of a calibration circuit that uses the clock frequency of the controller/Teletext decoder as a reference. The setting to the wanted frequency is realized by means of the software. It can be read whether the PLL frequency is inside or outside the window and whether the PLL is in lock or not. With this information it is possible to make an automatic search system for the incoming sound frequency. This is realized by means of a software loop that alternate the demodulator to various frequencies, then select the frequency on which a lock

condition has been found. De-emphasis output signal amplitude is independent of the TV standard and has the same value for a frequency deviation of 25 kHz at the 4.5 MHz standard and for a deviation of 50 kHz for the other standards. When the IF circuit is switched to positive modulation the internal signal on de-emphasis pin is automatically muted. The audio control circuit contains an audio switch and volume control. In the mono inter-carrier sound versions the Automatic Volume Leveling (AVL) function can be activated. The pin to which the external capacitor has to be connected depends on the IC version. For the 90 types the capacitor is connected to the EW output pin (pin 20). When the AVL is active it automatically stabilizes the audio output signal to a certain level. 2.4 Video switching The video processor (STV2248C) has three CVBS inputs and two RGB inputs. The first CVBS input is used for external CVBS from SCART 1, the second is used for either CVBS or Y/C from either SCART2 or BAV/FAV, and the third one is used for internal video. The selection between both external video inputs signals is realized by means of software and hardware switches. 2.5 Synchronization circuit The video processor (STV224X) performs the horizontal and vertical processing. The external horizontal deflection circuit is controlled via the Horizontal output pulse (HOUT). The vertical scanning is performed through an external ramp generator and a vertical power amplifier IC controlled by the Vertical output pulse (VOUT). The main components of the deflection circuit are: PLL1: the first phase locked loop that locks the internal line frequency reference on the CVBS input signal. It is composed of an integrated VCO (12 MHz) that requires the chroma Reference frequency (4.43MHz or 3.58MHz crystal oscillator reference signal), a divider by 768, a line decoder, and a phase comparator. PLL2: The second phase locked loop that controls the phase of the horizontal output (Compensation of horizontal deflection transistor storage time variation). Also the horizontal position adjustment is also performed in PLL2. A vertical pulse extractor. A vertical countdown system to generate all vertical windows (vertical synchronization window, frame blanking pulses, 50/60Hz identification window...). Automatic identification of 50/60Hz scanning. PLL1 time constant control. Noise detector, video identification circuits, and horizontal coincidence detector. Vertical output stage including de-interlace function, vertical position control. Vertical amplitude control voltage output (combined with chroma reference output and Xtal 1 indication). 2.6 Chroma and luminance processing: The chroma decoder is able to demodulate PAL, NTSC and SECAM signals. The decoder dedicated to PAL and NTSC sub-carrier is based on a synchronous demodulator, and an Xtal PLL locked on the phase reference signal (burst). The SECAM demodulation is based on a PLL with automatic calibration loop. The color standard identification is based on the burst recognition. Automatic and forced modes can be selected through the I2C bus. NTSC tint, and auto flesh are controlled through I2C bus. Xtal PLL can handle up to 3 crystals to work in PAL M, PAL N and NTSC M for South America. ACC an ACC overload control the chroma sub-carrier amplitude within 26dB range. Both

ACC s are based on digital systems and do not need external capacitor. All chroma filters are fully integrated and tuned via a PLL locked on Xtal VCO signal. A second PLL is used for accurate fine-tuning of the SECAM bell filter. This tuning is achieved during the frame blanking. An external capacitor memorizes the bell filter tuning voltage. A base-band chroma delay-line rebuilds the missing color line in SECAM and removes transmission phase errors in PAL. The base-band chroma delay line is clocked with 6MHz signal provided by the horizontal scanning VCO. The luminance processor is composed of a chroma trap filter, a luminance delay line, a peaking function with noise coring feature, a black stretch circuit. Trap filter and luminance delay lines are achieved with the use of bi-quad integrated filters, autoaligned via a master filter phase locked loop. 2.7 RGB output circuit: The video processor performs the R, G, B processing. There are three sources: 1. Y,U,V inputs (coming from luma part (Y output), and chroma decoder outputs (R-Y, B-Y outputs). 2. External R,G,B inputs from SCART (converted internally in Y,U,V), with also the possibility to input YUV signals from a DVD player, (YUV specification is Y=0.7 V PP , U= 0.7 V PP , V = 0.7V PP for 100% color bar). 3. Internal R,G,B inputs (for OSD and Teletext display) The main functions of the video part are: - Y,U,V inputs with integrated clamp loop, allowing a DC link with YUV outputs, - External RGB inputs (RGB to YUV conversion), or direct YUV inputs, - Y,U,V switches, - Contrast, saturation, brightness controls, - YUV to RGB matrix, - OSD RGB input stages (with contrast control), - RGB switches, - APR function, - DC adjustment of red and green channels, - Drive adjustments (R, G, B gain), - Digital automatic cut-off loop control, - Manual cut-off capability with I2C adjustments, - Half tone, oversize blanking, external insertion detection, blue screen, - Blanking control and RGB output stages. 2.8 -Controller The ST92195 is the micro-controller, which is required for a color TV receiver. ST92195D1 is the version with one page Teletext and ST92195D7 is the one with 7 page Teletext. The IC has the supply voltages of 5 V and they are mounted in PSDIP package with 56 pins. -Controller has the following features Display of the program number, channel number, TV Standard, analogue values, sleep timer, parental control and mute is done by OSD Single LED for standby and on mode indication System configuration with service mode 3 level logic output for SECAM and Tuner band switching
5

3. TUNER Either a PLL or a VST tuner is used as a tuner. UV1316 (VHF/UHF) is used as a PLL tuner. For only PALM/N, NTSC M applications UV 1336 is used as the PLL tuner. UV 1315 (VHF/UHF) is used as a VST Tuner. Channel coverage of UV1316: OFF-AIR CHANNELS CABLE CHANNELS CHANNELS FREQUENCY CHANNELS FREQUENCY RANGE (MHz) RANGE (MHz) E2 to C 48.25 to 82.25 (1) S01 to S08 69.25 to 154.25 E5 to E12 175.25 to 224.25 S09 to S38 161.25 to 439.25 E21 to E69 471.25 to 855.25 (2) S39 to S41 447.25 to 463.25

BAND Low Band Mid Band High Band

(1). Enough margin is available to tune down to 45.25 MHz. (2). Enough margin is available to tune up to 863.25 MHz. Noise Typical Max. Low band : 5dB 9dB Mid band : 5dB 9dB High band : 6dB 9dB Channel Coverage UV1336: Gain Min. Typical Max. All channels : 38dB 44dB 52dB Gain Taper (of-air channels): 8dB

BAND Low Band Mid Band High Band

CHANNELS 2 to D E to PP QQ to 69

FREQUENCY RANGE (MHz) 55.25 to 139.25 145.25 to 391.25 397.25 to 801.25

Noise is typically 6dB for all channels. Gain is minimum 38dB and maximum 50dB for all channels. Channel Coverage of UV1315: OFF-AIR CHANNELS CABLE CHANNELS CHANNELS FREQUENCY CHANNELS FREQUENCY RANGE (MHz) RANGE (MHz) E2 to C 48.25 to 82.25 (1) S01 to S10 69.25 to 168.25 E5 to E12 175.25 to 224.25 S11 to S39 231.25 to 447.25 E21 to E69 455.25 to 463.25 471.25 to 855.25 (2) S40 to S41

BAND Low Band Mid Band High Band

(1). Enough margin is available to tune down to 45.25 MHz. (2). Enough margin is available to tune up to 863.25 MHz.

Noise Low band Mid band High band

Typ. 6dB 6dB 6dB

Max. 9dB 10dB 11dB

Gain Min. Typ. Max. All Channels 38dB 44dB 50dB Gain Taper 8dB (off-air channels)

4. DIGITAL TV SOUND PROCESSOR MSP34X0 The MSP 34x0D is designed to perform demodulation of FM or AM-Mono TV sound. Alternatively, two-carrier FM systems according to the German or Korean terrestrial specs or the satellite specs can be processed with the MSP 34x0D. Digital demodulation and decoding of NICAM-coded TV stereo sound, is done only by the MSP 3410. The MSP 34x0D offers a powerful feature to calculate the carrier field strength which can be used for automatic standard detection (terrestrial) and search algorithms (satellite). 5. SOUND OUTPUT STAGE TDA7266L/TDA7266 TDA7266L is used as the AF output amplifier for mono applications. It is supplied by +12VDC coming from a separate winding in the SMPS transformer. An output power of 5.5W (THD=0.5%) can be delivered into an 8ohm load. TDA7266 is used as the AF output amplifier for stereo applications. It is supplied by +12VDC coming from a separate winding in the SMPS transformer. An output power of 2*5.5W (THD=0.5%) can be delivered into an 8ohm load. 6. VERTICAL OUTPUT STAGE WITH TDA8174A The TDA8174A is a power amplifier circuit for use in 90 and 110 colour deflection systems for 25 to 200 Hz field frequencies, and for 4 : 3 and 16 : 9 picture tubes. 7. TRIPLE VIDEO OUTPUT AMPLIFIER TDA6107JF The TDA6107JF includes three video output amplifiers and is intended to drive the three cathodes of a colour CRT directly. The device is contained in a plastic DIL-bent-SIL 9-pin medium power (DBS9MPF) package, and uses high-voltage DMOS technology. To obtain maximum performance, the amplifier should be used with black-current control. Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. 8. POWER SUPPLY (SMPS) The DC voltages required at various parts of the chassis are provided by an SMPS transformer controlled by the IC MC44608 which is designed for driving, controlling and protecting switching transistor of SMPS. The transformer produces 115V for FBT input, 14V for audio output IC, S+3.3, S+5V and 8V for ST92195. 9. POWER FACTOR CORRECTION Passive components are used for the solution of power factor correction. 10. POWER CARD Power cards are used to supply DC voltages required for DVD box inside AK30 TV. 11PW04-3 card produces +3.3V, +2.5V, +5V DC voltages for DVD boxes.

11. RGB SWITCHING CARD 11RGB30-3 RGB Switching Card is used to switch R_EXT, G_EXT, B_EXT and R_DVDorDVB, G_DVDorDVB, B_DVDorDVB between each other to provide one R_OUT, G_OUT, B_OUT for output. PI5V330 Low On-Resistance Wideband/Video Quad 2-Channel Mux/DeMux IC is used to ensure switching operation. 10. SERIAL ACCESS CMOS 8K EEPROM 24C08 The 24C08 is a 8Kbit electrically erasable programmable memory (EEPROM), organized as 4 blocks of 256*08 bits. The memory is compatible with the IC standard, two wire serial interface which uses a bi-directional data bus and serial clock. 11. CLASS AB STEREO HEADPHONE DRIVER TDA1308 The TDA1308 is an integrated class AB stereo headphone driver contained in a DIP8 plastic package 12. SAW FILTERS Saw filter type: G1975M: K2966M: J1981 : K2958M: K2962M: L9653M: G3967M: G9353M: K3958M: K9356M: K9656M: K3958M: K9356M: M1962M: M3953M: M9370M: Model: PAL B/G MONO PAL SECAM B/G/D/K/I MONO PAL-I MONO PAL-SECAM B/G-D/K (38) MONO PAL-SECAM B/G/D/K/I/L/L MONO SECAM L/L AM MONO (AUDIO IF) PAL-SECAM B/G STEREO (VIDEO IF) PAL-SECAM B/G STEREO (AUDIO IF) PAL-SECAM B/G/D/K/I/L/L STEREO (VIDEO IF) PAL-SECAM B/G/D/K/I STEREO (AUDIO IF) PAL-SECAM B/G/D/K/I/L/L STEREO (AUDIO IF) PAL I NICAM (VIDEO IF) PAL I NICAM (AUDIO IF) PAL M/N NTSC M MONO PAL M/N NTSC M STEREO (VIDEO IF) PAL M/N NTSC M STEREO (AUDIO IF)

13. IC DESCRIPTIONS AND INTERNAL BLOCK DIAGRAM ST92195 STV224X TUNER (UV1315, UV1316, UV1336,TECC2949PG40B,TAEA-G0XXD ,ChongQing QingJia) TDA7266L / TDA7266M TDA8174A TDA6107JF MC44608 MSP34X0D 24C08 TDA1308

 SAW FILTERS G1975M, K2966M, K2962M, L9653M, G3962M, G9353M, K3958M, K9356M, K9656M, K6263K, K9652M, M1962M, M3953M, M9370M ST92195 The ST92195 is a member of the ST9+ family of micro-controllers, completely developed and produced by SGS-THOMSON Microelectronics using a proprietary n-well HCMOS process. The nucleus of the ST92195 is the advanced Core, which includes the Central Processing Unit (CPU), the ALU, the Register File and the interrupt controller. The Core has independent memory and register buses to add to the efficiency of the code. A set of on-chip peripherals form a complete sys-tem for TV set and VCR applications: Voltage Synthesis VPS/WSS Slicer Teletext Slicer Teletext Display RAM OSD Additional peripherals include a watchdog timer , a serial peripheral interface (SPI), a 16-bit timer and an A/D converter.

STV224X Video processor: The STV2246/2247/2248 are fully bus controlled ICs for TV including PIF, SIF, luma, Chroma and deflection processing. Used with a vertical frame booster (TDA1771 or TDA8174 for 90 chassis, STV9306 for 110 chassis), they allow the design of multi-standard (BGDKIMNLL, PAL/ SECAM/NTSC) sets with very few external components and no manual adjustments.

10

UV1315, UV1316, UV1336,TECC2949PG40B,TAEA-G0XXD ,ChongQing QingJia General description of UV1315: The UV1315 tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L, I and I. Features of UV1315: Member of the UV1300 family small sized UHF/VHF tuners Systems CCIR:B/G, H, L, L, I and I; OIRT:D/K Voltage synthesized tuning (VST) Off-air channels, S-cable channels and Hyper-band Standardized mechanical dimensions and pinning PINNING
1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11.

PIN VALUE :4.0V, Max:4.5V :5V, Min:4.75V, Max:5.5V :5V, Min:4.75V, Max:5.5V :5V, Min:4.75V, Max:5.5V :5V, Min:4.75V, Max:5.5V

Gain control voltage (AGC) Tuning voltage High band switch Mid band switch Low band switch Supply voltage Not connected Not connected Not connected Symmetrical IF output 1 Symmetrical IF output 2

Band switching table: Pin 3 0V 0V +5V Pin 4 0V +5V 0V Pin 5 +5V 0V 0V

Low band Mid band High band

General description of UV1316: The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L, I and I. Features of UV1316: Member of the UV1300 family small sized UHF/VHF tuners Systems CCIR: B/G, H, L, L, I and I; OIRT: D/K Digitally controlled (PLL) tuning via IC-bus Off-air channels, S-cable channels and Hyper-band World standardized mechanical dimensions and world standard pinning Complies to CENELEC EN55020 and EN55013

11

PINNING
1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11.

PIN VALUE :4.0V, Max:4.5V :Max:5.5V :Min:-0.3V, Max:5.5V :Min:-0.3V, Max:5.5V :5.0V, Min:4.75V, Max:5.5V :33V, Min:30V, Max:35V

Gain control voltage (AGC) Tuning voltage IC-bus address select IC-bus serial clock IC-bus serial data Not connected PLL supply voltage ADC input Tuner supply voltage Symmetrical IF output 1 Symmetrical IF output 2

General description of UV1336: UV1336 series is developed for reception of channels broadcast in accordance with the M, N standard. Features of UV1336: Global standard pinning Integrated Mixer-Oscillator & PLL function Conforms to CISPR 13, FCC and DOC (Canada) regulations Low power consumption Both Phono connector and F connector are available PINNING
1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11.

PIN VALUE :4.0V, Max:4.5V Max:5.5V :Min:-0.3V, Max:5.5V :Min:-0.3V, Max:5.5V :5.0V, Min:4.75V, Max:5.5V :33V, Min:30V, Max:35V

Gain control voltage Tuning voltage Address select Serial clock Serial data Not connected Supply voltage ADC input (optional) Tuning supply voltage Ground IF output

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TECC2949PG40B SAMSUNG TUNER Features: CCIR standart receiving system Off- air channels ,s-cable channels , 3 band (UHF,VHFhigh and low) PAL FST tuner Tuning system :Frequency synthesized type Pinning: 1- AGC 2- NC 3- SAS 4- SCL 5- SDA 6- NC 7- BP 8- NC 9- BT 10- IF2 11- IF1

AGC Voltage supply No pin Adress select Serial clock Serial data No pin B+ for internal IC No pin Tuning supply voltage IF output2 IF1 output

(Typ:5V

Max:4.5V)

(Min:4.75V Typ:5V (Min:30V Typ:33V

Max.5.5V) Max: 35V)

TAEA-G0XXD LG TUNER Features: CCIR+CATV standart receiving channel Off- air channels ,s-cable channels , 3 band (UHF,VHFhigh and low) Upper heterodyne Receiving system Varactor Tuned(With PLL) Pinning: 1- AGC 2- TU 3- SAS 4- SCL 5- SDA 6- B+ 7- B+ 8- NC 9- BT 10- IF2 11- IF1

AGC Voltage supply Tuning output voltage Adress select Serial clock Serial data No pin B+ for internal IC No pin Tuning supply voltage IF output2 IF1 output

(Typ:5V

Max:4.5V)

(Min:4.75V Typ:5V (Min:30V

Max.5.5V)

Typ:33V Max: 35V)

ChongQing QingJia Electronical Co.Tuner PAL BG Receiving system PLL tuning system Off- air channels ,s-cable channels , 3 band (UHF,VHFhigh and low) Pinning: 1- AGC 2- NC 3- SAS 4- SCL 5- SDA 6- NC 7- BP 8- NC 9- BT 10- IF2 11- IF1

AGC Voltage supply No pin Adress select Serial clock Serial data No pin B+ for internal IC No pin Tuning supply voltage IF output2 IF1 output

(Typ:5V

Max:4.5V)

(Min:4.75V Typ:5V (Min:30V

Max.5.5V)

Typ:33V Max: 35V)

TDA7266/TDA7266L General Description of TDA7266L The TDA7266L is a mono bridge amplifier specially designed for TV and Portable Radio applications. Requires very few external components WIDE SUPPLY VOLTAGE RANGE (3-18V) MINIMUM EXTERNAL COMPONENTS NO SVR CAPACITOR NO BOOTSTRAP NO BOUCHEROT CELLS INTERNALLY FIXED GAIN STAND-BY & MUTE FUNCTIONS SHORT CIRCUIT PROTECTION THERMAL OVERLOAD PROTECTION PINNING 1 2 3 4 5 6 7 8 9 10

N.C. N.C. MUTE ST-BY PW-GND S-GND IN VCC OUT+ OUT -

General Description of TDA7266 The TDA7266 is a 2x7 Watt dual power amplifier. It is used for sound amplification at stereo TV sets. WIDE SUPPLY VOLTAGE RANGE (3-18V) MINIMUM EXTERNAL COMPONENTS NOSWR CAPACITOR NOBOOTSTRAP NOBOUCHEROT CELLS INTERNALLY FIXED GAIN STAND-BY & MUTE FUNCTIONS SHORT CIRCUIT PROTECTION THERMAL OVERLOAD PROTECTION PINNING 1. 2. 3. 4. 5. 6. 7. 8.

OUT1+ OUT1 VCC IN1 N.C. MUTE ST-BY PW-GND

13

9. 10. 11. 12. 13. 14. 15. TDA8174AW

S-GND N.C. N.C. IN2 VCC OUT2 OUT2+

INDEPENDENT VERTICAL AMPLITUDE ADJUSTEMENT. BUFFER STAGE. POWER AMPLIFIER .FLYBACKGENERATOR .THERMALPROTECTION .INTERNAL REFERENCE VOLTAGE DECOU-PLING General Description: TDA8174Aand TDA8174AWare a monolithic integrated circuits. It is a full performance and very efficient vertical deflection circuit intended for direct drive of a TV picture tube in Color and B & W television as well as in Monitor and Data displays. PINNING 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. POWER OUTPUT OUTPUT STAGE Vs TRIGGER INPUT HEIGHT ADJUSTMENT VOLTAGE REF DECOUPLING GROUND RAMP GENERATOR BUFFER OUTPUT INVERTING INPUT Vs FLYBACK GENERATOR

TDA6107JF General Description: The TDA6107JF includes three video output amplifiers and is intended to drive the three cathodes of a colour CRT directly. The device is contained in a plastic DIL-bent-SIL 9-pin medium power (DBS9MPF) package, and uses high-voltage DMOS technology. To obtain maximum performance, the amplifier should be used with black-current control. FEATURES Typical bandwidth of 5.5 MHz for an output signal of 60 V (p-p) High slew rate of 900 V/ms No external components required Very simple application
14

 Single supply voltage of 200 V Internal reference voltage of 2.5 V Fixed gain of 50 Black-Current Stabilization (BCS) circuit with voltage window from 1.8 to 6 V and current window from -100 mA to 10 mA Thermal protection Internal protection against positive flashover discharges appearing on the CRT. PINNING SYMBOL Vi(1) Vi(2) Vi(3) Iom VDD Voc(3) Voc(2) Voc(1) MC44608 General description: The MC44608 is a high performance voltage-mode controller designed for offline converters. This high voltage circuit that integrates the startup current source and the oscillator capacitor, requires few external components while offering a high flexibility and reliability. The device also features a very high efficiency standby management consisting of an effective Pulsed Mode operation. This technique enables the reduction of the standby power consumption to approximately 1W while delivering 300mW in a 150W SMPS. Integrated startup current source Loss less offline startup Direct offline operation Fast startup General Features Flexibility Duty cycle control On chip oscillator switching frequency 40, or 75kHz Secondary control with few external components Protections Maximum duty cycle limitation Cycle by cycle current limitation Demagnetization (Zero current detection) protection Over V CC protection against open loop Programmable low inertia over voltage protection against open loop Internal thermal protection

PIN 1 2 3 5 6 7 8 9

DESCRIPTION inverting input 1 inverting input 2 inverting input 3GND 4 ground (fin) black-current measurement output supply voltage cathode output 3 cathode output 2 cathode output 1

15

GreenLine Controller Pulsed mode techniques for a very high efficiency low power mode Lossless startup Low dV/dT for low EMI radiations PINNING 1. Demagnetization 2. I Sense 3. Control Input 4. Ground 5. Driver 6. Supply voltage 7. No connection 8. Line Voltage PIN VALUE Zero cross detection voltage: 50 mV typ. Over current protection voltage 1V typ. Min: 7.5V Max.: 18V Iout 2Ap-p during scan 1.2Ap-p during flyback Output resistor 8.5 Ohm sink 15 Ohm source typ. Max:16V (Operating range 6.6V-13V) Min:50V Max:500V

MSP34X0D The MSP 34x0D is designed to perform demodulation of FM or AM-Mono TV sound. Two kinds of MSPs are used. MSP 3400D and MSP 3410D. The MSP 3400D is fully pin and softwarecompatible to the MSP 3410D, but is not able to decode NICAM. It is also compatible to the MSP 3400C. General description: Demodulator and NICAM Decoder Section The MSP 34x0D is designed to perform demodulation of FM or AM-Mono TV sound. Alternatively, two-carrier FM systems according to the German or Korean terrestrial specs or the satellite specs can be processed with the MSP 34x0D. Digital demodulation and decoding of NICAM-coded TV stereo sound, is done only by the MSP 3410. The MSP 34x0D offers a powerful feature to calculate the carrier field strength, which can be used for automatic standard detection (terrestrial) and search algorithms (satellite). General Features Two selectable analog inputs (TV and SAT-IF sources) Automatic Gain Control (AGC) for analog IF input. Input range: 0.103 V pp Integrated A/D converter for sound-IF inputs All demodulation and filtering is performed on chip and is individually programmable Easy realization of all digital NICAM standards (B/G, D/K, I & L) with MSP 3410G. FM demodulation of all terrestrial standards (incl. identification decoding) FM demodulation of all satellite standards No external filter hardware is required Only one crystal clock (18.432 MHz) is necessary FM carrier level calculation for automatic search algorithms and carrier mute function DSP Section (Audio Base band Processing) Flexible selection of audio sources to be processed Two digital input and one output interface via I 2 S bus for external DSP processors, featuring surround sound, ADR etc.

16

 Digital interface to process ADR (ASTRA Digital Radio) together with DRP 3510A Performance of all de-emphasis systems including adaptive Wegener Panda 1 without external components or controlling Digitally performed FM identification decoding and de-matrixing Digital base-band processing: volume, bass, treble, 5-band equalizer, loudness, pseudo-stereo, and base-width enlargement Simple controlling of volume, bass, treble, equalizer etc. Analog Section four selectable analog pairs of audio base-band inputs (= four SCART inputs) input level: =<2 V RMS , input impedance: >=25 k one analog mono input (i.e. AM sound): input level: =<2 V RMS , input impedance: >=15 k two high-quality A/D converters, S/N-Ratio: >=85 dB 20 Hz to 20 kHz bandwidth for SCART-to-SCART copy facilities 24C08 General description: The 24C16 is a 8Kbit electrically erasable programmable memory (EEPROM), organized as 4 blocks of 256 * 08 bits. The memory operates with a power supply value as low as 2.5V. Features: Minimum 1 million ERASE/WRITE cycles with over 10 years data retention Single supply voltage:4.5 to 5.5V Two wire serial interface, fully IC-bus compatible Byte and Multi-byte write (up to 8 bytes) Page write (up to 16 bytes) Byte, random and sequential read modes Self timed programming cycle PINNING 1. 2. 3. 4. 5. Write protect enable Not connected Chip enable input Ground Serial data address input/output PIN VALUE :0V :0V :0V :0V :Input LOW voltage: Min:-0.3V, Max:0.3*Vcc :Input HIGH voltage: Min:0.7*Vcc, Max:Vcc+1 :Input LOW voltage: Min:-0.3V, Max:0.3*Vcc :Input HIGH voltage: Min:0.7*Vcc, Max:Vcc+1 :Input LOW voltage: Min:-0.3V, Max:0.5V :Input HIGH voltage: Min:Vcc-0.5, Max:Vcc+1 :Min:2.5V, Max:5.5V

6. Serial clock 7. Multibyte/Page write mode 8. Supply voltage

17

TDA1308 Features: Wide temperature range Excellent power supply ripple rejection Low power consumption Short-circuit resistant High performance high signal-to-noise ratio low distortion PINNING 1. 2. 3. 4. 5. 6. 7. 8. Output A (Voltage swing) Inverting input A Non-inverting input A Ground Non-inverting input B Inverting input B Output B (Voltage swing) Positive supply PIN VALUE :Min:0.75V, Max:4.25V :Vo(clip):Min:1400mVrms :2.5V :0V :2.5V :Vo(clip):Min:1400mVrms :Min:0.75V, Max:4.25V :5V, Min:3.0V, Max:7.0V

PI5V330 Description Pericom Semiconductors PI5V330 is a true bidirectional Quad 2-channel multiplexer/demultiplexer recommended for both RGB and composite video switching applications. The video switch can be driven from a current output RAMDAC or voltage output composite video source. Low On-Resistance and wide bandwidth make it ideal for video and other applications. Also this device has exceptionally high current capability which is far greater than most analog switches offered today. A single 5V supply is all that is required for operation. The PI5V330 offers a high-performance, low-cost solution to switch between video sources. The application section describes the PI5V330 replacing the HC4053 multiplier and buffer/amplifier. Features High-performance solution to switch between video sources Wide bandwidth: 200 MHz Low On-Resistance: 3 Low crosstalk at 10 MHz: 58dB Ultra-low quiescent power (0.1 typical) A Single supply operation: +5.0V Fast switching: 10ns High-current output: 100mA Packaging (Pb-free & Green Available): 16-pin 300-mil wide plastic SOIC (S)

18

 16-pin 150-mil wide plastic SOIC (W) 16-pin 150-mil wide plastic QSOP (Q)

Saw filters list:

PAL BG PSBG DK PAL II' PSBGDKK' II' PSBGDKK' LL'

VIDEO G1975M K2966M J1981 K2966M K2962M VIDEO G3967M K3958M K3958M K3958M

AUDIO

MONO

L9653 AUDIO G9353M K9356 K9356 K9656

PAL BG PAL II' PSBGDKK' II' PSBGDKK' LL'

STR

19

PINNING 1. Input 2. Input-ground 3. Chip carrier-ground 4. Output 5. Output K9656M, L9653M PINNING 1. Input 2. Switching Input 3. Chip carrier-ground 4. Output 5. Output

AK30 SERVICE MENU ADJUSTMENTS

ENTERING TO SERVICE MENU: In order to enter service menu, first enter the main menu and then press the digits 4, 7, 2 and 5 respectively. To select adjust parameters, use or buttons. To change the selected parameter, use or buttons. Selected parameter will be highlighted. Entire service menu parameters of AK30 CHASSIS are listed below. For some of parameters the default values are given in this document also. USING COLOUR BUTTONS ON SERVICE MENU: OSD: Select OSD parameter on service menu. Adjust the horizontal position of OSD to the middle of screen, by using the reference bar on bottom of service menu. Min. Value: Max. Value: Recommended Value: 000 127 080 RED BUTTON : It switches the AVL to ON or OFF mode on service menu. AVL word is visible on service menu when AVL is on. GREEN BUTTON : It switches to GEOMETRY adjust menu. Geometry of the picture is adjusted in this menu. YELLOW BUTTON : It switches to VERTICAL SCAN DISABLE mode. It is useful to adjust screen voltage. BLUE BUTTON : It is used to adjust AGC and IF automatically on service menu.

20

IF Adjustments: IF1: IF2: IF3: IF4: IF Coarse Adjustment IF Fine Adjustment IF Coarse Adjustment for L-prime IF Fine Adjustment for L-prime 003 073 004 065

IF NEGATIVE ADJUSTMENT (WITHOUT L SYSTEMS) Set the video pattern to a PAL colour bar pattern with frequency 38.9 MHz. Apply this IF signal to PIN-10 and PIN-11 of tuner. Press PROG-1 and after that BLUE (INSTALL)button from remote controller. Select the standard as BG or I. (if BG is not available) Enter service menu. Select IF1 parameter from service menu and press BLUE (INSTALL) button from remote controller. IF adjustment will be done automatically by software. See the IF indicator on service menu, it must be like on FIGURE-1 shown belove. IF POSITIVE ADJUSTMENT (WITH L SYSTEMS) Set the video pattern to a SECAM-L colour bar pattern with frequency 33.9 MHz. Apply this IF signal to PIN-10 and PIN-11 of tuner. Press PROG-1 and after that BLUE (INSTALL)button from remote controller. Select the BAND VHF-1 (S1 S4 for PLL tuners) and standard as L. Enter service menu. Select IF1 parameter from service menu and press BLUE (INSTALL) button from remote controller. IF adjustment will be done automatically by software. See the IF indicator on service menu, it must be like on FIGURE-1 shown below.

AGC: Automatic Gain Control

In order to do AGC adjustment, enter a 60dBV RF signal level from channel C-12 (224.25 MHz) Select AGC parameter from service menu. Press BLUE (INSTALL) button from remote controller. The adjustment will be done automatically by software. See the AGC indicator on service menu, it must be 1. Check that picture is normal at 90dBV signal level.

OSD001 IF1071 IF2073 IF3065 IF4066 AGC060 VLIN040 RGBH+10 : 0 1

:
IF INDICATOR
FIGUREAVL

1
AGC INDICATOR

1
NONE

21

Min. Value: Max. Value: Recommended Value:

000 063 Automatically, described above.

SCREEN ADJUSTMENT: (FBT Screen)

SCREEN ADJ.POT.

Enter service menu by pressing MENU and 4, 7, 2, 5 or press the mute and info buttons at the same time from remote controller. Then press yellow button to disable vertical scan. Adjust horizontal line via screen pot. as thin as possible. Press yellow button again to enable vertical scan. Press TV button to leave service menu. VLIN: Vertical Linearity Enter a PAL B/G circle test pattern via RF. Change VLIN till you see circle as round as possible.

22

Min. Value: Max. Value: Recommended Value : RGBH: RGB Mode Horizontal Shift Offset

000 063 035

Enter a RGB circle test pattern via video inputs. Force the TV to RGB mode by pressing AV button from remote controller. Change RGB Horizontal Position till the picture is horizontally centered. Check and readjust RGBH item if the adjustment becomes improper after some other geometric adjustments are done. Min. Value: Max. Value: Default Value : VSOF: Vertical Size Offset for 60 Hz Enter an NTSC-M circle test pattern via RF or video inputs. Change Vertical Size until the checkered parts of test pattern on both of upper and lower side disappear. Check and readjust Vertical Size item if the adjustment becomes improper after some other geometric adjustments are done. Min. Value: Max. Value: Recommended Value: VPOF: Vertical Position Offset for 60 Hz Enter an NTSC-M circle test pattern via RF or video inputs. Change Vertical Position till the picture is vertically centered. Check and readjust Vertical Size item if the adjustment becomes improper after some other geometric adjustments are done. Min. Value: Max. Value: Recommended Value: HSOF: Horizontal Size Offset for 60 Hz Not Used For This Model -08 +55 +09 -08 +55 -16 000 063 007

23

HPOF: Horizontal Position Offset for 60 Hz Enter an NTSC-M circle test pattern via RF or video inputs. Change Horizontal Position till the picture is horizontally centered. Check and readjust Horizontal Position item if the adjustment becomes improper after some other geometric adjustments are done.

Min. Value: Max. Value: Recommended Value : HTOF: Horizontal Trapezoid Offset for 60 Hz Not Used For This Model. GEOMETRY MENU

-08 +55 -06

From the service menu by pressing the green button, geometry menu appears. To select geometry adjust parameters, use or buttons. To change the selected parameter, use or buttons. Selected parameter will be highlighted. Entire geometry menu parameters of AK30 CHASSIS are listed below. VSIZ: Vertical Size for 50 Hz Enter a PAL B/G circle test pattern via RF. Change VSIZ (Vertical Size) until horizontal black lines on both the upper and lower part of the test pattern become very close to the upper and lower horizontal sides of picture tube and nearly about to disappear. Check and readjust Vertical Size item if the adjustment becomes improper after some other geometric adjustments are done. Min. Value: Max. Value: Recommended Value for 4:3 mode Recommended Value for 16:9 mode VPOS: Vertical Position for 50 Hz Enter a PAL B/G circle test pattern via RF. Change Vertical Position till the test pattern is vertically centered. Horizontal line at the center pattern is in equal distance both to upper and lower side of the picture tube. Check and readjust Vertical Position item if the adjustment becomes improper after some other geometric adjustments are done. 000 063 030 063

24

Min. Value: Max. Value: Recommended Value for 4:3 mode Recommended Value for 16:9 mode VSCO: Vertical S-Correction for 50 Hz Not Used For This Model. VCCO: Vertical Corner Correction for 50 Hz Not Used For This Model. HSIZ: Horizontal Size for 50 Hz Not Used For This Model. HPOS: Horizontal Position for 50 Hz

000 063 014 020

Enter a PAL B/G circle test pattern via RF. Change Horizontal Position until the picture is horizontally centered. Check and readjust Horizontal Position item if the adjustment becomes improper after some other geometric adjustments are done. Min. Value: Max. Value: Recommended Value for 4:3 mode Recommended Value for 16:9 mode HPIN: Horizontal Pincushion for 50 Hz Not Used For This Model. HCCO: Horizontal Corner Correction for 50 Hz Not Used For This Model. HTRP: Horizontal Trapezoid for 50 Hz Not Used For This Model. VZSZ: Vertical Zoom Size for 50 Hz Not Used For This Model. 000 063 032 033

25

50 HZ. 4:3 GEOMETRY ADJ.

60 HZ. 4:3 GEOMETRY ADJ.

50 HZ. 16:9 GEOMETRY ADJ.

WHITE BALANCE ADJUSTMENT The following three parameters are used to make white balance adjustment. To do this, use a Colour Analyzer. Using WR (White point adjust for RED), WG (White point adjust for GREEN), WB (White point adjust for BLUE) parameters, insert the + sign in the square which is in the middle of the screen. WR: White Point Adjustment for RED Use this parameter to set the strength of RED in White. Min. Value: Max. Value: Default Value : WG: White Point Adjustment for GREEN Use this parameter to set the strength of GREEN in White. Min. Value: 000 000 063 030

26

Max. Value: Default Value : WB: White Point Adjustment for BLUE

063 018

Use this parameter to set the strength of BLUE in White. Min. Value: Max. Value: Default Value : BR: Bias for RED Use this parameter to set the strength of RED in BLACK. Min. Value: Max. Value: Default Value : BG: Bias for GREEN Use this parameter to set the strength of GREEN in BLACK. Min. Value: Max. Value: Default Value : 000 063 031 000 063 031 000 063 020

APR: Automatic RGB Peak Regulation (APR) Threshold The goal of the APR function (Automatic RGB peak regulation) is to compensate the spread of contrast between sources or programs by regulating the peak amplitude of RGB signals. This results in a picture with higher contrast whatever the input signal amplitude. Besides, APR increases the contrasts of pictures with low contrast and avoids the clipping at RGB output for pictures with high amplitude.

To enable APR, refer to OP3 in Option Bytes. Min. Value: Max. Value: Default Value : 000 015 006

The following default values are the factory settings of the corresponding items. Except Volume, all values are restored when STANDARD button is pushed during no menu is displayed. Volume is set to its default value only if the A.P.S. bit is set when the TV is turned on.

27

AVL: Automatic Volume Control In order to make AVL ON or AVL OFF, press the RED button while in service menu. If AVL is ON, the AVL string occurs on the bottom right of the service menu screen. If AVL is OFF, no string occurs about AVL on the bottom of the service menu. FMP1: FM Prescaler when AVL is OFF

Min. Value: Max. Value: Recommended Value: NIP1: NICAM Prescaler when AVL is OFF

000 127 009

Min. Value: Max. Value: Recommended Value: SCP1: SCART Prescaler when AVL is OFF

000 127 021

Min. Value: Max. Value: Recommended Value: SEC1: SECAM Prescaler when AVL is OFF Min. Value: Max. Value: Recommended Value: FMP2: FM Prescaler when AVL is ON Min. Value: Max. Value: Recommended Value: NIP2: NICAM Prescaler when AVL is ON Min. Value: Max. Value:

000 127 008

000 127 008

000 127 016

000 127

28

Recommended Value: SCP2: SCART Prescaler when AVL is ON Min. Value: Max. Value: Recommended Value: SEC2: SECAM Prescaler when AVL is ON

018

000 127 017

Min. Value: Max. Value: Recommended Value:

000 127 000

29

ELEKTRONK SAN. VE TC. A.. UMB

Tuner Settings APPLICATION ENGINEERING

DEPARTMENT

Rev No : Date Page : :

00 02.11.05 1

Tuner Settings

Ana Tuner PHILIPS UV1316S MK3

B1 H -F1H VHF HIGH crossover high byte 0000 1100 0C 12 0000 1001 09 9 0000 1101 0D 13 0000 1011 0B 11 0000 1011 0B 11 0000 1011 0D 13 0000 1011 0B 11 0000 1011 0B 11

B1 L-F1L VHF LOW crossover low byte 0011 0010 32 32 1001 0010 92 146 0001 0010 12 18 0101 0010 52 82 1100 0010 C2 44 1100 0010 C2 44 0101 0010 52 82 0101 0010 52 82

B2 H -F2H UHF high crossover high byte 0001 1110 1E 30 0001 1011 1B 27 0001 1110 1E 30 0001 1101 1D 29 0001 1100 1C 28 0001 1101 1D 29 0001 1101 1D 29 0001 1101 1D 29

B2 L -F2L UHF low crossover low byte 0000 0010 02 2 1000 0010 82 130 1000 0010 82 130 0000 0010 02 2 1111 0010 F2 242 0000 0010 02 2 0000 0010 02 2 0000 0010 02 2

BS1 control 2 low byte 0000 0001 01 1 0000 0011 03 3 0000 0001 01 1 0000 0001 01 1 0000 0001 01 1 0000 0001 01 1 0000 0001 01 1 0000 0001 01 1

BS2 control 2 mid byte 0000 0010 02 2 0000 0110 06 6 0000 0010 02 2 0000 0010 02 2 0000 0010 02 2 0000 0010 02 2 0000 0010 02 2 0000 0010 02 2

BS3 control 2 high byte 0000 0100 04 4 1000 0101 85 133 0000 1000 08 8 0000 1000 08 8 0000 1000 08 8 0000 1000 08 8 0000 1000 08 8 0000 1000 08 8

CB control 1 byte 1000 1110 8E 142 1000 1110 8E 142 1000 1110 8E 142 1000 1110 8E 142 1000 1110 8E 142 1000 1110 8E 142 1000 1110 8E 142 1000 1110 8E 142
Form No: DENEME

THOMSON CTT5510A

SAMSUNG TECC2949PG35B

ALPS TEDE9X226A

ALPS TEDE-004A

ALPS TEDE 9X313A

SAMSUNG TECC2949PG40B

LG-INNOTEK(TAEM-G081D) LG TAEM G-041D

Form Rev No: 00

Ref No :
ELEKTRONK SAN. VE TC. A..

UMB

TECHNICAL REPORT APPLICATION ENGINEERING

0000 1100 0C 12 0000 1011 0B 11 0000 1011 0B 11 0000 1011 0B 11 0000 1001 09 9 0000 1011 0B 11 00001011 0B 11 0000 1100 0C 12 0011 0010 32 32 0101 0010 52 82 0101 0010 52 82 0101 0010 52 82 1001 0010 92 146 0111 0010 72 114 01010010 52 82 0011 0010 32 32 0001 1110 1E 30 0001 1101 1D 29 0001 1101 1D 29 0001 1101 1D 29 0001 1011 1B 27 0001 1101 1D 29 00011101 1D 29 0001 1110 1E 30 0000 0010 02 2 0000 0010 02 2 0000 0010 02 2 0000 0010 02 2 1000 0010 82 130 0011 0010 32 50 00000010 02 2 0000 0010 02 1 0000 0001 01 1 0000 0010 02 2 0000 0001 01 2 0000 0001 01 2 0000 0011 03 3 0000 0001 01 1 00000001 01 1 0000 0001 01 2 0000 0010 02 2 0000 0001 01 1 0000 0010 02 1 0000 0010 02 1 0000 0110 06 6 0000 0010 02 2 00000010 02 2 0000 0010 02 1

Date Page

: :

02.11.05 2 1000 1110 8E 142 1000 1110 8E 142 1000 1110 8E 142 1000 1110 8E 142 1000 1110 8E 142 1000 1110 8E 142 10001110 8E 142 1000 1110 8E 142

PHILIPS MK4

0000 0100 04 4 0000 0100 04 4 0000 1000 08 8 0000 1000 08 4 1000 0101 85 133 0000 1000 08 8 00001000 08 8 0000 0100 04 4

Thomson CTF5550

Panasonc PLL ( ENV57K02G3 )

QINGJIA AFT0/5105 (KONKA)

Golden Dragon EWT-5F3N2-E28FW

THOMSON CTF5540

GDC EWT-5F3TA2-E02W

TCL F01GP-2BP-E ( 30042772 )

Form Rev No: 00

Form No: DENEME

Ref No :
ELEKTRONK SAN. VE TC. A..

UMB

TECHNICAL REPORT APPLICATION ENGINEERING

Date Page

: :

02.11.05 3

Tuner Settings ( NTSC 60 Hz )

Ana Tuner PHILIPS UV1336A SAMSUNG TECC1040SG32K SAMSUNG TECC1940PG38W F1H 8 7 7 F1L 180 244 244 F2H 24 22 22 F2L 116 148 148 BS1 1 1 1 BS2 2 2 2 BS3 4 8 8 CB 142 142 142

Form Rev No: 00

Form No: DENEME

ELEKTRONK SAN. VE TC..A..

SERVS VE OPSIYON AYARLARI

(SERVICE & OPT. SETTINGS)

DKMAN NO : TARH : DE. NO:

04.UMB.13b
SAYFA NO :

10 / 15

UMB BLM

83

DE. TAR :

31.08.2006

AK30 (T3X) STANDARD TV

OP1 SCART OPTIONS
BIT-7 BIT-6 1, Wide Line Blanking is active. 0, Wide Line Blanking is inactive. 1 Display AV-3 as F-AV 0 Display AV-3 as B-AV 1 Turn back TV mode after the last AV (with AV key) 0 Turn back first AV mode after the last AV 1 SVHS is available in AV key stream 0 SVHS is NOT available in AV key stream 1 RGB is available in AV key stream 0 RGB is NOT available in AV key stream 1 AV-3 is available in AV key stream 0 AV-3 is NOT available in AV key stream 1 AV-2 is available in AV key stream 0 AV-2 is NOT available in AV key stream BIT-0 1 AV-1 is available in AV key stream 1 If SCART-1 is available DESCRIPTION PAL, PAL, W/O 3.58 W 3.58 BIT-6 11, 2 XTAL PAL/SEC/NTSC 4.43/3.58 BIT-5 1 Enable Blue back when no signal in AV modes 0 No Blue Back in AV modes BIT-4 BIT-3 BIT-2 1 White Insertion is ON 0 White Insertion is OFF 1 Blue Background when no signal 0 Disable Blue Background 1 Semi-transparent background for menu Value should be 1 Value should be 1 Value should be 1 PAL VE SECAM W 3.58 Value should be 1 BIT-0

DESCRIPTION
1 default value FAV IN or BAV IN selection option 1 default value

OP2 TV STANDART OPTIONS

BIT-7 BIT-6 1 3-button keyboard (V-, P+, V+) 0 4/5 button keyboard (V-, V+, P-, P+, Menu) 1 L/L is available 0 L/L is not available 1 I is available 0 I is not available 1 DK is available 0 DK is not available 1 BG is available 0 BG is not available 1 DOLBY VIRTUAL is visible 0 3D PANORAMA is visible 1 for SECAM LLP ,EXT MONO INPUT is available 0 inner demodulation is avaible for SECAM LLP 0 for SEC L/L mono, inner demod. Of MSP 1 LOW POWER is available

DESCRIPTION
Value should be 0

BIT-5

BIT-5

BIT-4 BIT-3 BIT-2

1 If AV2 or SVHS is available 1 If AV1 available 1 If FAV IN or BAV IN is available 1 If SCART-2 is available

BIT-4 BIT-3 BIT-2

1 for virtual dolby model 0 for 3D panorama and other models Value should be 0 Value should be 1 AIKLAMA

BIT-1

BIT-1

OP3 VIDEO OPTIONS

Xtal Configuration 00, 1 XTAL PAL 4.43 BIT7,6 01, 2 XTAL PAL/NTSC 4.43/3.58 10, 1 XTAL PAL/SEC/NTSC 4.43

OP4 TV ZELLKLER
BIT-7 1 Headphone is available (for STEREO models) 0 Headphone is not available 1, Arabic/Persian is Available in Menu Languages (for A, D, E, F, and later) 0, Arabic/Persian is NOT Available in Menu Languages 1, Hebrew is Available in Menu Languages (for A, D, E, F, and later) 0, Hebrew is NOT Available in Menu Languages 1 Hotel Mode can be activated BIT-4 BIT-3 BIT-2 0 Hotel Mode can not be activated 1 No Signal Timer is enabled 0 No Signal Timer is disabled For PLL Tuner 1, Frequency based search

PAL and SECAM W/O 3.58

BIT-5

It is visible in the menu after pressing Men-1-3-2-5. Value should be 1 Value should be 0

Form Rev No: 01

Form No: 04.UMB.13b

ELEKTRONK SAN. VE TC..A..

SERVS VE OPSIYON AYARLARI

(SERVICE & OPT. SETTINGS)
0, Channel table based search (No meaning for VST Tuner) 1, 3-band tuning (VHF1, VHF3, UHF) BIT-1 BIT-0 0, 1-band tuning (only UHF) 1 Extra 200 msec blanking for VST 0 no-extra blanking

DKMAN NO : TARH : DE. NO:

04.UMB.13b
SAYFA NO :

11 / 15

UMB BLM
0 Solid Menu background for menu BIT-1 BIT-0 1 Black Stretch is ON 0 Black Stretch is OFF 1 APR is ON 0 APR is OFF

83

DE. TAR :

31.08.2006

Value should be 0 Value should be 1

Value should be 1 Value should be 1

OP5 CHANNEL TABLE OPTIONS

BIT-7 1 Extra 150msec.blanking for VST (op4 b0 "1" ise), to SECAM color problem) 0 no-extra blanking BIT-6

DESCRIPTION
" Value should be 0

TX1 TELETEXT AND uCONTROLLER OPTIONS

BIT-7 1, Auto APS after Stand-By 0, no APS after Stand-By 1 ASD (Auto Sound Detection ) is available BIT-6 0 ASD is not available Teletext Language Groups 000, Group 1 West (English, French, Swedish,Czech, German, Portuguese, Italian, Rumanian) 001, Group 2 West/East (Polish, French, Swedish, Czech, German, Serbian, Italian, Rumanian) 010, Group 3 West/Turkish (English, French, Swedish, Turkish, German, Portuguese, Italian, Rumanian) 011, Group 4 East/Cyrillic BIT-5, 4, 3 (English, Cyrillic, Swedish, Czech, German, Serbian, Lettish, Rumanian) 100,Group 5 --Arabic (English,French,Swedish,Turkish,German,Hebrew,Itali en, Arabic) 101,Group 6 - West/Greek (English,French,German,Swedish,Dannish,Norwegian, Serbian,Croatian,Lettish,Litvanian, Greek) 110,Group 7- West/Cyrillic (WEST-LET/RUS/UKR) (English,German,Swedish,Dannish,Norwegian,Finnish, Russian,Ukranian,Bulgarian,Lettish, Litvanian,Greek) 111, AUTO Mode. One of the 7 group is selected automatically related to the menu language. 101, OSDEPROM M6 R BIT-2, 1, 0 110, ROM M6 P 111, Read Auto Gain Table for device from EEPROM

DESCRIPTION

BIT-5

1, Programme item in AUTOSTORE menu is visible Value should be 1 0, Programme item in AUTOSTORE menu is invisible 1, Force both channel on even no carrier ( carrier mute disable ) Value should be 1, 0, Default value after reset

Value should be 1

1, French OS Channel Table is available BIT-4 0, French OS Channel Table is not available Value should be 1

1, French Channel Table is available BIT-3 0, French Channel Table is not available 1, England Channel Table is available BIT-2 0, England Channel Table is not available BIT-1 1, East Europe Channel Table is available 0, East Europe Channel Table is not available 1, West Europe Channel Table is available BIT-0 0, West Europe Channel Table is not available Value should be 1 Value should be 1 Value should be 1 Value should be 1

It is used with OTP models. MASK PXX Series MASK OBX Series (It is written on IC) Form No: 04.UMB.13b

Form Rev No: 01

ELEKTRONK SAN. VE TC..A..

SERVS VE OPSIYON AYARLARI

(SERVICE & OPT. SETTINGS)
DESCRIPTIONS
SW T3X323 active. It is 1 if SVHS connector is available

DKMAN NO : TARH : DE. NO:

04.UMB.13b
SAYFA NO :

12 / 15

UMB BLM
GEOM GEOMETRY OPTIONS
BIT-7 BIT-6 BIT-5 BIT-4 BIT-3 BIT-2 BIT-1 1 DYNAMIC BASS is active 0 - DYNAMIC BASS is inactive 1 - SVHS audio input in FAV / BAV in 0 - SVHS in AV2 1 - AK37 adjustment values are valid 0 - AK30 adjustment values are valid 1 - ZOOM Mode is available 0 - ZOOM Mode is not available 1 - SUBTITLE Mode is available 0 - SUBTITLE Mode is not available 1 - CINEMA Mode is available 0 - CINEMA Mode is not available 1 - 14 / 9 Mode is available 0 - 14 / 9 Mode is not available 1 - Tube Format is 16 / 9 0 - Tube format is 4 / 3

83

DE. TAR :

31.08.2006

OPT8 PIP OPTIONS

BIT-7 BIT-6 BIT-5 BIT-4 BIT-3 BIT-2 BIT-1 1 - DVD is available 0 - DVD is not available 1-Install mensnde Wide mode seenei kacak. (Only mono models) 0-Install mensnde Wide mode olmayacak. 1, WHITE_INSERTION_FORCED is available 0, WHITE_INSERTION_FORCED is not available 1, AVL_DECAY_TIME_CHANGE is available 0, AVL_DECAY_TIME_CHANGE is not available 1, RGB_PEAK_LIMITATION is available 0, RGB_PEAK_LIMITATION is not available

DESCRIPTIONS
It is set according to DI settings

Value should be 0

Value should be 0 Value should be 0 Value should be 0

1, SOUND follower is available 0, SOUND follower is not available

1, Teletext is available

0, Teletext is not available

1, PanEu IDTV

BIT-0

BIT-0

0, UK IDTV

Form Rev No: 01

Form No: 04.UMB.13b

GENERAL BLOCK DIAGRAM of 11AK30 L

PLL/VST TUNER UV1315/1316 R MSP 34X0D/G STEREO SOUND AU. AMP

IC QSS
SERVICE CONNECTOR NVM

HP. AMP. TDA1308

TDA7266/7266L

MONO
RGB AMP

CRT

KEYPAD

ST92195 MICRO CONTROLLER IF

TDA5112A STV2248C VIDEO PROCESSOR

VER AMP

IR SENSOR

TDA8174AW
VIDEO SWITCHING CIRCUITS

SMPS

115V +12V AUD.

MC 44608

+8V +5V +5V St-by

SCART2 SCART1 FAV/BAV SVHS

DVD BOX 11PW04-3 CARD

HORIZONTAL DRIVE BU808DF

FBT

37

CIRCUIT DIAGRAMS OF 11AK30

11RGB30-3

POWER CARD 11PW04-3

AK30A14

AK30S-1

DVD7500
AK30 TVDVD DVD MODULE Hardware Specification

1. GENERAL DESCRIPTION 1.1 MT1389D The MT1389D Progressive Scan DVD-Player Combo Chip is a single-chip MPEG video decoding chip that integrates audio/video stream data processing, TV encoder, four video DACs with Macrovision. copy protection, DVD system navigation, system control and housekeeping functions. The features of this chip can be listed as follows: General Features: Integrated NTSC/PAL encoder. DVD-Video, VCD 1.1, 2.0, DIVX 3.x, 4.x, 5.1,DIVX PRO, X-VID and SVCD Unified track buffer and A/V decoding buffer. Direct interface of 32-bit SDRAM. Servo controller and data channel processing. Video Related Features: Macrovision 7.1 for NTSC/PAL interlaced video. RGB outputs. 8-bit CCIR 601 YUV 4:2:2 output. Decodes MPEG video and MPEG2 main profile at main level. Maximum input bit rate of 15Mbits/sec Audio Related Features: Dolby Digital (AC-3) and Dolby Pro Logic. Dolby Digital S/PDIF digital audio output. CD-DA. MP3. 1.2 MEMORY 1.2.1 SDRAM Memory Interface The MT1389D provides a glueless 16-bit interface to DRAM memory devices used as OSD, MPEG stream and video buffer memory for a DVD player. The maximum amount of memory supported is 16 MB of Synchronous DRAM (SDRAM). The memory interface is configurable in depth to support 110-Mb addressing. The memory interface controls access to both external SDRAM memories, which can be the sole unified external read/write memory acting as program and data memory as well as various decoding and display buffers. 1.3 DRIVE INTERFACES The MT1389D supports the DV34 interface, and other RF and servo interfaces used by many types of DVD loaders. These interfaces meet the specifications of many DVD loader manufacturers.

89

2. SYSTEM BLOCK DIAGRAM and MT1389D PIN DESCRIPTION 2.1 MT1389D PIN DESCRIPTION

90

91

92

93

94

95

96

97

98

2.1 SYSTEM BLOCK DIAGRAM A sample system block diagram for the MT1389D DVD player board design is shown in the following figure:

3. AUDIO OUTPUT The MT1389D supports two-channel and six-channel analog audio output. In a system configuration with six analog outputs, the front left and right channels can be configured to provide the stereo (2 channel) outputs and Dolby Surround, or the left and right front channels for a 5.1 channel surround system. The MT1389D also provides digital output in S/PDIF format. The board supports both optical and coaxial SPDIF outputs. 4. AUDIO DACS The MT1389D supports several variations of an I2S type bus, varying the order of the data bits (leading or no leading zero bit, left or right alignment within frame, and MSB or LSB first) is possible using the MT1389D internal configuration registers. The I2S format uses four stereo data lines and three clock lines. The I2S data and clock lines can be connected directly to one or more audio DAC to generate analog audio output. The two-channel DAC is internal. The six channel DAC is PCM1606. The outputs of the DACs are not differential. The buffer circuits use National LM833 op-amps to perform the low-pass filtering and the buffering.

99

5 .VIDEO INTERFACE 5.1 Video Display Output The video output section controls the transfer of video frames stored in memory to the internal TV encoder of the MT1389D. The output section consists of a programmable CRT controller capable of operating either in Master or Slave mode. The video output section features internal line buffers which allow the outgoing luminance and chrominance data to match the internal clock rates with external pixel clock rates, easily facilitating YUV4: 2:2 to YUV4: 2:0 component and sample conversion. A polyphase filter achieves arbitrary horizontal decimation and interpolation. Video Bus The video bus has 8 YUV data pins that transfer luminance and chrominance (YUV) pixels in CCIR601 pixel format (4:2:2). In this format, there are half as many chrominance (U or V) pixels per line as luminance (Y) pixels; there are as many chrominance lines as luminance. Video Post-Processing The MT1389D video post-processing circuitry provides support for the color conversion, scaling, and filtering functions through a combination of special hardware and software. Horizontal upsampling and filtering is done with a programmable, 7-tap polyphase filter bank for accurate non-integer interpolations. Vertical scaling is achieved by repeating and dropping lines in accordance with the applicable scaling ratio. Video Timing The video bus can be clocked either by double pixel clock and clock qualifier or by a single pixel clock. The double clock typically is used for TV displays, the single for computer displays. 6. FLASH MEMORY The decoder board supports 70ns Flash memories. FLASH_512K_8b The MT1389D permits 8- bit common memory I/O accesses. 7. SERIAL EEPROM MEMORY An I2C serial EEPROM is used to store user configuration (i.e. language preferences, speaker setup, etc.) and software configuration.. Industry standard EEPROM range in size from 1kbit to 256kbit and share the same IC footprint and pinout. The default device is 2kbit, 256kx 8, SOIC8 SGS Thomson ST24C02M1 or equivalent. 8. AUDIO INTERFACE AUDIO SAMPLING RATE AND PLL COMPONENT CONFIGURATION The MT1389D audio mode configuration is selectable, allowing it to interface directly with low-cost audio DACs and ADCs. The audio port provides a standard I2S interface input and output and S/PDIF (IEC958) audio output. Stereo mode is in I2S format while six channels Dolby Digital (5.1 channel) audio output can be channeled through the S/PDIF. The S/PDIF interface consists of a bi-phase mark encoder, which has low skew. The transmit I2S interface supports the 112, 128, 192, 256, 384, and 512 sampling frequency formats, where sampling frequency Fs is usually 32 kHz, 44.1 kHz, 48 kHz, 96 kHz, or 192 kHz. The audio samples for the I2S transmit interface can be 16, 18, 20, 24, and 32-bit samples. For Linear PCM audio stream format, the MT1389D supports 48 kHz and 96 kHz. Dolby Digital audio only supports 48 kHz. The MT1389D incorporates a built-in programmable analog PLL in the device architecture in order to generate a master audio clock. The MCLK pin is for the audio DAC clock and can either be an output from or an input to the MT1389D. Audio data out (TSD) and audio

100

frame sync (TWS) are clocked out of the MT1389D based on the audio transmit bit clock (TBCK). Audio receive bit clock (RBCK) is used to clock in audio data in (RSD) and audio receive frame sync (RWS). 10. CONNECTORS CON1: POWER CONNECTOR PINS 1 2 3 4 5 6 DESCRIPTION +12V GND GND +3V3 +3V3 +5V

J2 : UART CONNECTOR PINS 1 2 3 4 5 6 DESCRIPTION GND ------------VCC IRQ

J5 : VIDEO AND AUDIO SOCKET PINS 1 2 3 4 5 6 7 8 9 10 11 DESCRIPTION CVBS_ST R/V G/Y B/U GND C_RGB_SWITCH C_FS GND FL FR VCC

101

P4: S/PDIF DIGITAL AUDIO SOCKET PINS 1 2 3 DESCRIPTION S/PDIF -----GND

SOFTWARE UPDATE Universal Service Password The Universal Service Password for Parental Level is 1369. Version Page (Hidden Menu) To display Version Page: Open DVD mode on TV. Press MENU key when there is no disc playback. Setup Menu is displayed. Press the numbers 1 - 3 - 5 - 7 when the Video Setup Page is selected (It is selected by default). Version Page is displayed. First 6 lines contain current VERSION information. The first 5 lines (Version, Macrovision FW. V., Servo, Risc and DSP) are for factory use only and the 6th line (Build No) is for customer use. 7th line contains Region Code (Management ). The 6th line (Build No) has both the hardware option (example: C6KN1) and the software build version (example: 6027-13F) information. Hardware option part is also used as the CD update file name. Press MENU key to exit from Version Page. Build Names for Hardware Options DVD7500 MTK Concept has 3 different hardware option and a language group option: 2 OPU Options 2 VFD Options + TV DVD + FP 3 DAC Options 6 Language Groups (Each group has 4 languages.) There is a naming standard for software builds according to players hardware options: X X X X X. Bin VFD OPU DAC VFD Type: N = New small VFD / T = TV DVD / 7 = No VFD / 9 = 2900 FP OPU Type: K = Samsung S71 / N = Sony KHM310 DAC Type: I2 = Internal 2-ch / C6 = CS4360 / P6 = PCM1606

102

Examples: I2KN1.bin = Internal 2-channel Audio-DAC, Samsung S71, New small VFD, Language Group 1 P6NN4.bin = PCM1606, Sony KHM310, New small VFD, Language Group 4 Note: Update CD should have no volume ID. CD Update Procedure 1. Any Player can be updated automatically with Update CD which contains proper files 2. Burn up CD within proper files (There should be no Volume Name for CD) 3. Open Tray and place update CD 4. You can see "Upgrade File Detected. Press Play to start" OSD message 5. Press Play button to start upgrade 6. You can see "File copying" OSD message for a few second 7. Tray is open automatically 8. No need for CD in tray; Take it from tray. 9. During upgrade procedure "CD upgrade start, Please wait.." indicator at OSD, and "UPG" indicator at VFD 10. Upgrade procedure takes about a few minutes, please wait if tray is open. 11. When CD update is finished tray is closed, screen is refreshed, update is finished. 12. To see Version Page: Press DISPLAY key. Setup Menu is displayed. Press 1-3-5-7 in Setup Menu when Video Setup Page is selected. Version Page is displayed. The 6th line (Build No) has both the hardware option (example: C6KN1) and the software build version (example: 6027-13F) information. Press DISPLAY key to exit from Version Page. Region Management In Version Page by using Up and Down arrow keys the region code can be adjusted.

103

POWER CARD

89D_KHM310_FAIRCHILD_V1

MT1389D (LQFP216) DVD Demo Board for KHM310 with FAN8025 Motor Driver

Mainboard

1 INDEX & POWER, RESET 2 RF, SERVO & MPEG - MT1389D 3 MEMORY - SDRAM, FLASH/EEPROM 4 VIDEO OUT 5 AUDIO DAC
D

DEVICE SUPPLY MT1389E MT1389E

NAME VCC DV33 RFV33 LDO_AV33 AVCC V18 SD33 +12V -12V AVDD DVDD

TYPE Digital 5V Digital 3.3V Servo 3.3V Laser Diode 3.3V RF 5V Digital 1.8V Digital 3.3V Audio +12V Audio -12V Audio 5V Audio 3V3

PICKUP HEADER MT1389E SDRAM OP AMP. OP AMP. Audio DAC Audio DAC

URST# V18 DV33 VCC AVCC

CON1

URST# [ 2 ] V18 DV33 VCC AVCC +12V [2] [ 2,3,4,5 ] [ 2,3,4,5 ] [2]

GND

0.1uF

0.1uF

220uF/16V

L6 PV33 L7 FB V33

VCC_AUDIO

+P5V

FB

CB6

+ CE5

0.1uF

220uF/16V

L8 RFV33 RFV33

AVCC

VCC

FB

L11 + CB8 0.1uF CE8 220uF/16V

VCC
A

+P5V

FB

CB9

+ CE9

0.1uF

220uF/16V

20
L1 DV33 DV33 FB CB1 0.1uF V33 +12V L4 FB CB3 C 0.1uF 220uF/16V RT9164CG/AZ1117H-ADJ SOT223/SMD + CE3 R1 R CB4 + CE4 C1 FB CB5 0.1uF 3 IN OUT 2 V18 U1 L5 V18 220uF/16V + CE1 V33 R2 R

+P5V PV33 PV33

8 7 6 5 4 3 2 1

+12V -P12V +P12V

-12V GND

+12V -12V GND

[ 4,5 ] [ 4,5 ] [ 2,3,4,5 ]

PWR, 8P,PITCH=2.54M/M

L2

-12V

L3

-P12V

+P12V

FB

FB

CB2

CE2

220uF/16V

DV33

Power ON alive source

D1 1N4148

R3 10k

URST#

V33 CE6 +

L9

V33

FB + CB7 0.1uF LDO_AV33 LDO_AV33 CE7 220uF/16V

Regulator
Fix regulator Adj regulator

R1 0 ohm 300 1%

R2

47uF/16V

OFF
680 1%

L10

FB

Title Size C Date:

4 3 2

MediaTek Incorporation
89D_KHM310_FAICHILD_V1
Document Number

INDEX
Wednesday, January 05, 2005
1

Rev 1 Sheet 1 of 5

L13 RFV33
0.1uF

APLLVDD3 RFVDD3 JITFO C2 JITFN L14 CB10 0.1uF

14

R4 0

L12 FB

DV33

390pF DV33 + CE10 10uF/25v 750k DACVDD3 CB11 FB + CE11 10uF/25v L16
14

C3
C8

2200pF L15 10 C11 10uF/10v C15 74HC04 3 100k 74HC04

7 20pF C9

C4 0.1uF/N.C 0.1uF 10uF/25v C10 0.1uF 2.7u, DIP 1 U2B R14 4 2 R

XI XO

FB C5 0.01uF U2A
0.47uF/N.C

C6 2200pF
100k

C7

R6

680k

OPO

R7

ADIN

OPOP+ R13 6.8

R8 1000pF

V1P4

RFV33 R5

R9 150k PLLVDD3
C13

R10 150k DV33

7

R11 1000p R16

C14 2200pF
C16 0 0

680k ADACVDD3 +
0.1uF RFVDD3

V1P4 ADACVDD3 CE12 100uF/16v

0.033uF 0.047uF

CB12 0.1uF
RFVDD3 0.1uF

R20 + C19 6800PF

C20 C23 AL C21 C25 JITFN JITFO XTALI R17 R18 RFV18 APLLVDD3 Y6 Y5 Y4 DACVDD3 DACVDD3 Y3 AR ADACVDD3

1 CE13 1000uF/16v XI FS VREF R21 C28

216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163

R12 15k C17 0.1uF

R15 R19 1k R0603/SMD Y1 1 XO C27MHz 2

RFVDD3 C22 0.047uF DACVDD3 ASPDIF RGB_SWITCH

J1

1 2 3 4 5 6 C24 0.1uF V2P8 V20 CB14 0.1uF R23 4.7k V18 VCC 2K 0.1uF 47uF/16v 0.1uF 47uF/16v + CE15 CB15 + CE16 C26 22p V1P4 CB13 0.1uF 47uF/16v + CE14 C27 22p
PLLVDD3

SLSL+

DV33

6x1 W/HOUSING Pitch2.0mm

R22

10k

L17 C31 C34 C C33 1uF R24 R25 R26 0 0 0 TROUT TRIN LIMIT 1uF

C29

AVDD3 IREF RFGC OSN OSP RFGND CRTPLP HRFZC RFRPAC RFRPDC RFVDD3 ADCVSS ADCVDD3 LPFOP LPFIN LPFIP LPFON PLLVDD3 IDACEXLP PLLVSS JITFN JITFO XTALI XTALO RFVDD18 RFGND18 ADACGND AL VCM AR ADACVDD3 APLLVSS APLLCAP APLLVDD3 R B DACVSSA G DACVDDA DACVSSB DACVDDB CVBS DACVSSC FS VREF DACVDDC SPDIF MC_DATA DVDD3 ASDATA3 ASDATA2 ASDATA1 ASDATA0 ALRCK

V18 ACLK ABCK 1uF C30 1uF C32 1uF

V18

FB

RFV18 CB16

0.1uF

AUDIO_RST ASDAT2 ASDAT1 ASDAT0 ALRCK

SPSP+ LIMIT

C B A D RFO

C B A D MA4 MA5 MA6 MA7 MA8 MA9 DCKE DCLK MA3

C3

1 RFVDD3 CB17 0.1uF IOA TP28 TP30 TP31 TP32 C36 0.1uF C37 V1P4 C R R34 FEO TEO TEZISLV TP2 TP1 RFOP RFON MA2 MA1 MA0 MA10

E2

AVCC

2N3904

R29

10k

E F MDI1 MDI2 LDO2 LDO1

R28

100k

MT1389D
V1.7

R30 V2P8 V20 V1P4

10k

Q1 SOT23/SMD

R31

100k

2SK3018

Q2 2SK3018

Q3 2SK3018

AVCC

TOP

IOA18 DVSS IOA19 DVDD3 IOWR# A16 DVDD3 HIGHA7 HIGHA6 HIGHA5 HIGHA4 HIGHA3 HIGHA2 HIGHA1 IOA20 IOCS# DVSS IOA1 IOOE# DVSS AD0 AD1 AD2 AD3 AD4 AD5 AD6 IOA21 ALE DVDD18 AD7 A17 DVDD3 IOA0 UWR# URD# UP1_2 UP1_3 GPIO6 UP1_4 UP1_5 UP1_6 DVSS UP1_7 UP3_0 UP3_1 UP3_4 UP3_5 GPIO7 ICE PRST# IR INT0# DVDD3

55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108

PCE#

AD0 AD1 AD2 AD3 AD4 AD5 AD6

A0

PWR# A16

A15 A14 A13 A12 A11 A10 A9

ASTB VSCK IOA VSTB VSDA SCL

SDA

MUTE_DAC RXD TXD TRCLOSE

URST# IR

HEADER 24 SMD0.5 TOP

R36

4.7

LDO_AV33

AD7 A17

CE19 47uF/16v

A1 PRD#

10uH V18 + CE20 47uF/16v MO_VCC MO_VCC U4 LOADLOAD+ R40 FOSO GND R47 FTTRSO R54 20k R41 10k TROPEN TRCLOSE 10k R44 10k SPSP+ SLSL+ FMSO DMSO R43 R45 GND 30 G2 G1 29 4K2 8K2 15 16 17 18 19 20 21 VOTK+ VOTKVOLD+ VOLDVCC VNFTK PVCC2 VOFC+ VOFCVOSL+ VOSLPGND PVCC1 VCC 14 13 12 11 10 9 8 DV33 R39 R42 10k 10k LOADLOAD+ TROUT TRIN 1 2 3 4 5 5x1 W/HOUSING Pitch2.0mm LDO1 DV33 J3 CB24 0.1uF R38 10k TP35

R37

4.7

Q5

2SB1132

21
V18 STBY V18 R35 A2 0 TRO FOO ADIN FS0 FS1 2 A3 A4 A5 A6 A7 A8

R32

R33

L18

FB

OPO OPOP+ DMO FMO TROPEN

HA1

100 100

C38 0.1uF

CE18 100uF/16v

GND LD-DVD

AVCC1 MDI1 LD-CD

TP33

TP5

TP12

TP13

Very Important to reduce Noise

TP21 TP22

TP34 TP19

TP14

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 IR BA1 BA0 CS# RAS# CAS# WE# DQM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM0 AGND DVDA DVDB DVDC DVDD DVDRFIP DVDRFIN MA MB MC MD SA SB SC SD CDFON CDFOP TNI TPI MDI1 MDI2 LDO2 LDO1 SVDD3 CSO/RFOP RFLVL/RFON SGND V2REFO V20 VREFO FEO TEO TEZISLV OP_OUT OP_INN OP_INP DMO FMO TROPENPWM PWMOUT1/ADIN0 TRO FOO FG/ADIN1 GPIO0 GPIO1 GPIO2 IOA2 DVDD18 IOA3 IOA4 IOA5 IOA6 IOA7 HIGHA0 ACLK ABCK DVSS GPIO5 GPIO4 GPIO3 DVDD18 RA4 RA5 RA6 RA7 DVDD3 RA8 RA9 RA11 CKE RCLK DVSS RA3 DVSS RA2 RA1 RA0 RA10 DVDD3 BA1 BA0 RCS# RAS# DVDD18 CAS# RWE# DVSS DQM1 RD8 RD9 RD10 RD11 RD12 DVDD3 RD13 RD14 DVSS RD15 RD0 RD1 RD2 DVSS RD3 RD4 RD5 RD6 RD7 DQM0 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109

L19

C C
A18 A19 LDO2 DV33

10uH

E3

2SB1132

Q4

2SB1132

24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

E AVCC1 V20 GND F B A RFO IOA D C T+ TF+ F-

TP20 TP8 TP9 TP11 TP15 CB18 TP10 TP7 0.1uF TP3 TP4 TP16 TP17 L20

R49 10k FR52 T+ R53 R55 R56 1 1 1 1 TF+

V1P4 STBY

FOSO TRSO FMSO DMSO C39 150p 20K C40 150p C41 C42 330pF 330pF C43 0.1uF C44

22 23 24 25 26 27 28 PREGND VINLD CTK2 CTK1 VINTK BIAS STBY VNFFC VOSL VINSLVINSL+ CF2 CF1 VINFC

7 6 5 4 3 2 1

FAIRCHILD8025
CE21 + 0.1uF 0.1uF 100UF CB34 CB35

CB33 0.1uF

+ R201 10 R27 C35 100pF 10 + CE17 100uF/16V VSDA VSCK VSTB AL AR FS0 FS1 RGB_SWITCH PCE# PWR# MUTE_DAC URST# Y[3..6] URST# Y[3..6] VIDEO INTERFACE A[0..19] AD[0..7] PRD# PWR# PCE# A[0..19] AD[0..7] PRD# PWR# PCE# FLASH MA[0..10] MA[0..10] DQ[0..15] BA[0..1]
U3 MT1389D

C12 1500pF C0603/SMD

XTALI C18 C

J2 6 5 4 3 2 1

6x1 W/HOUSING Pitch2.54mm

AL AR FS0 FS1 RGB_SWITCH AVCC PCE# PWR# [1 ] [3] [3]

[4] [4] [4] [4] [4]

MUTE_DAC

[5] [1] [5]

[3] [3] [3] [3] [3] [3] DQ[0..15] BA[0..1] DQM[0..1] DCLK LQFP216/SMD DCKE CAS# RAS# WE# CS# V18 DQM[0..1] DCLK DCKE CAS# RAS# WE# CS# MEMORY CB19 0.1uF CB20 0.1uF CB21 0.1uF CB22 0.1uF CB23 0.1uF SCL SDA DV33 IIC CB25 0.1uF CB26 0.1uF CB27 0.1uF CB28 0.1uF CB29 0.1uF ASDAT[0..2] AUDIO_RST VSDA ASTB VSCK DV33 ALRCK ACLK ABCK ASPDIF CB30 0.1uF CB31 0.1uF CB32 AUDIO INTERFACE 0.1uF
A

[3] [3] [3] [3] [3] [3] [3] [3] [3]

B

SCL SDA

[3] [3]

ASDAT[0..2] AUDIO_RST VSDA ASTB VSCK ALRCK ACLK ABCK ASPDIF R46 R48 R50 R51 12k 15k 15k 10k FOO TRO FMO DMO

[5] [5] [5] [5] [5] [5] [5] [5] [4]

0.015uF V1P4 TP27 TP26 TP25 TP24 VCC L21 FB MO_VCC RxD TxD DV33 1 2 3 4 4x1 W/HOUSING Pitch2.54mm Title J4

MediaTek Incorporation
89D_KHM310_FAICHILD_V1

RS-232
3 2

Size C Date:

Document Number

RF&MEPG
Wednesday, January 05, 2005
1

Rev 1 Sheet 2 of 5

U5

U6

DV33 SD33

L22

FB

SD33

MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 DBA0 21 22 23 24 27 28 29 30 31 32 20 19 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA/A11 SD33 CLK CKE + CE22 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 220uF/16V SD33 CB42 0.1uF 0.1uF CB47 0.1uF 0.1uF 0.1uF CB43 0.1uF CB45 CB44 CB46 [2] DQ[0..15] CB36 CB38 CB39 CB37 CB40 CB41 VCC VCC SD33 VCCQ VCCQ VCCQ VCCQ + CE23 220uF/16V 7 13 38 44 1 25 35 34 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 SDCLK SDCKE 2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49

21 22 23 24 27 28 29 30 31 32 20 19

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA/A11

MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 DBA0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 SD33

SDCLK SDCKE

35 34

CLK CKE DBA1 DRAS# DCAS# DWE# 18 17 16 15 CS RAS CAS WE DQML DQMH NC NC VSS VSS VSSQ VSSQ VSSQ VSSQ 4 10 41 47 14 36 33 37 26 50 DQM0 DQM1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49

DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 SD33

DCS# DRAS# DCAS# DWE#

18 17 16 15

CS RAS CAS WE

VCC VCC

1 25

SD33

DQM0 DQM1

14 36

DQML DQMH

33 37

VCCQ VCCQ VCCQ VCCQ

7 13 38 44

NC NC

DQ[0..15]

26 50

VSS VSS

VSSQ VSSQ VSSQ VSSQ

4 10 41 47

HY57V161610ET-7

HY57V161610ET-7

[2] [2] [2] [2] [2] [2] [2] [2] [2]

MA[0..10] BA[0..1] DQM[0..1] DCLK DCKE CAS# RAS# WE# CS# DRAM

MA[0..10] BA[0..1] DQM[0..1] DCLK DCKE CAS# RAS# WE# CS#

RN1 DCS# DRAS# DCAS# DWE# 1 3 5 7 33x4 DBA0 DBA1 SDCKE SDCLK R57 R58 R59 R60 33 33 33 33 BA0 BA1 DCKE DCLK [2] [2] SCL SDA IIC FLASH_VCC L24 CB48 0.1uF FB + CE24 47uF/16V R63 DV33 U8 CB50 0.1uF 680 GND DV33 VCC GND DV33 VCC [ 1,2,3,4,5 ] [1] [1] DV33 SCL SDA
B

22
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 VCC L23 NO_USE DV33 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 A0 10k FLASH_VCC WP/ACC BYTE VCC CB49 0.1uF GND1 GND2 27 46 37 47 14 R61 29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45
4 3

2 4 6 8

CS# RAS# CAS# WE#

[2] [2] [2] [2] [2]

PCE# PRD# PWR# A[0..19] AD[0..7] FLASH

PCE# PRD# PWR# A[0..19] AD[0..7]

U7

FLASH_VCC

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19

R62

25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 9 10

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20

R64 680

10k

PCE# PRD# PWR#

26 28 11

CE OE WE

FLASH_VCC

12

RESET

STM29W800/MX29LV400(800)

1 2 3 4

NC NC NC GND

VCC WP SCL SDA EEPROM 24C16 SOP8/SMD

8 7 6 5

SCL SDA

TSOP 48 pin

4M 8M FLASH

Title Size B Date:

2

MediaTek Incorporation
89D_KHM310_FAICHILD_V1 Document Number

SDRAM&FLASH
Wednesday, January 05, 2005 Sheet
1

Rev 1 3 of 5

3906 C
+5VV R65 75,1% R CVBS J5

R66

Y3 Q6 3906 1 D2 1N4148 [2] ASPDIF Y[3..6] GND VCC R68 75,1% R CVBS_ST CVBS 2 1 +12V -12V FS0 FS1 RGB_SWITCH FR FL 3 +5VV

R67 NC

C45

C46

NC

NCP

L25 NC

ASPDIF Y[3..6] [2] [1] GND VCC +12V -12V [1] [1] [1] FS0 FS1 RGB_SWITCH FR FL [1] [1] [4] [4] [4]

CVBS_ST R/V G/Y B/U GND C_RGB_SWITCH C_FS GND FL FR VCC 1 2 3 4 5 6 7 8 9 10 11 SCART, 11P, PITCH=2.540M/M

+5VV

R212 0

R69

Y3
2

L26 1.8uH,DIP Q7 3906 +5VV ASPDIF 3 5 C67 110 P3 VCC R155 22 4 R156 OPTICAL 5
6 7 8 3 2 1

CB54 R144 R145 75 C66 100pF 100pF R149 100

S-VIDEO + RCA 4

C47 1 0.1uF D18 1N4148 3

C48

R70 150,1%

47P

47P

+5VV R71 75,1% C69 CE31 + 10uF/16V G/Y +5VV 3 D19 V33 1N4148 R74 +5VV
3 2

22 CB55 0.1uF P4 RCA+SPDIF

R72

R 27pF

R76 1 2N3904
2

RGB_SWITCH Q10 R77 10k

+P12V R81
3

1K

R82

Y5
2

L30 1.8uH,DIP Q13 3906 FS1 3 R85 1K D20 1N4148 1 1 +5VV

Q14 2N3904
2

R86 150,1%

R91 150,1% 1 D21 1N4148 3

C53

C54

47P

47P

23
Q8 3906
2

Y4 1

L27 1.8uH,DIP

SCART CONTROL

R73 150,1%

C49

C50

47P

47P

10k 1 Q9

3906 +P12V R79 1K 1K 1 Q12 2N3904 R75 1k

C_RGB_SWITCH VCC R78 2K L28 C_FS R83 1K 10 +5VV

B

75,1% R B/U

R80

C51

C52

47P

47P

FS0 R87 1K

Q15 2N3904 CB51 0.1uF

+ CE25 47uF/16V

+5VV R89 75,1% R R/V

A2

R90

Y6 Q17 3906 +5VV

L31 1.8uH,DIP
A

Title

MediaTek Incorporation
89D_KHM310_FAICHILD_V1 Size Document Number Custom Date:

VIDEO OUT PORT

Wednesday, January 05, 2005
3 2 1

Rev 1 Sheet 4 of 5

VCC R197 C55 R94 NC EC1 R97 R98 R99 100k [2] [2] SCL SDA R101 100 FL SCL SDA -12V 220p R93 DV33 180k 0 R194 DAC_FL

+P12V

AL

R92

20k

R95

R96

4
U9A 1 LM833 A_MUTE Q18 2N3904 C87 47p [2] [ 1,2,3,5 ] GND AUDIO_RST 47uF/16V EC2 R104 NC 47uF/16V R198 R109 0 R211 NC +12V [2] [2] [2] [2] [2] 270p ASPDIF ASDAT[0..2] ACLK ABCK ALRCK C58 NC +12V NC NC R105 R106 0 2 + 3 NC 2200P C56 10k 5.1k C57

D12 1 R100 0 LOUT1 + CE26 VCC_AUDIO R A_DVDD

1N4148 2

R102

D14

[1] [1] [1] [1] -12V +12V DV33 VCC

-12V +12V DV33 VCC GND AUDIO_RST ASPDIF ASDAT[0..2] ACLK ABCK ALRCK MUTE_DAC

1N4148 1 0.1uF 100uF/16V A_MUTE R110 0 R111 10,0805 AR R209 C59 R114 NC EC3 R117 R118 R119 100k -12V 220p R113 R195 180k 0 DAC_FR 100uF/16V A_AVDD CB53 0.1uF + CE30 R112 20k A_AVDD Q19 3906

A_DVDD CB52 + CE27

22k

470uF/16V

R103

R108

470

+ CE29

D15 1

1N4148 2

100uF/16V

VCC

R115

R116

VSCK VSDA ASTB FR FL [1] [1]

4.7k

100k

U9B 7 LM833 A_MUTE FR

MUTE_DAC

Q21 3906

C55 C59 C57 C61 R92 R112

EC4 R126 R127 R128 -12V D17 1 1N4148 R125 100k 2

47uF/16V ROUT1

R120 10K

INT_ADAC 1800P
NC NC R131 0 R210 NC R141 20k R203 R142 -12V R146 R147 R148 180k NC EC5 100k R143 C63 220p NC +12V 270p C62 +12V NC

180P 220P
R208

30K 20K
47uF/16V

-12V Q22 2N3904

U10 SACLK SBCLK SLRCK R134 R136 R138 R140 R 0 0 R A_AVDD

EXT_ADAC

2200P

A_AVDD

R133 R135 R137 R139 VQ A_AVDD DAC_SR DAC_SL DAC_FR

R 0 0 R

SDAT0 SDAT1 SDAT2

DAC_CENT DAC_LFE DAC_FL

1 2 3 4 5 6 7 8 9 10

P2

IF use PCM1606,EC?=10uF 47uF/16V EC6 R151 NC 47uF/16V R202 R154 0 NC NC NC C68 270p R152 R153 DEMP0 DEMP1 Audio Interface LOUT2 NC 2200P 0 2 3 C64 10k 5.1k C65

DAC_SL

PCM1606 -

U11A 1 + LM833

R150 100

FL SL FR

4 7 A_MUTE 1

HARDWARE MODE
+

FMT0

FMT1

FORMAT

Q23 2N3904 +12V

C85 47p

SL SR

5 8 2 CENT LFE R157 20k 6 9 3 C70 220p -12V RCA-AV6

LOW LOW HIGH HIGH

LOW HIGH LOW HIGH OFF 44.1KHz 48KHz 32KHz

I2S Standard TDM Left Justified

LOW LOW HIGH HIGH

LOW HIGH LOW HIGH

R159 R158 180k A_AVDD DAC_SR NC EC7 100k R160 0 R165 NC R170 MUTE1 R199 R171 1 R207 R173 NC 180k DAC_CENT EC9 100k R175 R176 R177 R174 C74 220p NC R172 20k 0 47uF/16V C71 NC R161 10k R166 NC R168 0 C72 2200P R162

ROUT1 DAC_FR LOUT2 DAC_SL ROUT2 DAC_SR LOUT3 DAC_CENT ROUT3 DAC_LFE

U11B 5 R167 NC C73 270p 5.1k 6 7 + LM833

44 43 42 41 40 39 38 37 36 35 34

U12 A_AVDD 47uF/16V R164 R ROUT2 EC8

R163 100

SR A_MUTE

ROUT1+ ROUT1LOUT2+ LOUT2ROUT2+ ROUT2LOUT3+ LOUT3ROUT3+ ROUT3AVSS

Q24 2N3904 +12V

MUTE1

DAC_FL LOUT1 R169 0

C84 47p

+12V
B

CB56 0.1uF

CB57 0.1uF

11

R2200

10

DATA1 SCKI DATA2 BCK DATA3 LRCK FMT1 DEMP1 FMT0 DEMP0 ZEROA VCC AGND VCOM OUT5 OUT4 OUT6 OUT3 OUT1 OUT2

20 19 18 17 16 15 14 13 12 11

DVSS SDTI1 SDTI2 SDTI3 LRCK SMUTE CCLK CDTI CSN DFS0 CKS0

VCC_AUDIO

AUDIO_RST SBCLK SACLK 5V

1 2 3 4 5 6 7 8 9 10 11 AVDD VREFH DZFR2 DZFL3 DZFR3 DZFE DIF2 DIF1 DIF0 CKS2 CKS1

LOUT1LOUT1+ DZFL2 DZFR1 DZFL1 CAD0 CAD1 PDN BLCK MCLK DVDD

AK4356

33 32 31 30 29 28 27 26 25 24 23

12 13 14 15 16 17 18 19 20 21 22

47uF/16V EC10 R179

SDAT0 SDAT1 SDAT2 SLRCK

VSCK VSDA ASTB

R180

R181

LOUT3

47uF/16V R206 NC A_AVDD

NC

NC

R182 0

NC

C77 270p

A_AVDD

R183 20k R205 DAC_FL DAC_FR DAC_SL DAC_SR R184 NC 180k DAC_LFE EC11 100k R186 R187 R188 R185 C78 220p -12V
A

U14

SDAT0 SDAT1 SDAT2 SBCLK SLRCK SACLK DAC_CENT DAC_LFE VQ FILT+

U13B NC EC12 ROUT3 R190 R191 2200P R192 5 47uF/16V 0 C79 10k C80 5.1k 6 7

R189 100 +

R84

NC

AUDIO_RST

SCL SDA

LM833

A_MUTE

R196 NC CB64 +EC13 3.3UF 0.1u 0.1u CB65 +EC14 3.3UF

R107

1 2 3 4 5 6 7 8 9 10 11 12 13 14 MUTEC1 AOUTA1 AOUTB1 MUTEC2 AOUTA2 AOUTB2 VA GND AOUTA3 AOUTB3 MUTEC3 VQ FILT+ M2

R88

VLS SDIN1 SDIN2 SDIN3 SCLK LRCK MCLK VD GND RSTB DIF1 DIF0 M1 VLC

28 27 26 25 24 23 22 21 20 19 18 17 16 15

47uF/16V R204 NC

NC

NC

R193 0

NC

C81 270p

+12V

CB62

CB63

CS4360-KZ

0.1u

0.1u

Audio Format: I2S UP TO 24 Bit Date:

4 3 2

NC

2200P

C75

10k

C76

5.1k

NC 5

2200P

-12V U13A 1 LM833 +12V A_MUTE R178 100 CENT Q25 2N3904 LFE Q26 2N3904 C83 47p

0 6

C60 10k 5.1k

C61

R122 100

[ 2 ] MUTE_DAC VSCK [2] VSDA [2] ASTB [2] FR FL ACLK ALRCK ABCK C86 47p R121 R123 R124 ASDAT0 R129 ASDAT1 R130 ASDAT2 R132 AL AR

33 33 33 33 33 33 AL AR

SACLK SLRCK SBCLK SDAT0 SDAT1 SDAT2 [4] [4]

24

CB58 0.1uF

-12V

CB59 C82 47p 0.1uF

CB60 0.1uF

CB61 0.1uF

Title Size C

MediaTek Incorporation
89D_KHM310_FAICHILD_V1 Document Number

AUDIO OUT PORT

Wednesday, January 05, 2005
1

Rev 4 Sheet 5 of 5

DVD7200
AK30 TVDVD DIVX MODULE Hardware Specification

1. GENERAL DESCRIPTION 1.1 MT1389E The MT1389E Progressive Scan DVD/DIVX-Player Combo Chip is a single-chip MPEG video decoding chip that integrates audio/video stream data processing, TV encoder, four video DACs with Macrovision. copy protection, DVD system navigation, system control and housekeeping functions. The features of this chip can be listed as follows: General Features: Integrated NTSC/PAL encoder. DVD-Video, VCD 1.1, 2.0, DIVX 3.x, 4.x, 5.1,DIVX PRO, X-VID and SVCD Unified track buffer and A/V decoding buffer. Direct interface of 32-bit SDRAM. Servo controller and data channel processing. Video Related Features: Macrovision 7.1 for NTSC/PAL interlaced video. RGB outputs. 8-bit CCIR 601 YUV 4:2:2 output. Decodes MPEG video and MPEG2 main profile at main level. Maximum input bit rate of 15Mbits/sec Audio Related Features: Dolby Digital (AC-3) and Dolby Pro Logic. Dolby Digital S/PDIF digital audio output. CD-DA. MP3. 1.2 MEMORY 1.2.1 SDRAM Memory Interface The MT1389E provides a glueless 16-bit interface to DRAM memory devices used as OSD, MPEG stream and video buffer memory for a DVD player. The maximum amount of memory supported is 16 MB of Synchronous DRAM (SDRAM). The memory interface is configurable in depth to support 110-Mb addressing. The memory interface controls access to both external SDRAM memories, which can be the sole unified external read/write memory acting as program and data memory as well as various decoding and display buffers. 1.3 DRIVE INTERFACES The MT1389E supports the DV34 interface, and other RF and servo interfaces used by many types of DVD loaders. These interfaces meet the specifications of many DVD loader manufacturers.

111

2. SYSTEM BLOCK DIAGRAM and MT1389E PIN DESCRIPTION 2.1 MT1389E PIN DESCRIPTION

112

113

114

115

116

117

118

119

120

2.1 SYSTEM BLOCK DIAGRAM A sample system block diagram for the MT1389E DVD player board design is shown in the following figure:

3. AUDIO OUTPUT The MT1389E supports two-channel and six-channel analog audio output. In a system configuration with six analog outputs, the front left and right channels can be configured to provide the stereo (2 channel) outputs and Dolby Surround, or the left and right front channels for a 5.1 channel surround system. The MT1389E also provides digital output in S/PDIF format. The board supports both optical and coaxial SPDIF outputs. 4. AUDIO DACS The MT1389E supports several variations of an I2S type bus, varying the order of the data bits (leading or no leading zero bit, left or right alignment within frame, and MSB or LSB first) is possible using the MT1389E internal configuration registers. The I2S format uses four stereo data lines and three clock lines. The I2S data and clock lines can be connected directly to one or more audio DAC to generate analog audio output. The two-channel DAC is internal. The six channel DAC is PCM1606. The outputs of the DACs are not differential. The buffer circuits use National LM833 op-amps to perform the low-pass filtering and the buffering.

121

5 .VIDEO INTERFACE 5.1 Video Display Output The video output section controls the transfer of video frames stored in memory to the internal TV encoder of the MT1389E. The output section consists of a programmable CRT controller capable of operating either in Master or Slave mode. The video output section features internal line buffers which allow the outgoing luminance and chrominance data to match the internal clock rates with external pixel clock rates, easily facilitating YUV4: 2:2 to YUV4: 2:0 component and sample conversion. A polyphase filter achieves arbitrary horizontal decimation and interpolation. Video Bus The video bus has 8 YUV data pins that transfer luminance and chrominance (YUV) pixels in CCIR601 pixel format (4:2:2). In this format, there are half as many chrominance (U or V) pixels per line as luminance (Y) pixels; there are as many chrominance lines as luminance. Video Post-Processing The MT1389E video post-processing circuitry provides support for the color conversion, scaling, and filtering functions through a combination of special hardware and software. Horizontal upsampling and filtering is done with a programmable, 7-tap polyphase filter bank for accurate non-integer interpolations. Vertical scaling is achieved by repeating and dropping lines in accordance with the applicable scaling ratio. Video Timing The video bus can be clocked either by double pixel clock and clock qualifier or by a single pixel clock. The double clock typically is used for TV displays, the single for computer displays. 6. FLASH MEMORY The decoder board supports 70ns Flash memories. FLASH_512K_8b The MT1389D permits 8- bit common memory I/O accesses. 7. SERIAL EEPROM MEMORY An I2C serial EEPROM is used to store user configuration (i.e. language preferences, speaker setup, etc.) and software configuration.. Industry standard EEPROM range in size from 1kbit to 256kbit and share the same IC footprint and pinout. The default device is 2kbit, 256kx 8, SOIC8 SGS Thomson ST24C02M1 or equivalent. 8. AUDIO INTERFACE AUDIO SAMPLING RATE AND PLL COMPONENT CONFIGURATION The MT1389E audio mode configuration is selectable, allowing it to interface directly with low-cost audio DACs and ADCs. The audio port provides a standard I2S interface input and output and S/PDIF (IEC958) audio output. Stereo mode is in I2S format while six channels Dolby Digital (5.1 channel) audio output can be channeled through the S/PDIF. The S/PDIF interface consists of a bi-phase mark encoder, which has low skew. The transmit I2S interface supports the

122

112, 128, 192, 256, 384, and 512 sampling frequency formats, where sampling frequency Fs is usually 32 kHz, 44.1 kHz, 48 kHz, 96 kHz, or 192 kHz. The audio samples for the I2S transmit interface can be 16, 18, 20, 24, and 32-bit samples. For Linear PCM audio stream format, the MT1389E supports 48 kHz and 96 kHz. Dolby Digital audio only supports 48 kHz. The MT1389E incorporates a built-in programmable analog PLL in the device architecture in order to generate a master audio clock. The MCLK pin is for the audio DAC clock and can either be an output from or an input to the MT1389E. Audio data out (TSD) and audio frame sync (TWS) are clocked out of the MT1389D based on the audio transmit bit clock (TBCK). Audio receive bit clock (RBCK) is used to clock in audio data in (RSD) and audio receive frame sync (RWS). 10. CONNECTORS CON1: POWER CONNECTOR PINS 1 2 3 4 5 6 DESCRIPTION +12V GND GND +3V3 +3V3 +5V

J2 : UART CONNECTOR PINS 1 2 3 4 5 6 DESCRIPTION GND ------------VCC IRQ

J5 : VIDEO AND AUDIO SOCKET PINS 1 2 3 4 5 6 DESCRIPTION CVBS_ST R/V G/Y B/U GND C_RGB_SWITCH

123

7 8 9 10 11

C_FS GND FL FR VCC

P4: S/PDIF DIGITAL AUDIO SOCKET PINS 1 2 3 DESCRIPTION S/PDIF -----GND

SOFTWARE UPDATE Universal Service Password The Universal Service Password for Parental Level is 1369. Version Page (Hidden Menu) To display Version Page: Open DVD mode on TV. Press MENU key when there is no disc playback. Setup Menu is displayed. Press the numbers 1 - 3 - 5 - 7 when the Video Setup Page is selected (It is selected by default). Version Page is displayed. First 6 lines contain current VERSION information. The first 5 lines (Version, Macrovision FW. V., Servo, Risc and DSP) are for factory use only and the 6th line (Build No) is for customer use. 7th line contains Region Code (Management ). The 6th line (Build No) has both the hardware option (example: C6KN1) and the software build version (example: 6027-13F) information. Hardware option part is also used as the CD update file name. Press MENU key to exit from Version Page. Build Names for Hardware Options DVD7500 MTK Concept has 3 different hardware option and a language group option: 2 OPU Options 2 VFD Options + TV DVD + FP 3 DAC Options 6 Language Groups (Each group has 4 languages.) There is a naming standard for software builds according to players hardware options: X X X X X. Bin VFD

124

OPU DAC VFD Type: N = New small VFD / T = TV DVD / 7 = No VFD / 9 = 2900 FP OPU Type: K = Samsung S71 / N = Sony KHM310 DAC Type: I2 = Internal 2-ch / C6 = CS4360 / P6 = PCM1606 Examples: I2KN1.bin = Internal 2-channel Audio-DAC, Samsung S71, New small VFD, Language Group 1 P6NN4.bin = PCM1606, Sony KHM310, New small VFD, Language Group 4 Note: Update CD should have no volume ID. CD Update Procedure 1. Any Player can be updated automatically with Update CD which contains proper files 2. Burn up CD within proper files (There should be no Volume Name for CD) 3. Open Tray and place update CD 4. You can see "Upgrade File Detected. Press Play to start" OSD message 5. Press Play button to start upgrade 6. You can see "File copying" OSD message for a few second 7. Tray is open automatically 8. No need for CD in tray; Take it from tray. 9. During upgrade procedure "CD upgrade start, Please wait.." indicator at OSD, and "UPG" indicator at VFD 10. Upgrade procedure takes about a few minutes, please wait if tray is open. 11. When CD update is finished tray is closed, screen is refreshed, update is finished. 12. To see Version Page: Press DISPLAY key. Setup Menu is displayed. Press 1-3-5-7 in Setup Menu when Video Setup Page is selected. Version Page is displayed. The 6th line (Build No) has both the hardware option (example: C6KN1) and the software build version (example: 6027-13F) information. Press DISPLAY key to exit from Version Page. Region Management In Version Page by using Up and Down arrow keys the region code can be adjusted.

125

POWER CARD

Vestel_89E_SUMSUNGS71_AM5888_V1
Rev History P# Date

Mainboard

1 INDEX & POWER, RESET 2 RF, SERVO & MPEG - MT1389E 3 MEMORY - SDRAM, FLASH/EEPROM 4 VIDEO OUT 5 AUDIO OUT
D

DEVICE SUPPLY MT1389E MT1389E

VCC R201 10 R27 IR C35 + CE17 100uF/16V 100pF VSDA VSCK VSTB 10 J2

NAME VCC DV33 RFV33 LDO_AV33 AVCC V18 SD33 +12V -12V PICKUP HEADER MT1389E SDRAM OP AMP. OP AMP.
VCC 6 5 4 3 2 1

TYPE Digital 5V Digital 3.3V Servo 3.3V Laser Diode 3.3V RF 5V Digital 1.8V Digital 3.3V Audio +12V Audio -12V

6x1 W/HOUSING Pitch2.54mm

D23 2 1N4148

D24 2 1N4148

D25 2 1N4148

CON1

0.1uF

L6

VCC_AUDIO FB

+P5V DV33 D1 V33 L9 V33 FB + CB7 0.1uF L10 LDO_AV33 FB + CB8 0.1uF CE8 220uF/16V LDO_AV33 CE7 220uF/16V CE6 + 10uF/16V R223 2.2k RFV33 RFV33 URST# 1N4148 VCC R3 10k AVCC

FB

CB6

0.1uF

L11

VCC

+P5V

FB

CB9

+ CE9

0.1uF

20
L3 +P12V FB CB3 0.1uF CB1 0.1uF + CE1 220uF/16V 220uF/16V V33 FB + CE3 L1 DV33 DV33 +12V PV33 L7 FB V33 L8 VCC AVCC DV33
4 3 2

8 7 6 5 4 3 2 1

+P5V PV33 PV33

+12V -P12V +P12V

PWR, 8P,PITCH=2.54M/M

L2

-12V

-P12V

FB IR VSDA VSCK VSTB IR VSDA VSCK VSTB [2] [2] [2] [2]

CB2

CE2

220uF/16V

URST#

URST# [ 2 ]

+ CE5

DV33 VCC AVCC +12V -12V GND

[ 2,3,4,5 ] [ 2,3,4,5 ] [2]

220uF/16V

+12V -12V GND

[ 4,5 ] [ 4,5 ] [ 2,3,4,5 ]

220uF/16V

Title Size C Date:

MediaTek Incorporation
89E_KHM310&S71_AM5888
Document Number

INDEX
Friday, July 15, 2005
1

Rev 1 Sheet 1 of 5

RFV33 V2P8 CB13

14

L13 V20 CB14 0.1uF

V1P4

RFVDD3 + CE14 47uF/16v 1 C15 74HC04 3 100k 74HC04

7

FB 0.1uF 2 U2B R14 4 NC

0.1uF

C5 47uF/16v L16 2.7u, DIP U2A

C6

C7

+ CE15 R5 750k

0.1uF
100k

0.01uF 1000p C11 10uF/10v XI DV33 TP47 TP48 C26 22p C27 22p Y1 1 XO C27MHz 2
XI XO 7

2200pF

14

RFVDD3

JITFO

C2 JITFN

390pF

XTALI C18 NC

C8

R13
C9

CB15 0.1uF 47uF/16v

C13 R8 1000pF

0.47uF/N.C

6.8 + CE16 +
RFVDD3 C22 0.047uF C23 0.047uF 0 0 APLLVDD3 AADVDD3 PLLVDD3 ADVCM Y6 Y5 Y4 DACVDD3 ADACVDD3 ADACVDD3 ACENTER ALS AL JITFN JITFO XTALI R17 R18 RFV18 AR ARS ASUBW DACVDD3 Y3

20pF

PLLVDD3 1500pF 10uF/10v 0.1uF

V1P4 10uF/25v C10 C12 C127 CB69

R16

PLLVDD3

+
C16

CE12 100uF/16v

CB12

L15
0.1uF

150uH

6800PF FB
216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163

V18 RFV18 CB16 0.1uF R23 4.7k V18 DV33 FS VREF C28 0.1uF R21 2K R39 R42
C21 C25

L32 10uH

V18

L17

C24 0.1uF

AADVDD3

AADVDD3

+ CE35 1000uF/6.3v

C128 6800PF

DV33 C29 C31 C34 TP12 ALRCK TP35 R24 R25 R26 0 0 0 TROUT TRIN LIMIT MUTE_DAC NC C33 1uF 1uF C32 1uF 1uF DACVDD3 ASPDIF RGB_SWITCH 1uF C30

C20

220uF/6.3v

RFVDD3

0.1uF

+ CE13

C19

RFVDD3

ADACVDD3

0.033uF

ADACVDD3

R12 15k C17 0.1uF

0.1uF

L12 10uH

J3

AVDD3 IREF RFGC OSN OSP RFGND CRTPLP HRFZC RFRPAC RFRPDC RFVDD3 ADCVSS ADCVDD3 LPFOP LPFIN LPFIP LPFON PLLVDD3 IDACEXLP PLLVSS JITFN JITFO XTALI XTALO RFVDD18 RFGND18 ADACVDD2 ADACVDD1 ALF(CTR) ALS/SDATA0 AL/SDATA2 AVCM AR/SDATA1 ARS ARF(SW) ADACVSS2 ADACVSS1 APLLVSS APLLCAP APLLVDD AADVDD AKIN1 ADVCM AKIN2 AADVSS R/Cr/CVBS/SY B/Cb/SC DACVSSA G/Y/SY/CVBS DACVDDA DACVSSB DACVDDB CVBS DACVSSC

APLLVDD3

APLLVDD3

+ CE10 100uF/6.3v

CB10 0.1uF

10k 10k

LOADLOAD+ TROUT TRIN 5x1 W/HOUSING Pitch2.0mm

L14

FB

C B A D RFO

1 2 3 4 5

DACVDD3

DACVDD3

+ CE11 10uF/6.3v

CB11 0.1uF

C B A D

MT1389E
Pin Assignment v1.4
MA4 MA5 MA6 MA7 MA8 MA9 DCKE

C3
R213 0

TP45 TP46

E2

AVCC VCC

AVCC

AVCC VCC

[1] [1]

2N3904
CB17 0.1uF TP27 TP6 TP29 TP32 C36 0.1uF C37 V1P4 NC NC R34 TP30 TP31 FEO TEO TEZISLV V2P8 V20 V1P4 DCLK MA3 MA2 MA1 MA0 MA10 TP25 TP26 RFOP RFON

R28

100k

R29

10k

RFVDD3

E F MDI1 MDI2 LDO2 LDO1

IR ALRCK VSDA VSCK VSTB R19 1k R/SMD/0603

IR VSDA VSCK VSTB

[1] [1] [1] [1]

R30

10k

IOA

Q1 2N3904

TOP

0.1uF

2SB1132

24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 V18 STBY V18 R35 A2 0 A3 A4 A5 A6 A7 A8 DV33

PCE# A1 PRD# AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 A17 A0 A18 A19 PWR# A16 A15 A14 A13 A12 A11 A10 A9 VSCK IOA VSTB VSDA SCL SDA RXD TXD TRCLOSE URST# IR

E AVCC1 V20 GND F B A RFO IOA D C TT+ F+ F-

L20

R36

4.7

R37

4.7

HEADER 24 SMD0.5 TOP

Q5

2SB1132

+ CE20

SUMSUNG S71(S75) /

SONY KHM310

1 VCC L21 FB C3 D22 1N4001 R6 680k OPO 2200pF C4 0.1uF/N.C R7 MO_VCC V33

47uF/16v

LDO1

V18

DQM0 DQ7 DQ6 DQ5

10uH

TP41TP42

U15

MO_VCC

TT+ SL+ SL-

R218 10k R219 10k Q28 8550 V18 R15 R20 V18 R9 150k

15 16 17 18 19 20 21 R10 150k NC 1

VOTK+ VOTKVOLD+ VOLDVCC2 NC VCTL

VOFC+ VOFCVOSLVOSL+ VOTR+ VOTRVCC

14 13 12 11 10 9 8

F+ FSPSP+ LOAD+ LOAD-

30

G2

G1

29

FMSO R221 5.6k + CE33 47uF/16v 0.1uF C126 SPSP+ LIMIT SLSL+

TROPEN TRCLOSE

R220 10k

CB67 + CE32 220uF/16v

TRSO V1P4 STBY

22 23 24 25 26 27 28

GND VINLD NC TRB2 VINTK BIAS MUTE

REV FWD REGO1 VINSL+ REGO2 TRB1 VINFC

7 6 5 4 3 2 1

FOSO

0.1uF

R212

CB68

AM5888

10k

0.1uF

TP5 TP4 TP9 TP53 TP13 TP1 TP2

2SB1132

55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108

CB18

Q4

IOA18 IOA19 IOWR# A16 HIGHA7 DVDD3 HIGHA6 HIGHA5 HIGHA4 HIGHA3 HIGHA2 HIGHA1 IOA20 IOCS# IOA1 IOOE# AD0 AD1 AD2 DVSS AD3 AD4 AD5 AD6 IOA21 ALE AD7 A17 IOA0 DVDD18 UWR# URD# DVDD3 UP1_2 UP1_3 GPIO6 UP1_4 UP1_5 UP1_6 UP1_7 UP3_0 UP3_1 UP3_4 UP3_5 GPIO7 ICE PRST# IR INT0# DQM0# RD7 RD6 RD5 DVDD3

21
OPO OPOP+ DMO FMO TROPEN TRO FOO ADIN FS0 FS1 U3 MT1389E LQFP216/SMD R38 10k DV33 0 ADIN OPOP+ R11 C14 2200pF J1 680k V1P4 FOSO TRSO FMSO DMSO C41 C42 330pF 330pF C43 0.1uF C44 0.015uF V1P4 R46 R48 R50 R51

R31

100k

2SK3018

Q2 2SK3018

Q3 2SK3018

FS0 FS1 RGB_SWITCH

FS0 FS1 RGB_SWITCH

[4] [4] [4]

R32 R33

FB

AVCC

100 100

L18

HA1

TP49 TP50

C38 0.1uF

CE18 100uF/16v

BA0 CS# RAS# CAS# WE# DQM1 DQ8 DQ9

DV33

MUTE_DAC CB30 0.1uF CB31 0.1uF CB32 0.1uF URST# Y[3..6]

GND LD-DVD

MUTE_DAC URST# Y[3..6] VIDEO INTERFACE A[0..19] AD[0..7] A[0..19] AD[0..7] [3] [3] [5]

[5] [1]

TP11

TP10

AVCC1 MDI1 LD-CD

TP51

L19

TP52 TP14

10uH

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 AGND DVDA DVDB DVDC DVDD DVDRFIP DVDRFIN MA MB MC MD SA SB SC SD CDFON CDFOP TNI TPI MDI1 MDI2 LDO2 LDO1 SVDD3 CSO/RFOP RFLVL/RFON SGND V2REFO V20 VREFO FEO TEO TEZISLV OP_OUT OP_INN OP_INP DMO FMO TROPENPWM PWMOUT1/ADIN0 TRO FOO FG/ADIN1 GPIO0/VSYNC# GPIO1/HSYNC# GPIO2 IOA2 DVDD18 IOA3 IOA4 IOA5 IOA6 IOA7 HIGHA0 FS VREF DACVDDC SPDIF MC_DATA ASDATA3 ASDATA2 ASDATA1 ASDATA0 ALRCK ACLK ABCK GPIO5 DVSS GPIO4 GPIO3 DVDD18 RA4 RA5 RA6 RA7 RA8 RA9 RA11 CKE DVDD3 RCLK RA3 RA2 RA1 DVDD18 RA0 RA10 BA1 BA0 RCS# RAS# CAS# RWE# DQM1 RD8 RD9 DVSS RD10 RD11 RD12 RD13 RD14 RD15 RD0 RD1 RD2 RD3 RD4 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ0 DQ1 DQ2 DQ3 DQ4 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109

E3

V18

PCE# PRD# PWR#

PCE# PRD# PWR# FLASH MA[0..10] CB19 0.1uF CB20 0.1uF CB21 0.1uF CB22 0.1uF CB23 0.1uF MA[0..10] DQ[0..15] BA0 DQM[0..1] DCLK DQ[0..15] BA0 DQM[0..1] DCLK

[3] [3] [3] [3] [3] [3] [3] [3]

LDO2

CE19 47uF/16v

LDO_AV33

DV33

DCKE CAS# RAS# WE# CS#

DCKE CAS# RAS# WE# CS# MEMORY CB24 0.1uF CB25 0.1uF CB26 0.1uF CB27 0.1uF CB28 0.1uF CB29 0.1uF SCL SDA 27k 27k 15k 10k FOO TRO FMO DMO V18 DV33 J4 SCL SDA V18 IIC VSDA RxD TxD 1 2 3 4 4x1 W/HOUSING Pitch2.54mm VSCK VSDA VSCK

[3] [3] [3] [3] [3]

TP43TP44

[3] [3] [2]

MO_VCC

[5] [5]
A

DMSO

Regulator
KHM310
DV33 6x1 W/HOUSING Pitch2.0mm R22 10k

R32

R33

RS-232
1 2 3 4 5 6

AL AR ALS ARS ACENTER ASUBW ASPDIF

AL AR ALS ARS ACENTER ASUBW ASPDIF AUDIO INTERFACE

[5] [5] [5] [5] [5] [5] [4]

+ CE34 R222

47uF/16v 10k

100
S71/S75

100
0 0
Title

MediaTek Incorporation
89E_SUMSUNGS71_AM5888
Size Document Number Custom Date:

RF&MEPG
Friday, July 15, 2005
3 2 1

Rev 1 Sheet 2 of 5

U5 U7 SD33 SD33

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 DV33 L22 FB SD33

MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 DBA0 FLASH_VCC A0 10k SD33 CB42 0.1uF 0.1uF CB47 0.1uF 0.1uF 0.1uF CB43 0.1uF CB45 CB44 CB46 220uF/16V D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 + CE22 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF CB36 CB38 CB39 CB37 CB40 CB41 WP/ACC BYTE VCC CB49 0.1uF 220uF/16V + CE23 GND1 GND2 27 46 37 47 14 R61 29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45

21 22 23 24 27 28 29 30 31 32 20 19

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA/A11

SDCLK SDCKE FLASH_VCC

35 34

CLK CKE

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

2 3 5 6 8 9 11 12 39 40 42 43 45 46 48 49

DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 SD33 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 9 10 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 CE OE WE RESET 26 28 11 12 STM29W800/MX29LV400(800)

DCS# DRAS# DCAS# DWE# R62 10k PCE# PRD# PWR#

18 17 16 15

CS RAS CAS WE

VCC VCC

1 25

SD33

DQM0 DQM1

14 36

DQML DQMH

33 37 FLASH_VCC

VCCQ VCCQ VCCQ VCCQ

7 13 38 44

NC NC

26 50

VSS VSS

VSSQ VSSQ VSSQ VSSQ

4 10 41 47

TSOP 48 pin

HY57V161610ET-7

4M 8M FLASH
C

[2]

DQ[0..15]

DQ[0..15]

1 1N4148 VCC DV33

22
DV33 RN1 R63 R64 D26 3.6V 33x4 680 680 DCS# DRAS# DCAS# DWE# 1 3 5 7 2 4 6 8 CS# RAS# CAS# WE# SCL SDA DBA0 SDCKE SDCLK DV33 3 R60 R59 33 33 R57 33 BA0 DCKE DCLK L23 L24 NC FLASH_VCC FB CB48 0.1uF + CE24 47uF/16V 3 1N4148 Title Size B Date:
4 3 2

[2] [2] [2] [2] [2] [2] [2] [2] [2]

MA[0..10] BA0 DQM[0..1] DCLK DCKE CAS# RAS# WE# CS# DRAM

MA[0..10] BA0 DQM[0..1] DCLK DCKE CAS# RAS# WE# CS#

DV33

U8

CB50

0.1uF

1 2 3 4

NC NC NC GND

VCC WP SCL SDA

8 7 6 5

EEPROM 24C16 SOP8/SMD

[2] [2] [2] [2] [2]

PCE# PRD# PWR# A[0..19] AD[0..7] FLASH

PCE# PRD# PWR# A[0..19] AD[0..7]

D27

[2] [2]

SCL SDA IIC GND DV33 VCC GND

SCL SDA

[ 1,2,3,4,5 ]

D28

DV33 VCC

[1] [1]
A

MediaTek Incorporation
89E_SUMSUNGS71_AM5888
Document Number

SDRAM&FLASH
Friday, July 15, 2005 Sheet
1

Rev 1 3 of 5

3906 C

+5VV

B
R225 150 V33

SCART CONTROL

R224

150

R66
2

NC CVBS R74
3

VCC Q9 NC +5VV 3906 C_RGB_SWITCH 1k 2K C_FS R83 1K

3

Y3 Q6 3906 1 RGB_SWITCH 1 10k

2

L25 1.8uH,DIP +5VV 3 Q10 2N3904 R79 1K +P12V R81 Q12 2N3904 Q14 2N3904
2 2 3 3

10k 1 L28

R67 150,1% D2 R77 1N4148

3

C45

C46

+P12V

R75

R78

47P

47P

1K

R82

+5VV R227 150 FS0 1 R87 1K CVBS_ST

2

1K 1 CB51 0.1uF Q15 2N3904

+ CE25 47uF/16V

R47 NC R85 1K

R226

FS1 1

150

R69

NC

Y3 1 D18 1N4148
2

L26 1.8uH,DIP Q7 3906 +5VV 3

C47

C48

R70 NC

47P

47P

+5VV R229 150

R228

150

Q8 3906
2

R91 150,1% 1 D21 1N4148 3

C53

C54

47P

47P

23
G/Y +5VV 3 D19 1N4148 COAXIAL 2 CVBS 1 1 P1 CVBS + COAXIAL R231 150 B/U Q13 3906 1 D20 1N4148 3 +5VV R233 150 J5 R/V Q17 3906 +5VV CVBS_ST R/V G/Y B/U GND C_RGB_SWITCH C_FS GND FL FR VCC 1 2 3 4 5 6 7 8 9 10 11 SCART, 11P, PITCH=2.540M/M
4 3

R72

NC

Y4

L27 1.8uH,DIP

R73 150,1%

C49

C50

47P

47P

+5VV

R230

150

R80

NC

Y5

L30 1.8uH,DIP

Y[3..6] GND VCC +12V -12V FS0 FS1 RGB_SWITCH FR FL COAXIAL

Y[3..6]

[2] [1] GND VCC +12V -12V [1] [1] [1] FS0 FS1 RGB_SWITCH FR FL COAXIAL [5] [5] [5] [4] [4] [4]

R86 150,1%

C51

C52

47P

47P

+5VV

R232

150

R90

NC

Y6

L31 1.8uH,DIP

Title

MediaTek Incorporation
89E_KHM310&S71_AM5888
Size Document Number Custom Date:
2

VIDEO OUT PORT

Friday, July 15, 2005
1

Rev 1 Sheet 4 of 5

[2] +12V ASPDIF 0.1uF C66 110 VCC 100pF 100pF C67 R149 CB56 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF CB57 CB58 CB59 CB60 CB61 100 75 COAXIAL -12V CB54 R144 R145

ASPDIF

ASPDIF

[ 2 ] MUTE_DAC

MUTE_DAC

[2] [2] [2] [2] [2] [2] R155 22 4 R156 C69 27pF 0.1uF CB55 22 OPTICAL CE31 + 10uF/16V 5

AL AR ALS ARS ACENTER ASUBW

AL AR ALS ARS ACENTER ASUBW

VCC

+P12V

P4 RCA+SPDIF

R95

R96

NC 1N4148 2 + CE26 R141 31K 470uF/16V

2

D12 1

R102 C63 Q19 3906 -12V EC5 R147

4 3

D14 100P

22k 1 470 ALS

+

1N4148

+ CE29 A_MUTE R110 0 47uF/16V C65 LM833 A_MUTE

8

R108 R148 5.1k + 3 Q23 2N3904 2 1 SL U11A R150 100

D15 1 10k

1N4148 2

100uF/16V

P2

1000P +12V

FL FR C129 4.7nF C130 4.7nF SL SR D17 1 -12V -12V R157 31K C70 -12V EC7 R161
4

4
C

VCC

7 1 5 8 C131 4.7nF C132 4.7nF CENT LFE C133 4.7nF C134 4.7nF
11

R115

R116

MUTE_DAC 1N4148 R125 100k 2

4.7k

100k

R120 10K

Q21 3906

10

2 6 9 3 RCA-AV6

100P

R162 U11B 7 LM833

8

47uF/16V C72 1000P +12V + 5

R92 C55 -12V R99

4

31K 100P

R172 31K C74 100P -12V EC9 R176 10k C76 A_MUTE 1000P
8

EC1 ACENTER
+

R98 U9A 1 LM833

8

R177
4

AL 5.1k 2 FL Q18 2N3904 47uF/16V + 3 C57 1000P +12V R101 100

47uF/16V

R112 31K C59 -12V R119

4

R183 31K C78 100P -12V EC11 ASUBW U9B 7 LM833 A_MUTE FR C80 1000P
8 +

100P

EC3

R118 5.1k C61 1000P

8

R187 47uF/16V 10k

R188
4

AR 6 + 5 Q22 2N3904 R122 100

47uF/16V

+12V

10k

5.1k

10k

5.1k

24
ARS
+

10k 6

5.1k

R163 100

SR Q24 2N3904

A_MUTE

6 7 8

3 2 1

U13A 1 LM833 +12V

R178 100

CENT A_MUTE Q25 2N3904

[1] [1] [1] [1]

-12V +12V DV33 VCC [ 1,2,3,5 ] GND

-12V +12V DV33 VCC GND

[4]

COAXIAL FR FL U13B 7 LM833 +12V Title Size C Date:

2

COAXIAL

FR FL R179 100 LFE A_MUTE Q26 2N3904

[4] [4]

MediaTek Incorporation
89E_SUMSUNGS71_AM5888
Document Number

AUDIO OUT PORT

Friday, July 15, 2005
1

Rev 1 Sheet 5 of 5