// Individual const char B0 const char B1 const char B2 const char B3 const char B4 const char B5 const char

B6 const char B7

bit access constants = 0; = 1; = 2; = 3; = 4; = 5; = 6; = 7;

const unsigned long __FLASH_SIZE = 0x00002000; // rx rx rx rx rx rx rx rx rx rx rx rx rx rx rx rx Working space registers unsigned short R0 ; unsigned short R1 ; unsigned short R2 ; unsigned short R3 ; unsigned short R4 ; unsigned short R5 ; unsigned short R6 ; unsigned short R7 ; unsigned short R8 ; unsigned short R9 ; unsigned short R10; unsigned short R11; unsigned short R12; unsigned short R13; unsigned short R14; unsigned short R15;

const register unsigned short int W = 0; const register unsigned short int F = 1; // Special function registers (SFRs) sfr unsigned short volatile INDF sfr unsigned short volatile TMR0 sfr unsigned short volatile PCL sfr unsigned short volatile STATUS sfr unsigned short FSR register unsigned short *FSRPTR sfr unsigned short volatile PCLATH sfr unsigned short volatile INTCON sfr unsigned short volatile PIR1 sfr unsigned short volatile PIR2 sfr unsigned short volatile TMR1L sfr unsigned short volatile TMR1H sfr unsigned short volatile T1CON sfr unsigned short volatile TMR2 sfr unsigned short volatile T2CON sfr unsigned short volatile SSPBUF sfr unsigned short volatile SSPCON sfr unsigned short volatile CCPR1L sfr unsigned short volatile CCPR1H sfr unsigned short volatile CCP1CON sfr unsigned short volatile RCSTA sfr unsigned short volatile TXREG sfr unsigned short volatile RCREG sfr unsigned short volatile CCP2CON sfr unsigned short volatile ADRESH sfr unsigned short volatile ADCON0 absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute 0x0000; 0x0001; 0x0002; 0x0003; 0x0004; 0x0004; 0x000A; 0x000B; 0x000C; 0x000D; 0x000E; 0x000F; 0x0010; 0x0011; 0x0012; 0x0013; 0x0014; 0x0015; 0x0016; 0x0017; 0x0018; 0x0019; 0x001A; 0x001D; 0x001E; 0x001F;

sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr sfr

unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned

short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short short int int short short short short short short short

volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile

volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile

volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile volatile

OPTION_REG PIE1 PIE2 PCON OSCCON OSCTUNE SSPCON2 PR2 MSK SSPADD SSPMSK SSPSTAT WPUB IOCB VRCON TXSTA SPBRG SPBRGH PWM1CON ECCPAS PSTRCON ADRESL ADCON1 WDTCON CM1CON0 CM2CON0 CM2CON1 EEDAT EEDATA EEADR EEDATH EEADRH SRCON BAUDCTL ANSEL ANSELH EECON1 EECON2 PORTA PORTB PORTC PORTD PORTE CCPR1 CCPR2 CCPR2L CCPR2H TRISA TRISB TRISC TRISD TRISE

absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute absolute

0x0081; 0x008C; 0x008D; 0x008E; 0x008F; 0x0090; 0x0091; 0x0092; 0x0093; 0x0093; 0x0093; 0x0094; 0x0095; 0x0096; 0x0097; 0x0098; 0x0099; 0x009A; 0x009B; 0x009C; 0x009D; 0x009E; 0x009F; 0x0105; 0x0107; 0x0108; 0x0109; 0x010C; 0x010C; 0x010D; 0x010E; 0x010F; 0x0185; 0x0187; 0x0188; 0x0189; 0x018C; 0x018D; 0x0005; 0x0006; 0x0007; 0x0008; 0x0009; 0x0015; 0x001B; 0x001B; 0x001C; 0x0085; 0x0086; 0x0087; 0x0088; 0x0089;

// STATUS bits const register unsigned short int C = 0; sbit C_bit at STATUS.B0; const register unsigned short int DC = 1; sbit DC_bit at STATUS.B1; const register unsigned short int Z = 2; sbit Z_bit at STATUS.B2;

const sbit const sbit const sbit const sbit const sbit

register unsigned short int NOT_PD_bit at STATUS.B3; register unsigned short int NOT_TO_bit at STATUS.B4; register unsigned short int IRP_bit at STATUS.B7; register unsigned short int RP0_bit at STATUS.B5; register unsigned short int RP1_bit at STATUS.B6;

NOT_PD = 3; NOT_TO = 4; IRP = 7; RP0 = 5; RP1 = 6;

// INTCON bits const register unsigned short int sbit RBIF_bit at INTCON.B0; const register unsigned short int sbit INTF_bit at INTCON.B1; const register unsigned short int sbit T0IF_bit at INTCON.B2; const register unsigned short int sbit RBIE_bit at INTCON.B3; const register unsigned short int sbit INTE_bit at INTCON.B4; const register unsigned short int sbit T0IE_bit at INTCON.B5; const register unsigned short int sbit PEIE_bit at INTCON.B6; const register unsigned short int sbit GIE_bit at INTCON.B7; const register unsigned short int sbit TMR0IF_bit at INTCON.B2; const register unsigned short int sbit TMR0IE_bit at INTCON.B5; // PIR1 bits const register unsigned short sbit TMR1IF_bit at PIR1.B0; const register unsigned short sbit TMR2IF_bit at PIR1.B1; const register unsigned short sbit CCP1IF_bit at PIR1.B2; const register unsigned short sbit SSPIF_bit at PIR1.B3; const register unsigned short sbit TXIF_bit at PIR1.B4; const register unsigned short sbit RCIF_bit at PIR1.B5; const register unsigned short sbit ADIF_bit at PIR1.B6; // PIR2 bits const register unsigned short sbit CCP2IF_bit at PIR2.B0; const register unsigned short sbit ULPWUIF_bit at PIR2.B2; const register unsigned short sbit BCLIF_bit at PIR2.B3; const register unsigned short sbit EEIF_bit at PIR2.B4; const register unsigned short sbit C1IF_bit at PIR2.B5;

RBIF = 0; INTF = 1; T0IF = 2; RBIE = 3; INTE = 4; T0IE = 5; PEIE = 6; GIE = 7; TMR0IF = 2; TMR0IE = 5;

int TMR1IF = 0; int TMR2IF = 1; int CCP1IF = 2; int SSPIF = 3; int TXIF = 4; int RCIF = 5; int ADIF = 6;

int CCP2IF = 0; int ULPWUIF = 2; int BCLIF = 3; int EEIF = 4; int C1IF = 5;

const sbit const sbit

register unsigned short int C2IF = 6; C2IF_bit at PIR2.B6; register unsigned short int OSFIF = 7; OSFIF_bit at PIR2.B7;

// T1CON bits const register unsigned short int TMR1ON = 0; sbit TMR1ON_bit at T1CON.B0; const register unsigned short int TMR1CS = 1; sbit TMR1CS_bit at T1CON.B1; const register unsigned short int NOT_T1SYNC = 2; sbit NOT_T1SYNC_bit at T1CON.B2; const register unsigned short int T1OSCEN = 3; sbit T1OSCEN_bit at T1CON.B3; const register unsigned short int TMR1GE = 6; sbit TMR1GE_bit at T1CON.B6; const register unsigned short int T1GINV = 7; sbit T1GINV_bit at T1CON.B7; const register unsigned short int T1INSYNC = 2; sbit T1INSYNC_bit at T1CON.B2; const register unsigned short int T1CKPS0 = 4; sbit T1CKPS0_bit at T1CON.B4; const register unsigned short int T1CKPS1 = 5; sbit T1CKPS1_bit at T1CON.B5; sbit T1GINV_T1CON_bit at T1CON.B7; const register unsigned short int T1SYNC = 2; sbit T1SYNC_bit at T1CON.B2; // T2CON bits const register unsigned short int sbit TMR2ON_bit at T2CON.B2; const register unsigned short int sbit T2CKPS0_bit at T2CON.B0; const register unsigned short int sbit T2CKPS1_bit at T2CON.B1; const register unsigned short int sbit TOUTPS0_bit at T2CON.B3; const register unsigned short int sbit TOUTPS1_bit at T2CON.B4; const register unsigned short int sbit TOUTPS2_bit at T2CON.B5; const register unsigned short int sbit TOUTPS3_bit at T2CON.B6; // SSPCON bits const register unsigned short sbit CKP_bit at SSPCON.B4; const register unsigned short sbit SSPEN_bit at SSPCON.B5; const register unsigned short sbit SSPOV_bit at SSPCON.B6; const register unsigned short sbit WCOL_bit at SSPCON.B7; const register unsigned short sbit SSPM0_bit at SSPCON.B0; const register unsigned short sbit SSPM1_bit at SSPCON.B1; const register unsigned short sbit SSPM2_bit at SSPCON.B2; const register unsigned short TMR2ON = 2; T2CKPS0 = 0; T2CKPS1 = 1; TOUTPS0 = 3; TOUTPS1 = 4; TOUTPS2 = 5; TOUTPS3 = 6;

int CKP = 4; int SSPEN = 5; int SSPOV = 6; int WCOL = 7; int SSPM0 = 0; int SSPM1 = 1; int SSPM2 = 2; int SSPM3 = 3;

sbit SSPM3_bit at SSPCON.B3; // CCP1CON bits const register unsigned short int sbit CCP1M0_bit at CCP1CON.B0; const register unsigned short int sbit CCP1M1_bit at CCP1CON.B1; const register unsigned short int sbit CCP1M2_bit at CCP1CON.B2; const register unsigned short int sbit CCP1M3_bit at CCP1CON.B3; const register unsigned short int sbit DC1B0_bit at CCP1CON.B4; const register unsigned short int sbit DC1B1_bit at CCP1CON.B5; const register unsigned short int sbit P1M0_bit at CCP1CON.B6; const register unsigned short int sbit P1M1_bit at CCP1CON.B7; const register unsigned short int sbit CCP1Y_bit at CCP1CON.B4; const register unsigned short int sbit CCP1X_bit at CCP1CON.B5; // RCSTA bits const register unsigned short int sbit RX9D_bit at RCSTA.B0; const register unsigned short int sbit OERR_bit at RCSTA.B1; const register unsigned short int sbit FERR_bit at RCSTA.B2; const register unsigned short int sbit ADDEN_bit at RCSTA.B3; const register unsigned short int sbit CREN_bit at RCSTA.B4; const register unsigned short int sbit SREN_bit at RCSTA.B5; const register unsigned short int sbit RX9_bit at RCSTA.B6; const register unsigned short int sbit SPEN_bit at RCSTA.B7; const register unsigned short int sbit RCD8_bit at RCSTA.B0; const register unsigned short int sbit RC9_bit at RCSTA.B6; const register unsigned short int sbit NOT_RC8_bit at RCSTA.B6; const register unsigned short int sbit RC8_9_bit at RCSTA.B6; // CCP2CON bits const register unsigned short int sbit DC2B0_bit at CCP2CON.B4; const register unsigned short int sbit DC2B1_bit at CCP2CON.B5; const register unsigned short int sbit CCP2M0_bit at CCP2CON.B0; const register unsigned short int sbit CCP2M1_bit at CCP2CON.B1; const register unsigned short int CCP1M0 = 0; CCP1M1 = 1; CCP1M2 = 2; CCP1M3 = 3; DC1B0 = 4; DC1B1 = 5; P1M0 = 6; P1M1 = 7; CCP1Y = 4; CCP1X = 5;

RX9D = 0; OERR = 1; FERR = 2; ADDEN = 3; CREN = 4; SREN = 5; RX9 = 6; SPEN = 7; RCD8 = 0; RC9 = 6; NOT_RC8 = 6; RC8_9 = 6;

DC2B0 = 4; DC2B1 = 5; CCP2M0 = 0; CCP2M1 = 1; CCP2M2 = 2;

sbit const sbit const sbit const sbit

CCP2M2_bit at CCP2CON.B2; register unsigned short int CCP2M3 = 3; CCP2M3_bit at CCP2CON.B3; register unsigned short int CCP2Y = 4; CCP2Y_bit at CCP2CON.B4; register unsigned short int CCP2X = 5; CCP2X_bit at CCP2CON.B5;

// ADCON0 bits const register unsigned short int ADON = 0; sbit ADON_bit at ADCON0.B0; const register unsigned short int GO_NOT_DONE = 1; sbit GO_NOT_DONE_bit at ADCON0.B1; const register unsigned short int GO = 1; sbit GO_bit at ADCON0.B1; const register unsigned short int CHS0 = 2; sbit CHS0_bit at ADCON0.B2; const register unsigned short int CHS1 = 3; sbit CHS1_bit at ADCON0.B3; const register unsigned short int CHS2 = 4; sbit CHS2_bit at ADCON0.B4; const register unsigned short int CHS3 = 5; sbit CHS3_bit at ADCON0.B5; const register unsigned short int ADCS0 = 6; sbit ADCS0_bit at ADCON0.B6; const register unsigned short int ADCS1 = 7; sbit ADCS1_bit at ADCON0.B7; const register unsigned short int NOT_DONE = 1; sbit NOT_DONE_bit at ADCON0.B1; const register unsigned short int GO_DONE = 1; sbit GO_DONE_bit at ADCON0.B1; // OPTION_REG bits const register unsigned short int PSA = 3; sbit PSA_bit at OPTION_REG.B3; const register unsigned short int T0SE = 4; sbit T0SE_bit at OPTION_REG.B4; const register unsigned short int T0CS = 5; sbit T0CS_bit at OPTION_REG.B5; const register unsigned short int INTEDG = 6; sbit INTEDG_bit at OPTION_REG.B6; const register unsigned short int NOT_RBPU = 7; sbit NOT_RBPU_bit at OPTION_REG.B7; const register unsigned short int PS0 = 0; sbit PS0_bit at OPTION_REG.B0; const register unsigned short int PS1 = 1; sbit PS1_bit at OPTION_REG.B1; const register unsigned short int PS2 = 2; sbit PS2_bit at OPTION_REG.B2; // PIE1 bits const register unsigned short sbit TMR1IE_bit at PIE1.B0; const register unsigned short sbit TMR2IE_bit at PIE1.B1; const register unsigned short sbit CCP1IE_bit at PIE1.B2; const register unsigned short sbit SSPIE_bit at PIE1.B3; const register unsigned short int TMR1IE = 0; int TMR2IE = 1; int CCP1IE = 2; int SSPIE = 3; int TXIE = 4;

sbit const sbit const sbit

TXIE_bit register RCIE_bit register ADIE_bit

at PIE1.B4; unsigned short int RCIE = 5; at PIE1.B5; unsigned short int ADIE = 6; at PIE1.B6; int CCP2IE = 0; int ULPWUIE = 2; int BCLIE = 3; int EEIE = 4; int C1IE = 5; int C2IE = 6; int OSFIE = 7;

// PIE2 bits const register unsigned short sbit CCP2IE_bit at PIE2.B0; const register unsigned short sbit ULPWUIE_bit at PIE2.B2; const register unsigned short sbit BCLIE_bit at PIE2.B3; const register unsigned short sbit EEIE_bit at PIE2.B4; const register unsigned short sbit C1IE_bit at PIE2.B5; const register unsigned short sbit C2IE_bit at PIE2.B6; const register unsigned short sbit OSFIE_bit at PIE2.B7; // PCON bits const register unsigned short sbit NOT_BOR_bit at PCON.B0; const register unsigned short sbit NOT_POR_bit at PCON.B1; const register unsigned short sbit SBOREN_bit at PCON.B4; const register unsigned short sbit ULPWUE_bit at PCON.B5; const register unsigned short sbit NOT_BO_bit at PCON.B0; // OSCCON bits const register unsigned short sbit SCS_bit at OSCCON.B0; const register unsigned short sbit LTS_bit at OSCCON.B1; const register unsigned short sbit HTS_bit at OSCCON.B2; const register unsigned short sbit OSTS_bit at OSCCON.B3; const register unsigned short sbit IRCF0_bit at OSCCON.B4; const register unsigned short sbit IRCF1_bit at OSCCON.B5; const register unsigned short sbit IRCF2_bit at OSCCON.B6; // OSCTUNE bits const register unsigned short sbit TUN0_bit at OSCTUNE.B0; const register unsigned short sbit TUN1_bit at OSCTUNE.B1; const register unsigned short sbit TUN2_bit at OSCTUNE.B2; const register unsigned short sbit TUN3_bit at OSCTUNE.B3; const register unsigned short

int NOT_BOR = 0; int NOT_POR = 1; int SBOREN = 4; int ULPWUE = 5; int NOT_BO = 0;

int SCS = 0; int LTS = 1; int HTS = 2; int OSTS = 3; int IRCF0 = 4; int IRCF1 = 5; int IRCF2 = 6;

int TUN0 = 0; int TUN1 = 1; int TUN2 = 2; int TUN3 = 3; int TUN4 = 4;

sbit TUN4_bit at OSCTUNE.B4; // SSPCON2 bits const register unsigned short int sbit SEN_bit at SSPCON2.B0; const register unsigned short int sbit RSEN_bit at SSPCON2.B1; const register unsigned short int sbit PEN_bit at SSPCON2.B2; const register unsigned short int sbit RCEN_bit at SSPCON2.B3; const register unsigned short int sbit ACKEN_bit at SSPCON2.B4; const register unsigned short int sbit ACKDT_bit at SSPCON2.B5; const register unsigned short int sbit ACKSTAT_bit at SSPCON2.B6; const register unsigned short int sbit GCEN_bit at SSPCON2.B7; // MSK, SSPMSK const register sbit MSK0_bit const register sbit MSK1_bit const register sbit MSK2_bit const register sbit MSK3_bit const register sbit MSK4_bit const register sbit MSK5_bit const register sbit MSK6_bit const register sbit MSK7_bit bits unsigned short at MSK.B0; unsigned short at MSK.B1; unsigned short at MSK.B2; unsigned short at MSK.B3; unsigned short at MSK.B4; unsigned short at MSK.B5; unsigned short at MSK.B6; unsigned short at MSK.B7; SEN = 0; RSEN = 1; PEN = 2; RCEN = 3; ACKEN = 4; ACKDT = 5; ACKSTAT = 6; GCEN = 7;

int MSK0 = 0; int MSK1 = 1; int MSK2 = 2; int MSK3 = 3; int MSK4 = 4; int MSK5 = 5; int MSK6 = 6; int MSK7 = 7;

// SSPSTAT bits const register unsigned short int sbit BF_bit at SSPSTAT.B0; const register unsigned short int sbit UA_bit at SSPSTAT.B1; const register unsigned short int sbit R_NOT_W_bit at SSPSTAT.B2; const register unsigned short int sbit S_bit at SSPSTAT.B3; const register unsigned short int sbit P_bit at SSPSTAT.B4; const register unsigned short int sbit D_NOT_A_bit at SSPSTAT.B5; const register unsigned short int sbit CKE_bit at SSPSTAT.B6; const register unsigned short int sbit SMP_bit at SSPSTAT.B7; const register unsigned short int sbit R_bit at SSPSTAT.B2; const register unsigned short int sbit D_bit at SSPSTAT.B5; const register unsigned short int

BF = 0; UA = 1; R_NOT_W = 2; S = 3; P = 4; D_NOT_A = 5; CKE = 6; SMP = 7; R = 2; D = 5; I2C_READ = 2;

sbit const sbit const sbit const sbit const sbit const sbit const sbit const sbit const sbit const sbit const sbit const sbit

I2C_READ_bit at SSPSTAT.B2; register unsigned short int I2C_START_ = 3; I2C_START__bit at SSPSTAT.B3; register unsigned short int I2C_STOP_ = 4; I2C_STOP__bit at SSPSTAT.B4; register unsigned short int I2C_DATA = 5; I2C_DATA_bit at SSPSTAT.B5; register unsigned short int NOT_W = 2; NOT_W_bit at SSPSTAT.B2; register unsigned short int NOT_A = 5; NOT_A_bit at SSPSTAT.B5; register unsigned short int NOT_WRITE = 2; NOT_WRITE_bit at SSPSTAT.B2; register unsigned short int NOT_ADDRESS = 5; NOT_ADDRESS_bit at SSPSTAT.B5; register unsigned short int R_W = 2; R_W_bit at SSPSTAT.B2; register unsigned short int D_A = 5; D_A_bit at SSPSTAT.B5; register unsigned short int READ_WRITE = 2; READ_WRITE_bit at SSPSTAT.B2; register unsigned short int DATA_ADDRESS = 5; DATA_ADDRESS_bit at SSPSTAT.B5; int WPUB0 = 0; int WPUB1 = 1; int WPUB2 = 2; int WPUB3 = 3; int WPUB4 = 4; int WPUB5 = 5; int WPUB6 = 6; int WPUB7 = 7;

// WPUB bits const register unsigned short sbit WPUB0_bit at WPUB.B0; const register unsigned short sbit WPUB1_bit at WPUB.B1; const register unsigned short sbit WPUB2_bit at WPUB.B2; const register unsigned short sbit WPUB3_bit at WPUB.B3; const register unsigned short sbit WPUB4_bit at WPUB.B4; const register unsigned short sbit WPUB5_bit at WPUB.B5; const register unsigned short sbit WPUB6_bit at WPUB.B6; const register unsigned short sbit WPUB7_bit at WPUB.B7; // IOCB bits const register unsigned short sbit IOCB0_bit at IOCB.B0; const register unsigned short sbit IOCB1_bit at IOCB.B1; const register unsigned short sbit IOCB2_bit at IOCB.B2; const register unsigned short sbit IOCB3_bit at IOCB.B3; const register unsigned short sbit IOCB4_bit at IOCB.B4; const register unsigned short sbit IOCB5_bit at IOCB.B5; const register unsigned short sbit IOCB6_bit at IOCB.B6; const register unsigned short sbit IOCB7_bit at IOCB.B7;

int IOCB0 = 0; int IOCB1 = 1; int IOCB2 = 2; int IOCB3 = 3; int IOCB4 = 4; int IOCB5 = 5; int IOCB6 = 6; int IOCB7 = 7;

// VRCON bits const register unsigned short sbit VRSS_bit at VRCON.B4; const register unsigned short sbit VRR_bit at VRCON.B5; const register unsigned short sbit VROE_bit at VRCON.B6; const register unsigned short sbit VREN_bit at VRCON.B7; const register unsigned short sbit VR0_bit at VRCON.B0; const register unsigned short sbit VR1_bit at VRCON.B1; const register unsigned short sbit VR2_bit at VRCON.B2; const register unsigned short sbit VR3_bit at VRCON.B3;

int VRSS = 4; int VRR = 5; int VROE = 6; int VREN = 7; int VR0 = 0; int VR1 = 1; int VR2 = 2; int VR3 = 3;

// TXSTA bits const register unsigned short int sbit TX9D_bit at TXSTA.B0; const register unsigned short int sbit TRMT_bit at TXSTA.B1; const register unsigned short int sbit BRGH_bit at TXSTA.B2; const register unsigned short int sbit SENDB_bit at TXSTA.B3; const register unsigned short int sbit SYNC_bit at TXSTA.B4; const register unsigned short int sbit TXEN_bit at TXSTA.B5; const register unsigned short int sbit TX9_bit at TXSTA.B6; const register unsigned short int sbit CSRC_bit at TXSTA.B7; const register unsigned short int sbit TXD8_bit at TXSTA.B0; const register unsigned short int sbit NOT_TX8_bit at TXSTA.B6; const register unsigned short int sbit TX8_9_bit at TXSTA.B6; // SPBRG bits const register sbit BRG0_bit const register sbit BRG1_bit const register sbit BRG2_bit const register sbit BRG3_bit const register sbit BRG4_bit const register sbit BRG5_bit const register sbit BRG6_bit const register sbit BRG7_bit unsigned short at SPBRG.B0; unsigned short at SPBRG.B1; unsigned short at SPBRG.B2; unsigned short at SPBRG.B3; unsigned short at SPBRG.B4; unsigned short at SPBRG.B5; unsigned short at SPBRG.B6; unsigned short at SPBRG.B7;

TX9D = 0; TRMT = 1; BRGH = 2; SENDB = 3; SYNC = 4; TXEN = 5; TX9 = 6; CSRC = 7; TXD8 = 0; NOT_TX8 = 6; TX8_9 = 6;

int BRG0 = 0; int BRG1 = 1; int BRG2 = 2; int BRG3 = 3; int BRG4 = 4; int BRG5 = 5; int BRG6 = 6; int BRG7 = 7;

// SPBRGH bits const register unsigned short sbit BRG8_bit at SPBRGH.B0; const register unsigned short sbit BRG9_bit at SPBRGH.B1; const register unsigned short sbit BRG10_bit at SPBRGH.B2; const register unsigned short sbit BRG11_bit at SPBRGH.B3; const register unsigned short sbit BRG12_bit at SPBRGH.B4; const register unsigned short sbit BRG13_bit at SPBRGH.B5; const register unsigned short sbit BRG14_bit at SPBRGH.B6; const register unsigned short sbit BRG15_bit at SPBRGH.B7;

int BRG8 = 0; int BRG9 = 1; int BRG10 = 2; int BRG11 = 3; int BRG12 = 4; int BRG13 = 5; int BRG14 = 6; int BRG15 = 7;

// PWM1CON bits const register unsigned short int sbit PRSEN_bit at PWM1CON.B7; const register unsigned short int sbit PDC0_bit at PWM1CON.B0; const register unsigned short int sbit PDC1_bit at PWM1CON.B1; const register unsigned short int sbit PDC2_bit at PWM1CON.B2; const register unsigned short int sbit PDC3_bit at PWM1CON.B3; const register unsigned short int sbit PDC4_bit at PWM1CON.B4; const register unsigned short int sbit PDC5_bit at PWM1CON.B5; const register unsigned short int sbit PDC6_bit at PWM1CON.B6; // ECCPAS bits const register unsigned short int sbit ECCPASE_bit at ECCPAS.B7; const register unsigned short int sbit PSSBD0_bit at ECCPAS.B0; const register unsigned short int sbit PSSBD1_bit at ECCPAS.B1; const register unsigned short int sbit PSSAC0_bit at ECCPAS.B2; const register unsigned short int sbit PSSAC1_bit at ECCPAS.B3; const register unsigned short int sbit ECCPAS0_bit at ECCPAS.B4; const register unsigned short int sbit ECCPAS1_bit at ECCPAS.B5; const register unsigned short int sbit ECCPAS2_bit at ECCPAS.B6;

PRSEN = 7; PDC0 = 0; PDC1 = 1; PDC2 = 2; PDC3 = 3; PDC4 = 4; PDC5 = 5; PDC6 = 6;

ECCPASE = 7; PSSBD0 = 0; PSSBD1 = 1; PSSAC0 = 2; PSSAC1 = 3; ECCPAS0 = 4; ECCPAS1 = 5; ECCPAS2 = 6;

// PSTRCON bits const register unsigned short int STRA = 0; sbit STRA_bit at PSTRCON.B0; const register unsigned short int STRB = 1; sbit STRB_bit at PSTRCON.B1; const register unsigned short int STRC = 2;

sbit const sbit const sbit

STRC_bit at PSTRCON.B2; register unsigned short int STRD = 3; STRD_bit at PSTRCON.B3; register unsigned short int STRSYNC = 4; STRSYNC_bit at PSTRCON.B4;

// ADCON1 bits const register unsigned short int VCFG0 = 4; sbit VCFG0_bit at ADCON1.B4; const register unsigned short int VCFG1 = 5; sbit VCFG1_bit at ADCON1.B5; const register unsigned short int ADFM = 7; sbit ADFM_bit at ADCON1.B7; // WDTCON bits const register unsigned short int sbit SWDTEN_bit at WDTCON.B0; const register unsigned short int sbit WDTPS0_bit at WDTCON.B1; const register unsigned short int sbit WDTPS1_bit at WDTCON.B2; const register unsigned short int sbit WDTPS2_bit at WDTCON.B3; const register unsigned short int sbit WDTPS3_bit at WDTCON.B4; // CM1CON0 bits const register unsigned short int sbit C1R_bit at CM1CON0.B2; const register unsigned short int sbit C1POL_bit at CM1CON0.B4; const register unsigned short int sbit C1OE_bit at CM1CON0.B5; const register unsigned short int sbit C1OUT_bit at CM1CON0.B6; const register unsigned short int sbit C1ON_bit at CM1CON0.B7; const register unsigned short int sbit C1CH0_bit at CM1CON0.B0; const register unsigned short int sbit C1CH1_bit at CM1CON0.B1; // CM2CON0 bits const register unsigned short int sbit C2R_bit at CM2CON0.B2; const register unsigned short int sbit C2POL_bit at CM2CON0.B4; const register unsigned short int sbit C2OE_bit at CM2CON0.B5; const register unsigned short int sbit C2OUT_bit at CM2CON0.B6; const register unsigned short int sbit C2ON_bit at CM2CON0.B7; const register unsigned short int sbit C2CH0_bit at CM2CON0.B0; const register unsigned short int sbit C2CH1_bit at CM2CON0.B1; SWDTEN = 0; WDTPS0 = 1; WDTPS1 = 2; WDTPS2 = 3; WDTPS3 = 4;

C1R = 2; C1POL = 4; C1OE = 5; C1OUT = 6; C1ON = 7; C1CH0 = 0; C1CH1 = 1;

C2R = 2; C2POL = 4; C2OE = 5; C2OUT = 6; C2ON = 7; C2CH0 = 0; C2CH1 = 1;

// CM2CON1 bits const register unsigned short int C2SYNC = 0;

sbit const sbit const sbit const sbit const sbit const sbit

C2SYNC_bit at CM2CON1.B0; register unsigned short int T1GSS_bit at CM2CON1.B1; register unsigned short int C2RSEL_bit at CM2CON1.B4; register unsigned short int C1RSEL_bit at CM2CON1.B5; register unsigned short int MC2OUT_bit at CM2CON1.B6; register unsigned short int MC1OUT_bit at CM2CON1.B7;

T1GSS = 1; C2RSEL = 4; C1RSEL = 5; MC2OUT = 6; MC1OUT = 7;

// SRCON bits const register unsigned short sbit FVREN_bit at SRCON.B0; const register unsigned short sbit PULSR_bit at SRCON.B2; const register unsigned short sbit PULSS_bit at SRCON.B3; const register unsigned short sbit C2REN_bit at SRCON.B4; const register unsigned short sbit C1SEN_bit at SRCON.B5; const register unsigned short sbit SR0_bit at SRCON.B6; const register unsigned short sbit SR1_bit at SRCON.B7;

int FVREN = 0; int PULSR = 2; int PULSS = 3; int C2REN = 4; int C1SEN = 5; int SR0 = 6; int SR1 = 7;

// BAUDCTL bits const register unsigned short int sbit ABDEN_bit at BAUDCTL.B0; const register unsigned short int sbit WUE_bit at BAUDCTL.B1; const register unsigned short int sbit BRG16_bit at BAUDCTL.B3; const register unsigned short int sbit SCKP_bit at BAUDCTL.B4; const register unsigned short int sbit RCIDL_bit at BAUDCTL.B6; const register unsigned short int sbit ABDOVF_bit at BAUDCTL.B7; // ANSEL bits const register sbit ANS0_bit const register sbit ANS1_bit const register sbit ANS2_bit const register sbit ANS3_bit const register sbit ANS4_bit const register sbit ANS5_bit const register sbit ANS6_bit const register sbit ANS7_bit unsigned short at ANSEL.B0; unsigned short at ANSEL.B1; unsigned short at ANSEL.B2; unsigned short at ANSEL.B3; unsigned short at ANSEL.B4; unsigned short at ANSEL.B5; unsigned short at ANSEL.B6; unsigned short at ANSEL.B7;

ABDEN = 0; WUE = 1; BRG16 = 3; SCKP = 4; RCIDL = 6; ABDOVF = 7;

int ANS0 = 0; int ANS1 = 1; int ANS2 = 2; int ANS3 = 3; int ANS4 = 4; int ANS5 = 5; int ANS6 = 6; int ANS7 = 7;

// ANSELH bits const register unsigned short sbit ANS8_bit at ANSELH.B0; const register unsigned short sbit ANS9_bit at ANSELH.B1; const register unsigned short sbit ANS10_bit at ANSELH.B2; const register unsigned short sbit ANS11_bit at ANSELH.B3; const register unsigned short sbit ANS12_bit at ANSELH.B4; const register unsigned short sbit ANS13_bit at ANSELH.B5; // EECON1 bits const register unsigned short sbit RD_bit at EECON1.B0; const register unsigned short sbit WR_bit at EECON1.B1; const register unsigned short sbit WREN_bit at EECON1.B2; const register unsigned short sbit WRERR_bit at EECON1.B3; const register unsigned short sbit EEPGD_bit at EECON1.B7; // PORTA bits const register unsigned short sbit RA7_bit at PORTA.B7; const register unsigned short sbit RA6_bit at PORTA.B6; const register unsigned short sbit RA5_bit at PORTA.B5; const register unsigned short sbit RA4_bit at PORTA.B4; const register unsigned short sbit RA3_bit at PORTA.B3; const register unsigned short sbit RA2_bit at PORTA.B2; const register unsigned short sbit RA1_bit at PORTA.B1; const register unsigned short sbit RA0_bit at PORTA.B0; // PORTB bits const register unsigned short sbit RB7_bit at PORTB.B7; const register unsigned short sbit RB6_bit at PORTB.B6; const register unsigned short sbit RB5_bit at PORTB.B5; const register unsigned short sbit RB4_bit at PORTB.B4; const register unsigned short sbit RB3_bit at PORTB.B3; const register unsigned short sbit RB2_bit at PORTB.B2; const register unsigned short sbit RB1_bit at PORTB.B1; const register unsigned short

int ANS8 = 0; int ANS9 = 1; int ANS10 = 2; int ANS11 = 3; int ANS12 = 4; int ANS13 = 5;

int RD = 0; int WR = 1; int WREN = 2; int WRERR = 3; int EEPGD = 7;

int RA7 = 7; int RA6 = 6; int RA5 = 5; int RA4 = 4; int RA3 = 3; int RA2 = 2; int RA1 = 1; int RA0 = 0;

int RB7 = 7; int RB6 = 6; int RB5 = 5; int RB4 = 4; int RB3 = 3; int RB2 = 2; int RB1 = 1; int RB0 = 0;

sbit RB0_bit at PORTB.B0; // PORTC bits const register unsigned short sbit RC7_bit at PORTC.B7; const register unsigned short sbit RC6_bit at PORTC.B6; const register unsigned short sbit RC5_bit at PORTC.B5; const register unsigned short sbit RC4_bit at PORTC.B4; const register unsigned short sbit RC3_bit at PORTC.B3; const register unsigned short sbit RC2_bit at PORTC.B2; const register unsigned short sbit RC1_bit at PORTC.B1; const register unsigned short sbit RC0_bit at PORTC.B0; // PORTD bits const register unsigned short sbit RD7_bit at PORTD.B7; const register unsigned short sbit RD6_bit at PORTD.B6; const register unsigned short sbit RD5_bit at PORTD.B5; const register unsigned short sbit RD4_bit at PORTD.B4; const register unsigned short sbit RD3_bit at PORTD.B3; const register unsigned short sbit RD2_bit at PORTD.B2; const register unsigned short sbit RD1_bit at PORTD.B1; const register unsigned short sbit RD0_bit at PORTD.B0; // PORTE bits const register unsigned short sbit RE3_bit at PORTE.B3; const register unsigned short sbit RE2_bit at PORTE.B2; const register unsigned short sbit RE1_bit at PORTE.B1; const register unsigned short sbit RE0_bit at PORTE.B0; // TRISA bits const register unsigned short sbit TRISA7_bit at TRISA.B7; const register unsigned short sbit TRISA6_bit at TRISA.B6; const register unsigned short sbit TRISA5_bit at TRISA.B5; const register unsigned short sbit TRISA4_bit at TRISA.B4; const register unsigned short sbit TRISA3_bit at TRISA.B3; const register unsigned short int RC7 = 7; int RC6 = 6; int RC5 = 5; int RC4 = 4; int RC3 = 3; int RC2 = 2; int RC1 = 1; int RC0 = 0;

int RD7 = 7; int RD6 = 6; int RD5 = 5; int RD4 = 4; int RD3 = 3; int RD2 = 2; int RD1 = 1; int RD0 = 0;

int RE3 = 3; int RE2 = 2; int RE1 = 1; int RE0 = 0;

int TRISA7 = 7; int TRISA6 = 6; int TRISA5 = 5; int TRISA4 = 4; int TRISA3 = 3; int TRISA2 = 2;

sbit const sbit const sbit

TRISA2_bit at TRISA.B2; register unsigned short int TRISA1 = 1; TRISA1_bit at TRISA.B1; register unsigned short int TRISA0 = 0; TRISA0_bit at TRISA.B0; int TRISB7 = 7; int TRISB6 = 6; int TRISB5 = 5; int TRISB4 = 4; int TRISB3 = 3; int TRISB2 = 2; int TRISB1 = 1; int TRISB0 = 0;

// TRISB bits const register unsigned short sbit TRISB7_bit at TRISB.B7; const register unsigned short sbit TRISB6_bit at TRISB.B6; const register unsigned short sbit TRISB5_bit at TRISB.B5; const register unsigned short sbit TRISB4_bit at TRISB.B4; const register unsigned short sbit TRISB3_bit at TRISB.B3; const register unsigned short sbit TRISB2_bit at TRISB.B2; const register unsigned short sbit TRISB1_bit at TRISB.B1; const register unsigned short sbit TRISB0_bit at TRISB.B0; // TRISC bits const register unsigned short sbit TRISC7_bit at TRISC.B7; const register unsigned short sbit TRISC6_bit at TRISC.B6; const register unsigned short sbit TRISC5_bit at TRISC.B5; const register unsigned short sbit TRISC4_bit at TRISC.B4; const register unsigned short sbit TRISC3_bit at TRISC.B3; const register unsigned short sbit TRISC2_bit at TRISC.B2; const register unsigned short sbit TRISC1_bit at TRISC.B1; const register unsigned short sbit TRISC0_bit at TRISC.B0; // TRISD bits const register unsigned short sbit TRISD7_bit at TRISD.B7; const register unsigned short sbit TRISD6_bit at TRISD.B6; const register unsigned short sbit TRISD5_bit at TRISD.B5; const register unsigned short sbit TRISD4_bit at TRISD.B4; const register unsigned short sbit TRISD3_bit at TRISD.B3; const register unsigned short sbit TRISD2_bit at TRISD.B2; const register unsigned short sbit TRISD1_bit at TRISD.B1; const register unsigned short sbit TRISD0_bit at TRISD.B0;

int TRISC7 = 7; int TRISC6 = 6; int TRISC5 = 5; int TRISC4 = 4; int TRISC3 = 3; int TRISC2 = 2; int TRISC1 = 1; int TRISC0 = 0;

int TRISD7 = 7; int TRISD6 = 6; int TRISD5 = 5; int TRISD4 = 4; int TRISD3 = 3; int TRISD2 = 2; int TRISD1 = 1; int TRISD0 = 0;

// TRISE bits const register unsigned short sbit TRISE3_bit at TRISE.B3; const register unsigned short sbit TRISE2_bit at TRISE.B2; const register unsigned short sbit TRISE1_bit at TRISE.B1; const register unsigned short sbit TRISE0_bit at TRISE.B0;

int TRISE3 = 3; int TRISE2 = 2; int TRISE1 = 1; int TRISE0 = 0;