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Nonlinear Electronics 2: Flip-Flops, ADC, DAC and PLL

Nonlinear Electronics 2: Flip-Flops, ADC, DAC and PLL

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Nonlinear Electronics 2: Flip-Flops, ADC, DAC and PLL

512 pagine
3 ore
Aug 26, 2019


Nonlinear Electronics 2: Flip-Flops, ADC, DAC and PLL deals with the appearance of nonlinear electronic circuits and their behavior. The book covers a number of circuits that interface between analog and digital electronics, such as astable, monostable, biostable, Schmitt trigger, analog-to-digital conversion and digital-to-analog conversion. In addition, the book deals with all aspects of these circuits, starting from discrete component and gradually going to the integrated circuit.

  • Presents non-linear electronic circuits and their behavior
  • Talks about relaxation oscillators
  • Treats subjects from the discrete element to the integrated device
  • Presents interface circuits, analog-to-digital conversion, analog-to-analog conversion, and PLL (phase locked loop)
Aug 26, 2019

Informazioni sull'autore

Brahim Haraoubiais University Professor. He has worked in several universities, including French and Algerian.He is the author of several publications, patent patents, and academic books published in the field of research and pedagogy.He is also Professor at the Higher School of Technology and at the Higher School of Air Defense Territory (Algiers).

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Nonlinear Electronics 2 - Brahim Haraoubia

Nonlinear Electronics 2

Flip-Flops, ADC, DAC and PLL

Brahim Haraoubia

Series Editor

Robert Baptist

Table of Contents

Cover image

Title page



1: Flip-flops


1.1 Overview of the different types of flip-flops

1.2 Monostable flip-flops

1.3 Bistable circuits

1.4 The Schmitt flip-flop

1.5 Exercises on flip-flops

2: Analog-to-Digital and Digital-to-Analog Converters


2.1 General information

2.2 Analog/digital and digital/analog conversion

2.3 Analog-to-digital converters

2.4 Digital-to-analog converters

2.5 Exercises on DACs and ADCs

3: The Phase-locked Loop (PLL)


3.1 Introduction

3.2 Relationship between frequency and instantaneous phase

3.3 Origin of the phase-locked loop

3.4 Phase-locked loop (PLL)

3.5 Study of the elements that constitute a PLL

3.6 Examples of integrated PLL

3.7 PLL block diagram

3.8 Study of the behavior of a PLL

3.9 Applications for PLLs

3.10 Exercises on PLLs




First published 2019 in Great Britain and the United States by ISTE Press Ltd and Elsevier Ltd

Apart from any fair dealing for the purposes of research or private study, or criticism or review, as permitted under the Copyright, Designs and Patents Act 1988, this publication may only be reproduced, stored or transmitted, in any form or by any means, with the prior permission in writing of the publishers, or in the case of reprographic reproduction in accordance with the terms and licenses issued by the CLA. Enquiries concerning reproduction outside these terms should be sent to the publishers at the undermentioned address:

ISTE Press Ltd

27-37 St George’s Road

London SW19 4EU


Elsevier Ltd

The Boulevard, Langford Lane

Kidlington, Oxford, OX5 1GB



Knowledge and best practice in this field are constantly changing. As new research and experience broaden our understanding, changes in research methods, professional practices, or medical treatment may become necessary.

Practitioners and researchers must always rely on their own experience and knowledge in evaluating and using any information, methods, compounds, or experiments described herein. In using such information or methods they should be mindful of their own safety and the safety of others, including parties for whom they have a professional responsibility.

To the fullest extent of the law, neither the Publisher nor the authors, contributors, or editors, assume any liability for any injury and/or damage to persons or property as a matter of products liability, negligence or otherwise, or from any use or operation of any methods, products, instructions, or ideas contained in the material herein.

For information on all our publications visit our website at

© ISTE Press Ltd 2019

The rights of Brahim Haraoubia to be identified as the author of this work have been asserted by him in accordance with the Copyright, Designs and Patents Act 1988.

British Library Cataloguing-in-Publication Data

A CIP record for this book is available from the British Library

Library of Congress Cataloging in Publication Data

A catalog record for this book is available from the Library of Congress

ISBN 978-1-78548-301-1

Printed and bound in the UK and US


Brahim Haraoubia April 2019

This book is a follow-up to the first book entitled Nonlinear Electronics 1 – Nonlinear Dipoles, Harmonic Oscillators and Switching Circuits.

The use of a pedagogy that gradually introduces the difficulties encountered in the subject has made it possible to make the two books autonomous but nevertheless complementary in order to understand the world of nonlinear electronics.

This book is mainly intended for undergraduate and graduate students, as well as students from engineering schools. As the book introduces elements gradually, everyone will find the elements that can interest them and meet their own needs.

This book is written in such a way as to provide the basic elements to first understand how nonlinear circuits operate, such as flip-flops in terms of their diversity, analog-to-digital and digital-to-analog converters, and the phase-locked loop (PLL), and discusses the perspective of constructing new knowledge by going further and further in the discovery of this book.

In the part reserved for flip-flops, the book presents basic circuits to identify the various phenomena that can occur in order to facilitate the reader’s understanding of these devices. This is done to allow everyone to better understand the circuits designed using a more condensed and integrated technology. This approach is designed to allow the reader to become a designer of nonlinear electronic functions. Flip-flops in their diversity from monostable flip-flops to the Schmitt flip-flop and the different types of bistable flip-flops are discussed in Chapter 1, followed by a set of exercises with solutions.

Analog-to-digital and digital-to-analog conversion is discussed in Chapter 2 of this book. Before addressing the conversion aspect, signal processing elements are recalled to make the reader aware that there are prerequisites to ensure that an analog-to-digital conversion or a digital-to-analog conversion does not alter the information that is to be processed or transmitted. Following this, the main analog-to-digital and digital-to-analog converters are presented with a detailed approach to their operation. This chapter is also followed by a series of exercises with solutions.

Chapter 3 deals with a very important electronic function in the field of nonlinear electronics, that is, the phase-locked loop (PLL). It is important to remember that PLLs are practically used in a very wide variety of electronic functions such as modulation and demodulation, division, multiplication and frequency synthesis. The development of functions around a PLL is getting richer every day, such as the use of PLL in chaotic communication and the security of information transmission. This chapter also includes a series of exercises designed to help the reader ensure that they understand the various phenomena.

Admittedly, a number of books deal with nonlinear electronics in the form of courses and exercises. However, they struggle to demonstrate the practical reality and do not provide any links with the functional circuits as presented by their designers or suppliers. This book responds objectively to this concern since it presents a number of functional circuits within it, with a detailed explanation in addition to what is proposed by the application notes of manufacturers such as Motorola, Analog Devices, Texas Instruments, etc.

I would like to thank in advance all readers who may wish to share their comments with us. I would also like to thank Mrs. Fadhila Haraoubia, electronic engineer, who proofread this book.




Flip-flops or latches are widely used circuits. There are various applications: for example, delaying the extinction of a signal, pacing the switching on or off of light, dividing the signal frequency, shaping a signal masked by noise, scheduling the operation of a process, processing the signals, etc.


Bistable circuits; Digital signal; Dropout voltage; Hysteresis cycle; Integrated circuit; Monostable flip-flops; Operational amplifier; Quasi-stable state; Rail-to-rail; Schmitt trigger; Threshold voltage; Time constant; Timer; Transistor

1.1 Overview of the different types of flip-flops

Flip-flops or latches are widely used circuits. There are various applications: for example, delaying the extinction of a signal, pacing the switching on or off of light, dividing the signal frequency, shaping a signal masked by noise, scheduling the operation of a process, processing the signals, etc. The flip-flops of greatest interest can be identified as:

-monostable flip-flops;

-bistable flip-flops;

-the Schmitt flip-flop.

Briefly, a monostable flip-flop can be represented by a black box (Figure 1.1). When impulses (so-called trigger pulses) are applied on the input of this device, we will have a signal on output which will alternatively have a quasi-stable and a stable state.

Figure 1.1 Monostable principle

The duration of the quasi-stable state is chosen by the user. At the end of the duration of this quasi-stable state, the circuit returns to its stable state. The quasistable state is obtained on output only if a pulse trigger is sent at the input of the circuit. It should be noted that there are two types of monostable: retriggerable monostable and non-retriggerable monostable. The most commonly used is the non-retriggerable monostable.

On the other hand, a bistable circuit has two stable states: high state and low state. At every trigger pulse applied on the bistable circuit input, the state of the output changes (Figure 1.2).

Figure 1.2 Principle of the bistable circuit

The Schmitt flip-flop or trigger is actually a special case of bistable flip-flops. The Schmitt flip-flop will be addressed separately because of its peculiarity compared to conventional bistable flip-flops. This type of flip-flop is mainly useful for shaping signals. Furthermore, when, for example, a signal of sinusoidal form is applied to the input of a Schmitt flip-flop (Figure 1.3), the output will assume a square shape. The shift from the low state to the high state and vice versa will depend on two specific triggering thresholds inherent to the Schmitt flip-flop. The latter is frequently used for controlling threshold-based devices. Voltages V1 and V2 are the two inherent thresholds of the Schmitt flip-flop.

Figure 1.3 Schmitt flip-flop principle

1.2 Monostable flip-flops

1.2.1 Monostable transistor flip-flop Principle and operation

On output, the monostable circuit will give a quasi-stable level for a well-determined time T1 when a short pulse is applied on input. An example of a monostable circuit implemented around bipolar transistors is schematized in Figure 1.4. It should be noted that the study of this circuit is very interesting to fully understand the various switching phenomena that may exist. The interest in this circuit is educational rather than practical due to the fact that nowadays, this type of device can be implemented using integrated circuits.

Figure 1.4 Bipolar transistor monostable

The functioning of such a circuit is established as follows:

-at rest, there is no trigger pulse.

Transistor Tr1 is blocked because of the negative polarization applied to its base. The voltage applied to the collector (VC1) of transistor Tr1 is equal to the supply voltage + Vcc:

When connecting (powering on), this voltage VC1 changes from a value a priori equal to zero to the value VCC; the capacitor C transmits this variation to the base of transistor Tr2. The latter will go to a saturation state. We then have:

Tr1 blocked and Tr2 saturated

When a brief negative pulse ve is applied at time t = t0, the capacitor C will instantly transmit the falling edge of this impulse to the base of transistor Tr2. The voltage applied at the base of this transistor will suddenly be negative and the latter will block. As a result, we have: VB2 < 0

The voltage Vcc applied at the level of the collector of transistor Tr2 is partly transmitted to the base of transistor Tr1, which will cause the latter to shift to a saturated state:

The voltage applied to the collector of transistor Tr1 changes from a value Vcc to a value equal to 0, with a decrease of the order of –VCC. This variation is instantly transmitted by capacitor C towards the base of transistor Tr2, which means that the base of the latter is now at potential:

This reinforces the idea of blocking transistor Tr2 when the short negative pulse is applied. Under these circumstances, we can establish an equivalent diagram of the branch containing capacitor C, as shown in Figure 1.5.

Figure. 1.5 Equivalent diagram of the branch containing capacitor C when transistor Tr1 is saturated

Capacitor C will start to charge through resistance R, in order to try to reach the maximum voltage (+ VCC) that is applied to it.

It should be recalled that the initial voltage at the terminals of the capacitor is of the order of (–VCC + 0.6v). This tension is none other than the voltage VB2 applied to the base of transistor Tr2. Once this tension reaches and slightly exceeds the value of 0.6 volts, transistor Tr2 is saturated and transistor Tr1 blocks.

The system will maintain this state until a new impulse reaches the collector of transistor Tr1. At this moment, the cycle described above will repeat. It can be observed that duration T1 of the quasi-stable state of the output signal depends on the time constant τ = RC.

The signals associated with the operation of the monostable are presented in Figure 1.6.

Figure 1.6 Signals associated with the functioning of the bipolar transistor monostable. For a color version of this figure, see Duration of the quasi-stable state

To calculate duration T1 of the quasi-stable state, it should be noted that this duration corresponds to the time the capacitor takes to charge itself with a voltage value equal to 0.6v (≅ 0 volt), starting from an initial voltage equal to:

The equation that characterizes the charge of the capacitor C through resistance R is generally defined using the following equation:

Constants A and B will be determined using boundary conditions. Furthermore, it can be written that:

Under these conditions, the equation that governs the variations of the capacitor charge voltage becomes:

At time t = T1, the voltage at the terminals of the capacitor is practically zero. We then have:

From which it can be deduced that:

1.2.2 Operational amplifier monostable flip-flop Principle and operation

The structure of the op-amp monostable circuit is schematized in Figure 1.7.

Figure 1.7 Op-amp monostable circuit

Initially, no voltage is injected on input. The reference voltage Vref is positive. The inverting input of the op-amp is at potential:

The op-amp is assembled as a threshold comparator. Since the voltage at the non-inverting terminal is a priori equal to zero, the output of the operational amplifier is in a low saturation state:

At rest, the output voltage is zero, and it suddenly shifts to the value –Vsat when powering on. Capacitor C transmits this variation to the cathode of diode D. The latter becomes forward-biased and starts conducting. The potential of point A is equal to the threshold voltage of the diode:

The value of the voltage vB is close to zero.

When a sufficiently negative impulse (ve) is sent to the inverting input, the potential applied to this input will be lower than that applied to the non-inverting input. The output of the operational amplifier will shift to a high saturation state:

The output voltage abruptly varies from –Vsat to + Vsat. This variation is transferred to the cathode of diode D through condenser C. The diode is in a blocked state. Under these conditions, the equivalent diagram of the op-amp monostable flip-flop is presented in Figure 1.8.

Figure 1.8 Equivalent diagram of the op-amp monostable where diode D is blocking

Capacitor C will start to charge through resistors R1 and R2.

Before the negative pulse reaches the inverted input, capacitor C is fully discharged. The voltage variation law at point A can be defined using the relation:

E and F are two constants that will be determined using boundary conditions. For this purpose, we have:

For t = 0; vA = 2Vsat = (E + F).

When t →∞; vA = F = 0 (the capacitor is fully charged, and the current no longer circulates through resistors R1 and R2):

The output will keep a high state until the potential (Ve-) of the inverted input will be greater than that of the non-inverted input (vB):

The switching will occur at the time when: Duration of the quasi-stable state

The duration of the quasi-stable state of the monostable flip-flop is the time that the voltage vB takes to change from an initial voltage equal to:

to a final voltage:

We know that:


The general expression of the duration T1 is:

In the case where we choose:

VSAT = VCC (rail-to-rail op-amp)

The op-amp voltage drop is zero.

We also choose:

We will then have the following expression for the duration of the quasi-stable state of the op-amp monostable:

The evolutions of the different signals at the op-amp monostable level are schematized in Figure 1.9

Figure 1.9 Evolution of the different signals at the level of the op-amp monostable: (a) triggering signal; (b) output signal; (c) signal at point A; (d) signal at point B. For a color version of this figure, see

1.2.3 Logic gate monostable flip-flop Principle and operation

An example of the logic gate monostable is schematized by the circuit shown in Figure 1.10. The gates used in this case are NAND gates. It is also possible to use another kind of gate.

Figure 1.10 Logic gate monostable

The technology for implementing the gates is irrelevant. For the case concerning the use of TTL gates, constant voltage generators (+ Vcc) can be omitted due to the fact that in this technology, a disconnected terminal is at a potential equal to 5 volts (supply voltage of the gates).

The functioning of this circuit can be established as follows:


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